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LPC1768/core_cm3.h@11:1c1ebd0324fa, 2009-08-28 (annotated)

Committer:
rolf.meyer@arm.com
Date:
Fri Aug 28 12:10:11 2009 +0000
Revision:
11:1c1ebd0324fa
A shiny new version

Who changed what in which revision?

UserRevisionLine numberNew contents of line
rolf.meyer@arm.com 11:1c1ebd0324fa 1 /******************************************************************************
rolf.meyer@arm.com 11:1c1ebd0324fa 2 * @file: core_cm3.h
rolf.meyer@arm.com 11:1c1ebd0324fa 3 * @purpose: CMSIS Cortex-M3 Core Peripheral Access Layer Header File
rolf.meyer@arm.com 11:1c1ebd0324fa 4 * @version: V1.30 PRE-RELEASE
rolf.meyer@arm.com 11:1c1ebd0324fa 5 * @date: 30. July 2009
rolf.meyer@arm.com 11:1c1ebd0324fa 6 *----------------------------------------------------------------------------
rolf.meyer@arm.com 11:1c1ebd0324fa 7 *
rolf.meyer@arm.com 11:1c1ebd0324fa 8 * Copyright (C) 2009 ARM Limited. All rights reserved.
rolf.meyer@arm.com 11:1c1ebd0324fa 9 *
rolf.meyer@arm.com 11:1c1ebd0324fa 10 * ARM Limited (ARM) is supplying this software for use with Cortex-Mx
rolf.meyer@arm.com 11:1c1ebd0324fa 11 * processor based microcontrollers. This file can be freely distributed
rolf.meyer@arm.com 11:1c1ebd0324fa 12 * within development tools that are supporting such ARM based processors.
rolf.meyer@arm.com 11:1c1ebd0324fa 13 *
rolf.meyer@arm.com 11:1c1ebd0324fa 14 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
rolf.meyer@arm.com 11:1c1ebd0324fa 15 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
rolf.meyer@arm.com 11:1c1ebd0324fa 16 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
rolf.meyer@arm.com 11:1c1ebd0324fa 17 * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
rolf.meyer@arm.com 11:1c1ebd0324fa 18 * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
rolf.meyer@arm.com 11:1c1ebd0324fa 19 *
rolf.meyer@arm.com 11:1c1ebd0324fa 20 ******************************************************************************/
rolf.meyer@arm.com 11:1c1ebd0324fa 21
rolf.meyer@arm.com 11:1c1ebd0324fa 22 #ifndef __CM3_CORE_H__
rolf.meyer@arm.com 11:1c1ebd0324fa 23 #define __CM3_CORE_H__
rolf.meyer@arm.com 11:1c1ebd0324fa 24
rolf.meyer@arm.com 11:1c1ebd0324fa 25 #ifdef __cplusplus
rolf.meyer@arm.com 11:1c1ebd0324fa 26 extern "C" {
rolf.meyer@arm.com 11:1c1ebd0324fa 27 #endif
rolf.meyer@arm.com 11:1c1ebd0324fa 28
rolf.meyer@arm.com 11:1c1ebd0324fa 29 #define __CM3_CMSIS_VERSION_MAIN (0x01) /*!< [31:16] CMSIS HAL main version */
rolf.meyer@arm.com 11:1c1ebd0324fa 30 #define __CM3_CMSIS_VERSION_SUB (0x30) /*!< [15:0] CMSIS HAL sub version */
rolf.meyer@arm.com 11:1c1ebd0324fa 31 #define __CM3_CMSIS_VERSION ((__CM3_CMSIS_VERSION_MAIN << 16) | __CM3_CMSIS_VERSION_SUB) /*!< CMSIS HAL version number */
rolf.meyer@arm.com 11:1c1ebd0324fa 32
rolf.meyer@arm.com 11:1c1ebd0324fa 33 #define __CORTEX_M (0x03) /*!< Cortex core */
rolf.meyer@arm.com 11:1c1ebd0324fa 34
rolf.meyer@arm.com 11:1c1ebd0324fa 35 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 36 * Lint configuration \n
rolf.meyer@arm.com 11:1c1ebd0324fa 37 * ----------------------- \n
rolf.meyer@arm.com 11:1c1ebd0324fa 38 *
rolf.meyer@arm.com 11:1c1ebd0324fa 39 * The following Lint messages will be suppressed and not shown: \n
rolf.meyer@arm.com 11:1c1ebd0324fa 40 * \n
rolf.meyer@arm.com 11:1c1ebd0324fa 41 * --- Error 10: --- \n
rolf.meyer@arm.com 11:1c1ebd0324fa 42 * register uint32_t __regBasePri __asm("basepri"); \n
rolf.meyer@arm.com 11:1c1ebd0324fa 43 * Error 10: Expecting ';' \n
rolf.meyer@arm.com 11:1c1ebd0324fa 44 * \n
rolf.meyer@arm.com 11:1c1ebd0324fa 45 * --- Error 530: --- \n
rolf.meyer@arm.com 11:1c1ebd0324fa 46 * return(__regBasePri); \n
rolf.meyer@arm.com 11:1c1ebd0324fa 47 * Warning 530: Symbol '__regBasePri' (line 264) not initialized \n
rolf.meyer@arm.com 11:1c1ebd0324fa 48 * \n
rolf.meyer@arm.com 11:1c1ebd0324fa 49 * --- Error 550: --- \n
rolf.meyer@arm.com 11:1c1ebd0324fa 50 * __regBasePri = (basePri & 0x1ff); \n
rolf.meyer@arm.com 11:1c1ebd0324fa 51 * } \n
rolf.meyer@arm.com 11:1c1ebd0324fa 52 * Warning 550: Symbol '__regBasePri' (line 271) not accessed \n
rolf.meyer@arm.com 11:1c1ebd0324fa 53 * \n
rolf.meyer@arm.com 11:1c1ebd0324fa 54 * --- Error 754: --- \n
rolf.meyer@arm.com 11:1c1ebd0324fa 55 * uint32_t RESERVED0[24]; \n
rolf.meyer@arm.com 11:1c1ebd0324fa 56 * Info 754: local structure member '<some, not used in the HAL>' (line 109, file ./cm3_core.h) not referenced \n
rolf.meyer@arm.com 11:1c1ebd0324fa 57 * \n
rolf.meyer@arm.com 11:1c1ebd0324fa 58 * --- Error 750: --- \n
rolf.meyer@arm.com 11:1c1ebd0324fa 59 * #define __CM3_CORE_H__ \n
rolf.meyer@arm.com 11:1c1ebd0324fa 60 * Info 750: local macro '__CM3_CORE_H__' (line 43, file./cm3_core.h) not referenced \n
rolf.meyer@arm.com 11:1c1ebd0324fa 61 * \n
rolf.meyer@arm.com 11:1c1ebd0324fa 62 * --- Error 528: --- \n
rolf.meyer@arm.com 11:1c1ebd0324fa 63 * static __INLINE void NVIC_DisableIRQ(uint32_t IRQn) \n
rolf.meyer@arm.com 11:1c1ebd0324fa 64 * Warning 528: Symbol 'NVIC_DisableIRQ(unsigned int)' (line 419, file ./cm3_core.h) not referenced \n
rolf.meyer@arm.com 11:1c1ebd0324fa 65 * \n
rolf.meyer@arm.com 11:1c1ebd0324fa 66 * --- Error 751: --- \n
rolf.meyer@arm.com 11:1c1ebd0324fa 67 * } InterruptType_Type; \n
rolf.meyer@arm.com 11:1c1ebd0324fa 68 * Info 751: local typedef 'InterruptType_Type' (line 170, file ./cm3_core.h) not referenced \n
rolf.meyer@arm.com 11:1c1ebd0324fa 69 * \n
rolf.meyer@arm.com 11:1c1ebd0324fa 70 * \n
rolf.meyer@arm.com 11:1c1ebd0324fa 71 * Note: To re-enable a Message, insert a space before 'lint' * \n
rolf.meyer@arm.com 11:1c1ebd0324fa 72 *
rolf.meyer@arm.com 11:1c1ebd0324fa 73 */
rolf.meyer@arm.com 11:1c1ebd0324fa 74
rolf.meyer@arm.com 11:1c1ebd0324fa 75 /*lint -save */
rolf.meyer@arm.com 11:1c1ebd0324fa 76 /*lint -e10 */
rolf.meyer@arm.com 11:1c1ebd0324fa 77 /*lint -e530 */
rolf.meyer@arm.com 11:1c1ebd0324fa 78 /*lint -e550 */
rolf.meyer@arm.com 11:1c1ebd0324fa 79 /*lint -e754 */
rolf.meyer@arm.com 11:1c1ebd0324fa 80 /*lint -e750 */
rolf.meyer@arm.com 11:1c1ebd0324fa 81 /*lint -e528 */
rolf.meyer@arm.com 11:1c1ebd0324fa 82 /*lint -e751 */
rolf.meyer@arm.com 11:1c1ebd0324fa 83
rolf.meyer@arm.com 11:1c1ebd0324fa 84
rolf.meyer@arm.com 11:1c1ebd0324fa 85 #include <stdint.h> /* Include standard types */
rolf.meyer@arm.com 11:1c1ebd0324fa 86
rolf.meyer@arm.com 11:1c1ebd0324fa 87 #if defined (__ICCARM__)
rolf.meyer@arm.com 11:1c1ebd0324fa 88 #include <intrinsics.h> /* IAR Intrinsics */
rolf.meyer@arm.com 11:1c1ebd0324fa 89 #endif
rolf.meyer@arm.com 11:1c1ebd0324fa 90
rolf.meyer@arm.com 11:1c1ebd0324fa 91
rolf.meyer@arm.com 11:1c1ebd0324fa 92 #ifndef __NVIC_PRIO_BITS
rolf.meyer@arm.com 11:1c1ebd0324fa 93 #define __NVIC_PRIO_BITS 4 /*!< standard definition for NVIC Priority Bits */
rolf.meyer@arm.com 11:1c1ebd0324fa 94 #endif
rolf.meyer@arm.com 11:1c1ebd0324fa 95
rolf.meyer@arm.com 11:1c1ebd0324fa 96
rolf.meyer@arm.com 11:1c1ebd0324fa 97
rolf.meyer@arm.com 11:1c1ebd0324fa 98
rolf.meyer@arm.com 11:1c1ebd0324fa 99 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 100 * IO definitions
rolf.meyer@arm.com 11:1c1ebd0324fa 101 *
rolf.meyer@arm.com 11:1c1ebd0324fa 102 * define access restrictions to peripheral registers
rolf.meyer@arm.com 11:1c1ebd0324fa 103 */
rolf.meyer@arm.com 11:1c1ebd0324fa 104
rolf.meyer@arm.com 11:1c1ebd0324fa 105 #ifdef __cplusplus
rolf.meyer@arm.com 11:1c1ebd0324fa 106 #define __I volatile /*!< defines 'read only' permissions */
rolf.meyer@arm.com 11:1c1ebd0324fa 107 #else
rolf.meyer@arm.com 11:1c1ebd0324fa 108 #define __I volatile const /*!< defines 'read only' permissions */
rolf.meyer@arm.com 11:1c1ebd0324fa 109 #endif
rolf.meyer@arm.com 11:1c1ebd0324fa 110 #define __O volatile /*!< defines 'write only' permissions */
rolf.meyer@arm.com 11:1c1ebd0324fa 111 #define __IO volatile /*!< defines 'read / write' permissions */
rolf.meyer@arm.com 11:1c1ebd0324fa 112
rolf.meyer@arm.com 11:1c1ebd0324fa 113
rolf.meyer@arm.com 11:1c1ebd0324fa 114
rolf.meyer@arm.com 11:1c1ebd0324fa 115 /*******************************************************************************
rolf.meyer@arm.com 11:1c1ebd0324fa 116 * Register Abstraction
rolf.meyer@arm.com 11:1c1ebd0324fa 117 ******************************************************************************/
rolf.meyer@arm.com 11:1c1ebd0324fa 118
rolf.meyer@arm.com 11:1c1ebd0324fa 119
rolf.meyer@arm.com 11:1c1ebd0324fa 120 /* System Reset */
rolf.meyer@arm.com 11:1c1ebd0324fa 121 #define NVIC_VECTRESET 0 /*!< Vector Reset Bit */
rolf.meyer@arm.com 11:1c1ebd0324fa 122 #define NVIC_SYSRESETREQ 2 /*!< System Reset Request */
rolf.meyer@arm.com 11:1c1ebd0324fa 123 #define NVIC_AIRCR_VECTKEY (0x5FA << 16) /*!< AIRCR Key for write access */
rolf.meyer@arm.com 11:1c1ebd0324fa 124 #define NVIC_AIRCR_ENDIANESS 15 /*!< Endianess */
rolf.meyer@arm.com 11:1c1ebd0324fa 125
rolf.meyer@arm.com 11:1c1ebd0324fa 126 /* Core Debug */
rolf.meyer@arm.com 11:1c1ebd0324fa 127 #define CoreDebug_DEMCR_TRCENA (1 << 24) /*!< DEMCR TRCENA enable */
rolf.meyer@arm.com 11:1c1ebd0324fa 128 #define ITM_TCR_ITMENA 1 /*!< ITM enable */
rolf.meyer@arm.com 11:1c1ebd0324fa 129
rolf.meyer@arm.com 11:1c1ebd0324fa 130
rolf.meyer@arm.com 11:1c1ebd0324fa 131
rolf.meyer@arm.com 11:1c1ebd0324fa 132
rolf.meyer@arm.com 11:1c1ebd0324fa 133 /* memory mapping struct for Nested Vectored Interrupt Controller (NVIC) */
rolf.meyer@arm.com 11:1c1ebd0324fa 134 typedef struct
rolf.meyer@arm.com 11:1c1ebd0324fa 135 {
rolf.meyer@arm.com 11:1c1ebd0324fa 136 __IO uint32_t ISER[8]; /*!< Interrupt Set Enable Register */
rolf.meyer@arm.com 11:1c1ebd0324fa 137 uint32_t RESERVED0[24];
rolf.meyer@arm.com 11:1c1ebd0324fa 138 __IO uint32_t ICER[8]; /*!< Interrupt Clear Enable Register */
rolf.meyer@arm.com 11:1c1ebd0324fa 139 uint32_t RSERVED1[24];
rolf.meyer@arm.com 11:1c1ebd0324fa 140 __IO uint32_t ISPR[8]; /*!< Interrupt Set Pending Register */
rolf.meyer@arm.com 11:1c1ebd0324fa 141 uint32_t RESERVED2[24];
rolf.meyer@arm.com 11:1c1ebd0324fa 142 __IO uint32_t ICPR[8]; /*!< Interrupt Clear Pending Register */
rolf.meyer@arm.com 11:1c1ebd0324fa 143 uint32_t RESERVED3[24];
rolf.meyer@arm.com 11:1c1ebd0324fa 144 __IO uint32_t IABR[8]; /*!< Interrupt Active bit Register */
rolf.meyer@arm.com 11:1c1ebd0324fa 145 uint32_t RESERVED4[56];
rolf.meyer@arm.com 11:1c1ebd0324fa 146 __IO uint8_t IP[240]; /*!< Interrupt Priority Register, 8Bit wide */
rolf.meyer@arm.com 11:1c1ebd0324fa 147 uint32_t RESERVED5[644];
rolf.meyer@arm.com 11:1c1ebd0324fa 148 __O uint32_t STIR; /*!< Software Trigger Interrupt Register */
rolf.meyer@arm.com 11:1c1ebd0324fa 149 } NVIC_Type;
rolf.meyer@arm.com 11:1c1ebd0324fa 150
rolf.meyer@arm.com 11:1c1ebd0324fa 151
rolf.meyer@arm.com 11:1c1ebd0324fa 152 /* memory mapping struct for System Control Block */
rolf.meyer@arm.com 11:1c1ebd0324fa 153 typedef struct
rolf.meyer@arm.com 11:1c1ebd0324fa 154 {
rolf.meyer@arm.com 11:1c1ebd0324fa 155 __I uint32_t CPUID; /*!< CPU ID Base Register */
rolf.meyer@arm.com 11:1c1ebd0324fa 156 __IO uint32_t ICSR; /*!< Interrupt Control State Register */
rolf.meyer@arm.com 11:1c1ebd0324fa 157 __IO uint32_t VTOR; /*!< Vector Table Offset Register */
rolf.meyer@arm.com 11:1c1ebd0324fa 158 __IO uint32_t AIRCR; /*!< Application Interrupt / Reset Control Register */
rolf.meyer@arm.com 11:1c1ebd0324fa 159 __IO uint32_t SCR; /*!< System Control Register */
rolf.meyer@arm.com 11:1c1ebd0324fa 160 __IO uint32_t CCR; /*!< Configuration Control Register */
rolf.meyer@arm.com 11:1c1ebd0324fa 161 __IO uint8_t SHP[12]; /*!< System Handlers Priority Registers (4-7, 8-11, 12-15) */
rolf.meyer@arm.com 11:1c1ebd0324fa 162 __IO uint32_t SHCSR; /*!< System Handler Control and State Register */
rolf.meyer@arm.com 11:1c1ebd0324fa 163 __IO uint32_t CFSR; /*!< Configurable Fault Status Register */
rolf.meyer@arm.com 11:1c1ebd0324fa 164 __IO uint32_t HFSR; /*!< Hard Fault Status Register */
rolf.meyer@arm.com 11:1c1ebd0324fa 165 __IO uint32_t DFSR; /*!< Debug Fault Status Register */
rolf.meyer@arm.com 11:1c1ebd0324fa 166 __IO uint32_t MMFAR; /*!< Mem Manage Address Register */
rolf.meyer@arm.com 11:1c1ebd0324fa 167 __IO uint32_t BFAR; /*!< Bus Fault Address Register */
rolf.meyer@arm.com 11:1c1ebd0324fa 168 __IO uint32_t AFSR; /*!< Auxiliary Fault Status Register */
rolf.meyer@arm.com 11:1c1ebd0324fa 169 __I uint32_t PFR[2]; /*!< Processor Feature Register */
rolf.meyer@arm.com 11:1c1ebd0324fa 170 __I uint32_t DFR; /*!< Debug Feature Register */
rolf.meyer@arm.com 11:1c1ebd0324fa 171 __I uint32_t ADR; /*!< Auxiliary Feature Register */
rolf.meyer@arm.com 11:1c1ebd0324fa 172 __I uint32_t MMFR[4]; /*!< Memory Model Feature Register */
rolf.meyer@arm.com 11:1c1ebd0324fa 173 __I uint32_t ISAR[5]; /*!< ISA Feature Register */
rolf.meyer@arm.com 11:1c1ebd0324fa 174 } SCB_Type;
rolf.meyer@arm.com 11:1c1ebd0324fa 175
rolf.meyer@arm.com 11:1c1ebd0324fa 176
rolf.meyer@arm.com 11:1c1ebd0324fa 177 /* memory mapping struct for SysTick */
rolf.meyer@arm.com 11:1c1ebd0324fa 178 typedef struct
rolf.meyer@arm.com 11:1c1ebd0324fa 179 {
rolf.meyer@arm.com 11:1c1ebd0324fa 180 __IO uint32_t CTRL; /*!< SysTick Control and Status Register */
rolf.meyer@arm.com 11:1c1ebd0324fa 181 __IO uint32_t LOAD; /*!< SysTick Reload Value Register */
rolf.meyer@arm.com 11:1c1ebd0324fa 182 __IO uint32_t VAL; /*!< SysTick Current Value Register */
rolf.meyer@arm.com 11:1c1ebd0324fa 183 __I uint32_t CALIB; /*!< SysTick Calibration Register */
rolf.meyer@arm.com 11:1c1ebd0324fa 184 } SysTick_Type;
rolf.meyer@arm.com 11:1c1ebd0324fa 185
rolf.meyer@arm.com 11:1c1ebd0324fa 186
rolf.meyer@arm.com 11:1c1ebd0324fa 187 /* memory mapping structur for ITM */
rolf.meyer@arm.com 11:1c1ebd0324fa 188 typedef struct
rolf.meyer@arm.com 11:1c1ebd0324fa 189 {
rolf.meyer@arm.com 11:1c1ebd0324fa 190 __O union
rolf.meyer@arm.com 11:1c1ebd0324fa 191 {
rolf.meyer@arm.com 11:1c1ebd0324fa 192 __O uint8_t u8; /*!< ITM Stimulus Port 8-bit */
rolf.meyer@arm.com 11:1c1ebd0324fa 193 __O uint16_t u16; /*!< ITM Stimulus Port 16-bit */
rolf.meyer@arm.com 11:1c1ebd0324fa 194 __O uint32_t u32; /*!< ITM Stimulus Port 32-bit */
rolf.meyer@arm.com 11:1c1ebd0324fa 195 } PORT [32]; /*!< ITM Stimulus Port Registers */
rolf.meyer@arm.com 11:1c1ebd0324fa 196 uint32_t RESERVED0[864];
rolf.meyer@arm.com 11:1c1ebd0324fa 197 __IO uint32_t TER; /*!< ITM Trace Enable Register */
rolf.meyer@arm.com 11:1c1ebd0324fa 198 uint32_t RESERVED1[15];
rolf.meyer@arm.com 11:1c1ebd0324fa 199 __IO uint32_t TPR; /*!< ITM Trace Privilege Register */
rolf.meyer@arm.com 11:1c1ebd0324fa 200 uint32_t RESERVED2[15];
rolf.meyer@arm.com 11:1c1ebd0324fa 201 __IO uint32_t TCR; /*!< ITM Trace Control Register */
rolf.meyer@arm.com 11:1c1ebd0324fa 202 uint32_t RESERVED3[29];
rolf.meyer@arm.com 11:1c1ebd0324fa 203 __IO uint32_t IWR; /*!< ITM Integration Write Register */
rolf.meyer@arm.com 11:1c1ebd0324fa 204 __IO uint32_t IRR; /*!< ITM Integration Read Register */
rolf.meyer@arm.com 11:1c1ebd0324fa 205 __IO uint32_t IMCR; /*!< ITM Integration Mode Control Register */
rolf.meyer@arm.com 11:1c1ebd0324fa 206 uint32_t RESERVED4[43];
rolf.meyer@arm.com 11:1c1ebd0324fa 207 __IO uint32_t LAR; /*!< ITM Lock Access Register */
rolf.meyer@arm.com 11:1c1ebd0324fa 208 __IO uint32_t LSR; /*!< ITM Lock Status Register */
rolf.meyer@arm.com 11:1c1ebd0324fa 209 uint32_t RESERVED5[6];
rolf.meyer@arm.com 11:1c1ebd0324fa 210 __I uint32_t PID4; /*!< ITM Product ID Registers */
rolf.meyer@arm.com 11:1c1ebd0324fa 211 __I uint32_t PID5;
rolf.meyer@arm.com 11:1c1ebd0324fa 212 __I uint32_t PID6;
rolf.meyer@arm.com 11:1c1ebd0324fa 213 __I uint32_t PID7;
rolf.meyer@arm.com 11:1c1ebd0324fa 214 __I uint32_t PID0;
rolf.meyer@arm.com 11:1c1ebd0324fa 215 __I uint32_t PID1;
rolf.meyer@arm.com 11:1c1ebd0324fa 216 __I uint32_t PID2;
rolf.meyer@arm.com 11:1c1ebd0324fa 217 __I uint32_t PID3;
rolf.meyer@arm.com 11:1c1ebd0324fa 218 __I uint32_t CID0;
rolf.meyer@arm.com 11:1c1ebd0324fa 219 __I uint32_t CID1;
rolf.meyer@arm.com 11:1c1ebd0324fa 220 __I uint32_t CID2;
rolf.meyer@arm.com 11:1c1ebd0324fa 221 __I uint32_t CID3;
rolf.meyer@arm.com 11:1c1ebd0324fa 222 } ITM_Type;
rolf.meyer@arm.com 11:1c1ebd0324fa 223
rolf.meyer@arm.com 11:1c1ebd0324fa 224
rolf.meyer@arm.com 11:1c1ebd0324fa 225 /* memory mapped struct for Interrupt Type */
rolf.meyer@arm.com 11:1c1ebd0324fa 226 typedef struct
rolf.meyer@arm.com 11:1c1ebd0324fa 227 {
rolf.meyer@arm.com 11:1c1ebd0324fa 228 uint32_t RESERVED0;
rolf.meyer@arm.com 11:1c1ebd0324fa 229 __I uint32_t ICTR; /*!< Interrupt Control Type Register */
rolf.meyer@arm.com 11:1c1ebd0324fa 230 #if ((defined __CM3_REV) && (__CM3_REV >= 0x200))
rolf.meyer@arm.com 11:1c1ebd0324fa 231 __IO uint32_t ACTLR; /*!< Auxiliary Control Register */
rolf.meyer@arm.com 11:1c1ebd0324fa 232 #else
rolf.meyer@arm.com 11:1c1ebd0324fa 233 uint32_t RESERVED1;
rolf.meyer@arm.com 11:1c1ebd0324fa 234 #endif
rolf.meyer@arm.com 11:1c1ebd0324fa 235 } InterruptType_Type;
rolf.meyer@arm.com 11:1c1ebd0324fa 236
rolf.meyer@arm.com 11:1c1ebd0324fa 237
rolf.meyer@arm.com 11:1c1ebd0324fa 238 /* Memory Protection Unit */
rolf.meyer@arm.com 11:1c1ebd0324fa 239 #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1)
rolf.meyer@arm.com 11:1c1ebd0324fa 240 typedef struct
rolf.meyer@arm.com 11:1c1ebd0324fa 241 {
rolf.meyer@arm.com 11:1c1ebd0324fa 242 __I uint32_t TYPE; /*!< MPU Type Register */
rolf.meyer@arm.com 11:1c1ebd0324fa 243 __IO uint32_t CTRL; /*!< MPU Control Register */
rolf.meyer@arm.com 11:1c1ebd0324fa 244 __IO uint32_t RNR; /*!< MPU Region RNRber Register */
rolf.meyer@arm.com 11:1c1ebd0324fa 245 __IO uint32_t RBAR; /*!< MPU Region Base Address Register */
rolf.meyer@arm.com 11:1c1ebd0324fa 246 __IO uint32_t RASR; /*!< MPU Region Attribute and Size Register */
rolf.meyer@arm.com 11:1c1ebd0324fa 247 __IO uint32_t RBAR_A1; /*!< MPU Alias 1 Region Base Address Register */
rolf.meyer@arm.com 11:1c1ebd0324fa 248 __IO uint32_t RASR_A1; /*!< MPU Alias 1 Region Attribute and Size Register */
rolf.meyer@arm.com 11:1c1ebd0324fa 249 __IO uint32_t RBAR_A2; /*!< MPU Alias 2 Region Base Address Register */
rolf.meyer@arm.com 11:1c1ebd0324fa 250 __IO uint32_t RASR_A2; /*!< MPU Alias 2 Region Attribute and Size Register */
rolf.meyer@arm.com 11:1c1ebd0324fa 251 __IO uint32_t RBAR_A3; /*!< MPU Alias 3 Region Base Address Register */
rolf.meyer@arm.com 11:1c1ebd0324fa 252 __IO uint32_t RASR_A3; /*!< MPU Alias 3 Region Attribute and Size Register */
rolf.meyer@arm.com 11:1c1ebd0324fa 253 } MPU_Type;
rolf.meyer@arm.com 11:1c1ebd0324fa 254 #endif
rolf.meyer@arm.com 11:1c1ebd0324fa 255
rolf.meyer@arm.com 11:1c1ebd0324fa 256
rolf.meyer@arm.com 11:1c1ebd0324fa 257 /* Core Debug Register */
rolf.meyer@arm.com 11:1c1ebd0324fa 258 typedef struct
rolf.meyer@arm.com 11:1c1ebd0324fa 259 {
rolf.meyer@arm.com 11:1c1ebd0324fa 260 __IO uint32_t DHCSR; /*!< Debug Halting Control and Status Register */
rolf.meyer@arm.com 11:1c1ebd0324fa 261 __O uint32_t DCRSR; /*!< Debug Core Register Selector Register */
rolf.meyer@arm.com 11:1c1ebd0324fa 262 __IO uint32_t DCRDR; /*!< Debug Core Register Data Register */
rolf.meyer@arm.com 11:1c1ebd0324fa 263 __IO uint32_t DEMCR; /*!< Debug Exception and Monitor Control Register */
rolf.meyer@arm.com 11:1c1ebd0324fa 264 } CoreDebug_Type;
rolf.meyer@arm.com 11:1c1ebd0324fa 265
rolf.meyer@arm.com 11:1c1ebd0324fa 266
rolf.meyer@arm.com 11:1c1ebd0324fa 267 /* Memory mapping of Cortex-M3 Hardware */
rolf.meyer@arm.com 11:1c1ebd0324fa 268 #define SCS_BASE (0xE000E000) /*!< System Control Space Base Address */
rolf.meyer@arm.com 11:1c1ebd0324fa 269 #define ITM_BASE (0xE0000000) /*!< ITM Base Address */
rolf.meyer@arm.com 11:1c1ebd0324fa 270 #define CoreDebug_BASE (0xE000EDF0) /*!< Core Debug Base Address */
rolf.meyer@arm.com 11:1c1ebd0324fa 271 #define SysTick_BASE (SCS_BASE + 0x0010) /*!< SysTick Base Address */
rolf.meyer@arm.com 11:1c1ebd0324fa 272 #define NVIC_BASE (SCS_BASE + 0x0100) /*!< NVIC Base Address */
rolf.meyer@arm.com 11:1c1ebd0324fa 273 #define SCB_BASE (SCS_BASE + 0x0D00) /*!< System Control Block Base Address */
rolf.meyer@arm.com 11:1c1ebd0324fa 274
rolf.meyer@arm.com 11:1c1ebd0324fa 275 #define InterruptType ((InterruptType_Type *) SCS_BASE) /*!< Interrupt Type Register */
rolf.meyer@arm.com 11:1c1ebd0324fa 276 #define SCB ((SCB_Type *) SCB_BASE) /*!< SCB configuration struct */
rolf.meyer@arm.com 11:1c1ebd0324fa 277 #define SysTick ((SysTick_Type *) SysTick_BASE) /*!< SysTick configuration struct */
rolf.meyer@arm.com 11:1c1ebd0324fa 278 #define NVIC ((NVIC_Type *) NVIC_BASE) /*!< NVIC configuration struct */
rolf.meyer@arm.com 11:1c1ebd0324fa 279 #define ITM ((ITM_Type *) ITM_BASE) /*!< ITM configuration struct */
rolf.meyer@arm.com 11:1c1ebd0324fa 280 #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */
rolf.meyer@arm.com 11:1c1ebd0324fa 281
rolf.meyer@arm.com 11:1c1ebd0324fa 282 #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1)
rolf.meyer@arm.com 11:1c1ebd0324fa 283 #define MPU_BASE (SCS_BASE + 0x0D90) /*!< Memory Protection Unit */
rolf.meyer@arm.com 11:1c1ebd0324fa 284 #define MPU ((MPU_Type*) MPU_BASE) /*!< Memory Protection Unit */
rolf.meyer@arm.com 11:1c1ebd0324fa 285 #endif
rolf.meyer@arm.com 11:1c1ebd0324fa 286
rolf.meyer@arm.com 11:1c1ebd0324fa 287
rolf.meyer@arm.com 11:1c1ebd0324fa 288 /*******************************************************************************
rolf.meyer@arm.com 11:1c1ebd0324fa 289 * Hardware Abstraction Layer
rolf.meyer@arm.com 11:1c1ebd0324fa 290 ******************************************************************************/
rolf.meyer@arm.com 11:1c1ebd0324fa 291
rolf.meyer@arm.com 11:1c1ebd0324fa 292
rolf.meyer@arm.com 11:1c1ebd0324fa 293 #if defined ( __CC_ARM )
rolf.meyer@arm.com 11:1c1ebd0324fa 294 #define __ASM __asm /*!< asm keyword for ARM Compiler */
rolf.meyer@arm.com 11:1c1ebd0324fa 295 #define __INLINE __inline /*!< inline keyword for ARM Compiler */
rolf.meyer@arm.com 11:1c1ebd0324fa 296
rolf.meyer@arm.com 11:1c1ebd0324fa 297 #elif defined ( __ICCARM__ )
rolf.meyer@arm.com 11:1c1ebd0324fa 298 #define __ASM __asm /*!< asm keyword for IAR Compiler */
rolf.meyer@arm.com 11:1c1ebd0324fa 299 #define __INLINE inline /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */
rolf.meyer@arm.com 11:1c1ebd0324fa 300
rolf.meyer@arm.com 11:1c1ebd0324fa 301 #elif defined ( __GNUC__ )
rolf.meyer@arm.com 11:1c1ebd0324fa 302 #define __ASM __asm /*!< asm keyword for GNU Compiler */
rolf.meyer@arm.com 11:1c1ebd0324fa 303 #define __INLINE inline /*!< inline keyword for GNU Compiler */
rolf.meyer@arm.com 11:1c1ebd0324fa 304
rolf.meyer@arm.com 11:1c1ebd0324fa 305 #elif defined ( __TASKING__ )
rolf.meyer@arm.com 11:1c1ebd0324fa 306 #define __ASM __asm /*!< asm keyword for TASKING Compiler */
rolf.meyer@arm.com 11:1c1ebd0324fa 307 #define __INLINE inline /*!< inline keyword for TASKING Compiler */
rolf.meyer@arm.com 11:1c1ebd0324fa 308
rolf.meyer@arm.com 11:1c1ebd0324fa 309 #endif
rolf.meyer@arm.com 11:1c1ebd0324fa 310
rolf.meyer@arm.com 11:1c1ebd0324fa 311
rolf.meyer@arm.com 11:1c1ebd0324fa 312 /* ################### Compiler specific Intrinsics ########################### */
rolf.meyer@arm.com 11:1c1ebd0324fa 313
rolf.meyer@arm.com 11:1c1ebd0324fa 314 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
rolf.meyer@arm.com 11:1c1ebd0324fa 315 /* ARM armcc specific functions */
rolf.meyer@arm.com 11:1c1ebd0324fa 316
rolf.meyer@arm.com 11:1c1ebd0324fa 317 #define __enable_fault_irq __enable_fiq
rolf.meyer@arm.com 11:1c1ebd0324fa 318 #define __disable_fault_irq __disable_fiq
rolf.meyer@arm.com 11:1c1ebd0324fa 319
rolf.meyer@arm.com 11:1c1ebd0324fa 320 #define __NOP __nop
rolf.meyer@arm.com 11:1c1ebd0324fa 321 #define __WFI __wfi
rolf.meyer@arm.com 11:1c1ebd0324fa 322 #define __WFE __wfe
rolf.meyer@arm.com 11:1c1ebd0324fa 323 #define __SEV __sev
rolf.meyer@arm.com 11:1c1ebd0324fa 324 #define __ISB() __isb(0)
rolf.meyer@arm.com 11:1c1ebd0324fa 325 #define __DSB() __dsb(0)
rolf.meyer@arm.com 11:1c1ebd0324fa 326 #define __DMB() __dmb(0)
rolf.meyer@arm.com 11:1c1ebd0324fa 327 #define __REV __rev
rolf.meyer@arm.com 11:1c1ebd0324fa 328 #define __RBIT __rbit
rolf.meyer@arm.com 11:1c1ebd0324fa 329 #define __LDREXB(ptr) ((unsigned char ) __ldrex(ptr))
rolf.meyer@arm.com 11:1c1ebd0324fa 330 #define __LDREXH(ptr) ((unsigned short) __ldrex(ptr))
rolf.meyer@arm.com 11:1c1ebd0324fa 331 #define __LDREXW(ptr) ((unsigned int ) __ldrex(ptr))
rolf.meyer@arm.com 11:1c1ebd0324fa 332 #define __STREXB(value, ptr) __strex(value, ptr)
rolf.meyer@arm.com 11:1c1ebd0324fa 333 #define __STREXH(value, ptr) __strex(value, ptr)
rolf.meyer@arm.com 11:1c1ebd0324fa 334 #define __STREXW(value, ptr) __strex(value, ptr)
rolf.meyer@arm.com 11:1c1ebd0324fa 335
rolf.meyer@arm.com 11:1c1ebd0324fa 336
rolf.meyer@arm.com 11:1c1ebd0324fa 337 /* intrinsic unsigned long long __ldrexd(volatile void *ptr) */
rolf.meyer@arm.com 11:1c1ebd0324fa 338 /* intrinsic int __strexd(unsigned long long val, volatile void *ptr) */
rolf.meyer@arm.com 11:1c1ebd0324fa 339 /* intrinsic void __enable_irq(); */
rolf.meyer@arm.com 11:1c1ebd0324fa 340 /* intrinsic void __disable_irq(); */
rolf.meyer@arm.com 11:1c1ebd0324fa 341
rolf.meyer@arm.com 11:1c1ebd0324fa 342
rolf.meyer@arm.com 11:1c1ebd0324fa 343 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 344 * @brief Return the Process Stack Pointer
rolf.meyer@arm.com 11:1c1ebd0324fa 345 *
rolf.meyer@arm.com 11:1c1ebd0324fa 346 * @param none
rolf.meyer@arm.com 11:1c1ebd0324fa 347 * @return uint32_t ProcessStackPointer
rolf.meyer@arm.com 11:1c1ebd0324fa 348 *
rolf.meyer@arm.com 11:1c1ebd0324fa 349 * Return the actual process stack pointer
rolf.meyer@arm.com 11:1c1ebd0324fa 350 */
rolf.meyer@arm.com 11:1c1ebd0324fa 351 extern uint32_t __get_PSP(void);
rolf.meyer@arm.com 11:1c1ebd0324fa 352
rolf.meyer@arm.com 11:1c1ebd0324fa 353 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 354 * @brief Set the Process Stack Pointer
rolf.meyer@arm.com 11:1c1ebd0324fa 355 *
rolf.meyer@arm.com 11:1c1ebd0324fa 356 * @param uint32_t Process Stack Pointer
rolf.meyer@arm.com 11:1c1ebd0324fa 357 * @return none
rolf.meyer@arm.com 11:1c1ebd0324fa 358 *
rolf.meyer@arm.com 11:1c1ebd0324fa 359 * Assign the value ProcessStackPointer to the MSP
rolf.meyer@arm.com 11:1c1ebd0324fa 360 * (process stack pointer) Cortex processor register
rolf.meyer@arm.com 11:1c1ebd0324fa 361 */
rolf.meyer@arm.com 11:1c1ebd0324fa 362 extern void __set_PSP(uint32_t topOfProcStack);
rolf.meyer@arm.com 11:1c1ebd0324fa 363
rolf.meyer@arm.com 11:1c1ebd0324fa 364 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 365 * @brief Return the Main Stack Pointer
rolf.meyer@arm.com 11:1c1ebd0324fa 366 *
rolf.meyer@arm.com 11:1c1ebd0324fa 367 * @param none
rolf.meyer@arm.com 11:1c1ebd0324fa 368 * @return uint32_t Main Stack Pointer
rolf.meyer@arm.com 11:1c1ebd0324fa 369 *
rolf.meyer@arm.com 11:1c1ebd0324fa 370 * Return the current value of the MSP (main stack pointer)
rolf.meyer@arm.com 11:1c1ebd0324fa 371 * Cortex processor register
rolf.meyer@arm.com 11:1c1ebd0324fa 372 */
rolf.meyer@arm.com 11:1c1ebd0324fa 373 extern uint32_t __get_MSP(void);
rolf.meyer@arm.com 11:1c1ebd0324fa 374
rolf.meyer@arm.com 11:1c1ebd0324fa 375 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 376 * @brief Set the Main Stack Pointer
rolf.meyer@arm.com 11:1c1ebd0324fa 377 *
rolf.meyer@arm.com 11:1c1ebd0324fa 378 * @param uint32_t Main Stack Pointer
rolf.meyer@arm.com 11:1c1ebd0324fa 379 * @return none
rolf.meyer@arm.com 11:1c1ebd0324fa 380 *
rolf.meyer@arm.com 11:1c1ebd0324fa 381 * Assign the value mainStackPointer to the MSP
rolf.meyer@arm.com 11:1c1ebd0324fa 382 * (main stack pointer) Cortex processor register
rolf.meyer@arm.com 11:1c1ebd0324fa 383 */
rolf.meyer@arm.com 11:1c1ebd0324fa 384 extern void __set_MSP(uint32_t topOfMainStack);
rolf.meyer@arm.com 11:1c1ebd0324fa 385
rolf.meyer@arm.com 11:1c1ebd0324fa 386 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 387 * @brief Reverse byte order in unsigned short value
rolf.meyer@arm.com 11:1c1ebd0324fa 388 *
rolf.meyer@arm.com 11:1c1ebd0324fa 389 * @param uint16_t value to reverse
rolf.meyer@arm.com 11:1c1ebd0324fa 390 * @return uint32_t reversed value
rolf.meyer@arm.com 11:1c1ebd0324fa 391 *
rolf.meyer@arm.com 11:1c1ebd0324fa 392 * Reverse byte order in unsigned short value
rolf.meyer@arm.com 11:1c1ebd0324fa 393 */
rolf.meyer@arm.com 11:1c1ebd0324fa 394 extern uint32_t __REV16(uint16_t value);
rolf.meyer@arm.com 11:1c1ebd0324fa 395
rolf.meyer@arm.com 11:1c1ebd0324fa 396 /*
rolf.meyer@arm.com 11:1c1ebd0324fa 397 * @brief Reverse byte order in signed short value with sign extension to integer
rolf.meyer@arm.com 11:1c1ebd0324fa 398 *
rolf.meyer@arm.com 11:1c1ebd0324fa 399 * @param int16_t value to reverse
rolf.meyer@arm.com 11:1c1ebd0324fa 400 * @return int32_t reversed value
rolf.meyer@arm.com 11:1c1ebd0324fa 401 *
rolf.meyer@arm.com 11:1c1ebd0324fa 402 * Reverse byte order in signed short value with sign extension to integer
rolf.meyer@arm.com 11:1c1ebd0324fa 403 */
rolf.meyer@arm.com 11:1c1ebd0324fa 404 extern int32_t __REVSH(int16_t value);
rolf.meyer@arm.com 11:1c1ebd0324fa 405
rolf.meyer@arm.com 11:1c1ebd0324fa 406
rolf.meyer@arm.com 11:1c1ebd0324fa 407 #if (__ARMCC_VERSION < 400000)
rolf.meyer@arm.com 11:1c1ebd0324fa 408
rolf.meyer@arm.com 11:1c1ebd0324fa 409 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 410 * @brief Remove the exclusive lock created by ldrex
rolf.meyer@arm.com 11:1c1ebd0324fa 411 *
rolf.meyer@arm.com 11:1c1ebd0324fa 412 * @param none
rolf.meyer@arm.com 11:1c1ebd0324fa 413 * @return none
rolf.meyer@arm.com 11:1c1ebd0324fa 414 *
rolf.meyer@arm.com 11:1c1ebd0324fa 415 * Removes the exclusive lock which is created by ldrex.
rolf.meyer@arm.com 11:1c1ebd0324fa 416 */
rolf.meyer@arm.com 11:1c1ebd0324fa 417 extern void __CLREX(void);
rolf.meyer@arm.com 11:1c1ebd0324fa 418
rolf.meyer@arm.com 11:1c1ebd0324fa 419 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 420 * @brief Return the Base Priority value
rolf.meyer@arm.com 11:1c1ebd0324fa 421 *
rolf.meyer@arm.com 11:1c1ebd0324fa 422 * @param none
rolf.meyer@arm.com 11:1c1ebd0324fa 423 * @return uint32_t BasePriority
rolf.meyer@arm.com 11:1c1ebd0324fa 424 *
rolf.meyer@arm.com 11:1c1ebd0324fa 425 * Return the content of the base priority register
rolf.meyer@arm.com 11:1c1ebd0324fa 426 */
rolf.meyer@arm.com 11:1c1ebd0324fa 427 extern uint32_t __get_BASEPRI(void);
rolf.meyer@arm.com 11:1c1ebd0324fa 428
rolf.meyer@arm.com 11:1c1ebd0324fa 429 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 430 * @brief Set the Base Priority value
rolf.meyer@arm.com 11:1c1ebd0324fa 431 *
rolf.meyer@arm.com 11:1c1ebd0324fa 432 * @param uint32_t BasePriority
rolf.meyer@arm.com 11:1c1ebd0324fa 433 * @return none
rolf.meyer@arm.com 11:1c1ebd0324fa 434 *
rolf.meyer@arm.com 11:1c1ebd0324fa 435 * Set the base priority register
rolf.meyer@arm.com 11:1c1ebd0324fa 436 */
rolf.meyer@arm.com 11:1c1ebd0324fa 437 extern void __set_BASEPRI(uint32_t basePri);
rolf.meyer@arm.com 11:1c1ebd0324fa 438
rolf.meyer@arm.com 11:1c1ebd0324fa 439 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 440 * @brief Return the Priority Mask value
rolf.meyer@arm.com 11:1c1ebd0324fa 441 *
rolf.meyer@arm.com 11:1c1ebd0324fa 442 * @param none
rolf.meyer@arm.com 11:1c1ebd0324fa 443 * @return uint32_t PriMask
rolf.meyer@arm.com 11:1c1ebd0324fa 444 *
rolf.meyer@arm.com 11:1c1ebd0324fa 445 * Return the state of the priority mask bit from the priority mask
rolf.meyer@arm.com 11:1c1ebd0324fa 446 * register
rolf.meyer@arm.com 11:1c1ebd0324fa 447 */
rolf.meyer@arm.com 11:1c1ebd0324fa 448 extern uint32_t __get_PRIMASK(void);
rolf.meyer@arm.com 11:1c1ebd0324fa 449
rolf.meyer@arm.com 11:1c1ebd0324fa 450 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 451 * @brief Set the Priority Mask value
rolf.meyer@arm.com 11:1c1ebd0324fa 452 *
rolf.meyer@arm.com 11:1c1ebd0324fa 453 * @param uint32_t PriMask
rolf.meyer@arm.com 11:1c1ebd0324fa 454 * @return none
rolf.meyer@arm.com 11:1c1ebd0324fa 455 *
rolf.meyer@arm.com 11:1c1ebd0324fa 456 * Set the priority mask bit in the priority mask register
rolf.meyer@arm.com 11:1c1ebd0324fa 457 */
rolf.meyer@arm.com 11:1c1ebd0324fa 458 extern void __set_PRIMASK(uint32_t priMask);
rolf.meyer@arm.com 11:1c1ebd0324fa 459
rolf.meyer@arm.com 11:1c1ebd0324fa 460 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 461 * @brief Return the Fault Mask value
rolf.meyer@arm.com 11:1c1ebd0324fa 462 *
rolf.meyer@arm.com 11:1c1ebd0324fa 463 * @param none
rolf.meyer@arm.com 11:1c1ebd0324fa 464 * @return uint32_t FaultMask
rolf.meyer@arm.com 11:1c1ebd0324fa 465 *
rolf.meyer@arm.com 11:1c1ebd0324fa 466 * Return the content of the fault mask register
rolf.meyer@arm.com 11:1c1ebd0324fa 467 */
rolf.meyer@arm.com 11:1c1ebd0324fa 468 extern uint32_t __get_FAULTMASK(void);
rolf.meyer@arm.com 11:1c1ebd0324fa 469
rolf.meyer@arm.com 11:1c1ebd0324fa 470 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 471 * @brief Set the Fault Mask value
rolf.meyer@arm.com 11:1c1ebd0324fa 472 *
rolf.meyer@arm.com 11:1c1ebd0324fa 473 * @param uint32_t faultMask value
rolf.meyer@arm.com 11:1c1ebd0324fa 474 * @return none
rolf.meyer@arm.com 11:1c1ebd0324fa 475 *
rolf.meyer@arm.com 11:1c1ebd0324fa 476 * Set the fault mask register
rolf.meyer@arm.com 11:1c1ebd0324fa 477 */
rolf.meyer@arm.com 11:1c1ebd0324fa 478 extern void __set_FAULTMASK(uint32_t faultMask);
rolf.meyer@arm.com 11:1c1ebd0324fa 479
rolf.meyer@arm.com 11:1c1ebd0324fa 480 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 481 * @brief Return the Control Register value
rolf.meyer@arm.com 11:1c1ebd0324fa 482 *
rolf.meyer@arm.com 11:1c1ebd0324fa 483 * @param none
rolf.meyer@arm.com 11:1c1ebd0324fa 484 * @return uint32_t Control value
rolf.meyer@arm.com 11:1c1ebd0324fa 485 *
rolf.meyer@arm.com 11:1c1ebd0324fa 486 * Return the content of the control register
rolf.meyer@arm.com 11:1c1ebd0324fa 487 */
rolf.meyer@arm.com 11:1c1ebd0324fa 488 extern uint32_t __get_CONTROL(void);
rolf.meyer@arm.com 11:1c1ebd0324fa 489
rolf.meyer@arm.com 11:1c1ebd0324fa 490 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 491 * @brief Set the Control Register value
rolf.meyer@arm.com 11:1c1ebd0324fa 492 *
rolf.meyer@arm.com 11:1c1ebd0324fa 493 * @param uint32_t Control value
rolf.meyer@arm.com 11:1c1ebd0324fa 494 * @return none
rolf.meyer@arm.com 11:1c1ebd0324fa 495 *
rolf.meyer@arm.com 11:1c1ebd0324fa 496 * Set the control register
rolf.meyer@arm.com 11:1c1ebd0324fa 497 */
rolf.meyer@arm.com 11:1c1ebd0324fa 498 extern void __set_CONTROL(uint32_t control);
rolf.meyer@arm.com 11:1c1ebd0324fa 499
rolf.meyer@arm.com 11:1c1ebd0324fa 500 #else /* (__ARMCC_VERSION >= 400000) */
rolf.meyer@arm.com 11:1c1ebd0324fa 501
rolf.meyer@arm.com 11:1c1ebd0324fa 502
rolf.meyer@arm.com 11:1c1ebd0324fa 503 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 504 * @brief Remove the exclusive lock created by ldrex
rolf.meyer@arm.com 11:1c1ebd0324fa 505 *
rolf.meyer@arm.com 11:1c1ebd0324fa 506 * @param none
rolf.meyer@arm.com 11:1c1ebd0324fa 507 * @return none
rolf.meyer@arm.com 11:1c1ebd0324fa 508 *
rolf.meyer@arm.com 11:1c1ebd0324fa 509 * Removes the exclusive lock which is created by ldrex.
rolf.meyer@arm.com 11:1c1ebd0324fa 510 */
rolf.meyer@arm.com 11:1c1ebd0324fa 511 #define __CLREX __clrex
rolf.meyer@arm.com 11:1c1ebd0324fa 512
rolf.meyer@arm.com 11:1c1ebd0324fa 513 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 514 * @brief Return the Base Priority value
rolf.meyer@arm.com 11:1c1ebd0324fa 515 *
rolf.meyer@arm.com 11:1c1ebd0324fa 516 * @param none
rolf.meyer@arm.com 11:1c1ebd0324fa 517 * @return uint32_t BasePriority
rolf.meyer@arm.com 11:1c1ebd0324fa 518 *
rolf.meyer@arm.com 11:1c1ebd0324fa 519 * Return the content of the base priority register
rolf.meyer@arm.com 11:1c1ebd0324fa 520 */
rolf.meyer@arm.com 11:1c1ebd0324fa 521 static __INLINE uint32_t __get_BASEPRI(void)
rolf.meyer@arm.com 11:1c1ebd0324fa 522 {
rolf.meyer@arm.com 11:1c1ebd0324fa 523 register uint32_t __regBasePri __ASM("basepri");
rolf.meyer@arm.com 11:1c1ebd0324fa 524 return(__regBasePri);
rolf.meyer@arm.com 11:1c1ebd0324fa 525 }
rolf.meyer@arm.com 11:1c1ebd0324fa 526
rolf.meyer@arm.com 11:1c1ebd0324fa 527 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 528 * @brief Set the Base Priority value
rolf.meyer@arm.com 11:1c1ebd0324fa 529 *
rolf.meyer@arm.com 11:1c1ebd0324fa 530 * @param uint32_t BasePriority
rolf.meyer@arm.com 11:1c1ebd0324fa 531 * @return none
rolf.meyer@arm.com 11:1c1ebd0324fa 532 *
rolf.meyer@arm.com 11:1c1ebd0324fa 533 * Set the base priority register
rolf.meyer@arm.com 11:1c1ebd0324fa 534 */
rolf.meyer@arm.com 11:1c1ebd0324fa 535 static __INLINE void __set_BASEPRI(uint32_t basePri)
rolf.meyer@arm.com 11:1c1ebd0324fa 536 {
rolf.meyer@arm.com 11:1c1ebd0324fa 537 register uint32_t __regBasePri __ASM("basepri");
rolf.meyer@arm.com 11:1c1ebd0324fa 538 __regBasePri = (basePri & 0xff);
rolf.meyer@arm.com 11:1c1ebd0324fa 539 }
rolf.meyer@arm.com 11:1c1ebd0324fa 540
rolf.meyer@arm.com 11:1c1ebd0324fa 541 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 542 * @brief Return the Priority Mask value
rolf.meyer@arm.com 11:1c1ebd0324fa 543 *
rolf.meyer@arm.com 11:1c1ebd0324fa 544 * @param none
rolf.meyer@arm.com 11:1c1ebd0324fa 545 * @return uint32_t PriMask
rolf.meyer@arm.com 11:1c1ebd0324fa 546 *
rolf.meyer@arm.com 11:1c1ebd0324fa 547 * Return the state of the priority mask bit from the priority mask
rolf.meyer@arm.com 11:1c1ebd0324fa 548 * register
rolf.meyer@arm.com 11:1c1ebd0324fa 549 */
rolf.meyer@arm.com 11:1c1ebd0324fa 550 static __INLINE uint32_t __get_PRIMASK(void)
rolf.meyer@arm.com 11:1c1ebd0324fa 551 {
rolf.meyer@arm.com 11:1c1ebd0324fa 552 register uint32_t __regPriMask __ASM("primask");
rolf.meyer@arm.com 11:1c1ebd0324fa 553 return(__regPriMask);
rolf.meyer@arm.com 11:1c1ebd0324fa 554 }
rolf.meyer@arm.com 11:1c1ebd0324fa 555
rolf.meyer@arm.com 11:1c1ebd0324fa 556 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 557 * @brief Set the Priority Mask value
rolf.meyer@arm.com 11:1c1ebd0324fa 558 *
rolf.meyer@arm.com 11:1c1ebd0324fa 559 * @param uint32_t PriMask
rolf.meyer@arm.com 11:1c1ebd0324fa 560 * @return none
rolf.meyer@arm.com 11:1c1ebd0324fa 561 *
rolf.meyer@arm.com 11:1c1ebd0324fa 562 * Set the priority mask bit in the priority mask register
rolf.meyer@arm.com 11:1c1ebd0324fa 563 */
rolf.meyer@arm.com 11:1c1ebd0324fa 564 static __INLINE void __set_PRIMASK(uint32_t priMask)
rolf.meyer@arm.com 11:1c1ebd0324fa 565 {
rolf.meyer@arm.com 11:1c1ebd0324fa 566 register uint32_t __regPriMask __ASM("primask");
rolf.meyer@arm.com 11:1c1ebd0324fa 567 __regPriMask = (priMask);
rolf.meyer@arm.com 11:1c1ebd0324fa 568 }
rolf.meyer@arm.com 11:1c1ebd0324fa 569
rolf.meyer@arm.com 11:1c1ebd0324fa 570 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 571 * @brief Return the Fault Mask value
rolf.meyer@arm.com 11:1c1ebd0324fa 572 *
rolf.meyer@arm.com 11:1c1ebd0324fa 573 * @param none
rolf.meyer@arm.com 11:1c1ebd0324fa 574 * @return uint32_t FaultMask
rolf.meyer@arm.com 11:1c1ebd0324fa 575 *
rolf.meyer@arm.com 11:1c1ebd0324fa 576 * Return the content of the fault mask register
rolf.meyer@arm.com 11:1c1ebd0324fa 577 */
rolf.meyer@arm.com 11:1c1ebd0324fa 578 static __INLINE uint32_t __get_FAULTMASK(void)
rolf.meyer@arm.com 11:1c1ebd0324fa 579 {
rolf.meyer@arm.com 11:1c1ebd0324fa 580 register uint32_t __regFaultMask __ASM("faultmask");
rolf.meyer@arm.com 11:1c1ebd0324fa 581 return(__regFaultMask);
rolf.meyer@arm.com 11:1c1ebd0324fa 582 }
rolf.meyer@arm.com 11:1c1ebd0324fa 583
rolf.meyer@arm.com 11:1c1ebd0324fa 584 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 585 * @brief Set the Fault Mask value
rolf.meyer@arm.com 11:1c1ebd0324fa 586 *
rolf.meyer@arm.com 11:1c1ebd0324fa 587 * @param uint32_t faultMask value
rolf.meyer@arm.com 11:1c1ebd0324fa 588 * @return none
rolf.meyer@arm.com 11:1c1ebd0324fa 589 *
rolf.meyer@arm.com 11:1c1ebd0324fa 590 * Set the fault mask register
rolf.meyer@arm.com 11:1c1ebd0324fa 591 */
rolf.meyer@arm.com 11:1c1ebd0324fa 592 static __INLINE void __set_FAULTMASK(uint32_t faultMask)
rolf.meyer@arm.com 11:1c1ebd0324fa 593 {
rolf.meyer@arm.com 11:1c1ebd0324fa 594 register uint32_t __regFaultMask __ASM("faultmask");
rolf.meyer@arm.com 11:1c1ebd0324fa 595 __regFaultMask = (faultMask & 1);
rolf.meyer@arm.com 11:1c1ebd0324fa 596 }
rolf.meyer@arm.com 11:1c1ebd0324fa 597
rolf.meyer@arm.com 11:1c1ebd0324fa 598 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 599 * @brief Return the Control Register value
rolf.meyer@arm.com 11:1c1ebd0324fa 600 *
rolf.meyer@arm.com 11:1c1ebd0324fa 601 * @param none
rolf.meyer@arm.com 11:1c1ebd0324fa 602 * @return uint32_t Control value
rolf.meyer@arm.com 11:1c1ebd0324fa 603 *
rolf.meyer@arm.com 11:1c1ebd0324fa 604 * Return the content of the control register
rolf.meyer@arm.com 11:1c1ebd0324fa 605 */
rolf.meyer@arm.com 11:1c1ebd0324fa 606 static __INLINE uint32_t __get_CONTROL(void)
rolf.meyer@arm.com 11:1c1ebd0324fa 607 {
rolf.meyer@arm.com 11:1c1ebd0324fa 608 register uint32_t __regControl __ASM("control");
rolf.meyer@arm.com 11:1c1ebd0324fa 609 return(__regControl);
rolf.meyer@arm.com 11:1c1ebd0324fa 610 }
rolf.meyer@arm.com 11:1c1ebd0324fa 611
rolf.meyer@arm.com 11:1c1ebd0324fa 612 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 613 * @brief Set the Control Register value
rolf.meyer@arm.com 11:1c1ebd0324fa 614 *
rolf.meyer@arm.com 11:1c1ebd0324fa 615 * @param uint32_t Control value
rolf.meyer@arm.com 11:1c1ebd0324fa 616 * @return none
rolf.meyer@arm.com 11:1c1ebd0324fa 617 *
rolf.meyer@arm.com 11:1c1ebd0324fa 618 * Set the control register
rolf.meyer@arm.com 11:1c1ebd0324fa 619 */
rolf.meyer@arm.com 11:1c1ebd0324fa 620 static __INLINE void __set_CONTROL(uint32_t control)
rolf.meyer@arm.com 11:1c1ebd0324fa 621 {
rolf.meyer@arm.com 11:1c1ebd0324fa 622 register uint32_t __regControl __ASM("control");
rolf.meyer@arm.com 11:1c1ebd0324fa 623 __regControl = control;
rolf.meyer@arm.com 11:1c1ebd0324fa 624 }
rolf.meyer@arm.com 11:1c1ebd0324fa 625
rolf.meyer@arm.com 11:1c1ebd0324fa 626 #endif /* __ARMCC_VERSION */
rolf.meyer@arm.com 11:1c1ebd0324fa 627
rolf.meyer@arm.com 11:1c1ebd0324fa 628
rolf.meyer@arm.com 11:1c1ebd0324fa 629
rolf.meyer@arm.com 11:1c1ebd0324fa 630 #elif (defined (__ICCARM__)) /*------------------ ICC Compiler -------------------*/
rolf.meyer@arm.com 11:1c1ebd0324fa 631 /* IAR iccarm specific functions */
rolf.meyer@arm.com 11:1c1ebd0324fa 632
rolf.meyer@arm.com 11:1c1ebd0324fa 633 #define __enable_irq __enable_interrupt /*!< global Interrupt enable */
rolf.meyer@arm.com 11:1c1ebd0324fa 634 #define __disable_irq __disable_interrupt /*!< global Interrupt disable */
rolf.meyer@arm.com 11:1c1ebd0324fa 635
rolf.meyer@arm.com 11:1c1ebd0324fa 636 static __INLINE void __enable_fault_irq() { __ASM ("cpsie f"); }
rolf.meyer@arm.com 11:1c1ebd0324fa 637 static __INLINE void __disable_fault_irq() { __ASM ("cpsid f"); }
rolf.meyer@arm.com 11:1c1ebd0324fa 638
rolf.meyer@arm.com 11:1c1ebd0324fa 639 #define __NOP __no_operation() /*!< no operation intrinsic in IAR Compiler */
rolf.meyer@arm.com 11:1c1ebd0324fa 640 static __INLINE void __WFI() { __ASM ("wfi"); }
rolf.meyer@arm.com 11:1c1ebd0324fa 641 static __INLINE void __WFE() { __ASM ("wfe"); }
rolf.meyer@arm.com 11:1c1ebd0324fa 642 static __INLINE void __SEV() { __ASM ("sev"); }
rolf.meyer@arm.com 11:1c1ebd0324fa 643 static __INLINE void __CLREX() { __ASM ("clrex"); }
rolf.meyer@arm.com 11:1c1ebd0324fa 644
rolf.meyer@arm.com 11:1c1ebd0324fa 645 /* intrinsic void __ISB(void) */
rolf.meyer@arm.com 11:1c1ebd0324fa 646 /* intrinsic void __DSB(void) */
rolf.meyer@arm.com 11:1c1ebd0324fa 647 /* intrinsic void __DMB(void) */
rolf.meyer@arm.com 11:1c1ebd0324fa 648 /* intrinsic void __set_PRIMASK(); */
rolf.meyer@arm.com 11:1c1ebd0324fa 649 /* intrinsic void __get_PRIMASK(); */
rolf.meyer@arm.com 11:1c1ebd0324fa 650 /* intrinsic void __set_FAULTMASK(); */
rolf.meyer@arm.com 11:1c1ebd0324fa 651 /* intrinsic void __get_FAULTMASK(); */
rolf.meyer@arm.com 11:1c1ebd0324fa 652 /* intrinsic uint32_t __REV(uint32_t value); */
rolf.meyer@arm.com 11:1c1ebd0324fa 653 /* intrinsic uint32_t __REVSH(uint32_t value); */
rolf.meyer@arm.com 11:1c1ebd0324fa 654 /* intrinsic unsigned long __STREX(unsigned long, unsigned long); */
rolf.meyer@arm.com 11:1c1ebd0324fa 655 /* intrinsic unsigned long __LDREX(unsigned long *); */
rolf.meyer@arm.com 11:1c1ebd0324fa 656
rolf.meyer@arm.com 11:1c1ebd0324fa 657
rolf.meyer@arm.com 11:1c1ebd0324fa 658 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 659 * @brief Return the Process Stack Pointer
rolf.meyer@arm.com 11:1c1ebd0324fa 660 *
rolf.meyer@arm.com 11:1c1ebd0324fa 661 * @param none
rolf.meyer@arm.com 11:1c1ebd0324fa 662 * @return uint32_t ProcessStackPointer
rolf.meyer@arm.com 11:1c1ebd0324fa 663 *
rolf.meyer@arm.com 11:1c1ebd0324fa 664 * Return the actual process stack pointer
rolf.meyer@arm.com 11:1c1ebd0324fa 665 */
rolf.meyer@arm.com 11:1c1ebd0324fa 666 extern uint32_t __get_PSP(void);
rolf.meyer@arm.com 11:1c1ebd0324fa 667
rolf.meyer@arm.com 11:1c1ebd0324fa 668 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 669 * @brief Set the Process Stack Pointer
rolf.meyer@arm.com 11:1c1ebd0324fa 670 *
rolf.meyer@arm.com 11:1c1ebd0324fa 671 * @param uint32_t Process Stack Pointer
rolf.meyer@arm.com 11:1c1ebd0324fa 672 * @return none
rolf.meyer@arm.com 11:1c1ebd0324fa 673 *
rolf.meyer@arm.com 11:1c1ebd0324fa 674 * Assign the value ProcessStackPointer to the MSP
rolf.meyer@arm.com 11:1c1ebd0324fa 675 * (process stack pointer) Cortex processor register
rolf.meyer@arm.com 11:1c1ebd0324fa 676 */
rolf.meyer@arm.com 11:1c1ebd0324fa 677 extern void __set_PSP(uint32_t topOfProcStack);
rolf.meyer@arm.com 11:1c1ebd0324fa 678
rolf.meyer@arm.com 11:1c1ebd0324fa 679 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 680 * @brief Return the Main Stack Pointer
rolf.meyer@arm.com 11:1c1ebd0324fa 681 *
rolf.meyer@arm.com 11:1c1ebd0324fa 682 * @param none
rolf.meyer@arm.com 11:1c1ebd0324fa 683 * @return uint32_t Main Stack Pointer
rolf.meyer@arm.com 11:1c1ebd0324fa 684 *
rolf.meyer@arm.com 11:1c1ebd0324fa 685 * Return the current value of the MSP (main stack pointer)
rolf.meyer@arm.com 11:1c1ebd0324fa 686 * Cortex processor register
rolf.meyer@arm.com 11:1c1ebd0324fa 687 */
rolf.meyer@arm.com 11:1c1ebd0324fa 688 extern uint32_t __get_MSP(void);
rolf.meyer@arm.com 11:1c1ebd0324fa 689
rolf.meyer@arm.com 11:1c1ebd0324fa 690 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 691 * @brief Set the Main Stack Pointer
rolf.meyer@arm.com 11:1c1ebd0324fa 692 *
rolf.meyer@arm.com 11:1c1ebd0324fa 693 * @param uint32_t Main Stack Pointer
rolf.meyer@arm.com 11:1c1ebd0324fa 694 * @return none
rolf.meyer@arm.com 11:1c1ebd0324fa 695 *
rolf.meyer@arm.com 11:1c1ebd0324fa 696 * Assign the value mainStackPointer to the MSP
rolf.meyer@arm.com 11:1c1ebd0324fa 697 * (main stack pointer) Cortex processor register
rolf.meyer@arm.com 11:1c1ebd0324fa 698 */
rolf.meyer@arm.com 11:1c1ebd0324fa 699 extern void __set_MSP(uint32_t topOfMainStack);
rolf.meyer@arm.com 11:1c1ebd0324fa 700
rolf.meyer@arm.com 11:1c1ebd0324fa 701 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 702 * @brief Reverse byte order in unsigned short value
rolf.meyer@arm.com 11:1c1ebd0324fa 703 *
rolf.meyer@arm.com 11:1c1ebd0324fa 704 * @param uint16_t value to reverse
rolf.meyer@arm.com 11:1c1ebd0324fa 705 * @return uint32_t reversed value
rolf.meyer@arm.com 11:1c1ebd0324fa 706 *
rolf.meyer@arm.com 11:1c1ebd0324fa 707 * Reverse byte order in unsigned short value
rolf.meyer@arm.com 11:1c1ebd0324fa 708 */
rolf.meyer@arm.com 11:1c1ebd0324fa 709 extern uint32_t __REV16(uint16_t value);
rolf.meyer@arm.com 11:1c1ebd0324fa 710
rolf.meyer@arm.com 11:1c1ebd0324fa 711 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 712 * @brief Reverse bit order of value
rolf.meyer@arm.com 11:1c1ebd0324fa 713 *
rolf.meyer@arm.com 11:1c1ebd0324fa 714 * @param uint32_t value to reverse
rolf.meyer@arm.com 11:1c1ebd0324fa 715 * @return uint32_t reversed value
rolf.meyer@arm.com 11:1c1ebd0324fa 716 *
rolf.meyer@arm.com 11:1c1ebd0324fa 717 * Reverse bit order of value
rolf.meyer@arm.com 11:1c1ebd0324fa 718 */
rolf.meyer@arm.com 11:1c1ebd0324fa 719 extern uint32_t __RBIT(uint32_t value);
rolf.meyer@arm.com 11:1c1ebd0324fa 720
rolf.meyer@arm.com 11:1c1ebd0324fa 721 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 722 * @brief LDR Exclusive
rolf.meyer@arm.com 11:1c1ebd0324fa 723 *
rolf.meyer@arm.com 11:1c1ebd0324fa 724 * @param uint8_t* address
rolf.meyer@arm.com 11:1c1ebd0324fa 725 * @return uint8_t value of (*address)
rolf.meyer@arm.com 11:1c1ebd0324fa 726 *
rolf.meyer@arm.com 11:1c1ebd0324fa 727 * Exclusive LDR command
rolf.meyer@arm.com 11:1c1ebd0324fa 728 */
rolf.meyer@arm.com 11:1c1ebd0324fa 729 extern uint8_t __LDREXB(uint8_t *addr);
rolf.meyer@arm.com 11:1c1ebd0324fa 730
rolf.meyer@arm.com 11:1c1ebd0324fa 731 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 732 * @brief LDR Exclusive
rolf.meyer@arm.com 11:1c1ebd0324fa 733 *
rolf.meyer@arm.com 11:1c1ebd0324fa 734 * @param uint16_t* address
rolf.meyer@arm.com 11:1c1ebd0324fa 735 * @return uint16_t value of (*address)
rolf.meyer@arm.com 11:1c1ebd0324fa 736 *
rolf.meyer@arm.com 11:1c1ebd0324fa 737 * Exclusive LDR command
rolf.meyer@arm.com 11:1c1ebd0324fa 738 */
rolf.meyer@arm.com 11:1c1ebd0324fa 739 extern uint16_t __LDREXH(uint16_t *addr);
rolf.meyer@arm.com 11:1c1ebd0324fa 740
rolf.meyer@arm.com 11:1c1ebd0324fa 741 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 742 * @brief LDR Exclusive
rolf.meyer@arm.com 11:1c1ebd0324fa 743 *
rolf.meyer@arm.com 11:1c1ebd0324fa 744 * @param uint32_t* address
rolf.meyer@arm.com 11:1c1ebd0324fa 745 * @return uint32_t value of (*address)
rolf.meyer@arm.com 11:1c1ebd0324fa 746 *
rolf.meyer@arm.com 11:1c1ebd0324fa 747 * Exclusive LDR command
rolf.meyer@arm.com 11:1c1ebd0324fa 748 */
rolf.meyer@arm.com 11:1c1ebd0324fa 749 extern uint32_t __LDREXW(uint32_t *addr);
rolf.meyer@arm.com 11:1c1ebd0324fa 750
rolf.meyer@arm.com 11:1c1ebd0324fa 751 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 752 * @brief STR Exclusive
rolf.meyer@arm.com 11:1c1ebd0324fa 753 *
rolf.meyer@arm.com 11:1c1ebd0324fa 754 * @param uint8_t *address
rolf.meyer@arm.com 11:1c1ebd0324fa 755 * @param uint8_t value to store
rolf.meyer@arm.com 11:1c1ebd0324fa 756 * @return uint32_t successful / failed
rolf.meyer@arm.com 11:1c1ebd0324fa 757 *
rolf.meyer@arm.com 11:1c1ebd0324fa 758 * Exclusive STR command
rolf.meyer@arm.com 11:1c1ebd0324fa 759 */
rolf.meyer@arm.com 11:1c1ebd0324fa 760 extern uint32_t __STREXB(uint8_t value, uint8_t *addr);
rolf.meyer@arm.com 11:1c1ebd0324fa 761
rolf.meyer@arm.com 11:1c1ebd0324fa 762 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 763 * @brief STR Exclusive
rolf.meyer@arm.com 11:1c1ebd0324fa 764 *
rolf.meyer@arm.com 11:1c1ebd0324fa 765 * @param uint16_t *address
rolf.meyer@arm.com 11:1c1ebd0324fa 766 * @param uint16_t value to store
rolf.meyer@arm.com 11:1c1ebd0324fa 767 * @return uint32_t successful / failed
rolf.meyer@arm.com 11:1c1ebd0324fa 768 *
rolf.meyer@arm.com 11:1c1ebd0324fa 769 * Exclusive STR command
rolf.meyer@arm.com 11:1c1ebd0324fa 770 */
rolf.meyer@arm.com 11:1c1ebd0324fa 771 extern uint32_t __STREXH(uint16_t value, uint16_t *addr);
rolf.meyer@arm.com 11:1c1ebd0324fa 772
rolf.meyer@arm.com 11:1c1ebd0324fa 773 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 774 * @brief STR Exclusive
rolf.meyer@arm.com 11:1c1ebd0324fa 775 *
rolf.meyer@arm.com 11:1c1ebd0324fa 776 * @param uint32_t *address
rolf.meyer@arm.com 11:1c1ebd0324fa 777 * @param uint32_t value to store
rolf.meyer@arm.com 11:1c1ebd0324fa 778 * @return uint32_t successful / failed
rolf.meyer@arm.com 11:1c1ebd0324fa 779 *
rolf.meyer@arm.com 11:1c1ebd0324fa 780 * Exclusive STR command
rolf.meyer@arm.com 11:1c1ebd0324fa 781 */
rolf.meyer@arm.com 11:1c1ebd0324fa 782 extern uint32_t __STREXW(uint32_t value, uint32_t *addr);
rolf.meyer@arm.com 11:1c1ebd0324fa 783
rolf.meyer@arm.com 11:1c1ebd0324fa 784
rolf.meyer@arm.com 11:1c1ebd0324fa 785
rolf.meyer@arm.com 11:1c1ebd0324fa 786 #elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/
rolf.meyer@arm.com 11:1c1ebd0324fa 787 /* GNU gcc specific functions */
rolf.meyer@arm.com 11:1c1ebd0324fa 788
rolf.meyer@arm.com 11:1c1ebd0324fa 789 static __INLINE void __enable_irq() { __ASM volatile ("cpsie i"); }
rolf.meyer@arm.com 11:1c1ebd0324fa 790 static __INLINE void __disable_irq() { __ASM volatile ("cpsid i"); }
rolf.meyer@arm.com 11:1c1ebd0324fa 791
rolf.meyer@arm.com 11:1c1ebd0324fa 792 static __INLINE void __enable_fault_irq() { __ASM volatile ("cpsie f"); }
rolf.meyer@arm.com 11:1c1ebd0324fa 793 static __INLINE void __disable_fault_irq() { __ASM volatile ("cpsid f"); }
rolf.meyer@arm.com 11:1c1ebd0324fa 794
rolf.meyer@arm.com 11:1c1ebd0324fa 795 static __INLINE void __NOP() { __ASM volatile ("nop"); }
rolf.meyer@arm.com 11:1c1ebd0324fa 796 static __INLINE void __WFI() { __ASM volatile ("wfi"); }
rolf.meyer@arm.com 11:1c1ebd0324fa 797 static __INLINE void __WFE() { __ASM volatile ("wfe"); }
rolf.meyer@arm.com 11:1c1ebd0324fa 798 static __INLINE void __SEV() { __ASM volatile ("sev"); }
rolf.meyer@arm.com 11:1c1ebd0324fa 799 static __INLINE void __ISB() { __ASM volatile ("isb"); }
rolf.meyer@arm.com 11:1c1ebd0324fa 800 static __INLINE void __DSB() { __ASM volatile ("dsb"); }
rolf.meyer@arm.com 11:1c1ebd0324fa 801 static __INLINE void __DMB() { __ASM volatile ("dmb"); }
rolf.meyer@arm.com 11:1c1ebd0324fa 802 static __INLINE void __CLREX() { __ASM volatile ("clrex"); }
rolf.meyer@arm.com 11:1c1ebd0324fa 803
rolf.meyer@arm.com 11:1c1ebd0324fa 804
rolf.meyer@arm.com 11:1c1ebd0324fa 805 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 806 * @brief Return the Process Stack Pointer
rolf.meyer@arm.com 11:1c1ebd0324fa 807 *
rolf.meyer@arm.com 11:1c1ebd0324fa 808 * @param none
rolf.meyer@arm.com 11:1c1ebd0324fa 809 * @return uint32_t ProcessStackPointer
rolf.meyer@arm.com 11:1c1ebd0324fa 810 *
rolf.meyer@arm.com 11:1c1ebd0324fa 811 * Return the actual process stack pointer
rolf.meyer@arm.com 11:1c1ebd0324fa 812 */
rolf.meyer@arm.com 11:1c1ebd0324fa 813 extern uint32_t __get_PSP(void);
rolf.meyer@arm.com 11:1c1ebd0324fa 814
rolf.meyer@arm.com 11:1c1ebd0324fa 815 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 816 * @brief Set the Process Stack Pointer
rolf.meyer@arm.com 11:1c1ebd0324fa 817 *
rolf.meyer@arm.com 11:1c1ebd0324fa 818 * @param uint32_t Process Stack Pointer
rolf.meyer@arm.com 11:1c1ebd0324fa 819 * @return none
rolf.meyer@arm.com 11:1c1ebd0324fa 820 *
rolf.meyer@arm.com 11:1c1ebd0324fa 821 * Assign the value ProcessStackPointer to the MSP
rolf.meyer@arm.com 11:1c1ebd0324fa 822 * (process stack pointer) Cortex processor register
rolf.meyer@arm.com 11:1c1ebd0324fa 823 */
rolf.meyer@arm.com 11:1c1ebd0324fa 824 extern void __set_PSP(uint32_t topOfProcStack);
rolf.meyer@arm.com 11:1c1ebd0324fa 825
rolf.meyer@arm.com 11:1c1ebd0324fa 826 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 827 * @brief Return the Main Stack Pointer
rolf.meyer@arm.com 11:1c1ebd0324fa 828 *
rolf.meyer@arm.com 11:1c1ebd0324fa 829 * @param none
rolf.meyer@arm.com 11:1c1ebd0324fa 830 * @return uint32_t Main Stack Pointer
rolf.meyer@arm.com 11:1c1ebd0324fa 831 *
rolf.meyer@arm.com 11:1c1ebd0324fa 832 * Return the current value of the MSP (main stack pointer)
rolf.meyer@arm.com 11:1c1ebd0324fa 833 * Cortex processor register
rolf.meyer@arm.com 11:1c1ebd0324fa 834 */
rolf.meyer@arm.com 11:1c1ebd0324fa 835 extern uint32_t __get_MSP(void);
rolf.meyer@arm.com 11:1c1ebd0324fa 836
rolf.meyer@arm.com 11:1c1ebd0324fa 837 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 838 * @brief Set the Main Stack Pointer
rolf.meyer@arm.com 11:1c1ebd0324fa 839 *
rolf.meyer@arm.com 11:1c1ebd0324fa 840 * @param uint32_t Main Stack Pointer
rolf.meyer@arm.com 11:1c1ebd0324fa 841 * @return none
rolf.meyer@arm.com 11:1c1ebd0324fa 842 *
rolf.meyer@arm.com 11:1c1ebd0324fa 843 * Assign the value mainStackPointer to the MSP
rolf.meyer@arm.com 11:1c1ebd0324fa 844 * (main stack pointer) Cortex processor register
rolf.meyer@arm.com 11:1c1ebd0324fa 845 */
rolf.meyer@arm.com 11:1c1ebd0324fa 846 extern void __set_MSP(uint32_t topOfMainStack);
rolf.meyer@arm.com 11:1c1ebd0324fa 847
rolf.meyer@arm.com 11:1c1ebd0324fa 848 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 849 * @brief Return the Base Priority value
rolf.meyer@arm.com 11:1c1ebd0324fa 850 *
rolf.meyer@arm.com 11:1c1ebd0324fa 851 * @param none
rolf.meyer@arm.com 11:1c1ebd0324fa 852 * @return uint32_t BasePriority
rolf.meyer@arm.com 11:1c1ebd0324fa 853 *
rolf.meyer@arm.com 11:1c1ebd0324fa 854 * Return the content of the base priority register
rolf.meyer@arm.com 11:1c1ebd0324fa 855 */
rolf.meyer@arm.com 11:1c1ebd0324fa 856 extern uint32_t __get_BASEPRI(void);
rolf.meyer@arm.com 11:1c1ebd0324fa 857
rolf.meyer@arm.com 11:1c1ebd0324fa 858 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 859 * @brief Set the Base Priority value
rolf.meyer@arm.com 11:1c1ebd0324fa 860 *
rolf.meyer@arm.com 11:1c1ebd0324fa 861 * @param uint32_t BasePriority
rolf.meyer@arm.com 11:1c1ebd0324fa 862 * @return none
rolf.meyer@arm.com 11:1c1ebd0324fa 863 *
rolf.meyer@arm.com 11:1c1ebd0324fa 864 * Set the base priority register
rolf.meyer@arm.com 11:1c1ebd0324fa 865 */
rolf.meyer@arm.com 11:1c1ebd0324fa 866 extern void __set_BASEPRI(uint32_t basePri);
rolf.meyer@arm.com 11:1c1ebd0324fa 867
rolf.meyer@arm.com 11:1c1ebd0324fa 868 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 869 * @brief Return the Priority Mask value
rolf.meyer@arm.com 11:1c1ebd0324fa 870 *
rolf.meyer@arm.com 11:1c1ebd0324fa 871 * @param none
rolf.meyer@arm.com 11:1c1ebd0324fa 872 * @return uint32_t PriMask
rolf.meyer@arm.com 11:1c1ebd0324fa 873 *
rolf.meyer@arm.com 11:1c1ebd0324fa 874 * Return the state of the priority mask bit from the priority mask
rolf.meyer@arm.com 11:1c1ebd0324fa 875 * register
rolf.meyer@arm.com 11:1c1ebd0324fa 876 */
rolf.meyer@arm.com 11:1c1ebd0324fa 877 extern uint32_t __get_PRIMASK(void);
rolf.meyer@arm.com 11:1c1ebd0324fa 878
rolf.meyer@arm.com 11:1c1ebd0324fa 879 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 880 * @brief Set the Priority Mask value
rolf.meyer@arm.com 11:1c1ebd0324fa 881 *
rolf.meyer@arm.com 11:1c1ebd0324fa 882 * @param uint32_t PriMask
rolf.meyer@arm.com 11:1c1ebd0324fa 883 * @return none
rolf.meyer@arm.com 11:1c1ebd0324fa 884 *
rolf.meyer@arm.com 11:1c1ebd0324fa 885 * Set the priority mask bit in the priority mask register
rolf.meyer@arm.com 11:1c1ebd0324fa 886 */
rolf.meyer@arm.com 11:1c1ebd0324fa 887 extern void __set_PRIMASK(uint32_t priMask);
rolf.meyer@arm.com 11:1c1ebd0324fa 888
rolf.meyer@arm.com 11:1c1ebd0324fa 889 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 890 * @brief Return the Fault Mask value
rolf.meyer@arm.com 11:1c1ebd0324fa 891 *
rolf.meyer@arm.com 11:1c1ebd0324fa 892 * @param none
rolf.meyer@arm.com 11:1c1ebd0324fa 893 * @return uint32_t FaultMask
rolf.meyer@arm.com 11:1c1ebd0324fa 894 *
rolf.meyer@arm.com 11:1c1ebd0324fa 895 * Return the content of the fault mask register
rolf.meyer@arm.com 11:1c1ebd0324fa 896 */
rolf.meyer@arm.com 11:1c1ebd0324fa 897 extern uint32_t __get_FAULTMASK(void);
rolf.meyer@arm.com 11:1c1ebd0324fa 898
rolf.meyer@arm.com 11:1c1ebd0324fa 899 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 900 * @brief Set the Fault Mask value
rolf.meyer@arm.com 11:1c1ebd0324fa 901 *
rolf.meyer@arm.com 11:1c1ebd0324fa 902 * @param uint32_t faultMask value
rolf.meyer@arm.com 11:1c1ebd0324fa 903 * @return none
rolf.meyer@arm.com 11:1c1ebd0324fa 904 *
rolf.meyer@arm.com 11:1c1ebd0324fa 905 * Set the fault mask register
rolf.meyer@arm.com 11:1c1ebd0324fa 906 */
rolf.meyer@arm.com 11:1c1ebd0324fa 907 extern void __set_FAULTMASK(uint32_t faultMask);
rolf.meyer@arm.com 11:1c1ebd0324fa 908
rolf.meyer@arm.com 11:1c1ebd0324fa 909 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 910 * @brief Return the Control Register value
rolf.meyer@arm.com 11:1c1ebd0324fa 911 *
rolf.meyer@arm.com 11:1c1ebd0324fa 912 * @param none
rolf.meyer@arm.com 11:1c1ebd0324fa 913 * @return uint32_t Control value
rolf.meyer@arm.com 11:1c1ebd0324fa 914 *
rolf.meyer@arm.com 11:1c1ebd0324fa 915 * Return the content of the control register
rolf.meyer@arm.com 11:1c1ebd0324fa 916 */
rolf.meyer@arm.com 11:1c1ebd0324fa 917 extern uint32_t __get_CONTROL(void);
rolf.meyer@arm.com 11:1c1ebd0324fa 918
rolf.meyer@arm.com 11:1c1ebd0324fa 919 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 920 * @brief Set the Control Register value
rolf.meyer@arm.com 11:1c1ebd0324fa 921 *
rolf.meyer@arm.com 11:1c1ebd0324fa 922 * @param uint32_t Control value
rolf.meyer@arm.com 11:1c1ebd0324fa 923 * @return none
rolf.meyer@arm.com 11:1c1ebd0324fa 924 *
rolf.meyer@arm.com 11:1c1ebd0324fa 925 * Set the control register
rolf.meyer@arm.com 11:1c1ebd0324fa 926 */
rolf.meyer@arm.com 11:1c1ebd0324fa 927 extern void __set_CONTROL(uint32_t control);
rolf.meyer@arm.com 11:1c1ebd0324fa 928
rolf.meyer@arm.com 11:1c1ebd0324fa 929 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 930 * @brief Reverse byte order in integer value
rolf.meyer@arm.com 11:1c1ebd0324fa 931 *
rolf.meyer@arm.com 11:1c1ebd0324fa 932 * @param uint32_t value to reverse
rolf.meyer@arm.com 11:1c1ebd0324fa 933 * @return uint32_t reversed value
rolf.meyer@arm.com 11:1c1ebd0324fa 934 *
rolf.meyer@arm.com 11:1c1ebd0324fa 935 * Reverse byte order in integer value
rolf.meyer@arm.com 11:1c1ebd0324fa 936 */
rolf.meyer@arm.com 11:1c1ebd0324fa 937 extern uint32_t __REV(uint32_t value);
rolf.meyer@arm.com 11:1c1ebd0324fa 938
rolf.meyer@arm.com 11:1c1ebd0324fa 939 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 940 * @brief Reverse byte order in unsigned short value
rolf.meyer@arm.com 11:1c1ebd0324fa 941 *
rolf.meyer@arm.com 11:1c1ebd0324fa 942 * @param uint16_t value to reverse
rolf.meyer@arm.com 11:1c1ebd0324fa 943 * @return uint32_t reversed value
rolf.meyer@arm.com 11:1c1ebd0324fa 944 *
rolf.meyer@arm.com 11:1c1ebd0324fa 945 * Reverse byte order in unsigned short value
rolf.meyer@arm.com 11:1c1ebd0324fa 946 */
rolf.meyer@arm.com 11:1c1ebd0324fa 947 extern uint32_t __REV16(uint16_t value);
rolf.meyer@arm.com 11:1c1ebd0324fa 948
rolf.meyer@arm.com 11:1c1ebd0324fa 949 /*
rolf.meyer@arm.com 11:1c1ebd0324fa 950 * Reverse byte order in signed short value with sign extension to integer
rolf.meyer@arm.com 11:1c1ebd0324fa 951 *
rolf.meyer@arm.com 11:1c1ebd0324fa 952 * @param int16_t value to reverse
rolf.meyer@arm.com 11:1c1ebd0324fa 953 * @return int32_t reversed value
rolf.meyer@arm.com 11:1c1ebd0324fa 954 *
rolf.meyer@arm.com 11:1c1ebd0324fa 955 * @brief Reverse byte order in signed short value with sign extension to integer
rolf.meyer@arm.com 11:1c1ebd0324fa 956 */
rolf.meyer@arm.com 11:1c1ebd0324fa 957 extern int32_t __REVSH(int16_t value);
rolf.meyer@arm.com 11:1c1ebd0324fa 958
rolf.meyer@arm.com 11:1c1ebd0324fa 959 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 960 * @brief Reverse bit order of value
rolf.meyer@arm.com 11:1c1ebd0324fa 961 *
rolf.meyer@arm.com 11:1c1ebd0324fa 962 * @param uint32_t value to reverse
rolf.meyer@arm.com 11:1c1ebd0324fa 963 * @return uint32_t reversed value
rolf.meyer@arm.com 11:1c1ebd0324fa 964 *
rolf.meyer@arm.com 11:1c1ebd0324fa 965 * Reverse bit order of value
rolf.meyer@arm.com 11:1c1ebd0324fa 966 */
rolf.meyer@arm.com 11:1c1ebd0324fa 967 extern uint32_t __RBIT(uint32_t value);
rolf.meyer@arm.com 11:1c1ebd0324fa 968
rolf.meyer@arm.com 11:1c1ebd0324fa 969 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 970 * @brief LDR Exclusive
rolf.meyer@arm.com 11:1c1ebd0324fa 971 *
rolf.meyer@arm.com 11:1c1ebd0324fa 972 * @param uint8_t* address
rolf.meyer@arm.com 11:1c1ebd0324fa 973 * @return uint8_t value of (*address)
rolf.meyer@arm.com 11:1c1ebd0324fa 974 *
rolf.meyer@arm.com 11:1c1ebd0324fa 975 * Exclusive LDR command
rolf.meyer@arm.com 11:1c1ebd0324fa 976 */
rolf.meyer@arm.com 11:1c1ebd0324fa 977 extern uint8_t __LDREXB(uint8_t *addr);
rolf.meyer@arm.com 11:1c1ebd0324fa 978
rolf.meyer@arm.com 11:1c1ebd0324fa 979 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 980 * @brief LDR Exclusive
rolf.meyer@arm.com 11:1c1ebd0324fa 981 *
rolf.meyer@arm.com 11:1c1ebd0324fa 982 * @param uint16_t* address
rolf.meyer@arm.com 11:1c1ebd0324fa 983 * @return uint16_t value of (*address)
rolf.meyer@arm.com 11:1c1ebd0324fa 984 *
rolf.meyer@arm.com 11:1c1ebd0324fa 985 * Exclusive LDR command
rolf.meyer@arm.com 11:1c1ebd0324fa 986 */
rolf.meyer@arm.com 11:1c1ebd0324fa 987 extern uint16_t __LDREXH(uint16_t *addr);
rolf.meyer@arm.com 11:1c1ebd0324fa 988
rolf.meyer@arm.com 11:1c1ebd0324fa 989 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 990 * @brief LDR Exclusive
rolf.meyer@arm.com 11:1c1ebd0324fa 991 *
rolf.meyer@arm.com 11:1c1ebd0324fa 992 * @param uint32_t* address
rolf.meyer@arm.com 11:1c1ebd0324fa 993 * @return uint32_t value of (*address)
rolf.meyer@arm.com 11:1c1ebd0324fa 994 *
rolf.meyer@arm.com 11:1c1ebd0324fa 995 * Exclusive LDR command
rolf.meyer@arm.com 11:1c1ebd0324fa 996 */
rolf.meyer@arm.com 11:1c1ebd0324fa 997 extern uint32_t __LDREXW(uint32_t *addr);
rolf.meyer@arm.com 11:1c1ebd0324fa 998
rolf.meyer@arm.com 11:1c1ebd0324fa 999 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 1000 * @brief STR Exclusive
rolf.meyer@arm.com 11:1c1ebd0324fa 1001 *
rolf.meyer@arm.com 11:1c1ebd0324fa 1002 * @param uint8_t *address
rolf.meyer@arm.com 11:1c1ebd0324fa 1003 * @param uint8_t value to store
rolf.meyer@arm.com 11:1c1ebd0324fa 1004 * @return uint32_t successful / failed
rolf.meyer@arm.com 11:1c1ebd0324fa 1005 *
rolf.meyer@arm.com 11:1c1ebd0324fa 1006 * Exclusive STR command
rolf.meyer@arm.com 11:1c1ebd0324fa 1007 */
rolf.meyer@arm.com 11:1c1ebd0324fa 1008 extern uint32_t __STREXB(uint8_t value, uint8_t *addr);
rolf.meyer@arm.com 11:1c1ebd0324fa 1009
rolf.meyer@arm.com 11:1c1ebd0324fa 1010 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 1011 * @brief STR Exclusive
rolf.meyer@arm.com 11:1c1ebd0324fa 1012 *
rolf.meyer@arm.com 11:1c1ebd0324fa 1013 * @param uint16_t *address
rolf.meyer@arm.com 11:1c1ebd0324fa 1014 * @param uint16_t value to store
rolf.meyer@arm.com 11:1c1ebd0324fa 1015 * @return uint32_t successful / failed
rolf.meyer@arm.com 11:1c1ebd0324fa 1016 *
rolf.meyer@arm.com 11:1c1ebd0324fa 1017 * Exclusive STR command
rolf.meyer@arm.com 11:1c1ebd0324fa 1018 */
rolf.meyer@arm.com 11:1c1ebd0324fa 1019 extern uint32_t __STREXH(uint16_t value, uint16_t *addr);
rolf.meyer@arm.com 11:1c1ebd0324fa 1020
rolf.meyer@arm.com 11:1c1ebd0324fa 1021 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 1022 * @brief STR Exclusive
rolf.meyer@arm.com 11:1c1ebd0324fa 1023 *
rolf.meyer@arm.com 11:1c1ebd0324fa 1024 * @param uint32_t *address
rolf.meyer@arm.com 11:1c1ebd0324fa 1025 * @param uint32_t value to store
rolf.meyer@arm.com 11:1c1ebd0324fa 1026 * @return uint32_t successful / failed
rolf.meyer@arm.com 11:1c1ebd0324fa 1027 *
rolf.meyer@arm.com 11:1c1ebd0324fa 1028 * Exclusive STR command
rolf.meyer@arm.com 11:1c1ebd0324fa 1029 */
rolf.meyer@arm.com 11:1c1ebd0324fa 1030 extern uint32_t __STREXW(uint32_t value, uint32_t *addr);
rolf.meyer@arm.com 11:1c1ebd0324fa 1031
rolf.meyer@arm.com 11:1c1ebd0324fa 1032
rolf.meyer@arm.com 11:1c1ebd0324fa 1033 #elif (defined (__TASKING__)) /*------------------ TASKING Compiler ---------------------*/
rolf.meyer@arm.com 11:1c1ebd0324fa 1034 /* TASKING carm specific functions */
rolf.meyer@arm.com 11:1c1ebd0324fa 1035
rolf.meyer@arm.com 11:1c1ebd0324fa 1036 /*
rolf.meyer@arm.com 11:1c1ebd0324fa 1037 * The CMSIS functions have been implemented as intrinsics in the compiler.
rolf.meyer@arm.com 11:1c1ebd0324fa 1038 * Please use "carm -?i" to get an up to date list of all instrinsics,
rolf.meyer@arm.com 11:1c1ebd0324fa 1039 * Including the CMSIS ones.
rolf.meyer@arm.com 11:1c1ebd0324fa 1040 */
rolf.meyer@arm.com 11:1c1ebd0324fa 1041
rolf.meyer@arm.com 11:1c1ebd0324fa 1042 #endif
rolf.meyer@arm.com 11:1c1ebd0324fa 1043
rolf.meyer@arm.com 11:1c1ebd0324fa 1044
rolf.meyer@arm.com 11:1c1ebd0324fa 1045
rolf.meyer@arm.com 11:1c1ebd0324fa 1046 /* ########################## NVIC functions #################################### */
rolf.meyer@arm.com 11:1c1ebd0324fa 1047
rolf.meyer@arm.com 11:1c1ebd0324fa 1048
rolf.meyer@arm.com 11:1c1ebd0324fa 1049 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 1050 * @brief Set the Priority Grouping in NVIC Interrupt Controller
rolf.meyer@arm.com 11:1c1ebd0324fa 1051 *
rolf.meyer@arm.com 11:1c1ebd0324fa 1052 * @param uint32_t priority_grouping is priority grouping field
rolf.meyer@arm.com 11:1c1ebd0324fa 1053 * @return none
rolf.meyer@arm.com 11:1c1ebd0324fa 1054 *
rolf.meyer@arm.com 11:1c1ebd0324fa 1055 * Set the priority grouping field using the required unlock sequence.
rolf.meyer@arm.com 11:1c1ebd0324fa 1056 * The parameter priority_grouping is assigned to the field
rolf.meyer@arm.com 11:1c1ebd0324fa 1057 * SCB->AIRCR [10:8] PRIGROUP field. Only values from 0..7 are used.
rolf.meyer@arm.com 11:1c1ebd0324fa 1058 * In case of a conflict between priority grouping and available
rolf.meyer@arm.com 11:1c1ebd0324fa 1059 * priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
rolf.meyer@arm.com 11:1c1ebd0324fa 1060 */
rolf.meyer@arm.com 11:1c1ebd0324fa 1061 static __INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
rolf.meyer@arm.com 11:1c1ebd0324fa 1062 {
rolf.meyer@arm.com 11:1c1ebd0324fa 1063 uint32_t reg_value;
rolf.meyer@arm.com 11:1c1ebd0324fa 1064 uint32_t PriorityGroupTmp = (PriorityGroup & 0x07); /* only values 0..7 are used */
rolf.meyer@arm.com 11:1c1ebd0324fa 1065
rolf.meyer@arm.com 11:1c1ebd0324fa 1066 reg_value = SCB->AIRCR; /* read old register configuration */
rolf.meyer@arm.com 11:1c1ebd0324fa 1067 reg_value &= ~((0xFFFFU << 16) | (0x0F << 8)); /* clear bits to change */
rolf.meyer@arm.com 11:1c1ebd0324fa 1068 reg_value = ((reg_value | NVIC_AIRCR_VECTKEY | (PriorityGroupTmp << 8))); /* Insert write key and priorty group */
rolf.meyer@arm.com 11:1c1ebd0324fa 1069 SCB->AIRCR = reg_value;
rolf.meyer@arm.com 11:1c1ebd0324fa 1070 }
rolf.meyer@arm.com 11:1c1ebd0324fa 1071
rolf.meyer@arm.com 11:1c1ebd0324fa 1072 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 1073 * @brief Get the Priority Grouping from NVIC Interrupt Controller
rolf.meyer@arm.com 11:1c1ebd0324fa 1074 *
rolf.meyer@arm.com 11:1c1ebd0324fa 1075 * @param none
rolf.meyer@arm.com 11:1c1ebd0324fa 1076 * @return uint32_t priority grouping field
rolf.meyer@arm.com 11:1c1ebd0324fa 1077 *
rolf.meyer@arm.com 11:1c1ebd0324fa 1078 * Get the priority grouping from NVIC Interrupt Controller.
rolf.meyer@arm.com 11:1c1ebd0324fa 1079 * priority grouping is SCB->AIRCR [10:8] PRIGROUP field.
rolf.meyer@arm.com 11:1c1ebd0324fa 1080 */
rolf.meyer@arm.com 11:1c1ebd0324fa 1081 static __INLINE uint32_t NVIC_GetPriorityGrouping(void)
rolf.meyer@arm.com 11:1c1ebd0324fa 1082 {
rolf.meyer@arm.com 11:1c1ebd0324fa 1083 return ((SCB->AIRCR >> 8) & 0x07); /* read priority grouping field */
rolf.meyer@arm.com 11:1c1ebd0324fa 1084 }
rolf.meyer@arm.com 11:1c1ebd0324fa 1085
rolf.meyer@arm.com 11:1c1ebd0324fa 1086 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 1087 * @brief Enable Interrupt in NVIC Interrupt Controller
rolf.meyer@arm.com 11:1c1ebd0324fa 1088 *
rolf.meyer@arm.com 11:1c1ebd0324fa 1089 * @param IRQn_Type IRQn specifies the interrupt number
rolf.meyer@arm.com 11:1c1ebd0324fa 1090 * @return none
rolf.meyer@arm.com 11:1c1ebd0324fa 1091 *
rolf.meyer@arm.com 11:1c1ebd0324fa 1092 * Enable a device specific interupt in the NVIC interrupt controller.
rolf.meyer@arm.com 11:1c1ebd0324fa 1093 * The interrupt number cannot be a negative value.
rolf.meyer@arm.com 11:1c1ebd0324fa 1094 */
rolf.meyer@arm.com 11:1c1ebd0324fa 1095 static __INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
rolf.meyer@arm.com 11:1c1ebd0324fa 1096 {
rolf.meyer@arm.com 11:1c1ebd0324fa 1097 NVIC->ISER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* enable interrupt */
rolf.meyer@arm.com 11:1c1ebd0324fa 1098 }
rolf.meyer@arm.com 11:1c1ebd0324fa 1099
rolf.meyer@arm.com 11:1c1ebd0324fa 1100 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 1101 * @brief Disable the interrupt line for external interrupt specified
rolf.meyer@arm.com 11:1c1ebd0324fa 1102 *
rolf.meyer@arm.com 11:1c1ebd0324fa 1103 * @param IRQn_Type IRQn is the positive number of the external interrupt
rolf.meyer@arm.com 11:1c1ebd0324fa 1104 * @return none
rolf.meyer@arm.com 11:1c1ebd0324fa 1105 *
rolf.meyer@arm.com 11:1c1ebd0324fa 1106 * Disable a device specific interupt in the NVIC interrupt controller.
rolf.meyer@arm.com 11:1c1ebd0324fa 1107 * The interrupt number cannot be a negative value.
rolf.meyer@arm.com 11:1c1ebd0324fa 1108 */
rolf.meyer@arm.com 11:1c1ebd0324fa 1109 static __INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
rolf.meyer@arm.com 11:1c1ebd0324fa 1110 {
rolf.meyer@arm.com 11:1c1ebd0324fa 1111 NVIC->ICER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* disable interrupt */
rolf.meyer@arm.com 11:1c1ebd0324fa 1112 }
rolf.meyer@arm.com 11:1c1ebd0324fa 1113
rolf.meyer@arm.com 11:1c1ebd0324fa 1114 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 1115 * @brief Read the interrupt pending bit for a device specific interrupt source
rolf.meyer@arm.com 11:1c1ebd0324fa 1116 *
rolf.meyer@arm.com 11:1c1ebd0324fa 1117 * @param IRQn_Type IRQn is the number of the device specifc interrupt
rolf.meyer@arm.com 11:1c1ebd0324fa 1118 * @return uint32_t 1 if pending interrupt else 0
rolf.meyer@arm.com 11:1c1ebd0324fa 1119 *
rolf.meyer@arm.com 11:1c1ebd0324fa 1120 * Read the pending register in NVIC and return 1 if its status is pending,
rolf.meyer@arm.com 11:1c1ebd0324fa 1121 * otherwise it returns 0
rolf.meyer@arm.com 11:1c1ebd0324fa 1122 */
rolf.meyer@arm.com 11:1c1ebd0324fa 1123 static __INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
rolf.meyer@arm.com 11:1c1ebd0324fa 1124 {
rolf.meyer@arm.com 11:1c1ebd0324fa 1125 return((uint32_t) ((NVIC->ISPR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); /* Return 1 if pending else 0 */
rolf.meyer@arm.com 11:1c1ebd0324fa 1126 }
rolf.meyer@arm.com 11:1c1ebd0324fa 1127
rolf.meyer@arm.com 11:1c1ebd0324fa 1128 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 1129 * @brief Set the pending bit for an external interrupt
rolf.meyer@arm.com 11:1c1ebd0324fa 1130 *
rolf.meyer@arm.com 11:1c1ebd0324fa 1131 * @param IRQn_Type IRQn is the Number of the interrupt
rolf.meyer@arm.com 11:1c1ebd0324fa 1132 * @return none
rolf.meyer@arm.com 11:1c1ebd0324fa 1133 *
rolf.meyer@arm.com 11:1c1ebd0324fa 1134 * Set the pending bit for the specified interrupt.
rolf.meyer@arm.com 11:1c1ebd0324fa 1135 * The interrupt number cannot be a negative value.
rolf.meyer@arm.com 11:1c1ebd0324fa 1136 */
rolf.meyer@arm.com 11:1c1ebd0324fa 1137 static __INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn)
rolf.meyer@arm.com 11:1c1ebd0324fa 1138 {
rolf.meyer@arm.com 11:1c1ebd0324fa 1139 NVIC->ISPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* set interrupt pending */
rolf.meyer@arm.com 11:1c1ebd0324fa 1140 }
rolf.meyer@arm.com 11:1c1ebd0324fa 1141
rolf.meyer@arm.com 11:1c1ebd0324fa 1142 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 1143 * @brief Clear the pending bit for an external interrupt
rolf.meyer@arm.com 11:1c1ebd0324fa 1144 *
rolf.meyer@arm.com 11:1c1ebd0324fa 1145 * @param IRQn_Type IRQn is the Number of the interrupt
rolf.meyer@arm.com 11:1c1ebd0324fa 1146 * @return none
rolf.meyer@arm.com 11:1c1ebd0324fa 1147 *
rolf.meyer@arm.com 11:1c1ebd0324fa 1148 * Clear the pending bit for the specified interrupt.
rolf.meyer@arm.com 11:1c1ebd0324fa 1149 * The interrupt number cannot be a negative value.
rolf.meyer@arm.com 11:1c1ebd0324fa 1150 */
rolf.meyer@arm.com 11:1c1ebd0324fa 1151 static __INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
rolf.meyer@arm.com 11:1c1ebd0324fa 1152 {
rolf.meyer@arm.com 11:1c1ebd0324fa 1153 NVIC->ICPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* Clear pending interrupt */
rolf.meyer@arm.com 11:1c1ebd0324fa 1154 }
rolf.meyer@arm.com 11:1c1ebd0324fa 1155
rolf.meyer@arm.com 11:1c1ebd0324fa 1156 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 1157 * @brief Read the active bit for an external interrupt
rolf.meyer@arm.com 11:1c1ebd0324fa 1158 *
rolf.meyer@arm.com 11:1c1ebd0324fa 1159 * @param IRQn_Type IRQn is the Number of the interrupt
rolf.meyer@arm.com 11:1c1ebd0324fa 1160 * @return uint32_t 1 if active else 0
rolf.meyer@arm.com 11:1c1ebd0324fa 1161 *
rolf.meyer@arm.com 11:1c1ebd0324fa 1162 * Read the active register in NVIC and returns 1 if its status is active,
rolf.meyer@arm.com 11:1c1ebd0324fa 1163 * otherwise it returns 0.
rolf.meyer@arm.com 11:1c1ebd0324fa 1164 */
rolf.meyer@arm.com 11:1c1ebd0324fa 1165 static __INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn)
rolf.meyer@arm.com 11:1c1ebd0324fa 1166 {
rolf.meyer@arm.com 11:1c1ebd0324fa 1167 return((uint32_t)((NVIC->IABR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); /* Return 1 if active else 0 */
rolf.meyer@arm.com 11:1c1ebd0324fa 1168 }
rolf.meyer@arm.com 11:1c1ebd0324fa 1169
rolf.meyer@arm.com 11:1c1ebd0324fa 1170 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 1171 * @brief Set the priority for an interrupt
rolf.meyer@arm.com 11:1c1ebd0324fa 1172 *
rolf.meyer@arm.com 11:1c1ebd0324fa 1173 * @param IRQn_Type IRQn is the Number of the interrupt
rolf.meyer@arm.com 11:1c1ebd0324fa 1174 * @param priority is the priority for the interrupt
rolf.meyer@arm.com 11:1c1ebd0324fa 1175 * @return none
rolf.meyer@arm.com 11:1c1ebd0324fa 1176 *
rolf.meyer@arm.com 11:1c1ebd0324fa 1177 * Set the priority for the specified interrupt. The interrupt
rolf.meyer@arm.com 11:1c1ebd0324fa 1178 * number can be positive to specify an external (device specific)
rolf.meyer@arm.com 11:1c1ebd0324fa 1179 * interrupt, or negative to specify an internal (core) interrupt. \n
rolf.meyer@arm.com 11:1c1ebd0324fa 1180 *
rolf.meyer@arm.com 11:1c1ebd0324fa 1181 * Note: The priority cannot be set for every core interrupt.
rolf.meyer@arm.com 11:1c1ebd0324fa 1182 */
rolf.meyer@arm.com 11:1c1ebd0324fa 1183 static __INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
rolf.meyer@arm.com 11:1c1ebd0324fa 1184 {
rolf.meyer@arm.com 11:1c1ebd0324fa 1185 if(IRQn < 0) {
rolf.meyer@arm.com 11:1c1ebd0324fa 1186 SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Priority for Cortex-M3 System Interrupts */
rolf.meyer@arm.com 11:1c1ebd0324fa 1187 else {
rolf.meyer@arm.com 11:1c1ebd0324fa 1188 NVIC->IP[(uint32_t)(IRQn)] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Priority for device specific Interrupts */
rolf.meyer@arm.com 11:1c1ebd0324fa 1189 }
rolf.meyer@arm.com 11:1c1ebd0324fa 1190
rolf.meyer@arm.com 11:1c1ebd0324fa 1191 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 1192 * @brief Read the priority for an interrupt
rolf.meyer@arm.com 11:1c1ebd0324fa 1193 *
rolf.meyer@arm.com 11:1c1ebd0324fa 1194 * @param IRQn_Type IRQn is the Number of the interrupt
rolf.meyer@arm.com 11:1c1ebd0324fa 1195 * @return uint32_t priority is the priority for the interrupt
rolf.meyer@arm.com 11:1c1ebd0324fa 1196 *
rolf.meyer@arm.com 11:1c1ebd0324fa 1197 * Read the priority for the specified interrupt. The interrupt
rolf.meyer@arm.com 11:1c1ebd0324fa 1198 * number can be positive to specify an external (device specific)
rolf.meyer@arm.com 11:1c1ebd0324fa 1199 * interrupt, or negative to specify an internal (core) interrupt.
rolf.meyer@arm.com 11:1c1ebd0324fa 1200 *
rolf.meyer@arm.com 11:1c1ebd0324fa 1201 * The returned priority value is automatically aligned to the implemented
rolf.meyer@arm.com 11:1c1ebd0324fa 1202 * priority bits of the microcontroller.
rolf.meyer@arm.com 11:1c1ebd0324fa 1203 *
rolf.meyer@arm.com 11:1c1ebd0324fa 1204 * Note: The priority cannot be set for every core interrupt.
rolf.meyer@arm.com 11:1c1ebd0324fa 1205 */
rolf.meyer@arm.com 11:1c1ebd0324fa 1206 static __INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn)
rolf.meyer@arm.com 11:1c1ebd0324fa 1207 {
rolf.meyer@arm.com 11:1c1ebd0324fa 1208
rolf.meyer@arm.com 11:1c1ebd0324fa 1209 if(IRQn < 0) {
rolf.meyer@arm.com 11:1c1ebd0324fa 1210 return((uint32_t)(SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] >> (8 - __NVIC_PRIO_BITS))); } /* get priority for Cortex-M3 system interrupts */
rolf.meyer@arm.com 11:1c1ebd0324fa 1211 else {
rolf.meyer@arm.com 11:1c1ebd0324fa 1212 return((uint32_t)(NVIC->IP[(uint32_t)(IRQn)] >> (8 - __NVIC_PRIO_BITS))); } /* get priority for device specific interrupts */
rolf.meyer@arm.com 11:1c1ebd0324fa 1213 }
rolf.meyer@arm.com 11:1c1ebd0324fa 1214
rolf.meyer@arm.com 11:1c1ebd0324fa 1215
rolf.meyer@arm.com 11:1c1ebd0324fa 1216 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 1217 * @brief Encode the priority for an interrupt
rolf.meyer@arm.com 11:1c1ebd0324fa 1218 *
rolf.meyer@arm.com 11:1c1ebd0324fa 1219 * @param uint32_t PriorityGroup is the used priority group
rolf.meyer@arm.com 11:1c1ebd0324fa 1220 * @param uint32_t PreemptPriority is the preemptive priority value (starting from 0)
rolf.meyer@arm.com 11:1c1ebd0324fa 1221 * @param uint32_t SubPriority is the sub priority value (starting from 0)
rolf.meyer@arm.com 11:1c1ebd0324fa 1222 * @return uint32_t the priority for the interrupt
rolf.meyer@arm.com 11:1c1ebd0324fa 1223 *
rolf.meyer@arm.com 11:1c1ebd0324fa 1224 * Encode the priority for an interrupt with the given priority group,
rolf.meyer@arm.com 11:1c1ebd0324fa 1225 * preemptive priority value and sub priority value.
rolf.meyer@arm.com 11:1c1ebd0324fa 1226 * In case of a conflict between priority grouping and available
rolf.meyer@arm.com 11:1c1ebd0324fa 1227 * priority bits (__NVIC_PRIO_BITS) the samllest possible priority group is set.
rolf.meyer@arm.com 11:1c1ebd0324fa 1228 *
rolf.meyer@arm.com 11:1c1ebd0324fa 1229 * The returned priority value can be used for NVIC_SetPriority(...) function
rolf.meyer@arm.com 11:1c1ebd0324fa 1230 */
rolf.meyer@arm.com 11:1c1ebd0324fa 1231 static __INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
rolf.meyer@arm.com 11:1c1ebd0324fa 1232 {
rolf.meyer@arm.com 11:1c1ebd0324fa 1233 uint32_t PriorityGroupTmp = (PriorityGroup & 0x07); /* only values 0..7 are used */
rolf.meyer@arm.com 11:1c1ebd0324fa 1234 uint32_t PreemptPriorityBits;
rolf.meyer@arm.com 11:1c1ebd0324fa 1235 uint32_t SubPriorityBits;
rolf.meyer@arm.com 11:1c1ebd0324fa 1236
rolf.meyer@arm.com 11:1c1ebd0324fa 1237 PreemptPriorityBits = ((7 - PriorityGroupTmp) > __NVIC_PRIO_BITS) ? __NVIC_PRIO_BITS : 7 - PriorityGroupTmp;
rolf.meyer@arm.com 11:1c1ebd0324fa 1238 SubPriorityBits = ((PriorityGroupTmp + __NVIC_PRIO_BITS) < 7) ? 0 : PriorityGroupTmp - 7 + __NVIC_PRIO_BITS;
rolf.meyer@arm.com 11:1c1ebd0324fa 1239
rolf.meyer@arm.com 11:1c1ebd0324fa 1240 return (
rolf.meyer@arm.com 11:1c1ebd0324fa 1241 ((PreemptPriority & ((1 << (PreemptPriorityBits)) - 1)) << SubPriorityBits) |
rolf.meyer@arm.com 11:1c1ebd0324fa 1242 ((SubPriority & ((1 << (SubPriorityBits )) - 1)))
rolf.meyer@arm.com 11:1c1ebd0324fa 1243 );
rolf.meyer@arm.com 11:1c1ebd0324fa 1244 }
rolf.meyer@arm.com 11:1c1ebd0324fa 1245
rolf.meyer@arm.com 11:1c1ebd0324fa 1246
rolf.meyer@arm.com 11:1c1ebd0324fa 1247 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 1248 * @brief Decode the priority of an interrupt
rolf.meyer@arm.com 11:1c1ebd0324fa 1249 *
rolf.meyer@arm.com 11:1c1ebd0324fa 1250 * @param uint32_t Priority the priority for the interrupt
rolf.meyer@arm.com 11:1c1ebd0324fa 1251 * @param uint32_t PrioGroup is the used priority group
rolf.meyer@arm.com 11:1c1ebd0324fa 1252 * @param uint32_t* pPreemptPrio is the preemptive priority value (starting from 0)
rolf.meyer@arm.com 11:1c1ebd0324fa 1253 * @param uint32_t* pSubPrio is the sub priority value (starting from 0)
rolf.meyer@arm.com 11:1c1ebd0324fa 1254 * @return none
rolf.meyer@arm.com 11:1c1ebd0324fa 1255 *
rolf.meyer@arm.com 11:1c1ebd0324fa 1256 * Decode an interrupt priority value with the given priority group to
rolf.meyer@arm.com 11:1c1ebd0324fa 1257 * preemptive priority value and sub priority value.
rolf.meyer@arm.com 11:1c1ebd0324fa 1258 * In case of a conflict between priority grouping and available
rolf.meyer@arm.com 11:1c1ebd0324fa 1259 * priority bits (__NVIC_PRIO_BITS) the samllest possible priority group is set.
rolf.meyer@arm.com 11:1c1ebd0324fa 1260 *
rolf.meyer@arm.com 11:1c1ebd0324fa 1261 * The priority value can be retrieved with NVIC_GetPriority(...) function
rolf.meyer@arm.com 11:1c1ebd0324fa 1262 */
rolf.meyer@arm.com 11:1c1ebd0324fa 1263 static __INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority)
rolf.meyer@arm.com 11:1c1ebd0324fa 1264 {
rolf.meyer@arm.com 11:1c1ebd0324fa 1265 uint32_t PriorityGroupTmp = (PriorityGroup & 0x07); /* only values 0..7 are used */
rolf.meyer@arm.com 11:1c1ebd0324fa 1266 uint32_t PreemptPriorityBits;
rolf.meyer@arm.com 11:1c1ebd0324fa 1267 uint32_t SubPriorityBits;
rolf.meyer@arm.com 11:1c1ebd0324fa 1268
rolf.meyer@arm.com 11:1c1ebd0324fa 1269 PreemptPriorityBits = ((7 - PriorityGroupTmp) > __NVIC_PRIO_BITS) ? __NVIC_PRIO_BITS : 7 - PriorityGroupTmp;
rolf.meyer@arm.com 11:1c1ebd0324fa 1270 SubPriorityBits = ((PriorityGroupTmp + __NVIC_PRIO_BITS) < 7) ? 0 : PriorityGroupTmp - 7 + __NVIC_PRIO_BITS;
rolf.meyer@arm.com 11:1c1ebd0324fa 1271
rolf.meyer@arm.com 11:1c1ebd0324fa 1272 *pPreemptPriority = (Priority >> SubPriorityBits) & ((1 << (PreemptPriorityBits)) - 1);
rolf.meyer@arm.com 11:1c1ebd0324fa 1273 *pSubPriority = (Priority ) & ((1 << (SubPriorityBits )) - 1);
rolf.meyer@arm.com 11:1c1ebd0324fa 1274 }
rolf.meyer@arm.com 11:1c1ebd0324fa 1275
rolf.meyer@arm.com 11:1c1ebd0324fa 1276
rolf.meyer@arm.com 11:1c1ebd0324fa 1277
rolf.meyer@arm.com 11:1c1ebd0324fa 1278 /* ################################## SysTick function ############################################ */
rolf.meyer@arm.com 11:1c1ebd0324fa 1279
rolf.meyer@arm.com 11:1c1ebd0324fa 1280 #if (!defined (__Vendor_SysTickConfig)) || (__Vendor_SysTickConfig == 0)
rolf.meyer@arm.com 11:1c1ebd0324fa 1281
rolf.meyer@arm.com 11:1c1ebd0324fa 1282 /* SysTick constants */
rolf.meyer@arm.com 11:1c1ebd0324fa 1283 #define SYSTICK_ENABLE 0 /* Config-Bit to start or stop the SysTick Timer */
rolf.meyer@arm.com 11:1c1ebd0324fa 1284 #define SYSTICK_TICKINT 1 /* Config-Bit to enable or disable the SysTick interrupt */
rolf.meyer@arm.com 11:1c1ebd0324fa 1285 #define SYSTICK_CLKSOURCE 2 /* Clocksource has the offset 2 in SysTick Control and Status Register */
rolf.meyer@arm.com 11:1c1ebd0324fa 1286 #define SYSTICK_MAXCOUNT ((1<<24) -1) /* SysTick MaxCount */
rolf.meyer@arm.com 11:1c1ebd0324fa 1287
rolf.meyer@arm.com 11:1c1ebd0324fa 1288 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 1289 * @brief Initialize and start the SysTick counter and its interrupt.
rolf.meyer@arm.com 11:1c1ebd0324fa 1290 *
rolf.meyer@arm.com 11:1c1ebd0324fa 1291 * @param uint32_t ticks is the number of ticks between two interrupts
rolf.meyer@arm.com 11:1c1ebd0324fa 1292 * @return none
rolf.meyer@arm.com 11:1c1ebd0324fa 1293 *
rolf.meyer@arm.com 11:1c1ebd0324fa 1294 * Initialise the system tick timer and its interrupt and start the
rolf.meyer@arm.com 11:1c1ebd0324fa 1295 * system tick timer / counter in free running mode to generate
rolf.meyer@arm.com 11:1c1ebd0324fa 1296 * periodical interrupts.
rolf.meyer@arm.com 11:1c1ebd0324fa 1297 */
rolf.meyer@arm.com 11:1c1ebd0324fa 1298 static __INLINE uint32_t SysTick_Config(uint32_t ticks)
rolf.meyer@arm.com 11:1c1ebd0324fa 1299 {
rolf.meyer@arm.com 11:1c1ebd0324fa 1300 if (ticks > SYSTICK_MAXCOUNT) return (1); /* Reload value impossible */
rolf.meyer@arm.com 11:1c1ebd0324fa 1301
rolf.meyer@arm.com 11:1c1ebd0324fa 1302 SysTick->LOAD = (ticks & SYSTICK_MAXCOUNT) - 1; /* set reload register */
rolf.meyer@arm.com 11:1c1ebd0324fa 1303 NVIC_SetPriority (SysTick_IRQn, (1<<__NVIC_PRIO_BITS) - 1); /* set Priority for Cortex-M0 System Interrupts */
rolf.meyer@arm.com 11:1c1ebd0324fa 1304 SysTick->VAL = (0x00); /* Load the SysTick Counter Value */
rolf.meyer@arm.com 11:1c1ebd0324fa 1305 SysTick->CTRL = (1 << SYSTICK_CLKSOURCE) | (1<<SYSTICK_ENABLE) | (1<<SYSTICK_TICKINT); /* Enable SysTick IRQ and SysTick Timer */
rolf.meyer@arm.com 11:1c1ebd0324fa 1306 return (0); /* Function successful */
rolf.meyer@arm.com 11:1c1ebd0324fa 1307 }
rolf.meyer@arm.com 11:1c1ebd0324fa 1308
rolf.meyer@arm.com 11:1c1ebd0324fa 1309 #endif
rolf.meyer@arm.com 11:1c1ebd0324fa 1310
rolf.meyer@arm.com 11:1c1ebd0324fa 1311
rolf.meyer@arm.com 11:1c1ebd0324fa 1312
rolf.meyer@arm.com 11:1c1ebd0324fa 1313
rolf.meyer@arm.com 11:1c1ebd0324fa 1314
rolf.meyer@arm.com 11:1c1ebd0324fa 1315 /* ################################## Reset function ############################################ */
rolf.meyer@arm.com 11:1c1ebd0324fa 1316
rolf.meyer@arm.com 11:1c1ebd0324fa 1317 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 1318 * @brief Initiate a system reset request.
rolf.meyer@arm.com 11:1c1ebd0324fa 1319 *
rolf.meyer@arm.com 11:1c1ebd0324fa 1320 * @param none
rolf.meyer@arm.com 11:1c1ebd0324fa 1321 * @return none
rolf.meyer@arm.com 11:1c1ebd0324fa 1322 *
rolf.meyer@arm.com 11:1c1ebd0324fa 1323 * Initialize a system reset request to reset the MCU
rolf.meyer@arm.com 11:1c1ebd0324fa 1324 */
rolf.meyer@arm.com 11:1c1ebd0324fa 1325 static __INLINE void NVIC_SystemReset(void)
rolf.meyer@arm.com 11:1c1ebd0324fa 1326 {
rolf.meyer@arm.com 11:1c1ebd0324fa 1327 SCB->AIRCR = (NVIC_AIRCR_VECTKEY | (SCB->AIRCR & (0x700)) | (1<<NVIC_SYSRESETREQ)); /* Keep priority group unchanged */
rolf.meyer@arm.com 11:1c1ebd0324fa 1328 __DSB(); /* Ensure completion of memory access */
rolf.meyer@arm.com 11:1c1ebd0324fa 1329 while(1); /* wait until reset */
rolf.meyer@arm.com 11:1c1ebd0324fa 1330 }
rolf.meyer@arm.com 11:1c1ebd0324fa 1331
rolf.meyer@arm.com 11:1c1ebd0324fa 1332
rolf.meyer@arm.com 11:1c1ebd0324fa 1333 /* ##################################### Debug In/Output function ########################################### */
rolf.meyer@arm.com 11:1c1ebd0324fa 1334
rolf.meyer@arm.com 11:1c1ebd0324fa 1335 extern volatile int ITM_RxBuffer; /* variable to receive characters */
rolf.meyer@arm.com 11:1c1ebd0324fa 1336 #define ITM_RXBUFFER_EMPTY 0x5AA55AA5 /* value identifying ITM_RxBuffer is ready for next character */
rolf.meyer@arm.com 11:1c1ebd0324fa 1337
rolf.meyer@arm.com 11:1c1ebd0324fa 1338
rolf.meyer@arm.com 11:1c1ebd0324fa 1339 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 1340 * @brief Outputs a character via the ITM channel 0
rolf.meyer@arm.com 11:1c1ebd0324fa 1341 *
rolf.meyer@arm.com 11:1c1ebd0324fa 1342 * @param uint32_t character to output
rolf.meyer@arm.com 11:1c1ebd0324fa 1343 * @return uint32_t input character
rolf.meyer@arm.com 11:1c1ebd0324fa 1344 *
rolf.meyer@arm.com 11:1c1ebd0324fa 1345 * The function outputs a character via the ITM channel 0.
rolf.meyer@arm.com 11:1c1ebd0324fa 1346 * The function returns when no debugger is connected that has booked the output.
rolf.meyer@arm.com 11:1c1ebd0324fa 1347 * It is blocking when a debugger is connected, but the previous character send is not transmitted.
rolf.meyer@arm.com 11:1c1ebd0324fa 1348 */
rolf.meyer@arm.com 11:1c1ebd0324fa 1349 static __INLINE uint32_t ITM_SendChar (uint32_t ch)
rolf.meyer@arm.com 11:1c1ebd0324fa 1350 {
rolf.meyer@arm.com 11:1c1ebd0324fa 1351 if ((CoreDebug->DEMCR & CoreDebug_DEMCR_TRCENA) &&
rolf.meyer@arm.com 11:1c1ebd0324fa 1352 (ITM->TCR & ITM_TCR_ITMENA) &&
rolf.meyer@arm.com 11:1c1ebd0324fa 1353 (ITM->TER & (1UL << 0)) )
rolf.meyer@arm.com 11:1c1ebd0324fa 1354 {
rolf.meyer@arm.com 11:1c1ebd0324fa 1355 while (ITM->PORT[0].u32 == 0);
rolf.meyer@arm.com 11:1c1ebd0324fa 1356 ITM->PORT[0].u8 = (uint8_t) ch;
rolf.meyer@arm.com 11:1c1ebd0324fa 1357 }
rolf.meyer@arm.com 11:1c1ebd0324fa 1358 return (ch);
rolf.meyer@arm.com 11:1c1ebd0324fa 1359 }
rolf.meyer@arm.com 11:1c1ebd0324fa 1360
rolf.meyer@arm.com 11:1c1ebd0324fa 1361
rolf.meyer@arm.com 11:1c1ebd0324fa 1362 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 1363 * @brief Inputs a character via variable ITM_RxBuffer
rolf.meyer@arm.com 11:1c1ebd0324fa 1364 *
rolf.meyer@arm.com 11:1c1ebd0324fa 1365 * @param none
rolf.meyer@arm.com 11:1c1ebd0324fa 1366 * @return uint32_t input character
rolf.meyer@arm.com 11:1c1ebd0324fa 1367 *
rolf.meyer@arm.com 11:1c1ebd0324fa 1368 * The function inputs a character via variable ITM_RxBuffer.
rolf.meyer@arm.com 11:1c1ebd0324fa 1369 * The function returns when no debugger is connected that has booked the output.
rolf.meyer@arm.com 11:1c1ebd0324fa 1370 * It is blocking when a debugger is connected, but the previous character send is not transmitted.
rolf.meyer@arm.com 11:1c1ebd0324fa 1371 */
rolf.meyer@arm.com 11:1c1ebd0324fa 1372 static __INLINE int ITM_ReceiveChar (void) {
rolf.meyer@arm.com 11:1c1ebd0324fa 1373 int ch = -1; /* no character available */
rolf.meyer@arm.com 11:1c1ebd0324fa 1374
rolf.meyer@arm.com 11:1c1ebd0324fa 1375 if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) {
rolf.meyer@arm.com 11:1c1ebd0324fa 1376 ch = ITM_RxBuffer;
rolf.meyer@arm.com 11:1c1ebd0324fa 1377 ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */
rolf.meyer@arm.com 11:1c1ebd0324fa 1378 }
rolf.meyer@arm.com 11:1c1ebd0324fa 1379
rolf.meyer@arm.com 11:1c1ebd0324fa 1380 return (ch);
rolf.meyer@arm.com 11:1c1ebd0324fa 1381 }
rolf.meyer@arm.com 11:1c1ebd0324fa 1382
rolf.meyer@arm.com 11:1c1ebd0324fa 1383
rolf.meyer@arm.com 11:1c1ebd0324fa 1384 /**
rolf.meyer@arm.com 11:1c1ebd0324fa 1385 * @brief Check if a character via variable ITM_RxBuffer is available
rolf.meyer@arm.com 11:1c1ebd0324fa 1386 *
rolf.meyer@arm.com 11:1c1ebd0324fa 1387 * @param none
rolf.meyer@arm.com 11:1c1ebd0324fa 1388 * @return int 1 = character available, 0 = no character available
rolf.meyer@arm.com 11:1c1ebd0324fa 1389 *
rolf.meyer@arm.com 11:1c1ebd0324fa 1390 * The function checks variable ITM_RxBuffer whether a character is available or not.
rolf.meyer@arm.com 11:1c1ebd0324fa 1391 * The function returns '1' if a character is available and '0' if no character is available.
rolf.meyer@arm.com 11:1c1ebd0324fa 1392 */
rolf.meyer@arm.com 11:1c1ebd0324fa 1393 static __INLINE int ITM_CheckChar (void) {
rolf.meyer@arm.com 11:1c1ebd0324fa 1394
rolf.meyer@arm.com 11:1c1ebd0324fa 1395 if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) {
rolf.meyer@arm.com 11:1c1ebd0324fa 1396 return (0); /* no character available */
rolf.meyer@arm.com 11:1c1ebd0324fa 1397 } else {
rolf.meyer@arm.com 11:1c1ebd0324fa 1398 return (1); /* character available */
rolf.meyer@arm.com 11:1c1ebd0324fa 1399 }
rolf.meyer@arm.com 11:1c1ebd0324fa 1400 }
rolf.meyer@arm.com 11:1c1ebd0324fa 1401
rolf.meyer@arm.com 11:1c1ebd0324fa 1402
rolf.meyer@arm.com 11:1c1ebd0324fa 1403
rolf.meyer@arm.com 11:1c1ebd0324fa 1404 #ifdef __cplusplus
rolf.meyer@arm.com 11:1c1ebd0324fa 1405 }
rolf.meyer@arm.com 11:1c1ebd0324fa 1406 #endif
rolf.meyer@arm.com 11:1c1ebd0324fa 1407
rolf.meyer@arm.com 11:1c1ebd0324fa 1408 #endif /* __CM3_CORE_H__ */
rolf.meyer@arm.com 11:1c1ebd0324fa 1409
rolf.meyer@arm.com 11:1c1ebd0324fa 1410 /*lint -restore */