Diff: targets/cmsis/TARGET_NXP/TARGET_LPC408X/TOOLCHAIN_GCC_ARM/startup_LPC408x.S

Revision:

577:15494b56c2f3

Parent:

66:64ad953ee6c3

--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/targets/cmsis/TARGET_NXP/TARGET_LPC408X/TOOLCHAIN_GCC_ARM/startup_LPC408x.S	Wed Jul 01 08:15:11 2015 +0100
@@ -0,0 +1,235 @@
+/* File: startup_ARMCM3.s
+ * Purpose: startup file for Cortex-M3/M4 devices. Should use with 
+ *   GNU Tools for ARM Embedded Processors
+ * Version: V1.1
+ * Date: 17 June 2011
+ * 
+ * Copyright (C) 2011 ARM Limited. All rights reserved.
+ * ARM Limited (ARM) is supplying this software for use with Cortex-M3/M4 
+ * processor based microcontrollers.  This file can be freely distributed 
+ * within development tools that are supporting such ARM based processors. 
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED
+ * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
+ * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
+ * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
+ */
+    .syntax unified
+    .arch armv7-m
+
+/* Memory Model
+   The HEAP starts at the end of the DATA section and grows upward.
+   
+   The STACK starts at the end of the RAM and grows downward.
+   
+   The HEAP and stack STACK are only checked at compile time:
+   (DATA_SIZE + HEAP_SIZE + STACK_SIZE) < RAM_SIZE
+   
+   This is just a check for the bare minimum for the Heap+Stack area before
+   aborting compilation, it is not the run time limit:
+   Heap_Size + Stack_Size = 0x80 + 0x80 = 0x100
+ */
+    .section .stack
+    .align 3
+#ifdef __STACK_SIZE
+    .equ    Stack_Size, __STACK_SIZE
+#else
+    .equ    Stack_Size, 0xc00
+#endif
+    .globl    __StackTop
+    .globl    __StackLimit
+__StackLimit:
+    .space    Stack_Size
+    .size __StackLimit, . - __StackLimit
+__StackTop:
+    .size __StackTop, . - __StackTop
+
+    .section .heap
+    .align 3
+#ifdef __HEAP_SIZE
+    .equ    Heap_Size, __HEAP_SIZE
+#else
+    .equ    Heap_Size, 0x800
+#endif
+    .globl    __HeapBase
+    .globl    __HeapLimit
+__HeapBase:
+    .space    Heap_Size
+    .size __HeapBase, . - __HeapBase
+__HeapLimit:
+    .size __HeapLimit, . - __HeapLimit
+    
+    .section .isr_vector
+    .align 2
+    .globl __isr_vector
+__isr_vector:
+    .long    __StackTop            /* Top of Stack */
+    .long    Reset_Handler         /* Reset Handler */
+    .long    NMI_Handler           /* NMI Handler */
+    .long    HardFault_Handler     /* Hard Fault Handler */
+    .long    MemManage_Handler     /* MPU Fault Handler */
+    .long    BusFault_Handler      /* Bus Fault Handler */
+    .long    UsageFault_Handler    /* Usage Fault Handler */
+    .long    0                     /* Reserved */
+    .long    0                     /* Reserved */
+    .long    0                     /* Reserved */
+    .long    0                     /* Reserved */
+    .long    SVC_Handler           /* SVCall Handler */
+    .long    DebugMon_Handler      /* Debug Monitor Handler */
+    .long    0                     /* Reserved */
+    .long    PendSV_Handler        /* PendSV Handler */
+    .long    SysTick_Handler       /* SysTick Handler */
+
+    /* External interrupts */
+    .long   WDT_IRQHandler              /* 16: Watchdog Timer               */
+    .long   TIMER0_IRQHandler           /* 17: Timer0                       */
+    .long   TIMER1_IRQHandler           /* 18: Timer1                       */
+    .long   TIMER2_IRQHandler           /* 19: Timer2                       */
+    .long   TIMER3_IRQHandler           /* 20: Timer3                       */
+    .long   UART0_IRQHandler            /* 21: UART0                        */
+    .long   UART1_IRQHandler            /* 22: UART1                        */
+    .long   UART2_IRQHandler            /* 23: UART2                        */
+    .long   UART3_IRQHandler            /* 24: UART3                        */
+    .long   PWM1_IRQHandler             /* 25: PWM1                         */
+    .long   I2C0_IRQHandler             /* 26: I2C0                         */
+    .long   I2C1_IRQHandler             /* 27: I2C1                         */
+    .long   I2C2_IRQHandler             /* 28: I2C2                         */
+    .long   0                           /* 29: Reserved                     */
+    .long   SSP0_IRQHandler             /* 30: SSP0                         */
+    .long   SSP1_IRQHandler             /* 31: SSP1                         */
+    .long   PLL0_IRQHandler             /* 32: PLL0 Lock (Main PLL)         */
+    .long   RTC_IRQHandler              /* 33: Real Time Clock              */
+    .long   EINT0_IRQHandler            /* 34: External Interrupt 0         */
+    .long   EINT1_IRQHandler            /* 35: External Interrupt 1         */
+    .long   EINT2_IRQHandler            /* 36: External Interrupt 2         */
+    .long   EINT3_IRQHandler            /* 37: External Interrupt 3         */
+    .long   ADC_IRQHandler              /* 38: A/D Converter                */
+    .long   BOD_IRQHandler              /* 39: Brown-Out Detect             */
+    .long   USB_IRQHandler              /* 40: USB                          */
+    .long   CAN_IRQHandler              /* 41: CAN                          */
+    .long   DMA_IRQHandler              /* 42: General Purpose DMA          */
+    .long   I2S_IRQHandler              /* 43: I2S                          */
+    .long   ENET_IRQHandler             /* 44: Ethernet                     */
+    .long   MCI_IRQHandler              /* 45: SD/MMC carf I/F              */
+    .long   MCPWM_IRQHandler            /* 46: Motor Control PWM            */
+    .long   QEI_IRQHandler              /* 47: Quadrature Encoder Interface */
+    .long   PLL1_IRQHandler             /* 48: PLL1 Lock (USB PLL)          */
+    .long   USBActivity_IRQHandler      /* 49: USB Activity                 */
+    .long   CANActivity_IRQHandler      /* 50: CAN Activity                 */
+    .long   UART4_IRQHandler            /* 51: UART4                        */
+    .long   SSP2_IRQHandler             /* 52: SSP2                         */
+    .long   LCD_IRQHandler              /* 53: LCD                          */
+    .long   GPIO_IRQHandler             /* 54: GPIO                         */
+    .long   PWM0_IRQHandler             /* 55: PWM0                         */
+    .long   EEPROM_IRQHandler           /* 56: EEPROM                       */    
+
+    .size    __isr_vector, . - __isr_vector
+
+    .text
+    .thumb
+    .thumb_func
+    .align 2
+    .globl    Reset_Handler
+    .type    Reset_Handler, %function
+Reset_Handler:
+/*     Loop to copy data from read only memory to RAM. The ranges
+ *      of copy from/to are specified by following symbols evaluated in 
+ *      linker script.
+ *      _etext: End of code section, i.e., begin of data sections to copy from.
+ *      __data_start__/__data_end__: RAM address range that data should be
+ *      copied to. Both must be aligned to 4 bytes boundary.  */
+
+    ldr    r1, =__etext
+    ldr    r2, =__data_start__
+    ldr    r3, =__data_end__
+
+.Lflash_to_ram_loop:
+    cmp     r2, r3
+    ittt    lt
+    ldrlt   r0, [r1], #4
+    strlt   r0, [r2], #4
+    blt    .Lflash_to_ram_loop
+
+    ldr    r0, =SystemInit
+    blx    r0
+    ldr    r0, =_start
+    bx    r0
+    .pool
+    .size Reset_Handler, . - Reset_Handler
+    
+    .text
+/*    Macro to define default handlers. Default handler
+ *    will be weak symbol and just dead loops. They can be
+ *    overwritten by other handlers */
+    .macro    def_default_handler    handler_name
+    .align 1
+    .thumb_func
+    .weak    \handler_name
+    .type    \handler_name, %function
+\handler_name :
+    b    .
+    .size    \handler_name, . - \handler_name
+    .endm
+
+    def_default_handler    NMI_Handler
+    def_default_handler    HardFault_Handler
+    def_default_handler    MemManage_Handler
+    def_default_handler    BusFault_Handler
+    def_default_handler    UsageFault_Handler
+    def_default_handler    SVC_Handler
+    def_default_handler    DebugMon_Handler
+    def_default_handler    PendSV_Handler
+    def_default_handler    SysTick_Handler
+    def_default_handler    Default_Handler
+
+    .macro    def_irq_default_handler    handler_name
+    .weak     \handler_name
+    .set      \handler_name, Default_Handler
+    .endm
+    
+    def_irq_default_handler     WDT_IRQHandler
+    def_irq_default_handler     TIMER0_IRQHandler
+    def_irq_default_handler     TIMER1_IRQHandler
+    def_irq_default_handler     TIMER2_IRQHandler
+    def_irq_default_handler     TIMER3_IRQHandler
+    def_irq_default_handler     UART0_IRQHandler
+    def_irq_default_handler     UART1_IRQHandler
+    def_irq_default_handler     UART2_IRQHandler
+    def_irq_default_handler     UART3_IRQHandler
+    def_irq_default_handler     PWM1_IRQHandler
+    def_irq_default_handler     I2C0_IRQHandler
+    def_irq_default_handler     I2C1_IRQHandler
+    def_irq_default_handler     I2C2_IRQHandler
+/*    def_irq_default_handler     SPI_IRQHandler */
+    def_irq_default_handler     SSP0_IRQHandler
+    def_irq_default_handler     SSP1_IRQHandler
+    def_irq_default_handler     PLL0_IRQHandler
+    def_irq_default_handler     RTC_IRQHandler
+    def_irq_default_handler     EINT0_IRQHandler
+    def_irq_default_handler     EINT1_IRQHandler
+    def_irq_default_handler     EINT2_IRQHandler
+    def_irq_default_handler     EINT3_IRQHandler
+    def_irq_default_handler     ADC_IRQHandler
+    def_irq_default_handler     BOD_IRQHandler
+    def_irq_default_handler     USB_IRQHandler
+    def_irq_default_handler     CAN_IRQHandler
+    def_irq_default_handler     DMA_IRQHandler
+    def_irq_default_handler     I2S_IRQHandler
+    def_irq_default_handler     ENET_IRQHandler
+    def_irq_default_handler     MCI_IRQHandler
+    def_irq_default_handler     MCPWM_IRQHandler
+    def_irq_default_handler     QEI_IRQHandler
+    def_irq_default_handler     PLL1_IRQHandler
+    def_irq_default_handler     USBActivity_IRQHandler
+    def_irq_default_handler     CANActivity_IRQHandler
+    def_irq_default_handler     UART4_IRQHandler
+    def_irq_default_handler     SSP2_IRQHandler
+    def_irq_default_handler     LCD_IRQHandler
+    def_irq_default_handler     GPIO_IRQHandler
+    def_irq_default_handler     PWM0_IRQHandler
+    def_irq_default_handler     EEPROM_IRQHandler    
+    def_irq_default_handler     DEF_IRQHandler
+
+    .end
+