mbed library sources
Dependents: Freedman_v2 Nucleo_i2c_OLED_BME280_copy
Fork of mbed-src by
Diff: targets/hal/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/PeripheralPins.c
- Revision:
- 558:0880f51c4036
- Child:
- 567:a97fd0eca828
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/targets/hal/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/PeripheralPins.c Wed Jun 03 09:00:09 2015 +0100 @@ -0,0 +1,105 @@ +/* mbed Microcontroller Library + ******************************************************************************* + * Copyright (c) 2015 WIZnet Co.,Ltd. All rights reserved. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of ARM Limited nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + ******************************************************************************* + */ + +#include "PeripheralPins.h" +#include "PeripheralNames.h" +#include "pinmap.h" + + +//*** ADC *** +const PinMap PinMap_ADC[] = { + {PC_15, ADC_0, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_PULLUP, Px_AFSR_AF3)}, // ADC0_IN0 + {PC_14, ADC_0, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_PULLUP, Px_AFSR_AF3)}, // ADC0_IN1 + {PC_13, ADC_0, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_PULLUP, Px_AFSR_AF3)}, // ADC0_IN2 + {PC_12, ADC_0, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_PULLUP, Px_AFSR_AF3)}, // ADC0_IN3 + {PC_11, ADC_0, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_PULLUP, Px_AFSR_AF3)}, // ADC0_IN4 + {PC_10, ADC_0, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_PULLUP, Px_AFSR_AF3)}, // ADC0_IN5 + {NC, NC, 0} +}; + + +//*** SERIAL *** +const PinMap PinMap_UART_TX[] = { + {PA_14, UART_0, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_PULLUP, Px_AFSR_AF0)}, + {PC_2, UART_1, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_PULLUP, Px_AFSR_AF0)}, + {NC, NC, 0} +}; + +const PinMap PinMap_UART_RX[] = { + {PA_13, UART_0, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_PULLUP, Px_AFSR_AF0)}, + {PC_3, UART_1, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_PULLUP, Px_AFSR_AF0)}, + {NC, NC, 0} +}; + +//*** I2C *** +const PinMap PinMap_I2C_SDA[] = { + {PA_10, I2C_0, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF0)}, + {NC, NC, 0} +}; + +const PinMap PinMap_I2C_SCL[] = { + {PA_9, I2C_0, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF0)}, + {NC, NC, 0} +}; + +//*** SPI *** + +const PinMap PinMap_SPI_SCLK[] = { + {PA_6 , SPI_0, 0}, + {PB_1 , SPI_1, 0}, + {PC_12, SPI_0, 3}, + {PA_12, SPI_1, 3}, + {NC , NC , 0} +}; + +const PinMap PinMap_SPI_MOSI[] = { + {PA_8 , SPI_0, 0}, + {PB_3 , SPI_1, 0}, + {PC_10, SPI_0, 3}, + {PA_14, SPI_1, 3}, + {NC , NC , 0} +}; + +const PinMap PinMap_SPI_MISO[] = { + {PA_7 , SPI_0, 0}, + {PB_2 , SPI_1, 0}, + {PC_11, SPI_0, 3}, + {PA_13, SPI_1, 3}, + {NC , NC , 0} +}; + +const PinMap PinMap_SPI_SSEL[] = { + {PA_5 , SPI_0, 0}, + {PB_0 , SPI_1, 0}, + {PC_13, SPI_0, 3}, + {PA_11, SPI_1, 3}, + {NC , NC , 0} +}; +