mbed library sources

Dependents:   Freedman_v2 Nucleo_i2c_OLED_BME280_copy

Fork of mbed-src by mbed official

Committer:
mbed_official
Date:
Wed Jun 17 09:00:08 2015 +0100
Revision:
571:1f7ee966c9ea
Parent:
363:12a245e5c745
Synchronized with git revision b583f22771ff3a95879587f55a8f9392cfac2955

Full URL: https://github.com/mbedmicro/mbed/commit/b583f22771ff3a95879587f55a8f9392cfac2955/

Fix handling of Serial NC pins in K64F,K22F,KL25Z, and KL46Z

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 82:0b31dbcd4769 1 /* mbed Microcontroller Library
mbed_official 82:0b31dbcd4769 2 * Copyright (c) 2006-2013 ARM Limited
mbed_official 82:0b31dbcd4769 3 *
mbed_official 82:0b31dbcd4769 4 * Licensed under the Apache License, Version 2.0 (the "License");
mbed_official 82:0b31dbcd4769 5 * you may not use this file except in compliance with the License.
mbed_official 82:0b31dbcd4769 6 * You may obtain a copy of the License at
mbed_official 82:0b31dbcd4769 7 *
mbed_official 82:0b31dbcd4769 8 * http://www.apache.org/licenses/LICENSE-2.0
mbed_official 82:0b31dbcd4769 9 *
mbed_official 82:0b31dbcd4769 10 * Unless required by applicable law or agreed to in writing, software
mbed_official 82:0b31dbcd4769 11 * distributed under the License is distributed on an "AS IS" BASIS,
mbed_official 82:0b31dbcd4769 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
mbed_official 82:0b31dbcd4769 13 * See the License for the specific language governing permissions and
mbed_official 82:0b31dbcd4769 14 * limitations under the License.
mbed_official 82:0b31dbcd4769 15 */
mbed_official 227:7bd0639b8911 16 #include "mbed_assert.h"
mbed_official 82:0b31dbcd4769 17 #include "serial_api.h"
mbed_official 82:0b31dbcd4769 18
mbed_official 82:0b31dbcd4769 19 // math.h required for floating point operations for baud rate calculation
mbed_official 82:0b31dbcd4769 20 #include <math.h>
mbed_official 82:0b31dbcd4769 21
mbed_official 82:0b31dbcd4769 22 #include <string.h>
mbed_official 82:0b31dbcd4769 23
mbed_official 82:0b31dbcd4769 24 #include "cmsis.h"
mbed_official 82:0b31dbcd4769 25 #include "pinmap.h"
mbed_official 82:0b31dbcd4769 26 #include "clk_freqs.h"
mbed_official 82:0b31dbcd4769 27 #include "PeripheralPins.h"
mbed_official 82:0b31dbcd4769 28
mbed_official 82:0b31dbcd4769 29 //Devices either user UART0 or UARTLP
mbed_official 82:0b31dbcd4769 30 #ifndef UARTLP_BASES
mbed_official 82:0b31dbcd4769 31 #define UARTLP_C2_RE_MASK UART0_C2_RE_MASK
mbed_official 82:0b31dbcd4769 32 #define UARTLP_C2_TE_MASK UART0_C2_TE_MASK
mbed_official 82:0b31dbcd4769 33 #define UARTLP_BDH_SBNS_MASK UART0_BDH_SBNS_MASK
mbed_official 82:0b31dbcd4769 34 #define UARTLP_BDH_SBNS_SHIFT UART0_BDH_SBNS_SHIFT
mbed_official 82:0b31dbcd4769 35 #define UARTLP_S1_TDRE_MASK UART0_S1_TDRE_MASK
mbed_official 571:1f7ee966c9ea 36 #define UARTLP_S1_TC_MASK UART0_S1_TC_MASK
mbed_official 82:0b31dbcd4769 37 #define UARTLP_S1_OR_MASK UART0_S1_OR_MASK
mbed_official 82:0b31dbcd4769 38 #define UARTLP_C2_RIE_MASK UART0_C2_RIE_MASK
mbed_official 82:0b31dbcd4769 39 #define UARTLP_C2_TIE_MASK UART0_C2_TIE_MASK
mbed_official 82:0b31dbcd4769 40 #define UARTLP_C2_SBK_MASK UART0_C2_SBK_MASK
mbed_official 82:0b31dbcd4769 41 #define UARTLP_S1_RDRF_MASK UART0_S1_RDRF_MASK
mbed_official 82:0b31dbcd4769 42 #endif
mbed_official 82:0b31dbcd4769 43
mbed_official 82:0b31dbcd4769 44 #ifdef UART2
mbed_official 82:0b31dbcd4769 45 #define UART_NUM 3
mbed_official 82:0b31dbcd4769 46 #else
mbed_official 82:0b31dbcd4769 47 #define UART_NUM 1
mbed_official 82:0b31dbcd4769 48 #endif
mbed_official 82:0b31dbcd4769 49
mbed_official 82:0b31dbcd4769 50 /******************************************************************************
mbed_official 82:0b31dbcd4769 51 * INITIALIZATION
mbed_official 82:0b31dbcd4769 52 ******************************************************************************/
mbed_official 82:0b31dbcd4769 53
mbed_official 82:0b31dbcd4769 54 static uint32_t serial_irq_ids[UART_NUM] = {0};
mbed_official 82:0b31dbcd4769 55 static uart_irq_handler irq_handler;
mbed_official 82:0b31dbcd4769 56
mbed_official 82:0b31dbcd4769 57 int stdio_uart_inited = 0;
mbed_official 82:0b31dbcd4769 58 serial_t stdio_uart;
mbed_official 82:0b31dbcd4769 59
mbed_official 82:0b31dbcd4769 60 void serial_init(serial_t *obj, PinName tx, PinName rx) {
mbed_official 82:0b31dbcd4769 61 // determine the UART to use
mbed_official 82:0b31dbcd4769 62 UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
mbed_official 82:0b31dbcd4769 63 UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
mbed_official 82:0b31dbcd4769 64 UARTName uart = (UARTName)pinmap_merge(uart_tx, uart_rx);
mbed_official 227:7bd0639b8911 65 MBED_ASSERT((int)uart != NC);
mbed_official 82:0b31dbcd4769 66
mbed_official 82:0b31dbcd4769 67 obj->uart = (UARTLP_Type *)uart;
mbed_official 82:0b31dbcd4769 68 // enable clk
mbed_official 82:0b31dbcd4769 69 switch (uart) {
mbed_official 82:0b31dbcd4769 70 case UART_0: if (mcgpllfll_frequency() != 0) //PLL/FLL is selected
mbed_official 82:0b31dbcd4769 71 SIM->SOPT2 |= (1<<SIM_SOPT2_UART0SRC_SHIFT);
mbed_official 82:0b31dbcd4769 72 else
mbed_official 82:0b31dbcd4769 73 SIM->SOPT2 |= (2<<SIM_SOPT2_UART0SRC_SHIFT);
mbed_official 82:0b31dbcd4769 74 SIM->SCGC4 |= SIM_SCGC4_UART0_MASK; break;
mbed_official 82:0b31dbcd4769 75 #if UART_NUM > 1
mbed_official 82:0b31dbcd4769 76 case UART_1: SIM->SCGC4 |= SIM_SCGC4_UART1_MASK; break;
mbed_official 82:0b31dbcd4769 77 case UART_2: SIM->SCGC4 |= SIM_SCGC4_UART2_MASK; break;
mbed_official 82:0b31dbcd4769 78 #endif
mbed_official 82:0b31dbcd4769 79 }
mbed_official 82:0b31dbcd4769 80 // Disable UART before changing registers
mbed_official 82:0b31dbcd4769 81 obj->uart->C2 &= ~(UARTLP_C2_RE_MASK | UARTLP_C2_TE_MASK);
mbed_official 571:1f7ee966c9ea 82
mbed_official 571:1f7ee966c9ea 83 // Enable UART transmitter to ensure TX activity is finished
mbed_official 571:1f7ee966c9ea 84 obj->uart->C2 |= UARTLP_C2_TE_MASK;
mbed_official 571:1f7ee966c9ea 85
mbed_official 571:1f7ee966c9ea 86 // Wait for TX activity to finish
mbed_official 571:1f7ee966c9ea 87 while(!(obj->uart->S1 & UARTLP_S1_TC_MASK));
mbed_official 571:1f7ee966c9ea 88
mbed_official 571:1f7ee966c9ea 89 // Disbale UARTs again
mbed_official 571:1f7ee966c9ea 90 obj->uart->C2 &= ~(UARTLP_C2_RE_MASK | UARTLP_C2_TE_MASK);
mbed_official 571:1f7ee966c9ea 91
mbed_official 571:1f7ee966c9ea 92
mbed_official 82:0b31dbcd4769 93 switch (uart) {
mbed_official 82:0b31dbcd4769 94 case UART_0: obj->index = 0; break;
mbed_official 82:0b31dbcd4769 95 #if UART_NUM > 1
mbed_official 82:0b31dbcd4769 96 case UART_1: obj->index = 1; break;
mbed_official 82:0b31dbcd4769 97 case UART_2: obj->index = 2; break;
mbed_official 82:0b31dbcd4769 98 #endif
mbed_official 82:0b31dbcd4769 99 }
mbed_official 82:0b31dbcd4769 100
mbed_official 82:0b31dbcd4769 101 // set default baud rate and format
mbed_official 82:0b31dbcd4769 102 serial_baud (obj, 9600);
mbed_official 82:0b31dbcd4769 103 serial_format(obj, 8, ParityNone, 1);
mbed_official 82:0b31dbcd4769 104
mbed_official 82:0b31dbcd4769 105 // pinout the chosen uart
mbed_official 82:0b31dbcd4769 106 pinmap_pinout(tx, PinMap_UART_TX);
mbed_official 82:0b31dbcd4769 107 pinmap_pinout(rx, PinMap_UART_RX);
mbed_official 82:0b31dbcd4769 108
mbed_official 571:1f7ee966c9ea 109 // set rx/tx pins in PullUp mode and enable TX/RX
mbed_official 339:40bd4701f3e2 110 if (tx != NC) {
mbed_official 571:1f7ee966c9ea 111 obj->uart->C2 |= UARTLP_C2_TE_MASK;
mbed_official 339:40bd4701f3e2 112 pin_mode(tx, PullUp);
mbed_official 339:40bd4701f3e2 113 }
mbed_official 339:40bd4701f3e2 114 if (rx != NC) {
mbed_official 571:1f7ee966c9ea 115 obj->uart->C2 |= UARTLP_C2_RE_MASK;
mbed_official 339:40bd4701f3e2 116 pin_mode(rx, PullUp);
mbed_official 339:40bd4701f3e2 117 }
mbed_official 82:0b31dbcd4769 118
mbed_official 82:0b31dbcd4769 119 if (uart == STDIO_UART) {
mbed_official 82:0b31dbcd4769 120 stdio_uart_inited = 1;
mbed_official 82:0b31dbcd4769 121 memcpy(&stdio_uart, obj, sizeof(serial_t));
mbed_official 82:0b31dbcd4769 122 }
mbed_official 82:0b31dbcd4769 123 }
mbed_official 82:0b31dbcd4769 124
mbed_official 82:0b31dbcd4769 125 void serial_free(serial_t *obj) {
mbed_official 82:0b31dbcd4769 126 serial_irq_ids[obj->index] = 0;
mbed_official 82:0b31dbcd4769 127 }
mbed_official 82:0b31dbcd4769 128
mbed_official 82:0b31dbcd4769 129 // serial_baud
mbed_official 82:0b31dbcd4769 130 //
mbed_official 82:0b31dbcd4769 131 // set the baud rate, taking in to account the current SystemFrequency
mbed_official 82:0b31dbcd4769 132 void serial_baud(serial_t *obj, int baudrate) {
mbed_official 571:1f7ee966c9ea 133
mbed_official 82:0b31dbcd4769 134 // save C2 state
mbed_official 82:0b31dbcd4769 135 uint8_t c2_state = (obj->uart->C2 & (UARTLP_C2_RE_MASK | UARTLP_C2_TE_MASK));
mbed_official 571:1f7ee966c9ea 136
mbed_official 82:0b31dbcd4769 137 // Disable UART before changing registers
mbed_official 82:0b31dbcd4769 138 obj->uart->C2 &= ~(UARTLP_C2_RE_MASK | UARTLP_C2_TE_MASK);
mbed_official 571:1f7ee966c9ea 139
mbed_official 82:0b31dbcd4769 140 uint32_t PCLK;
mbed_official 82:0b31dbcd4769 141 if (obj->uart == UART0) {
mbed_official 82:0b31dbcd4769 142 if (mcgpllfll_frequency() != 0)
mbed_official 82:0b31dbcd4769 143 PCLK = mcgpllfll_frequency();
mbed_official 82:0b31dbcd4769 144 else
mbed_official 82:0b31dbcd4769 145 PCLK = extosc_frequency();
mbed_official 82:0b31dbcd4769 146 } else
mbed_official 82:0b31dbcd4769 147 PCLK = bus_frequency();
mbed_official 82:0b31dbcd4769 148
mbed_official 82:0b31dbcd4769 149 // First we check to see if the basic divide with no DivAddVal/MulVal
mbed_official 82:0b31dbcd4769 150 // ratio gives us an integer result. If it does, we set DivAddVal = 0,
mbed_official 82:0b31dbcd4769 151 // MulVal = 1. Otherwise, we search the valid ratio value range to find
mbed_official 82:0b31dbcd4769 152 // the closest match. This could be more elegant, using search methods
mbed_official 82:0b31dbcd4769 153 // and/or lookup tables, but the brute force method is not that much
mbed_official 82:0b31dbcd4769 154 // slower, and is more maintainable.
mbed_official 82:0b31dbcd4769 155 uint16_t DL = PCLK / (16 * baudrate);
mbed_official 82:0b31dbcd4769 156
mbed_official 82:0b31dbcd4769 157 // set BDH and BDL
mbed_official 82:0b31dbcd4769 158 obj->uart->BDH = (obj->uart->BDH & ~(0x1f)) | ((DL >> 8) & 0x1f);
mbed_official 82:0b31dbcd4769 159 obj->uart->BDL = (obj->uart->BDL & ~(0xff)) | ((DL >> 0) & 0xff);
mbed_official 571:1f7ee966c9ea 160
mbed_official 82:0b31dbcd4769 161 // restore C2 state
mbed_official 82:0b31dbcd4769 162 obj->uart->C2 |= c2_state;
mbed_official 82:0b31dbcd4769 163 }
mbed_official 82:0b31dbcd4769 164
mbed_official 82:0b31dbcd4769 165 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
mbed_official 227:7bd0639b8911 166 MBED_ASSERT((stop_bits == 1) || (stop_bits == 2));
mbed_official 227:7bd0639b8911 167 MBED_ASSERT((parity == ParityNone) || (parity == ParityOdd) || (parity == ParityEven));
mbed_official 227:7bd0639b8911 168 MBED_ASSERT(data_bits == 8); // TODO: Support other number of data bits (also in the write method!)
mbed_official 227:7bd0639b8911 169
mbed_official 82:0b31dbcd4769 170 // save C2 state
mbed_official 82:0b31dbcd4769 171 uint8_t c2_state = (obj->uart->C2 & (UARTLP_C2_RE_MASK | UARTLP_C2_TE_MASK));
mbed_official 571:1f7ee966c9ea 172
mbed_official 82:0b31dbcd4769 173 // Disable UART before changing registers
mbed_official 82:0b31dbcd4769 174 obj->uart->C2 &= ~(UARTLP_C2_RE_MASK | UARTLP_C2_TE_MASK);
mbed_official 571:1f7ee966c9ea 175
mbed_official 82:0b31dbcd4769 176
mbed_official 82:0b31dbcd4769 177 uint8_t parity_enable, parity_select;
mbed_official 82:0b31dbcd4769 178 switch (parity) {
mbed_official 82:0b31dbcd4769 179 case ParityNone: parity_enable = 0; parity_select = 0; break;
mbed_official 82:0b31dbcd4769 180 case ParityOdd : parity_enable = 1; parity_select = 1; data_bits++; break;
mbed_official 82:0b31dbcd4769 181 case ParityEven: parity_enable = 1; parity_select = 0; data_bits++; break;
mbed_official 82:0b31dbcd4769 182 default:
mbed_official 227:7bd0639b8911 183 break;
mbed_official 82:0b31dbcd4769 184 }
mbed_official 82:0b31dbcd4769 185
mbed_official 82:0b31dbcd4769 186 stop_bits -= 1;
mbed_official 82:0b31dbcd4769 187
mbed_official 82:0b31dbcd4769 188 // data bits, parity and parity mode
mbed_official 82:0b31dbcd4769 189 obj->uart->C1 = ((parity_enable << 1)
mbed_official 82:0b31dbcd4769 190 | (parity_select << 0));
mbed_official 571:1f7ee966c9ea 191
mbed_official 82:0b31dbcd4769 192 // stop bits
mbed_official 82:0b31dbcd4769 193 obj->uart->BDH &= ~UARTLP_BDH_SBNS_MASK;
mbed_official 82:0b31dbcd4769 194 obj->uart->BDH |= (stop_bits << UARTLP_BDH_SBNS_SHIFT);
mbed_official 571:1f7ee966c9ea 195
mbed_official 82:0b31dbcd4769 196 // restore C2 state
mbed_official 82:0b31dbcd4769 197 obj->uart->C2 |= c2_state;
mbed_official 82:0b31dbcd4769 198 }
mbed_official 82:0b31dbcd4769 199
mbed_official 82:0b31dbcd4769 200 /******************************************************************************
mbed_official 82:0b31dbcd4769 201 * INTERRUPTS HANDLING
mbed_official 82:0b31dbcd4769 202 ******************************************************************************/
mbed_official 82:0b31dbcd4769 203 static inline void uart_irq(uint8_t status, uint32_t index) {
mbed_official 82:0b31dbcd4769 204 if (serial_irq_ids[index] != 0) {
mbed_official 82:0b31dbcd4769 205 if (status & UARTLP_S1_TDRE_MASK)
mbed_official 82:0b31dbcd4769 206 irq_handler(serial_irq_ids[index], TxIrq);
mbed_official 82:0b31dbcd4769 207
mbed_official 82:0b31dbcd4769 208 if (status & UARTLP_S1_RDRF_MASK)
mbed_official 82:0b31dbcd4769 209 irq_handler(serial_irq_ids[index], RxIrq);
mbed_official 82:0b31dbcd4769 210 }
mbed_official 82:0b31dbcd4769 211 }
mbed_official 82:0b31dbcd4769 212
mbed_official 82:0b31dbcd4769 213 void uart0_irq() {
mbed_official 82:0b31dbcd4769 214 uart_irq(UART0->S1, 0);
mbed_official 82:0b31dbcd4769 215 if (UART0->S1 & UARTLP_S1_OR_MASK)
mbed_official 82:0b31dbcd4769 216 UART0->S1 |= UARTLP_S1_OR_MASK;
mbed_official 82:0b31dbcd4769 217 }
mbed_official 82:0b31dbcd4769 218 #if UART_NUM > 1
mbed_official 82:0b31dbcd4769 219 void uart1_irq() {uart_irq(UART1->S1, 1);}
mbed_official 82:0b31dbcd4769 220 void uart2_irq() {uart_irq(UART2->S1, 2);}
mbed_official 82:0b31dbcd4769 221 #endif
mbed_official 82:0b31dbcd4769 222
mbed_official 82:0b31dbcd4769 223 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
mbed_official 82:0b31dbcd4769 224 irq_handler = handler;
mbed_official 82:0b31dbcd4769 225 serial_irq_ids[obj->index] = id;
mbed_official 82:0b31dbcd4769 226 }
mbed_official 82:0b31dbcd4769 227
mbed_official 82:0b31dbcd4769 228 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
mbed_official 82:0b31dbcd4769 229 IRQn_Type irq_n = (IRQn_Type)0;
mbed_official 82:0b31dbcd4769 230 uint32_t vector = 0;
mbed_official 82:0b31dbcd4769 231 switch ((int)obj->uart) {
mbed_official 82:0b31dbcd4769 232 case UART_0: irq_n=UART0_IRQn; vector = (uint32_t)&uart0_irq; break;
mbed_official 82:0b31dbcd4769 233 #if UART_NUM > 1
mbed_official 82:0b31dbcd4769 234 case UART_1: irq_n=UART1_IRQn; vector = (uint32_t)&uart1_irq; break;
mbed_official 82:0b31dbcd4769 235 case UART_2: irq_n=UART2_IRQn; vector = (uint32_t)&uart2_irq; break;
mbed_official 82:0b31dbcd4769 236 #endif
mbed_official 82:0b31dbcd4769 237 }
mbed_official 82:0b31dbcd4769 238
mbed_official 82:0b31dbcd4769 239 if (enable) {
mbed_official 82:0b31dbcd4769 240 switch (irq) {
mbed_official 82:0b31dbcd4769 241 case RxIrq: obj->uart->C2 |= (UARTLP_C2_RIE_MASK); break;
mbed_official 82:0b31dbcd4769 242 case TxIrq: obj->uart->C2 |= (UARTLP_C2_TIE_MASK); break;
mbed_official 82:0b31dbcd4769 243 }
mbed_official 82:0b31dbcd4769 244 NVIC_SetVector(irq_n, vector);
mbed_official 82:0b31dbcd4769 245 NVIC_EnableIRQ(irq_n);
mbed_official 82:0b31dbcd4769 246
mbed_official 82:0b31dbcd4769 247 } else { // disable
mbed_official 82:0b31dbcd4769 248 int all_disabled = 0;
mbed_official 82:0b31dbcd4769 249 SerialIrq other_irq = (irq == RxIrq) ? (TxIrq) : (RxIrq);
mbed_official 82:0b31dbcd4769 250 switch (irq) {
mbed_official 82:0b31dbcd4769 251 case RxIrq: obj->uart->C2 &= ~(UARTLP_C2_RIE_MASK); break;
mbed_official 82:0b31dbcd4769 252 case TxIrq: obj->uart->C2 &= ~(UARTLP_C2_TIE_MASK); break;
mbed_official 82:0b31dbcd4769 253 }
mbed_official 82:0b31dbcd4769 254 switch (other_irq) {
mbed_official 82:0b31dbcd4769 255 case RxIrq: all_disabled = (obj->uart->C2 & (UARTLP_C2_RIE_MASK)) == 0; break;
mbed_official 82:0b31dbcd4769 256 case TxIrq: all_disabled = (obj->uart->C2 & (UARTLP_C2_TIE_MASK)) == 0; break;
mbed_official 82:0b31dbcd4769 257 }
mbed_official 82:0b31dbcd4769 258 if (all_disabled)
mbed_official 82:0b31dbcd4769 259 NVIC_DisableIRQ(irq_n);
mbed_official 82:0b31dbcd4769 260 }
mbed_official 82:0b31dbcd4769 261 }
mbed_official 82:0b31dbcd4769 262
mbed_official 82:0b31dbcd4769 263 /******************************************************************************
mbed_official 82:0b31dbcd4769 264 * READ/WRITE
mbed_official 82:0b31dbcd4769 265 ******************************************************************************/
mbed_official 82:0b31dbcd4769 266 int serial_getc(serial_t *obj) {
mbed_official 82:0b31dbcd4769 267 while (!serial_readable(obj));
mbed_official 82:0b31dbcd4769 268 return obj->uart->D;
mbed_official 82:0b31dbcd4769 269 }
mbed_official 82:0b31dbcd4769 270
mbed_official 82:0b31dbcd4769 271 void serial_putc(serial_t *obj, int c) {
mbed_official 82:0b31dbcd4769 272 while (!serial_writable(obj));
mbed_official 82:0b31dbcd4769 273 obj->uart->D = c;
mbed_official 82:0b31dbcd4769 274 }
mbed_official 82:0b31dbcd4769 275
mbed_official 82:0b31dbcd4769 276 int serial_readable(serial_t *obj) {
mbed_official 82:0b31dbcd4769 277 // check overrun
mbed_official 82:0b31dbcd4769 278 if (obj->uart->S1 & UARTLP_S1_OR_MASK) {
mbed_official 82:0b31dbcd4769 279 obj->uart->S1 |= UARTLP_S1_OR_MASK;
mbed_official 82:0b31dbcd4769 280 }
mbed_official 82:0b31dbcd4769 281 return (obj->uart->S1 & UARTLP_S1_RDRF_MASK);
mbed_official 82:0b31dbcd4769 282 }
mbed_official 82:0b31dbcd4769 283
mbed_official 82:0b31dbcd4769 284 int serial_writable(serial_t *obj) {
mbed_official 82:0b31dbcd4769 285 // check overrun
mbed_official 82:0b31dbcd4769 286 if (obj->uart->S1 & UARTLP_S1_OR_MASK) {
mbed_official 82:0b31dbcd4769 287 obj->uart->S1 |= UARTLP_S1_OR_MASK;
mbed_official 82:0b31dbcd4769 288 }
mbed_official 82:0b31dbcd4769 289 return (obj->uart->S1 & UARTLP_S1_TDRE_MASK);
mbed_official 82:0b31dbcd4769 290 }
mbed_official 82:0b31dbcd4769 291
mbed_official 82:0b31dbcd4769 292 void serial_clear(serial_t *obj) {
mbed_official 82:0b31dbcd4769 293 }
mbed_official 82:0b31dbcd4769 294
mbed_official 82:0b31dbcd4769 295 void serial_pinout_tx(PinName tx) {
mbed_official 82:0b31dbcd4769 296 pinmap_pinout(tx, PinMap_UART_TX);
mbed_official 82:0b31dbcd4769 297 }
mbed_official 82:0b31dbcd4769 298
mbed_official 82:0b31dbcd4769 299 void serial_break_set(serial_t *obj) {
mbed_official 227:7bd0639b8911 300 obj->uart->C2 |= UARTLP_C2_SBK_MASK;
mbed_official 82:0b31dbcd4769 301 }
mbed_official 82:0b31dbcd4769 302
mbed_official 82:0b31dbcd4769 303 void serial_break_clear(serial_t *obj) {
mbed_official 82:0b31dbcd4769 304 obj->uart->C2 &= ~UARTLP_C2_SBK_MASK;
mbed_official 82:0b31dbcd4769 305 }