DongEun Koak / mbed-src

mbed library sources

Dependents:   Freedman_v2 Nucleo_i2c_OLED_BME280_copy

Fork of mbed-src by mbed official

targets/cmsis/TARGET_WIZNET/TARGET_W7500x/W7500x_i2c.h@558:0880f51c4036, 2015-06-03 (annotated)

Committer:
mbed_official
Date:
Wed Jun 03 09:00:09 2015 +0100
Revision:
558:0880f51c4036
Child:
576:99a3d3d9c43f
Synchronized with git revision 927c31ab8457cfef0ee8a8316117b7a41fd79133



Full URL: https://github.com/mbedmicro/mbed/commit/927c31ab8457cfef0ee8a8316117b7a41fd79133/



Add WIZwiki-W7500

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 558:0880f51c4036 1 #include "W7500x.h"
mbed_official 558:0880f51c4036 2
mbed_official 558:0880f51c4036 3 /**
mbed_official 558:0880f51c4036 4 * @defgroup I2C_Public_Types I2X Public Types
mbed_official 558:0880f51c4036 5 */
mbed_official 558:0880f51c4036 6 typedef enum
mbed_official 558:0880f51c4036 7 {
mbed_official 558:0880f51c4036 8 I2C_WRITE_SA7=0,
mbed_official 558:0880f51c4036 9 I2C_READ_SA7,
mbed_official 558:0880f51c4036 10 //I2C_WRITE_SA10,
mbed_official 558:0880f51c4036 11 //I2C_READ_SA10,
mbed_official 558:0880f51c4036 12 I2C_CTRWRITE_SA7,
mbed_official 558:0880f51c4036 13 I2C_CTRREAD_SA7,
mbed_official 558:0880f51c4036 14 //I2C_CTRWRITE_SA10,
mbed_official 558:0880f51c4036 15 //I2C_CTRREAD_SA10,
mbed_official 558:0880f51c4036 16 } I2C_CTR;
mbed_official 558:0880f51c4036 17
mbed_official 558:0880f51c4036 18 typedef enum
mbed_official 558:0880f51c4036 19 {
mbed_official 558:0880f51c4036 20 I2C_ACKR=0,
mbed_official 558:0880f51c4036 21 I2C_ACKT,
mbed_official 558:0880f51c4036 22 I2C_OACKR,
mbed_official 558:0880f51c4036 23 I2C_SACKR,
mbed_official 558:0880f51c4036 24 I2C_BT,
mbed_official 558:0880f51c4036 25 } I2C_SR;
mbed_official 558:0880f51c4036 26
mbed_official 558:0880f51c4036 27
mbed_official 558:0880f51c4036 28 typedef enum
mbed_official 558:0880f51c4036 29 {
mbed_official 558:0880f51c4036 30 INT_ACKR=-1,
mbed_official 558:0880f51c4036 31 INT_ACKT=-2,
mbed_official 558:0880f51c4036 32 INT_NACKR=-3,
mbed_official 558:0880f51c4036 33 INT_NACKT=-4,
mbed_official 558:0880f51c4036 34 INT_BT=-5,
mbed_official 558:0880f51c4036 35 } I2C_ERROR;
mbed_official 558:0880f51c4036 36
mbed_official 558:0880f51c4036 37
mbed_official 558:0880f51c4036 38 /**
mbed_official 558:0880f51c4036 39 *@
mbed_official 558:0880f51c4036 40 */
mbed_official 558:0880f51c4036 41 /** @defgroup I2C_registers
mbed_official 558:0880f51c4036 42 * @{
mbed_official 558:0880f51c4036 43 */
mbed_official 558:0880f51c4036 44
mbed_official 558:0880f51c4036 45 #define I2C_Register_PRER ((uint8_t)0x00)
mbed_official 558:0880f51c4036 46 #define I2C_Register_CTR ((uint8_t)0x04)
mbed_official 558:0880f51c4036 47 #define I2C_Register_CMDR ((uint8_t)0x08)
mbed_official 558:0880f51c4036 48 #define I2C_Register_SR ((uint8_t)0x0C)
mbed_official 558:0880f51c4036 49 #define I2C_Register_TSR ((uint8_t)0x10)
mbed_official 558:0880f51c4036 50 #define I2C_Register_SADDR ((uint8_t)0x14)
mbed_official 558:0880f51c4036 51 #define I2C_Register_TXR ((uint8_t)0x18)
mbed_official 558:0880f51c4036 52 #define I2C_Register_RXR ((uint8_t)0x1C)
mbed_official 558:0880f51c4036 53 #define I2C_Register_ISR ((uint8_t)0x20)
mbed_official 558:0880f51c4036 54 #define I2C_Register_ISCR ((uint8_t)0x24)
mbed_official 558:0880f51c4036 55 #define I2C_Register_ISMR ((uint8_t)0x28)
mbed_official 558:0880f51c4036 56 #define IS_I2C_REGISTER(REGISTER) (((REGISTER) == I2C_Register_PRER) || \
mbed_official 558:0880f51c4036 57 ((REGISTER) == I2C_Register_CTR) || \
mbed_official 558:0880f51c4036 58 ((REGISTER) == I2C_Register_CMDR) || \
mbed_official 558:0880f51c4036 59 ((REGISTER) == I2C_Register_SR) || \
mbed_official 558:0880f51c4036 60 ((REGISTER) == I2C_Register_TSR) || \
mbed_official 558:0880f51c4036 61 ((REGISTER) == I2C_Register_SADDR) || \
mbed_official 558:0880f51c4036 62 ((REGISTER) == I2C_Register_TXR) || \
mbed_official 558:0880f51c4036 63 ((REGISTER) == I2C_Register_RXR) || \
mbed_official 558:0880f51c4036 64 ((REGISTER) == I2C_Register_ISR)|| \
mbed_official 558:0880f51c4036 65 ((REGISTER) == I2C_Register_ISCR)| \
mbed_official 558:0880f51c4036 66 ((REGISTER) == I2C_Register_ISMR))
mbed_official 558:0880f51c4036 67 /**
mbed_official 558:0880f51c4036 68 * @}
mbed_official 558:0880f51c4036 69 */
mbed_official 558:0880f51c4036 70 /** @addtogroup Peripheral_registers_structures
mbed_official 558:0880f51c4036 71 * @{
mbed_official 558:0880f51c4036 72 */
mbed_official 558:0880f51c4036 73
mbed_official 558:0880f51c4036 74
mbed_official 558:0880f51c4036 75
mbed_official 558:0880f51c4036 76
mbed_official 558:0880f51c4036 77
mbed_official 558:0880f51c4036 78
mbed_official 558:0880f51c4036 79 /**
mbed_official 558:0880f51c4036 80 * @}
mbed_official 558:0880f51c4036 81 */
mbed_official 558:0880f51c4036 82
mbed_official 558:0880f51c4036 83 /**
mbed_official 558:0880f51c4036 84 * @brief I2C Interrput Status Register Mask flags
mbed_official 558:0880f51c4036 85 */
mbed_official 558:0880f51c4036 86 //------------------------------------------------
mbed_official 558:0880f51c4036 87 // I2C_ISMR_BIT
mbed_official 558:0880f51c4036 88 //------------------------------------------------
mbed_official 558:0880f51c4036 89
mbed_official 558:0880f51c4036 90 /**
mbed_official 558:0880f51c4036 91 * @}
mbed_official 558:0880f51c4036 92 */
mbed_official 558:0880f51c4036 93
mbed_official 558:0880f51c4036 94 /** @defgroup I2C_Private_Defines
mbed_official 558:0880f51c4036 95 * @{
mbed_official 558:0880f51c4036 96 */
mbed_official 558:0880f51c4036 97 /* I2C COREEN mask */
mbed_official 558:0880f51c4036 98 #define I2C_CTR_COREEN_DIS ((uint16_t)0xFF7F)
mbed_official 558:0880f51c4036 99
mbed_official 558:0880f51c4036 100 /* I2C INTEREN mask */
mbed_official 558:0880f51c4036 101 #define I2C_CTR_INTEREN_DIS ((uint16_t)0xFFBF)
mbed_official 558:0880f51c4036 102
mbed_official 558:0880f51c4036 103 /* I2C MODE(M/SN) mask */
mbed_official 558:0880f51c4036 104 #define I2C_CTR_MODE_SLAVE ((uint16_t)0xFFDF)
mbed_official 558:0880f51c4036 105
mbed_official 558:0880f51c4036 106 /* I2C ADDR10(10/7N) mask */
mbed_official 558:0880f51c4036 107 #define I2C_CTR_ADDR10_7BIT ((uint16_t)0xFFEF)
mbed_official 558:0880f51c4036 108
mbed_official 558:0880f51c4036 109 /* I2C CTRRWN(R/WN) mask */
mbed_official 558:0880f51c4036 110 #define I2C_CTR_CTRRWN_DIS ((uint16_t)0xFFF7)
mbed_official 558:0880f51c4036 111
mbed_official 558:0880f51c4036 112 /* I2C CTREN mask */
mbed_official 558:0880f51c4036 113 #define I2C_CTR_CTEN_DIS ((uint16_t)0xFFFB)
mbed_official 558:0880f51c4036 114
mbed_official 558:0880f51c4036 115
mbed_official 558:0880f51c4036 116 /* I2C START mask */
mbed_official 558:0880f51c4036 117 #define I2C_CMDR_START_DIS ((uint16_t)0xFF7F)
mbed_official 558:0880f51c4036 118
mbed_official 558:0880f51c4036 119 /* I2C STOP mask */
mbed_official 558:0880f51c4036 120 #define I2C_CMDR_STOP_DIS ((uint16_t)0xFFBF)
mbed_official 558:0880f51c4036 121
mbed_official 558:0880f51c4036 122 /* I2C ACK mask */
mbed_official 558:0880f51c4036 123 #define I2C_CMDR_ACK_NAK ((uint16_t)0xFFDF)
mbed_official 558:0880f51c4036 124
mbed_official 558:0880f51c4036 125 /* I2C RESTART mask */
mbed_official 558:0880f51c4036 126 #define I2C_CMDR_RESTA_DIS ((uint16_t)0xFFEF)
mbed_official 558:0880f51c4036 127
mbed_official 558:0880f51c4036 128 /* I2C INTERRUPT RESET mask */
mbed_official 558:0880f51c4036 129 #define I2C_ISCR_RST_DIS ((uint16_t)0xFFFE)
mbed_official 558:0880f51c4036 130 /**
mbed_official 558:0880f51c4036 131 * @}
mbed_official 558:0880f51c4036 132 */
mbed_official 558:0880f51c4036 133
mbed_official 558:0880f51c4036 134
mbed_official 558:0880f51c4036 135
mbed_official 558:0880f51c4036 136 #define I2C_WRITE 0
mbed_official 558:0880f51c4036 137 #define I2C_READ 1
mbed_official 558:0880f51c4036 138 #define I2C_RWSEL(NewState) (((NewState) == I2C_WRITE)|| \
mbed_official 558:0880f51c4036 139 ((NewState) == I2C_READ))
mbed_official 558:0880f51c4036 140
mbed_official 558:0880f51c4036 141
mbed_official 558:0880f51c4036 142 #define I2C_Ack_Enable (0x01ul << 5)
mbed_official 558:0880f51c4036 143 #define I2C_Ack_Disable (0x00ul << 5)
mbed_official 558:0880f51c4036 144 #define IS_I2C_ACK_NewState(NewState) (((NewState) == I2C_Ack_Enable) || \
mbed_official 558:0880f51c4036 145 ((NewState) == I2C_Ack_Disable))
mbed_official 558:0880f51c4036 146
mbed_official 558:0880f51c4036 147 #define I2C_MASTER_MODE (0x01ul << 5 ) // 0x20
mbed_official 558:0880f51c4036 148 #define I2C_SLAVE_MODE (0x00ul << 5 ) // 0x20
mbed_official 558:0880f51c4036 149 #define IS_I2C_MODE(MODE) ((MODE) == I2C_MASTER_MODE)|| \
mbed_official 558:0880f51c4036 150 (MODE) == I2C_SLAVE_MODE))
mbed_official 558:0880f51c4036 151
mbed_official 558:0880f51c4036 152 #define I2C_CTR_MODE (0x01ul << 5 ) // 0x20
mbed_official 558:0880f51c4036 153
mbed_official 558:0880f51c4036 154 #define SLAVE_ADDR10 0x208
mbed_official 558:0880f51c4036 155
mbed_official 558:0880f51c4036 156
mbed_official 558:0880f51c4036 157 typedef enum
mbed_official 558:0880f51c4036 158 {
mbed_official 558:0880f51c4036 159 I2C_Master = I2C_MASTER_MODE,
mbed_official 558:0880f51c4036 160 I2C_Slave = I2C_SLAVE_MODE
mbed_official 558:0880f51c4036 161 }I2C_MODE;
mbed_official 558:0880f51c4036 162
mbed_official 558:0880f51c4036 163
mbed_official 558:0880f51c4036 164 typedef struct
mbed_official 558:0880f51c4036 165 {
mbed_official 558:0880f51c4036 166 uint8_t prescale;
mbed_official 558:0880f51c4036 167 uint16_t timeout;
mbed_official 558:0880f51c4036 168 I2C_CTR control;
mbed_official 558:0880f51c4036 169 }I2C_MasterConfStruct;
mbed_official 558:0880f51c4036 170
mbed_official 558:0880f51c4036 171
mbed_official 558:0880f51c4036 172 typedef struct
mbed_official 558:0880f51c4036 173 {
mbed_official 558:0880f51c4036 174 uint32_t mode;
mbed_official 558:0880f51c4036 175 uint16_t slave_address; // only on slave mode
mbed_official 558:0880f51c4036 176 I2C_MasterConfStruct master;
mbed_official 558:0880f51c4036 177 }I2C_ConfigStruct;
mbed_official 558:0880f51c4036 178
mbed_official 558:0880f51c4036 179
mbed_official 558:0880f51c4036 180 /** @defgroup I2C_Exported_Functions
mbed_official 558:0880f51c4036 181 * @{
mbed_official 558:0880f51c4036 182 */
mbed_official 558:0880f51c4036 183
mbed_official 558:0880f51c4036 184 uint32_t I2C_Init (I2C_TypeDef* I2Cx, I2C_ConfigStruct conf);
mbed_official 558:0880f51c4036 185 void setFrequency (I2C_TypeDef* I2Cx, uint8_t prescale);
mbed_official 558:0880f51c4036 186 void I2C_DeInit (I2C_TypeDef* I2Cx);
mbed_official 558:0880f51c4036 187
mbed_official 558:0880f51c4036 188 ErrorStatus I2C_Start (I2C_TypeDef* I2Cx, uint16_t slave_address, I2C_CTR ctr);
mbed_official 558:0880f51c4036 189 void I2C_Stop (I2C_TypeDef* I2Cx);
mbed_official 558:0880f51c4036 190 void I2C_Reset (I2C_TypeDef* I2Cx);
mbed_official 558:0880f51c4036 191
mbed_official 558:0880f51c4036 192 void I2C_SendData (I2C_TypeDef* I2Cx,uint16_t Data);
mbed_official 558:0880f51c4036 193 int8_t I2C_SendDataAck (I2C_TypeDef* I2Cx,uint16_t Data);
mbed_official 558:0880f51c4036 194 int I2C_ReceiveData (I2C_TypeDef* I2Cx, int last);
mbed_official 558:0880f51c4036 195
mbed_official 558:0880f51c4036 196 int I2C_Burst_Read (I2C_TypeDef* I2Cx, uint16_t address, uint8_t *data, int length, int stop);
mbed_official 558:0880f51c4036 197 int I2C_Burst_Write (I2C_TypeDef* I2Cx, uint16_t address, uint8_t *data, int length, int stop);
mbed_official 558:0880f51c4036 198
mbed_official 558:0880f51c4036 199 void I2C_Delay (uint32_t nCount);
mbed_official 558:0880f51c4036 200
mbed_official 558:0880f51c4036 201 void I2C_GenerateSTART (I2C_TypeDef* I2Cx, FunctionalState NewState);
mbed_official 558:0880f51c4036 202 void I2C_GenerateSTOP (I2C_TypeDef* I2Cx, FunctionalState NewState);
mbed_official 558:0880f51c4036 203
mbed_official 558:0880f51c4036 204 void I2C_AcknowledgeConfig (I2C_TypeDef* I2Cx, FunctionalState NewState);
mbed_official 558:0880f51c4036 205 void I2C_RESTART (I2C_TypeDef * I2Cx, FunctionalState NewState);
mbed_official 558:0880f51c4036 206
mbed_official 558:0880f51c4036 207 void I2C_CoreEn (I2C_TypeDef* I2Cx,FunctionalState NewState);
mbed_official 558:0880f51c4036 208 void I2C_InterEn (I2C_TypeDef* I2Cx,FunctionalState NewState);
mbed_official 558:0880f51c4036 209 void I2C_MasterSlave(I2C_TypeDef* I2Cx,FunctionalState NewState);
mbed_official 558:0880f51c4036 210 void I2C_ControlRW (I2C_TypeDef* I2Cx,FunctionalState NewState);
mbed_official 558:0880f51c4036 211 void I2C_ControlEn (I2C_TypeDef* I2Cx,FunctionalState NewState);
mbed_official 558:0880f51c4036 212
mbed_official 558:0880f51c4036 213 void I2C_InterRst (I2C_TypeDef* I2Cx,FunctionalState NewState);
mbed_official 558:0880f51c4036 214 void I2C_Prescale (I2C_TypeDef* I2Cx,uint16_t Data);
mbed_official 558:0880f51c4036 215 void I2C_TimeoutSet (I2C_TypeDef* I2Cx,uint16_t Data);
mbed_official 558:0880f51c4036 216 void I2C_SetSlavAddress (I2C_TypeDef* I2Cx,uint16_t Data);
mbed_official 558:0880f51c4036 217 uint8_t I2C_StatusRead (I2C_TypeDef* I2Cx);
mbed_official 558:0880f51c4036 218
mbed_official 558:0880f51c4036 219 ErrorStatus I2C_CheckEvent(I2C_TypeDef* I2Cx,I2C_SR sr);
mbed_official 558:0880f51c4036 220
mbed_official 558:0880f51c4036 221 void I2C_MasterInit (I2C_TypeDef * I2Cx,uint8_t Prescale,uint16_t Timeout,I2C_CTR Ctr);
mbed_official 558:0880f51c4036 222 void I2C_SlaveInit (I2C_TypeDef * I2Cx,FunctionalState NewState, uint16_t data);
mbed_official 558:0880f51c4036 223 void I2C_SendSlaveAddress (I2C_TypeDef* I2Cx, uint8_t SlaveAddress,I2C_CTR Ctr);
mbed_official 558:0880f51c4036 224
mbed_official 558:0880f51c4036 225 int8_t I2C_Restart_Structure(I2C_TypeDef * I2Cx,uint32_t SlaveAddress,I2C_CTR Ctr);
mbed_official 558:0880f51c4036 226 uint16_t I2C_ReadRegister (I2C_TypeDef* I2Cx, uint8_t I2C_Register);
mbed_official 558:0880f51c4036 227
mbed_official 558:0880f51c4036 228 /**
mbed_official 558:0880f51c4036 229 * @}
mbed_official 558:0880f51c4036 230 */
mbed_official 558:0880f51c4036 231