Kazuki Yamamoto
The official mbed C/C SDK provides the software platform and libraries to build your applications.
Fork of
mbed
by 
mbed official
(01.May.2014) started sales! http://www.switch-science.com/catalog/1717/
(13.March.2014) updated to 0.5.0
This is a pin conversion PCB from mbed 1768/11U24 to arduino UNO.
- So if you have both mbed and arduino shields, I guess you would be happy with such a conversion board :)
Photos
- Board photo vvv
- Schematic photo vvv
- Functionality photo vvv
Latest eagle files
PCB >> /media/uploads/k4zuki/mbedshield050.brd
SCH >> /media/uploads/k4zuki/mbedshield050.sch
BIG changes from previous version
- Ethernet RJ45 connector is removed.
- http://mbed.org/components/Seeed-Ethernet-Shield-V20/ is the biggest hint to use Ethernet!
MostALL of components can be bought at Akizuki http://akizukidenshi.com/- But sorry, they do not send parts to abroad
- Pinout is changed!
| arduino | 0.4.0 | 0.5.0 |
|---|---|---|
| D4 | p12 | p21 |
| D5 | p11 | p22 |
| MOSI_ | none | p11 |
| MISO_ | none | p12 |
| SCK_ | none | p13 |
This design has bug(s)
- I2C functional pin differs between 1768 and 11U24.
Fixed bugs here
- MiniUSB cable cannot be connected on mbed if you solder high-height electrolytic capacitor on C3.
- http://akizukidenshi.com/catalog/g/gP-05002/ is the solution to make this 100% AKIZUKI parts!
- the 6-pin ISP port is not inprimented in version 0.4.0
it will be fixed in later version 0.4.1/0.4.2/0.5.0This has beenfixed
I am doing some porting to use existing arduino shields but it may faster if you do it by yourself...
you can use arduino PinName "A0-A5,D0-D13" plus backside SPI port for easier porting.
To do this you have to edit PinName enum in
- "mbed/TARGET_LPC1768/PinNames.h" or
- "mbed/TARGET_LPC11U24/PinNames.h" as per your target mbed.
here is the actual list: This list includes define switch to switch pin assignment
part_of_PinNames.h
USBTX = P0_2,
USBRX = P0_3,
//from here mbeDshield mod
D0=p27,
D1=p28,
D2=p14,
D3=p13,
#ifdef MBEDSHIELD_050
MOSI_=p11,
MISO_=p12,
SCK_=p13,
D4=p21,
D5=p22,
#else
D4=p12,
D5=p11,
#endif
D6=p23,
D7=p24,
D8=p25,
D9=p26,
D10=p8,
D11=p5,
D12=p6,
D13=p7,
A0=p15,
A1=p16,
A2=p17,
A3=p18,
A4=p19,
A5=p20,
SDA=p9,
SCL=p10,
//mbeDshield mod ends here
// Not connected
NC = (int)0xFFFFFFFF
LPC11U24/GCC_ARM/system_LPC11Uxx.h@27:7110ebee3484, 2011-11-29 (annotated)
- Committer:
- emilmont
- Date:
- Tue Nov 29 14:59:27 2011 +0000
- Revision:
- 27:7110ebee3484
New Libraries 11.11
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| emilmont | 27:7110ebee3484 | 1 | /**************************************************************************//** |
| emilmont | 27:7110ebee3484 | 2 | * @file system_LPC11Uxx.h |
| emilmont | 27:7110ebee3484 | 3 | * @brief CMSIS Cortex-M0 Device Peripheral Access Layer Header File |
| emilmont | 27:7110ebee3484 | 4 | * for the NXP LPC11Uxx Device Series |
| emilmont | 27:7110ebee3484 | 5 | * @version V1.10 |
| emilmont | 27:7110ebee3484 | 6 | * @date 24. November 2010 |
| emilmont | 27:7110ebee3484 | 7 | * |
| emilmont | 27:7110ebee3484 | 8 | * @note |
| emilmont | 27:7110ebee3484 | 9 | * Copyright (C) 2009-2010 ARM Limited. All rights reserved. |
| emilmont | 27:7110ebee3484 | 10 | * |
| emilmont | 27:7110ebee3484 | 11 | * @par |
| emilmont | 27:7110ebee3484 | 12 | * ARM Limited (ARM) is supplying this software for use with Cortex-M |
| emilmont | 27:7110ebee3484 | 13 | * processor based microcontrollers. This file can be freely distributed |
| emilmont | 27:7110ebee3484 | 14 | * within development tools that are supporting such ARM based processors. |
| emilmont | 27:7110ebee3484 | 15 | * |
| emilmont | 27:7110ebee3484 | 16 | * @par |
| emilmont | 27:7110ebee3484 | 17 | * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED |
| emilmont | 27:7110ebee3484 | 18 | * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF |
| emilmont | 27:7110ebee3484 | 19 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. |
| emilmont | 27:7110ebee3484 | 20 | * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR |
| emilmont | 27:7110ebee3484 | 21 | * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. |
| emilmont | 27:7110ebee3484 | 22 | * |
| emilmont | 27:7110ebee3484 | 23 | ******************************************************************************/ |
| emilmont | 27:7110ebee3484 | 24 | |
| emilmont | 27:7110ebee3484 | 25 | |
| emilmont | 27:7110ebee3484 | 26 | #ifndef __SYSTEM_LPC11Uxx_H |
| emilmont | 27:7110ebee3484 | 27 | #define __SYSTEM_LPC11Uxx_H |
| emilmont | 27:7110ebee3484 | 28 | |
| emilmont | 27:7110ebee3484 | 29 | #ifdef __cplusplus |
| emilmont | 27:7110ebee3484 | 30 | extern "C" { |
| emilmont | 27:7110ebee3484 | 31 | #endif |
| emilmont | 27:7110ebee3484 | 32 | |
| emilmont | 27:7110ebee3484 | 33 | #include <stdint.h> |
| emilmont | 27:7110ebee3484 | 34 | |
| emilmont | 27:7110ebee3484 | 35 | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ |
| emilmont | 27:7110ebee3484 | 36 | |
| emilmont | 27:7110ebee3484 | 37 | |
| emilmont | 27:7110ebee3484 | 38 | /** |
| emilmont | 27:7110ebee3484 | 39 | * Initialize the system |
| emilmont | 27:7110ebee3484 | 40 | * |
| emilmont | 27:7110ebee3484 | 41 | * @param none |
| emilmont | 27:7110ebee3484 | 42 | * @return none |
| emilmont | 27:7110ebee3484 | 43 | * |
| emilmont | 27:7110ebee3484 | 44 | * @brief Setup the microcontroller system. |
| emilmont | 27:7110ebee3484 | 45 | * Initialize the System and update the SystemCoreClock variable. |
| emilmont | 27:7110ebee3484 | 46 | */ |
| emilmont | 27:7110ebee3484 | 47 | extern void SystemInit (void); |
| emilmont | 27:7110ebee3484 | 48 | |
| emilmont | 27:7110ebee3484 | 49 | /** |
| emilmont | 27:7110ebee3484 | 50 | * Update SystemCoreClock variable |
| emilmont | 27:7110ebee3484 | 51 | * |
| emilmont | 27:7110ebee3484 | 52 | * @param none |
| emilmont | 27:7110ebee3484 | 53 | * @return none |
| emilmont | 27:7110ebee3484 | 54 | * |
| emilmont | 27:7110ebee3484 | 55 | * @brief Updates the SystemCoreClock with current core Clock |
| emilmont | 27:7110ebee3484 | 56 | * retrieved from cpu registers. |
| emilmont | 27:7110ebee3484 | 57 | */ |
| emilmont | 27:7110ebee3484 | 58 | extern void SystemCoreClockUpdate (void); |
| emilmont | 27:7110ebee3484 | 59 | |
| emilmont | 27:7110ebee3484 | 60 | #ifdef __cplusplus |
| emilmont | 27:7110ebee3484 | 61 | } |
| emilmont | 27:7110ebee3484 | 62 | #endif |
| emilmont | 27:7110ebee3484 | 63 | |
| emilmont | 27:7110ebee3484 | 64 | #endif /* __SYSTEM_LPC11Uxx_H */ |