mbed library sources modified for open wear

Dependents:   openwear-lifelogger-example

Fork of mbed-src by mbed official

targets/hal/TARGET_STM/TARGET_NUCLEO_F302R8/i2c_api.c

Committer:
mbed_official
Date:
2014-08-29
Revision:
306:1f0269907d8b
Parent:
286:31249416b6f9

File content as of revision 306:1f0269907d8b:

/* mbed Microcontroller Library
 *******************************************************************************
 * Copyright (c) 2014, STMicroelectronics
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 *
 * 1. Redistributions of source code must retain the above copyright notice,
 *    this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright notice,
 *    this list of conditions and the following disclaimer in the documentation
 *    and/or other materials provided with the distribution.
 * 3. Neither the name of STMicroelectronics nor the names of its contributors
 *    may be used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *******************************************************************************
 */
#include "mbed_assert.h"
#include "i2c_api.h"

#if DEVICE_I2C

#include "cmsis.h"
#include "pinmap.h"
#include "mbed_error.h"

/* Timeout values for flags and events waiting loops. These timeouts are
   not based on accurate values, they just guarantee that the application will
   not remain stuck if the I2C communication is corrupted. */
#define FLAG_TIMEOUT ((int)0x1000)
#define LONG_TIMEOUT ((int)0x8000)

static const PinMap PinMap_I2C_SDA[] = {
    {PA_10, I2C_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_OD, GPIO_PuPd_UP, GPIO_AF_4)},
    {PA_14, I2C_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_OD, GPIO_PuPd_UP, GPIO_AF_4)},
    {PB_5,  I2C_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_OD, GPIO_PuPd_UP, GPIO_AF_8)},
    {PB_7,  I2C_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_OD, GPIO_PuPd_UP, GPIO_AF_4)},
    {PB_9,  I2C_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_OD, GPIO_PuPd_UP, GPIO_AF_4)},
    {PC_9,  I2C_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_OD, GPIO_PuPd_UP, GPIO_AF_3)},
    {PF_0,  I2C_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_OD, GPIO_PuPd_UP, GPIO_AF_4)},
    {NC,    NC,    0}
};

static const PinMap PinMap_I2C_SCL[] = {
    {PA_8,  I2C_3, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_OD, GPIO_PuPd_UP, GPIO_AF_3)},
    {PA_9,  I2C_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_OD, GPIO_PuPd_UP, GPIO_AF_4)},
    {PA_15, I2C_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_OD, GPIO_PuPd_UP, GPIO_AF_4)},
    {PB_6,  I2C_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_OD, GPIO_PuPd_UP, GPIO_AF_4)},
    {PB_8,  I2C_1, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_OD, GPIO_PuPd_UP, GPIO_AF_4)},
    {PF_1,  I2C_2, STM_PIN_DATA(GPIO_Mode_AF, GPIO_OType_OD, GPIO_PuPd_UP, GPIO_AF_4)},
    {NC,    NC,    0}
};

int i2c1_inited = 0;
int i2c2_inited = 0;
int i2c3_inited = 0;

void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
    // Determine the I2C to use
    I2CName i2c_sda = (I2CName)pinmap_peripheral(sda, PinMap_I2C_SDA);
    I2CName i2c_scl = (I2CName)pinmap_peripheral(scl, PinMap_I2C_SCL);

    obj->i2c = (I2CName)pinmap_merge(i2c_sda, i2c_scl);
    MBED_ASSERT(obj->i2c != (I2CName)NC);

    // Enable I2C1 clock and pinout if not done
    if ((obj->i2c == I2C_1)&& !i2c1_inited) {
        i2c1_inited = 1;
        RCC_APB1PeriphClockCmd(RCC_APB1Periph_I2C1, ENABLE);
        RCC_I2CCLKConfig(RCC_I2C1CLK_SYSCLK);
        // Configure I2C pins
        pinmap_pinout(scl, PinMap_I2C_SCL);
        pin_mode(scl, OpenDrain);
        pinmap_pinout(sda, PinMap_I2C_SDA);
        pin_mode(sda, OpenDrain);
    }

    // Enable I2C2 clock and pinout if not done
    if ((obj->i2c == I2C_2)&& !i2c2_inited) {
        i2c2_inited = 1;
        RCC_APB1PeriphClockCmd(RCC_APB1Periph_I2C2, ENABLE);
        // Configure I2C pins
        pinmap_pinout(scl, PinMap_I2C_SCL);
        pin_mode(scl, OpenDrain);
        pinmap_pinout(sda, PinMap_I2C_SDA);
        pin_mode(sda, OpenDrain);
    }

    // Enable I2C3 clock and pinout if not done
    if ((obj->i2c == I2C_3)&& !i2c3_inited) {
        i2c3_inited = 1;
        RCC_APB1PeriphClockCmd(RCC_APB1Periph_I2C3, ENABLE);
        // Configure I2C pins
        pinmap_pinout(scl, PinMap_I2C_SCL);
        pin_mode(scl, OpenDrain);
        pinmap_pinout(sda, PinMap_I2C_SDA);
        pin_mode(sda, OpenDrain);
    }

    // Reset to clear pending flags if any
    i2c_reset(obj);

    // I2C configuration
    i2c_frequency(obj, 100000); // 100 kHz per default
}

void i2c_frequency(i2c_t *obj, int hz) {
    I2C_TypeDef *i2c = (I2C_TypeDef *)(obj->i2c);
    I2C_InitTypeDef I2C_InitStructure;
    uint32_t tim = 0;
    int timeout;
	
    // wait before init
    timeout = LONG_TIMEOUT;
    while((I2C_GetFlagStatus(i2c, I2C_FLAG_BUSY)) && (timeout-- != 0));

    // Disable the Fast Mode Plus capability
    RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE); // Enable SYSCFG clock
    SYSCFG_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus_I2C1, DISABLE);
    SYSCFG_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus_I2C2, DISABLE);

    /*
       Values calculated with I2C_Timing_Configuration_V1.0.1.xls file (see AN4235)
       * Standard mode (up to 100 kHz)
       * Fast Mode (up to 400 kHz)
       * Fast Mode Plus (up to 1 MHz)
       Below values obtained with:
       - I2C clock source = 64 MHz (System Clock w/ HSI) or 72 (System Clock w/ HSE)
       - Analog filter delay = ON
       - Digital filter coefficient = 0
       - Rise time = 100 ns
       - Fall time = 10ns
    */
    if (SystemCoreClock == 64000000) {
        switch (hz) {
            case 100000:
                tim = 0x60302730; // Standard mode
                break;
            case 200000:
                tim = 0x00C07AB3; // Fast Mode
                break;
            case 400000:
                tim = 0x00C0216C; // Fast Mode
                break;
            case 1000000:
                tim = 0x00900B22; // Fast Mode Plus
                // Enable the Fast Mode Plus capability
                if (obj->i2c == I2C_1) {
                    SYSCFG_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus_I2C1, ENABLE);
                }
                if (obj->i2c == I2C_2) {
                    SYSCFG_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus_I2C2, ENABLE);
                }
                break;
            default:
                error("Only 100kHz, 200kHz, 400kHz and 1MHz I2C frequencies are supported.");
                break;
        }
    } else if (SystemCoreClock == 72000000) {
        switch (hz) {
            case 100000:
                tim = 0x10C08DCF; // Standard mode
                break;
            case 200000:
                tim = 0xA010031A; // Fast Mode
                break;
            case 400000:
                tim = 0x00E0257A; // Fast Mode
                break;
            case 1000000:
                tim = 0x00A00D26; // Fast Mode Plus
                // Enable the Fast Mode Plus capability
                if (obj->i2c == I2C_1) {
                    SYSCFG_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus_I2C1, ENABLE);
                }
                if (obj->i2c == I2C_2) {
                    SYSCFG_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus_I2C2, ENABLE);
                }
                break;
            default:
                error("Only 100kHz, 200kHz, 400kHz and 1MHz I2C frequencies are supported.");
                break;
        }
    } else {
        error("System clock setting is not supported.");
    }

    // I2C configuration
    I2C_DeInit(i2c);
    I2C_InitStructure.I2C_Mode                = I2C_Mode_I2C;
    I2C_InitStructure.I2C_AnalogFilter        = I2C_AnalogFilter_Enable;
    I2C_InitStructure.I2C_DigitalFilter       = 0x00;
    I2C_InitStructure.I2C_OwnAddress1         = 0x00;
    I2C_InitStructure.I2C_Ack                 = I2C_Ack_Enable;
    I2C_InitStructure.I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit;
    I2C_InitStructure.I2C_Timing              = tim;
    I2C_Init(i2c, &I2C_InitStructure);

    I2C_Cmd(i2c, ENABLE);
}

inline int i2c_start(i2c_t *obj) {
    I2C_TypeDef *i2c = (I2C_TypeDef *)(obj->i2c);
    int timeout;

    // Test BUSY Flag
    timeout = LONG_TIMEOUT;
    while (I2C_GetFlagStatus(i2c, I2C_ISR_BUSY) != RESET) {
        timeout--;
        if (timeout == 0) {
            return 0;
        }
    }

    I2C_GenerateSTART(i2c, ENABLE);

    return 0;
}

inline int i2c_stop(i2c_t *obj) {
    I2C_TypeDef *i2c = (I2C_TypeDef *)(obj->i2c);

    I2C_GenerateSTOP(i2c, ENABLE);

    return 0;
}


int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
    I2C_TypeDef *i2c = (I2C_TypeDef *)(obj->i2c);
    int count;
    int timeout;
    int value;

    // Configure slave address, nbytes, reload, end mode and start or stop generation
    I2C_TransferHandling(i2c, address, length, I2C_SoftEnd_Mode, I2C_Generate_Start_Read);

    // Read all bytes
    for (count = 0; count < length; count++) {
        value = i2c_byte_read(obj, 0);
        data[count] = (char)value;
    }

    timeout = FLAG_TIMEOUT;
    while (!I2C_GetFlagStatus(i2c, I2C_FLAG_TC)) {
        timeout--;
        if (timeout == 0) return -1;
    }

    if (stop) i2c_stop(obj);

    return length;
}


int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) {
    I2C_TypeDef *i2c = (I2C_TypeDef *)(obj->i2c);
    int timeout;
    int count;

    // Configure slave address, nbytes, reload, end mode and start generation
    I2C_TransferHandling(i2c, address, length, I2C_SoftEnd_Mode, I2C_Generate_Start_Write);

    // Write all bytes
    for (count = 0; count < length; count++) {
        i2c_byte_write(obj, data[count]);
    }

    timeout = FLAG_TIMEOUT;
    while (!I2C_GetFlagStatus(i2c, I2C_FLAG_TC)) {
        timeout--;
        if (timeout == 0) return -1;
    }

    if (stop) i2c_stop(obj);

    return count;
}

int i2c_byte_read(i2c_t *obj, int last) {
    I2C_TypeDef *i2c = (I2C_TypeDef *)(obj->i2c);
    uint8_t data;
    int timeout;

    // Wait until the byte is received
    timeout = FLAG_TIMEOUT;
    while (I2C_GetFlagStatus(i2c, I2C_ISR_RXNE) == RESET) {
        timeout--;
        if (timeout == 0) {
            return -1;
        }
    }

    data = I2C_ReceiveData(i2c);

    return (int)data;
}

int i2c_byte_write(i2c_t *obj, int data) {
    I2C_TypeDef *i2c = (I2C_TypeDef *)(obj->i2c);
    int timeout;

    // Wait until the previous byte is transmitted
    timeout = FLAG_TIMEOUT;
    while (I2C_GetFlagStatus(i2c, I2C_ISR_TXIS) == RESET) {
        timeout--;
        if (timeout == 0) {
            return 0;
        }
    }

    I2C_SendData(i2c, (uint8_t)data);

    return 1;
}

void i2c_reset(i2c_t *obj) {
    I2C_TypeDef *i2c = (I2C_TypeDef *)(obj->i2c);
    int timeout;
	
    // wait before reset
    timeout = LONG_TIMEOUT;
    while((I2C_GetFlagStatus(i2c, I2C_FLAG_BUSY)) && (timeout-- != 0));
	
    if (obj->i2c == I2C_1) {
        RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, ENABLE);
        RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, DISABLE);
    }
    if (obj->i2c == I2C_2) {
        RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C2, ENABLE);
        RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C2, DISABLE);
    }
    if (obj->i2c == I2C_3) {
        RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C3, ENABLE);
        RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C3, DISABLE);
    }
}

#if DEVICE_I2CSLAVE

void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask) {
    I2C_TypeDef *i2c = (I2C_TypeDef *)(obj->i2c);
    uint16_t tmpreg;

    // reset own address enable
    i2c->OAR1 &= ~ I2C_OAR1_OA1EN;

    // Get the old register value
    tmpreg = i2c->OAR1;
    // Reset address bits
    tmpreg &= 0xFC00;
    // Set new address
    tmpreg |= (uint16_t)((uint16_t)address & (uint16_t)0x00FE); // 7-bits
    // Store the new register value
    i2c->OAR1 = tmpreg | I2C_OAR1_OA1EN;
}

void i2c_slave_mode(i2c_t *obj, int enable_slave) {
    // Nothing to do
}

// See I2CSlave.h
#define NoData         0 // the slave has not been addressed
#define ReadAddressed  1 // the master has requested a read from this slave (slave = transmitter)
#define WriteGeneral   2 // the master is writing to all slave
#define WriteAddressed 3 // the master is writing to this slave (slave = receiver)

int i2c_slave_receive(i2c_t *obj) {
    I2C_TypeDef *i2c = (I2C_TypeDef *)(obj->i2c);
    int event = NoData;

    if (I2C_GetFlagStatus(i2c, I2C_ISR_BUSY) == SET) {
        if (I2C_GetFlagStatus(i2c, I2C_ISR_ADDR) == SET) {
            // Check direction
            if (I2C_GetFlagStatus(i2c, I2C_ISR_DIR) == SET) {
                event = ReadAddressed;
            } else event = WriteAddressed;
            // Clear adress match flag to generate an acknowledge
            i2c->ICR |= I2C_ICR_ADDRCF;
        }
    }
    return event;
}

int i2c_slave_read(i2c_t *obj, char *data, int length) {
    int count = 0;

    // Read all bytes
    for (count = 0; count < length; count++) {
        data[count] = i2c_byte_read(obj, 0);
    }

    return count;
}

int i2c_slave_write(i2c_t *obj, const char *data, int length) {
    int count = 0;

    // Write all bytes
    for (count = 0; count < length; count++) {
        i2c_byte_write(obj, data[count]);
    }

    return count;
}


#endif // DEVICE_I2CSLAVE

#endif // DEVICE_I2C