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targets/cmsis/TARGET_STM/TARGET_STM32L4/stm32l4xx_hal_rcc.c@610:813dcc80987e, 2015-08-14 (annotated)

Committer:: mbed_official
Date:: Fri Aug 14 13:15:17 2015 +0100
Revision:: 610:813dcc80987e

Synchronized with git revision 6d84db41c6833e0b9b024741eb0616a5f62d5599

Full URL: https://github.com/mbedmicro/mbed/commit/6d84db41c6833e0b9b024741eb0616a5f62d5599/

DISCO_F746NG - Improvements

Who changed what in which revision?

User	Revision	Line number	New contents of line
mbed_official	610:813dcc80987e	1	/**
mbed_official	610:813dcc80987e	2	******************************************************************************
mbed_official	610:813dcc80987e	3	* @file stm32l4xx_hal_rcc.c
mbed_official	610:813dcc80987e	4	* @author MCD Application Team
mbed_official	610:813dcc80987e	5	* @version V1.0.0
mbed_official	610:813dcc80987e	6	* @date 26-June-2015
mbed_official	610:813dcc80987e	7	* @brief RCC HAL module driver.
mbed_official	610:813dcc80987e	8	* This file provides firmware functions to manage the following
mbed_official	610:813dcc80987e	9	* functionalities of the Reset and Clock Control (RCC) peripheral:
mbed_official	610:813dcc80987e	10	* + Initialization and de-initialization functions
mbed_official	610:813dcc80987e	11	* + Peripheral Control functions
mbed_official	610:813dcc80987e	12	*
mbed_official	610:813dcc80987e	13	@verbatim
mbed_official	610:813dcc80987e	14	==============================================================================
mbed_official	610:813dcc80987e	15	##### RCC specific features #####
mbed_official	610:813dcc80987e	16	==============================================================================
mbed_official	610:813dcc80987e	17	[..]
mbed_official	610:813dcc80987e	18	After reset the device is running from Multiple Speed Internal oscillator
mbed_official	610:813dcc80987e	19	(4 MHz) with Flash 0 wait state. Flash prefetch buffer, D-Cache
mbed_official	610:813dcc80987e	20	and I-Cache are disabled, and all peripherals are off except internal
mbed_official	610:813dcc80987e	21	SRAM, Flash and JTAG.
mbed_official	610:813dcc80987e	22
mbed_official	610:813dcc80987e	23	(+) There is no prescaler on High speed (AHBs) and Low speed (APBs) busses:
mbed_official	610:813dcc80987e	24	all peripherals mapped on these busses are running at MSI speed.
mbed_official	610:813dcc80987e	25	(+) The clock for all peripherals is switched off, except the SRAM and FLASH.
mbed_official	610:813dcc80987e	26	(+) All GPIOs are in analog mode, except the JTAG pins which
mbed_official	610:813dcc80987e	27	are assigned to be used for debug purpose.
mbed_official	610:813dcc80987e	28
mbed_official	610:813dcc80987e	29	[..]
mbed_official	610:813dcc80987e	30	Once the device started from reset, the user application has to:
mbed_official	610:813dcc80987e	31	(+) Configure the clock source to be used to drive the System clock
mbed_official	610:813dcc80987e	32	(if the application needs higher frequency/performance)
mbed_official	610:813dcc80987e	33	(+) Configure the System clock frequency and Flash settings
mbed_official	610:813dcc80987e	34	(+) Configure the AHB and APB busses prescalers
mbed_official	610:813dcc80987e	35	(+) Enable the clock for the peripheral(s) to be used
mbed_official	610:813dcc80987e	36	(+) Configure the clock source(s) for peripherals which clocks are not
mbed_official	610:813dcc80987e	37	derived from the System clock (SAIx, RTC, ADC, USB OTG FS/SDMMC1/RNG)
mbed_official	610:813dcc80987e	38
mbed_official	610:813dcc80987e	39	@endverbatim
mbed_official	610:813dcc80987e	40	******************************************************************************
mbed_official	610:813dcc80987e	41	* @attention
mbed_official	610:813dcc80987e	42	*
mbed_official	610:813dcc80987e	43	* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
mbed_official	610:813dcc80987e	44	*
mbed_official	610:813dcc80987e	45	* Redistribution and use in source and binary forms, with or without modification,
mbed_official	610:813dcc80987e	46	* are permitted provided that the following conditions are met:
mbed_official	610:813dcc80987e	47	* 1. Redistributions of source code must retain the above copyright notice,
mbed_official	610:813dcc80987e	48	* this list of conditions and the following disclaimer.
mbed_official	610:813dcc80987e	49	* 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official	610:813dcc80987e	50	* this list of conditions and the following disclaimer in the documentation
mbed_official	610:813dcc80987e	51	* and/or other materials provided with the distribution.
mbed_official	610:813dcc80987e	52	* 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official	610:813dcc80987e	53	* may be used to endorse or promote products derived from this software
mbed_official	610:813dcc80987e	54	* without specific prior written permission.
mbed_official	610:813dcc80987e	55	*
mbed_official	610:813dcc80987e	56	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official	610:813dcc80987e	57	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official	610:813dcc80987e	58	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official	610:813dcc80987e	59	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official	610:813dcc80987e	60	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official	610:813dcc80987e	61	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official	610:813dcc80987e	62	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official	610:813dcc80987e	63	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official	610:813dcc80987e	64	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official	610:813dcc80987e	65	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official	610:813dcc80987e	66	*
mbed_official	610:813dcc80987e	67	******************************************************************************
mbed_official	610:813dcc80987e	68	*/
mbed_official	610:813dcc80987e	69
mbed_official	610:813dcc80987e	70	/* Includes ------------------------------------------------------------------*/
mbed_official	610:813dcc80987e	71	#include "stm32l4xx_hal.h"
mbed_official	610:813dcc80987e	72
mbed_official	610:813dcc80987e	73	/** @addtogroup STM32L4xx_HAL_Driver
mbed_official	610:813dcc80987e	74	* @{
mbed_official	610:813dcc80987e	75	*/
mbed_official	610:813dcc80987e	76
mbed_official	610:813dcc80987e	77	/** @defgroup RCC RCC
mbed_official	610:813dcc80987e	78	* @brief RCC HAL module driver
mbed_official	610:813dcc80987e	79	* @{
mbed_official	610:813dcc80987e	80	*/
mbed_official	610:813dcc80987e	81
mbed_official	610:813dcc80987e	82	#ifdef HAL_RCC_MODULE_ENABLED
mbed_official	610:813dcc80987e	83
mbed_official	610:813dcc80987e	84	/* Private typedef -----------------------------------------------------------*/
mbed_official	610:813dcc80987e	85	/* Private define ------------------------------------------------------------*/
mbed_official	610:813dcc80987e	86	/** @defgroup RCC_Private_Constants RCC Private Constants
mbed_official	610:813dcc80987e	87	* @{
mbed_official	610:813dcc80987e	88	*/
mbed_official	610:813dcc80987e	89	#define HSE_TIMEOUT_VALUE HSE_STARTUP_TIMEOUT
mbed_official	610:813dcc80987e	90	#define HSI_TIMEOUT_VALUE ((uint32_t)100) /* 100 ms */
mbed_official	610:813dcc80987e	91	#define MSI_TIMEOUT_VALUE ((uint32_t)100) /* 100 ms */
mbed_official	610:813dcc80987e	92	#define LSI_TIMEOUT_VALUE ((uint32_t)100) /* 100 ms */
mbed_official	610:813dcc80987e	93	#define PLL_TIMEOUT_VALUE ((uint32_t)100) /* 100 ms */
mbed_official	610:813dcc80987e	94	#define CLOCKSWITCH_TIMEOUT_VALUE ((uint32_t)5000) /* 5 s */
mbed_official	610:813dcc80987e	95
mbed_official	610:813dcc80987e	96	#define PLLSOURCE_NONE ((uint32_t)0x00000000)
mbed_official	610:813dcc80987e	97	/**
mbed_official	610:813dcc80987e	98	* @}
mbed_official	610:813dcc80987e	99	*/
mbed_official	610:813dcc80987e	100
mbed_official	610:813dcc80987e	101	/* Private macro -------------------------------------------------------------*/
mbed_official	610:813dcc80987e	102	/** @defgroup RCC_Private_Macros RCC Private Macros
mbed_official	610:813dcc80987e	103	* @{
mbed_official	610:813dcc80987e	104	*/
mbed_official	610:813dcc80987e	105	#define __MCO1_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
mbed_official	610:813dcc80987e	106	#define MCO1_GPIO_PORT GPIOA
mbed_official	610:813dcc80987e	107	#define MCO1_PIN GPIO_PIN_8
mbed_official	610:813dcc80987e	108
mbed_official	610:813dcc80987e	109	#define RCC_PLL_OSCSOURCE_CONFIG(__HAL_RCC_PLLSOURCE__) \
mbed_official	610:813dcc80987e	110	(MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC, (uint32_t)(__HAL_RCC_PLLSOURCE__)))
mbed_official	610:813dcc80987e	111	/**
mbed_official	610:813dcc80987e	112	* @}
mbed_official	610:813dcc80987e	113	*/
mbed_official	610:813dcc80987e	114
mbed_official	610:813dcc80987e	115	/* Private variables ---------------------------------------------------------*/
mbed_official	610:813dcc80987e	116	/** @defgroup RCC_Private_Variables RCC Private Variables
mbed_official	610:813dcc80987e	117	* @{
mbed_official	610:813dcc80987e	118	*/
mbed_official	610:813dcc80987e	119	const uint8_t APBAHBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4};
mbed_official	610:813dcc80987e	120
mbed_official	610:813dcc80987e	121	extern const uint32_t MSIRangeTable[]; /* Defined in CMSIS (system_stm32l4xx.c)*/
mbed_official	610:813dcc80987e	122	/**
mbed_official	610:813dcc80987e	123	* @}
mbed_official	610:813dcc80987e	124	*/
mbed_official	610:813dcc80987e	125
mbed_official	610:813dcc80987e	126	/* Private function prototypes -----------------------------------------------*/
mbed_official	610:813dcc80987e	127	/** @defgroup RCC_Private_Functions RCC Private Functions
mbed_official	610:813dcc80987e	128	* @{
mbed_official	610:813dcc80987e	129	*/
mbed_official	610:813dcc80987e	130	static HAL_StatusTypeDef RCC_SetFlashLatencyFromMSIRange(uint32_t msirange);
mbed_official	610:813dcc80987e	131	/**
mbed_official	610:813dcc80987e	132	* @}
mbed_official	610:813dcc80987e	133	*/
mbed_official	610:813dcc80987e	134
mbed_official	610:813dcc80987e	135	/* Exported functions --------------------------------------------------------*/
mbed_official	610:813dcc80987e	136
mbed_official	610:813dcc80987e	137	/** @defgroup RCC_Exported_Functions RCC Exported Functions
mbed_official	610:813dcc80987e	138	* @{
mbed_official	610:813dcc80987e	139	*/
mbed_official	610:813dcc80987e	140
mbed_official	610:813dcc80987e	141	/** @defgroup RCC_Exported_Functions_Group1 Initialization and de-initialization functions
mbed_official	610:813dcc80987e	142	* @brief Initialization and Configuration functions
mbed_official	610:813dcc80987e	143	*
mbed_official	610:813dcc80987e	144	@verbatim
mbed_official	610:813dcc80987e	145	===============================================================================
mbed_official	610:813dcc80987e	146	##### Initialization and de-initialization functions #####
mbed_official	610:813dcc80987e	147	===============================================================================
mbed_official	610:813dcc80987e	148	[..]
mbed_official	610:813dcc80987e	149	This section provides functions allowing to configure the internal and external oscillators
mbed_official	610:813dcc80987e	150	(HSE, HSI, LSE, MSI, LSI, PLL, CSS and MCO) and the System busses clocks (SYSCLK, AHB, APB1
mbed_official	610:813dcc80987e	151	and APB2).
mbed_official	610:813dcc80987e	152
mbed_official	610:813dcc80987e	153	[..] Internal/external clock and PLL configuration
mbed_official	610:813dcc80987e	154	(+) HSI (high-speed internal): 16 MHz factory-trimmed RC used directly or through
mbed_official	610:813dcc80987e	155	the PLL as System clock source.
mbed_official	610:813dcc80987e	156
mbed_official	610:813dcc80987e	157	(+) MSI (Mutiple Speed Internal): Its frequency is software trimmable from 100KHZ to 48MHZ.
mbed_official	610:813dcc80987e	158	It can be used to generate the clock for the USB OTG FS (48 MHz).
mbed_official	610:813dcc80987e	159	The number of flash wait states is automatically adjusted when MSI range is updated with
mbed_official	610:813dcc80987e	160	HAL_RCC_OscConfig() and the MSI is used as System clock source.
mbed_official	610:813dcc80987e	161
mbed_official	610:813dcc80987e	162	(+) LSI (low-speed internal): 32 KHz low consumption RC used as IWDG and/or RTC
mbed_official	610:813dcc80987e	163	clock source.
mbed_official	610:813dcc80987e	164
mbed_official	610:813dcc80987e	165	(+) HSE (high-speed external): 4 to 48 MHz crystal oscillator used directly or
mbed_official	610:813dcc80987e	166	through the PLL as System clock source. Can be used also optionally as RTC clock source.
mbed_official	610:813dcc80987e	167
mbed_official	610:813dcc80987e	168	(+) LSE (low-speed external): 32.768 KHz oscillator used optionally as RTC clock source.
mbed_official	610:813dcc80987e	169
mbed_official	610:813dcc80987e	170	(+) PLL (clocked by HSI, HSE or MSI) providing up to three independent output clocks:
mbed_official	610:813dcc80987e	171	(++) The first output is used to generate the high speed system clock (up to 80MHz).
mbed_official	610:813dcc80987e	172	(++) The second output is used to generate the clock for the USB OTG FS (48 MHz),
mbed_official	610:813dcc80987e	173	the random analog generator (<=48 MHz) and the SDMMC1 (<= 48 MHz).
mbed_official	610:813dcc80987e	174	(++) The third output is used to generate an accurate clock to achieve
mbed_official	610:813dcc80987e	175	high-quality audio performance on SAI interface.
mbed_official	610:813dcc80987e	176
mbed_official	610:813dcc80987e	177	(+) PLLSAI1 (clocked by HSI, HSE or MSI) providing up to three independent output clocks:
mbed_official	610:813dcc80987e	178	(++) The first output is used to generate SAR ADC1 clock.
mbed_official	610:813dcc80987e	179	(++) The second output is used to generate the clock for the USB OTG FS (48 MHz),
mbed_official	610:813dcc80987e	180	the random analog generator (<=48 MHz) and the SDMMC1 (<= 48 MHz).
mbed_official	610:813dcc80987e	181	(++) The Third output is used to generate an accurate clock to achieve
mbed_official	610:813dcc80987e	182	high-quality audio performance on SAI interface.
mbed_official	610:813dcc80987e	183
mbed_official	610:813dcc80987e	184	(+) PLLSAI2 (clocked by HSI , HSE or MSI) providing up to two independent output clocks:
mbed_official	610:813dcc80987e	185	(++) The first output is used to generate SAR ADC2 clock.
mbed_official	610:813dcc80987e	186	(++) The second output is used to generate an accurate clock to achieve
mbed_official	610:813dcc80987e	187	high-quality audio performance on SAI interface.
mbed_official	610:813dcc80987e	188
mbed_official	610:813dcc80987e	189	(+) CSS (Clock security system): once enabled, if a HSE clock failure occurs
mbed_official	610:813dcc80987e	190	(HSE used directly or through PLL as System clock source), the System clock
mbed_official	610:813dcc80987e	191	is automatically switched to HSI and an interrupt is generated if enabled.
mbed_official	610:813dcc80987e	192	The interrupt is linked to the Cortex-M4 NMI (Non-Maskable Interrupt)
mbed_official	610:813dcc80987e	193	exception vector.
mbed_official	610:813dcc80987e	194
mbed_official	610:813dcc80987e	195	(+) MCO (microcontroller clock output): used to output MSI, LSI, HSI, LSE, HSE or
mbed_official	610:813dcc80987e	196	main PLL clock (through a configurable prescaler) on PA8 pin.
mbed_official	610:813dcc80987e	197
mbed_official	610:813dcc80987e	198	[..] System, AHB and APB busses clocks configuration
mbed_official	610:813dcc80987e	199	(+) Several clock sources can be used to drive the System clock (SYSCLK): MSI, HSI,
mbed_official	610:813dcc80987e	200	HSE and main PLL.
mbed_official	610:813dcc80987e	201	The AHB clock (HCLK) is derived from System clock through configurable
mbed_official	610:813dcc80987e	202	prescaler and used to clock the CPU, memory and peripherals mapped
mbed_official	610:813dcc80987e	203	on AHB bus (DMA, GPIO...). APB1 (PCLK1) and APB2 (PCLK2) clocks are derived
mbed_official	610:813dcc80987e	204	from AHB clock through configurable prescalers and used to clock
mbed_official	610:813dcc80987e	205	the peripherals mapped on these busses. You can use
mbed_official	610:813dcc80987e	206	"HAL_RCC_GetSysClockFreq()" function to retrieve the frequencies of these clocks.
mbed_official	610:813dcc80987e	207
mbed_official	610:813dcc80987e	208	-@- All the peripheral clocks are derived from the System clock (SYSCLK) except:
mbed_official	610:813dcc80987e	209
mbed_official	610:813dcc80987e	210	(+@) SAI: the SAI clock can be derived either from a specific PLL (PLLSAI1) or (PLLSAI2) or
mbed_official	610:813dcc80987e	211	from an external clock mapped on the SAI_CKIN pin.
mbed_official	610:813dcc80987e	212	You have to use HAL_RCCEx_PeriphCLKConfig() function to configure this clock.
mbed_official	610:813dcc80987e	213	(+@) RTC: the RTC clock can be derived either from the LSI, LSE or HSE clock
mbed_official	610:813dcc80987e	214	divided by 2 to 31.
mbed_official	610:813dcc80987e	215	You have to use __HAL_RCC_RTC_ENABLE() and HAL_RCCEx_PeriphCLKConfig() function
mbed_official	610:813dcc80987e	216	to configure this clock.
mbed_official	610:813dcc80987e	217	(+@) USB OTG FS, SDMMC1 and RNG: USB OTG FS requires a frequency equal to 48 MHz
mbed_official	610:813dcc80987e	218	to work correctly, while the SDMMC1 and RNG peripherals require a frequency
mbed_official	610:813dcc80987e	219	equal or lower than to 48 MHz. This clock is derived of the main PLL or PLLSAI1
mbed_official	610:813dcc80987e	220	through PLLQ divider. You have to enable the peripheral clock and use
mbed_official	610:813dcc80987e	221	HAL_RCCEx_PeriphCLKConfig() function to configure this clock.
mbed_official	610:813dcc80987e	222	(+@) IWDG clock which is always the LSI clock.
mbed_official	610:813dcc80987e	223
mbed_official	610:813dcc80987e	224
mbed_official	610:813dcc80987e	225	(+) The maximum frequency of the SYSCLK, HCLK, PCLK1 and PCLK2 is 80 MHz.
mbed_official	610:813dcc80987e	226	Depending on the device voltage range, the maximum frequency should be
mbed_official	610:813dcc80987e	227	adapted accordingly:
mbed_official	610:813dcc80987e	228
mbed_official	610:813dcc80987e	229	(++) Table 1. HCLK clock frequency.
mbed_official	610:813dcc80987e	230	(++) +-------------------------------------------------------+
mbed_official	610:813dcc80987e	231	(++) \| Latency \| HCLK clock frequency (MHz) \|
mbed_official	610:813dcc80987e	232	(++) \| \|-------------------------------------\|
mbed_official	610:813dcc80987e	233	(++) \| \| voltage range 1 \| voltage range 2 \|
mbed_official	610:813dcc80987e	234	(++) \| \| 1.2 V \| 1.0 V \|
mbed_official	610:813dcc80987e	235	(++) \|-----------------\|------------------\|------------------\|
mbed_official	610:813dcc80987e	236	(++) \|0WS(1 CPU cycles)\| 0 < HCLK <= 16 \| 0 < HCLK <= 6 \|
mbed_official	610:813dcc80987e	237	(++) \|-----------------\|------------------\|------------------\|
mbed_official	610:813dcc80987e	238	(++) \|1WS(2 CPU cycles)\| 16 < HCLK <= 32 \| 6 < HCLK <= 12 \|
mbed_official	610:813dcc80987e	239	(++) \|-----------------\|------------------\|------------------\|
mbed_official	610:813dcc80987e	240	(++) \|2WS(3 CPU cycles)\| 32 < HCLK <= 48 \| 12 < HCLK <= 18 \|
mbed_official	610:813dcc80987e	241	(++) \|-----------------\|------------------\|------------------\|
mbed_official	610:813dcc80987e	242	(++) \|3WS(4 CPU cycles)\| 48 < HCLK <= 64 \| 18 < HCLK <= 26 \|
mbed_official	610:813dcc80987e	243	(++) \|-----------------\|------------------\|------------------\|
mbed_official	610:813dcc80987e	244	(++) \|4WS(5 CPU cycles)\| 64 < HCLK <= 80 \| 18 < HCLK <= 26 \|
mbed_official	610:813dcc80987e	245	(++) +-------------------------------------------------------+
mbed_official	610:813dcc80987e	246
mbed_official	610:813dcc80987e	247	@endverbatim
mbed_official	610:813dcc80987e	248	* @{
mbed_official	610:813dcc80987e	249	*/
mbed_official	610:813dcc80987e	250
mbed_official	610:813dcc80987e	251	/**
mbed_official	610:813dcc80987e	252	* @brief Reset the RCC clock configuration to the default reset state.
mbed_official	610:813dcc80987e	253	* @note The default reset state of the clock configuration is given below:
mbed_official	610:813dcc80987e	254	* - MSI ON and used as system clock source
mbed_official	610:813dcc80987e	255	* - HSE, HSI, PLL, PLLSAI1 and PLLISAI2 OFF
mbed_official	610:813dcc80987e	256	* - AHB, APB1 and APB2 prescaler set to 1.
mbed_official	610:813dcc80987e	257	* - CSS, MCO1 OFF
mbed_official	610:813dcc80987e	258	* - All interrupts disabled
mbed_official	610:813dcc80987e	259	* @note This function doesn't modify the configuration of the
mbed_official	610:813dcc80987e	260	* - Peripheral clocks
mbed_official	610:813dcc80987e	261	* - LSI, LSE and RTC clocks
mbed_official	610:813dcc80987e	262	* @retval None
mbed_official	610:813dcc80987e	263	*/
mbed_official	610:813dcc80987e	264	void HAL_RCC_DeInit(void)
mbed_official	610:813dcc80987e	265	{
mbed_official	610:813dcc80987e	266	/* Set MSION bit */
mbed_official	610:813dcc80987e	267	SET_BIT(RCC->CR, RCC_CR_MSION);
mbed_official	610:813dcc80987e	268
mbed_official	610:813dcc80987e	269	/* Reset CFGR register */
mbed_official	610:813dcc80987e	270	CLEAR_REG(RCC->CFGR);
mbed_official	610:813dcc80987e	271
mbed_official	610:813dcc80987e	272	/* Reset HSION, HSIKERON, HSIASFS, HSEON, HSECSSON, PLLON, PLLSAIxON bits */
mbed_official	610:813dcc80987e	273	CLEAR_BIT(RCC->CR, RCC_CR_HSEON \| RCC_CR_HSION \| RCC_CR_HSIKERON\| RCC_CR_HSIASFS \| RCC_CR_CSSON \| RCC_CR_PLLON \| RCC_CR_PLLSAI1ON \| RCC_CR_PLLSAI2ON);
mbed_official	610:813dcc80987e	274
mbed_official	610:813dcc80987e	275	/* Reset PLLCFGR register */
mbed_official	610:813dcc80987e	276	CLEAR_REG(RCC->PLLCFGR);
mbed_official	610:813dcc80987e	277	SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN_4 );
mbed_official	610:813dcc80987e	278
mbed_official	610:813dcc80987e	279	/* Reset PLLSAI1CFGR register */
mbed_official	610:813dcc80987e	280	CLEAR_REG(RCC->PLLSAI1CFGR);
mbed_official	610:813dcc80987e	281	SET_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1N_4 );
mbed_official	610:813dcc80987e	282
mbed_official	610:813dcc80987e	283	/* Reset PLLSAI2CFGR register */
mbed_official	610:813dcc80987e	284	CLEAR_REG(RCC->PLLSAI2CFGR);
mbed_official	610:813dcc80987e	285	SET_BIT(RCC->PLLSAI2CFGR, RCC_PLLSAI2CFGR_PLLSAI2N_4 );
mbed_official	610:813dcc80987e	286
mbed_official	610:813dcc80987e	287	/* Reset HSEBYP bit */
mbed_official	610:813dcc80987e	288	CLEAR_BIT(RCC->CR, RCC_CR_HSEBYP);
mbed_official	610:813dcc80987e	289
mbed_official	610:813dcc80987e	290	/* Disable all interrupts */
mbed_official	610:813dcc80987e	291	CLEAR_REG(RCC->CIER);
mbed_official	610:813dcc80987e	292	}
mbed_official	610:813dcc80987e	293
mbed_official	610:813dcc80987e	294	/**
mbed_official	610:813dcc80987e	295	* @brief Initialize the RCC Oscillators according to the specified parameters in the
mbed_official	610:813dcc80987e	296	* RCC_OscInitTypeDef.
mbed_official	610:813dcc80987e	297	* @param RCC_OscInitStruct: pointer to an RCC_OscInitTypeDef structure that
mbed_official	610:813dcc80987e	298	* contains the configuration information for the RCC Oscillators.
mbed_official	610:813dcc80987e	299	* @note The PLL is not disabled when used as system clock.
mbed_official	610:813dcc80987e	300	* @retval HAL status
mbed_official	610:813dcc80987e	301	*/
mbed_official	610:813dcc80987e	302	HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
mbed_official	610:813dcc80987e	303	{
mbed_official	610:813dcc80987e	304	uint32_t tickstart = 0;
mbed_official	610:813dcc80987e	305
mbed_official	610:813dcc80987e	306	/* Check the parameters */
mbed_official	610:813dcc80987e	307	assert_param(RCC_OscInitStruct != NULL);
mbed_official	610:813dcc80987e	308	assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
mbed_official	610:813dcc80987e	309
mbed_official	610:813dcc80987e	310	/----------------------------- MSI Configuration --------------------------/
mbed_official	610:813dcc80987e	311	if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_MSI) == RCC_OSCILLATORTYPE_MSI)
mbed_official	610:813dcc80987e	312	{
mbed_official	610:813dcc80987e	313	/* Check the parameters */
mbed_official	610:813dcc80987e	314	assert_param(IS_RCC_MSI(RCC_OscInitStruct->MSIState));
mbed_official	610:813dcc80987e	315	assert_param(IS_RCC_MSICALIBRATION_VALUE(RCC_OscInitStruct->MSICalibrationValue));
mbed_official	610:813dcc80987e	316	assert_param(IS_RCC_MSI_CLOCK_RANGE(RCC_OscInitStruct->MSIClockRange));
mbed_official	610:813dcc80987e	317
mbed_official	610:813dcc80987e	318	/* When the MSI is used as system clock it will not be disabled */
mbed_official	610:813dcc80987e	319	if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_MSI) )
mbed_official	610:813dcc80987e	320	{
mbed_official	610:813dcc80987e	321	if((__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) != RESET) && (RCC_OscInitStruct->MSIState == RCC_MSI_OFF))
mbed_official	610:813dcc80987e	322	{
mbed_official	610:813dcc80987e	323	return HAL_ERROR;
mbed_official	610:813dcc80987e	324	}
mbed_official	610:813dcc80987e	325
mbed_official	610:813dcc80987e	326	/* Otherwise, just the calibration and MSI range change are allowed */
mbed_official	610:813dcc80987e	327	else
mbed_official	610:813dcc80987e	328	{
mbed_official	610:813dcc80987e	329	/* To correctly read data from FLASH memory, the number of wait states (LATENCY)
mbed_official	610:813dcc80987e	330	must be correctly programmed according to the frequency of the CPU clock
mbed_official	610:813dcc80987e	331	(HCLK) and the supply voltage of the device. */
mbed_official	610:813dcc80987e	332	if(RCC_OscInitStruct->MSIClockRange > __HAL_RCC_GET_MSI_RANGE())
mbed_official	610:813dcc80987e	333	{
mbed_official	610:813dcc80987e	334	/* First increase number of wait states update if necessary */
mbed_official	610:813dcc80987e	335	if(RCC_SetFlashLatencyFromMSIRange(RCC_OscInitStruct->MSIClockRange) != HAL_OK)
mbed_official	610:813dcc80987e	336	{
mbed_official	610:813dcc80987e	337	return HAL_ERROR;
mbed_official	610:813dcc80987e	338	}
mbed_official	610:813dcc80987e	339
mbed_official	610:813dcc80987e	340	/* Selects the Multiple Speed oscillator (MSI) clock range .*/
mbed_official	610:813dcc80987e	341	__HAL_RCC_MSI_RANGE_CONFIG(RCC_OscInitStruct->MSIClockRange);
mbed_official	610:813dcc80987e	342	/* Adjusts the Multiple Speed oscillator (MSI) calibration value.*/
mbed_official	610:813dcc80987e	343	__HAL_RCC_MSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->MSICalibrationValue);
mbed_official	610:813dcc80987e	344	}
mbed_official	610:813dcc80987e	345	else
mbed_official	610:813dcc80987e	346	{
mbed_official	610:813dcc80987e	347	/* Else, keep current flash latency while decreasing applies */
mbed_official	610:813dcc80987e	348	/* Selects the Multiple Speed oscillator (MSI) clock range .*/
mbed_official	610:813dcc80987e	349	__HAL_RCC_MSI_RANGE_CONFIG(RCC_OscInitStruct->MSIClockRange);
mbed_official	610:813dcc80987e	350	/* Adjusts the Multiple Speed oscillator (MSI) calibration value.*/
mbed_official	610:813dcc80987e	351	__HAL_RCC_MSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->MSICalibrationValue);
mbed_official	610:813dcc80987e	352
mbed_official	610:813dcc80987e	353	/* Decrease number of wait states update if necessary */
mbed_official	610:813dcc80987e	354	if(RCC_SetFlashLatencyFromMSIRange(RCC_OscInitStruct->MSIClockRange) != HAL_OK)
mbed_official	610:813dcc80987e	355	{
mbed_official	610:813dcc80987e	356	return HAL_ERROR;
mbed_official	610:813dcc80987e	357	}
mbed_official	610:813dcc80987e	358	}
mbed_official	610:813dcc80987e	359
mbed_official	610:813dcc80987e	360	/* Configure the source of time base considering new system clocks settings*/
mbed_official	610:813dcc80987e	361	HAL_InitTick (TICK_INT_PRIORITY);
mbed_official	610:813dcc80987e	362	}
mbed_official	610:813dcc80987e	363	}
mbed_official	610:813dcc80987e	364	else
mbed_official	610:813dcc80987e	365	{
mbed_official	610:813dcc80987e	366	/* Check the MSI State */
mbed_official	610:813dcc80987e	367	if(RCC_OscInitStruct->MSIState != RCC_MSI_OFF)
mbed_official	610:813dcc80987e	368	{
mbed_official	610:813dcc80987e	369	/* Enable the Internal High Speed oscillator (MSI). */
mbed_official	610:813dcc80987e	370	__HAL_RCC_MSI_ENABLE();
mbed_official	610:813dcc80987e	371
mbed_official	610:813dcc80987e	372	/* Get timeout */
mbed_official	610:813dcc80987e	373	tickstart = HAL_GetTick();
mbed_official	610:813dcc80987e	374
mbed_official	610:813dcc80987e	375	/* Wait till MSI is ready */
mbed_official	610:813dcc80987e	376	while(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) == RESET)
mbed_official	610:813dcc80987e	377	{
mbed_official	610:813dcc80987e	378	if((HAL_GetTick() - tickstart) > MSI_TIMEOUT_VALUE)
mbed_official	610:813dcc80987e	379	{
mbed_official	610:813dcc80987e	380	return HAL_TIMEOUT;
mbed_official	610:813dcc80987e	381	}
mbed_official	610:813dcc80987e	382	}
mbed_official	610:813dcc80987e	383	/* Selects the Multiple Speed oscillator (MSI) clock range .*/
mbed_official	610:813dcc80987e	384	__HAL_RCC_MSI_RANGE_CONFIG(RCC_OscInitStruct->MSIClockRange);
mbed_official	610:813dcc80987e	385	/* Adjusts the Multiple Speed oscillator (MSI) calibration value.*/
mbed_official	610:813dcc80987e	386	__HAL_RCC_MSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->MSICalibrationValue);
mbed_official	610:813dcc80987e	387
mbed_official	610:813dcc80987e	388	}
mbed_official	610:813dcc80987e	389	else
mbed_official	610:813dcc80987e	390	{
mbed_official	610:813dcc80987e	391	/* Disable the Internal High Speed oscillator (MSI). */
mbed_official	610:813dcc80987e	392	__HAL_RCC_MSI_DISABLE();
mbed_official	610:813dcc80987e	393
mbed_official	610:813dcc80987e	394	/* Get timeout */
mbed_official	610:813dcc80987e	395	tickstart = HAL_GetTick();
mbed_official	610:813dcc80987e	396
mbed_official	610:813dcc80987e	397	/* Wait till MSI is ready */
mbed_official	610:813dcc80987e	398	while(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) != RESET)
mbed_official	610:813dcc80987e	399	{
mbed_official	610:813dcc80987e	400	if((HAL_GetTick() - tickstart) > MSI_TIMEOUT_VALUE)
mbed_official	610:813dcc80987e	401	{
mbed_official	610:813dcc80987e	402	return HAL_TIMEOUT;
mbed_official	610:813dcc80987e	403	}
mbed_official	610:813dcc80987e	404	}
mbed_official	610:813dcc80987e	405	}
mbed_official	610:813dcc80987e	406	}
mbed_official	610:813dcc80987e	407	}
mbed_official	610:813dcc80987e	408	/------------------------------- HSE Configuration ------------------------/
mbed_official	610:813dcc80987e	409	if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
mbed_official	610:813dcc80987e	410	{
mbed_official	610:813dcc80987e	411	/* Check the parameters */
mbed_official	610:813dcc80987e	412	assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
mbed_official	610:813dcc80987e	413
mbed_official	610:813dcc80987e	414	/* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */
mbed_official	610:813dcc80987e	415	if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) \|\|
mbed_official	610:813dcc80987e	416	((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE)))
mbed_official	610:813dcc80987e	417	{
mbed_official	610:813dcc80987e	418	if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
mbed_official	610:813dcc80987e	419	{
mbed_official	610:813dcc80987e	420	return HAL_ERROR;
mbed_official	610:813dcc80987e	421	}
mbed_official	610:813dcc80987e	422	}
mbed_official	610:813dcc80987e	423	else
mbed_official	610:813dcc80987e	424	{
mbed_official	610:813dcc80987e	425	/* Reset HSEON and HSEBYP bits before configuring the HSE --------------*/
mbed_official	610:813dcc80987e	426	__HAL_RCC_HSE_CONFIG(RCC_HSE_OFF);
mbed_official	610:813dcc80987e	427
mbed_official	610:813dcc80987e	428	/* Get Start Tick*/
mbed_official	610:813dcc80987e	429	tickstart = HAL_GetTick();
mbed_official	610:813dcc80987e	430
mbed_official	610:813dcc80987e	431	/* Wait till HSE is disabled */
mbed_official	610:813dcc80987e	432	while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
mbed_official	610:813dcc80987e	433	{
mbed_official	610:813dcc80987e	434	if((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
mbed_official	610:813dcc80987e	435	{
mbed_official	610:813dcc80987e	436	return HAL_TIMEOUT;
mbed_official	610:813dcc80987e	437	}
mbed_official	610:813dcc80987e	438	}
mbed_official	610:813dcc80987e	439
mbed_official	610:813dcc80987e	440	/* Set the new HSE configuration ---------------------------------------*/
mbed_official	610:813dcc80987e	441	__HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
mbed_official	610:813dcc80987e	442
mbed_official	610:813dcc80987e	443	/* Check the HSE State */
mbed_official	610:813dcc80987e	444	if(RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
mbed_official	610:813dcc80987e	445	{
mbed_official	610:813dcc80987e	446	/* Get Start Tick*/
mbed_official	610:813dcc80987e	447	tickstart = HAL_GetTick();
mbed_official	610:813dcc80987e	448
mbed_official	610:813dcc80987e	449	/* Wait till HSE is ready */
mbed_official	610:813dcc80987e	450	while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
mbed_official	610:813dcc80987e	451	{
mbed_official	610:813dcc80987e	452	if((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
mbed_official	610:813dcc80987e	453	{
mbed_official	610:813dcc80987e	454	return HAL_TIMEOUT;
mbed_official	610:813dcc80987e	455	}
mbed_official	610:813dcc80987e	456	}
mbed_official	610:813dcc80987e	457	}
mbed_official	610:813dcc80987e	458	else
mbed_official	610:813dcc80987e	459	{
mbed_official	610:813dcc80987e	460	/* Get Start Tick*/
mbed_official	610:813dcc80987e	461	tickstart = HAL_GetTick();
mbed_official	610:813dcc80987e	462
mbed_official	610:813dcc80987e	463	/* Wait till HSE is disabled */
mbed_official	610:813dcc80987e	464	while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
mbed_official	610:813dcc80987e	465	{
mbed_official	610:813dcc80987e	466	if((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
mbed_official	610:813dcc80987e	467	{
mbed_official	610:813dcc80987e	468	return HAL_TIMEOUT;
mbed_official	610:813dcc80987e	469	}
mbed_official	610:813dcc80987e	470	}
mbed_official	610:813dcc80987e	471	}
mbed_official	610:813dcc80987e	472	}
mbed_official	610:813dcc80987e	473	}
mbed_official	610:813dcc80987e	474	/----------------------------- HSI Configuration --------------------------/
mbed_official	610:813dcc80987e	475	if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
mbed_official	610:813dcc80987e	476	{
mbed_official	610:813dcc80987e	477	/* Check the parameters */
mbed_official	610:813dcc80987e	478	assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
mbed_official	610:813dcc80987e	479	assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
mbed_official	610:813dcc80987e	480
mbed_official	610:813dcc80987e	481	/* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
mbed_official	610:813dcc80987e	482	if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) \|\|
mbed_official	610:813dcc80987e	483	((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI)))
mbed_official	610:813dcc80987e	484	{
mbed_official	610:813dcc80987e	485	/* When HSI is used as system clock it will not be disabled */
mbed_official	610:813dcc80987e	486	if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState == RCC_HSI_OFF))
mbed_official	610:813dcc80987e	487	{
mbed_official	610:813dcc80987e	488	return HAL_ERROR;
mbed_official	610:813dcc80987e	489	}
mbed_official	610:813dcc80987e	490	/* Otherwise, just the calibration is allowed */
mbed_official	610:813dcc80987e	491	else
mbed_official	610:813dcc80987e	492	{
mbed_official	610:813dcc80987e	493	/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
mbed_official	610:813dcc80987e	494	__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
mbed_official	610:813dcc80987e	495	}
mbed_official	610:813dcc80987e	496	}
mbed_official	610:813dcc80987e	497	else
mbed_official	610:813dcc80987e	498	{
mbed_official	610:813dcc80987e	499	/* Check the HSI State */
mbed_official	610:813dcc80987e	500	if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF)
mbed_official	610:813dcc80987e	501	{
mbed_official	610:813dcc80987e	502	/* Enable the Internal High Speed oscillator (HSI). */
mbed_official	610:813dcc80987e	503	__HAL_RCC_HSI_ENABLE();
mbed_official	610:813dcc80987e	504
mbed_official	610:813dcc80987e	505	/* Get Start Tick*/
mbed_official	610:813dcc80987e	506	tickstart = HAL_GetTick();
mbed_official	610:813dcc80987e	507
mbed_official	610:813dcc80987e	508	/* Wait till HSI is ready */
mbed_official	610:813dcc80987e	509	while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
mbed_official	610:813dcc80987e	510	{
mbed_official	610:813dcc80987e	511	if((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
mbed_official	610:813dcc80987e	512	{
mbed_official	610:813dcc80987e	513	return HAL_TIMEOUT;
mbed_official	610:813dcc80987e	514	}
mbed_official	610:813dcc80987e	515	}
mbed_official	610:813dcc80987e	516
mbed_official	610:813dcc80987e	517	/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
mbed_official	610:813dcc80987e	518	__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
mbed_official	610:813dcc80987e	519	}
mbed_official	610:813dcc80987e	520	else
mbed_official	610:813dcc80987e	521	{
mbed_official	610:813dcc80987e	522	/* Disable the Internal High Speed oscillator (HSI). */
mbed_official	610:813dcc80987e	523	__HAL_RCC_HSI_DISABLE();
mbed_official	610:813dcc80987e	524
mbed_official	610:813dcc80987e	525	/* Get Start Tick*/
mbed_official	610:813dcc80987e	526	tickstart = HAL_GetTick();
mbed_official	610:813dcc80987e	527
mbed_official	610:813dcc80987e	528	/* Wait till HSI is disabled */
mbed_official	610:813dcc80987e	529	while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
mbed_official	610:813dcc80987e	530	{
mbed_official	610:813dcc80987e	531	if((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
mbed_official	610:813dcc80987e	532	{
mbed_official	610:813dcc80987e	533	return HAL_TIMEOUT;
mbed_official	610:813dcc80987e	534	}
mbed_official	610:813dcc80987e	535	}
mbed_official	610:813dcc80987e	536	}
mbed_official	610:813dcc80987e	537	}
mbed_official	610:813dcc80987e	538	}
mbed_official	610:813dcc80987e	539	/------------------------------ LSI Configuration -------------------------/
mbed_official	610:813dcc80987e	540	if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
mbed_official	610:813dcc80987e	541	{
mbed_official	610:813dcc80987e	542	/* Check the parameters */
mbed_official	610:813dcc80987e	543	assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
mbed_official	610:813dcc80987e	544
mbed_official	610:813dcc80987e	545	/* Check the LSI State */
mbed_official	610:813dcc80987e	546	if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
mbed_official	610:813dcc80987e	547	{
mbed_official	610:813dcc80987e	548	/* Enable the Internal Low Speed oscillator (LSI). */
mbed_official	610:813dcc80987e	549	__HAL_RCC_LSI_ENABLE();
mbed_official	610:813dcc80987e	550
mbed_official	610:813dcc80987e	551	/* Get Start Tick*/
mbed_official	610:813dcc80987e	552	tickstart = HAL_GetTick();
mbed_official	610:813dcc80987e	553
mbed_official	610:813dcc80987e	554	/* Wait till LSI is ready */
mbed_official	610:813dcc80987e	555	while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
mbed_official	610:813dcc80987e	556	{
mbed_official	610:813dcc80987e	557	if((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
mbed_official	610:813dcc80987e	558	{
mbed_official	610:813dcc80987e	559	return HAL_TIMEOUT;
mbed_official	610:813dcc80987e	560	}
mbed_official	610:813dcc80987e	561	}
mbed_official	610:813dcc80987e	562	}
mbed_official	610:813dcc80987e	563	else
mbed_official	610:813dcc80987e	564	{
mbed_official	610:813dcc80987e	565	/* Disable the Internal Low Speed oscillator (LSI). */
mbed_official	610:813dcc80987e	566	__HAL_RCC_LSI_DISABLE();
mbed_official	610:813dcc80987e	567
mbed_official	610:813dcc80987e	568	/* Get Start Tick*/
mbed_official	610:813dcc80987e	569	tickstart = HAL_GetTick();
mbed_official	610:813dcc80987e	570
mbed_official	610:813dcc80987e	571	/* Wait till LSI is disabled */
mbed_official	610:813dcc80987e	572	while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
mbed_official	610:813dcc80987e	573	{
mbed_official	610:813dcc80987e	574	if((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
mbed_official	610:813dcc80987e	575	{
mbed_official	610:813dcc80987e	576	return HAL_TIMEOUT;
mbed_official	610:813dcc80987e	577	}
mbed_official	610:813dcc80987e	578	}
mbed_official	610:813dcc80987e	579	}
mbed_official	610:813dcc80987e	580	}
mbed_official	610:813dcc80987e	581	/------------------------------ LSE Configuration -------------------------/
mbed_official	610:813dcc80987e	582	if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
mbed_official	610:813dcc80987e	583	{
mbed_official	610:813dcc80987e	584	FlagStatus pwrclkchanged = RESET;
mbed_official	610:813dcc80987e	585
mbed_official	610:813dcc80987e	586	/* Check the parameters */
mbed_official	610:813dcc80987e	587	assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
mbed_official	610:813dcc80987e	588
mbed_official	610:813dcc80987e	589	/* Update LSE configuration in Backup Domain control register */
mbed_official	610:813dcc80987e	590	/* Requires to enable write access to Backup Domain of necessary */
mbed_official	610:813dcc80987e	591	if(HAL_IS_BIT_CLR(RCC->APB1ENR1, RCC_APB1ENR1_PWREN))
mbed_official	610:813dcc80987e	592	{
mbed_official	610:813dcc80987e	593	__HAL_RCC_PWR_CLK_ENABLE();
mbed_official	610:813dcc80987e	594	pwrclkchanged = SET;
mbed_official	610:813dcc80987e	595	}
mbed_official	610:813dcc80987e	596
mbed_official	610:813dcc80987e	597	if(HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP))
mbed_official	610:813dcc80987e	598	{
mbed_official	610:813dcc80987e	599	/* Enable write access to Backup domain */
mbed_official	610:813dcc80987e	600	SET_BIT(PWR->CR1, PWR_CR1_DBP);
mbed_official	610:813dcc80987e	601
mbed_official	610:813dcc80987e	602	/* Wait for Backup domain Write protection disable */
mbed_official	610:813dcc80987e	603	tickstart = HAL_GetTick();
mbed_official	610:813dcc80987e	604
mbed_official	610:813dcc80987e	605	while(HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP))
mbed_official	610:813dcc80987e	606	{
mbed_official	610:813dcc80987e	607	if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
mbed_official	610:813dcc80987e	608	{
mbed_official	610:813dcc80987e	609	return HAL_TIMEOUT;
mbed_official	610:813dcc80987e	610	}
mbed_official	610:813dcc80987e	611	}
mbed_official	610:813dcc80987e	612	}
mbed_official	610:813dcc80987e	613
mbed_official	610:813dcc80987e	614	/* Reset LSEON and LSEBYP bits before configuring the LSE ----------------*/
mbed_official	610:813dcc80987e	615	__HAL_RCC_LSE_CONFIG(RCC_LSE_OFF);
mbed_official	610:813dcc80987e	616
mbed_official	610:813dcc80987e	617	/* Get Start Tick*/
mbed_official	610:813dcc80987e	618	tickstart = HAL_GetTick();
mbed_official	610:813dcc80987e	619
mbed_official	610:813dcc80987e	620	/* Wait till LSE is ready */
mbed_official	610:813dcc80987e	621	while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
mbed_official	610:813dcc80987e	622	{
mbed_official	610:813dcc80987e	623	if((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
mbed_official	610:813dcc80987e	624	{
mbed_official	610:813dcc80987e	625	return HAL_TIMEOUT;
mbed_official	610:813dcc80987e	626	}
mbed_official	610:813dcc80987e	627	}
mbed_official	610:813dcc80987e	628
mbed_official	610:813dcc80987e	629	/* Set the new LSE configuration -----------------------------------------*/
mbed_official	610:813dcc80987e	630	__HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
mbed_official	610:813dcc80987e	631
mbed_official	610:813dcc80987e	632	/* Check the LSE State */
mbed_official	610:813dcc80987e	633	if(RCC_OscInitStruct->LSEState != RCC_LSE_OFF)
mbed_official	610:813dcc80987e	634	{
mbed_official	610:813dcc80987e	635	/* Get Start Tick*/
mbed_official	610:813dcc80987e	636	tickstart = HAL_GetTick();
mbed_official	610:813dcc80987e	637
mbed_official	610:813dcc80987e	638	/* Wait till LSE is ready */
mbed_official	610:813dcc80987e	639	while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
mbed_official	610:813dcc80987e	640	{
mbed_official	610:813dcc80987e	641	if((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
mbed_official	610:813dcc80987e	642	{
mbed_official	610:813dcc80987e	643	return HAL_TIMEOUT;
mbed_official	610:813dcc80987e	644	}
mbed_official	610:813dcc80987e	645	}
mbed_official	610:813dcc80987e	646	}
mbed_official	610:813dcc80987e	647	else
mbed_official	610:813dcc80987e	648	{
mbed_official	610:813dcc80987e	649	/* Get Start Tick*/
mbed_official	610:813dcc80987e	650	tickstart = HAL_GetTick();
mbed_official	610:813dcc80987e	651
mbed_official	610:813dcc80987e	652	/* Wait till LSE is disabled */
mbed_official	610:813dcc80987e	653	while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
mbed_official	610:813dcc80987e	654	{
mbed_official	610:813dcc80987e	655	if((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
mbed_official	610:813dcc80987e	656	{
mbed_official	610:813dcc80987e	657	return HAL_TIMEOUT;
mbed_official	610:813dcc80987e	658	}
mbed_official	610:813dcc80987e	659	}
mbed_official	610:813dcc80987e	660	}
mbed_official	610:813dcc80987e	661
mbed_official	610:813dcc80987e	662	/* Restore clock configuration if changed */
mbed_official	610:813dcc80987e	663	if(pwrclkchanged == SET)
mbed_official	610:813dcc80987e	664	{
mbed_official	610:813dcc80987e	665	__HAL_RCC_PWR_CLK_DISABLE();
mbed_official	610:813dcc80987e	666	}
mbed_official	610:813dcc80987e	667	}
mbed_official	610:813dcc80987e	668	/-------------------------------- PLL Configuration -----------------------/
mbed_official	610:813dcc80987e	669	/* Check the parameters */
mbed_official	610:813dcc80987e	670	assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
mbed_official	610:813dcc80987e	671
mbed_official	610:813dcc80987e	672	if(RCC_OscInitStruct->PLL.PLLState != RCC_PLL_NONE)
mbed_official	610:813dcc80987e	673	{
mbed_official	610:813dcc80987e	674	/* Check if the PLL is used as system clock or not */
mbed_official	610:813dcc80987e	675	if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL)
mbed_official	610:813dcc80987e	676	{
mbed_official	610:813dcc80987e	677	if(RCC_OscInitStruct->PLL.PLLState == RCC_PLL_ON)
mbed_official	610:813dcc80987e	678	{
mbed_official	610:813dcc80987e	679	/* Check the parameters */
mbed_official	610:813dcc80987e	680	assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource));
mbed_official	610:813dcc80987e	681	assert_param(IS_RCC_PLLM_VALUE(RCC_OscInitStruct->PLL.PLLM));
mbed_official	610:813dcc80987e	682	assert_param(IS_RCC_PLLN_VALUE(RCC_OscInitStruct->PLL.PLLN));
mbed_official	610:813dcc80987e	683	assert_param(IS_RCC_PLLP_VALUE(RCC_OscInitStruct->PLL.PLLP));
mbed_official	610:813dcc80987e	684	assert_param(IS_RCC_PLLQ_VALUE(RCC_OscInitStruct->PLL.PLLQ));
mbed_official	610:813dcc80987e	685	assert_param(IS_RCC_PLLR_VALUE(RCC_OscInitStruct->PLL.PLLR));
mbed_official	610:813dcc80987e	686
mbed_official	610:813dcc80987e	687	/* Disable the main PLL. */
mbed_official	610:813dcc80987e	688	__HAL_RCC_PLL_DISABLE();
mbed_official	610:813dcc80987e	689
mbed_official	610:813dcc80987e	690	/* Get Start Tick*/
mbed_official	610:813dcc80987e	691	tickstart = HAL_GetTick();
mbed_official	610:813dcc80987e	692
mbed_official	610:813dcc80987e	693	/* Wait till PLL is ready */
mbed_official	610:813dcc80987e	694	while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
mbed_official	610:813dcc80987e	695	{
mbed_official	610:813dcc80987e	696	if((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
mbed_official	610:813dcc80987e	697	{
mbed_official	610:813dcc80987e	698	return HAL_TIMEOUT;
mbed_official	610:813dcc80987e	699	}
mbed_official	610:813dcc80987e	700	}
mbed_official	610:813dcc80987e	701
mbed_official	610:813dcc80987e	702	/* Configure the main PLL clock source, multiplication and division factors. */
mbed_official	610:813dcc80987e	703	__HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
mbed_official	610:813dcc80987e	704	RCC_OscInitStruct->PLL.PLLM,
mbed_official	610:813dcc80987e	705	RCC_OscInitStruct->PLL.PLLN,
mbed_official	610:813dcc80987e	706	RCC_OscInitStruct->PLL.PLLP,
mbed_official	610:813dcc80987e	707	RCC_OscInitStruct->PLL.PLLQ,
mbed_official	610:813dcc80987e	708	RCC_OscInitStruct->PLL.PLLR);
mbed_official	610:813dcc80987e	709
mbed_official	610:813dcc80987e	710	/* Enable the main PLL. */
mbed_official	610:813dcc80987e	711	__HAL_RCC_PLL_ENABLE();
mbed_official	610:813dcc80987e	712
mbed_official	610:813dcc80987e	713	/* Enable PLL System Clock output. */
mbed_official	610:813dcc80987e	714	__HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL_SYSCLK);
mbed_official	610:813dcc80987e	715
mbed_official	610:813dcc80987e	716	/* Get Start Tick*/
mbed_official	610:813dcc80987e	717	tickstart = HAL_GetTick();
mbed_official	610:813dcc80987e	718
mbed_official	610:813dcc80987e	719	/* Wait till PLL is ready */
mbed_official	610:813dcc80987e	720	while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
mbed_official	610:813dcc80987e	721	{
mbed_official	610:813dcc80987e	722	if((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
mbed_official	610:813dcc80987e	723	{
mbed_official	610:813dcc80987e	724	return HAL_TIMEOUT;
mbed_official	610:813dcc80987e	725	}
mbed_official	610:813dcc80987e	726	}
mbed_official	610:813dcc80987e	727	}
mbed_official	610:813dcc80987e	728	else
mbed_official	610:813dcc80987e	729	{
mbed_official	610:813dcc80987e	730	/* Disable the main PLL. */
mbed_official	610:813dcc80987e	731	__HAL_RCC_PLL_DISABLE();
mbed_official	610:813dcc80987e	732
mbed_official	610:813dcc80987e	733	/* Disable all PLL outputs to save power */
mbed_official	610:813dcc80987e	734	MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC, PLLSOURCE_NONE);
mbed_official	610:813dcc80987e	735	__HAL_RCC_PLLCLKOUT_DISABLE(RCC_PLL_SYSCLK \| RCC_PLL_48M1CLK \| RCC_PLL_SAI3CLK);
mbed_official	610:813dcc80987e	736
mbed_official	610:813dcc80987e	737	/* Get Start Tick*/
mbed_official	610:813dcc80987e	738	tickstart = HAL_GetTick();
mbed_official	610:813dcc80987e	739
mbed_official	610:813dcc80987e	740	/* Wait till PLL is disabled */
mbed_official	610:813dcc80987e	741	while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
mbed_official	610:813dcc80987e	742	{
mbed_official	610:813dcc80987e	743	if((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
mbed_official	610:813dcc80987e	744	{
mbed_official	610:813dcc80987e	745	return HAL_TIMEOUT;
mbed_official	610:813dcc80987e	746	}
mbed_official	610:813dcc80987e	747	}
mbed_official	610:813dcc80987e	748	}
mbed_official	610:813dcc80987e	749	}
mbed_official	610:813dcc80987e	750	else
mbed_official	610:813dcc80987e	751	{
mbed_official	610:813dcc80987e	752	return HAL_ERROR;
mbed_official	610:813dcc80987e	753	}
mbed_official	610:813dcc80987e	754	}
mbed_official	610:813dcc80987e	755	return HAL_OK;
mbed_official	610:813dcc80987e	756	}
mbed_official	610:813dcc80987e	757
mbed_official	610:813dcc80987e	758	/**
mbed_official	610:813dcc80987e	759	* @brief Initialize the CPU, AHB and APB busses clocks according to the specified
mbed_official	610:813dcc80987e	760	* parameters in the RCC_ClkInitStruct.
mbed_official	610:813dcc80987e	761	* @param RCC_ClkInitStruct: pointer to an RCC_OscInitTypeDef structure that
mbed_official	610:813dcc80987e	762	* contains the configuration information for the RCC peripheral.
mbed_official	610:813dcc80987e	763	* @param FLatency: FLASH Latency
mbed_official	610:813dcc80987e	764	* This parameter can be one of the following values:
mbed_official	610:813dcc80987e	765	* @arg FLASH_LATENCY_0: FLASH 0 Latency cycle
mbed_official	610:813dcc80987e	766	* @arg FLASH_LATENCY_1: FLASH 1 Latency cycle
mbed_official	610:813dcc80987e	767	* @arg FLASH_LATENCY_2: FLASH 2 Latency cycle
mbed_official	610:813dcc80987e	768	* @arg FLASH_LATENCY_3: FLASH 3 Latency cycle
mbed_official	610:813dcc80987e	769	* @arg FLASH_LATENCY_4: FLASH 4 Latency cycle
mbed_official	610:813dcc80987e	770	*
mbed_official	610:813dcc80987e	771	* @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency
mbed_official	610:813dcc80987e	772	* and updated by HAL_RCC_GetHCLKFreq() function called within this function
mbed_official	610:813dcc80987e	773	*
mbed_official	610:813dcc80987e	774	* @note The MSI is used by default as system clock source after
mbed_official	610:813dcc80987e	775	* startup from Reset, wake-up from STANDBY mode. After restart from Reset,
mbed_official	610:813dcc80987e	776	* the MSI frequency is set to its default value 4 MHz.
mbed_official	610:813dcc80987e	777	*
mbed_official	610:813dcc80987e	778	* @note The HSI can be selected as system clock source after
mbed_official	610:813dcc80987e	779	* from STOP modes or in case of failure of the HSE used directly or indirectly
mbed_official	610:813dcc80987e	780	* as system clock (if the Clock Security System CSS is enabled).
mbed_official	610:813dcc80987e	781	*
mbed_official	610:813dcc80987e	782	* @note A switch from one clock source to another occurs only if the target
mbed_official	610:813dcc80987e	783	* clock source is ready (clock stable after startup delay or PLL locked).
mbed_official	610:813dcc80987e	784	* If a clock source which is not yet ready is selected, the switch will
mbed_official	610:813dcc80987e	785	* occur when the clock source is ready.
mbed_official	610:813dcc80987e	786	*
mbed_official	610:813dcc80987e	787	* @note You can use HAL_RCC_GetClockConfig() function to know which clock is
mbed_official	610:813dcc80987e	788	* currently used as system clock source.
mbed_official	610:813dcc80987e	789	*
mbed_official	610:813dcc80987e	790	* @note Depending on the device voltage range, the software has to set correctly
mbed_official	610:813dcc80987e	791	* HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency
mbed_official	610:813dcc80987e	792	* (for more details refer to section above "Initialization/de-initialization functions")
mbed_official	610:813dcc80987e	793	* @retval None
mbed_official	610:813dcc80987e	794	*/
mbed_official	610:813dcc80987e	795	HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
mbed_official	610:813dcc80987e	796	{
mbed_official	610:813dcc80987e	797	uint32_t tickstart = 0;
mbed_official	610:813dcc80987e	798
mbed_official	610:813dcc80987e	799	/* Check the parameters */
mbed_official	610:813dcc80987e	800	assert_param(RCC_ClkInitStruct != NULL);
mbed_official	610:813dcc80987e	801	assert_param(IS_RCC_CLOCKTYPE(RCC_ClkInitStruct->ClockType));
mbed_official	610:813dcc80987e	802	assert_param(IS_FLASH_LATENCY(FLatency));
mbed_official	610:813dcc80987e	803
mbed_official	610:813dcc80987e	804	/* To correctly read data from FLASH memory, the number of wait states (LATENCY)
mbed_official	610:813dcc80987e	805	must be correctly programmed according to the frequency of the CPU clock
mbed_official	610:813dcc80987e	806	(HCLK) and the supply voltage of the device. */
mbed_official	610:813dcc80987e	807
mbed_official	610:813dcc80987e	808	/* Increasing the CPU frequency */
mbed_official	610:813dcc80987e	809	if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY))
mbed_official	610:813dcc80987e	810	{
mbed_official	610:813dcc80987e	811	/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
mbed_official	610:813dcc80987e	812	__HAL_FLASH_SET_LATENCY(FLatency);
mbed_official	610:813dcc80987e	813
mbed_official	610:813dcc80987e	814	/* Check that the new number of wait states is taken into account to access the Flash
mbed_official	610:813dcc80987e	815	memory by reading the FLASH_ACR register */
mbed_official	610:813dcc80987e	816	if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency)
mbed_official	610:813dcc80987e	817	{
mbed_official	610:813dcc80987e	818	return HAL_ERROR;
mbed_official	610:813dcc80987e	819	}
mbed_official	610:813dcc80987e	820
mbed_official	610:813dcc80987e	821	/-------------------------- HCLK Configuration --------------------------/
mbed_official	610:813dcc80987e	822	if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
mbed_official	610:813dcc80987e	823	{
mbed_official	610:813dcc80987e	824	assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
mbed_official	610:813dcc80987e	825	MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
mbed_official	610:813dcc80987e	826	}
mbed_official	610:813dcc80987e	827
mbed_official	610:813dcc80987e	828	/------------------------- SYSCLK Configuration ---------------------------/
mbed_official	610:813dcc80987e	829	if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
mbed_official	610:813dcc80987e	830	{
mbed_official	610:813dcc80987e	831	assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
mbed_official	610:813dcc80987e	832
mbed_official	610:813dcc80987e	833	/* HSE is selected as System Clock Source */
mbed_official	610:813dcc80987e	834	if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
mbed_official	610:813dcc80987e	835	{
mbed_official	610:813dcc80987e	836	/* Check the HSE ready flag */
mbed_official	610:813dcc80987e	837	if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
mbed_official	610:813dcc80987e	838	{
mbed_official	610:813dcc80987e	839	return HAL_ERROR;
mbed_official	610:813dcc80987e	840	}
mbed_official	610:813dcc80987e	841	}
mbed_official	610:813dcc80987e	842	/* PLL is selected as System Clock Source */
mbed_official	610:813dcc80987e	843	else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
mbed_official	610:813dcc80987e	844	{
mbed_official	610:813dcc80987e	845	/* Check the PLL ready flag */
mbed_official	610:813dcc80987e	846	if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
mbed_official	610:813dcc80987e	847	{
mbed_official	610:813dcc80987e	848	return HAL_ERROR;
mbed_official	610:813dcc80987e	849	}
mbed_official	610:813dcc80987e	850	}
mbed_official	610:813dcc80987e	851	/* MSI is selected as System Clock Source */
mbed_official	610:813dcc80987e	852	else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_MSI)
mbed_official	610:813dcc80987e	853	{
mbed_official	610:813dcc80987e	854	/* Check the MSI ready flag */
mbed_official	610:813dcc80987e	855	if(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) == RESET)
mbed_official	610:813dcc80987e	856	{
mbed_official	610:813dcc80987e	857	return HAL_ERROR;
mbed_official	610:813dcc80987e	858	}
mbed_official	610:813dcc80987e	859	}
mbed_official	610:813dcc80987e	860	/* HSI is selected as System Clock Source */
mbed_official	610:813dcc80987e	861	else
mbed_official	610:813dcc80987e	862	{
mbed_official	610:813dcc80987e	863	/* Check the HSI ready flag */
mbed_official	610:813dcc80987e	864	if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
mbed_official	610:813dcc80987e	865	{
mbed_official	610:813dcc80987e	866	return HAL_ERROR;
mbed_official	610:813dcc80987e	867	}
mbed_official	610:813dcc80987e	868	}
mbed_official	610:813dcc80987e	869	MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, RCC_ClkInitStruct->SYSCLKSource);
mbed_official	610:813dcc80987e	870
mbed_official	610:813dcc80987e	871	/* Get Start Tick*/
mbed_official	610:813dcc80987e	872	tickstart = HAL_GetTick();
mbed_official	610:813dcc80987e	873
mbed_official	610:813dcc80987e	874	if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
mbed_official	610:813dcc80987e	875	{
mbed_official	610:813dcc80987e	876	while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_HSE)
mbed_official	610:813dcc80987e	877	{
mbed_official	610:813dcc80987e	878	if((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official	610:813dcc80987e	879	{
mbed_official	610:813dcc80987e	880	return HAL_TIMEOUT;
mbed_official	610:813dcc80987e	881	}
mbed_official	610:813dcc80987e	882	}
mbed_official	610:813dcc80987e	883	}
mbed_official	610:813dcc80987e	884	else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
mbed_official	610:813dcc80987e	885	{
mbed_official	610:813dcc80987e	886	while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL)
mbed_official	610:813dcc80987e	887	{
mbed_official	610:813dcc80987e	888	if((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official	610:813dcc80987e	889	{
mbed_official	610:813dcc80987e	890	return HAL_TIMEOUT;
mbed_official	610:813dcc80987e	891	}
mbed_official	610:813dcc80987e	892	}
mbed_official	610:813dcc80987e	893	}
mbed_official	610:813dcc80987e	894	else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_MSI)
mbed_official	610:813dcc80987e	895	{
mbed_official	610:813dcc80987e	896	while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_MSI)
mbed_official	610:813dcc80987e	897	{
mbed_official	610:813dcc80987e	898	if((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official	610:813dcc80987e	899	{
mbed_official	610:813dcc80987e	900	return HAL_TIMEOUT;
mbed_official	610:813dcc80987e	901	}
mbed_official	610:813dcc80987e	902	}
mbed_official	610:813dcc80987e	903	}
mbed_official	610:813dcc80987e	904	else
mbed_official	610:813dcc80987e	905	{
mbed_official	610:813dcc80987e	906	while(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_HSI)
mbed_official	610:813dcc80987e	907	{
mbed_official	610:813dcc80987e	908	if((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official	610:813dcc80987e	909	{
mbed_official	610:813dcc80987e	910	return HAL_TIMEOUT;
mbed_official	610:813dcc80987e	911	}
mbed_official	610:813dcc80987e	912	}
mbed_official	610:813dcc80987e	913	}
mbed_official	610:813dcc80987e	914	}
mbed_official	610:813dcc80987e	915	}
mbed_official	610:813dcc80987e	916	/* Decreasing the CPU frequency */
mbed_official	610:813dcc80987e	917	else
mbed_official	610:813dcc80987e	918	{
mbed_official	610:813dcc80987e	919	/-------------------------- HCLK Configuration --------------------------/
mbed_official	610:813dcc80987e	920	if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
mbed_official	610:813dcc80987e	921	{
mbed_official	610:813dcc80987e	922	assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
mbed_official	610:813dcc80987e	923	MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
mbed_official	610:813dcc80987e	924	}
mbed_official	610:813dcc80987e	925
mbed_official	610:813dcc80987e	926	/------------------------- SYSCLK Configuration -------------------------/
mbed_official	610:813dcc80987e	927	if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
mbed_official	610:813dcc80987e	928	{
mbed_official	610:813dcc80987e	929	assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
mbed_official	610:813dcc80987e	930
mbed_official	610:813dcc80987e	931	/* HSE is selected as System Clock Source */
mbed_official	610:813dcc80987e	932	if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
mbed_official	610:813dcc80987e	933	{
mbed_official	610:813dcc80987e	934	/* Check the HSE ready flag */
mbed_official	610:813dcc80987e	935	if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
mbed_official	610:813dcc80987e	936	{
mbed_official	610:813dcc80987e	937	return HAL_ERROR;
mbed_official	610:813dcc80987e	938	}
mbed_official	610:813dcc80987e	939	}
mbed_official	610:813dcc80987e	940	/* MSI is selected as System Clock Source */
mbed_official	610:813dcc80987e	941	else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_MSI)
mbed_official	610:813dcc80987e	942	{
mbed_official	610:813dcc80987e	943	/* Check the MSI ready flag */
mbed_official	610:813dcc80987e	944	if(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) == RESET)
mbed_official	610:813dcc80987e	945	{
mbed_official	610:813dcc80987e	946	return HAL_ERROR;
mbed_official	610:813dcc80987e	947	}
mbed_official	610:813dcc80987e	948	}
mbed_official	610:813dcc80987e	949	/* PLL is selected as System Clock Source */
mbed_official	610:813dcc80987e	950	else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
mbed_official	610:813dcc80987e	951	{
mbed_official	610:813dcc80987e	952	/* Check the PLL ready flag */
mbed_official	610:813dcc80987e	953	if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
mbed_official	610:813dcc80987e	954	{
mbed_official	610:813dcc80987e	955	return HAL_ERROR;
mbed_official	610:813dcc80987e	956	}
mbed_official	610:813dcc80987e	957	}
mbed_official	610:813dcc80987e	958	/* HSI is selected as System Clock Source */
mbed_official	610:813dcc80987e	959	else
mbed_official	610:813dcc80987e	960	{
mbed_official	610:813dcc80987e	961	/* Check the HSI ready flag */
mbed_official	610:813dcc80987e	962	if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
mbed_official	610:813dcc80987e	963	{
mbed_official	610:813dcc80987e	964	return HAL_ERROR;
mbed_official	610:813dcc80987e	965	}
mbed_official	610:813dcc80987e	966	}
mbed_official	610:813dcc80987e	967	MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, RCC_ClkInitStruct->SYSCLKSource);
mbed_official	610:813dcc80987e	968
mbed_official	610:813dcc80987e	969	/* Get Start Tick*/
mbed_official	610:813dcc80987e	970	tickstart = HAL_GetTick();
mbed_official	610:813dcc80987e	971
mbed_official	610:813dcc80987e	972	if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
mbed_official	610:813dcc80987e	973	{
mbed_official	610:813dcc80987e	974	while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_HSE)
mbed_official	610:813dcc80987e	975	{
mbed_official	610:813dcc80987e	976	if((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official	610:813dcc80987e	977	{
mbed_official	610:813dcc80987e	978	return HAL_TIMEOUT;
mbed_official	610:813dcc80987e	979	}
mbed_official	610:813dcc80987e	980	}
mbed_official	610:813dcc80987e	981	}
mbed_official	610:813dcc80987e	982	else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
mbed_official	610:813dcc80987e	983	{
mbed_official	610:813dcc80987e	984	while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL)
mbed_official	610:813dcc80987e	985	{
mbed_official	610:813dcc80987e	986	if((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official	610:813dcc80987e	987	{
mbed_official	610:813dcc80987e	988	return HAL_TIMEOUT;
mbed_official	610:813dcc80987e	989	}
mbed_official	610:813dcc80987e	990	}
mbed_official	610:813dcc80987e	991	}
mbed_official	610:813dcc80987e	992	else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_MSI)
mbed_official	610:813dcc80987e	993	{
mbed_official	610:813dcc80987e	994	while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_MSI)
mbed_official	610:813dcc80987e	995	{
mbed_official	610:813dcc80987e	996	if((HAL_GetTick() - tickstart) >= CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official	610:813dcc80987e	997	{
mbed_official	610:813dcc80987e	998	return HAL_TIMEOUT;
mbed_official	610:813dcc80987e	999	}
mbed_official	610:813dcc80987e	1000	}
mbed_official	610:813dcc80987e	1001	}
mbed_official	610:813dcc80987e	1002	else
mbed_official	610:813dcc80987e	1003	{
mbed_official	610:813dcc80987e	1004	while(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_HSI)
mbed_official	610:813dcc80987e	1005	{
mbed_official	610:813dcc80987e	1006	if((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official	610:813dcc80987e	1007	{
mbed_official	610:813dcc80987e	1008	return HAL_TIMEOUT;
mbed_official	610:813dcc80987e	1009	}
mbed_official	610:813dcc80987e	1010	}
mbed_official	610:813dcc80987e	1011	}
mbed_official	610:813dcc80987e	1012	}
mbed_official	610:813dcc80987e	1013
mbed_official	610:813dcc80987e	1014	/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
mbed_official	610:813dcc80987e	1015	__HAL_FLASH_SET_LATENCY(FLatency);
mbed_official	610:813dcc80987e	1016
mbed_official	610:813dcc80987e	1017	/* Check that the new number of wait states is taken into account to access the Flash
mbed_official	610:813dcc80987e	1018	memory by reading the FLASH_ACR register */
mbed_official	610:813dcc80987e	1019	if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency)
mbed_official	610:813dcc80987e	1020	{
mbed_official	610:813dcc80987e	1021	return HAL_ERROR;
mbed_official	610:813dcc80987e	1022	}
mbed_official	610:813dcc80987e	1023	}
mbed_official	610:813dcc80987e	1024
mbed_official	610:813dcc80987e	1025	/-------------------------- PCLK1 Configuration ---------------------------/
mbed_official	610:813dcc80987e	1026	if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
mbed_official	610:813dcc80987e	1027	{
mbed_official	610:813dcc80987e	1028	assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
mbed_official	610:813dcc80987e	1029	MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
mbed_official	610:813dcc80987e	1030	}
mbed_official	610:813dcc80987e	1031
mbed_official	610:813dcc80987e	1032	/-------------------------- PCLK2 Configuration ---------------------------/
mbed_official	610:813dcc80987e	1033	if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
mbed_official	610:813dcc80987e	1034	{
mbed_official	610:813dcc80987e	1035	assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
mbed_official	610:813dcc80987e	1036	MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3));
mbed_official	610:813dcc80987e	1037	}
mbed_official	610:813dcc80987e	1038
mbed_official	610:813dcc80987e	1039	/* Configure the source of time base considering new system clocks settings*/
mbed_official	610:813dcc80987e	1040	HAL_InitTick (TICK_INT_PRIORITY);
mbed_official	610:813dcc80987e	1041
mbed_official	610:813dcc80987e	1042	return HAL_OK;
mbed_official	610:813dcc80987e	1043	}
mbed_official	610:813dcc80987e	1044
mbed_official	610:813dcc80987e	1045	/**
mbed_official	610:813dcc80987e	1046	* @}
mbed_official	610:813dcc80987e	1047	*/
mbed_official	610:813dcc80987e	1048
mbed_official	610:813dcc80987e	1049	/** @defgroup RCC_Exported_Functions_Group2 Peripheral Control functions
mbed_official	610:813dcc80987e	1050	* @brief RCC clocks control functions
mbed_official	610:813dcc80987e	1051	*
mbed_official	610:813dcc80987e	1052	@verbatim
mbed_official	610:813dcc80987e	1053	===============================================================================
mbed_official	610:813dcc80987e	1054	##### Peripheral Control functions #####
mbed_official	610:813dcc80987e	1055	===============================================================================
mbed_official	610:813dcc80987e	1056	[..]
mbed_official	610:813dcc80987e	1057	This subsection provides a set of functions allowing to:
mbed_official	610:813dcc80987e	1058
mbed_official	610:813dcc80987e	1059	(+) Ouput clock to MCO pin.
mbed_official	610:813dcc80987e	1060	(+) Retrieve current clock frequencies.
mbed_official	610:813dcc80987e	1061	(+) Enable the Clock Security System.
mbed_official	610:813dcc80987e	1062
mbed_official	610:813dcc80987e	1063	@endverbatim
mbed_official	610:813dcc80987e	1064	* @{
mbed_official	610:813dcc80987e	1065	*/
mbed_official	610:813dcc80987e	1066
mbed_official	610:813dcc80987e	1067	/**
mbed_official	610:813dcc80987e	1068	* @brief Select the clock source to output on MCO pin(PA8).
mbed_official	610:813dcc80987e	1069	* @note PA8 should be configured in alternate function mode.
mbed_official	610:813dcc80987e	1070	* @param RCC_MCOx: specifies the output direction for the clock source.
mbed_official	610:813dcc80987e	1071	* For STM32L4xx family this parameter can have only one value:
mbed_official	610:813dcc80987e	1072	* @arg RCC_MCO1: Clock source to output on MCO1 pin(PA8).
mbed_official	610:813dcc80987e	1073	* @param RCC_MCOSource: specifies the clock source to output.
mbed_official	610:813dcc80987e	1074	* This parameter can be one of the following values:
mbed_official	610:813dcc80987e	1075	* @arg RCC_MCO1SOURCE_SYSCLK: system clock selected as MCO source
mbed_official	610:813dcc80987e	1076	* @arg RCC_MCO1SOURCE_MSI: MSI clock selected as MCO source
mbed_official	610:813dcc80987e	1077	* @arg RCC_MCO1SOURCE_HSI: HSI clock selected as MCO source
mbed_official	610:813dcc80987e	1078	* @arg RCC_MCO1SOURCE_HSE: HSE clock selected as MCO sourcee
mbed_official	610:813dcc80987e	1079	* @arg RCC_MCO1SOURCE_PLLCLK: main PLL clock selected as MCO source
mbed_official	610:813dcc80987e	1080	* @arg RCC_MCO1SOURCE_LSI: LSI clock selected as MCO source
mbed_official	610:813dcc80987e	1081	* @arg RCC_MCO1SOURCE_LSE: LSE clock selected as MCO source
mbed_official	610:813dcc80987e	1082	* @param RCC_MCODiv: specifies the MCO prescaler.
mbed_official	610:813dcc80987e	1083	* This parameter can be one of the following values:
mbed_official	610:813dcc80987e	1084	* @arg RCC_MCODIV_1: no division applied to MCO clock
mbed_official	610:813dcc80987e	1085	* @arg RCC_MCODIV_2: division by 2 applied to MCO clock
mbed_official	610:813dcc80987e	1086	* @arg RCC_MCODIV_4: division by 4 applied to MCO clock
mbed_official	610:813dcc80987e	1087	* @arg RCC_MCODIV_8: division by 8 applied to MCO clock
mbed_official	610:813dcc80987e	1088	* @arg RCC_MCODIV_16: division by 16 applied to MCO clock
mbed_official	610:813dcc80987e	1089	* @retval None
mbed_official	610:813dcc80987e	1090	*/
mbed_official	610:813dcc80987e	1091	void HAL_RCC_MCOConfig( uint32_t RCC_MCOx, uint32_t RCC_MCOSource, uint32_t RCC_MCODiv)
mbed_official	610:813dcc80987e	1092	{
mbed_official	610:813dcc80987e	1093	GPIO_InitTypeDef GPIO_InitStruct;
mbed_official	610:813dcc80987e	1094	/* Check the parameters */
mbed_official	610:813dcc80987e	1095	assert_param(IS_RCC_MCO(RCC_MCOx));
mbed_official	610:813dcc80987e	1096	assert_param(IS_RCC_MCODIV(RCC_MCODiv));
mbed_official	610:813dcc80987e	1097	assert_param(IS_RCC_MCO1SOURCE(RCC_MCOSource));
mbed_official	610:813dcc80987e	1098
mbed_official	610:813dcc80987e	1099	/* MCO Clock Enable */
mbed_official	610:813dcc80987e	1100	__MCO1_CLK_ENABLE();
mbed_official	610:813dcc80987e	1101
mbed_official	610:813dcc80987e	1102	/* Configue the MCO1 pin in alternate function mode */
mbed_official	610:813dcc80987e	1103	GPIO_InitStruct.Pin = MCO1_PIN;
mbed_official	610:813dcc80987e	1104	GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
mbed_official	610:813dcc80987e	1105	GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
mbed_official	610:813dcc80987e	1106	GPIO_InitStruct.Pull = GPIO_NOPULL;
mbed_official	610:813dcc80987e	1107	GPIO_InitStruct.Alternate = GPIO_AF0_MCO;
mbed_official	610:813dcc80987e	1108	HAL_GPIO_Init(MCO1_GPIO_PORT, &GPIO_InitStruct);
mbed_official	610:813dcc80987e	1109
mbed_official	610:813dcc80987e	1110	/* Mask MCO1 and MCO1PRE[2:0] bits then Select MCO1 clock source and prescaler */
mbed_official	610:813dcc80987e	1111	MODIFY_REG(RCC->CFGR, (RCC_CFGR_MCOSEL \| RCC_CFGR_MCO_PRE), (RCC_MCOSource \| RCC_MCODiv ));
mbed_official	610:813dcc80987e	1112	}
mbed_official	610:813dcc80987e	1113
mbed_official	610:813dcc80987e	1114	/**
mbed_official	610:813dcc80987e	1115	* @brief Return the SYSCLK frequency.
mbed_official	610:813dcc80987e	1116	*
mbed_official	610:813dcc80987e	1117	* @note The system frequency computed by this function is not the real
mbed_official	610:813dcc80987e	1118	* frequency in the chip. It is calculated based on the predefined
mbed_official	610:813dcc80987e	1119	* constant and the selected clock source:
mbed_official	610:813dcc80987e	1120	* @note If SYSCLK source is MSI, function returns values based on MSI
mbed_official	610:813dcc80987e	1121	* Value as defined by the MSI range.
mbed_official	610:813dcc80987e	1122	* @note If SYSCLK source is HSI, function returns values based on HSI_VALUE(*)
mbed_official	610:813dcc80987e	1123	* @note If SYSCLK source is HSE, function returns values based on HSE_VALUE(**)
mbed_official	610:813dcc80987e	1124	* @note If SYSCLK source is PLL, function returns values based on HSE_VALUE(**),
mbed_official	610:813dcc80987e	1125	* HSI_VALUE(*) or MSI Value multiplied/divided by the PLL factors.
mbed_official	610:813dcc80987e	1126	* @note (*) HSI_VALUE is a constant defined in stm32l4xx_hal_conf.h file (default value
mbed_official	610:813dcc80987e	1127	* 16 MHz) but the real value may vary depending on the variations
mbed_official	610:813dcc80987e	1128	* in voltage and temperature.
mbed_official	610:813dcc80987e	1129	* @note (**) HSE_VALUE is a constant defined in stm32l4xx_hal_conf.h file (default value
mbed_official	610:813dcc80987e	1130	* 8 MHz), user has to ensure that HSE_VALUE is same as the real
mbed_official	610:813dcc80987e	1131	* frequency of the crystal used. Otherwise, this function may
mbed_official	610:813dcc80987e	1132	* have wrong result.
mbed_official	610:813dcc80987e	1133	*
mbed_official	610:813dcc80987e	1134	* @note The result of this function could be not correct when using fractional
mbed_official	610:813dcc80987e	1135	* value for HSE crystal.
mbed_official	610:813dcc80987e	1136	*
mbed_official	610:813dcc80987e	1137	* @note This function can be used by the user application to compute the
mbed_official	610:813dcc80987e	1138	* baudrate for the communication peripherals or configure other parameters.
mbed_official	610:813dcc80987e	1139	*
mbed_official	610:813dcc80987e	1140	* @note Each time SYSCLK changes, this function must be called to update the
mbed_official	610:813dcc80987e	1141	* right SYSCLK value. Otherwise, any configuration based on this function will be incorrect.
mbed_official	610:813dcc80987e	1142	*
mbed_official	610:813dcc80987e	1143	*
mbed_official	610:813dcc80987e	1144	* @retval SYSCLK frequency
mbed_official	610:813dcc80987e	1145	*/
mbed_official	610:813dcc80987e	1146	uint32_t HAL_RCC_GetSysClockFreq(void)
mbed_official	610:813dcc80987e	1147	{
mbed_official	610:813dcc80987e	1148	uint32_t msirange = 0, pllvco = 0, pllr = 2, pllsource = 0, pllm = 2;
mbed_official	610:813dcc80987e	1149	uint32_t sysclockfreq = 0;
mbed_official	610:813dcc80987e	1150
mbed_official	610:813dcc80987e	1151	if(__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI)
mbed_official	610:813dcc80987e	1152	{
mbed_official	610:813dcc80987e	1153	/* HSI used as system clock source */
mbed_official	610:813dcc80987e	1154	sysclockfreq = HSI_VALUE;
mbed_official	610:813dcc80987e	1155	}
mbed_official	610:813dcc80987e	1156	else if(__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE)
mbed_official	610:813dcc80987e	1157	{
mbed_official	610:813dcc80987e	1158	/* HSE used as system clock source */
mbed_official	610:813dcc80987e	1159	sysclockfreq = HSE_VALUE;
mbed_official	610:813dcc80987e	1160	}
mbed_official	610:813dcc80987e	1161	else if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_MSI) \|\|
mbed_official	610:813dcc80987e	1162	((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_MSI)))
mbed_official	610:813dcc80987e	1163	{
mbed_official	610:813dcc80987e	1164	/* MSI or PLL with MSI source used as system clock source */
mbed_official	610:813dcc80987e	1165
mbed_official	610:813dcc80987e	1166	/* Get SYSCLK source */
mbed_official	610:813dcc80987e	1167	if(READ_BIT(RCC->CR, RCC_CR_MSIRGSEL) == RESET)
mbed_official	610:813dcc80987e	1168	{ /* MSISRANGE from RCC_CSR applies */
mbed_official	610:813dcc80987e	1169	msirange = (RCC->CSR & RCC_CSR_MSISRANGE) >> 8;
mbed_official	610:813dcc80987e	1170	}
mbed_official	610:813dcc80987e	1171	else
mbed_official	610:813dcc80987e	1172	{ /* MSIRANGE from RCC_CR applies */
mbed_official	610:813dcc80987e	1173	msirange = (RCC->CR & RCC_CR_MSIRANGE) >> 4;
mbed_official	610:813dcc80987e	1174	}
mbed_official	610:813dcc80987e	1175	/MSI frequency range in HZ/
mbed_official	610:813dcc80987e	1176	msirange = MSIRangeTable[msirange];
mbed_official	610:813dcc80987e	1177
mbed_official	610:813dcc80987e	1178	if(__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_MSI)
mbed_official	610:813dcc80987e	1179	{
mbed_official	610:813dcc80987e	1180	/* MSI used as system clock source */
mbed_official	610:813dcc80987e	1181	sysclockfreq = msirange;
mbed_official	610:813dcc80987e	1182	}
mbed_official	610:813dcc80987e	1183	}
mbed_official	610:813dcc80987e	1184
mbed_official	610:813dcc80987e	1185	if(__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL)
mbed_official	610:813dcc80987e	1186	{
mbed_official	610:813dcc80987e	1187	/* PLL used as system clock source */
mbed_official	610:813dcc80987e	1188
mbed_official	610:813dcc80987e	1189	/* PLL_VCO = (HSE_VALUE or HSI_VALUE or MSI_VALUE/ PLLM) * PLLN
mbed_official	610:813dcc80987e	1190	SYSCLK = PLL_VCO / PLLR
mbed_official	610:813dcc80987e	1191	*/
mbed_official	610:813dcc80987e	1192	pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
mbed_official	610:813dcc80987e	1193	pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM)>> 4) + 1 ;
mbed_official	610:813dcc80987e	1194
mbed_official	610:813dcc80987e	1195	switch (pllsource)
mbed_official	610:813dcc80987e	1196	{
mbed_official	610:813dcc80987e	1197	case RCC_PLLSOURCE_HSI: /* HSI used as PLL clock source */
mbed_official	610:813dcc80987e	1198	pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
mbed_official	610:813dcc80987e	1199	break;
mbed_official	610:813dcc80987e	1200
mbed_official	610:813dcc80987e	1201	case RCC_PLLSOURCE_HSE: /* HSE used as PLL clock source */
mbed_official	610:813dcc80987e	1202	pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
mbed_official	610:813dcc80987e	1203	break;
mbed_official	610:813dcc80987e	1204
mbed_official	610:813dcc80987e	1205	case RCC_PLLSOURCE_MSI: /* MSI used as PLL clock source */
mbed_official	610:813dcc80987e	1206	default:
mbed_official	610:813dcc80987e	1207	pllvco = (msirange / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
mbed_official	610:813dcc80987e	1208	break;
mbed_official	610:813dcc80987e	1209	}
mbed_official	610:813dcc80987e	1210	pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >>25) + 1 ) *2;
mbed_official	610:813dcc80987e	1211	sysclockfreq = pllvco/pllr;
mbed_official	610:813dcc80987e	1212	}
mbed_official	610:813dcc80987e	1213
mbed_official	610:813dcc80987e	1214	return sysclockfreq;
mbed_official	610:813dcc80987e	1215	}
mbed_official	610:813dcc80987e	1216
mbed_official	610:813dcc80987e	1217	/**
mbed_official	610:813dcc80987e	1218	* @brief Return the HCLK frequency.
mbed_official	610:813dcc80987e	1219	* @note Each time HCLK changes, this function must be called to update the
mbed_official	610:813dcc80987e	1220	* right HCLK value. Otherwise, any configuration based on this function will be incorrect.
mbed_official	610:813dcc80987e	1221	*
mbed_official	610:813dcc80987e	1222	* @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency
mbed_official	610:813dcc80987e	1223	* and updated within this function
mbed_official	610:813dcc80987e	1224	* @retval HCLK frequency
mbed_official	610:813dcc80987e	1225	*/
mbed_official	610:813dcc80987e	1226	uint32_t HAL_RCC_GetHCLKFreq(void)
mbed_official	610:813dcc80987e	1227	{
mbed_official	610:813dcc80987e	1228	SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> POSITION_VAL(RCC_CFGR_HPRE)];
mbed_official	610:813dcc80987e	1229	return SystemCoreClock;
mbed_official	610:813dcc80987e	1230	}
mbed_official	610:813dcc80987e	1231
mbed_official	610:813dcc80987e	1232	/**
mbed_official	610:813dcc80987e	1233	* @brief Return the PCLK1 frequency.
mbed_official	610:813dcc80987e	1234	* @note Each time PCLK1 changes, this function must be called to update the
mbed_official	610:813dcc80987e	1235	* right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
mbed_official	610:813dcc80987e	1236	* @retval PCLK1 frequency
mbed_official	610:813dcc80987e	1237	*/
mbed_official	610:813dcc80987e	1238	uint32_t HAL_RCC_GetPCLK1Freq(void)
mbed_official	610:813dcc80987e	1239	{
mbed_official	610:813dcc80987e	1240	/* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
mbed_official	610:813dcc80987e	1241	return (HAL_RCC_GetHCLKFreq() >> APBAHBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1)>> POSITION_VAL(RCC_CFGR_PPRE1)]);
mbed_official	610:813dcc80987e	1242	}
mbed_official	610:813dcc80987e	1243
mbed_official	610:813dcc80987e	1244	/**
mbed_official	610:813dcc80987e	1245	* @brief Return the PCLK2 frequency.
mbed_official	610:813dcc80987e	1246	* @note Each time PCLK2 changes, this function must be called to update the
mbed_official	610:813dcc80987e	1247	* right PCLK2 value. Otherwise, any configuration based on this function will be incorrect.
mbed_official	610:813dcc80987e	1248	* @retval PCLK2 frequency
mbed_official	610:813dcc80987e	1249	*/
mbed_official	610:813dcc80987e	1250	uint32_t HAL_RCC_GetPCLK2Freq(void)
mbed_official	610:813dcc80987e	1251	{
mbed_official	610:813dcc80987e	1252	/* Get HCLK source and Compute PCLK2 frequency ---------------------------*/
mbed_official	610:813dcc80987e	1253	return (HAL_RCC_GetHCLKFreq()>> APBAHBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2)>> POSITION_VAL(RCC_CFGR_PPRE2)]);
mbed_official	610:813dcc80987e	1254	}
mbed_official	610:813dcc80987e	1255
mbed_official	610:813dcc80987e	1256	/**
mbed_official	610:813dcc80987e	1257	* @brief Configure the RCC_OscInitStruct according to the internal
mbed_official	610:813dcc80987e	1258	* RCC configuration registers.
mbed_official	610:813dcc80987e	1259	* @param RCC_OscInitStruct: pointer to an RCC_OscInitTypeDef structure that
mbed_official	610:813dcc80987e	1260	* will be configured.
mbed_official	610:813dcc80987e	1261	* @retval None
mbed_official	610:813dcc80987e	1262	*/
mbed_official	610:813dcc80987e	1263	void HAL_RCC_GetOscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
mbed_official	610:813dcc80987e	1264	{
mbed_official	610:813dcc80987e	1265	/* Check the parameters */
mbed_official	610:813dcc80987e	1266	assert_param(RCC_OscInitStruct != NULL);
mbed_official	610:813dcc80987e	1267	/* Set all possible values for the Oscillator type parameter ---------------*/
mbed_official	610:813dcc80987e	1268	RCC_OscInitStruct->OscillatorType = RCC_OSCILLATORTYPE_HSE \| RCC_OSCILLATORTYPE_HSI \| RCC_OSCILLATORTYPE_MSI \| \
mbed_official	610:813dcc80987e	1269	RCC_OSCILLATORTYPE_LSE \| RCC_OSCILLATORTYPE_LSI;
mbed_official	610:813dcc80987e	1270
mbed_official	610:813dcc80987e	1271	/* Get the HSE configuration -----------------------------------------------*/
mbed_official	610:813dcc80987e	1272	if((RCC->CR & RCC_CR_HSEBYP) == RCC_CR_HSEBYP)
mbed_official	610:813dcc80987e	1273	{
mbed_official	610:813dcc80987e	1274	RCC_OscInitStruct->HSEState = RCC_HSE_BYPASS;
mbed_official	610:813dcc80987e	1275	}
mbed_official	610:813dcc80987e	1276	else if((RCC->CR & RCC_CR_HSEON) == RCC_CR_HSEON)
mbed_official	610:813dcc80987e	1277	{
mbed_official	610:813dcc80987e	1278	RCC_OscInitStruct->HSEState = RCC_HSE_ON;
mbed_official	610:813dcc80987e	1279	}
mbed_official	610:813dcc80987e	1280	else
mbed_official	610:813dcc80987e	1281	{
mbed_official	610:813dcc80987e	1282	RCC_OscInitStruct->HSEState = RCC_HSE_OFF;
mbed_official	610:813dcc80987e	1283	}
mbed_official	610:813dcc80987e	1284
mbed_official	610:813dcc80987e	1285	/* Get the MSI configuration -----------------------------------------------*/
mbed_official	610:813dcc80987e	1286	if((RCC->CR & RCC_CR_MSION) == RCC_CR_MSION)
mbed_official	610:813dcc80987e	1287	{
mbed_official	610:813dcc80987e	1288	RCC_OscInitStruct->MSIState = RCC_MSI_ON;
mbed_official	610:813dcc80987e	1289	}
mbed_official	610:813dcc80987e	1290	else
mbed_official	610:813dcc80987e	1291	{
mbed_official	610:813dcc80987e	1292	RCC_OscInitStruct->MSIState = RCC_MSI_OFF;
mbed_official	610:813dcc80987e	1293	}
mbed_official	610:813dcc80987e	1294
mbed_official	610:813dcc80987e	1295	RCC_OscInitStruct->MSICalibrationValue = (uint32_t)((RCC->CR & RCC_ICSCR_MSITRIM) >> POSITION_VAL(RCC_ICSCR_MSITRIM));
mbed_official	610:813dcc80987e	1296	RCC_OscInitStruct->MSIClockRange = (uint32_t)((RCC->CR & RCC_CR_MSIRANGE) );
mbed_official	610:813dcc80987e	1297
mbed_official	610:813dcc80987e	1298	/* Get the HSI configuration -----------------------------------------------*/
mbed_official	610:813dcc80987e	1299	if((RCC->CR & RCC_CR_HSION) == RCC_CR_HSION)
mbed_official	610:813dcc80987e	1300	{
mbed_official	610:813dcc80987e	1301	RCC_OscInitStruct->HSIState = RCC_HSI_ON;
mbed_official	610:813dcc80987e	1302	}
mbed_official	610:813dcc80987e	1303	else
mbed_official	610:813dcc80987e	1304	{
mbed_official	610:813dcc80987e	1305	RCC_OscInitStruct->HSIState = RCC_HSI_OFF;
mbed_official	610:813dcc80987e	1306	}
mbed_official	610:813dcc80987e	1307
mbed_official	610:813dcc80987e	1308	RCC_OscInitStruct->HSICalibrationValue = (uint32_t)((RCC->ICSCR & RCC_ICSCR_HSITRIM) >> POSITION_VAL(RCC_ICSCR_HSITRIM));
mbed_official	610:813dcc80987e	1309
mbed_official	610:813dcc80987e	1310	/* Get the LSE configuration -----------------------------------------------*/
mbed_official	610:813dcc80987e	1311	if((RCC->BDCR & RCC_BDCR_LSEBYP) == RCC_BDCR_LSEBYP)
mbed_official	610:813dcc80987e	1312	{
mbed_official	610:813dcc80987e	1313	RCC_OscInitStruct->LSEState = RCC_LSE_BYPASS;
mbed_official	610:813dcc80987e	1314	}
mbed_official	610:813dcc80987e	1315	else if((RCC->BDCR & RCC_BDCR_LSEON) == RCC_BDCR_LSEON)
mbed_official	610:813dcc80987e	1316	{
mbed_official	610:813dcc80987e	1317	RCC_OscInitStruct->LSEState = RCC_LSE_ON;
mbed_official	610:813dcc80987e	1318	}
mbed_official	610:813dcc80987e	1319	else
mbed_official	610:813dcc80987e	1320	{
mbed_official	610:813dcc80987e	1321	RCC_OscInitStruct->LSEState = RCC_LSE_OFF;
mbed_official	610:813dcc80987e	1322	}
mbed_official	610:813dcc80987e	1323
mbed_official	610:813dcc80987e	1324	/* Get the LSI configuration -----------------------------------------------*/
mbed_official	610:813dcc80987e	1325	if((RCC->CSR & RCC_CSR_LSION) == RCC_CSR_LSION)
mbed_official	610:813dcc80987e	1326	{
mbed_official	610:813dcc80987e	1327	RCC_OscInitStruct->LSIState = RCC_LSI_ON;
mbed_official	610:813dcc80987e	1328	}
mbed_official	610:813dcc80987e	1329	else
mbed_official	610:813dcc80987e	1330	{
mbed_official	610:813dcc80987e	1331	RCC_OscInitStruct->LSIState = RCC_LSI_OFF;
mbed_official	610:813dcc80987e	1332	}
mbed_official	610:813dcc80987e	1333
mbed_official	610:813dcc80987e	1334	/* Get the PLL configuration -----------------------------------------------*/
mbed_official	610:813dcc80987e	1335	if((RCC->CR & RCC_CR_PLLON) == RCC_CR_PLLON)
mbed_official	610:813dcc80987e	1336	{
mbed_official	610:813dcc80987e	1337	RCC_OscInitStruct->PLL.PLLState = RCC_PLL_ON;
mbed_official	610:813dcc80987e	1338	}
mbed_official	610:813dcc80987e	1339	else
mbed_official	610:813dcc80987e	1340	{
mbed_official	610:813dcc80987e	1341	RCC_OscInitStruct->PLL.PLLState = RCC_PLL_OFF;
mbed_official	610:813dcc80987e	1342	}
mbed_official	610:813dcc80987e	1343	RCC_OscInitStruct->PLL.PLLSource = (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
mbed_official	610:813dcc80987e	1344	RCC_OscInitStruct->PLL.PLLM = (uint32_t)(((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> POSITION_VAL(RCC_PLLCFGR_PLLM)) + 1);
mbed_official	610:813dcc80987e	1345	RCC_OscInitStruct->PLL.PLLN = (uint32_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> POSITION_VAL(RCC_PLLCFGR_PLLN));
mbed_official	610:813dcc80987e	1346	RCC_OscInitStruct->PLL.PLLQ = (uint32_t)((((RCC->PLLCFGR & RCC_PLLCFGR_PLLQ) >> POSITION_VAL(RCC_PLLCFGR_PLLQ)) + 1) << 1U);
mbed_official	610:813dcc80987e	1347	RCC_OscInitStruct->PLL.PLLR = (uint32_t)((((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> POSITION_VAL(RCC_PLLCFGR_PLLR)) + 1) << 1U);
mbed_official	610:813dcc80987e	1348	if((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) != RESET)
mbed_official	610:813dcc80987e	1349	{
mbed_official	610:813dcc80987e	1350	RCC_OscInitStruct->PLL.PLLP = RCC_PLLP_DIV17;
mbed_official	610:813dcc80987e	1351	}
mbed_official	610:813dcc80987e	1352	else
mbed_official	610:813dcc80987e	1353	{
mbed_official	610:813dcc80987e	1354	RCC_OscInitStruct->PLL.PLLP = RCC_PLLP_DIV7;
mbed_official	610:813dcc80987e	1355	}
mbed_official	610:813dcc80987e	1356	}
mbed_official	610:813dcc80987e	1357
mbed_official	610:813dcc80987e	1358	/**
mbed_official	610:813dcc80987e	1359	* @brief Configure the RCC_ClkInitStruct according to the internal
mbed_official	610:813dcc80987e	1360	* RCC configuration registers.
mbed_official	610:813dcc80987e	1361	* @param RCC_ClkInitStruct: pointer to an RCC_ClkInitTypeDef structure that
mbed_official	610:813dcc80987e	1362	* will be configured.
mbed_official	610:813dcc80987e	1363	* @param pFLatency: Pointer on the Flash Latency.
mbed_official	610:813dcc80987e	1364	* @retval None
mbed_official	610:813dcc80987e	1365	*/
mbed_official	610:813dcc80987e	1366	void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef RCC_ClkInitStruct, uint32_t pFLatency)
mbed_official	610:813dcc80987e	1367	{
mbed_official	610:813dcc80987e	1368	/* Check the parameters */
mbed_official	610:813dcc80987e	1369	assert_param(RCC_ClkInitStruct != NULL);
mbed_official	610:813dcc80987e	1370	assert_param(pFLatency != NULL);
mbed_official	610:813dcc80987e	1371
mbed_official	610:813dcc80987e	1372	/* Set all possible values for the Clock type parameter --------------------*/
mbed_official	610:813dcc80987e	1373	RCC_ClkInitStruct->ClockType = RCC_CLOCKTYPE_SYSCLK \| RCC_CLOCKTYPE_HCLK \| RCC_CLOCKTYPE_PCLK1 \| RCC_CLOCKTYPE_PCLK2;
mbed_official	610:813dcc80987e	1374
mbed_official	610:813dcc80987e	1375	/* Get the SYSCLK configuration --------------------------------------------*/
mbed_official	610:813dcc80987e	1376	RCC_ClkInitStruct->SYSCLKSource = (uint32_t)(RCC->CFGR & RCC_CFGR_SW);
mbed_official	610:813dcc80987e	1377
mbed_official	610:813dcc80987e	1378	/* Get the HCLK configuration ----------------------------------------------*/
mbed_official	610:813dcc80987e	1379	RCC_ClkInitStruct->AHBCLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_HPRE);
mbed_official	610:813dcc80987e	1380
mbed_official	610:813dcc80987e	1381	/* Get the APB1 configuration ----------------------------------------------*/
mbed_official	610:813dcc80987e	1382	RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE1);
mbed_official	610:813dcc80987e	1383
mbed_official	610:813dcc80987e	1384	/* Get the APB2 configuration ----------------------------------------------*/
mbed_official	610:813dcc80987e	1385	RCC_ClkInitStruct->APB2CLKDivider = (uint32_t)((RCC->CFGR & RCC_CFGR_PPRE2) >> 3);
mbed_official	610:813dcc80987e	1386
mbed_official	610:813dcc80987e	1387	/* Get the Flash Wait State (Latency) configuration ------------------------*/
mbed_official	610:813dcc80987e	1388	*pFLatency = (uint32_t)(FLASH->ACR & FLASH_ACR_LATENCY);
mbed_official	610:813dcc80987e	1389	}
mbed_official	610:813dcc80987e	1390
mbed_official	610:813dcc80987e	1391	/**
mbed_official	610:813dcc80987e	1392	* @brief Enable the Clock Security System.
mbed_official	610:813dcc80987e	1393	* @note If a failure is detected on the HSE oscillator clock, this oscillator
mbed_official	610:813dcc80987e	1394	* is automatically disabled and an interrupt is generated to inform the
mbed_official	610:813dcc80987e	1395	* software about the failure (Clock Security System Interrupt, CSSI),
mbed_official	610:813dcc80987e	1396	* allowing the MCU to perform rescue operations. The CSSI is linked to
mbed_official	610:813dcc80987e	1397	* the Cortex-M4 NMI (Non-Maskable Interrupt) exception vector.
mbed_official	610:813dcc80987e	1398	* @note The Clock Security System can only be cleared by reset.
mbed_official	610:813dcc80987e	1399	* @retval None
mbed_official	610:813dcc80987e	1400	*/
mbed_official	610:813dcc80987e	1401	void HAL_RCC_EnableCSS(void)
mbed_official	610:813dcc80987e	1402	{
mbed_official	610:813dcc80987e	1403	SET_BIT(RCC->CR, RCC_CR_CSSON) ;
mbed_official	610:813dcc80987e	1404	}
mbed_official	610:813dcc80987e	1405
mbed_official	610:813dcc80987e	1406	/**
mbed_official	610:813dcc80987e	1407	* @brief Handle the RCC Clock Security System interrupt request.
mbed_official	610:813dcc80987e	1408	* @note This API should be called under the NMI_Handler().
mbed_official	610:813dcc80987e	1409	* @retval None
mbed_official	610:813dcc80987e	1410	*/
mbed_official	610:813dcc80987e	1411	void HAL_RCC_NMI_IRQHandler(void)
mbed_official	610:813dcc80987e	1412	{
mbed_official	610:813dcc80987e	1413	/* Check RCC CSSF flag */
mbed_official	610:813dcc80987e	1414	if(__HAL_RCC_GET_IT_SOURCE(RCC_IT_CSS))
mbed_official	610:813dcc80987e	1415	{
mbed_official	610:813dcc80987e	1416	/* RCC Clock Security System interrupt user callback */
mbed_official	610:813dcc80987e	1417	HAL_RCC_CSSCallback();
mbed_official	610:813dcc80987e	1418
mbed_official	610:813dcc80987e	1419	/* Clear RCC CSS pending bit */
mbed_official	610:813dcc80987e	1420	__HAL_RCC_CLEAR_IT(RCC_IT_CSS);
mbed_official	610:813dcc80987e	1421	}
mbed_official	610:813dcc80987e	1422	}
mbed_official	610:813dcc80987e	1423
mbed_official	610:813dcc80987e	1424	/**
mbed_official	610:813dcc80987e	1425	* @brief RCC Clock Security System interrupt callback.
mbed_official	610:813dcc80987e	1426	* @retval none
mbed_official	610:813dcc80987e	1427	*/
mbed_official	610:813dcc80987e	1428	__weak void HAL_RCC_CSSCallback(void)
mbed_official	610:813dcc80987e	1429	{
mbed_official	610:813dcc80987e	1430	/* NOTE : This function should not be modified, when the callback is needed,
mbed_official	610:813dcc80987e	1431	the HAL_RCC_CSSCallback should be implemented in the user file
mbed_official	610:813dcc80987e	1432	*/
mbed_official	610:813dcc80987e	1433	}
mbed_official	610:813dcc80987e	1434
mbed_official	610:813dcc80987e	1435	/**
mbed_official	610:813dcc80987e	1436	* @}
mbed_official	610:813dcc80987e	1437	*/
mbed_official	610:813dcc80987e	1438
mbed_official	610:813dcc80987e	1439	/**
mbed_official	610:813dcc80987e	1440	* @}
mbed_official	610:813dcc80987e	1441	*/
mbed_official	610:813dcc80987e	1442
mbed_official	610:813dcc80987e	1443	/* Private function prototypes -----------------------------------------------*/
mbed_official	610:813dcc80987e	1444	/** @addtogroup RCC_Private_Functions
mbed_official	610:813dcc80987e	1445	* @{
mbed_official	610:813dcc80987e	1446	*/
mbed_official	610:813dcc80987e	1447	/**
mbed_official	610:813dcc80987e	1448	* @brief Update number of Flash wait states in line with MSI range and current
mbed_official	610:813dcc80987e	1449	voltage range.
mbed_official	610:813dcc80987e	1450	* @param msirange : MSI range value from RCC_MSIRANGE_0 to RCC_MSIRANGE_11
mbed_official	610:813dcc80987e	1451	* @retval HAL status
mbed_official	610:813dcc80987e	1452	*/
mbed_official	610:813dcc80987e	1453	static HAL_StatusTypeDef RCC_SetFlashLatencyFromMSIRange(uint32_t msirange)
mbed_official	610:813dcc80987e	1454	{
mbed_official	610:813dcc80987e	1455	uint32_t vos = 0;
mbed_official	610:813dcc80987e	1456	uint32_t latency = FLASH_LATENCY_0; /* default value 0WS */
mbed_official	610:813dcc80987e	1457
mbed_official	610:813dcc80987e	1458	if(__HAL_RCC_PWR_IS_CLK_ENABLED())
mbed_official	610:813dcc80987e	1459	{
mbed_official	610:813dcc80987e	1460	vos = HAL_PWREx_GetVoltageRange();
mbed_official	610:813dcc80987e	1461	}
mbed_official	610:813dcc80987e	1462	else
mbed_official	610:813dcc80987e	1463	{
mbed_official	610:813dcc80987e	1464	__HAL_RCC_PWR_CLK_ENABLE();
mbed_official	610:813dcc80987e	1465	vos = HAL_PWREx_GetVoltageRange();
mbed_official	610:813dcc80987e	1466	__HAL_RCC_PWR_CLK_DISABLE();
mbed_official	610:813dcc80987e	1467	}
mbed_official	610:813dcc80987e	1468
mbed_official	610:813dcc80987e	1469	if(vos == PWR_REGULATOR_VOLTAGE_SCALE1)
mbed_official	610:813dcc80987e	1470	{
mbed_official	610:813dcc80987e	1471	if(msirange > RCC_MSIRANGE_8)
mbed_official	610:813dcc80987e	1472	{
mbed_official	610:813dcc80987e	1473	/* MSI > 16Mhz */
mbed_official	610:813dcc80987e	1474	if(msirange > RCC_MSIRANGE_10)
mbed_official	610:813dcc80987e	1475	{
mbed_official	610:813dcc80987e	1476	/* MSI 48Mhz */
mbed_official	610:813dcc80987e	1477	latency = FLASH_LATENCY_2; /* 2WS */
mbed_official	610:813dcc80987e	1478	}
mbed_official	610:813dcc80987e	1479	else
mbed_official	610:813dcc80987e	1480	{
mbed_official	610:813dcc80987e	1481	/* MSI 24Mhz or 32Mhz */
mbed_official	610:813dcc80987e	1482	latency = FLASH_LATENCY_1; /* 1WS */
mbed_official	610:813dcc80987e	1483	}
mbed_official	610:813dcc80987e	1484	}
mbed_official	610:813dcc80987e	1485	/* else MSI <= 16Mhz default FLASH_LATENCY_0 0WS */
mbed_official	610:813dcc80987e	1486	}
mbed_official	610:813dcc80987e	1487	else
mbed_official	610:813dcc80987e	1488	{
mbed_official	610:813dcc80987e	1489	if(msirange > RCC_MSIRANGE_8)
mbed_official	610:813dcc80987e	1490	{
mbed_official	610:813dcc80987e	1491	/* MSI > 16Mhz */
mbed_official	610:813dcc80987e	1492	latency = FLASH_LATENCY_3; /* 3WS */
mbed_official	610:813dcc80987e	1493	}
mbed_official	610:813dcc80987e	1494	else
mbed_official	610:813dcc80987e	1495	{
mbed_official	610:813dcc80987e	1496	if(msirange == RCC_MSIRANGE_8)
mbed_official	610:813dcc80987e	1497	{
mbed_official	610:813dcc80987e	1498	/* MSI 16Mhz */
mbed_official	610:813dcc80987e	1499	latency = FLASH_LATENCY_2; /* 2WS */
mbed_official	610:813dcc80987e	1500	}
mbed_official	610:813dcc80987e	1501	else if(msirange == RCC_MSIRANGE_7)
mbed_official	610:813dcc80987e	1502	{
mbed_official	610:813dcc80987e	1503	/* MSI 8Mhz */
mbed_official	610:813dcc80987e	1504	latency = FLASH_LATENCY_1; /* 1WS */
mbed_official	610:813dcc80987e	1505	}
mbed_official	610:813dcc80987e	1506	/* else MSI < 8Mhz default FLASH_LATENCY_0 0WS */
mbed_official	610:813dcc80987e	1507	}
mbed_official	610:813dcc80987e	1508	}
mbed_official	610:813dcc80987e	1509
mbed_official	610:813dcc80987e	1510	__HAL_FLASH_SET_LATENCY(latency);
mbed_official	610:813dcc80987e	1511
mbed_official	610:813dcc80987e	1512	/* Check that the new number of wait states is taken into account to access the Flash
mbed_official	610:813dcc80987e	1513	memory by reading the FLASH_ACR register */
mbed_official	610:813dcc80987e	1514	if((FLASH->ACR & FLASH_ACR_LATENCY) != latency)
mbed_official	610:813dcc80987e	1515	{
mbed_official	610:813dcc80987e	1516	return HAL_ERROR;
mbed_official	610:813dcc80987e	1517	}
mbed_official	610:813dcc80987e	1518
mbed_official	610:813dcc80987e	1519	return HAL_OK;
mbed_official	610:813dcc80987e	1520	}
mbed_official	610:813dcc80987e	1521
mbed_official	610:813dcc80987e	1522	/**
mbed_official	610:813dcc80987e	1523	* @}
mbed_official	610:813dcc80987e	1524	*/
mbed_official	610:813dcc80987e	1525
mbed_official	610:813dcc80987e	1526	#endif /* HAL_RCC_MODULE_ENABLED */
mbed_official	610:813dcc80987e	1527	/**
mbed_official	610:813dcc80987e	1528	* @}
mbed_official	610:813dcc80987e	1529	*/
mbed_official	610:813dcc80987e	1530
mbed_official	610:813dcc80987e	1531	/**
mbed_official	610:813dcc80987e	1532	* @}
mbed_official	610:813dcc80987e	1533	*/
mbed_official	610:813dcc80987e	1534
mbed_official	610:813dcc80987e	1535	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Type:	Library
Created:	26 Nov 2015
Imports:	17
Forks:	0
Commits:	638
Dependents:	1
Dependencies:	0
Followers:	1

targets/cmsis/TARGET_STM/TARGET_STM32L4/stm32l4xx_hal_rcc.c@610:813dcc80987e, 2015-08-14 (annotated)

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