Dependencies:   mbed

Committer:
iva2k
Date:
Thu Jan 21 01:15:42 2010 +0000
Revision:
0:1802fb31b938

        

Who changed what in which revision?

UserRevisionLine numberNew contents of line
iva2k 0:1802fb31b938 1 /*
iva2k 0:1802fb31b938 2 **************************************************************************************************************
iva2k 0:1802fb31b938 3 * NXP USB Host Stack
iva2k 0:1802fb31b938 4 *
iva2k 0:1802fb31b938 5 * (c) Copyright 2008, NXP SemiConductors
iva2k 0:1802fb31b938 6 * (c) Copyright 2008, OnChip Technologies LLC
iva2k 0:1802fb31b938 7 * All Rights Reserved
iva2k 0:1802fb31b938 8 *
iva2k 0:1802fb31b938 9 * www.nxp.com
iva2k 0:1802fb31b938 10 * www.onchiptech.com
iva2k 0:1802fb31b938 11 *
iva2k 0:1802fb31b938 12 * File : usbhost_lpc17xx.c
iva2k 0:1802fb31b938 13 * Programmer(s) : Ravikanth.P
iva2k 0:1802fb31b938 14 * Version :
iva2k 0:1802fb31b938 15 *
iva2k 0:1802fb31b938 16 **************************************************************************************************************
iva2k 0:1802fb31b938 17 */
iva2k 0:1802fb31b938 18
iva2k 0:1802fb31b938 19 /*
iva2k 0:1802fb31b938 20 **************************************************************************************************************
iva2k 0:1802fb31b938 21 * INCLUDE HEADER FILES
iva2k 0:1802fb31b938 22 **************************************************************************************************************
iva2k 0:1802fb31b938 23 */
iva2k 0:1802fb31b938 24
iva2k 0:1802fb31b938 25 #include "usbhost_lpc17xx.h"
iva2k 0:1802fb31b938 26
iva2k 0:1802fb31b938 27 /*
iva2k 0:1802fb31b938 28 **************************************************************************************************************
iva2k 0:1802fb31b938 29 * GLOBAL VARIABLES
iva2k 0:1802fb31b938 30 **************************************************************************************************************
iva2k 0:1802fb31b938 31 */
iva2k 0:1802fb31b938 32 int gUSBConnected;
iva2k 0:1802fb31b938 33
iva2k 0:1802fb31b938 34 volatile USB_INT32U HOST_RhscIntr = 0; /* Root Hub Status Change interrupt */
iva2k 0:1802fb31b938 35 volatile USB_INT32U HOST_WdhIntr = 0; /* Semaphore to wait until the TD is submitted */
iva2k 0:1802fb31b938 36 volatile USB_INT08U HOST_TDControlStatus = 0;
iva2k 0:1802fb31b938 37 volatile HCED *EDCtrl; /* Control endpoint descriptor structure */
iva2k 0:1802fb31b938 38 volatile HCED *EDBulkIn; /* BulkIn endpoint descriptor structure */
iva2k 0:1802fb31b938 39 volatile HCED *EDBulkOut; /* BulkOut endpoint descriptor structure */
iva2k 0:1802fb31b938 40 volatile HCTD *TDHead; /* Head transfer descriptor structure */
iva2k 0:1802fb31b938 41 volatile HCTD *TDTail; /* Tail transfer descriptor structure */
iva2k 0:1802fb31b938 42 volatile HCCA *Hcca; /* Host Controller Communications Area structure */
iva2k 0:1802fb31b938 43 USB_INT16U *TDBufNonVol; /* Identical to TDBuffer just to reduce compiler warnings */
iva2k 0:1802fb31b938 44 volatile USB_INT08U *TDBuffer; /* Current Buffer Pointer of transfer descriptor */
iva2k 0:1802fb31b938 45 volatile USB_INT08U *FATBuffer; /* Buffer used by FAT file system */
iva2k 0:1802fb31b938 46 volatile USB_INT08U *UserBuffer; /* Buffer used by application */
iva2k 0:1802fb31b938 47
iva2k 0:1802fb31b938 48 /*
iva2k 0:1802fb31b938 49 **************************************************************************************************************
iva2k 0:1802fb31b938 50 * DELAY IN MILLI SECONDS
iva2k 0:1802fb31b938 51 *
iva2k 0:1802fb31b938 52 * Description: This function provides a delay in milli seconds
iva2k 0:1802fb31b938 53 *
iva2k 0:1802fb31b938 54 * Arguments : delay The delay required
iva2k 0:1802fb31b938 55 *
iva2k 0:1802fb31b938 56 * Returns : None
iva2k 0:1802fb31b938 57 *
iva2k 0:1802fb31b938 58 **************************************************************************************************************
iva2k 0:1802fb31b938 59 */
iva2k 0:1802fb31b938 60
iva2k 0:1802fb31b938 61 void Host_DelayMS (USB_INT32U delay)
iva2k 0:1802fb31b938 62 {
iva2k 0:1802fb31b938 63 volatile USB_INT32U i;
iva2k 0:1802fb31b938 64
iva2k 0:1802fb31b938 65
iva2k 0:1802fb31b938 66 for (i = 0; i < delay; i++) {
iva2k 0:1802fb31b938 67 Host_DelayUS(1000);
iva2k 0:1802fb31b938 68 }
iva2k 0:1802fb31b938 69 }
iva2k 0:1802fb31b938 70
iva2k 0:1802fb31b938 71 /*
iva2k 0:1802fb31b938 72 **************************************************************************************************************
iva2k 0:1802fb31b938 73 * DELAY IN MICRO SECONDS
iva2k 0:1802fb31b938 74 *
iva2k 0:1802fb31b938 75 * Description: This function provides a delay in micro seconds
iva2k 0:1802fb31b938 76 *
iva2k 0:1802fb31b938 77 * Arguments : delay The delay required
iva2k 0:1802fb31b938 78 *
iva2k 0:1802fb31b938 79 * Returns : None
iva2k 0:1802fb31b938 80 *
iva2k 0:1802fb31b938 81 **************************************************************************************************************
iva2k 0:1802fb31b938 82 */
iva2k 0:1802fb31b938 83
iva2k 0:1802fb31b938 84 void Host_DelayUS (USB_INT32U delay)
iva2k 0:1802fb31b938 85 {
iva2k 0:1802fb31b938 86 volatile USB_INT32U i;
iva2k 0:1802fb31b938 87
iva2k 0:1802fb31b938 88
iva2k 0:1802fb31b938 89 for (i = 0; i < (4 * delay); i++) { /* This logic was tested. It gives app. 1 micro sec delay */
iva2k 0:1802fb31b938 90 ;
iva2k 0:1802fb31b938 91 }
iva2k 0:1802fb31b938 92 }
iva2k 0:1802fb31b938 93
iva2k 0:1802fb31b938 94 /*
iva2k 0:1802fb31b938 95 **************************************************************************************************************
iva2k 0:1802fb31b938 96 * INITIALIZE THE HOST CONTROLLER
iva2k 0:1802fb31b938 97 *
iva2k 0:1802fb31b938 98 * Description: This function initializes lpc17xx host controller
iva2k 0:1802fb31b938 99 *
iva2k 0:1802fb31b938 100 * Arguments : None
iva2k 0:1802fb31b938 101 *
iva2k 0:1802fb31b938 102 * Returns :
iva2k 0:1802fb31b938 103 *
iva2k 0:1802fb31b938 104 **************************************************************************************************************
iva2k 0:1802fb31b938 105 */
iva2k 0:1802fb31b938 106 void Host_Init (void)
iva2k 0:1802fb31b938 107 {
iva2k 0:1802fb31b938 108 USB_INT32U HostBaseAddr;
iva2k 0:1802fb31b938 109
iva2k 0:1802fb31b938 110 PRINT_Log("In Host_Init, LPC_USB=0x%08X\r\n", LPC_USB);
iva2k 0:1802fb31b938 111 //NVIC_DisableIRQ(USB_IRQn); /* Disable the USB interrupt source */
iva2k 0:1802fb31b938 112
iva2k 0:1802fb31b938 113 LPC_SC->PCONP |= (1UL<<31); // set PCUSB bit
iva2k 0:1802fb31b938 114 #if 1
iva2k 0:1802fb31b938 115 PRINT_Log("1: OTGClkCtrl == %08X, OTGClkSt == %08X\r\n", LPC_USB->OTGClkCtrl, LPC_USB->OTGClkSt);
iva2k 0:1802fb31b938 116 LPC_USB->OTGClkCtrl = 0x0000001F;
iva2k 0:1802fb31b938 117 PRINT_Log("2: OTGClkCtrl == %08X, OTGClkSt == %08X\r\n", LPC_USB->OTGClkCtrl, LPC_USB->OTGClkSt);
iva2k 0:1802fb31b938 118 while ((LPC_USB->OTGClkSt & 0x0000001F) == 0) { /* Host clock is available */
iva2k 0:1802fb31b938 119 ;
iva2k 0:1802fb31b938 120 }
iva2k 0:1802fb31b938 121 #else
iva2k 0:1802fb31b938 122 PRINT_Log("1: USBClkCtrl == %08X, USBClkSt == %08X\r\n", LPC_USB->USBClkCtrl, LPC_USB->USBClkSt);
iva2k 0:1802fb31b938 123 LPC_USB->USBClkCtrl |= 0x01; /* Enable USB host clock */
iva2k 0:1802fb31b938 124 PRINT_Log("2: USBClkCtrl == %08X, USBClkSt == %08X\r\n", LPC_USB->USBClkCtrl, LPC_USB->USBClkSt);
iva2k 0:1802fb31b938 125 // while ((LPC_USB->USBClkSt & 0x00000001) == 0) { /* Host clock is available */
iva2k 0:1802fb31b938 126 // ;
iva2k 0:1802fb31b938 127 // }
iva2k 0:1802fb31b938 128 wait(0.5);
iva2k 0:1802fb31b938 129 #endif
iva2k 0:1802fb31b938 130
iva2k 0:1802fb31b938 131 PRINT_Log("3: OTGStCtrl=%08X\r\n", LPC_USB->OTGStCtrl);
iva2k 0:1802fb31b938 132 #if 1
iva2k 0:1802fb31b938 133 LPC_USB->OTGStCtrl = 1; // ? 0x3;
iva2k 0:1802fb31b938 134 PRINT_Log("4\r\n");
iva2k 0:1802fb31b938 135 #endif
iva2k 0:1802fb31b938 136
iva2k 0:1802fb31b938 137 /* P1[18] = USB_UP_LED, 01 */
iva2k 0:1802fb31b938 138 /* P1[19] = /USB_PPWR, 10 */
iva2k 0:1802fb31b938 139 /* P1[22] = USB_PWRD, 10 */
iva2k 0:1802fb31b938 140 /* P1[27] = /USB_OVRCR, 10 */
iva2k 0:1802fb31b938 141 #if 0
iva2k 0:1802fb31b938 142 LPC_PINCON->PINSEL3 &= ~((3<<4) | (3<<6) | (3<<12) | (3<<22));
iva2k 0:1802fb31b938 143 LPC_PINCON->PINSEL3 |= ((1<<4)|(2<<6) | (2<<12) | (2<<22)); // 0x00802080
iva2k 0:1802fb31b938 144 PRINT_Log("5\r\n");
iva2k 0:1802fb31b938 145 #endif
iva2k 0:1802fb31b938 146
iva2k 0:1802fb31b938 147 /* P0[29] = USB_D+, 01 */
iva2k 0:1802fb31b938 148 /* P0[30] = USB_D-, 01 */
iva2k 0:1802fb31b938 149 LPC_PINCON->PINSEL1 &= ~((3<<26) | (3<<28));
iva2k 0:1802fb31b938 150 LPC_PINCON->PINSEL1 |= ((1<<26)|(1<<28)); // 0x14000000
iva2k 0:1802fb31b938 151
iva2k 0:1802fb31b938 152 PRINT_Log("Initializing Host Stack\r\n");
iva2k 0:1802fb31b938 153
iva2k 0:1802fb31b938 154 // For chip revision V01 and later
iva2k 0:1802fb31b938 155 // HostBaseAddr = 0x20080000;
iva2k 0:1802fb31b938 156 #ifdef TARGET_LPC1768
iva2k 0:1802fb31b938 157 // mbed's "USB RAM"
iva2k 0:1802fb31b938 158 HostBaseAddr = 0x2007C000;
iva2k 0:1802fb31b938 159 #else
iva2k 0:1802fb31b938 160 // USB RAM
iva2k 0:1802fb31b938 161 HostBaseAddr = 0x7FD00000;
iva2k 0:1802fb31b938 162 #endif
iva2k 0:1802fb31b938 163
iva2k 0:1802fb31b938 164 Hcca = (volatile HCCA *)(HostBaseAddr+0x000);
iva2k 0:1802fb31b938 165 TDHead = (volatile HCTD *)(HostBaseAddr+0x100);
iva2k 0:1802fb31b938 166 TDTail = (volatile HCTD *)(HostBaseAddr+0x110);
iva2k 0:1802fb31b938 167 EDCtrl = (volatile HCED *)(HostBaseAddr+0x120);
iva2k 0:1802fb31b938 168 EDBulkIn = (volatile HCED *)(HostBaseAddr+0x130);
iva2k 0:1802fb31b938 169 EDBulkOut = (volatile HCED *)(HostBaseAddr+0x140);
iva2k 0:1802fb31b938 170 TDBuffer = (volatile USB_INT08U *)(HostBaseAddr+0x150);
iva2k 0:1802fb31b938 171 FATBuffer = (volatile USB_INT08U *)(HostBaseAddr+0x1D0);
iva2k 0:1802fb31b938 172 UserBuffer = (volatile USB_INT08U *)(HostBaseAddr+0x1000);
iva2k 0:1802fb31b938 173
iva2k 0:1802fb31b938 174 /* Initialize all the TDs, EDs and HCCA to 0 */
iva2k 0:1802fb31b938 175 PRINT_Log("6\r\n");
iva2k 0:1802fb31b938 176 Host_EDInit(EDCtrl);
iva2k 0:1802fb31b938 177 PRINT_Log("7\r\n");
iva2k 0:1802fb31b938 178 Host_EDInit(EDBulkIn);
iva2k 0:1802fb31b938 179 PRINT_Log("8\r\n");
iva2k 0:1802fb31b938 180 Host_EDInit(EDBulkOut);
iva2k 0:1802fb31b938 181 PRINT_Log("9\r\n");
iva2k 0:1802fb31b938 182 Host_TDInit(TDHead);
iva2k 0:1802fb31b938 183 PRINT_Log("10\r\n");
iva2k 0:1802fb31b938 184 Host_TDInit(TDTail);
iva2k 0:1802fb31b938 185 PRINT_Log("11\r\n");
iva2k 0:1802fb31b938 186 Host_HCCAInit(Hcca);
iva2k 0:1802fb31b938 187 PRINT_Log("12\r\n");
iva2k 0:1802fb31b938 188
iva2k 0:1802fb31b938 189
iva2k 0:1802fb31b938 190 Host_DelayMS(50); /* Wait 50 ms before apply reset */
iva2k 0:1802fb31b938 191 LPC_USB->HcControl = 0; /* HARDWARE RESET */
iva2k 0:1802fb31b938 192 LPC_USB->HcControlHeadED = 0; /* Initialize Control list head to Zero */
iva2k 0:1802fb31b938 193 LPC_USB->HcBulkHeadED = 0; /* Initialize Bulk list head to Zero */
iva2k 0:1802fb31b938 194
iva2k 0:1802fb31b938 195 /* SOFTWARE RESET */
iva2k 0:1802fb31b938 196 LPC_USB->HcCommandStatus = OR_CMD_STATUS_HCR;
iva2k 0:1802fb31b938 197 LPC_USB->HcFmInterval = DEFAULT_FMINTERVAL; /* Write Fm Interval and Largest Data Packet Counter */
iva2k 0:1802fb31b938 198
iva2k 0:1802fb31b938 199 /* Put HC in operational state */
iva2k 0:1802fb31b938 200 LPC_USB->HcControl = (LPC_USB->HcControl & (~OR_CONTROL_HCFS)) | OR_CONTROL_HC_OPER;
iva2k 0:1802fb31b938 201 LPC_USB->HcRhStatus = OR_RH_STATUS_LPSC; /* Set Global Power */
iva2k 0:1802fb31b938 202
iva2k 0:1802fb31b938 203 LPC_USB->HcHCCA = (USB_INT32U)Hcca;
iva2k 0:1802fb31b938 204 LPC_USB->HcInterruptStatus |= LPC_USB->HcInterruptStatus; /* Clear Interrrupt Status */
iva2k 0:1802fb31b938 205
iva2k 0:1802fb31b938 206
iva2k 0:1802fb31b938 207 LPC_USB->HcInterruptEnable = OR_INTR_ENABLE_MIE |
iva2k 0:1802fb31b938 208 OR_INTR_ENABLE_WDH |
iva2k 0:1802fb31b938 209 OR_INTR_ENABLE_RHSC;
iva2k 0:1802fb31b938 210
iva2k 0:1802fb31b938 211 PRINT_Log("15\r\n");
iva2k 0:1802fb31b938 212
iva2k 0:1802fb31b938 213
iva2k 0:1802fb31b938 214 #ifdef TARGET_LPC2368
iva2k 0:1802fb31b938 215 NVIC->IntSelect &= ~(1 << USB_IRQn); /* Configure the ISR handler as IRQ */
iva2k 0:1802fb31b938 216 /* Set the vector address */
iva2k 0:1802fb31b938 217 NVIC_SetVector(USB_IRQn, (USB_INT32U)USB_IRQHandler);
iva2k 0:1802fb31b938 218 #endif
iva2k 0:1802fb31b938 219 NVIC_SetPriority(USB_IRQn, 0); /* highest priority */
iva2k 0:1802fb31b938 220 /* Enable the USB Interrupt */
iva2k 0:1802fb31b938 221 NVIC_EnableIRQ(USB_IRQn); /* enable USB interrupt */
iva2k 0:1802fb31b938 222 // NVIC_SetPriority (USB_IRQn, 0); /* highest priority */
iva2k 0:1802fb31b938 223 PRINT_Log("Host Initialized\r\n");
iva2k 0:1802fb31b938 224 }
iva2k 0:1802fb31b938 225
iva2k 0:1802fb31b938 226 /*
iva2k 0:1802fb31b938 227 **************************************************************************************************************
iva2k 0:1802fb31b938 228 * INTERRUPT SERVICE ROUTINE
iva2k 0:1802fb31b938 229 *
iva2k 0:1802fb31b938 230 * Description: This function services the interrupt caused by host controller
iva2k 0:1802fb31b938 231 *
iva2k 0:1802fb31b938 232 * Arguments : None
iva2k 0:1802fb31b938 233 *
iva2k 0:1802fb31b938 234 * Returns : None
iva2k 0:1802fb31b938 235 *
iva2k 0:1802fb31b938 236 **************************************************************************************************************
iva2k 0:1802fb31b938 237 */
iva2k 0:1802fb31b938 238
iva2k 0:1802fb31b938 239 void USB_IRQHandler (void) __irq
iva2k 0:1802fb31b938 240 {
iva2k 0:1802fb31b938 241 USB_INT32U int_status;
iva2k 0:1802fb31b938 242 USB_INT32U ie_status;
iva2k 0:1802fb31b938 243
iva2k 0:1802fb31b938 244 int_status = LPC_USB->HcInterruptStatus; /* Read Interrupt Status */
iva2k 0:1802fb31b938 245 ie_status = LPC_USB->HcInterruptEnable; /* Read Interrupt enable status */
iva2k 0:1802fb31b938 246
iva2k 0:1802fb31b938 247 //PRINT_Log("In USB_IRQHandler().\r\n");
iva2k 0:1802fb31b938 248 if (!(int_status & ie_status)) {
iva2k 0:1802fb31b938 249 return;
iva2k 0:1802fb31b938 250 } else {
iva2k 0:1802fb31b938 251
iva2k 0:1802fb31b938 252 int_status = int_status & ie_status;
iva2k 0:1802fb31b938 253 if (int_status & OR_INTR_STATUS_RHSC) { /* Root hub status change interrupt */
iva2k 0:1802fb31b938 254 if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_CSC) {
iva2k 0:1802fb31b938 255 if (LPC_USB->HcRhStatus & OR_RH_STATUS_DRWE) {
iva2k 0:1802fb31b938 256 /*
iva2k 0:1802fb31b938 257 * When DRWE is on, Connect Status Change
iva2k 0:1802fb31b938 258 * means a remote wakeup event.
iva2k 0:1802fb31b938 259 */
iva2k 0:1802fb31b938 260 HOST_RhscIntr = 1;// JUST SOMETHING FOR A BREAKPOINT
iva2k 0:1802fb31b938 261 }
iva2k 0:1802fb31b938 262 else {
iva2k 0:1802fb31b938 263 /*
iva2k 0:1802fb31b938 264 * When DRWE is off, Connect Status Change
iva2k 0:1802fb31b938 265 * is NOT a remote wakeup event
iva2k 0:1802fb31b938 266 */
iva2k 0:1802fb31b938 267 if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_CCS) {
iva2k 0:1802fb31b938 268 if (!gUSBConnected) {
iva2k 0:1802fb31b938 269 HOST_TDControlStatus = 0;
iva2k 0:1802fb31b938 270 HOST_WdhIntr = 0;
iva2k 0:1802fb31b938 271 HOST_RhscIntr = 1;
iva2k 0:1802fb31b938 272 gUSBConnected = 1;
iva2k 0:1802fb31b938 273 }
iva2k 0:1802fb31b938 274 else
iva2k 0:1802fb31b938 275 PRINT_Log("Spurious status change (connected)?\r\n");
iva2k 0:1802fb31b938 276 } else {
iva2k 0:1802fb31b938 277 if (gUSBConnected) {
iva2k 0:1802fb31b938 278 LPC_USB->HcInterruptEnable = 0; // why do we get multiple disc. rupts???
iva2k 0:1802fb31b938 279 HOST_RhscIntr = 0;
iva2k 0:1802fb31b938 280 gUSBConnected = 0;
iva2k 0:1802fb31b938 281 }
iva2k 0:1802fb31b938 282 else
iva2k 0:1802fb31b938 283 PRINT_Log("Spurious status change (disconnected)?\r\n");
iva2k 0:1802fb31b938 284 }
iva2k 0:1802fb31b938 285 }
iva2k 0:1802fb31b938 286 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_CSC;
iva2k 0:1802fb31b938 287 }
iva2k 0:1802fb31b938 288 if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_PRSC) {
iva2k 0:1802fb31b938 289 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRSC;
iva2k 0:1802fb31b938 290 }
iva2k 0:1802fb31b938 291 }
iva2k 0:1802fb31b938 292 if (int_status & OR_INTR_STATUS_WDH) { /* Writeback Done Head interrupt */
iva2k 0:1802fb31b938 293 HOST_WdhIntr = 1;
iva2k 0:1802fb31b938 294 HOST_TDControlStatus = (TDHead->Control >> 28) & 0xf;
iva2k 0:1802fb31b938 295 }
iva2k 0:1802fb31b938 296 LPC_USB->HcInterruptStatus = int_status; /* Clear interrupt status register */
iva2k 0:1802fb31b938 297 }
iva2k 0:1802fb31b938 298 #ifdef TARGET_LPC2368
iva2k 0:1802fb31b938 299 NVIC->Address = 0;
iva2k 0:1802fb31b938 300 #endif
iva2k 0:1802fb31b938 301 return;
iva2k 0:1802fb31b938 302 }
iva2k 0:1802fb31b938 303
iva2k 0:1802fb31b938 304 /*
iva2k 0:1802fb31b938 305 **************************************************************************************************************
iva2k 0:1802fb31b938 306 * PROCESS TRANSFER DESCRIPTOR
iva2k 0:1802fb31b938 307 *
iva2k 0:1802fb31b938 308 * Description: This function processes the transfer descriptor
iva2k 0:1802fb31b938 309 *
iva2k 0:1802fb31b938 310 * Arguments : ed Endpoint descriptor that contains this transfer descriptor
iva2k 0:1802fb31b938 311 * token SETUP, IN, OUT
iva2k 0:1802fb31b938 312 * buffer Current Buffer Pointer of the transfer descriptor
iva2k 0:1802fb31b938 313 * buffer_len Length of the buffer
iva2k 0:1802fb31b938 314 *
iva2k 0:1802fb31b938 315 * Returns : OK if TD submission is successful
iva2k 0:1802fb31b938 316 * ERROR if TD submission fails
iva2k 0:1802fb31b938 317 *
iva2k 0:1802fb31b938 318 **************************************************************************************************************
iva2k 0:1802fb31b938 319 */
iva2k 0:1802fb31b938 320
iva2k 0:1802fb31b938 321 USB_INT32S Host_ProcessTD (volatile HCED *ed,
iva2k 0:1802fb31b938 322 volatile USB_INT32U token,
iva2k 0:1802fb31b938 323 volatile USB_INT08U *buffer,
iva2k 0:1802fb31b938 324 USB_INT32U buffer_len)
iva2k 0:1802fb31b938 325 {
iva2k 0:1802fb31b938 326 volatile USB_INT32U td_toggle;
iva2k 0:1802fb31b938 327
iva2k 0:1802fb31b938 328
iva2k 0:1802fb31b938 329 if (ed == EDCtrl) {
iva2k 0:1802fb31b938 330 if (token == TD_SETUP) {
iva2k 0:1802fb31b938 331 td_toggle = TD_TOGGLE_0;
iva2k 0:1802fb31b938 332 } else {
iva2k 0:1802fb31b938 333 td_toggle = TD_TOGGLE_1;
iva2k 0:1802fb31b938 334 }
iva2k 0:1802fb31b938 335 } else {
iva2k 0:1802fb31b938 336 td_toggle = 0;
iva2k 0:1802fb31b938 337 }
iva2k 0:1802fb31b938 338 TDHead->Control = (TD_ROUNDING |
iva2k 0:1802fb31b938 339 token |
iva2k 0:1802fb31b938 340 TD_DELAY_INT(0) |
iva2k 0:1802fb31b938 341 td_toggle |
iva2k 0:1802fb31b938 342 TD_CC);
iva2k 0:1802fb31b938 343 TDTail->Control = 0;
iva2k 0:1802fb31b938 344 TDHead->CurrBufPtr = (USB_INT32U) buffer;
iva2k 0:1802fb31b938 345 TDTail->CurrBufPtr = 0;
iva2k 0:1802fb31b938 346 TDHead->Next = (USB_INT32U) TDTail;
iva2k 0:1802fb31b938 347 TDTail->Next = 0;
iva2k 0:1802fb31b938 348 TDHead->BufEnd = (USB_INT32U)(buffer + (buffer_len - 1));
iva2k 0:1802fb31b938 349 TDTail->BufEnd = 0;
iva2k 0:1802fb31b938 350
iva2k 0:1802fb31b938 351 ed->HeadTd = (USB_INT32U)TDHead | ((ed->HeadTd) & 0x00000002);
iva2k 0:1802fb31b938 352 ed->TailTd = (USB_INT32U)TDTail;
iva2k 0:1802fb31b938 353 ed->Next = 0;
iva2k 0:1802fb31b938 354
iva2k 0:1802fb31b938 355 if (ed == EDCtrl) {
iva2k 0:1802fb31b938 356 LPC_USB->HcControlHeadED = (USB_INT32U)ed;
iva2k 0:1802fb31b938 357 LPC_USB->HcCommandStatus = LPC_USB->HcCommandStatus | OR_CMD_STATUS_CLF;
iva2k 0:1802fb31b938 358 LPC_USB->HcControl = LPC_USB->HcControl | OR_CONTROL_CLE;
iva2k 0:1802fb31b938 359 } else {
iva2k 0:1802fb31b938 360 LPC_USB->HcBulkHeadED = (USB_INT32U)ed;
iva2k 0:1802fb31b938 361 LPC_USB->HcCommandStatus = LPC_USB->HcCommandStatus | OR_CMD_STATUS_BLF;
iva2k 0:1802fb31b938 362 LPC_USB->HcControl = LPC_USB->HcControl | OR_CONTROL_BLE;
iva2k 0:1802fb31b938 363 }
iva2k 0:1802fb31b938 364
iva2k 0:1802fb31b938 365 Host_WDHWait();
iva2k 0:1802fb31b938 366
iva2k 0:1802fb31b938 367 // if (!(TDHead->Control & 0xF0000000)) {
iva2k 0:1802fb31b938 368 if (!HOST_TDControlStatus) {
iva2k 0:1802fb31b938 369 return (OK);
iva2k 0:1802fb31b938 370 } else {
iva2k 0:1802fb31b938 371 return (ERR_TD_FAIL);
iva2k 0:1802fb31b938 372 }
iva2k 0:1802fb31b938 373 }
iva2k 0:1802fb31b938 374
iva2k 0:1802fb31b938 375 /*
iva2k 0:1802fb31b938 376 **************************************************************************************************************
iva2k 0:1802fb31b938 377 * ENUMERATE THE DEVICE
iva2k 0:1802fb31b938 378 *
iva2k 0:1802fb31b938 379 * Description: This function is used to enumerate the device connected
iva2k 0:1802fb31b938 380 *
iva2k 0:1802fb31b938 381 * Arguments : None
iva2k 0:1802fb31b938 382 *
iva2k 0:1802fb31b938 383 * Returns : None
iva2k 0:1802fb31b938 384 *
iva2k 0:1802fb31b938 385 **************************************************************************************************************
iva2k 0:1802fb31b938 386 */
iva2k 0:1802fb31b938 387
iva2k 0:1802fb31b938 388 USB_INT32S Host_EnumDev (void)
iva2k 0:1802fb31b938 389 {
iva2k 0:1802fb31b938 390 USB_INT32S rc;
iva2k 0:1802fb31b938 391
iva2k 0:1802fb31b938 392 PRINT_Log("Connect a Mass Storage device:\r\n");
iva2k 0:1802fb31b938 393 while (!HOST_RhscIntr);
iva2k 0:1802fb31b938 394 Host_DelayMS(100); /* USB 2.0 spec says atleast 50ms delay beore port reset */
iva2k 0:1802fb31b938 395 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRS; // Initiate port reset
iva2k 0:1802fb31b938 396 while (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_PRS)
iva2k 0:1802fb31b938 397 ; // Wait for port reset to complete...
iva2k 0:1802fb31b938 398 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRSC; // ...and clear port reset signal
iva2k 0:1802fb31b938 399 Host_DelayMS(200); /* Wait for 100 MS after port reset */
iva2k 0:1802fb31b938 400
iva2k 0:1802fb31b938 401 EDCtrl->Control = 8 << 16; /* Put max pkt size = 8 */
iva2k 0:1802fb31b938 402 /* Read first 8 bytes of device desc */
iva2k 0:1802fb31b938 403 rc = HOST_GET_DESCRIPTOR(USB_DESCRIPTOR_TYPE_DEVICE, 0, TDBuffer, 8);
iva2k 0:1802fb31b938 404 if (rc != OK) {
iva2k 0:1802fb31b938 405 PRINT_Err(rc);
iva2k 0:1802fb31b938 406 return (rc);
iva2k 0:1802fb31b938 407 }
iva2k 0:1802fb31b938 408 EDCtrl->Control = TDBuffer[7] << 16; /* Get max pkt size of endpoint 0 */
iva2k 0:1802fb31b938 409 rc = HOST_SET_ADDRESS(1); /* Set the device address to 1 */
iva2k 0:1802fb31b938 410 if (rc != OK) {
iva2k 0:1802fb31b938 411 PRINT_Err(rc);
iva2k 0:1802fb31b938 412 return (rc);
iva2k 0:1802fb31b938 413 }
iva2k 0:1802fb31b938 414 Host_DelayMS(2);
iva2k 0:1802fb31b938 415 EDCtrl->Control = (EDCtrl->Control) | 1; /* Modify control pipe with address 1 */
iva2k 0:1802fb31b938 416 /* Get the configuration descriptor */
iva2k 0:1802fb31b938 417 rc = HOST_GET_DESCRIPTOR(USB_DESCRIPTOR_TYPE_CONFIGURATION, 0, TDBuffer, 9);
iva2k 0:1802fb31b938 418 if (rc != OK) {
iva2k 0:1802fb31b938 419 PRINT_Err(rc);
iva2k 0:1802fb31b938 420 return (rc);
iva2k 0:1802fb31b938 421 }
iva2k 0:1802fb31b938 422 /* Get the first configuration data */
iva2k 0:1802fb31b938 423 rc = HOST_GET_DESCRIPTOR(USB_DESCRIPTOR_TYPE_CONFIGURATION, 0, TDBuffer, ReadLE16U(&TDBuffer[2]));
iva2k 0:1802fb31b938 424 if (rc != OK) {
iva2k 0:1802fb31b938 425 PRINT_Err(rc);
iva2k 0:1802fb31b938 426 return (rc);
iva2k 0:1802fb31b938 427 }
iva2k 0:1802fb31b938 428 rc = MS_ParseConfiguration(); /* Parse the configuration */
iva2k 0:1802fb31b938 429 if (rc != OK) {
iva2k 0:1802fb31b938 430 PRINT_Err(rc);
iva2k 0:1802fb31b938 431 return (rc);
iva2k 0:1802fb31b938 432 }
iva2k 0:1802fb31b938 433 rc = USBH_SET_CONFIGURATION(1); /* Select device configuration 1 */
iva2k 0:1802fb31b938 434 if (rc != OK) {
iva2k 0:1802fb31b938 435 PRINT_Err(rc);
iva2k 0:1802fb31b938 436 }
iva2k 0:1802fb31b938 437 Host_DelayMS(100); /* Some devices may require this delay */
iva2k 0:1802fb31b938 438 return (rc);
iva2k 0:1802fb31b938 439 }
iva2k 0:1802fb31b938 440
iva2k 0:1802fb31b938 441 /*
iva2k 0:1802fb31b938 442 **************************************************************************************************************
iva2k 0:1802fb31b938 443 * RECEIVE THE CONTROL INFORMATION
iva2k 0:1802fb31b938 444 *
iva2k 0:1802fb31b938 445 * Description: This function is used to receive the control information
iva2k 0:1802fb31b938 446 *
iva2k 0:1802fb31b938 447 * Arguments : bm_request_type
iva2k 0:1802fb31b938 448 * b_request
iva2k 0:1802fb31b938 449 * w_value
iva2k 0:1802fb31b938 450 * w_index
iva2k 0:1802fb31b938 451 * w_length
iva2k 0:1802fb31b938 452 * buffer
iva2k 0:1802fb31b938 453 *
iva2k 0:1802fb31b938 454 * Returns : OK if Success
iva2k 0:1802fb31b938 455 * ERROR if Failed
iva2k 0:1802fb31b938 456 *
iva2k 0:1802fb31b938 457 **************************************************************************************************************
iva2k 0:1802fb31b938 458 */
iva2k 0:1802fb31b938 459
iva2k 0:1802fb31b938 460 USB_INT32S Host_CtrlRecv ( USB_INT08U bm_request_type,
iva2k 0:1802fb31b938 461 USB_INT08U b_request,
iva2k 0:1802fb31b938 462 USB_INT16U w_value,
iva2k 0:1802fb31b938 463 USB_INT16U w_index,
iva2k 0:1802fb31b938 464 USB_INT16U w_length,
iva2k 0:1802fb31b938 465 volatile USB_INT08U *buffer)
iva2k 0:1802fb31b938 466 {
iva2k 0:1802fb31b938 467 USB_INT32S rc;
iva2k 0:1802fb31b938 468
iva2k 0:1802fb31b938 469
iva2k 0:1802fb31b938 470 Host_FillSetup(bm_request_type, b_request, w_value, w_index, w_length);
iva2k 0:1802fb31b938 471 rc = Host_ProcessTD(EDCtrl, TD_SETUP, TDBuffer, 8);
iva2k 0:1802fb31b938 472 if (rc == OK) {
iva2k 0:1802fb31b938 473 if (w_length) {
iva2k 0:1802fb31b938 474 rc = Host_ProcessTD(EDCtrl, TD_IN, TDBuffer, w_length);
iva2k 0:1802fb31b938 475 }
iva2k 0:1802fb31b938 476 if (rc == OK) {
iva2k 0:1802fb31b938 477 rc = Host_ProcessTD(EDCtrl, TD_OUT, NULL, 0);
iva2k 0:1802fb31b938 478 }
iva2k 0:1802fb31b938 479 }
iva2k 0:1802fb31b938 480 return (rc);
iva2k 0:1802fb31b938 481 }
iva2k 0:1802fb31b938 482
iva2k 0:1802fb31b938 483 /*
iva2k 0:1802fb31b938 484 **************************************************************************************************************
iva2k 0:1802fb31b938 485 * SEND THE CONTROL INFORMATION
iva2k 0:1802fb31b938 486 *
iva2k 0:1802fb31b938 487 * Description: This function is used to send the control information
iva2k 0:1802fb31b938 488 *
iva2k 0:1802fb31b938 489 * Arguments : None
iva2k 0:1802fb31b938 490 *
iva2k 0:1802fb31b938 491 * Returns : OK if Success
iva2k 0:1802fb31b938 492 * ERR_INVALID_BOOTSIG if Failed
iva2k 0:1802fb31b938 493 *
iva2k 0:1802fb31b938 494 **************************************************************************************************************
iva2k 0:1802fb31b938 495 */
iva2k 0:1802fb31b938 496
iva2k 0:1802fb31b938 497 USB_INT32S Host_CtrlSend ( USB_INT08U bm_request_type,
iva2k 0:1802fb31b938 498 USB_INT08U b_request,
iva2k 0:1802fb31b938 499 USB_INT16U w_value,
iva2k 0:1802fb31b938 500 USB_INT16U w_index,
iva2k 0:1802fb31b938 501 USB_INT16U w_length,
iva2k 0:1802fb31b938 502 volatile USB_INT08U *buffer)
iva2k 0:1802fb31b938 503 {
iva2k 0:1802fb31b938 504 USB_INT32S rc;
iva2k 0:1802fb31b938 505
iva2k 0:1802fb31b938 506
iva2k 0:1802fb31b938 507 Host_FillSetup(bm_request_type, b_request, w_value, w_index, w_length);
iva2k 0:1802fb31b938 508
iva2k 0:1802fb31b938 509 rc = Host_ProcessTD(EDCtrl, TD_SETUP, TDBuffer, 8);
iva2k 0:1802fb31b938 510 if (rc == OK) {
iva2k 0:1802fb31b938 511 if (w_length) {
iva2k 0:1802fb31b938 512 rc = Host_ProcessTD(EDCtrl, TD_OUT, TDBuffer, w_length);
iva2k 0:1802fb31b938 513 }
iva2k 0:1802fb31b938 514 if (rc == OK) {
iva2k 0:1802fb31b938 515 rc = Host_ProcessTD(EDCtrl, TD_IN, NULL, 0);
iva2k 0:1802fb31b938 516 }
iva2k 0:1802fb31b938 517 }
iva2k 0:1802fb31b938 518 return (rc);
iva2k 0:1802fb31b938 519 }
iva2k 0:1802fb31b938 520
iva2k 0:1802fb31b938 521 /*
iva2k 0:1802fb31b938 522 **************************************************************************************************************
iva2k 0:1802fb31b938 523 * FILL SETUP PACKET
iva2k 0:1802fb31b938 524 *
iva2k 0:1802fb31b938 525 * Description: This function is used to fill the setup packet
iva2k 0:1802fb31b938 526 *
iva2k 0:1802fb31b938 527 * Arguments : None
iva2k 0:1802fb31b938 528 *
iva2k 0:1802fb31b938 529 * Returns : OK if Success
iva2k 0:1802fb31b938 530 * ERR_INVALID_BOOTSIG if Failed
iva2k 0:1802fb31b938 531 *
iva2k 0:1802fb31b938 532 **************************************************************************************************************
iva2k 0:1802fb31b938 533 */
iva2k 0:1802fb31b938 534
iva2k 0:1802fb31b938 535 void Host_FillSetup (USB_INT08U bm_request_type,
iva2k 0:1802fb31b938 536 USB_INT08U b_request,
iva2k 0:1802fb31b938 537 USB_INT16U w_value,
iva2k 0:1802fb31b938 538 USB_INT16U w_index,
iva2k 0:1802fb31b938 539 USB_INT16U w_length)
iva2k 0:1802fb31b938 540 {
iva2k 0:1802fb31b938 541 int i;
iva2k 0:1802fb31b938 542 for (i=0;i<w_length;i++)
iva2k 0:1802fb31b938 543 TDBuffer[i] = 0;
iva2k 0:1802fb31b938 544
iva2k 0:1802fb31b938 545 TDBuffer[0] = bm_request_type;
iva2k 0:1802fb31b938 546 TDBuffer[1] = b_request;
iva2k 0:1802fb31b938 547 WriteLE16U(&TDBuffer[2], w_value);
iva2k 0:1802fb31b938 548 WriteLE16U(&TDBuffer[4], w_index);
iva2k 0:1802fb31b938 549 WriteLE16U(&TDBuffer[6], w_length);
iva2k 0:1802fb31b938 550 }
iva2k 0:1802fb31b938 551
iva2k 0:1802fb31b938 552
iva2k 0:1802fb31b938 553
iva2k 0:1802fb31b938 554 /*
iva2k 0:1802fb31b938 555 **************************************************************************************************************
iva2k 0:1802fb31b938 556 * INITIALIZE THE TRANSFER DESCRIPTOR
iva2k 0:1802fb31b938 557 *
iva2k 0:1802fb31b938 558 * Description: This function initializes transfer descriptor
iva2k 0:1802fb31b938 559 *
iva2k 0:1802fb31b938 560 * Arguments : Pointer to TD structure
iva2k 0:1802fb31b938 561 *
iva2k 0:1802fb31b938 562 * Returns : None
iva2k 0:1802fb31b938 563 *
iva2k 0:1802fb31b938 564 **************************************************************************************************************
iva2k 0:1802fb31b938 565 */
iva2k 0:1802fb31b938 566
iva2k 0:1802fb31b938 567 void Host_TDInit (volatile HCTD *td)
iva2k 0:1802fb31b938 568 {
iva2k 0:1802fb31b938 569
iva2k 0:1802fb31b938 570 td->Control = 0;
iva2k 0:1802fb31b938 571 td->CurrBufPtr = 0;
iva2k 0:1802fb31b938 572 td->Next = 0;
iva2k 0:1802fb31b938 573 td->BufEnd = 0;
iva2k 0:1802fb31b938 574 }
iva2k 0:1802fb31b938 575
iva2k 0:1802fb31b938 576 /*
iva2k 0:1802fb31b938 577 **************************************************************************************************************
iva2k 0:1802fb31b938 578 * INITIALIZE THE ENDPOINT DESCRIPTOR
iva2k 0:1802fb31b938 579 *
iva2k 0:1802fb31b938 580 * Description: This function initializes endpoint descriptor
iva2k 0:1802fb31b938 581 *
iva2k 0:1802fb31b938 582 * Arguments : Pointer to ED strcuture
iva2k 0:1802fb31b938 583 *
iva2k 0:1802fb31b938 584 * Returns : None
iva2k 0:1802fb31b938 585 *
iva2k 0:1802fb31b938 586 **************************************************************************************************************
iva2k 0:1802fb31b938 587 */
iva2k 0:1802fb31b938 588
iva2k 0:1802fb31b938 589 void Host_EDInit (volatile HCED *ed)
iva2k 0:1802fb31b938 590 {
iva2k 0:1802fb31b938 591
iva2k 0:1802fb31b938 592 ed->Control = 0;
iva2k 0:1802fb31b938 593 ed->TailTd = 0;
iva2k 0:1802fb31b938 594 ed->HeadTd = 0;
iva2k 0:1802fb31b938 595 ed->Next = 0;
iva2k 0:1802fb31b938 596 }
iva2k 0:1802fb31b938 597
iva2k 0:1802fb31b938 598 /*
iva2k 0:1802fb31b938 599 **************************************************************************************************************
iva2k 0:1802fb31b938 600 * INITIALIZE HOST CONTROLLER COMMUNICATIONS AREA
iva2k 0:1802fb31b938 601 *
iva2k 0:1802fb31b938 602 * Description: This function initializes host controller communications area
iva2k 0:1802fb31b938 603 *
iva2k 0:1802fb31b938 604 * Arguments : Pointer to HCCA
iva2k 0:1802fb31b938 605 *
iva2k 0:1802fb31b938 606 * Returns :
iva2k 0:1802fb31b938 607 *
iva2k 0:1802fb31b938 608 **************************************************************************************************************
iva2k 0:1802fb31b938 609 */
iva2k 0:1802fb31b938 610
iva2k 0:1802fb31b938 611 void Host_HCCAInit (volatile HCCA *hcca)
iva2k 0:1802fb31b938 612 {
iva2k 0:1802fb31b938 613 USB_INT32U i;
iva2k 0:1802fb31b938 614
iva2k 0:1802fb31b938 615
iva2k 0:1802fb31b938 616 for (i = 0; i < 32; i++) {
iva2k 0:1802fb31b938 617
iva2k 0:1802fb31b938 618 hcca->IntTable[i] = 0;
iva2k 0:1802fb31b938 619 hcca->FrameNumber = 0;
iva2k 0:1802fb31b938 620 hcca->DoneHead = 0;
iva2k 0:1802fb31b938 621 }
iva2k 0:1802fb31b938 622
iva2k 0:1802fb31b938 623 }
iva2k 0:1802fb31b938 624
iva2k 0:1802fb31b938 625 /*
iva2k 0:1802fb31b938 626 **************************************************************************************************************
iva2k 0:1802fb31b938 627 * WAIT FOR WDH INTERRUPT
iva2k 0:1802fb31b938 628 *
iva2k 0:1802fb31b938 629 * Description: This function is infinite loop which breaks when ever a WDH interrupt rises
iva2k 0:1802fb31b938 630 *
iva2k 0:1802fb31b938 631 * Arguments : None
iva2k 0:1802fb31b938 632 *
iva2k 0:1802fb31b938 633 * Returns : None
iva2k 0:1802fb31b938 634 *
iva2k 0:1802fb31b938 635 **************************************************************************************************************
iva2k 0:1802fb31b938 636 */
iva2k 0:1802fb31b938 637
iva2k 0:1802fb31b938 638 void Host_WDHWait (void)
iva2k 0:1802fb31b938 639 {
iva2k 0:1802fb31b938 640 while (!HOST_WdhIntr) {
iva2k 0:1802fb31b938 641 ;
iva2k 0:1802fb31b938 642 }
iva2k 0:1802fb31b938 643 HOST_WdhIntr = 0;
iva2k 0:1802fb31b938 644 }
iva2k 0:1802fb31b938 645
iva2k 0:1802fb31b938 646 /*
iva2k 0:1802fb31b938 647 **************************************************************************************************************
iva2k 0:1802fb31b938 648 * READ LE 32U
iva2k 0:1802fb31b938 649 *
iva2k 0:1802fb31b938 650 * Description: This function is used to read an unsigned integer from a charecter buffer in the platform
iva2k 0:1802fb31b938 651 * containing little endian processor
iva2k 0:1802fb31b938 652 *
iva2k 0:1802fb31b938 653 * Arguments : pmem Pointer to the charecter buffer
iva2k 0:1802fb31b938 654 *
iva2k 0:1802fb31b938 655 * Returns : val Unsigned integer
iva2k 0:1802fb31b938 656 *
iva2k 0:1802fb31b938 657 **************************************************************************************************************
iva2k 0:1802fb31b938 658 */
iva2k 0:1802fb31b938 659
iva2k 0:1802fb31b938 660 USB_INT32U ReadLE32U (volatile USB_INT08U *pmem)
iva2k 0:1802fb31b938 661 {
iva2k 0:1802fb31b938 662 USB_INT32U val;
iva2k 0:1802fb31b938 663
iva2k 0:1802fb31b938 664 ((USB_INT08U *)&val)[0] = pmem[0];
iva2k 0:1802fb31b938 665 ((USB_INT08U *)&val)[1] = pmem[1];
iva2k 0:1802fb31b938 666 ((USB_INT08U *)&val)[2] = pmem[2];
iva2k 0:1802fb31b938 667 ((USB_INT08U *)&val)[3] = pmem[3];
iva2k 0:1802fb31b938 668
iva2k 0:1802fb31b938 669 return (val);
iva2k 0:1802fb31b938 670 }
iva2k 0:1802fb31b938 671
iva2k 0:1802fb31b938 672 /*
iva2k 0:1802fb31b938 673 **************************************************************************************************************
iva2k 0:1802fb31b938 674 * WRITE LE 32U
iva2k 0:1802fb31b938 675 *
iva2k 0:1802fb31b938 676 * Description: This function is used to write an unsigned integer into a charecter buffer in the platform
iva2k 0:1802fb31b938 677 * containing little endian processor.
iva2k 0:1802fb31b938 678 *
iva2k 0:1802fb31b938 679 * Arguments : pmem Pointer to the charecter buffer
iva2k 0:1802fb31b938 680 * val Integer value to be placed in the charecter buffer
iva2k 0:1802fb31b938 681 *
iva2k 0:1802fb31b938 682 * Returns : None
iva2k 0:1802fb31b938 683 *
iva2k 0:1802fb31b938 684 **************************************************************************************************************
iva2k 0:1802fb31b938 685 */
iva2k 0:1802fb31b938 686
iva2k 0:1802fb31b938 687 void WriteLE32U (volatile USB_INT08U *pmem,
iva2k 0:1802fb31b938 688 USB_INT32U val)
iva2k 0:1802fb31b938 689 {
iva2k 0:1802fb31b938 690 pmem[0] = ((USB_INT08U *)&val)[0];
iva2k 0:1802fb31b938 691 pmem[1] = ((USB_INT08U *)&val)[1];
iva2k 0:1802fb31b938 692 pmem[2] = ((USB_INT08U *)&val)[2];
iva2k 0:1802fb31b938 693 pmem[3] = ((USB_INT08U *)&val)[3];
iva2k 0:1802fb31b938 694 }
iva2k 0:1802fb31b938 695
iva2k 0:1802fb31b938 696 /*
iva2k 0:1802fb31b938 697 **************************************************************************************************************
iva2k 0:1802fb31b938 698 * READ LE 16U
iva2k 0:1802fb31b938 699 *
iva2k 0:1802fb31b938 700 * Description: This function is used to read an unsigned short integer from a charecter buffer in the platform
iva2k 0:1802fb31b938 701 * containing little endian processor
iva2k 0:1802fb31b938 702 *
iva2k 0:1802fb31b938 703 * Arguments : pmem Pointer to the charecter buffer
iva2k 0:1802fb31b938 704 *
iva2k 0:1802fb31b938 705 * Returns : val Unsigned short integer
iva2k 0:1802fb31b938 706 *
iva2k 0:1802fb31b938 707 **************************************************************************************************************
iva2k 0:1802fb31b938 708 */
iva2k 0:1802fb31b938 709
iva2k 0:1802fb31b938 710 USB_INT16U ReadLE16U (volatile USB_INT08U *pmem)
iva2k 0:1802fb31b938 711 {
iva2k 0:1802fb31b938 712 USB_INT16U val;
iva2k 0:1802fb31b938 713
iva2k 0:1802fb31b938 714 ((USB_INT08U *)&val)[0] = pmem[0];
iva2k 0:1802fb31b938 715 ((USB_INT08U *)&val)[1] = pmem[1];
iva2k 0:1802fb31b938 716
iva2k 0:1802fb31b938 717
iva2k 0:1802fb31b938 718 return (val);
iva2k 0:1802fb31b938 719 }
iva2k 0:1802fb31b938 720
iva2k 0:1802fb31b938 721 /*
iva2k 0:1802fb31b938 722 **************************************************************************************************************
iva2k 0:1802fb31b938 723 * WRITE LE 16U
iva2k 0:1802fb31b938 724 *
iva2k 0:1802fb31b938 725 * Description: This function is used to write an unsigned short integer into a charecter buffer in the
iva2k 0:1802fb31b938 726 * platform containing little endian processor
iva2k 0:1802fb31b938 727 *
iva2k 0:1802fb31b938 728 * Arguments : pmem Pointer to the charecter buffer
iva2k 0:1802fb31b938 729 * val Value to be placed in the charecter buffer
iva2k 0:1802fb31b938 730 *
iva2k 0:1802fb31b938 731 * Returns : None
iva2k 0:1802fb31b938 732 *
iva2k 0:1802fb31b938 733 **************************************************************************************************************
iva2k 0:1802fb31b938 734 */
iva2k 0:1802fb31b938 735
iva2k 0:1802fb31b938 736 void WriteLE16U (volatile USB_INT08U *pmem,
iva2k 0:1802fb31b938 737 USB_INT16U val)
iva2k 0:1802fb31b938 738 {
iva2k 0:1802fb31b938 739 pmem[0] = ((USB_INT08U *)&val)[0];
iva2k 0:1802fb31b938 740 pmem[1] = ((USB_INT08U *)&val)[1];
iva2k 0:1802fb31b938 741 }
iva2k 0:1802fb31b938 742
iva2k 0:1802fb31b938 743 /*
iva2k 0:1802fb31b938 744 **************************************************************************************************************
iva2k 0:1802fb31b938 745 * READ BE 32U
iva2k 0:1802fb31b938 746 *
iva2k 0:1802fb31b938 747 * Description: This function is used to read an unsigned integer from a charecter buffer in the platform
iva2k 0:1802fb31b938 748 * containing big endian processor
iva2k 0:1802fb31b938 749 *
iva2k 0:1802fb31b938 750 * Arguments : pmem Pointer to the charecter buffer
iva2k 0:1802fb31b938 751 *
iva2k 0:1802fb31b938 752 * Returns : val Unsigned integer
iva2k 0:1802fb31b938 753 *
iva2k 0:1802fb31b938 754 **************************************************************************************************************
iva2k 0:1802fb31b938 755 */
iva2k 0:1802fb31b938 756
iva2k 0:1802fb31b938 757 USB_INT32U ReadBE32U (volatile USB_INT08U *pmem)
iva2k 0:1802fb31b938 758 {
iva2k 0:1802fb31b938 759 USB_INT32U val;
iva2k 0:1802fb31b938 760
iva2k 0:1802fb31b938 761 ((USB_INT08U *)&val)[0] = pmem[3];
iva2k 0:1802fb31b938 762 ((USB_INT08U *)&val)[1] = pmem[2];
iva2k 0:1802fb31b938 763 ((USB_INT08U *)&val)[2] = pmem[1];
iva2k 0:1802fb31b938 764 ((USB_INT08U *)&val)[3] = pmem[0];
iva2k 0:1802fb31b938 765
iva2k 0:1802fb31b938 766 return (val);
iva2k 0:1802fb31b938 767 }
iva2k 0:1802fb31b938 768
iva2k 0:1802fb31b938 769 /*
iva2k 0:1802fb31b938 770 **************************************************************************************************************
iva2k 0:1802fb31b938 771 * WRITE BE 32U
iva2k 0:1802fb31b938 772 *
iva2k 0:1802fb31b938 773 * Description: This function is used to write an unsigned integer into a charecter buffer in the platform
iva2k 0:1802fb31b938 774 * containing big endian processor
iva2k 0:1802fb31b938 775 *
iva2k 0:1802fb31b938 776 * Arguments : pmem Pointer to the charecter buffer
iva2k 0:1802fb31b938 777 * val Value to be placed in the charecter buffer
iva2k 0:1802fb31b938 778 *
iva2k 0:1802fb31b938 779 * Returns : None
iva2k 0:1802fb31b938 780 *
iva2k 0:1802fb31b938 781 **************************************************************************************************************
iva2k 0:1802fb31b938 782 */
iva2k 0:1802fb31b938 783
iva2k 0:1802fb31b938 784 void WriteBE32U (volatile USB_INT08U *pmem,
iva2k 0:1802fb31b938 785 USB_INT32U val)
iva2k 0:1802fb31b938 786 {
iva2k 0:1802fb31b938 787 pmem[0] = ((USB_INT08U *)&val)[3];
iva2k 0:1802fb31b938 788 pmem[1] = ((USB_INT08U *)&val)[2];
iva2k 0:1802fb31b938 789 pmem[2] = ((USB_INT08U *)&val)[1];
iva2k 0:1802fb31b938 790 pmem[3] = ((USB_INT08U *)&val)[0];
iva2k 0:1802fb31b938 791
iva2k 0:1802fb31b938 792 }
iva2k 0:1802fb31b938 793
iva2k 0:1802fb31b938 794 /*
iva2k 0:1802fb31b938 795 **************************************************************************************************************
iva2k 0:1802fb31b938 796 * READ BE 16U
iva2k 0:1802fb31b938 797 *
iva2k 0:1802fb31b938 798 * Description: This function is used to read an unsigned short integer from a charecter buffer in the platform
iva2k 0:1802fb31b938 799 * containing big endian processor
iva2k 0:1802fb31b938 800 *
iva2k 0:1802fb31b938 801 * Arguments : pmem Pointer to the charecter buffer
iva2k 0:1802fb31b938 802 *
iva2k 0:1802fb31b938 803 * Returns : val Unsigned short integer
iva2k 0:1802fb31b938 804 *
iva2k 0:1802fb31b938 805 **************************************************************************************************************
iva2k 0:1802fb31b938 806 */
iva2k 0:1802fb31b938 807
iva2k 0:1802fb31b938 808 USB_INT16U ReadBE16U (volatile USB_INT08U *pmem)
iva2k 0:1802fb31b938 809 {
iva2k 0:1802fb31b938 810 USB_INT16U val;
iva2k 0:1802fb31b938 811
iva2k 0:1802fb31b938 812
iva2k 0:1802fb31b938 813 ((USB_INT08U *)&val)[0] = pmem[1];
iva2k 0:1802fb31b938 814 ((USB_INT08U *)&val)[1] = pmem[0];
iva2k 0:1802fb31b938 815
iva2k 0:1802fb31b938 816 return (val);
iva2k 0:1802fb31b938 817 }
iva2k 0:1802fb31b938 818
iva2k 0:1802fb31b938 819 /*
iva2k 0:1802fb31b938 820 **************************************************************************************************************
iva2k 0:1802fb31b938 821 * WRITE BE 16U
iva2k 0:1802fb31b938 822 *
iva2k 0:1802fb31b938 823 * Description: This function is used to write an unsigned short integer into the charecter buffer in the
iva2k 0:1802fb31b938 824 * platform containing big endian processor
iva2k 0:1802fb31b938 825 *
iva2k 0:1802fb31b938 826 * Arguments : pmem Pointer to the charecter buffer
iva2k 0:1802fb31b938 827 * val Value to be placed in the charecter buffer
iva2k 0:1802fb31b938 828 *
iva2k 0:1802fb31b938 829 * Returns : None
iva2k 0:1802fb31b938 830 *
iva2k 0:1802fb31b938 831 **************************************************************************************************************
iva2k 0:1802fb31b938 832 */
iva2k 0:1802fb31b938 833
iva2k 0:1802fb31b938 834 void WriteBE16U (volatile USB_INT08U *pmem,
iva2k 0:1802fb31b938 835 USB_INT16U val)
iva2k 0:1802fb31b938 836 {
iva2k 0:1802fb31b938 837 pmem[0] = ((USB_INT08U *)&val)[1];
iva2k 0:1802fb31b938 838 pmem[1] = ((USB_INT08U *)&val)[0];
iva2k 0:1802fb31b938 839 }