Quick and dirty port of scmRTOS demo to mbed 1768. scmRTOS is a small RTOS written using C++. Offers (static) processes, critical sections, mutexes, messages, channels.

Dependencies:   mbed

Committer:
igorsk
Date:
Thu Sep 09 21:19:01 2010 +0000
Revision:
0:a405220cf420

        

Who changed what in which revision?

UserRevisionLine numberNew contents of line
igorsk 0:a405220cf420 1 //******************************************************************************
igorsk 0:a405220cf420 2 //*
igorsk 0:a405220cf420 3 //* FULLNAME: Single-Chip Microcontroller Real-Time Operating System
igorsk 0:a405220cf420 4 //*
igorsk 0:a405220cf420 5 //* NICKNAME: scmRTOS
igorsk 0:a405220cf420 6 //*
igorsk 0:a405220cf420 7 //* PROCESSOR: ARM Cortex-M3
igorsk 0:a405220cf420 8 //*
igorsk 0:a405220cf420 9 //* TOOLKIT: EWARM (IAR Systems)
igorsk 0:a405220cf420 10 //*
igorsk 0:a405220cf420 11 //* PURPOSE: Device Definitions
igorsk 0:a405220cf420 12 //*
igorsk 0:a405220cf420 13 //* Version: 3.10
igorsk 0:a405220cf420 14 //*
igorsk 0:a405220cf420 15 //* $Revision: 196 $
igorsk 0:a405220cf420 16 //* $Date:: 2008-06-19 #$
igorsk 0:a405220cf420 17 //*
igorsk 0:a405220cf420 18 //* Copyright (c) 2003-2010, Harry E. Zhurov
igorsk 0:a405220cf420 19 //*
igorsk 0:a405220cf420 20 //* Permission is hereby granted, free of charge, to any person
igorsk 0:a405220cf420 21 //* obtaining a copy of this software and associated documentation
igorsk 0:a405220cf420 22 //* files (the "Software"), to deal in the Software without restriction,
igorsk 0:a405220cf420 23 //* including without limitation the rights to use, copy, modify, merge,
igorsk 0:a405220cf420 24 //* publish, distribute, sublicense, and/or sell copies of the Software,
igorsk 0:a405220cf420 25 //* and to permit persons to whom the Software is furnished to do so,
igorsk 0:a405220cf420 26 //* subject to the following conditions:
igorsk 0:a405220cf420 27 //*
igorsk 0:a405220cf420 28 //* The above copyright notice and this permission notice shall be included
igorsk 0:a405220cf420 29 //* in all copies or substantial portions of the Software.
igorsk 0:a405220cf420 30 //*
igorsk 0:a405220cf420 31 //* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
igorsk 0:a405220cf420 32 //* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
igorsk 0:a405220cf420 33 //* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
igorsk 0:a405220cf420 34 //* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
igorsk 0:a405220cf420 35 //* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
igorsk 0:a405220cf420 36 //* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH
igorsk 0:a405220cf420 37 //* THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
igorsk 0:a405220cf420 38 //*
igorsk 0:a405220cf420 39 //* =================================================================
igorsk 0:a405220cf420 40 //* See http://scmrtos.sourceforge.net for documentation, latest
igorsk 0:a405220cf420 41 //* information, license and contact details.
igorsk 0:a405220cf420 42 //* =================================================================
igorsk 0:a405220cf420 43 //*
igorsk 0:a405220cf420 44 //******************************************************************************
igorsk 0:a405220cf420 45 //* Ported by Andrey Chuikin, Copyright (c) 2008-2010
igorsk 0:a405220cf420 46
igorsk 0:a405220cf420 47 #ifndef DEVICE_H
igorsk 0:a405220cf420 48 #define DEVICE_H
igorsk 0:a405220cf420 49
igorsk 0:a405220cf420 50 #include <commdefs.h>
igorsk 0:a405220cf420 51
igorsk 0:a405220cf420 52 //------------------------------------------------------------------------------
igorsk 0:a405220cf420 53 // Definitions for some processor registers in order to not include specific
igorsk 0:a405220cf420 54 // header file for various Cortex-M3 processor derivatives.
igorsk 0:a405220cf420 55 #define CPU_ICSR ( ( sfr_dword *) 0xE000ED04 ) // Interrupt Control State Register
igorsk 0:a405220cf420 56 #define CPU_SYSTICKCSR ( ( sfr_dword *) 0xE000E010 ) // SysTick Control and Status Register
igorsk 0:a405220cf420 57 #define CPU_SYSTICKCSR_EINT 0x02 // Bit for enable/disable SysTick interrupt
igorsk 0:a405220cf420 58
igorsk 0:a405220cf420 59
igorsk 0:a405220cf420 60 #endif /* DEVICE_H */