DriverLibrary - NXP's driver library for LPC17xx, ported to mbed'…

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Igor Skochinsky / Mbed 2 deprecated DriverLibrary

NXP's driver library for LPC17xx, ported to mbed's online compiler. Not tested! I had to fix a lot of warings and found a couple of pretty obvious bugs, so the chances are there are more. Original: http://ics.nxp.com/support/documents/microcontrollers/zip/lpc17xx.cmsis.driver.library.zip

Dependencies: mbed

source/lpc17xx_mcpwm.c@0:1063a091a062, 2010-02-17 (annotated)

Committer:: igorsk
Date:: Wed Feb 17 16:22:39 2010 +0000
Revision:: 0:1063a091a062

Who changed what in which revision?

User	Revision	Line number	New contents of line
igorsk	0:1063a091a062	1	/**
igorsk	0:1063a091a062	2	* @file : lpc17xx_mcpwm.c
igorsk	0:1063a091a062	3	* @brief : Contains all functions support for Motor Control PWM firmware
igorsk	0:1063a091a062	4	* library on LPC17xx
igorsk	0:1063a091a062	5	* @version : 1.0
igorsk	0:1063a091a062	6	* @date : 26. May. 2009
igorsk	0:1063a091a062	7	* @author : HieuNguyen
igorsk	0:1063a091a062	8	**************************************************************************
igorsk	0:1063a091a062	9	* Software that is described herein is for illustrative purposes only
igorsk	0:1063a091a062	10	* which provides customers with programming information regarding the
igorsk	0:1063a091a062	11	* products. This software is supplied "AS IS" without any warranties.
igorsk	0:1063a091a062	12	* NXP Semiconductors assumes no responsibility or liability for the
igorsk	0:1063a091a062	13	* use of the software, conveys no license or title under any patent,
igorsk	0:1063a091a062	14	* copyright, or mask work right to the product. NXP Semiconductors
igorsk	0:1063a091a062	15	* reserves the right to make changes in the software without
igorsk	0:1063a091a062	16	* notification. NXP Semiconductors also make no representation or
igorsk	0:1063a091a062	17	* warranty that such application will be suitable for the specified
igorsk	0:1063a091a062	18	* use without further testing or modification.
igorsk	0:1063a091a062	19	**********************************************************************/
igorsk	0:1063a091a062	20
igorsk	0:1063a091a062	21	/* Peripheral group ----------------------------------------------------------- */
igorsk	0:1063a091a062	22	/** @addtogroup MCPWM
igorsk	0:1063a091a062	23	* @{
igorsk	0:1063a091a062	24	*/
igorsk	0:1063a091a062	25
igorsk	0:1063a091a062	26	/* Includes ------------------------------------------------------------------- */
igorsk	0:1063a091a062	27	#include "lpc17xx_mcpwm.h"
igorsk	0:1063a091a062	28	#include "lpc17xx_clkpwr.h"
igorsk	0:1063a091a062	29
igorsk	0:1063a091a062	30	/* If this source file built with example, the LPC17xx FW library configuration
igorsk	0:1063a091a062	31	* file in each example directory ("lpc17xx_libcfg.h") must be included,
igorsk	0:1063a091a062	32	* otherwise the default FW library configuration file must be included instead
igorsk	0:1063a091a062	33	*/
igorsk	0:1063a091a062	34	#ifdef __BUILD_WITH_EXAMPLE__
igorsk	0:1063a091a062	35	#include "lpc17xx_libcfg.h"
igorsk	0:1063a091a062	36	#else
igorsk	0:1063a091a062	37	#include "lpc17xx_libcfg_default.h"
igorsk	0:1063a091a062	38	#endif /* __BUILD_WITH_EXAMPLE__ */
igorsk	0:1063a091a062	39
igorsk	0:1063a091a062	40
igorsk	0:1063a091a062	41	#ifdef _MCPWM
igorsk	0:1063a091a062	42
igorsk	0:1063a091a062	43	/* Public Functions ----------------------------------------------------------- */
igorsk	0:1063a091a062	44	/** @addtogroup MCPWM_Public_Functions
igorsk	0:1063a091a062	45	* @{
igorsk	0:1063a091a062	46	*/
igorsk	0:1063a091a062	47
igorsk	0:1063a091a062	48	/*******************************************************************//
igorsk	0:1063a091a062	49	* @brief Initializes the MCPWM peripheral
igorsk	0:1063a091a062	50	* @param[in] MCPWMx Motor Control PWM peripheral selected, should be MCPWM
igorsk	0:1063a091a062	51	* @return None
igorsk	0:1063a091a062	52	**********************************************************************/
igorsk	0:1063a091a062	53	void MCPWM_Init(LPC_MCPWM_TypeDef *MCPWMx)
igorsk	0:1063a091a062	54	{
igorsk	0:1063a091a062	55
igorsk	0:1063a091a062	56	/* Turn On MCPWM PCLK */
igorsk	0:1063a091a062	57	CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCMC, ENABLE);
igorsk	0:1063a091a062	58	/* As default, peripheral clock for MCPWM module
igorsk	0:1063a091a062	59	* is set to FCCLK / 2 */
igorsk	0:1063a091a062	60	// CLKPWR_SetPCLKDiv(CLKPWR_PCLKSEL_MC, CLKPWR_PCLKSEL_CCLK_DIV_2);
igorsk	0:1063a091a062	61
igorsk	0:1063a091a062	62	MCPWMx->MCCAP_CLR = MCPWM_CAPCLR_CAP(0) \| MCPWM_CAPCLR_CAP(1) \| MCPWM_CAPCLR_CAP(2);
igorsk	0:1063a091a062	63	MCPWMx->MCINTFLAG_CLR = MCPWM_INT_ILIM(0) \| MCPWM_INT_ILIM(1) \| MCPWM_INT_ILIM(2) \
igorsk	0:1063a091a062	64	\| MCPWM_INT_IMAT(0) \| MCPWM_INT_IMAT(1) \| MCPWM_INT_IMAT(2) \
igorsk	0:1063a091a062	65	\| MCPWM_INT_ICAP(0) \| MCPWM_INT_ICAP(1) \| MCPWM_INT_ICAP(2);
igorsk	0:1063a091a062	66	MCPWMx->MCINTEN_CLR = MCPWM_INT_ILIM(0) \| MCPWM_INT_ILIM(1) \| MCPWM_INT_ILIM(2) \
igorsk	0:1063a091a062	67	\| MCPWM_INT_IMAT(0) \| MCPWM_INT_IMAT(1) \| MCPWM_INT_IMAT(2) \
igorsk	0:1063a091a062	68	\| MCPWM_INT_ICAP(0) \| MCPWM_INT_ICAP(1) \| MCPWM_INT_ICAP(2);
igorsk	0:1063a091a062	69	}
igorsk	0:1063a091a062	70
igorsk	0:1063a091a062	71
igorsk	0:1063a091a062	72	/*******************************************************************//
igorsk	0:1063a091a062	73	* @brief Configures each channel in MCPWM peripheral according to the
igorsk	0:1063a091a062	74	* specified parameters in the MCPWM_CHANNEL_CFG_Type.
igorsk	0:1063a091a062	75	* @param[in] MCPWMx Motor Control PWM peripheral selected, should be MCPWM
igorsk	0:1063a091a062	76	* @param[in] channelNum Channel number, should be in range from 0 to 2.
igorsk	0:1063a091a062	77	* @param[in] channelSetup Pointer to a MCPWM_CHANNEL_CFG_Type structure
igorsk	0:1063a091a062	78	* that contains the configuration information for the
igorsk	0:1063a091a062	79	* specified MCPWM channel.
igorsk	0:1063a091a062	80	* @return None
igorsk	0:1063a091a062	81	**********************************************************************/
igorsk	0:1063a091a062	82	void MCPWM_ConfigChannel(LPC_MCPWM_TypeDef *MCPWMx, uint32_t channelNum,
igorsk	0:1063a091a062	83	MCPWM_CHANNEL_CFG_Type * channelSetup)
igorsk	0:1063a091a062	84	{
igorsk	0:1063a091a062	85	if (channelNum <= 2) {
igorsk	0:1063a091a062	86	if (channelNum == 0) {
igorsk	0:1063a091a062	87	MCPWMx->MCTIM0 = channelSetup->channelTimercounterValue;
igorsk	0:1063a091a062	88	MCPWMx->MCPER0 = channelSetup->channelPeriodValue;
igorsk	0:1063a091a062	89	MCPWMx->MCPW0 = channelSetup->channelPulsewidthValue;
igorsk	0:1063a091a062	90	} else if (channelNum == 1) {
igorsk	0:1063a091a062	91	MCPWMx->MCTIM1 = channelSetup->channelTimercounterValue;
igorsk	0:1063a091a062	92	MCPWMx->MCPER1 = channelSetup->channelPeriodValue;
igorsk	0:1063a091a062	93	MCPWMx->MCPW1 = channelSetup->channelPulsewidthValue;
igorsk	0:1063a091a062	94	} else if (channelNum == 2) {
igorsk	0:1063a091a062	95	MCPWMx->MCTIM2 = channelSetup->channelTimercounterValue;
igorsk	0:1063a091a062	96	MCPWMx->MCPER2 = channelSetup->channelPeriodValue;
igorsk	0:1063a091a062	97	MCPWMx->MCPW2 = channelSetup->channelPulsewidthValue;
igorsk	0:1063a091a062	98	} else {
igorsk	0:1063a091a062	99	return;
igorsk	0:1063a091a062	100	}
igorsk	0:1063a091a062	101
igorsk	0:1063a091a062	102	if (channelSetup->channelType == MCPWM_CHANNEL_CENTER_MODE){
igorsk	0:1063a091a062	103	MCPWMx->MCCON_SET = MCPWM_CON_CENTER(channelNum);
igorsk	0:1063a091a062	104	} else {
igorsk	0:1063a091a062	105	MCPWMx->MCCON_CLR = MCPWM_CON_CENTER(channelNum);
igorsk	0:1063a091a062	106	}
igorsk	0:1063a091a062	107
igorsk	0:1063a091a062	108	if (channelSetup->channelPolarity == MCPWM_CHANNEL_PASSIVE_HI){
igorsk	0:1063a091a062	109	MCPWMx->MCCON_SET = MCPWM_CON_POLAR(channelNum);
igorsk	0:1063a091a062	110	} else {
igorsk	0:1063a091a062	111	MCPWMx->MCCON_CLR = MCPWM_CON_POLAR(channelNum);
igorsk	0:1063a091a062	112	}
igorsk	0:1063a091a062	113
igorsk	0:1063a091a062	114	if (channelSetup->channelDeadtimeEnable /* == ENABLE */){
igorsk	0:1063a091a062	115	MCPWMx->MCCON_SET = MCPWM_CON_DTE(channelNum);
igorsk	0:1063a091a062	116	MCPWMx->MCDEADTIME &= ~(MCPWM_DT(channelNum, 0x3FF));
igorsk	0:1063a091a062	117	MCPWMx->MCDEADTIME \|= MCPWM_DT(channelNum, channelSetup->channelDeadtimeValue);
igorsk	0:1063a091a062	118	} else {
igorsk	0:1063a091a062	119	MCPWMx->MCCON_CLR = MCPWM_CON_DTE(channelNum);
igorsk	0:1063a091a062	120	}
igorsk	0:1063a091a062	121
igorsk	0:1063a091a062	122	if (channelSetup->channelUpdateEnable /* == ENABLE */){
igorsk	0:1063a091a062	123	MCPWMx->MCCON_CLR = MCPWM_CON_DISUP(channelNum);
igorsk	0:1063a091a062	124	} else {
igorsk	0:1063a091a062	125	MCPWMx->MCCON_SET = MCPWM_CON_DISUP(channelNum);
igorsk	0:1063a091a062	126	}
igorsk	0:1063a091a062	127	}
igorsk	0:1063a091a062	128	}
igorsk	0:1063a091a062	129
igorsk	0:1063a091a062	130
igorsk	0:1063a091a062	131	/*******************************************************************//
igorsk	0:1063a091a062	132	* @brief Write to MCPWM shadow registers - Update the value for period
igorsk	0:1063a091a062	133	* and pulse width in MCPWM peripheral.
igorsk	0:1063a091a062	134	* @param[in] MCPWMx Motor Control PWM peripheral selected, should be MCPWM
igorsk	0:1063a091a062	135	* @param[in] channelNum Channel Number, should be in range from 0 to 2.
igorsk	0:1063a091a062	136	* @param[in] channelSetup Pointer to a MCPWM_CHANNEL_CFG_Type structure
igorsk	0:1063a091a062	137	* that contains the configuration information for the
igorsk	0:1063a091a062	138	* specified MCPWM channel.
igorsk	0:1063a091a062	139	* @return None
igorsk	0:1063a091a062	140	**********************************************************************/
igorsk	0:1063a091a062	141	void MCPWM_WriteToShadow(LPC_MCPWM_TypeDef *MCPWMx, uint32_t channelNum,
igorsk	0:1063a091a062	142	MCPWM_CHANNEL_CFG_Type *channelSetup)
igorsk	0:1063a091a062	143	{
igorsk	0:1063a091a062	144	if (channelNum == 0){
igorsk	0:1063a091a062	145	MCPWMx->MCPER0 = channelSetup->channelPeriodValue;
igorsk	0:1063a091a062	146	MCPWMx->MCPW0 = channelSetup->channelPulsewidthValue;
igorsk	0:1063a091a062	147	} else if (channelNum == 1) {
igorsk	0:1063a091a062	148	MCPWMx->MCPER1 = channelSetup->channelPeriodValue;
igorsk	0:1063a091a062	149	MCPWMx->MCPW1 = channelSetup->channelPulsewidthValue;
igorsk	0:1063a091a062	150	} else if (channelNum == 2) {
igorsk	0:1063a091a062	151	MCPWMx->MCPER2 = channelSetup->channelPeriodValue;
igorsk	0:1063a091a062	152	MCPWMx->MCPW2 = channelSetup->channelPulsewidthValue;
igorsk	0:1063a091a062	153	}
igorsk	0:1063a091a062	154	}
igorsk	0:1063a091a062	155
igorsk	0:1063a091a062	156
igorsk	0:1063a091a062	157
igorsk	0:1063a091a062	158	/*******************************************************************//
igorsk	0:1063a091a062	159	* @brief Configures capture function in MCPWM peripheral
igorsk	0:1063a091a062	160	* @param[in] MCPWMx Motor Control PWM peripheral selected, should be MCPWM
igorsk	0:1063a091a062	161	* @param[in] channelNum MCI (Motor Control Input pin) number, should be in range from 0 to 2.
igorsk	0:1063a091a062	162	* @param[in] captureConfig Pointer to a MCPWM_CAPTURE_CFG_Type structure
igorsk	0:1063a091a062	163	* that contains the configuration information for the
igorsk	0:1063a091a062	164	* specified MCPWM capture.
igorsk	0:1063a091a062	165	* @return
igorsk	0:1063a091a062	166	**********************************************************************/
igorsk	0:1063a091a062	167	void MCPWM_ConfigCapture(LPC_MCPWM_TypeDef *MCPWMx, uint32_t channelNum,
igorsk	0:1063a091a062	168	MCPWM_CAPTURE_CFG_Type *captureConfig)
igorsk	0:1063a091a062	169	{
igorsk	0:1063a091a062	170	if (channelNum <= 2) {
igorsk	0:1063a091a062	171
igorsk	0:1063a091a062	172	if (captureConfig->captureFalling /* == ENABLE */) {
igorsk	0:1063a091a062	173	MCPWMx->MCCAPCON_SET = MCPWM_CAPCON_CAPMCI_FE(captureConfig->captureChannel, channelNum);
igorsk	0:1063a091a062	174	} else {
igorsk	0:1063a091a062	175	MCPWMx->MCCAPCON_CLR = MCPWM_CAPCON_CAPMCI_FE(captureConfig->captureChannel, channelNum);
igorsk	0:1063a091a062	176	}
igorsk	0:1063a091a062	177
igorsk	0:1063a091a062	178	if (captureConfig->captureRising /* == ENABLE */) {
igorsk	0:1063a091a062	179	MCPWMx->MCCAPCON_SET = MCPWM_CAPCON_CAPMCI_RE(captureConfig->captureChannel, channelNum);
igorsk	0:1063a091a062	180	} else {
igorsk	0:1063a091a062	181	MCPWMx->MCCAPCON_CLR = MCPWM_CAPCON_CAPMCI_RE(captureConfig->captureChannel, channelNum);
igorsk	0:1063a091a062	182	}
igorsk	0:1063a091a062	183
igorsk	0:1063a091a062	184	if (captureConfig->timerReset /* == ENABLE */){
igorsk	0:1063a091a062	185	MCPWMx->MCCAPCON_SET = MCPWM_CAPCON_RT(captureConfig->captureChannel);
igorsk	0:1063a091a062	186	} else {
igorsk	0:1063a091a062	187	MCPWMx->MCCAPCON_CLR = MCPWM_CAPCON_RT(captureConfig->captureChannel);
igorsk	0:1063a091a062	188	}
igorsk	0:1063a091a062	189
igorsk	0:1063a091a062	190	if (captureConfig->hnfEnable /* == ENABLE */){
igorsk	0:1063a091a062	191	MCPWMx->MCCAPCON_SET = MCPWM_CAPCON_HNFCAP(channelNum);
igorsk	0:1063a091a062	192	} else {
igorsk	0:1063a091a062	193	MCPWMx->MCCAPCON_CLR = MCPWM_CAPCON_HNFCAP(channelNum);
igorsk	0:1063a091a062	194	}
igorsk	0:1063a091a062	195	}
igorsk	0:1063a091a062	196	}
igorsk	0:1063a091a062	197
igorsk	0:1063a091a062	198
igorsk	0:1063a091a062	199	/*******************************************************************//
igorsk	0:1063a091a062	200	* @brief Clears current captured value in specified capture channel
igorsk	0:1063a091a062	201	* @param[in] MCPWMx Motor Control PWM peripheral selected, should be MCPWM
igorsk	0:1063a091a062	202	* @param[in] captureChannel Capture channel number, should be in range from 0 to 2
igorsk	0:1063a091a062	203	* @return None
igorsk	0:1063a091a062	204	**********************************************************************/
igorsk	0:1063a091a062	205	void MCPWM_ClearCapture(LPC_MCPWM_TypeDef *MCPWMx, uint32_t captureChannel)
igorsk	0:1063a091a062	206	{
igorsk	0:1063a091a062	207	MCPWMx->MCCAP_CLR = MCPWM_CAPCLR_CAP(captureChannel);
igorsk	0:1063a091a062	208	}
igorsk	0:1063a091a062	209
igorsk	0:1063a091a062	210	/*******************************************************************//
igorsk	0:1063a091a062	211	* @brief Get current captured value in specified capture channel
igorsk	0:1063a091a062	212	* @param[in] MCPWMx Motor Control PWM peripheral selected, should be MCPWM
igorsk	0:1063a091a062	213	* @param[in] captureChannel Capture channel number, should be in range from 0 to 2
igorsk	0:1063a091a062	214	* @return None
igorsk	0:1063a091a062	215	**********************************************************************/
igorsk	0:1063a091a062	216	uint32_t MCPWM_GetCapture(LPC_MCPWM_TypeDef *MCPWMx, uint32_t captureChannel)
igorsk	0:1063a091a062	217	{
igorsk	0:1063a091a062	218	if (captureChannel == 0){
igorsk	0:1063a091a062	219	return (MCPWMx->MCCR0);
igorsk	0:1063a091a062	220	} else if (captureChannel == 1) {
igorsk	0:1063a091a062	221	return (MCPWMx->MCCR1);
igorsk	0:1063a091a062	222	} else if (captureChannel == 2) {
igorsk	0:1063a091a062	223	return (MCPWMx->MCCR2);
igorsk	0:1063a091a062	224	}
igorsk	0:1063a091a062	225	return (0);
igorsk	0:1063a091a062	226	}
igorsk	0:1063a091a062	227
igorsk	0:1063a091a062	228
igorsk	0:1063a091a062	229	/*******************************************************************//
igorsk	0:1063a091a062	230	* @brief Configures Count control in MCPWM peripheral
igorsk	0:1063a091a062	231	* @param[in] MCPWMx Motor Control PWM peripheral selected, should be MCPWM
igorsk	0:1063a091a062	232	* @param[in] channelNum Channel number, should be in range from 0 to 2
igorsk	0:1063a091a062	233	* @param[in] countMode Count mode, should be:
igorsk	0:1063a091a062	234	* - ENABLE: Enables count mode.
igorsk	0:1063a091a062	235	* - DISABLE: Disable count mode, the channel is in timer mode.
igorsk	0:1063a091a062	236	* @param[in] countConfig Pointer to a MCPWM_COUNT_CFG_Type structure
igorsk	0:1063a091a062	237	* that contains the configuration information for the
igorsk	0:1063a091a062	238	* specified MCPWM count control.
igorsk	0:1063a091a062	239	* @return None
igorsk	0:1063a091a062	240	**********************************************************************/
igorsk	0:1063a091a062	241	void MCPWM_CountConfig(LPC_MCPWM_TypeDef *MCPWMx, uint32_t channelNum,
igorsk	0:1063a091a062	242	uint32_t countMode, MCPWM_COUNT_CFG_Type *countConfig)
igorsk	0:1063a091a062	243	{
igorsk	0:1063a091a062	244	if ((channelNum <= 2)) {
igorsk	0:1063a091a062	245	if (countMode /* == ENABLE */){
igorsk	0:1063a091a062	246	MCPWMx->MCCNTCON_SET = MCPWM_CNTCON_CNTR(channelNum);
igorsk	0:1063a091a062	247	if (countConfig->countFalling /* == ENABLE */) {
igorsk	0:1063a091a062	248	MCPWMx->MCCNTCON_SET = MCPWM_CNTCON_TCMCI_FE(countConfig->counterChannel,channelNum);
igorsk	0:1063a091a062	249	} else {
igorsk	0:1063a091a062	250	MCPWMx->MCCNTCON_CLR = MCPWM_CNTCON_TCMCI_FE(countConfig->counterChannel,channelNum);
igorsk	0:1063a091a062	251	}
igorsk	0:1063a091a062	252	if (countConfig->countRising /* == ENABLE */) {
igorsk	0:1063a091a062	253	MCPWMx->MCCNTCON_SET = MCPWM_CNTCON_TCMCI_RE(countConfig->counterChannel,channelNum);
igorsk	0:1063a091a062	254	} else {
igorsk	0:1063a091a062	255	MCPWMx->MCCNTCON_CLR = MCPWM_CNTCON_TCMCI_RE(countConfig->counterChannel,channelNum);
igorsk	0:1063a091a062	256	}
igorsk	0:1063a091a062	257	} else {
igorsk	0:1063a091a062	258	MCPWMx->MCCNTCON_CLR = MCPWM_CNTCON_CNTR(channelNum);
igorsk	0:1063a091a062	259	}
igorsk	0:1063a091a062	260	}
igorsk	0:1063a091a062	261	}
igorsk	0:1063a091a062	262
igorsk	0:1063a091a062	263
igorsk	0:1063a091a062	264	/*******************************************************************//
igorsk	0:1063a091a062	265	* @brief Start MCPWM activity for each MCPWM channel
igorsk	0:1063a091a062	266	* @param[in] MCPWMx Motor Control PWM peripheral selected, should be MCPWM
igorsk	0:1063a091a062	267	* @param[in] channel0 State of this command on channel 0:
igorsk	0:1063a091a062	268	* - ENABLE: 'Start' command will effect on channel 0
igorsk	0:1063a091a062	269	* - DISABLE: 'Start' command will not effect on channel 0
igorsk	0:1063a091a062	270	* @param[in] channel1 State of this command on channel 1:
igorsk	0:1063a091a062	271	* - ENABLE: 'Start' command will effect on channel 1
igorsk	0:1063a091a062	272	* - DISABLE: 'Start' command will not effect on channel 1
igorsk	0:1063a091a062	273	* @param[in] channel2 State of this command on channel 2:
igorsk	0:1063a091a062	274	* - ENABLE: 'Start' command will effect on channel 2
igorsk	0:1063a091a062	275	* - DISABLE: 'Start' command will not effect on channel 2
igorsk	0:1063a091a062	276	* @return None
igorsk	0:1063a091a062	277	**********************************************************************/
igorsk	0:1063a091a062	278	void MCPWM_Start(LPC_MCPWM_TypeDef *MCPWMx, uint32_t channel0,
igorsk	0:1063a091a062	279	uint32_t channel1, uint32_t channel2)
igorsk	0:1063a091a062	280	{
igorsk	0:1063a091a062	281	uint32_t regVal = 0;
igorsk	0:1063a091a062	282	regVal = (channel0 ? MCPWM_CON_RUN(0) : 0) \| (channel1 ? MCPWM_CON_RUN(1) : 0) \
igorsk	0:1063a091a062	283	\| (channel2 ? MCPWM_CON_RUN(2) : 0);
igorsk	0:1063a091a062	284	MCPWMx->MCCON_SET = regVal;
igorsk	0:1063a091a062	285	}
igorsk	0:1063a091a062	286
igorsk	0:1063a091a062	287
igorsk	0:1063a091a062	288	/*******************************************************************//
igorsk	0:1063a091a062	289	* @brief Stop MCPWM activity for each MCPWM channel
igorsk	0:1063a091a062	290	* @param[in] MCPWMx Motor Control PWM peripheral selected, should be MCPWM
igorsk	0:1063a091a062	291	* @param[in] channel0 State of this command on channel 0:
igorsk	0:1063a091a062	292	* - ENABLE: 'Stop' command will effect on channel 0
igorsk	0:1063a091a062	293	* - DISABLE: 'Stop' command will not effect on channel 0
igorsk	0:1063a091a062	294	* @param[in] channel1 State of this command on channel 1:
igorsk	0:1063a091a062	295	* - ENABLE: 'Stop' command will effect on channel 1
igorsk	0:1063a091a062	296	* - DISABLE: 'Stop' command will not effect on channel 1
igorsk	0:1063a091a062	297	* @param[in] channel2 State of this command on channel 2:
igorsk	0:1063a091a062	298	* - ENABLE: 'Stop' command will effect on channel 2
igorsk	0:1063a091a062	299	* - DISABLE: 'Stop' command will not effect on channel 2
igorsk	0:1063a091a062	300	* @return None
igorsk	0:1063a091a062	301	**********************************************************************/
igorsk	0:1063a091a062	302	void MCPWM_Stop(LPC_MCPWM_TypeDef *MCPWMx, uint32_t channel0,
igorsk	0:1063a091a062	303	uint32_t channel1, uint32_t channel2)
igorsk	0:1063a091a062	304	{
igorsk	0:1063a091a062	305	uint32_t regVal = 0;
igorsk	0:1063a091a062	306	regVal = (channel0 ? MCPWM_CON_RUN(0) : 0) \| (channel1 ? MCPWM_CON_RUN(1) : 0) \
igorsk	0:1063a091a062	307	\| (channel2 ? MCPWM_CON_RUN(2) : 0);
igorsk	0:1063a091a062	308	MCPWMx->MCCON_CLR = regVal;
igorsk	0:1063a091a062	309	}
igorsk	0:1063a091a062	310
igorsk	0:1063a091a062	311
igorsk	0:1063a091a062	312	/*******************************************************************//
igorsk	0:1063a091a062	313	* @brief Enables/Disables 3-phase AC motor mode on MCPWM peripheral
igorsk	0:1063a091a062	314	* @param[in] MCPWMx Motor Control PWM peripheral selected, should be MCPWM
igorsk	0:1063a091a062	315	* @param[in] acMode State of this command, should be:
igorsk	0:1063a091a062	316	* - ENABLE.
igorsk	0:1063a091a062	317	* - DISABLE.
igorsk	0:1063a091a062	318	* @return None
igorsk	0:1063a091a062	319	**********************************************************************/
igorsk	0:1063a091a062	320	void MCPWM_ACMode(LPC_MCPWM_TypeDef *MCPWMx, uint32_t acMode)
igorsk	0:1063a091a062	321	{
igorsk	0:1063a091a062	322	if (acMode){
igorsk	0:1063a091a062	323	MCPWMx->MCCON_SET = MCPWM_CON_ACMODE;
igorsk	0:1063a091a062	324	} else {
igorsk	0:1063a091a062	325	MCPWMx->MCCON_CLR = MCPWM_CON_ACMODE;
igorsk	0:1063a091a062	326	}
igorsk	0:1063a091a062	327	}
igorsk	0:1063a091a062	328
igorsk	0:1063a091a062	329
igorsk	0:1063a091a062	330	/*******************************************************************//
igorsk	0:1063a091a062	331	* @brief Enables/Disables 3-phase DC motor mode on MCPWM peripheral
igorsk	0:1063a091a062	332	* @param[in] MCPWMx Motor Control PWM peripheral selected, should be MCPWM
igorsk	0:1063a091a062	333	* @param[in] dcMode State of this command, should be:
igorsk	0:1063a091a062	334	* - ENABLE.
igorsk	0:1063a091a062	335	* - DISABLE.
igorsk	0:1063a091a062	336	* @param[in] outputInvered Polarity of the MCOB outputs for all 3 channels,
igorsk	0:1063a091a062	337	* should be:
igorsk	0:1063a091a062	338	* - ENABLE: The MCOB outputs have opposite polarity
igorsk	0:1063a091a062	339	* from the MCOA outputs.
igorsk	0:1063a091a062	340	* - DISABLE: The MCOB outputs have the same basic
igorsk	0:1063a091a062	341	* polarity as the MCOA outputs.
igorsk	0:1063a091a062	342	* @param[in] outputPattern A value contains bits that enables/disables the specified
igorsk	0:1063a091a062	343	* output pins route to the internal MCOA0 signal, should be:
igorsk	0:1063a091a062	344	- MCPWM_PATENT_A0: MCOA0 tracks internal MCOA0
igorsk	0:1063a091a062	345	- MCPWM_PATENT_B0: MCOB0 tracks internal MCOA0
igorsk	0:1063a091a062	346	- MCPWM_PATENT_A1: MCOA1 tracks internal MCOA0
igorsk	0:1063a091a062	347	- MCPWM_PATENT_B1: MCOB1 tracks internal MCOA0
igorsk	0:1063a091a062	348	- MCPWM_PATENT_A2: MCOA2 tracks internal MCOA0
igorsk	0:1063a091a062	349	- MCPWM_PATENT_B2: MCOB2 tracks internal MCOA0
igorsk	0:1063a091a062	350	* @return None
igorsk	0:1063a091a062	351	*
igorsk	0:1063a091a062	352	* Note: all these outputPatent values above can be ORed together for using as input parameter.
igorsk	0:1063a091a062	353	**********************************************************************/
igorsk	0:1063a091a062	354	void MCPWM_DCMode(LPC_MCPWM_TypeDef *MCPWMx, uint32_t dcMode,
igorsk	0:1063a091a062	355	uint32_t outputInvered, uint32_t outputPattern)
igorsk	0:1063a091a062	356	{
igorsk	0:1063a091a062	357	if (dcMode){
igorsk	0:1063a091a062	358	MCPWMx->MCCON_SET = MCPWM_CON_DCMODE;
igorsk	0:1063a091a062	359	} else {
igorsk	0:1063a091a062	360	MCPWMx->MCCON_CLR = MCPWM_CON_DCMODE;
igorsk	0:1063a091a062	361	}
igorsk	0:1063a091a062	362
igorsk	0:1063a091a062	363	if (outputInvered) {
igorsk	0:1063a091a062	364	MCPWMx->MCCON_SET = MCPWM_CON_INVBDC;
igorsk	0:1063a091a062	365	} else {
igorsk	0:1063a091a062	366	MCPWMx->MCCON_CLR = MCPWM_CON_INVBDC;
igorsk	0:1063a091a062	367	}
igorsk	0:1063a091a062	368
igorsk	0:1063a091a062	369	MCPWMx->MCCCP = outputPattern;
igorsk	0:1063a091a062	370	}
igorsk	0:1063a091a062	371
igorsk	0:1063a091a062	372
igorsk	0:1063a091a062	373	/*******************************************************************//
igorsk	0:1063a091a062	374	* @brief Configures the specified interrupt in MCPWM peripheral
igorsk	0:1063a091a062	375	* @param[in] MCPWMx Motor Control PWM peripheral selected, should be MCPWM
igorsk	0:1063a091a062	376	* @param[in] ulIntType Interrupt type, should be:
igorsk	0:1063a091a062	377	* - MCPWM_INTFLAG_LIM0: Limit interrupt for channel (0)
igorsk	0:1063a091a062	378	* - MCPWM_INTFLAG_MAT0: Match interrupt for channel (0)
igorsk	0:1063a091a062	379	* - MCPWM_INTFLAG_CAP0: Capture interrupt for channel (0)
igorsk	0:1063a091a062	380	* - MCPWM_INTFLAG_LIM1: Limit interrupt for channel (1)
igorsk	0:1063a091a062	381	* - MCPWM_INTFLAG_MAT1: Match interrupt for channel (1)
igorsk	0:1063a091a062	382	* - MCPWM_INTFLAG_CAP1: Capture interrupt for channel (1)
igorsk	0:1063a091a062	383	* - MCPWM_INTFLAG_LIM2: Limit interrupt for channel (2)
igorsk	0:1063a091a062	384	* - MCPWM_INTFLAG_MAT2: Match interrupt for channel (2)
igorsk	0:1063a091a062	385	* - MCPWM_INTFLAG_CAP2: Capture interrupt for channel (2)
igorsk	0:1063a091a062	386	* - MCPWM_INTFLAG_ABORT: Fast abort interrupt
igorsk	0:1063a091a062	387	* @param[in] NewState New State of this command, should be:
igorsk	0:1063a091a062	388	* - ENABLE.
igorsk	0:1063a091a062	389	* - DISABLE.
igorsk	0:1063a091a062	390	* @return None
igorsk	0:1063a091a062	391	*
igorsk	0:1063a091a062	392	* Note: all these ulIntType values above can be ORed together for using as input parameter.
igorsk	0:1063a091a062	393	**********************************************************************/
igorsk	0:1063a091a062	394	void MCPWM_IntConfig(LPC_MCPWM_TypeDef *MCPWMx, uint32_t ulIntType, FunctionalState NewState)
igorsk	0:1063a091a062	395	{
igorsk	0:1063a091a062	396	if (NewState) {
igorsk	0:1063a091a062	397	MCPWMx->MCINTEN_SET = ulIntType;
igorsk	0:1063a091a062	398	} else {
igorsk	0:1063a091a062	399	MCPWMx->MCINTEN_CLR = ulIntType;
igorsk	0:1063a091a062	400	}
igorsk	0:1063a091a062	401	}
igorsk	0:1063a091a062	402
igorsk	0:1063a091a062	403
igorsk	0:1063a091a062	404	/*******************************************************************//
igorsk	0:1063a091a062	405	* @brief Sets/Forces the specified interrupt for MCPWM peripheral
igorsk	0:1063a091a062	406	* @param[in] MCPWMx Motor Control PWM peripheral selected, should be MCPWM
igorsk	0:1063a091a062	407	* @param[in] ulIntType Interrupt type, should be:
igorsk	0:1063a091a062	408	* - MCPWM_INTFLAG_LIM0: Limit interrupt for channel (0)
igorsk	0:1063a091a062	409	* - MCPWM_INTFLAG_MAT0: Match interrupt for channel (0)
igorsk	0:1063a091a062	410	* - MCPWM_INTFLAG_CAP0: Capture interrupt for channel (0)
igorsk	0:1063a091a062	411	* - MCPWM_INTFLAG_LIM1: Limit interrupt for channel (1)
igorsk	0:1063a091a062	412	* - MCPWM_INTFLAG_MAT1: Match interrupt for channel (1)
igorsk	0:1063a091a062	413	* - MCPWM_INTFLAG_CAP1: Capture interrupt for channel (1)
igorsk	0:1063a091a062	414	* - MCPWM_INTFLAG_LIM2: Limit interrupt for channel (2)
igorsk	0:1063a091a062	415	* - MCPWM_INTFLAG_MAT2: Match interrupt for channel (2)
igorsk	0:1063a091a062	416	* - MCPWM_INTFLAG_CAP2: Capture interrupt for channel (2)
igorsk	0:1063a091a062	417	* - MCPWM_INTFLAG_ABORT: Fast abort interrupt
igorsk	0:1063a091a062	418	* @return None
igorsk	0:1063a091a062	419	* Note: all these ulIntType values above can be ORed together for using as input parameter.
igorsk	0:1063a091a062	420	**********************************************************************/
igorsk	0:1063a091a062	421	void MCPWM_IntSet(LPC_MCPWM_TypeDef *MCPWMx, uint32_t ulIntType)
igorsk	0:1063a091a062	422	{
igorsk	0:1063a091a062	423	MCPWMx->MCINTFLAG_SET = ulIntType;
igorsk	0:1063a091a062	424	}
igorsk	0:1063a091a062	425
igorsk	0:1063a091a062	426
igorsk	0:1063a091a062	427	/*******************************************************************//
igorsk	0:1063a091a062	428	* @brief Clear the specified interrupt pending for MCPWM peripheral
igorsk	0:1063a091a062	429	* @param[in] MCPWMx Motor Control PWM peripheral selected, should be MCPWM
igorsk	0:1063a091a062	430	* @param[in] ulIntType Interrupt type, should be:
igorsk	0:1063a091a062	431	* - MCPWM_INTFLAG_LIM0: Limit interrupt for channel (0)
igorsk	0:1063a091a062	432	* - MCPWM_INTFLAG_MAT0: Match interrupt for channel (0)
igorsk	0:1063a091a062	433	* - MCPWM_INTFLAG_CAP0: Capture interrupt for channel (0)
igorsk	0:1063a091a062	434	* - MCPWM_INTFLAG_LIM1: Limit interrupt for channel (1)
igorsk	0:1063a091a062	435	* - MCPWM_INTFLAG_MAT1: Match interrupt for channel (1)
igorsk	0:1063a091a062	436	* - MCPWM_INTFLAG_CAP1: Capture interrupt for channel (1)
igorsk	0:1063a091a062	437	* - MCPWM_INTFLAG_LIM2: Limit interrupt for channel (2)
igorsk	0:1063a091a062	438	* - MCPWM_INTFLAG_MAT2: Match interrupt for channel (2)
igorsk	0:1063a091a062	439	* - MCPWM_INTFLAG_CAP2: Capture interrupt for channel (2)
igorsk	0:1063a091a062	440	* - MCPWM_INTFLAG_ABORT: Fast abort interrupt
igorsk	0:1063a091a062	441	* @return None
igorsk	0:1063a091a062	442	* Note: all these ulIntType values above can be ORed together for using as input parameter.
igorsk	0:1063a091a062	443	**********************************************************************/
igorsk	0:1063a091a062	444	void MCPWM_IntClear(LPC_MCPWM_TypeDef *MCPWMx, uint32_t ulIntType)
igorsk	0:1063a091a062	445	{
igorsk	0:1063a091a062	446	MCPWMx->MCINTFLAG_CLR = ulIntType;
igorsk	0:1063a091a062	447	}
igorsk	0:1063a091a062	448
igorsk	0:1063a091a062	449
igorsk	0:1063a091a062	450	/*******************************************************************//
igorsk	0:1063a091a062	451	* @brief Check whether if the specified interrupt in MCPWM is set or not
igorsk	0:1063a091a062	452	* @param[in] MCPWMx Motor Control PWM peripheral selected, should be MCPWM
igorsk	0:1063a091a062	453	* @param[in] ulIntType Interrupt type, should be:
igorsk	0:1063a091a062	454	* - MCPWM_INTFLAG_LIM0: Limit interrupt for channel (0)
igorsk	0:1063a091a062	455	* - MCPWM_INTFLAG_MAT0: Match interrupt for channel (0)
igorsk	0:1063a091a062	456	* - MCPWM_INTFLAG_CAP0: Capture interrupt for channel (0)
igorsk	0:1063a091a062	457	* - MCPWM_INTFLAG_LIM1: Limit interrupt for channel (1)
igorsk	0:1063a091a062	458	* - MCPWM_INTFLAG_MAT1: Match interrupt for channel (1)
igorsk	0:1063a091a062	459	* - MCPWM_INTFLAG_CAP1: Capture interrupt for channel (1)
igorsk	0:1063a091a062	460	* - MCPWM_INTFLAG_LIM2: Limit interrupt for channel (2)
igorsk	0:1063a091a062	461	* - MCPWM_INTFLAG_MAT2: Match interrupt for channel (2)
igorsk	0:1063a091a062	462	* - MCPWM_INTFLAG_CAP2: Capture interrupt for channel (2)
igorsk	0:1063a091a062	463	* - MCPWM_INTFLAG_ABORT: Fast abort interrupt
igorsk	0:1063a091a062	464	* @return None
igorsk	0:1063a091a062	465	**********************************************************************/
igorsk	0:1063a091a062	466	FlagStatus MCPWM_GetIntStatus(LPC_MCPWM_TypeDef *MCPWMx, uint32_t ulIntType)
igorsk	0:1063a091a062	467	{
igorsk	0:1063a091a062	468	return ((MCPWMx->MCINTFLAG & ulIntType) ? SET : RESET);
igorsk	0:1063a091a062	469	}
igorsk	0:1063a091a062	470
igorsk	0:1063a091a062	471	/**
igorsk	0:1063a091a062	472	* @}
igorsk	0:1063a091a062	473	*/
igorsk	0:1063a091a062	474
igorsk	0:1063a091a062	475	#endif /* _MCPWM */
igorsk	0:1063a091a062	476
igorsk	0:1063a091a062	477	/**
igorsk	0:1063a091a062	478	* @}
igorsk	0:1063a091a062	479	*/
igorsk	0:1063a091a062	480
igorsk	0:1063a091a062	481	/* --------------------------------- End Of File ------------------------------ */

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Type:	Program
Mbed OS support:	Mbed 2 deprecated
Created:	17 Feb 2010
Imports:	121
Forks:	0
Commits:	1
Dependents:	0
Dependencies:	1
Followers:	5

source/lpc17xx_mcpwm.c@0:1063a091a062, 2010-02-17 (annotated)

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