Hugo Zijlmans / Mbed 2 deprecated BLDC

Dependencies:   mbed

RIT.c@2:f034e862af1f, 2010-12-02 (annotated)

Committer:
hugozijlmans
Date:
Thu Dec 02 20:55:45 2010 +0000
Revision:
2:f034e862af1f
Parent:
1:2c52307d223f 
Added UART0 support over USB mBed1768

Who changed what in which revision?

UserRevisionLine numberNew contents of line
hugozijlmans 1:2c52307d223f 1 #include "LPC17xx.h"
hugozijlmans 1:2c52307d223f 2 #include "core_cm3.h"
hugozijlmans 1:2c52307d223f 3 #include "cmsis_nvic.h"
hugozijlmans 1:2c52307d223f 4 #include "RIT.h"
hugozijlmans 1:2c52307d223f 5 #include "main.h"
hugozijlmans 1:2c52307d223f 6 #include "LPC1768.h"
hugozijlmans 1:2c52307d223f 7
hugozijlmans 1:2c52307d223f 8 void RIT_interrupt_enable(void) {
hugozijlmans 1:2c52307d223f 9
hugozijlmans 1:2c52307d223f 10 // Enable RIT interrupt
hugozijlmans 1:2c52307d223f 11 NVIC_EnableIRQ(RIT_IRQn);
hugozijlmans 1:2c52307d223f 12 }
hugozijlmans 1:2c52307d223f 13
hugozijlmans 1:2c52307d223f 14 void RIT_interrupt_disable(void) {
hugozijlmans 1:2c52307d223f 15
hugozijlmans 1:2c52307d223f 16 // Disable RIT interrupt
hugozijlmans 1:2c52307d223f 17 NVIC_DisableIRQ(RIT_IRQn);
hugozijlmans 1:2c52307d223f 18 }
hugozijlmans 1:2c52307d223f 19
hugozijlmans 1:2c52307d223f 20 void RIT_IRQHandler(void) {
hugozijlmans 1:2c52307d223f 21
hugozijlmans 1:2c52307d223f 22 // Determine the cause of the interrupt
hugozijlmans 1:2c52307d223f 23
hugozijlmans 1:2c52307d223f 24 // RIT interrupt occured
hugozijlmans 1:2c52307d223f 25 if((RICTRL & RITINT) == RITINT)
hugozijlmans 1:2c52307d223f 26 RICTRL |= RITINT;
hugozijlmans 1:2c52307d223f 27
hugozijlmans 1:2c52307d223f 28 // Clear the RIT interrupt
hugozijlmans 1:2c52307d223f 29 NVIC_ClearPendingIRQ(RIT_IRQn);
hugozijlmans 1:2c52307d223f 30
hugozijlmans 1:2c52307d223f 31 //Set RIT interrupt flag
hugozijlmans 1:2c52307d223f 32 i_flags.RIT_int = 1;
hugozijlmans 1:2c52307d223f 33 }
hugozijlmans 1:2c52307d223f 34
hugozijlmans 1:2c52307d223f 35 void RIT_init(void) {
hugozijlmans 1:2c52307d223f 36
hugozijlmans 1:2c52307d223f 37 // Set RIT interrupt priority
hugozijlmans 1:2c52307d223f 38 NVIC_SetPriority(RIT_IRQn, 11);
hugozijlmans 1:2c52307d223f 39
hugozijlmans 1:2c52307d223f 40 // Power the RIT
hugozijlmans 1:2c52307d223f 41 RIT_power_enable();
hugozijlmans 1:2c52307d223f 42
hugozijlmans 1:2c52307d223f 43 // Set the RIT compare value
hugozijlmans 1:2c52307d223f 44 RICOMPVAL = RIT_DIV;
hugozijlmans 1:2c52307d223f 45
hugozijlmans 1:2c52307d223f 46 // Select perhiperal clk
hugozijlmans 1:2c52307d223f 47 RIT_select_clk();
hugozijlmans 1:2c52307d223f 48
hugozijlmans 1:2c52307d223f 49 // Set counter clear after interrupt
hugozijlmans 1:2c52307d223f 50 RICTRL |= RITENCLR;
hugozijlmans 1:2c52307d223f 51
hugozijlmans 1:2c52307d223f 52 // Connect the RIT interrupt to the interrupt handler
hugozijlmans 1:2c52307d223f 53 NVIC_SetVector(RIT_IRQn, (uint32_t)&RIT_IRQHandler);
hugozijlmans 1:2c52307d223f 54
hugozijlmans 1:2c52307d223f 55 // Enable the RIT interrupt
hugozijlmans 1:2c52307d223f 56 RIT_interrupt_enable();
hugozijlmans 1:2c52307d223f 57
hugozijlmans 1:2c52307d223f 58 // Enable the RIT
hugozijlmans 1:2c52307d223f 59 RICTRL |= RITEN;
hugozijlmans 1:2c52307d223f 60 }
hugozijlmans 1:2c52307d223f 61
hugozijlmans 1:2c52307d223f 62 void RIT_power_enable(void) {
hugozijlmans 1:2c52307d223f 63
hugozijlmans 1:2c52307d223f 64 // Power the TRIT
hugozijlmans 1:2c52307d223f 65 PCONP |= PCRIT;
hugozijlmans 1:2c52307d223f 66
hugozijlmans 1:2c52307d223f 67 }
hugozijlmans 1:2c52307d223f 68
hugozijlmans 1:2c52307d223f 69 void RIT_power_disable(void) {
hugozijlmans 1:2c52307d223f 70
hugozijlmans 1:2c52307d223f 71 // Powerdown the RIT
hugozijlmans 1:2c52307d223f 72 PCONP &= ~(PCRIT);
hugozijlmans 1:2c52307d223f 73
hugozijlmans 1:2c52307d223f 74 }
hugozijlmans 1:2c52307d223f 75
hugozijlmans 1:2c52307d223f 76 void RIT_select_clk(void) {
hugozijlmans 1:2c52307d223f 77
hugozijlmans 1:2c52307d223f 78 // Including work-around described in errata.lpc1768.pdf R04
hugozijlmans 1:2c52307d223f 79
hugozijlmans 1:2c52307d223f 80 PLL0_disconnect();
hugozijlmans 1:2c52307d223f 81
hugozijlmans 1:2c52307d223f 82 PLL0_disable();
hugozijlmans 1:2c52307d223f 83
hugozijlmans 1:2c52307d223f 84 // Timer0 perhiperal clock select (01 = CCLK)
hugozijlmans 1:2c52307d223f 85 PCLKSEL1 &= ~(PCLK_RIT_1 | PCLK_RIT_0);
hugozijlmans 1:2c52307d223f 86 PCLKSEL1 |= PCLK_RIT_0;
hugozijlmans 1:2c52307d223f 87
hugozijlmans 1:2c52307d223f 88 PLL0_enable();
hugozijlmans 1:2c52307d223f 89
hugozijlmans 1:2c52307d223f 90 PLL0_connect();
hugozijlmans 1:2c52307d223f 91
hugozijlmans 1:2c52307d223f 92 }