SDFileSystem - Solar Cell Powered - Periodic logging of sensor d…

Users » gsundaresan3 » Code » SDFileSystem

Gopi Sundaresan / Mbed 2 deprecated SDFileSystem

Solar Cell Powered - Periodic logging of sensor data into SD card

EthernetPowerControl.cpp@0:248aa51eeb12, 2011-02-28 (annotated)

Committer:: gsundaresan3
Date:: Mon Feb 28 20:05:48 2011 +0000
Revision:: 0:248aa51eeb12

Who changed what in which revision?

User	Revision	Line number	New contents of line
gsundaresan3	0:248aa51eeb12	1	#include "EthernetPowerControl.h"
gsundaresan3	0:248aa51eeb12	2
gsundaresan3	0:248aa51eeb12	3	static void write_PHY (unsigned int PhyReg, unsigned short Value) {
gsundaresan3	0:248aa51eeb12	4	/* Write a data 'Value' to PHY register 'PhyReg'. */
gsundaresan3	0:248aa51eeb12	5	unsigned int tout;
gsundaresan3	0:248aa51eeb12	6	/* Hardware MII Management for LPC176x devices. */
gsundaresan3	0:248aa51eeb12	7	LPC_EMAC->MADR = DP83848C_DEF_ADR \| PhyReg;
gsundaresan3	0:248aa51eeb12	8	LPC_EMAC->MWTD = Value;
gsundaresan3	0:248aa51eeb12	9
gsundaresan3	0:248aa51eeb12	10	/* Wait utill operation completed */
gsundaresan3	0:248aa51eeb12	11	for (tout = 0; tout < MII_WR_TOUT; tout++) {
gsundaresan3	0:248aa51eeb12	12	if ((LPC_EMAC->MIND & MIND_BUSY) == 0) {
gsundaresan3	0:248aa51eeb12	13	break;
gsundaresan3	0:248aa51eeb12	14	}
gsundaresan3	0:248aa51eeb12	15	}
gsundaresan3	0:248aa51eeb12	16	}
gsundaresan3	0:248aa51eeb12	17
gsundaresan3	0:248aa51eeb12	18	static unsigned short read_PHY (unsigned int PhyReg) {
gsundaresan3	0:248aa51eeb12	19	/* Read a PHY register 'PhyReg'. */
gsundaresan3	0:248aa51eeb12	20	unsigned int tout, val;
gsundaresan3	0:248aa51eeb12	21
gsundaresan3	0:248aa51eeb12	22	LPC_EMAC->MADR = DP83848C_DEF_ADR \| PhyReg;
gsundaresan3	0:248aa51eeb12	23	LPC_EMAC->MCMD = MCMD_READ;
gsundaresan3	0:248aa51eeb12	24
gsundaresan3	0:248aa51eeb12	25	/* Wait until operation completed */
gsundaresan3	0:248aa51eeb12	26	for (tout = 0; tout < MII_RD_TOUT; tout++) {
gsundaresan3	0:248aa51eeb12	27	if ((LPC_EMAC->MIND & MIND_BUSY) == 0) {
gsundaresan3	0:248aa51eeb12	28	break;
gsundaresan3	0:248aa51eeb12	29	}
gsundaresan3	0:248aa51eeb12	30	}
gsundaresan3	0:248aa51eeb12	31	LPC_EMAC->MCMD = 0;
gsundaresan3	0:248aa51eeb12	32	val = LPC_EMAC->MRDD;
gsundaresan3	0:248aa51eeb12	33
gsundaresan3	0:248aa51eeb12	34	return (val);
gsundaresan3	0:248aa51eeb12	35	}
gsundaresan3	0:248aa51eeb12	36
gsundaresan3	0:248aa51eeb12	37	void EMAC_Init()
gsundaresan3	0:248aa51eeb12	38	{
gsundaresan3	0:248aa51eeb12	39	unsigned int tout,regv;
gsundaresan3	0:248aa51eeb12	40	/* Power Up the EMAC controller. */
gsundaresan3	0:248aa51eeb12	41	Peripheral_PowerUp(LPC1768_PCONP_PCENET);
gsundaresan3	0:248aa51eeb12	42
gsundaresan3	0:248aa51eeb12	43	LPC_PINCON->PINSEL2 = 0x50150105;
gsundaresan3	0:248aa51eeb12	44	LPC_PINCON->PINSEL3 &= ~0x0000000F;
gsundaresan3	0:248aa51eeb12	45	LPC_PINCON->PINSEL3 \|= 0x00000005;
gsundaresan3	0:248aa51eeb12	46
gsundaresan3	0:248aa51eeb12	47	/* Reset all EMAC internal modules. */
gsundaresan3	0:248aa51eeb12	48	LPC_EMAC->MAC1 = MAC1_RES_TX \| MAC1_RES_MCS_TX \| MAC1_RES_RX \| MAC1_RES_MCS_RX \|
gsundaresan3	0:248aa51eeb12	49	MAC1_SIM_RES \| MAC1_SOFT_RES;
gsundaresan3	0:248aa51eeb12	50	LPC_EMAC->Command = CR_REG_RES \| CR_TX_RES \| CR_RX_RES;
gsundaresan3	0:248aa51eeb12	51
gsundaresan3	0:248aa51eeb12	52	/* A short delay after reset. */
gsundaresan3	0:248aa51eeb12	53	for (tout = 100; tout; tout--);
gsundaresan3	0:248aa51eeb12	54
gsundaresan3	0:248aa51eeb12	55	/* Initialize MAC control registers. */
gsundaresan3	0:248aa51eeb12	56	LPC_EMAC->MAC1 = MAC1_PASS_ALL;
gsundaresan3	0:248aa51eeb12	57	LPC_EMAC->MAC2 = MAC2_CRC_EN \| MAC2_PAD_EN;
gsundaresan3	0:248aa51eeb12	58	LPC_EMAC->MAXF = ETH_MAX_FLEN;
gsundaresan3	0:248aa51eeb12	59	LPC_EMAC->CLRT = CLRT_DEF;
gsundaresan3	0:248aa51eeb12	60	LPC_EMAC->IPGR = IPGR_DEF;
gsundaresan3	0:248aa51eeb12	61
gsundaresan3	0:248aa51eeb12	62	/* Enable Reduced MII interface. */
gsundaresan3	0:248aa51eeb12	63	LPC_EMAC->Command = CR_RMII \| CR_PASS_RUNT_FRM;
gsundaresan3	0:248aa51eeb12	64
gsundaresan3	0:248aa51eeb12	65	/* Reset Reduced MII Logic. */
gsundaresan3	0:248aa51eeb12	66	LPC_EMAC->SUPP = SUPP_RES_RMII;
gsundaresan3	0:248aa51eeb12	67	for (tout = 100; tout; tout--);
gsundaresan3	0:248aa51eeb12	68	LPC_EMAC->SUPP = 0;
gsundaresan3	0:248aa51eeb12	69
gsundaresan3	0:248aa51eeb12	70	/* Put the DP83848C in reset mode */
gsundaresan3	0:248aa51eeb12	71	write_PHY (PHY_REG_BMCR, 0x8000);
gsundaresan3	0:248aa51eeb12	72
gsundaresan3	0:248aa51eeb12	73	/* Wait for hardware reset to end. */
gsundaresan3	0:248aa51eeb12	74	for (tout = 0; tout < 0x100000; tout++) {
gsundaresan3	0:248aa51eeb12	75	regv = read_PHY (PHY_REG_BMCR);
gsundaresan3	0:248aa51eeb12	76	if (!(regv & 0x8000)) {
gsundaresan3	0:248aa51eeb12	77	/* Reset complete */
gsundaresan3	0:248aa51eeb12	78	break;
gsundaresan3	0:248aa51eeb12	79	}
gsundaresan3	0:248aa51eeb12	80	}
gsundaresan3	0:248aa51eeb12	81	}
gsundaresan3	0:248aa51eeb12	82
gsundaresan3	0:248aa51eeb12	83
gsundaresan3	0:248aa51eeb12	84	void PHY_PowerDown()
gsundaresan3	0:248aa51eeb12	85	{
gsundaresan3	0:248aa51eeb12	86	if (!Peripheral_GetStatus(LPC1768_PCONP_PCENET))
gsundaresan3	0:248aa51eeb12	87	EMAC_Init(); //init EMAC if it is not already init'd
gsundaresan3	0:248aa51eeb12	88
gsundaresan3	0:248aa51eeb12	89	unsigned int regv;
gsundaresan3	0:248aa51eeb12	90	regv = read_PHY(PHY_REG_BMCR);
gsundaresan3	0:248aa51eeb12	91	write_PHY(PHY_REG_BMCR, regv \| (1 << PHY_REG_BMCR_POWERDOWN));
gsundaresan3	0:248aa51eeb12	92	regv = read_PHY(PHY_REG_BMCR);
gsundaresan3	0:248aa51eeb12	93
gsundaresan3	0:248aa51eeb12	94	//shouldn't need the EMAC now.
gsundaresan3	0:248aa51eeb12	95	Peripheral_PowerDown(LPC1768_PCONP_PCENET);
gsundaresan3	0:248aa51eeb12	96
gsundaresan3	0:248aa51eeb12	97	//and turn off the PHY OSC
gsundaresan3	0:248aa51eeb12	98	LPC_GPIO1->FIODIR \|= 0x8000000;
gsundaresan3	0:248aa51eeb12	99	LPC_GPIO1->FIOCLR = 0x8000000;
gsundaresan3	0:248aa51eeb12	100	}
gsundaresan3	0:248aa51eeb12	101
gsundaresan3	0:248aa51eeb12	102	void PHY_PowerUp()
gsundaresan3	0:248aa51eeb12	103	{
gsundaresan3	0:248aa51eeb12	104	if (!Peripheral_GetStatus(LPC1768_PCONP_PCENET))
gsundaresan3	0:248aa51eeb12	105	EMAC_Init(); //init EMAC if it is not already init'd
gsundaresan3	0:248aa51eeb12	106
gsundaresan3	0:248aa51eeb12	107	LPC_GPIO1->FIODIR \|= 0x8000000;
gsundaresan3	0:248aa51eeb12	108	LPC_GPIO1->FIOSET = 0x8000000;
gsundaresan3	0:248aa51eeb12	109
gsundaresan3	0:248aa51eeb12	110	//wait for osc to be stable
gsundaresan3	0:248aa51eeb12	111	wait_ms(200);
gsundaresan3	0:248aa51eeb12	112
gsundaresan3	0:248aa51eeb12	113	unsigned int regv;
gsundaresan3	0:248aa51eeb12	114	regv = read_PHY(PHY_REG_BMCR);
gsundaresan3	0:248aa51eeb12	115	write_PHY(PHY_REG_BMCR, regv & ~(1 << PHY_REG_BMCR_POWERDOWN));
gsundaresan3	0:248aa51eeb12	116	regv = read_PHY(PHY_REG_BMCR);
gsundaresan3	0:248aa51eeb12	117	}
gsundaresan3	0:248aa51eeb12	118
gsundaresan3	0:248aa51eeb12	119	void PHY_EnergyDetect_Enable()
gsundaresan3	0:248aa51eeb12	120	{
gsundaresan3	0:248aa51eeb12	121	if (!Peripheral_GetStatus(LPC1768_PCONP_PCENET))
gsundaresan3	0:248aa51eeb12	122	EMAC_Init(); //init EMAC if it is not already init'd
gsundaresan3	0:248aa51eeb12	123
gsundaresan3	0:248aa51eeb12	124	unsigned int regv;
gsundaresan3	0:248aa51eeb12	125	regv = read_PHY(PHY_REG_EDCR);
gsundaresan3	0:248aa51eeb12	126	write_PHY(PHY_REG_BMCR, regv \| (1 << PHY_REG_EDCR_ENABLE));
gsundaresan3	0:248aa51eeb12	127	regv = read_PHY(PHY_REG_EDCR);
gsundaresan3	0:248aa51eeb12	128	}
gsundaresan3	0:248aa51eeb12	129
gsundaresan3	0:248aa51eeb12	130	void PHY_EnergyDetect_Disable()
gsundaresan3	0:248aa51eeb12	131	{
gsundaresan3	0:248aa51eeb12	132	if (!Peripheral_GetStatus(LPC1768_PCONP_PCENET))
gsundaresan3	0:248aa51eeb12	133	EMAC_Init(); //init EMAC if it is not already init'd
gsundaresan3	0:248aa51eeb12	134	unsigned int regv;
gsundaresan3	0:248aa51eeb12	135	regv = read_PHY(PHY_REG_EDCR);
gsundaresan3	0:248aa51eeb12	136	write_PHY(PHY_REG_BMCR, regv & ~(1 << PHY_REG_EDCR_ENABLE));
gsundaresan3	0:248aa51eeb12	137	regv = read_PHY(PHY_REG_EDCR);
gsundaresan3	0:248aa51eeb12	138	}

Repository toolbox

Export to desktop IDE

Build repository

Repository details

Type:	Program
Mbed OS support:	Mbed 2 deprecated
Created:	28 Feb 2011
Imports:	63
Forks:	0
Commits:	1
Dependents:	0
Dependencies:	1
Followers:	2

EthernetPowerControl.cpp@0:248aa51eeb12, 2011-02-28 (annotated)

Who changed what in which revision?

Repository toolbox

Repository details

Important Information for this Arm website

Access Warning