Frank 26080115
Date: March 20, 2011 This library is created from "LPC17xx CMSIS-Compliant Standard Peripheral Firmware Driver Library (GNU, Keil, IAR) (Jan 28, 2011)", available from NXP's website, under "All microcontrollers support documents" [[http://ics.nxp.com/support/documents/microcontrollers/?type=software]] You will need to follow [[/projects/libraries/svn/mbed/trunk/LPC1768/LPC17xx.h]] while using this library Examples provided here [[/users/frank26080115/programs/LPC1700CMSIS_Examples/]] The beautiful thing is that NXP does not place copyright protection on any of the files in here Only a few modifications are made to make it compile with the mbed online compiler, I fixed some warnings as well. This is untested as of March 20, 2011 Forum post about this library: [[/forum/mbed/topic/2030/]]
lpc17xx_adc.h@0:84d7747641aa, 2011-03-20 (annotated)
- Committer:
- frank26080115
- Date:
- Sun Mar 20 18:45:15 2011 +0000
- Revision:
- 0:84d7747641aa
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| frank26080115 | 0:84d7747641aa | 1 | /***********************************************************************//** |
| frank26080115 | 0:84d7747641aa | 2 | * @file lpc17xx_adc.h |
| frank26080115 | 0:84d7747641aa | 3 | * @brief Contains all macro definitions and function prototypes |
| frank26080115 | 0:84d7747641aa | 4 | * support for ADC firmware library on LPC17xx |
| frank26080115 | 0:84d7747641aa | 5 | * @version 3.0 |
| frank26080115 | 0:84d7747641aa | 6 | * @date 18. June. 2010 |
| frank26080115 | 0:84d7747641aa | 7 | * @author NXP MCU SW Application Team |
| frank26080115 | 0:84d7747641aa | 8 | ************************************************************************** |
| frank26080115 | 0:84d7747641aa | 9 | * Software that is described herein is for illustrative purposes only |
| frank26080115 | 0:84d7747641aa | 10 | * which provides customers with programming information regarding the |
| frank26080115 | 0:84d7747641aa | 11 | * products. This software is supplied "AS IS" without any warranties. |
| frank26080115 | 0:84d7747641aa | 12 | * NXP Semiconductors assumes no responsibility or liability for the |
| frank26080115 | 0:84d7747641aa | 13 | * use of the software, conveys no license or title under any patent, |
| frank26080115 | 0:84d7747641aa | 14 | * copyright, or mask work right to the product. NXP Semiconductors |
| frank26080115 | 0:84d7747641aa | 15 | * reserves the right to make changes in the software without |
| frank26080115 | 0:84d7747641aa | 16 | * notification. NXP Semiconductors also make no representation or |
| frank26080115 | 0:84d7747641aa | 17 | * warranty that such application will be suitable for the specified |
| frank26080115 | 0:84d7747641aa | 18 | * use without further testing or modification. |
| frank26080115 | 0:84d7747641aa | 19 | **************************************************************************/ |
| frank26080115 | 0:84d7747641aa | 20 | |
| frank26080115 | 0:84d7747641aa | 21 | /* Peripheral group ----------------------------------------------------------- */ |
| frank26080115 | 0:84d7747641aa | 22 | /** @defgroup ADC ADC |
| frank26080115 | 0:84d7747641aa | 23 | * @ingroup LPC1700CMSIS_FwLib_Drivers |
| frank26080115 | 0:84d7747641aa | 24 | * @{ |
| frank26080115 | 0:84d7747641aa | 25 | */ |
| frank26080115 | 0:84d7747641aa | 26 | |
| frank26080115 | 0:84d7747641aa | 27 | #ifndef LPC17XX_ADC_H_ |
| frank26080115 | 0:84d7747641aa | 28 | #define LPC17XX_ADC_H_ |
| frank26080115 | 0:84d7747641aa | 29 | |
| frank26080115 | 0:84d7747641aa | 30 | /* Includes ------------------------------------------------------------------- */ |
| frank26080115 | 0:84d7747641aa | 31 | #include <LPC17xx.h> |
| frank26080115 | 0:84d7747641aa | 32 | #include "lpc_types.h" |
| frank26080115 | 0:84d7747641aa | 33 | |
| frank26080115 | 0:84d7747641aa | 34 | |
| frank26080115 | 0:84d7747641aa | 35 | #ifdef __cplusplus |
| frank26080115 | 0:84d7747641aa | 36 | extern "C" |
| frank26080115 | 0:84d7747641aa | 37 | { |
| frank26080115 | 0:84d7747641aa | 38 | #endif |
| frank26080115 | 0:84d7747641aa | 39 | |
| frank26080115 | 0:84d7747641aa | 40 | /* Private macros ------------------------------------------------------------- */ |
| frank26080115 | 0:84d7747641aa | 41 | /** @defgroup ADC_Private_Macros ADC Private Macros |
| frank26080115 | 0:84d7747641aa | 42 | * @{ |
| frank26080115 | 0:84d7747641aa | 43 | */ |
| frank26080115 | 0:84d7747641aa | 44 | |
| frank26080115 | 0:84d7747641aa | 45 | /* -------------------------- BIT DEFINITIONS ----------------------------------- */ |
| frank26080115 | 0:84d7747641aa | 46 | /*********************************************************************//** |
| frank26080115 | 0:84d7747641aa | 47 | * Macro defines for ADC control register |
| frank26080115 | 0:84d7747641aa | 48 | **********************************************************************/ |
| frank26080115 | 0:84d7747641aa | 49 | /** Selects which of the AD0.0:7 pins is (are) to be sampled and converted */ |
| frank26080115 | 0:84d7747641aa | 50 | #define ADC_CR_CH_SEL(n) ((1UL << n)) |
| frank26080115 | 0:84d7747641aa | 51 | /** The APB clock (PCLK) is divided by (this value plus one) |
| frank26080115 | 0:84d7747641aa | 52 | * to produce the clock for the A/D */ |
| frank26080115 | 0:84d7747641aa | 53 | #define ADC_CR_CLKDIV(n) ((n<<8)) |
| frank26080115 | 0:84d7747641aa | 54 | /** Repeated conversions A/D enable bit */ |
| frank26080115 | 0:84d7747641aa | 55 | #define ADC_CR_BURST ((1UL<<16)) |
| frank26080115 | 0:84d7747641aa | 56 | /** ADC convert in power down mode */ |
| frank26080115 | 0:84d7747641aa | 57 | #define ADC_CR_PDN ((1UL<<21)) |
| frank26080115 | 0:84d7747641aa | 58 | /** Start mask bits */ |
| frank26080115 | 0:84d7747641aa | 59 | #define ADC_CR_START_MASK ((7UL<<24)) |
| frank26080115 | 0:84d7747641aa | 60 | /** Select Start Mode */ |
| frank26080115 | 0:84d7747641aa | 61 | #define ADC_CR_START_MODE_SEL(SEL) ((SEL<<24)) |
| frank26080115 | 0:84d7747641aa | 62 | /** Start conversion now */ |
| frank26080115 | 0:84d7747641aa | 63 | #define ADC_CR_START_NOW ((1UL<<24)) |
| frank26080115 | 0:84d7747641aa | 64 | /** Start conversion when the edge selected by bit 27 occurs on P2.10/EINT0 */ |
| frank26080115 | 0:84d7747641aa | 65 | #define ADC_CR_START_EINT0 ((2UL<<24)) |
| frank26080115 | 0:84d7747641aa | 66 | /** Start conversion when the edge selected by bit 27 occurs on P1.27/CAP0.1 */ |
| frank26080115 | 0:84d7747641aa | 67 | #define ADC_CR_START_CAP01 ((3UL<<24)) |
| frank26080115 | 0:84d7747641aa | 68 | /** Start conversion when the edge selected by bit 27 occurs on MAT0.1 */ |
| frank26080115 | 0:84d7747641aa | 69 | #define ADC_CR_START_MAT01 ((4UL<<24)) |
| frank26080115 | 0:84d7747641aa | 70 | /** Start conversion when the edge selected by bit 27 occurs on MAT0.3 */ |
| frank26080115 | 0:84d7747641aa | 71 | #define ADC_CR_START_MAT03 ((5UL<<24)) |
| frank26080115 | 0:84d7747641aa | 72 | /** Start conversion when the edge selected by bit 27 occurs on MAT1.0 */ |
| frank26080115 | 0:84d7747641aa | 73 | #define ADC_CR_START_MAT10 ((6UL<<24)) |
| frank26080115 | 0:84d7747641aa | 74 | /** Start conversion when the edge selected by bit 27 occurs on MAT1.1 */ |
| frank26080115 | 0:84d7747641aa | 75 | #define ADC_CR_START_MAT11 ((7UL<<24)) |
| frank26080115 | 0:84d7747641aa | 76 | /** Start conversion on a falling edge on the selected CAP/MAT signal */ |
| frank26080115 | 0:84d7747641aa | 77 | #define ADC_CR_EDGE ((1UL<<27)) |
| frank26080115 | 0:84d7747641aa | 78 | |
| frank26080115 | 0:84d7747641aa | 79 | /*********************************************************************//** |
| frank26080115 | 0:84d7747641aa | 80 | * Macro defines for ADC Global Data register |
| frank26080115 | 0:84d7747641aa | 81 | **********************************************************************/ |
| frank26080115 | 0:84d7747641aa | 82 | /** When DONE is 1, this field contains result value of ADC conversion */ |
| frank26080115 | 0:84d7747641aa | 83 | #define ADC_GDR_RESULT(n) (((n>>4)&0xFFF)) |
| frank26080115 | 0:84d7747641aa | 84 | /** These bits contain the channel from which the LS bits were converted */ |
| frank26080115 | 0:84d7747641aa | 85 | #define ADC_GDR_CH(n) (((n>>24)&0x7)) |
| frank26080115 | 0:84d7747641aa | 86 | /** This bit is 1 in burst mode if the results of one or |
| frank26080115 | 0:84d7747641aa | 87 | * more conversions was (were) lost */ |
| frank26080115 | 0:84d7747641aa | 88 | #define ADC_GDR_OVERRUN_FLAG ((1UL<<30)) |
| frank26080115 | 0:84d7747641aa | 89 | /** This bit is set to 1 when an A/D conversion completes */ |
| frank26080115 | 0:84d7747641aa | 90 | #define ADC_GDR_DONE_FLAG ((1UL<<31)) |
| frank26080115 | 0:84d7747641aa | 91 | |
| frank26080115 | 0:84d7747641aa | 92 | /** This bits is used to mask for Channel */ |
| frank26080115 | 0:84d7747641aa | 93 | #define ADC_GDR_CH_MASK ((7UL<<24)) |
| frank26080115 | 0:84d7747641aa | 94 | /*********************************************************************//** |
| frank26080115 | 0:84d7747641aa | 95 | * Macro defines for ADC Interrupt register |
| frank26080115 | 0:84d7747641aa | 96 | **********************************************************************/ |
| frank26080115 | 0:84d7747641aa | 97 | /** These bits allow control over which A/D channels generate |
| frank26080115 | 0:84d7747641aa | 98 | * interrupts for conversion completion */ |
| frank26080115 | 0:84d7747641aa | 99 | #define ADC_INTEN_CH(n) ((1UL<<n)) |
| frank26080115 | 0:84d7747641aa | 100 | /** When 1, enables the global DONE flag in ADDR to generate an interrupt */ |
| frank26080115 | 0:84d7747641aa | 101 | #define ADC_INTEN_GLOBAL ((1UL<<8)) |
| frank26080115 | 0:84d7747641aa | 102 | |
| frank26080115 | 0:84d7747641aa | 103 | /*********************************************************************//** |
| frank26080115 | 0:84d7747641aa | 104 | * Macro defines for ADC Data register |
| frank26080115 | 0:84d7747641aa | 105 | **********************************************************************/ |
| frank26080115 | 0:84d7747641aa | 106 | /** When DONE is 1, this field contains result value of ADC conversion */ |
| frank26080115 | 0:84d7747641aa | 107 | #define ADC_DR_RESULT(n) (((n>>4)&0xFFF)) |
| frank26080115 | 0:84d7747641aa | 108 | /** These bits mirror the OVERRRUN status flags that appear in the |
| frank26080115 | 0:84d7747641aa | 109 | * result register for each A/D channel */ |
| frank26080115 | 0:84d7747641aa | 110 | #define ADC_DR_OVERRUN_FLAG ((1UL<<30)) |
| frank26080115 | 0:84d7747641aa | 111 | /** This bit is set to 1 when an A/D conversion completes. It is cleared |
| frank26080115 | 0:84d7747641aa | 112 | * when this register is read */ |
| frank26080115 | 0:84d7747641aa | 113 | #define ADC_DR_DONE_FLAG ((1UL<<31)) |
| frank26080115 | 0:84d7747641aa | 114 | |
| frank26080115 | 0:84d7747641aa | 115 | /*********************************************************************//** |
| frank26080115 | 0:84d7747641aa | 116 | * Macro defines for ADC Status register |
| frank26080115 | 0:84d7747641aa | 117 | **********************************************************************/ |
| frank26080115 | 0:84d7747641aa | 118 | /** These bits mirror the DONE status flags that appear in the result |
| frank26080115 | 0:84d7747641aa | 119 | * register for each A/D channel */ |
| frank26080115 | 0:84d7747641aa | 120 | #define ADC_STAT_CH_DONE_FLAG(n) ((n&0xFF)) |
| frank26080115 | 0:84d7747641aa | 121 | /** These bits mirror the OVERRRUN status flags that appear in the |
| frank26080115 | 0:84d7747641aa | 122 | * result register for each A/D channel */ |
| frank26080115 | 0:84d7747641aa | 123 | #define ADC_STAT_CH_OVERRUN_FLAG(n) (((n>>8)&0xFF)) |
| frank26080115 | 0:84d7747641aa | 124 | /** This bit is the A/D interrupt flag */ |
| frank26080115 | 0:84d7747641aa | 125 | #define ADC_STAT_INT_FLAG ((1UL<<16)) |
| frank26080115 | 0:84d7747641aa | 126 | |
| frank26080115 | 0:84d7747641aa | 127 | /*********************************************************************//** |
| frank26080115 | 0:84d7747641aa | 128 | * Macro defines for ADC Trim register |
| frank26080115 | 0:84d7747641aa | 129 | **********************************************************************/ |
| frank26080115 | 0:84d7747641aa | 130 | /** Offset trim bits for ADC operation */ |
| frank26080115 | 0:84d7747641aa | 131 | #define ADC_ADCOFFS(n) (((n&0xF)<<4)) |
| frank26080115 | 0:84d7747641aa | 132 | /** Written to boot code*/ |
| frank26080115 | 0:84d7747641aa | 133 | #define ADC_TRIM(n) (((n&0xF)<<8)) |
| frank26080115 | 0:84d7747641aa | 134 | |
| frank26080115 | 0:84d7747641aa | 135 | /* ------------------- CHECK PARAM DEFINITIONS ------------------------- */ |
| frank26080115 | 0:84d7747641aa | 136 | /** Check ADC parameter */ |
| frank26080115 | 0:84d7747641aa | 137 | #define PARAM_ADCx(n) (((uint32_t *)n)==((uint32_t *)LPC_ADC)) |
| frank26080115 | 0:84d7747641aa | 138 | |
| frank26080115 | 0:84d7747641aa | 139 | /** Check ADC state parameter */ |
| frank26080115 | 0:84d7747641aa | 140 | #define PARAM_ADC_START_ON_EDGE_OPT(OPT) ((OPT == ADC_START_ON_RISING)||(OPT == ADC_START_ON_FALLING)) |
| frank26080115 | 0:84d7747641aa | 141 | |
| frank26080115 | 0:84d7747641aa | 142 | /** Check ADC state parameter */ |
| frank26080115 | 0:84d7747641aa | 143 | #define PARAM_ADC_DATA_STATUS(OPT) ((OPT== ADC_DATA_BURST)||(OPT== ADC_DATA_DONE)) |
| frank26080115 | 0:84d7747641aa | 144 | |
| frank26080115 | 0:84d7747641aa | 145 | /** Check ADC rate parameter */ |
| frank26080115 | 0:84d7747641aa | 146 | #define PARAM_ADC_RATE(rate) ((rate>0)&&(rate<=200000)) |
| frank26080115 | 0:84d7747641aa | 147 | |
| frank26080115 | 0:84d7747641aa | 148 | /** Check ADC channel selection parameter */ |
| frank26080115 | 0:84d7747641aa | 149 | #define PARAM_ADC_CHANNEL_SELECTION(SEL) ((SEL == ADC_CHANNEL_0)||(ADC_CHANNEL_1)\ |
| frank26080115 | 0:84d7747641aa | 150 | ||(SEL == ADC_CHANNEL_2)|(ADC_CHANNEL_3)\ |
| frank26080115 | 0:84d7747641aa | 151 | ||(SEL == ADC_CHANNEL_4)||(ADC_CHANNEL_5)\ |
| frank26080115 | 0:84d7747641aa | 152 | ||(SEL == ADC_CHANNEL_6)||(ADC_CHANNEL_7)) |
| frank26080115 | 0:84d7747641aa | 153 | |
| frank26080115 | 0:84d7747641aa | 154 | /** Check ADC start option parameter */ |
| frank26080115 | 0:84d7747641aa | 155 | #define PARAM_ADC_START_OPT(OPT) ((OPT == ADC_START_CONTINUOUS)||(OPT == ADC_START_NOW)\ |
| frank26080115 | 0:84d7747641aa | 156 | ||(OPT == ADC_START_ON_EINT0)||(OPT == ADC_START_ON_CAP01)\ |
| frank26080115 | 0:84d7747641aa | 157 | ||(OPT == ADC_START_ON_MAT01)||(OPT == ADC_START_ON_MAT03)\ |
| frank26080115 | 0:84d7747641aa | 158 | ||(OPT == ADC_START_ON_MAT10)||(OPT == ADC_START_ON_MAT11)) |
| frank26080115 | 0:84d7747641aa | 159 | |
| frank26080115 | 0:84d7747641aa | 160 | /** Check ADC interrupt type parameter */ |
| frank26080115 | 0:84d7747641aa | 161 | #define PARAM_ADC_TYPE_INT_OPT(OPT) ((OPT == ADC_ADINTEN0)||(OPT == ADC_ADINTEN1)\ |
| frank26080115 | 0:84d7747641aa | 162 | ||(OPT == ADC_ADINTEN2)||(OPT == ADC_ADINTEN3)\ |
| frank26080115 | 0:84d7747641aa | 163 | ||(OPT == ADC_ADINTEN4)||(OPT == ADC_ADINTEN5)\ |
| frank26080115 | 0:84d7747641aa | 164 | ||(OPT == ADC_ADINTEN6)||(OPT == ADC_ADINTEN7)\ |
| frank26080115 | 0:84d7747641aa | 165 | ||(OPT == ADC_ADGINTEN)) |
| frank26080115 | 0:84d7747641aa | 166 | |
| frank26080115 | 0:84d7747641aa | 167 | /** |
| frank26080115 | 0:84d7747641aa | 168 | * @} |
| frank26080115 | 0:84d7747641aa | 169 | */ |
| frank26080115 | 0:84d7747641aa | 170 | |
| frank26080115 | 0:84d7747641aa | 171 | |
| frank26080115 | 0:84d7747641aa | 172 | /* Public Types --------------------------------------------------------------- */ |
| frank26080115 | 0:84d7747641aa | 173 | /** @defgroup ADC_Public_Types ADC Public Types |
| frank26080115 | 0:84d7747641aa | 174 | * @{ |
| frank26080115 | 0:84d7747641aa | 175 | */ |
| frank26080115 | 0:84d7747641aa | 176 | |
| frank26080115 | 0:84d7747641aa | 177 | /*********************************************************************//** |
| frank26080115 | 0:84d7747641aa | 178 | * @brief ADC enumeration |
| frank26080115 | 0:84d7747641aa | 179 | **********************************************************************/ |
| frank26080115 | 0:84d7747641aa | 180 | /** @brief Channel Selection */ |
| frank26080115 | 0:84d7747641aa | 181 | typedef enum |
| frank26080115 | 0:84d7747641aa | 182 | { |
| frank26080115 | 0:84d7747641aa | 183 | ADC_CHANNEL_0 = 0, /*!< Channel 0 */ |
| frank26080115 | 0:84d7747641aa | 184 | ADC_CHANNEL_1, /*!< Channel 1 */ |
| frank26080115 | 0:84d7747641aa | 185 | ADC_CHANNEL_2, /*!< Channel 2 */ |
| frank26080115 | 0:84d7747641aa | 186 | ADC_CHANNEL_3, /*!< Channel 3 */ |
| frank26080115 | 0:84d7747641aa | 187 | ADC_CHANNEL_4, /*!< Channel 4 */ |
| frank26080115 | 0:84d7747641aa | 188 | ADC_CHANNEL_5, /*!< Channel 5 */ |
| frank26080115 | 0:84d7747641aa | 189 | ADC_CHANNEL_6, /*!< Channel 6 */ |
| frank26080115 | 0:84d7747641aa | 190 | ADC_CHANNEL_7 /*!< Channel 7 */ |
| frank26080115 | 0:84d7747641aa | 191 | }ADC_CHANNEL_SELECTION; |
| frank26080115 | 0:84d7747641aa | 192 | |
| frank26080115 | 0:84d7747641aa | 193 | /** @brief Type of start option */ |
| frank26080115 | 0:84d7747641aa | 194 | typedef enum |
| frank26080115 | 0:84d7747641aa | 195 | { |
| frank26080115 | 0:84d7747641aa | 196 | ADC_START_CONTINUOUS =0, /*!< Continuous mode */ |
| frank26080115 | 0:84d7747641aa | 197 | ADC_START_NOW, /*!< Start conversion now */ |
| frank26080115 | 0:84d7747641aa | 198 | ADC_START_ON_EINT0, /*!< Start conversion when the edge selected |
| frank26080115 | 0:84d7747641aa | 199 | * by bit 27 occurs on P2.10/EINT0 */ |
| frank26080115 | 0:84d7747641aa | 200 | ADC_START_ON_CAP01, /*!< Start conversion when the edge selected |
| frank26080115 | 0:84d7747641aa | 201 | * by bit 27 occurs on P1.27/CAP0.1 */ |
| frank26080115 | 0:84d7747641aa | 202 | ADC_START_ON_MAT01, /*!< Start conversion when the edge selected |
| frank26080115 | 0:84d7747641aa | 203 | * by bit 27 occurs on MAT0.1 */ |
| frank26080115 | 0:84d7747641aa | 204 | ADC_START_ON_MAT03, /*!< Start conversion when the edge selected |
| frank26080115 | 0:84d7747641aa | 205 | * by bit 27 occurs on MAT0.3 */ |
| frank26080115 | 0:84d7747641aa | 206 | ADC_START_ON_MAT10, /*!< Start conversion when the edge selected |
| frank26080115 | 0:84d7747641aa | 207 | * by bit 27 occurs on MAT1.0 */ |
| frank26080115 | 0:84d7747641aa | 208 | ADC_START_ON_MAT11 /*!< Start conversion when the edge selected |
| frank26080115 | 0:84d7747641aa | 209 | * by bit 27 occurs on MAT1.1 */ |
| frank26080115 | 0:84d7747641aa | 210 | } ADC_START_OPT; |
| frank26080115 | 0:84d7747641aa | 211 | |
| frank26080115 | 0:84d7747641aa | 212 | |
| frank26080115 | 0:84d7747641aa | 213 | /** @brief Type of edge when start conversion on the selected CAP/MAT signal */ |
| frank26080115 | 0:84d7747641aa | 214 | typedef enum |
| frank26080115 | 0:84d7747641aa | 215 | { |
| frank26080115 | 0:84d7747641aa | 216 | ADC_START_ON_RISING = 0, /*!< Start conversion on a rising edge |
| frank26080115 | 0:84d7747641aa | 217 | *on the selected CAP/MAT signal */ |
| frank26080115 | 0:84d7747641aa | 218 | ADC_START_ON_FALLING /*!< Start conversion on a falling edge |
| frank26080115 | 0:84d7747641aa | 219 | *on the selected CAP/MAT signal */ |
| frank26080115 | 0:84d7747641aa | 220 | } ADC_START_ON_EDGE_OPT; |
| frank26080115 | 0:84d7747641aa | 221 | |
| frank26080115 | 0:84d7747641aa | 222 | /** @brief* ADC type interrupt enum */ |
| frank26080115 | 0:84d7747641aa | 223 | typedef enum |
| frank26080115 | 0:84d7747641aa | 224 | { |
| frank26080115 | 0:84d7747641aa | 225 | ADC_ADINTEN0 = 0, /*!< Interrupt channel 0 */ |
| frank26080115 | 0:84d7747641aa | 226 | ADC_ADINTEN1, /*!< Interrupt channel 1 */ |
| frank26080115 | 0:84d7747641aa | 227 | ADC_ADINTEN2, /*!< Interrupt channel 2 */ |
| frank26080115 | 0:84d7747641aa | 228 | ADC_ADINTEN3, /*!< Interrupt channel 3 */ |
| frank26080115 | 0:84d7747641aa | 229 | ADC_ADINTEN4, /*!< Interrupt channel 4 */ |
| frank26080115 | 0:84d7747641aa | 230 | ADC_ADINTEN5, /*!< Interrupt channel 5 */ |
| frank26080115 | 0:84d7747641aa | 231 | ADC_ADINTEN6, /*!< Interrupt channel 6 */ |
| frank26080115 | 0:84d7747641aa | 232 | ADC_ADINTEN7, /*!< Interrupt channel 7 */ |
| frank26080115 | 0:84d7747641aa | 233 | ADC_ADGINTEN /*!< Individual channel/global flag done generate an interrupt */ |
| frank26080115 | 0:84d7747641aa | 234 | }ADC_TYPE_INT_OPT; |
| frank26080115 | 0:84d7747641aa | 235 | |
| frank26080115 | 0:84d7747641aa | 236 | /** @brief ADC Data status */ |
| frank26080115 | 0:84d7747641aa | 237 | typedef enum |
| frank26080115 | 0:84d7747641aa | 238 | { |
| frank26080115 | 0:84d7747641aa | 239 | ADC_DATA_BURST = 0, /*Burst bit*/ |
| frank26080115 | 0:84d7747641aa | 240 | ADC_DATA_DONE /*Done bit*/ |
| frank26080115 | 0:84d7747641aa | 241 | }ADC_DATA_STATUS; |
| frank26080115 | 0:84d7747641aa | 242 | |
| frank26080115 | 0:84d7747641aa | 243 | /** |
| frank26080115 | 0:84d7747641aa | 244 | * @} |
| frank26080115 | 0:84d7747641aa | 245 | */ |
| frank26080115 | 0:84d7747641aa | 246 | |
| frank26080115 | 0:84d7747641aa | 247 | |
| frank26080115 | 0:84d7747641aa | 248 | /* Public Functions ----------------------------------------------------------- */ |
| frank26080115 | 0:84d7747641aa | 249 | /** @defgroup ADC_Public_Functions ADC Public Functions |
| frank26080115 | 0:84d7747641aa | 250 | * @{ |
| frank26080115 | 0:84d7747641aa | 251 | */ |
| frank26080115 | 0:84d7747641aa | 252 | /* Init/DeInit ADC peripheral ----------------*/ |
| frank26080115 | 0:84d7747641aa | 253 | void ADC_Init(LPC_ADC_TypeDef *ADCx, uint32_t rate); |
| frank26080115 | 0:84d7747641aa | 254 | void ADC_DeInit(LPC_ADC_TypeDef *ADCx); |
| frank26080115 | 0:84d7747641aa | 255 | |
| frank26080115 | 0:84d7747641aa | 256 | /* Enable/Disable ADC functions --------------*/ |
| frank26080115 | 0:84d7747641aa | 257 | void ADC_BurstCmd(LPC_ADC_TypeDef *ADCx, FunctionalState NewState); |
| frank26080115 | 0:84d7747641aa | 258 | void ADC_PowerdownCmd(LPC_ADC_TypeDef *ADCx, FunctionalState NewState); |
| frank26080115 | 0:84d7747641aa | 259 | void ADC_StartCmd(LPC_ADC_TypeDef *ADCx, uint8_t start_mode); |
| frank26080115 | 0:84d7747641aa | 260 | void ADC_ChannelCmd (LPC_ADC_TypeDef *ADCx, uint8_t Channel, FunctionalState NewState); |
| frank26080115 | 0:84d7747641aa | 261 | |
| frank26080115 | 0:84d7747641aa | 262 | /* Configure ADC functions -------------------*/ |
| frank26080115 | 0:84d7747641aa | 263 | void ADC_EdgeStartConfig(LPC_ADC_TypeDef *ADCx, uint8_t EdgeOption); |
| frank26080115 | 0:84d7747641aa | 264 | void ADC_IntConfig (LPC_ADC_TypeDef *ADCx, ADC_TYPE_INT_OPT IntType, FunctionalState NewState); |
| frank26080115 | 0:84d7747641aa | 265 | |
| frank26080115 | 0:84d7747641aa | 266 | /* Get ADC information functions -------------------*/ |
| frank26080115 | 0:84d7747641aa | 267 | uint16_t ADC_ChannelGetData(LPC_ADC_TypeDef *ADCx, uint8_t channel); |
| frank26080115 | 0:84d7747641aa | 268 | FlagStatus ADC_ChannelGetStatus(LPC_ADC_TypeDef *ADCx, uint8_t channel, uint32_t StatusType); |
| frank26080115 | 0:84d7747641aa | 269 | uint32_t ADC_GlobalGetData(LPC_ADC_TypeDef *ADCx); |
| frank26080115 | 0:84d7747641aa | 270 | FlagStatus ADC_GlobalGetStatus(LPC_ADC_TypeDef *ADCx, uint32_t StatusType); |
| frank26080115 | 0:84d7747641aa | 271 | |
| frank26080115 | 0:84d7747641aa | 272 | /** |
| frank26080115 | 0:84d7747641aa | 273 | * @} |
| frank26080115 | 0:84d7747641aa | 274 | */ |
| frank26080115 | 0:84d7747641aa | 275 | |
| frank26080115 | 0:84d7747641aa | 276 | |
| frank26080115 | 0:84d7747641aa | 277 | #ifdef __cplusplus |
| frank26080115 | 0:84d7747641aa | 278 | } |
| frank26080115 | 0:84d7747641aa | 279 | #endif |
| frank26080115 | 0:84d7747641aa | 280 | |
| frank26080115 | 0:84d7747641aa | 281 | |
| frank26080115 | 0:84d7747641aa | 282 | #endif /* LPC17XX_ADC_H_ */ |
| frank26080115 | 0:84d7747641aa | 283 | |
| frank26080115 | 0:84d7747641aa | 284 | /** |
| frank26080115 | 0:84d7747641aa | 285 | * @} |
| frank26080115 | 0:84d7747641aa | 286 | */ |
| frank26080115 | 0:84d7747641aa | 287 | |
| frank26080115 | 0:84d7747641aa | 288 | /* --------------------------------- End Of File ------------------------------ */ |