frederic blanc
/TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/hal/adc/fsl_adc_hal.h substitute line 894 extern } by }
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Diff: TARGET_LPC1768/TOOLCHAIN_ARM_STD/LPC1768.sct
- Revision:
- 65:5798e58a58b1
- Parent:
- 64:e3affc9e7238
- Child:
- 66:9c8f0e3462fb
--- a/TARGET_LPC1768/TOOLCHAIN_ARM_STD/LPC1768.sct Mon Aug 05 12:28:09 2013 +0300
+++ b/TARGET_LPC1768/TOOLCHAIN_ARM_STD/LPC1768.sct Mon Aug 12 13:17:46 2013 +0300
@@ -1,22 +1,22 @@
-
-LR_IROM1 0x00000000 0x80000 { ; load region size_region
- ER_IROM1 0x00000000 0x80000 { ; load address = execution address
- *.o (RESET, +First)
- *(InRoot$$Sections)
- .ANY (+RO)
- }
- ; 8_byte_aligned(49 vect * 4 bytes) = 8_byte_aligned(0xC4) = 0xC8
- ; 32KB - 0xC8 = 0x7F38
- RW_IRAM1 0x100000C8 0x7F38 {
- .ANY (+RW +ZI)
- }
- RW_IRAM2 0x2007C000 0x4000 { ; RW data, ETH RAM
- .ANY (AHBSRAM0)
- }
- RW_IRAM3 0x20080000 0x4000 { ; RW data, ETH RAM
- .ANY (AHBSRAM1)
- }
- RW_IRAM4 0x40038000 0x0800 { ; RW data, CAN RAM
- .ANY (CANRAM)
- }
-}
+
+LR_IROM1 0x00000000 0x80000 { ; load region size_region
+ ER_IROM1 0x00000000 0x80000 { ; load address = execution address
+ *.o (RESET, +First)
+ *(InRoot$$Sections)
+ .ANY (+RO)
+ }
+ ; 8_byte_aligned(49 vect * 4 bytes) = 8_byte_aligned(0xC4) = 0xC8
+ ; 32KB - 0xC8 = 0x7F38
+ RW_IRAM1 0x100000C8 0x7F38 {
+ .ANY (+RW +ZI)
+ }
+ RW_IRAM2 0x2007C000 0x4000 { ; RW data, ETH RAM
+ .ANY (AHBSRAM0)
+ }
+ RW_IRAM3 0x20080000 0x4000 { ; RW data, ETH RAM
+ .ANY (AHBSRAM1)
+ }
+ RW_IRAM4 0x40038000 0x0800 { ; RW data, CAN RAM
+ .ANY (CANRAM)
+ }
+}