/TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/hal/adc/fsl_adc_hal.h substitute line 894 extern } by }

Fork of mbed by mbed official

Committer:
bogdanm
Date:
Mon Dec 09 18:43:03 2013 +0200
Revision:
73:1efda918f0ba
Child:
76:824293ae5e43
Release 73 of the mbed library

Main changes:

- added support for KL46Z and NUCLEO_F103RB
- STM32 USB device support
- various bug fixes

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 73:1efda918f0ba 1 /**
bogdanm 73:1efda918f0ba 2 ******************************************************************************
bogdanm 73:1efda918f0ba 3 * @file stm32f10x_usart.h
bogdanm 73:1efda918f0ba 4 * @author MCD Application Team
bogdanm 73:1efda918f0ba 5 * @version V3.5.0
bogdanm 73:1efda918f0ba 6 * @date 11-March-2011
bogdanm 73:1efda918f0ba 7 * @brief This file contains all the functions prototypes for the USART
bogdanm 73:1efda918f0ba 8 * firmware library.
bogdanm 73:1efda918f0ba 9 ******************************************************************************
bogdanm 73:1efda918f0ba 10 * @attention
bogdanm 73:1efda918f0ba 11 *
bogdanm 73:1efda918f0ba 12 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
bogdanm 73:1efda918f0ba 13 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
bogdanm 73:1efda918f0ba 14 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
bogdanm 73:1efda918f0ba 15 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
bogdanm 73:1efda918f0ba 16 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
bogdanm 73:1efda918f0ba 17 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
bogdanm 73:1efda918f0ba 18 *
bogdanm 73:1efda918f0ba 19 * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
bogdanm 73:1efda918f0ba 20 ******************************************************************************
bogdanm 73:1efda918f0ba 21 */
bogdanm 73:1efda918f0ba 22
bogdanm 73:1efda918f0ba 23 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 73:1efda918f0ba 24 #ifndef __STM32F10x_USART_H
bogdanm 73:1efda918f0ba 25 #define __STM32F10x_USART_H
bogdanm 73:1efda918f0ba 26
bogdanm 73:1efda918f0ba 27 #ifdef __cplusplus
bogdanm 73:1efda918f0ba 28 extern "C" {
bogdanm 73:1efda918f0ba 29 #endif
bogdanm 73:1efda918f0ba 30
bogdanm 73:1efda918f0ba 31 /* Includes ------------------------------------------------------------------*/
bogdanm 73:1efda918f0ba 32 #include "stm32f10x.h"
bogdanm 73:1efda918f0ba 33
bogdanm 73:1efda918f0ba 34 /** @addtogroup STM32F10x_StdPeriph_Driver
bogdanm 73:1efda918f0ba 35 * @{
bogdanm 73:1efda918f0ba 36 */
bogdanm 73:1efda918f0ba 37
bogdanm 73:1efda918f0ba 38 /** @addtogroup USART
bogdanm 73:1efda918f0ba 39 * @{
bogdanm 73:1efda918f0ba 40 */
bogdanm 73:1efda918f0ba 41
bogdanm 73:1efda918f0ba 42 /** @defgroup USART_Exported_Types
bogdanm 73:1efda918f0ba 43 * @{
bogdanm 73:1efda918f0ba 44 */
bogdanm 73:1efda918f0ba 45
bogdanm 73:1efda918f0ba 46 /**
bogdanm 73:1efda918f0ba 47 * @brief USART Init Structure definition
bogdanm 73:1efda918f0ba 48 */
bogdanm 73:1efda918f0ba 49
bogdanm 73:1efda918f0ba 50 typedef struct
bogdanm 73:1efda918f0ba 51 {
bogdanm 73:1efda918f0ba 52 uint32_t USART_BaudRate; /*!< This member configures the USART communication baud rate.
bogdanm 73:1efda918f0ba 53 The baud rate is computed using the following formula:
bogdanm 73:1efda918f0ba 54 - IntegerDivider = ((PCLKx) / (16 * (USART_InitStruct->USART_BaudRate)))
bogdanm 73:1efda918f0ba 55 - FractionalDivider = ((IntegerDivider - ((u32) IntegerDivider)) * 16) + 0.5 */
bogdanm 73:1efda918f0ba 56
bogdanm 73:1efda918f0ba 57 uint16_t USART_WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
bogdanm 73:1efda918f0ba 58 This parameter can be a value of @ref USART_Word_Length */
bogdanm 73:1efda918f0ba 59
bogdanm 73:1efda918f0ba 60 uint16_t USART_StopBits; /*!< Specifies the number of stop bits transmitted.
bogdanm 73:1efda918f0ba 61 This parameter can be a value of @ref USART_Stop_Bits */
bogdanm 73:1efda918f0ba 62
bogdanm 73:1efda918f0ba 63 uint16_t USART_Parity; /*!< Specifies the parity mode.
bogdanm 73:1efda918f0ba 64 This parameter can be a value of @ref USART_Parity
bogdanm 73:1efda918f0ba 65 @note When parity is enabled, the computed parity is inserted
bogdanm 73:1efda918f0ba 66 at the MSB position of the transmitted data (9th bit when
bogdanm 73:1efda918f0ba 67 the word length is set to 9 data bits; 8th bit when the
bogdanm 73:1efda918f0ba 68 word length is set to 8 data bits). */
bogdanm 73:1efda918f0ba 69
bogdanm 73:1efda918f0ba 70 uint16_t USART_Mode; /*!< Specifies wether the Receive or Transmit mode is enabled or disabled.
bogdanm 73:1efda918f0ba 71 This parameter can be a value of @ref USART_Mode */
bogdanm 73:1efda918f0ba 72
bogdanm 73:1efda918f0ba 73 uint16_t USART_HardwareFlowControl; /*!< Specifies wether the hardware flow control mode is enabled
bogdanm 73:1efda918f0ba 74 or disabled.
bogdanm 73:1efda918f0ba 75 This parameter can be a value of @ref USART_Hardware_Flow_Control */
bogdanm 73:1efda918f0ba 76 } USART_InitTypeDef;
bogdanm 73:1efda918f0ba 77
bogdanm 73:1efda918f0ba 78 /**
bogdanm 73:1efda918f0ba 79 * @brief USART Clock Init Structure definition
bogdanm 73:1efda918f0ba 80 */
bogdanm 73:1efda918f0ba 81
bogdanm 73:1efda918f0ba 82 typedef struct
bogdanm 73:1efda918f0ba 83 {
bogdanm 73:1efda918f0ba 84
bogdanm 73:1efda918f0ba 85 uint16_t USART_Clock; /*!< Specifies whether the USART clock is enabled or disabled.
bogdanm 73:1efda918f0ba 86 This parameter can be a value of @ref USART_Clock */
bogdanm 73:1efda918f0ba 87
bogdanm 73:1efda918f0ba 88 uint16_t USART_CPOL; /*!< Specifies the steady state value of the serial clock.
bogdanm 73:1efda918f0ba 89 This parameter can be a value of @ref USART_Clock_Polarity */
bogdanm 73:1efda918f0ba 90
bogdanm 73:1efda918f0ba 91 uint16_t USART_CPHA; /*!< Specifies the clock transition on which the bit capture is made.
bogdanm 73:1efda918f0ba 92 This parameter can be a value of @ref USART_Clock_Phase */
bogdanm 73:1efda918f0ba 93
bogdanm 73:1efda918f0ba 94 uint16_t USART_LastBit; /*!< Specifies whether the clock pulse corresponding to the last transmitted
bogdanm 73:1efda918f0ba 95 data bit (MSB) has to be output on the SCLK pin in synchronous mode.
bogdanm 73:1efda918f0ba 96 This parameter can be a value of @ref USART_Last_Bit */
bogdanm 73:1efda918f0ba 97 } USART_ClockInitTypeDef;
bogdanm 73:1efda918f0ba 98
bogdanm 73:1efda918f0ba 99 /**
bogdanm 73:1efda918f0ba 100 * @}
bogdanm 73:1efda918f0ba 101 */
bogdanm 73:1efda918f0ba 102
bogdanm 73:1efda918f0ba 103 /** @defgroup USART_Exported_Constants
bogdanm 73:1efda918f0ba 104 * @{
bogdanm 73:1efda918f0ba 105 */
bogdanm 73:1efda918f0ba 106
bogdanm 73:1efda918f0ba 107 #define IS_USART_ALL_PERIPH(PERIPH) (((PERIPH) == USART1) || \
bogdanm 73:1efda918f0ba 108 ((PERIPH) == USART2) || \
bogdanm 73:1efda918f0ba 109 ((PERIPH) == USART3) || \
bogdanm 73:1efda918f0ba 110 ((PERIPH) == UART4) || \
bogdanm 73:1efda918f0ba 111 ((PERIPH) == UART5))
bogdanm 73:1efda918f0ba 112
bogdanm 73:1efda918f0ba 113 #define IS_USART_123_PERIPH(PERIPH) (((PERIPH) == USART1) || \
bogdanm 73:1efda918f0ba 114 ((PERIPH) == USART2) || \
bogdanm 73:1efda918f0ba 115 ((PERIPH) == USART3))
bogdanm 73:1efda918f0ba 116
bogdanm 73:1efda918f0ba 117 #define IS_USART_1234_PERIPH(PERIPH) (((PERIPH) == USART1) || \
bogdanm 73:1efda918f0ba 118 ((PERIPH) == USART2) || \
bogdanm 73:1efda918f0ba 119 ((PERIPH) == USART3) || \
bogdanm 73:1efda918f0ba 120 ((PERIPH) == UART4))
bogdanm 73:1efda918f0ba 121 /** @defgroup USART_Word_Length
bogdanm 73:1efda918f0ba 122 * @{
bogdanm 73:1efda918f0ba 123 */
bogdanm 73:1efda918f0ba 124
bogdanm 73:1efda918f0ba 125 #define USART_WordLength_8b ((uint16_t)0x0000)
bogdanm 73:1efda918f0ba 126 #define USART_WordLength_9b ((uint16_t)0x1000)
bogdanm 73:1efda918f0ba 127
bogdanm 73:1efda918f0ba 128 #define IS_USART_WORD_LENGTH(LENGTH) (((LENGTH) == USART_WordLength_8b) || \
bogdanm 73:1efda918f0ba 129 ((LENGTH) == USART_WordLength_9b))
bogdanm 73:1efda918f0ba 130 /**
bogdanm 73:1efda918f0ba 131 * @}
bogdanm 73:1efda918f0ba 132 */
bogdanm 73:1efda918f0ba 133
bogdanm 73:1efda918f0ba 134 /** @defgroup USART_Stop_Bits
bogdanm 73:1efda918f0ba 135 * @{
bogdanm 73:1efda918f0ba 136 */
bogdanm 73:1efda918f0ba 137
bogdanm 73:1efda918f0ba 138 #define USART_StopBits_1 ((uint16_t)0x0000)
bogdanm 73:1efda918f0ba 139 #define USART_StopBits_0_5 ((uint16_t)0x1000)
bogdanm 73:1efda918f0ba 140 #define USART_StopBits_2 ((uint16_t)0x2000)
bogdanm 73:1efda918f0ba 141 #define USART_StopBits_1_5 ((uint16_t)0x3000)
bogdanm 73:1efda918f0ba 142 #define IS_USART_STOPBITS(STOPBITS) (((STOPBITS) == USART_StopBits_1) || \
bogdanm 73:1efda918f0ba 143 ((STOPBITS) == USART_StopBits_0_5) || \
bogdanm 73:1efda918f0ba 144 ((STOPBITS) == USART_StopBits_2) || \
bogdanm 73:1efda918f0ba 145 ((STOPBITS) == USART_StopBits_1_5))
bogdanm 73:1efda918f0ba 146 /**
bogdanm 73:1efda918f0ba 147 * @}
bogdanm 73:1efda918f0ba 148 */
bogdanm 73:1efda918f0ba 149
bogdanm 73:1efda918f0ba 150 /** @defgroup USART_Parity
bogdanm 73:1efda918f0ba 151 * @{
bogdanm 73:1efda918f0ba 152 */
bogdanm 73:1efda918f0ba 153
bogdanm 73:1efda918f0ba 154 #define USART_Parity_No ((uint16_t)0x0000)
bogdanm 73:1efda918f0ba 155 #define USART_Parity_Even ((uint16_t)0x0400)
bogdanm 73:1efda918f0ba 156 #define USART_Parity_Odd ((uint16_t)0x0600)
bogdanm 73:1efda918f0ba 157 #define IS_USART_PARITY(PARITY) (((PARITY) == USART_Parity_No) || \
bogdanm 73:1efda918f0ba 158 ((PARITY) == USART_Parity_Even) || \
bogdanm 73:1efda918f0ba 159 ((PARITY) == USART_Parity_Odd))
bogdanm 73:1efda918f0ba 160 /**
bogdanm 73:1efda918f0ba 161 * @}
bogdanm 73:1efda918f0ba 162 */
bogdanm 73:1efda918f0ba 163
bogdanm 73:1efda918f0ba 164 /** @defgroup USART_Mode
bogdanm 73:1efda918f0ba 165 * @{
bogdanm 73:1efda918f0ba 166 */
bogdanm 73:1efda918f0ba 167
bogdanm 73:1efda918f0ba 168 #define USART_Mode_Rx ((uint16_t)0x0004)
bogdanm 73:1efda918f0ba 169 #define USART_Mode_Tx ((uint16_t)0x0008)
bogdanm 73:1efda918f0ba 170 #define IS_USART_MODE(MODE) ((((MODE) & (uint16_t)0xFFF3) == 0x00) && ((MODE) != (uint16_t)0x00))
bogdanm 73:1efda918f0ba 171 /**
bogdanm 73:1efda918f0ba 172 * @}
bogdanm 73:1efda918f0ba 173 */
bogdanm 73:1efda918f0ba 174
bogdanm 73:1efda918f0ba 175 /** @defgroup USART_Hardware_Flow_Control
bogdanm 73:1efda918f0ba 176 * @{
bogdanm 73:1efda918f0ba 177 */
bogdanm 73:1efda918f0ba 178 #define USART_HardwareFlowControl_None ((uint16_t)0x0000)
bogdanm 73:1efda918f0ba 179 #define USART_HardwareFlowControl_RTS ((uint16_t)0x0100)
bogdanm 73:1efda918f0ba 180 #define USART_HardwareFlowControl_CTS ((uint16_t)0x0200)
bogdanm 73:1efda918f0ba 181 #define USART_HardwareFlowControl_RTS_CTS ((uint16_t)0x0300)
bogdanm 73:1efda918f0ba 182 #define IS_USART_HARDWARE_FLOW_CONTROL(CONTROL)\
bogdanm 73:1efda918f0ba 183 (((CONTROL) == USART_HardwareFlowControl_None) || \
bogdanm 73:1efda918f0ba 184 ((CONTROL) == USART_HardwareFlowControl_RTS) || \
bogdanm 73:1efda918f0ba 185 ((CONTROL) == USART_HardwareFlowControl_CTS) || \
bogdanm 73:1efda918f0ba 186 ((CONTROL) == USART_HardwareFlowControl_RTS_CTS))
bogdanm 73:1efda918f0ba 187 /**
bogdanm 73:1efda918f0ba 188 * @}
bogdanm 73:1efda918f0ba 189 */
bogdanm 73:1efda918f0ba 190
bogdanm 73:1efda918f0ba 191 /** @defgroup USART_Clock
bogdanm 73:1efda918f0ba 192 * @{
bogdanm 73:1efda918f0ba 193 */
bogdanm 73:1efda918f0ba 194 #define USART_Clock_Disable ((uint16_t)0x0000)
bogdanm 73:1efda918f0ba 195 #define USART_Clock_Enable ((uint16_t)0x0800)
bogdanm 73:1efda918f0ba 196 #define IS_USART_CLOCK(CLOCK) (((CLOCK) == USART_Clock_Disable) || \
bogdanm 73:1efda918f0ba 197 ((CLOCK) == USART_Clock_Enable))
bogdanm 73:1efda918f0ba 198 /**
bogdanm 73:1efda918f0ba 199 * @}
bogdanm 73:1efda918f0ba 200 */
bogdanm 73:1efda918f0ba 201
bogdanm 73:1efda918f0ba 202 /** @defgroup USART_Clock_Polarity
bogdanm 73:1efda918f0ba 203 * @{
bogdanm 73:1efda918f0ba 204 */
bogdanm 73:1efda918f0ba 205
bogdanm 73:1efda918f0ba 206 #define USART_CPOL_Low ((uint16_t)0x0000)
bogdanm 73:1efda918f0ba 207 #define USART_CPOL_High ((uint16_t)0x0400)
bogdanm 73:1efda918f0ba 208 #define IS_USART_CPOL(CPOL) (((CPOL) == USART_CPOL_Low) || ((CPOL) == USART_CPOL_High))
bogdanm 73:1efda918f0ba 209
bogdanm 73:1efda918f0ba 210 /**
bogdanm 73:1efda918f0ba 211 * @}
bogdanm 73:1efda918f0ba 212 */
bogdanm 73:1efda918f0ba 213
bogdanm 73:1efda918f0ba 214 /** @defgroup USART_Clock_Phase
bogdanm 73:1efda918f0ba 215 * @{
bogdanm 73:1efda918f0ba 216 */
bogdanm 73:1efda918f0ba 217
bogdanm 73:1efda918f0ba 218 #define USART_CPHA_1Edge ((uint16_t)0x0000)
bogdanm 73:1efda918f0ba 219 #define USART_CPHA_2Edge ((uint16_t)0x0200)
bogdanm 73:1efda918f0ba 220 #define IS_USART_CPHA(CPHA) (((CPHA) == USART_CPHA_1Edge) || ((CPHA) == USART_CPHA_2Edge))
bogdanm 73:1efda918f0ba 221
bogdanm 73:1efda918f0ba 222 /**
bogdanm 73:1efda918f0ba 223 * @}
bogdanm 73:1efda918f0ba 224 */
bogdanm 73:1efda918f0ba 225
bogdanm 73:1efda918f0ba 226 /** @defgroup USART_Last_Bit
bogdanm 73:1efda918f0ba 227 * @{
bogdanm 73:1efda918f0ba 228 */
bogdanm 73:1efda918f0ba 229
bogdanm 73:1efda918f0ba 230 #define USART_LastBit_Disable ((uint16_t)0x0000)
bogdanm 73:1efda918f0ba 231 #define USART_LastBit_Enable ((uint16_t)0x0100)
bogdanm 73:1efda918f0ba 232 #define IS_USART_LASTBIT(LASTBIT) (((LASTBIT) == USART_LastBit_Disable) || \
bogdanm 73:1efda918f0ba 233 ((LASTBIT) == USART_LastBit_Enable))
bogdanm 73:1efda918f0ba 234 /**
bogdanm 73:1efda918f0ba 235 * @}
bogdanm 73:1efda918f0ba 236 */
bogdanm 73:1efda918f0ba 237
bogdanm 73:1efda918f0ba 238 /** @defgroup USART_Interrupt_definition
bogdanm 73:1efda918f0ba 239 * @{
bogdanm 73:1efda918f0ba 240 */
bogdanm 73:1efda918f0ba 241
bogdanm 73:1efda918f0ba 242 #define USART_IT_PE ((uint16_t)0x0028)
bogdanm 73:1efda918f0ba 243 #define USART_IT_TXE ((uint16_t)0x0727)
bogdanm 73:1efda918f0ba 244 #define USART_IT_TC ((uint16_t)0x0626)
bogdanm 73:1efda918f0ba 245 #define USART_IT_RXNE ((uint16_t)0x0525)
bogdanm 73:1efda918f0ba 246 #define USART_IT_IDLE ((uint16_t)0x0424)
bogdanm 73:1efda918f0ba 247 #define USART_IT_LBD ((uint16_t)0x0846)
bogdanm 73:1efda918f0ba 248 #define USART_IT_CTS ((uint16_t)0x096A)
bogdanm 73:1efda918f0ba 249 #define USART_IT_ERR ((uint16_t)0x0060)
bogdanm 73:1efda918f0ba 250 #define USART_IT_ORE ((uint16_t)0x0360)
bogdanm 73:1efda918f0ba 251 #define USART_IT_NE ((uint16_t)0x0260)
bogdanm 73:1efda918f0ba 252 #define USART_IT_FE ((uint16_t)0x0160)
bogdanm 73:1efda918f0ba 253 #define IS_USART_CONFIG_IT(IT) (((IT) == USART_IT_PE) || ((IT) == USART_IT_TXE) || \
bogdanm 73:1efda918f0ba 254 ((IT) == USART_IT_TC) || ((IT) == USART_IT_RXNE) || \
bogdanm 73:1efda918f0ba 255 ((IT) == USART_IT_IDLE) || ((IT) == USART_IT_LBD) || \
bogdanm 73:1efda918f0ba 256 ((IT) == USART_IT_CTS) || ((IT) == USART_IT_ERR))
bogdanm 73:1efda918f0ba 257 #define IS_USART_GET_IT(IT) (((IT) == USART_IT_PE) || ((IT) == USART_IT_TXE) || \
bogdanm 73:1efda918f0ba 258 ((IT) == USART_IT_TC) || ((IT) == USART_IT_RXNE) || \
bogdanm 73:1efda918f0ba 259 ((IT) == USART_IT_IDLE) || ((IT) == USART_IT_LBD) || \
bogdanm 73:1efda918f0ba 260 ((IT) == USART_IT_CTS) || ((IT) == USART_IT_ORE) || \
bogdanm 73:1efda918f0ba 261 ((IT) == USART_IT_NE) || ((IT) == USART_IT_FE))
bogdanm 73:1efda918f0ba 262 #define IS_USART_CLEAR_IT(IT) (((IT) == USART_IT_TC) || ((IT) == USART_IT_RXNE) || \
bogdanm 73:1efda918f0ba 263 ((IT) == USART_IT_LBD) || ((IT) == USART_IT_CTS))
bogdanm 73:1efda918f0ba 264 /**
bogdanm 73:1efda918f0ba 265 * @}
bogdanm 73:1efda918f0ba 266 */
bogdanm 73:1efda918f0ba 267
bogdanm 73:1efda918f0ba 268 /** @defgroup USART_DMA_Requests
bogdanm 73:1efda918f0ba 269 * @{
bogdanm 73:1efda918f0ba 270 */
bogdanm 73:1efda918f0ba 271
bogdanm 73:1efda918f0ba 272 #define USART_DMAReq_Tx ((uint16_t)0x0080)
bogdanm 73:1efda918f0ba 273 #define USART_DMAReq_Rx ((uint16_t)0x0040)
bogdanm 73:1efda918f0ba 274 #define IS_USART_DMAREQ(DMAREQ) ((((DMAREQ) & (uint16_t)0xFF3F) == 0x00) && ((DMAREQ) != (uint16_t)0x00))
bogdanm 73:1efda918f0ba 275
bogdanm 73:1efda918f0ba 276 /**
bogdanm 73:1efda918f0ba 277 * @}
bogdanm 73:1efda918f0ba 278 */
bogdanm 73:1efda918f0ba 279
bogdanm 73:1efda918f0ba 280 /** @defgroup USART_WakeUp_methods
bogdanm 73:1efda918f0ba 281 * @{
bogdanm 73:1efda918f0ba 282 */
bogdanm 73:1efda918f0ba 283
bogdanm 73:1efda918f0ba 284 #define USART_WakeUp_IdleLine ((uint16_t)0x0000)
bogdanm 73:1efda918f0ba 285 #define USART_WakeUp_AddressMark ((uint16_t)0x0800)
bogdanm 73:1efda918f0ba 286 #define IS_USART_WAKEUP(WAKEUP) (((WAKEUP) == USART_WakeUp_IdleLine) || \
bogdanm 73:1efda918f0ba 287 ((WAKEUP) == USART_WakeUp_AddressMark))
bogdanm 73:1efda918f0ba 288 /**
bogdanm 73:1efda918f0ba 289 * @}
bogdanm 73:1efda918f0ba 290 */
bogdanm 73:1efda918f0ba 291
bogdanm 73:1efda918f0ba 292 /** @defgroup USART_LIN_Break_Detection_Length
bogdanm 73:1efda918f0ba 293 * @{
bogdanm 73:1efda918f0ba 294 */
bogdanm 73:1efda918f0ba 295
bogdanm 73:1efda918f0ba 296 #define USART_LINBreakDetectLength_10b ((uint16_t)0x0000)
bogdanm 73:1efda918f0ba 297 #define USART_LINBreakDetectLength_11b ((uint16_t)0x0020)
bogdanm 73:1efda918f0ba 298 #define IS_USART_LIN_BREAK_DETECT_LENGTH(LENGTH) \
bogdanm 73:1efda918f0ba 299 (((LENGTH) == USART_LINBreakDetectLength_10b) || \
bogdanm 73:1efda918f0ba 300 ((LENGTH) == USART_LINBreakDetectLength_11b))
bogdanm 73:1efda918f0ba 301 /**
bogdanm 73:1efda918f0ba 302 * @}
bogdanm 73:1efda918f0ba 303 */
bogdanm 73:1efda918f0ba 304
bogdanm 73:1efda918f0ba 305 /** @defgroup USART_IrDA_Low_Power
bogdanm 73:1efda918f0ba 306 * @{
bogdanm 73:1efda918f0ba 307 */
bogdanm 73:1efda918f0ba 308
bogdanm 73:1efda918f0ba 309 #define USART_IrDAMode_LowPower ((uint16_t)0x0004)
bogdanm 73:1efda918f0ba 310 #define USART_IrDAMode_Normal ((uint16_t)0x0000)
bogdanm 73:1efda918f0ba 311 #define IS_USART_IRDA_MODE(MODE) (((MODE) == USART_IrDAMode_LowPower) || \
bogdanm 73:1efda918f0ba 312 ((MODE) == USART_IrDAMode_Normal))
bogdanm 73:1efda918f0ba 313 /**
bogdanm 73:1efda918f0ba 314 * @}
bogdanm 73:1efda918f0ba 315 */
bogdanm 73:1efda918f0ba 316
bogdanm 73:1efda918f0ba 317 /** @defgroup USART_Flags
bogdanm 73:1efda918f0ba 318 * @{
bogdanm 73:1efda918f0ba 319 */
bogdanm 73:1efda918f0ba 320
bogdanm 73:1efda918f0ba 321 #define USART_FLAG_CTS ((uint16_t)0x0200)
bogdanm 73:1efda918f0ba 322 #define USART_FLAG_LBD ((uint16_t)0x0100)
bogdanm 73:1efda918f0ba 323 #define USART_FLAG_TXE ((uint16_t)0x0080)
bogdanm 73:1efda918f0ba 324 #define USART_FLAG_TC ((uint16_t)0x0040)
bogdanm 73:1efda918f0ba 325 #define USART_FLAG_RXNE ((uint16_t)0x0020)
bogdanm 73:1efda918f0ba 326 #define USART_FLAG_IDLE ((uint16_t)0x0010)
bogdanm 73:1efda918f0ba 327 #define USART_FLAG_ORE ((uint16_t)0x0008)
bogdanm 73:1efda918f0ba 328 #define USART_FLAG_NE ((uint16_t)0x0004)
bogdanm 73:1efda918f0ba 329 #define USART_FLAG_FE ((uint16_t)0x0002)
bogdanm 73:1efda918f0ba 330 #define USART_FLAG_PE ((uint16_t)0x0001)
bogdanm 73:1efda918f0ba 331 #define IS_USART_FLAG(FLAG) (((FLAG) == USART_FLAG_PE) || ((FLAG) == USART_FLAG_TXE) || \
bogdanm 73:1efda918f0ba 332 ((FLAG) == USART_FLAG_TC) || ((FLAG) == USART_FLAG_RXNE) || \
bogdanm 73:1efda918f0ba 333 ((FLAG) == USART_FLAG_IDLE) || ((FLAG) == USART_FLAG_LBD) || \
bogdanm 73:1efda918f0ba 334 ((FLAG) == USART_FLAG_CTS) || ((FLAG) == USART_FLAG_ORE) || \
bogdanm 73:1efda918f0ba 335 ((FLAG) == USART_FLAG_NE) || ((FLAG) == USART_FLAG_FE))
bogdanm 73:1efda918f0ba 336
bogdanm 73:1efda918f0ba 337 #define IS_USART_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0xFC9F) == 0x00) && ((FLAG) != (uint16_t)0x00))
bogdanm 73:1efda918f0ba 338 #define IS_USART_PERIPH_FLAG(PERIPH, USART_FLAG) ((((*(uint32_t*)&(PERIPH)) != UART4_BASE) &&\
bogdanm 73:1efda918f0ba 339 ((*(uint32_t*)&(PERIPH)) != UART5_BASE)) \
bogdanm 73:1efda918f0ba 340 || ((USART_FLAG) != USART_FLAG_CTS))
bogdanm 73:1efda918f0ba 341 #define IS_USART_BAUDRATE(BAUDRATE) (((BAUDRATE) > 0) && ((BAUDRATE) < 0x0044AA21))
bogdanm 73:1efda918f0ba 342 #define IS_USART_ADDRESS(ADDRESS) ((ADDRESS) <= 0xF)
bogdanm 73:1efda918f0ba 343 #define IS_USART_DATA(DATA) ((DATA) <= 0x1FF)
bogdanm 73:1efda918f0ba 344
bogdanm 73:1efda918f0ba 345 /**
bogdanm 73:1efda918f0ba 346 * @}
bogdanm 73:1efda918f0ba 347 */
bogdanm 73:1efda918f0ba 348
bogdanm 73:1efda918f0ba 349 /**
bogdanm 73:1efda918f0ba 350 * @}
bogdanm 73:1efda918f0ba 351 */
bogdanm 73:1efda918f0ba 352
bogdanm 73:1efda918f0ba 353 /** @defgroup USART_Exported_Macros
bogdanm 73:1efda918f0ba 354 * @{
bogdanm 73:1efda918f0ba 355 */
bogdanm 73:1efda918f0ba 356
bogdanm 73:1efda918f0ba 357 /**
bogdanm 73:1efda918f0ba 358 * @}
bogdanm 73:1efda918f0ba 359 */
bogdanm 73:1efda918f0ba 360
bogdanm 73:1efda918f0ba 361 /** @defgroup USART_Exported_Functions
bogdanm 73:1efda918f0ba 362 * @{
bogdanm 73:1efda918f0ba 363 */
bogdanm 73:1efda918f0ba 364
bogdanm 73:1efda918f0ba 365 void USART_DeInit(USART_TypeDef* USARTx);
bogdanm 73:1efda918f0ba 366 void USART_Init(USART_TypeDef* USARTx, USART_InitTypeDef* USART_InitStruct);
bogdanm 73:1efda918f0ba 367 void USART_StructInit(USART_InitTypeDef* USART_InitStruct);
bogdanm 73:1efda918f0ba 368 void USART_ClockInit(USART_TypeDef* USARTx, USART_ClockInitTypeDef* USART_ClockInitStruct);
bogdanm 73:1efda918f0ba 369 void USART_ClockStructInit(USART_ClockInitTypeDef* USART_ClockInitStruct);
bogdanm 73:1efda918f0ba 370 void USART_Cmd(USART_TypeDef* USARTx, FunctionalState NewState);
bogdanm 73:1efda918f0ba 371 void USART_ITConfig(USART_TypeDef* USARTx, uint16_t USART_IT, FunctionalState NewState);
bogdanm 73:1efda918f0ba 372 void USART_DMACmd(USART_TypeDef* USARTx, uint16_t USART_DMAReq, FunctionalState NewState);
bogdanm 73:1efda918f0ba 373 void USART_SetAddress(USART_TypeDef* USARTx, uint8_t USART_Address);
bogdanm 73:1efda918f0ba 374 void USART_WakeUpConfig(USART_TypeDef* USARTx, uint16_t USART_WakeUp);
bogdanm 73:1efda918f0ba 375 void USART_ReceiverWakeUpCmd(USART_TypeDef* USARTx, FunctionalState NewState);
bogdanm 73:1efda918f0ba 376 void USART_LINBreakDetectLengthConfig(USART_TypeDef* USARTx, uint16_t USART_LINBreakDetectLength);
bogdanm 73:1efda918f0ba 377 void USART_LINCmd(USART_TypeDef* USARTx, FunctionalState NewState);
bogdanm 73:1efda918f0ba 378 void USART_SendData(USART_TypeDef* USARTx, uint16_t Data);
bogdanm 73:1efda918f0ba 379 uint16_t USART_ReceiveData(USART_TypeDef* USARTx);
bogdanm 73:1efda918f0ba 380 void USART_SendBreak(USART_TypeDef* USARTx);
bogdanm 73:1efda918f0ba 381 void USART_SetGuardTime(USART_TypeDef* USARTx, uint8_t USART_GuardTime);
bogdanm 73:1efda918f0ba 382 void USART_SetPrescaler(USART_TypeDef* USARTx, uint8_t USART_Prescaler);
bogdanm 73:1efda918f0ba 383 void USART_SmartCardCmd(USART_TypeDef* USARTx, FunctionalState NewState);
bogdanm 73:1efda918f0ba 384 void USART_SmartCardNACKCmd(USART_TypeDef* USARTx, FunctionalState NewState);
bogdanm 73:1efda918f0ba 385 void USART_HalfDuplexCmd(USART_TypeDef* USARTx, FunctionalState NewState);
bogdanm 73:1efda918f0ba 386 void USART_OverSampling8Cmd(USART_TypeDef* USARTx, FunctionalState NewState);
bogdanm 73:1efda918f0ba 387 void USART_OneBitMethodCmd(USART_TypeDef* USARTx, FunctionalState NewState);
bogdanm 73:1efda918f0ba 388 void USART_IrDAConfig(USART_TypeDef* USARTx, uint16_t USART_IrDAMode);
bogdanm 73:1efda918f0ba 389 void USART_IrDACmd(USART_TypeDef* USARTx, FunctionalState NewState);
bogdanm 73:1efda918f0ba 390 FlagStatus USART_GetFlagStatus(USART_TypeDef* USARTx, uint16_t USART_FLAG);
bogdanm 73:1efda918f0ba 391 void USART_ClearFlag(USART_TypeDef* USARTx, uint16_t USART_FLAG);
bogdanm 73:1efda918f0ba 392 ITStatus USART_GetITStatus(USART_TypeDef* USARTx, uint16_t USART_IT);
bogdanm 73:1efda918f0ba 393 void USART_ClearITPendingBit(USART_TypeDef* USARTx, uint16_t USART_IT);
bogdanm 73:1efda918f0ba 394
bogdanm 73:1efda918f0ba 395 #ifdef __cplusplus
bogdanm 73:1efda918f0ba 396 }
bogdanm 73:1efda918f0ba 397 #endif
bogdanm 73:1efda918f0ba 398
bogdanm 73:1efda918f0ba 399 #endif /* __STM32F10x_USART_H */
bogdanm 73:1efda918f0ba 400 /**
bogdanm 73:1efda918f0ba 401 * @}
bogdanm 73:1efda918f0ba 402 */
bogdanm 73:1efda918f0ba 403
bogdanm 73:1efda918f0ba 404 /**
bogdanm 73:1efda918f0ba 405 * @}
bogdanm 73:1efda918f0ba 406 */
bogdanm 73:1efda918f0ba 407
bogdanm 73:1efda918f0ba 408 /**
bogdanm 73:1efda918f0ba 409 * @}
bogdanm 73:1efda918f0ba 410 */
bogdanm 73:1efda918f0ba 411
bogdanm 73:1efda918f0ba 412 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/