erez i / mbed

version_2.0

Dependents:   cc3000_ping_demo_try_2

Fork of mbed by mbed official

TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/drivers/clock/fsl_clock_configs.h@82:6473597d706e, 2014-04-07 (annotated)

Committer:
bogdanm
Date:
Mon Apr 07 18:28:36 2014 +0100
Revision:
82:6473597d706e
Release 82 of the mbed library



Main changes:



- support for K64F

- Revisited Nordic code structure

- Test infrastructure improvements

- various bug fixes

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 82:6473597d706e 1 /*
bogdanm 82:6473597d706e 2 * Copyright (c) 2013 - 2014, Freescale Semiconductor, Inc.
bogdanm 82:6473597d706e 3 * All rights reserved.
bogdanm 82:6473597d706e 4 *
bogdanm 82:6473597d706e 5 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 82:6473597d706e 6 * are permitted provided that the following conditions are met:
bogdanm 82:6473597d706e 7 *
bogdanm 82:6473597d706e 8 * o Redistributions of source code must retain the above copyright notice, this list
bogdanm 82:6473597d706e 9 * of conditions and the following disclaimer.
bogdanm 82:6473597d706e 10 *
bogdanm 82:6473597d706e 11 * o Redistributions in binary form must reproduce the above copyright notice, this
bogdanm 82:6473597d706e 12 * list of conditions and the following disclaimer in the documentation and/or
bogdanm 82:6473597d706e 13 * other materials provided with the distribution.
bogdanm 82:6473597d706e 14 *
bogdanm 82:6473597d706e 15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
bogdanm 82:6473597d706e 16 * contributors may be used to endorse or promote products derived from this
bogdanm 82:6473597d706e 17 * software without specific prior written permission.
bogdanm 82:6473597d706e 18 *
bogdanm 82:6473597d706e 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
bogdanm 82:6473597d706e 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
bogdanm 82:6473597d706e 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 82:6473597d706e 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
bogdanm 82:6473597d706e 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
bogdanm 82:6473597d706e 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
bogdanm 82:6473597d706e 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
bogdanm 82:6473597d706e 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
bogdanm 82:6473597d706e 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
bogdanm 82:6473597d706e 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 82:6473597d706e 29 */
bogdanm 82:6473597d706e 30 #if !defined(__FSL_CLOCK_CONFIGS_H__)
bogdanm 82:6473597d706e 31 #define __FSL_CLOCK_CONFIGS_H__
bogdanm 82:6473597d706e 32
bogdanm 82:6473597d706e 33 /*******************************************************************************
bogdanm 82:6473597d706e 34 * Definitions
bogdanm 82:6473597d706e 35 ******************************************************************************/
bogdanm 82:6473597d706e 36
bogdanm 82:6473597d706e 37 /*! @addtogroup clock_manager*/
bogdanm 82:6473597d706e 38 /*! @{*/
bogdanm 82:6473597d706e 39
bogdanm 82:6473597d706e 40 #if defined(CPU_MK70FN1M0VMJ12) || defined(CPU_MK70FN1M0VMJ15)
bogdanm 82:6473597d706e 41
bogdanm 82:6473597d706e 42 #define CLOCK_SETUP 1
bogdanm 82:6473597d706e 43
bogdanm 82:6473597d706e 44 /*! @brief Predefined clock setups for K70*/
bogdanm 82:6473597d706e 45
bogdanm 82:6473597d706e 46 /*
bogdanm 82:6473597d706e 47 0 ... Multipurpose Clock Generator (MCG) in FLL Engaged Internal (FEI) mode
bogdanm 82:6473597d706e 48 Reference clock source for MCG module is the slow internal clock source 32.768kHz
bogdanm 82:6473597d706e 49 Core clock = 41.94MHz, BusClock = 41.94MHz
bogdanm 82:6473597d706e 50 1 ... Multipurpose Clock Generator (MCG) in PLL Engaged External (PEE) mode
bogdanm 82:6473597d706e 51 Reference clock source for MCG module is an external reference clock source 50MHz
bogdanm 82:6473597d706e 52 Core clock = 120MHz, BusClock = 60MHz
bogdanm 82:6473597d706e 53 2 ... Multipurpose Clock Generator (MCG) in Bypassed Low Power External (BLPE) mode
bogdanm 82:6473597d706e 54 Core clock/Bus clock derived directly from an external reference clock source 50MHz with no multiplication
bogdanm 82:6473597d706e 55 Core clock = 50MHz, BusClock = 50MHz
bogdanm 82:6473597d706e 56 */
bogdanm 82:6473597d706e 57
bogdanm 82:6473597d706e 58
bogdanm 82:6473597d706e 59 /*! @brief Define clock source values for K70*/
bogdanm 82:6473597d706e 60
bogdanm 82:6473597d706e 61 #if (CLOCK_SETUP == 0)
bogdanm 82:6473597d706e 62 #define CPU_XTAL0_CLK_HZ 50000000u /* external crystal or osc clock frequency in Hz connected to System Oscillator 0*/
bogdanm 82:6473597d706e 63 #define CPU_XTAL1_CLK_HZ 8000000u /* external crystal or osc clock frequency in Hz connected to System Oscillator 1*/
bogdanm 82:6473597d706e 64 #define CPU_XTAL32k_CLK_HZ 32768u /* Value of the external 32k crystal or oscillator clock frequency in Hz*/
bogdanm 82:6473597d706e 65 #define CPU_INT_SLOW_CLK_HZ 32768u /* Value of the slow internal oscillator clock frequency in Hz*/
bogdanm 82:6473597d706e 66 #define CPU_INT_FAST_CLK_HZ 4000000u /* Value of the fast internal oscillator clock frequency in Hz*/
bogdanm 82:6473597d706e 67 #define DEFAULT_SYSTEM_CLOCK 41943040u /* Default System clock value*/
bogdanm 82:6473597d706e 68 #elif (CLOCK_SETUP == 1)
bogdanm 82:6473597d706e 69 #define CPU_XTAL0_CLK_HZ 50000000u /* external crystal or osc clock frequency in Hz connected to System Oscillator 0*/
bogdanm 82:6473597d706e 70 #define CPU_XTAL1_CLK_HZ 8000000u /* external crystal or osc clock frequency in Hz connected to System Oscillator 1*/
bogdanm 82:6473597d706e 71 #define CPU_XTAL32k_CLK_HZ 32768u /* Value of the external 32k crystal or oscillator clock frequency in Hz*/
bogdanm 82:6473597d706e 72 #define CPU_INT_SLOW_CLK_HZ 32768u /* Value of the slow internal oscillator clock frequency in Hz*/
bogdanm 82:6473597d706e 73 #define CPU_INT_FAST_CLK_HZ 4000000u /* Value of the fast internal oscillator clock frequency in Hz*/
bogdanm 82:6473597d706e 74 #define DEFAULT_SYSTEM_CLOCK 120000000u /* Default System clock value*/
bogdanm 82:6473597d706e 75 #elif (CLOCK_SETUP == 2)
bogdanm 82:6473597d706e 76 #define CPU_XTAL0_CLK_HZ 50000000u /* external crystal or osc clock frequency in Hz connected to System Oscillator 0*/
bogdanm 82:6473597d706e 77 #define CPU_XTAL1_CLK_HZ 8000000u /* external crystal or osc clock frequency in Hz connected to System Oscillator 1*/
bogdanm 82:6473597d706e 78 #define CPU_XTAL32k_CLK_HZ 32768u /* Value of the external 32k crystal or oscillator clock frequency in Hz*/
bogdanm 82:6473597d706e 79 #define CPU_INT_SLOW_CLK_HZ 32768u /* Value of the slow internal oscillator clock frequency in Hz*/
bogdanm 82:6473597d706e 80 #define CPU_INT_FAST_CLK_HZ 4000000u /* Value of the fast internal oscillator clock frequency in Hz*/
bogdanm 82:6473597d706e 81 #define DEFAULT_SYSTEM_CLOCK 50000000u /* Default System clock value*/
bogdanm 82:6473597d706e 82 #endif /* (CLOCK_SETUP == 2)*/
bogdanm 82:6473597d706e 83
bogdanm 82:6473597d706e 84 #elif defined(CPU_MKL25Z128VLK4)
bogdanm 82:6473597d706e 85
bogdanm 82:6473597d706e 86 #define CLOCK_SETUP 1
bogdanm 82:6473597d706e 87
bogdanm 82:6473597d706e 88 /*! @brief Predefined clock setups for KL25*/
bogdanm 82:6473597d706e 89
bogdanm 82:6473597d706e 90 /*
bogdanm 82:6473597d706e 91 0 ... Multipurpose Clock Generator (MCG) in FLL Engaged Internal (FEI) mode
bogdanm 82:6473597d706e 92 Reference clock source for MCG module is the slow internal clock source 32.768kHz
bogdanm 82:6473597d706e 93 Core clock = 41.94MHz, BusClock = 13.98MHz
bogdanm 82:6473597d706e 94 1 ... Multipurpose Clock Generator (MCG) in PLL Engaged External (PEE) mode
bogdanm 82:6473597d706e 95 Reference clock source for MCG module is an external crystal 8MHz
bogdanm 82:6473597d706e 96 Core clock = 48MHz, BusClock = 24MHz
bogdanm 82:6473597d706e 97 2 ... Multipurpose Clock Generator (MCG) in Bypassed Low Power External (BLPE) mode
bogdanm 82:6473597d706e 98 Core clock/Bus clock derived directly from an external crystal 8MHz with no multiplication
bogdanm 82:6473597d706e 99 Core clock = 8MHz, BusClock = 8MHz
bogdanm 82:6473597d706e 100 */
bogdanm 82:6473597d706e 101
bogdanm 82:6473597d706e 102
bogdanm 82:6473597d706e 103 /*! @brief Define clock source values for KL25*/
bogdanm 82:6473597d706e 104
bogdanm 82:6473597d706e 105 #if (CLOCK_SETUP == 0)
bogdanm 82:6473597d706e 106 #define CPU_XTAL_CLK_HZ 8000000u /* external crystal or oscillator clock frequency in Hz*/
bogdanm 82:6473597d706e 107 #define CPU_INT_SLOW_CLK_HZ 32768u /* slow internal oscillator clock frequency in Hz*/
bogdanm 82:6473597d706e 108 #define CPU_INT_FAST_CLK_HZ 4000000u /* fast internal oscillator clock frequency in Hz*/
bogdanm 82:6473597d706e 109 #define DEFAULT_SYSTEM_CLOCK 41943040u /* Default System clock value*/
bogdanm 82:6473597d706e 110 #elif (CLOCK_SETUP == 1)
bogdanm 82:6473597d706e 111 #define CPU_XTAL_CLK_HZ 8000000u /* external crystal or oscillator clock frequency in Hz*/
bogdanm 82:6473597d706e 112 #define CPU_INT_SLOW_CLK_HZ 32768u /* slow internal oscillator clock frequency in Hz*/
bogdanm 82:6473597d706e 113 #define CPU_INT_FAST_CLK_HZ 4000000u /* fast internal oscillator clock frequency in Hz*/
bogdanm 82:6473597d706e 114 #define DEFAULT_SYSTEM_CLOCK 48000000u /* Default System clock value*/
bogdanm 82:6473597d706e 115 #elif (CLOCK_SETUP == 2)
bogdanm 82:6473597d706e 116 #define CPU_XTAL_CLK_HZ 8000000u /* external crystal or oscillator clock frequency in Hz*/
bogdanm 82:6473597d706e 117 #define CPU_INT_SLOW_CLK_HZ 32768u /* slow internal oscillator clock frequency in Hz*/
bogdanm 82:6473597d706e 118 #define CPU_INT_FAST_CLK_HZ 4000000u /* fast internal oscillator clock frequency in Hz*/
bogdanm 82:6473597d706e 119 #define DEFAULT_SYSTEM_CLOCK 8000000u /* Default System clock value*/
bogdanm 82:6473597d706e 120 #endif /*(CLOCK_SETUP == 2)*/
bogdanm 82:6473597d706e 121
bogdanm 82:6473597d706e 122 #elif defined(CPU_MK64FN1M0VMD12)
bogdanm 82:6473597d706e 123
bogdanm 82:6473597d706e 124 #define DISABLE_WDOG 1
bogdanm 82:6473597d706e 125
bogdanm 82:6473597d706e 126 #define CLOCK_SETUP 1
bogdanm 82:6473597d706e 127 /* Predefined clock setups
bogdanm 82:6473597d706e 128 0 ... Multipurpose Clock Generator (MCG) in FLL Engaged Internal (FEI) mode
bogdanm 82:6473597d706e 129 Reference clock source for MCG module is the slow internal clock source 32.768kHz
bogdanm 82:6473597d706e 130 Core clock = 20.97MHz, BusClock = 20.97MHz
bogdanm 82:6473597d706e 131 1 ... Multipurpose Clock Generator (MCG) in PLL Engaged External (PEE) mode
bogdanm 82:6473597d706e 132 Reference clock source for MCG module is an external clock source 50MHz
bogdanm 82:6473597d706e 133 USB clock divider is set for USB to receive 48MHz input clock.
bogdanm 82:6473597d706e 134 Core clock = 120MHz, BusClock = 60MHz
bogdanm 82:6473597d706e 135 3 ... Multipurpose Clock Generator (MCG) in Bypassed Low Power Internal (BLPI) mode
bogdanm 82:6473597d706e 136 Core clock/Bus clock derived directly from an fast internal clock 4MHz with no multiplication
bogdanm 82:6473597d706e 137 The clock settings is ready for Very Low Power Run mode.
bogdanm 82:6473597d706e 138 Core clock = 4MHz, BusClock = 4MHz
bogdanm 82:6473597d706e 139 */
bogdanm 82:6473597d706e 140
bogdanm 82:6473597d706e 141 /*----------------------------------------------------------------------------
bogdanm 82:6473597d706e 142 Define clock source values
bogdanm 82:6473597d706e 143 *----------------------------------------------------------------------------*/
bogdanm 82:6473597d706e 144 #if (CLOCK_SETUP == 0)
bogdanm 82:6473597d706e 145 #define CPU_XTAL_CLK_HZ 50000000u /* Value of the external crystal or oscillator clock frequency in Hz */
bogdanm 82:6473597d706e 146 #define CPU_XTAL32k_CLK_HZ 32768u /* Value of the external 32k crystal or oscillator clock frequency in Hz */
bogdanm 82:6473597d706e 147 #define CPU_INT_SLOW_CLK_HZ 32768u /* Value of the slow internal oscillator clock frequency in Hz */
bogdanm 82:6473597d706e 148 #define CPU_INT_FAST_CLK_HZ 4000000u /* Value of the fast internal oscillator clock frequency in Hz */
bogdanm 82:6473597d706e 149 #define CPU_INT_IRC_CLK_HZ 48000000u /* Value of the 48M internal oscillator clock frequency in Hz */
bogdanm 82:6473597d706e 150 #define DEFAULT_SYSTEM_CLOCK 20485760u /* Default System clock value */
bogdanm 82:6473597d706e 151 #elif (CLOCK_SETUP == 1)
bogdanm 82:6473597d706e 152 #define CPU_XTAL_CLK_HZ 50000000u /* Value of the external crystal or oscillator clock frequency in Hz */
bogdanm 82:6473597d706e 153 #define CPU_XTAL32k_CLK_HZ 32768u /* Value of the external 32k crystal or oscillator clock frequency in Hz */
bogdanm 82:6473597d706e 154 #define CPU_INT_SLOW_CLK_HZ 32768u /* Value of the slow internal oscillator clock frequency in Hz */
bogdanm 82:6473597d706e 155 #define CPU_INT_FAST_CLK_HZ 4000000u /* Value of the fast internal oscillator clock frequency in Hz */
bogdanm 82:6473597d706e 156 #define CPU_INT_IRC_CLK_HZ 48000000u /* Value of the 48M internal oscillator clock frequency in Hz */
bogdanm 82:6473597d706e 157 #define DEFAULT_SYSTEM_CLOCK 120000000u /* Default System clock value */
bogdanm 82:6473597d706e 158 #elif (CLOCK_SETUP == 3)
bogdanm 82:6473597d706e 159 #define CPU_XTAL_CLK_HZ 50000000u /* Value of the external crystal or oscillator clock frequency in Hz */
bogdanm 82:6473597d706e 160 #define CPU_XTAL32k_CLK_HZ 32768u /* Value of the external 32k crystal or oscillator clock frequency in Hz */
bogdanm 82:6473597d706e 161 #define CPU_INT_SLOW_CLK_HZ 32768u /* Value of the slow internal oscillator clock frequency in Hz */
bogdanm 82:6473597d706e 162 #define CPU_INT_FAST_CLK_HZ 4000000u /* Value of the fast internal oscillator clock frequency in Hz */
bogdanm 82:6473597d706e 163 #define CPU_INT_IRC_CLK_HZ 48000000u /* Value of the 48M internal oscillator clock frequency in Hz */
bogdanm 82:6473597d706e 164 #define DEFAULT_SYSTEM_CLOCK 4000000u /* Default System clock value */
bogdanm 82:6473597d706e 165 #endif /* (CLOCK_SETUP == 3) */
bogdanm 82:6473597d706e 166
bogdanm 82:6473597d706e 167 #elif defined(CPU_MK22FN512VDC12)
bogdanm 82:6473597d706e 168
bogdanm 82:6473597d706e 169 #define DISABLE_WDOG 1
bogdanm 82:6473597d706e 170
bogdanm 82:6473597d706e 171 #define CLOCK_SETUP 1
bogdanm 82:6473597d706e 172 /* Predefined clock setups
bogdanm 82:6473597d706e 173 0 ... Multipurpose Clock Generator (MCG) in FLL Engaged Internal (FEI) mode
bogdanm 82:6473597d706e 174 Reference clock source for MCG module is the slow internal clock source 32.768kHz
bogdanm 82:6473597d706e 175 Core clock = 41.94MHz, BusClock = 41.94MHz
bogdanm 82:6473597d706e 176 1 ... Multipurpose Clock Generator (MCG) in PLL Engaged External (PEE) mode
bogdanm 82:6473597d706e 177 Reference clock source for MCG module is an external crystal 8MHz
bogdanm 82:6473597d706e 178 Core clock = 100MHz, BusClock = 50MHz
bogdanm 82:6473597d706e 179 2 ... Multipurpose Clock Generator (MCG) in Bypassed Low Power External (BLPE) mode
bogdanm 82:6473597d706e 180 Core clock/Bus clock derived directly from an external crystal 8MHz with no multiplication
bogdanm 82:6473597d706e 181 Core clock = 8MHz, BusClock = 8MHz
bogdanm 82:6473597d706e 182 3 ... Multipurpose Clock Generator (MCG) in PLL Engaged External (PEE) mode
bogdanm 82:6473597d706e 183 Reference clock source for MCG module is an external crystal 8MHz
bogdanm 82:6473597d706e 184 Core clock = 120MHz, BusClock = 60MHz
bogdanm 82:6473597d706e 185 */
bogdanm 82:6473597d706e 186
bogdanm 82:6473597d706e 187 /*----------------------------------------------------------------------------
bogdanm 82:6473597d706e 188 Define clock source values
bogdanm 82:6473597d706e 189 *----------------------------------------------------------------------------*/
bogdanm 82:6473597d706e 190 #if (CLOCK_SETUP == 0)
bogdanm 82:6473597d706e 191 #define CPU_XTAL_CLK_HZ 8000000u /* Value of the external crystal or oscillator clock frequency in Hz */
bogdanm 82:6473597d706e 192 #define CPU_XTAL32k_CLK_HZ 32768u /* Value of the external 32k crystal or oscillator clock frequency in Hz */
bogdanm 82:6473597d706e 193 #define CPU_INT_SLOW_CLK_HZ 32768u /* Value of the slow internal oscillator clock frequency in Hz */
bogdanm 82:6473597d706e 194 #define CPU_INT_FAST_CLK_HZ 4000000u /* Value of the fast internal oscillator clock frequency in Hz */
bogdanm 82:6473597d706e 195 #define CPU_INT_IRC_CLK_HZ 48000000u /* Value of the 48M internal oscillator clock frequency in Hz */
bogdanm 82:6473597d706e 196 #define DEFAULT_SYSTEM_CLOCK 41943040u /* Default System clock value */
bogdanm 82:6473597d706e 197 #elif (CLOCK_SETUP == 1)
bogdanm 82:6473597d706e 198 #define CPU_XTAL_CLK_HZ 8000000u /* Value of the external crystal or oscillator clock frequency in Hz */
bogdanm 82:6473597d706e 199 #define CPU_XTAL32k_CLK_HZ 32768u /* Value of the external 32k crystal or oscillator clock frequency in Hz */
bogdanm 82:6473597d706e 200 #define CPU_INT_SLOW_CLK_HZ 32768u /* Value of the slow internal oscillator clock frequency in Hz */
bogdanm 82:6473597d706e 201 #define CPU_INT_FAST_CLK_HZ 4000000u /* Value of the fast internal oscillator clock frequency in Hz */
bogdanm 82:6473597d706e 202 #define CPU_INT_IRC_CLK_HZ 48000000u /* Value of the 48M internal oscillator clock frequency in Hz */
bogdanm 82:6473597d706e 203 #define DEFAULT_SYSTEM_CLOCK 100000000u /* Default System clock value */
bogdanm 82:6473597d706e 204 #elif (CLOCK_SETUP == 2)
bogdanm 82:6473597d706e 205 #define CPU_XTAL_CLK_HZ 8000000u /* Value of the external crystal or oscillator clock frequency in Hz */
bogdanm 82:6473597d706e 206 #define CPU_XTAL32k_CLK_HZ 32768u /* Value of the external 32k crystal or oscillator clock frequency in Hz */
bogdanm 82:6473597d706e 207 #define CPU_INT_SLOW_CLK_HZ 32768u /* Value of the slow internal oscillator clock frequency in Hz */
bogdanm 82:6473597d706e 208 #define CPU_INT_FAST_CLK_HZ 4000000u /* Value of the fast internal oscillator clock frequency in Hz */
bogdanm 82:6473597d706e 209 #define CPU_INT_IRC_CLK_HZ 48000000u /* Value of the 48M internal oscillator clock frequency in Hz */
bogdanm 82:6473597d706e 210 #define DEFAULT_SYSTEM_CLOCK 8000000u /* Default System clock value */
bogdanm 82:6473597d706e 211 #elif (CLOCK_SETUP == 3)
bogdanm 82:6473597d706e 212 #define CPU_XTAL_CLK_HZ 8000000u /* Value of the external crystal or oscillator clock frequency in Hz */
bogdanm 82:6473597d706e 213 #define CPU_XTAL32k_CLK_HZ 32768u /* Value of the external 32k crystal or oscillator clock frequency in Hz */
bogdanm 82:6473597d706e 214 #define CPU_INT_SLOW_CLK_HZ 32768u /* Value of the slow internal oscillator clock frequency in Hz */
bogdanm 82:6473597d706e 215 #define CPU_INT_FAST_CLK_HZ 4000000u /* Value of the fast internal oscillator clock frequency in Hz */
bogdanm 82:6473597d706e 216 #define CPU_INT_IRC_CLK_HZ 48000000u /* Value of the 48M internal oscillator clock frequency in Hz */
bogdanm 82:6473597d706e 217 #define DEFAULT_SYSTEM_CLOCK 120000000u /* Default System clock value */
bogdanm 82:6473597d706e 218 #endif /* (CLOCK_SETUP == 3) */
bogdanm 82:6473597d706e 219
bogdanm 82:6473597d706e 220 #endif /* CPU types*/
bogdanm 82:6473597d706e 221
bogdanm 82:6473597d706e 222 /*! @}*/
bogdanm 82:6473597d706e 223
bogdanm 82:6473597d706e 224 #endif /* __FSL_CLOCK_CONFIGS_H__*/
bogdanm 82:6473597d706e 225 /*******************************************************************************
bogdanm 82:6473597d706e 226 * EOF
bogdanm 82:6473597d706e 227 ******************************************************************************/
bogdanm 82:6473597d706e 228