erez i / mbed

version_2.0

Dependents:   cc3000_ping_demo_try_2

Fork of mbed by mbed official

TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_K64F/device/MK64F12/MK64F12_osc.h@82:6473597d706e, 2014-04-07 (annotated)

Committer:
bogdanm
Date:
Mon Apr 07 18:28:36 2014 +0100
Revision:
82:6473597d706e
Release 82 of the mbed library



Main changes:



- support for K64F

- Revisited Nordic code structure

- Test infrastructure improvements

- various bug fixes

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 82:6473597d706e 1 /*
bogdanm 82:6473597d706e 2 * Copyright (c) 2014, Freescale Semiconductor, Inc.
bogdanm 82:6473597d706e 3 * All rights reserved.
bogdanm 82:6473597d706e 4 *
bogdanm 82:6473597d706e 5 * THIS SOFTWARE IS PROVIDED BY FREESCALE "AS IS" AND ANY EXPRESS OR IMPLIED
bogdanm 82:6473597d706e 6 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
bogdanm 82:6473597d706e 7 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
bogdanm 82:6473597d706e 8 * SHALL FREESCALE BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
bogdanm 82:6473597d706e 9 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
bogdanm 82:6473597d706e 10 * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
bogdanm 82:6473597d706e 11 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
bogdanm 82:6473597d706e 12 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
bogdanm 82:6473597d706e 13 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
bogdanm 82:6473597d706e 14 * OF SUCH DAMAGE.
bogdanm 82:6473597d706e 15 */
bogdanm 82:6473597d706e 16 /*
bogdanm 82:6473597d706e 17 * WARNING! DO NOT EDIT THIS FILE DIRECTLY!
bogdanm 82:6473597d706e 18 *
bogdanm 82:6473597d706e 19 * This file was generated automatically and any changes may be lost.
bogdanm 82:6473597d706e 20 */
bogdanm 82:6473597d706e 21 #ifndef __HW_OSC_REGISTERS_H__
bogdanm 82:6473597d706e 22 #define __HW_OSC_REGISTERS_H__
bogdanm 82:6473597d706e 23
bogdanm 82:6473597d706e 24 #include "regs.h"
bogdanm 82:6473597d706e 25
bogdanm 82:6473597d706e 26 /*
bogdanm 82:6473597d706e 27 * MK64F12 OSC
bogdanm 82:6473597d706e 28 *
bogdanm 82:6473597d706e 29 * Oscillator
bogdanm 82:6473597d706e 30 *
bogdanm 82:6473597d706e 31 * Registers defined in this header file:
bogdanm 82:6473597d706e 32 * - HW_OSC_CR - OSC Control Register
bogdanm 82:6473597d706e 33 *
bogdanm 82:6473597d706e 34 * - hw_osc_t - Struct containing all module registers.
bogdanm 82:6473597d706e 35 */
bogdanm 82:6473597d706e 36
bogdanm 82:6473597d706e 37 //! @name Module base addresses
bogdanm 82:6473597d706e 38 //@{
bogdanm 82:6473597d706e 39 #ifndef REGS_OSC_BASE
bogdanm 82:6473597d706e 40 #define HW_OSC_INSTANCE_COUNT (1U) //!< Number of instances of the OSC module.
bogdanm 82:6473597d706e 41 #define HW_OSC0 (0U) //!< Instance number for OSC.
bogdanm 82:6473597d706e 42 #define REGS_OSC0_BASE (0x40065000U) //!< Base address for OSC.
bogdanm 82:6473597d706e 43
bogdanm 82:6473597d706e 44 //! @brief Table of base addresses for OSC instances.
bogdanm 82:6473597d706e 45 static const uint32_t __g_regs_OSC_base_addresses[] = {
bogdanm 82:6473597d706e 46 REGS_OSC0_BASE,
bogdanm 82:6473597d706e 47 };
bogdanm 82:6473597d706e 48
bogdanm 82:6473597d706e 49 //! @brief Get the base address of OSC by instance number.
bogdanm 82:6473597d706e 50 //! @param x OSC instance number, from 0 through 0.
bogdanm 82:6473597d706e 51 #define REGS_OSC_BASE(x) (__g_regs_OSC_base_addresses[(x)])
bogdanm 82:6473597d706e 52
bogdanm 82:6473597d706e 53 //! @brief Get the instance number given a base address.
bogdanm 82:6473597d706e 54 //! @param b Base address for an instance of OSC.
bogdanm 82:6473597d706e 55 #define REGS_OSC_INSTANCE(b) ((b) == REGS_OSC0_BASE ? HW_OSC0 : 0)
bogdanm 82:6473597d706e 56 #endif
bogdanm 82:6473597d706e 57 //@}
bogdanm 82:6473597d706e 58
bogdanm 82:6473597d706e 59 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 60 // HW_OSC_CR - OSC Control Register
bogdanm 82:6473597d706e 61 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 62
bogdanm 82:6473597d706e 63 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 64 /*!
bogdanm 82:6473597d706e 65 * @brief HW_OSC_CR - OSC Control Register (RW)
bogdanm 82:6473597d706e 66 *
bogdanm 82:6473597d706e 67 * Reset value: 0x00U
bogdanm 82:6473597d706e 68 *
bogdanm 82:6473597d706e 69 * After OSC is enabled and starts generating the clocks, the configurations
bogdanm 82:6473597d706e 70 * such as low power and frequency range, must not be changed.
bogdanm 82:6473597d706e 71 */
bogdanm 82:6473597d706e 72 typedef union _hw_osc_cr
bogdanm 82:6473597d706e 73 {
bogdanm 82:6473597d706e 74 uint8_t U;
bogdanm 82:6473597d706e 75 struct _hw_osc_cr_bitfields
bogdanm 82:6473597d706e 76 {
bogdanm 82:6473597d706e 77 uint8_t SC16P : 1; //!< [0] Oscillator 16 pF Capacitor Load Configure
bogdanm 82:6473597d706e 78 uint8_t SC8P : 1; //!< [1] Oscillator 8 pF Capacitor Load Configure
bogdanm 82:6473597d706e 79 uint8_t SC4P : 1; //!< [2] Oscillator 4 pF Capacitor Load Configure
bogdanm 82:6473597d706e 80 uint8_t SC2P : 1; //!< [3] Oscillator 2 pF Capacitor Load Configure
bogdanm 82:6473597d706e 81 uint8_t RESERVED0 : 1; //!< [4]
bogdanm 82:6473597d706e 82 uint8_t EREFSTEN : 1; //!< [5] External Reference Stop Enable
bogdanm 82:6473597d706e 83 uint8_t RESERVED1 : 1; //!< [6]
bogdanm 82:6473597d706e 84 uint8_t ERCLKEN : 1; //!< [7] External Reference Enable
bogdanm 82:6473597d706e 85 } B;
bogdanm 82:6473597d706e 86 } hw_osc_cr_t;
bogdanm 82:6473597d706e 87 #endif
bogdanm 82:6473597d706e 88
bogdanm 82:6473597d706e 89 /*!
bogdanm 82:6473597d706e 90 * @name Constants and macros for entire OSC_CR register
bogdanm 82:6473597d706e 91 */
bogdanm 82:6473597d706e 92 //@{
bogdanm 82:6473597d706e 93 #define HW_OSC_CR_ADDR(x) (REGS_OSC_BASE(x) + 0x0U)
bogdanm 82:6473597d706e 94
bogdanm 82:6473597d706e 95 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 96 #define HW_OSC_CR(x) (*(__IO hw_osc_cr_t *) HW_OSC_CR_ADDR(x))
bogdanm 82:6473597d706e 97 #define HW_OSC_CR_RD(x) (HW_OSC_CR(x).U)
bogdanm 82:6473597d706e 98 #define HW_OSC_CR_WR(x, v) (HW_OSC_CR(x).U = (v))
bogdanm 82:6473597d706e 99 #define HW_OSC_CR_SET(x, v) (HW_OSC_CR_WR(x, HW_OSC_CR_RD(x) | (v)))
bogdanm 82:6473597d706e 100 #define HW_OSC_CR_CLR(x, v) (HW_OSC_CR_WR(x, HW_OSC_CR_RD(x) & ~(v)))
bogdanm 82:6473597d706e 101 #define HW_OSC_CR_TOG(x, v) (HW_OSC_CR_WR(x, HW_OSC_CR_RD(x) ^ (v)))
bogdanm 82:6473597d706e 102 #endif
bogdanm 82:6473597d706e 103 //@}
bogdanm 82:6473597d706e 104
bogdanm 82:6473597d706e 105 /*
bogdanm 82:6473597d706e 106 * Constants & macros for individual OSC_CR bitfields
bogdanm 82:6473597d706e 107 */
bogdanm 82:6473597d706e 108
bogdanm 82:6473597d706e 109 /*!
bogdanm 82:6473597d706e 110 * @name Register OSC_CR, field SC16P[0] (RW)
bogdanm 82:6473597d706e 111 *
bogdanm 82:6473597d706e 112 * Configures the oscillator load.
bogdanm 82:6473597d706e 113 *
bogdanm 82:6473597d706e 114 * Values:
bogdanm 82:6473597d706e 115 * - 0 - Disable the selection.
bogdanm 82:6473597d706e 116 * - 1 - Add 16 pF capacitor to the oscillator load.
bogdanm 82:6473597d706e 117 */
bogdanm 82:6473597d706e 118 //@{
bogdanm 82:6473597d706e 119 #define BP_OSC_CR_SC16P (0U) //!< Bit position for OSC_CR_SC16P.
bogdanm 82:6473597d706e 120 #define BM_OSC_CR_SC16P (0x01U) //!< Bit mask for OSC_CR_SC16P.
bogdanm 82:6473597d706e 121 #define BS_OSC_CR_SC16P (1U) //!< Bit field size in bits for OSC_CR_SC16P.
bogdanm 82:6473597d706e 122
bogdanm 82:6473597d706e 123 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 124 //! @brief Read current value of the OSC_CR_SC16P field.
bogdanm 82:6473597d706e 125 #define BR_OSC_CR_SC16P(x) (BITBAND_ACCESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_SC16P))
bogdanm 82:6473597d706e 126 #endif
bogdanm 82:6473597d706e 127
bogdanm 82:6473597d706e 128 //! @brief Format value for bitfield OSC_CR_SC16P.
bogdanm 82:6473597d706e 129 #define BF_OSC_CR_SC16P(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_OSC_CR_SC16P), uint8_t) & BM_OSC_CR_SC16P)
bogdanm 82:6473597d706e 130
bogdanm 82:6473597d706e 131 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 132 //! @brief Set the SC16P field to a new value.
bogdanm 82:6473597d706e 133 #define BW_OSC_CR_SC16P(x, v) (BITBAND_ACCESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_SC16P) = (v))
bogdanm 82:6473597d706e 134 #endif
bogdanm 82:6473597d706e 135 //@}
bogdanm 82:6473597d706e 136
bogdanm 82:6473597d706e 137 /*!
bogdanm 82:6473597d706e 138 * @name Register OSC_CR, field SC8P[1] (RW)
bogdanm 82:6473597d706e 139 *
bogdanm 82:6473597d706e 140 * Configures the oscillator load.
bogdanm 82:6473597d706e 141 *
bogdanm 82:6473597d706e 142 * Values:
bogdanm 82:6473597d706e 143 * - 0 - Disable the selection.
bogdanm 82:6473597d706e 144 * - 1 - Add 8 pF capacitor to the oscillator load.
bogdanm 82:6473597d706e 145 */
bogdanm 82:6473597d706e 146 //@{
bogdanm 82:6473597d706e 147 #define BP_OSC_CR_SC8P (1U) //!< Bit position for OSC_CR_SC8P.
bogdanm 82:6473597d706e 148 #define BM_OSC_CR_SC8P (0x02U) //!< Bit mask for OSC_CR_SC8P.
bogdanm 82:6473597d706e 149 #define BS_OSC_CR_SC8P (1U) //!< Bit field size in bits for OSC_CR_SC8P.
bogdanm 82:6473597d706e 150
bogdanm 82:6473597d706e 151 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 152 //! @brief Read current value of the OSC_CR_SC8P field.
bogdanm 82:6473597d706e 153 #define BR_OSC_CR_SC8P(x) (BITBAND_ACCESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_SC8P))
bogdanm 82:6473597d706e 154 #endif
bogdanm 82:6473597d706e 155
bogdanm 82:6473597d706e 156 //! @brief Format value for bitfield OSC_CR_SC8P.
bogdanm 82:6473597d706e 157 #define BF_OSC_CR_SC8P(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_OSC_CR_SC8P), uint8_t) & BM_OSC_CR_SC8P)
bogdanm 82:6473597d706e 158
bogdanm 82:6473597d706e 159 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 160 //! @brief Set the SC8P field to a new value.
bogdanm 82:6473597d706e 161 #define BW_OSC_CR_SC8P(x, v) (BITBAND_ACCESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_SC8P) = (v))
bogdanm 82:6473597d706e 162 #endif
bogdanm 82:6473597d706e 163 //@}
bogdanm 82:6473597d706e 164
bogdanm 82:6473597d706e 165 /*!
bogdanm 82:6473597d706e 166 * @name Register OSC_CR, field SC4P[2] (RW)
bogdanm 82:6473597d706e 167 *
bogdanm 82:6473597d706e 168 * Configures the oscillator load.
bogdanm 82:6473597d706e 169 *
bogdanm 82:6473597d706e 170 * Values:
bogdanm 82:6473597d706e 171 * - 0 - Disable the selection.
bogdanm 82:6473597d706e 172 * - 1 - Add 4 pF capacitor to the oscillator load.
bogdanm 82:6473597d706e 173 */
bogdanm 82:6473597d706e 174 //@{
bogdanm 82:6473597d706e 175 #define BP_OSC_CR_SC4P (2U) //!< Bit position for OSC_CR_SC4P.
bogdanm 82:6473597d706e 176 #define BM_OSC_CR_SC4P (0x04U) //!< Bit mask for OSC_CR_SC4P.
bogdanm 82:6473597d706e 177 #define BS_OSC_CR_SC4P (1U) //!< Bit field size in bits for OSC_CR_SC4P.
bogdanm 82:6473597d706e 178
bogdanm 82:6473597d706e 179 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 180 //! @brief Read current value of the OSC_CR_SC4P field.
bogdanm 82:6473597d706e 181 #define BR_OSC_CR_SC4P(x) (BITBAND_ACCESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_SC4P))
bogdanm 82:6473597d706e 182 #endif
bogdanm 82:6473597d706e 183
bogdanm 82:6473597d706e 184 //! @brief Format value for bitfield OSC_CR_SC4P.
bogdanm 82:6473597d706e 185 #define BF_OSC_CR_SC4P(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_OSC_CR_SC4P), uint8_t) & BM_OSC_CR_SC4P)
bogdanm 82:6473597d706e 186
bogdanm 82:6473597d706e 187 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 188 //! @brief Set the SC4P field to a new value.
bogdanm 82:6473597d706e 189 #define BW_OSC_CR_SC4P(x, v) (BITBAND_ACCESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_SC4P) = (v))
bogdanm 82:6473597d706e 190 #endif
bogdanm 82:6473597d706e 191 //@}
bogdanm 82:6473597d706e 192
bogdanm 82:6473597d706e 193 /*!
bogdanm 82:6473597d706e 194 * @name Register OSC_CR, field SC2P[3] (RW)
bogdanm 82:6473597d706e 195 *
bogdanm 82:6473597d706e 196 * Configures the oscillator load.
bogdanm 82:6473597d706e 197 *
bogdanm 82:6473597d706e 198 * Values:
bogdanm 82:6473597d706e 199 * - 0 - Disable the selection.
bogdanm 82:6473597d706e 200 * - 1 - Add 2 pF capacitor to the oscillator load.
bogdanm 82:6473597d706e 201 */
bogdanm 82:6473597d706e 202 //@{
bogdanm 82:6473597d706e 203 #define BP_OSC_CR_SC2P (3U) //!< Bit position for OSC_CR_SC2P.
bogdanm 82:6473597d706e 204 #define BM_OSC_CR_SC2P (0x08U) //!< Bit mask for OSC_CR_SC2P.
bogdanm 82:6473597d706e 205 #define BS_OSC_CR_SC2P (1U) //!< Bit field size in bits for OSC_CR_SC2P.
bogdanm 82:6473597d706e 206
bogdanm 82:6473597d706e 207 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 208 //! @brief Read current value of the OSC_CR_SC2P field.
bogdanm 82:6473597d706e 209 #define BR_OSC_CR_SC2P(x) (BITBAND_ACCESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_SC2P))
bogdanm 82:6473597d706e 210 #endif
bogdanm 82:6473597d706e 211
bogdanm 82:6473597d706e 212 //! @brief Format value for bitfield OSC_CR_SC2P.
bogdanm 82:6473597d706e 213 #define BF_OSC_CR_SC2P(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_OSC_CR_SC2P), uint8_t) & BM_OSC_CR_SC2P)
bogdanm 82:6473597d706e 214
bogdanm 82:6473597d706e 215 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 216 //! @brief Set the SC2P field to a new value.
bogdanm 82:6473597d706e 217 #define BW_OSC_CR_SC2P(x, v) (BITBAND_ACCESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_SC2P) = (v))
bogdanm 82:6473597d706e 218 #endif
bogdanm 82:6473597d706e 219 //@}
bogdanm 82:6473597d706e 220
bogdanm 82:6473597d706e 221 /*!
bogdanm 82:6473597d706e 222 * @name Register OSC_CR, field EREFSTEN[5] (RW)
bogdanm 82:6473597d706e 223 *
bogdanm 82:6473597d706e 224 * Controls whether or not the external reference clock (OSCERCLK) remains
bogdanm 82:6473597d706e 225 * enabled when MCU enters Stop mode.
bogdanm 82:6473597d706e 226 *
bogdanm 82:6473597d706e 227 * Values:
bogdanm 82:6473597d706e 228 * - 0 - External reference clock is disabled in Stop mode.
bogdanm 82:6473597d706e 229 * - 1 - External reference clock stays enabled in Stop mode if ERCLKEN is set
bogdanm 82:6473597d706e 230 * before entering Stop mode.
bogdanm 82:6473597d706e 231 */
bogdanm 82:6473597d706e 232 //@{
bogdanm 82:6473597d706e 233 #define BP_OSC_CR_EREFSTEN (5U) //!< Bit position for OSC_CR_EREFSTEN.
bogdanm 82:6473597d706e 234 #define BM_OSC_CR_EREFSTEN (0x20U) //!< Bit mask for OSC_CR_EREFSTEN.
bogdanm 82:6473597d706e 235 #define BS_OSC_CR_EREFSTEN (1U) //!< Bit field size in bits for OSC_CR_EREFSTEN.
bogdanm 82:6473597d706e 236
bogdanm 82:6473597d706e 237 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 238 //! @brief Read current value of the OSC_CR_EREFSTEN field.
bogdanm 82:6473597d706e 239 #define BR_OSC_CR_EREFSTEN(x) (BITBAND_ACCESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_EREFSTEN))
bogdanm 82:6473597d706e 240 #endif
bogdanm 82:6473597d706e 241
bogdanm 82:6473597d706e 242 //! @brief Format value for bitfield OSC_CR_EREFSTEN.
bogdanm 82:6473597d706e 243 #define BF_OSC_CR_EREFSTEN(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_OSC_CR_EREFSTEN), uint8_t) & BM_OSC_CR_EREFSTEN)
bogdanm 82:6473597d706e 244
bogdanm 82:6473597d706e 245 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 246 //! @brief Set the EREFSTEN field to a new value.
bogdanm 82:6473597d706e 247 #define BW_OSC_CR_EREFSTEN(x, v) (BITBAND_ACCESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_EREFSTEN) = (v))
bogdanm 82:6473597d706e 248 #endif
bogdanm 82:6473597d706e 249 //@}
bogdanm 82:6473597d706e 250
bogdanm 82:6473597d706e 251 /*!
bogdanm 82:6473597d706e 252 * @name Register OSC_CR, field ERCLKEN[7] (RW)
bogdanm 82:6473597d706e 253 *
bogdanm 82:6473597d706e 254 * Enables external reference clock (OSCERCLK).
bogdanm 82:6473597d706e 255 *
bogdanm 82:6473597d706e 256 * Values:
bogdanm 82:6473597d706e 257 * - 0 - External reference clock is inactive.
bogdanm 82:6473597d706e 258 * - 1 - External reference clock is enabled.
bogdanm 82:6473597d706e 259 */
bogdanm 82:6473597d706e 260 //@{
bogdanm 82:6473597d706e 261 #define BP_OSC_CR_ERCLKEN (7U) //!< Bit position for OSC_CR_ERCLKEN.
bogdanm 82:6473597d706e 262 #define BM_OSC_CR_ERCLKEN (0x80U) //!< Bit mask for OSC_CR_ERCLKEN.
bogdanm 82:6473597d706e 263 #define BS_OSC_CR_ERCLKEN (1U) //!< Bit field size in bits for OSC_CR_ERCLKEN.
bogdanm 82:6473597d706e 264
bogdanm 82:6473597d706e 265 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 266 //! @brief Read current value of the OSC_CR_ERCLKEN field.
bogdanm 82:6473597d706e 267 #define BR_OSC_CR_ERCLKEN(x) (BITBAND_ACCESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_ERCLKEN))
bogdanm 82:6473597d706e 268 #endif
bogdanm 82:6473597d706e 269
bogdanm 82:6473597d706e 270 //! @brief Format value for bitfield OSC_CR_ERCLKEN.
bogdanm 82:6473597d706e 271 #define BF_OSC_CR_ERCLKEN(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_OSC_CR_ERCLKEN), uint8_t) & BM_OSC_CR_ERCLKEN)
bogdanm 82:6473597d706e 272
bogdanm 82:6473597d706e 273 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 274 //! @brief Set the ERCLKEN field to a new value.
bogdanm 82:6473597d706e 275 #define BW_OSC_CR_ERCLKEN(x, v) (BITBAND_ACCESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_ERCLKEN) = (v))
bogdanm 82:6473597d706e 276 #endif
bogdanm 82:6473597d706e 277 //@}
bogdanm 82:6473597d706e 278
bogdanm 82:6473597d706e 279 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 280 // hw_osc_t - module struct
bogdanm 82:6473597d706e 281 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 282 /*!
bogdanm 82:6473597d706e 283 * @brief All OSC module registers.
bogdanm 82:6473597d706e 284 */
bogdanm 82:6473597d706e 285 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 286 #pragma pack(1)
bogdanm 82:6473597d706e 287 typedef struct _hw_osc
bogdanm 82:6473597d706e 288 {
bogdanm 82:6473597d706e 289 __IO hw_osc_cr_t CR; //!< [0x0] OSC Control Register
bogdanm 82:6473597d706e 290 } hw_osc_t;
bogdanm 82:6473597d706e 291 #pragma pack()
bogdanm 82:6473597d706e 292
bogdanm 82:6473597d706e 293 //! @brief Macro to access all OSC registers.
bogdanm 82:6473597d706e 294 //! @param x OSC instance number.
bogdanm 82:6473597d706e 295 //! @return Reference (not a pointer) to the registers struct. To get a pointer to the struct,
bogdanm 82:6473597d706e 296 //! use the '&' operator, like <code>&HW_OSC(0)</code>.
bogdanm 82:6473597d706e 297 #define HW_OSC(x) (*(hw_osc_t *) REGS_OSC_BASE(x))
bogdanm 82:6473597d706e 298 #endif
bogdanm 82:6473597d706e 299
bogdanm 82:6473597d706e 300 #endif // __HW_OSC_REGISTERS_H__
bogdanm 82:6473597d706e 301 // v22/130726/0.9
bogdanm 82:6473597d706e 302 // EOF