erez i / mbed

version_2.0

Dependents:   cc3000_ping_demo_try_2

Fork of mbed by mbed official

TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_K64F/device/MK64F12/MK64F12_aips.h@82:6473597d706e, 2014-04-07 (annotated)

Committer:
bogdanm
Date:
Mon Apr 07 18:28:36 2014 +0100
Revision:
82:6473597d706e
Release 82 of the mbed library



Main changes:



- support for K64F

- Revisited Nordic code structure

- Test infrastructure improvements

- various bug fixes

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 82:6473597d706e 1 /*
bogdanm 82:6473597d706e 2 * Copyright (c) 2014, Freescale Semiconductor, Inc.
bogdanm 82:6473597d706e 3 * All rights reserved.
bogdanm 82:6473597d706e 4 *
bogdanm 82:6473597d706e 5 * THIS SOFTWARE IS PROVIDED BY FREESCALE "AS IS" AND ANY EXPRESS OR IMPLIED
bogdanm 82:6473597d706e 6 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
bogdanm 82:6473597d706e 7 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
bogdanm 82:6473597d706e 8 * SHALL FREESCALE BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
bogdanm 82:6473597d706e 9 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
bogdanm 82:6473597d706e 10 * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
bogdanm 82:6473597d706e 11 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
bogdanm 82:6473597d706e 12 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
bogdanm 82:6473597d706e 13 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
bogdanm 82:6473597d706e 14 * OF SUCH DAMAGE.
bogdanm 82:6473597d706e 15 */
bogdanm 82:6473597d706e 16 /*
bogdanm 82:6473597d706e 17 * WARNING! DO NOT EDIT THIS FILE DIRECTLY!
bogdanm 82:6473597d706e 18 *
bogdanm 82:6473597d706e 19 * This file was generated automatically and any changes may be lost.
bogdanm 82:6473597d706e 20 */
bogdanm 82:6473597d706e 21 #ifndef __HW_AIPS_REGISTERS_H__
bogdanm 82:6473597d706e 22 #define __HW_AIPS_REGISTERS_H__
bogdanm 82:6473597d706e 23
bogdanm 82:6473597d706e 24 #include "regs.h"
bogdanm 82:6473597d706e 25
bogdanm 82:6473597d706e 26 /*
bogdanm 82:6473597d706e 27 * MK64F12 AIPS
bogdanm 82:6473597d706e 28 *
bogdanm 82:6473597d706e 29 * AIPS-Lite Bridge
bogdanm 82:6473597d706e 30 *
bogdanm 82:6473597d706e 31 * Registers defined in this header file:
bogdanm 82:6473597d706e 32 * - HW_AIPS_MPRA - Master Privilege Register A
bogdanm 82:6473597d706e 33 * - HW_AIPS_PACRA - Peripheral Access Control Register
bogdanm 82:6473597d706e 34 * - HW_AIPS_PACRB - Peripheral Access Control Register
bogdanm 82:6473597d706e 35 * - HW_AIPS_PACRC - Peripheral Access Control Register
bogdanm 82:6473597d706e 36 * - HW_AIPS_PACRD - Peripheral Access Control Register
bogdanm 82:6473597d706e 37 * - HW_AIPS_PACRE - Peripheral Access Control Register
bogdanm 82:6473597d706e 38 * - HW_AIPS_PACRF - Peripheral Access Control Register
bogdanm 82:6473597d706e 39 * - HW_AIPS_PACRG - Peripheral Access Control Register
bogdanm 82:6473597d706e 40 * - HW_AIPS_PACRH - Peripheral Access Control Register
bogdanm 82:6473597d706e 41 * - HW_AIPS_PACRI - Peripheral Access Control Register
bogdanm 82:6473597d706e 42 * - HW_AIPS_PACRJ - Peripheral Access Control Register
bogdanm 82:6473597d706e 43 * - HW_AIPS_PACRK - Peripheral Access Control Register
bogdanm 82:6473597d706e 44 * - HW_AIPS_PACRL - Peripheral Access Control Register
bogdanm 82:6473597d706e 45 * - HW_AIPS_PACRM - Peripheral Access Control Register
bogdanm 82:6473597d706e 46 * - HW_AIPS_PACRN - Peripheral Access Control Register
bogdanm 82:6473597d706e 47 * - HW_AIPS_PACRO - Peripheral Access Control Register
bogdanm 82:6473597d706e 48 * - HW_AIPS_PACRP - Peripheral Access Control Register
bogdanm 82:6473597d706e 49 * - HW_AIPS_PACRU - Peripheral Access Control Register
bogdanm 82:6473597d706e 50 *
bogdanm 82:6473597d706e 51 * - hw_aips_t - Struct containing all module registers.
bogdanm 82:6473597d706e 52 */
bogdanm 82:6473597d706e 53
bogdanm 82:6473597d706e 54 //! @name Module base addresses
bogdanm 82:6473597d706e 55 //@{
bogdanm 82:6473597d706e 56 #ifndef REGS_AIPS_BASE
bogdanm 82:6473597d706e 57 #define HW_AIPS_INSTANCE_COUNT (2U) //!< Number of instances of the AIPS module.
bogdanm 82:6473597d706e 58 #define HW_AIPS0 (0U) //!< Instance number for AIPS0.
bogdanm 82:6473597d706e 59 #define HW_AIPS1 (1U) //!< Instance number for AIPS1.
bogdanm 82:6473597d706e 60 #define REGS_AIPS0_BASE (0x40000000U) //!< Base address for AIPS0.
bogdanm 82:6473597d706e 61 #define REGS_AIPS1_BASE (0x40080000U) //!< Base address for AIPS1.
bogdanm 82:6473597d706e 62
bogdanm 82:6473597d706e 63 //! @brief Table of base addresses for AIPS instances.
bogdanm 82:6473597d706e 64 static const uint32_t __g_regs_AIPS_base_addresses[] = {
bogdanm 82:6473597d706e 65 REGS_AIPS0_BASE,
bogdanm 82:6473597d706e 66 REGS_AIPS1_BASE,
bogdanm 82:6473597d706e 67 };
bogdanm 82:6473597d706e 68
bogdanm 82:6473597d706e 69 //! @brief Get the base address of AIPS by instance number.
bogdanm 82:6473597d706e 70 //! @param x AIPS instance number, from 0 through 1.
bogdanm 82:6473597d706e 71 #define REGS_AIPS_BASE(x) (__g_regs_AIPS_base_addresses[(x)])
bogdanm 82:6473597d706e 72
bogdanm 82:6473597d706e 73 //! @brief Get the instance number given a base address.
bogdanm 82:6473597d706e 74 //! @param b Base address for an instance of AIPS.
bogdanm 82:6473597d706e 75 #define REGS_AIPS_INSTANCE(b) ((b) == REGS_AIPS0_BASE ? HW_AIPS0 : (b) == REGS_AIPS1_BASE ? HW_AIPS1 : 0)
bogdanm 82:6473597d706e 76 #endif
bogdanm 82:6473597d706e 77 //@}
bogdanm 82:6473597d706e 78
bogdanm 82:6473597d706e 79 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 80 // HW_AIPS_MPRA - Master Privilege Register A
bogdanm 82:6473597d706e 81 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 82
bogdanm 82:6473597d706e 83 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 84 /*!
bogdanm 82:6473597d706e 85 * @brief HW_AIPS_MPRA - Master Privilege Register A (RW)
bogdanm 82:6473597d706e 86 *
bogdanm 82:6473597d706e 87 * Reset value: 0x77700000U
bogdanm 82:6473597d706e 88 *
bogdanm 82:6473597d706e 89 * The MPRA specifies identical 4-bit fields defining the access-privilege level
bogdanm 82:6473597d706e 90 * associated with a bus master to various peripherals on the chip. The register
bogdanm 82:6473597d706e 91 * provides one field per bus master. At reset, the default value loaded into
bogdanm 82:6473597d706e 92 * the MPRA fields is chip-specific. See the chip configuration details for the
bogdanm 82:6473597d706e 93 * value of a particular device. A register field that maps to an unimplemented
bogdanm 82:6473597d706e 94 * master or peripheral behaves as read-only-zero. Each master is assigned a logical
bogdanm 82:6473597d706e 95 * ID from 0 to 15. See the master logical ID assignment table in the
bogdanm 82:6473597d706e 96 * chip-specific AIPS information.
bogdanm 82:6473597d706e 97 */
bogdanm 82:6473597d706e 98 typedef union _hw_aips_mpra
bogdanm 82:6473597d706e 99 {
bogdanm 82:6473597d706e 100 uint32_t U;
bogdanm 82:6473597d706e 101 struct _hw_aips_mpra_bitfields
bogdanm 82:6473597d706e 102 {
bogdanm 82:6473597d706e 103 uint32_t RESERVED0 : 8; //!< [7:0]
bogdanm 82:6473597d706e 104 uint32_t MPL5 : 1; //!< [8] Master 5 Privilege Level
bogdanm 82:6473597d706e 105 uint32_t MTW5 : 1; //!< [9] Master 5 Trusted For Writes
bogdanm 82:6473597d706e 106 uint32_t MTR5 : 1; //!< [10] Master 5 Trusted For Read
bogdanm 82:6473597d706e 107 uint32_t RESERVED1 : 1; //!< [11]
bogdanm 82:6473597d706e 108 uint32_t MPL4 : 1; //!< [12] Master 4 Privilege Level
bogdanm 82:6473597d706e 109 uint32_t MTW4 : 1; //!< [13] Master 4 Trusted For Writes
bogdanm 82:6473597d706e 110 uint32_t MTR4 : 1; //!< [14] Master 4 Trusted For Read
bogdanm 82:6473597d706e 111 uint32_t RESERVED2 : 1; //!< [15]
bogdanm 82:6473597d706e 112 uint32_t MPL3 : 1; //!< [16] Master 3 Privilege Level
bogdanm 82:6473597d706e 113 uint32_t MTW3 : 1; //!< [17] Master 3 Trusted For Writes
bogdanm 82:6473597d706e 114 uint32_t MTR3 : 1; //!< [18] Master 3 Trusted For Read
bogdanm 82:6473597d706e 115 uint32_t RESERVED3 : 1; //!< [19]
bogdanm 82:6473597d706e 116 uint32_t MPL2 : 1; //!< [20] Master 2 Privilege Level
bogdanm 82:6473597d706e 117 uint32_t MTW2 : 1; //!< [21] Master 2 Trusted For Writes
bogdanm 82:6473597d706e 118 uint32_t MTR2 : 1; //!< [22] Master 2 Trusted For Read
bogdanm 82:6473597d706e 119 uint32_t RESERVED4 : 1; //!< [23]
bogdanm 82:6473597d706e 120 uint32_t MPL1 : 1; //!< [24] Master 1 Privilege Level
bogdanm 82:6473597d706e 121 uint32_t MTW1 : 1; //!< [25] Master 1 Trusted for Writes
bogdanm 82:6473597d706e 122 uint32_t MTR1 : 1; //!< [26] Master 1 Trusted for Read
bogdanm 82:6473597d706e 123 uint32_t RESERVED5 : 1; //!< [27]
bogdanm 82:6473597d706e 124 uint32_t MPL0 : 1; //!< [28] Master 0 Privilege Level
bogdanm 82:6473597d706e 125 uint32_t MTW0 : 1; //!< [29] Master 0 Trusted For Writes
bogdanm 82:6473597d706e 126 uint32_t MTR0 : 1; //!< [30] Master 0 Trusted For Read
bogdanm 82:6473597d706e 127 uint32_t RESERVED6 : 1; //!< [31]
bogdanm 82:6473597d706e 128 } B;
bogdanm 82:6473597d706e 129 } hw_aips_mpra_t;
bogdanm 82:6473597d706e 130 #endif
bogdanm 82:6473597d706e 131
bogdanm 82:6473597d706e 132 /*!
bogdanm 82:6473597d706e 133 * @name Constants and macros for entire AIPS_MPRA register
bogdanm 82:6473597d706e 134 */
bogdanm 82:6473597d706e 135 //@{
bogdanm 82:6473597d706e 136 #define HW_AIPS_MPRA_ADDR(x) (REGS_AIPS_BASE(x) + 0x0U)
bogdanm 82:6473597d706e 137
bogdanm 82:6473597d706e 138 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 139 #define HW_AIPS_MPRA(x) (*(__IO hw_aips_mpra_t *) HW_AIPS_MPRA_ADDR(x))
bogdanm 82:6473597d706e 140 #define HW_AIPS_MPRA_RD(x) (HW_AIPS_MPRA(x).U)
bogdanm 82:6473597d706e 141 #define HW_AIPS_MPRA_WR(x, v) (HW_AIPS_MPRA(x).U = (v))
bogdanm 82:6473597d706e 142 #define HW_AIPS_MPRA_SET(x, v) (HW_AIPS_MPRA_WR(x, HW_AIPS_MPRA_RD(x) | (v)))
bogdanm 82:6473597d706e 143 #define HW_AIPS_MPRA_CLR(x, v) (HW_AIPS_MPRA_WR(x, HW_AIPS_MPRA_RD(x) & ~(v)))
bogdanm 82:6473597d706e 144 #define HW_AIPS_MPRA_TOG(x, v) (HW_AIPS_MPRA_WR(x, HW_AIPS_MPRA_RD(x) ^ (v)))
bogdanm 82:6473597d706e 145 #endif
bogdanm 82:6473597d706e 146 //@}
bogdanm 82:6473597d706e 147
bogdanm 82:6473597d706e 148 /*
bogdanm 82:6473597d706e 149 * Constants & macros for individual AIPS_MPRA bitfields
bogdanm 82:6473597d706e 150 */
bogdanm 82:6473597d706e 151
bogdanm 82:6473597d706e 152 /*!
bogdanm 82:6473597d706e 153 * @name Register AIPS_MPRA, field MPL5[8] (RW)
bogdanm 82:6473597d706e 154 *
bogdanm 82:6473597d706e 155 * Specifies how the privilege level of the master is determined.
bogdanm 82:6473597d706e 156 *
bogdanm 82:6473597d706e 157 * Values:
bogdanm 82:6473597d706e 158 * - 0 - Accesses from this master are forced to user-mode.
bogdanm 82:6473597d706e 159 * - 1 - Accesses from this master are not forced to user-mode.
bogdanm 82:6473597d706e 160 */
bogdanm 82:6473597d706e 161 //@{
bogdanm 82:6473597d706e 162 #define BP_AIPS_MPRA_MPL5 (8U) //!< Bit position for AIPS_MPRA_MPL5.
bogdanm 82:6473597d706e 163 #define BM_AIPS_MPRA_MPL5 (0x00000100U) //!< Bit mask for AIPS_MPRA_MPL5.
bogdanm 82:6473597d706e 164 #define BS_AIPS_MPRA_MPL5 (1U) //!< Bit field size in bits for AIPS_MPRA_MPL5.
bogdanm 82:6473597d706e 165
bogdanm 82:6473597d706e 166 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 167 //! @brief Read current value of the AIPS_MPRA_MPL5 field.
bogdanm 82:6473597d706e 168 #define BR_AIPS_MPRA_MPL5(x) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MPL5))
bogdanm 82:6473597d706e 169 #endif
bogdanm 82:6473597d706e 170
bogdanm 82:6473597d706e 171 //! @brief Format value for bitfield AIPS_MPRA_MPL5.
bogdanm 82:6473597d706e 172 #define BF_AIPS_MPRA_MPL5(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_MPRA_MPL5), uint32_t) & BM_AIPS_MPRA_MPL5)
bogdanm 82:6473597d706e 173
bogdanm 82:6473597d706e 174 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 175 //! @brief Set the MPL5 field to a new value.
bogdanm 82:6473597d706e 176 #define BW_AIPS_MPRA_MPL5(x, v) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MPL5) = (v))
bogdanm 82:6473597d706e 177 #endif
bogdanm 82:6473597d706e 178 //@}
bogdanm 82:6473597d706e 179
bogdanm 82:6473597d706e 180 /*!
bogdanm 82:6473597d706e 181 * @name Register AIPS_MPRA, field MTW5[9] (RW)
bogdanm 82:6473597d706e 182 *
bogdanm 82:6473597d706e 183 * Determines whether the master is trusted for write accesses.
bogdanm 82:6473597d706e 184 *
bogdanm 82:6473597d706e 185 * Values:
bogdanm 82:6473597d706e 186 * - 0 - This master is not trusted for write accesses.
bogdanm 82:6473597d706e 187 * - 1 - This master is trusted for write accesses.
bogdanm 82:6473597d706e 188 */
bogdanm 82:6473597d706e 189 //@{
bogdanm 82:6473597d706e 190 #define BP_AIPS_MPRA_MTW5 (9U) //!< Bit position for AIPS_MPRA_MTW5.
bogdanm 82:6473597d706e 191 #define BM_AIPS_MPRA_MTW5 (0x00000200U) //!< Bit mask for AIPS_MPRA_MTW5.
bogdanm 82:6473597d706e 192 #define BS_AIPS_MPRA_MTW5 (1U) //!< Bit field size in bits for AIPS_MPRA_MTW5.
bogdanm 82:6473597d706e 193
bogdanm 82:6473597d706e 194 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 195 //! @brief Read current value of the AIPS_MPRA_MTW5 field.
bogdanm 82:6473597d706e 196 #define BR_AIPS_MPRA_MTW5(x) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTW5))
bogdanm 82:6473597d706e 197 #endif
bogdanm 82:6473597d706e 198
bogdanm 82:6473597d706e 199 //! @brief Format value for bitfield AIPS_MPRA_MTW5.
bogdanm 82:6473597d706e 200 #define BF_AIPS_MPRA_MTW5(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_MPRA_MTW5), uint32_t) & BM_AIPS_MPRA_MTW5)
bogdanm 82:6473597d706e 201
bogdanm 82:6473597d706e 202 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 203 //! @brief Set the MTW5 field to a new value.
bogdanm 82:6473597d706e 204 #define BW_AIPS_MPRA_MTW5(x, v) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTW5) = (v))
bogdanm 82:6473597d706e 205 #endif
bogdanm 82:6473597d706e 206 //@}
bogdanm 82:6473597d706e 207
bogdanm 82:6473597d706e 208 /*!
bogdanm 82:6473597d706e 209 * @name Register AIPS_MPRA, field MTR5[10] (RW)
bogdanm 82:6473597d706e 210 *
bogdanm 82:6473597d706e 211 * Determines whether the master is trusted for read accesses.
bogdanm 82:6473597d706e 212 *
bogdanm 82:6473597d706e 213 * Values:
bogdanm 82:6473597d706e 214 * - 0 - This master is not trusted for read accesses.
bogdanm 82:6473597d706e 215 * - 1 - This master is trusted for read accesses.
bogdanm 82:6473597d706e 216 */
bogdanm 82:6473597d706e 217 //@{
bogdanm 82:6473597d706e 218 #define BP_AIPS_MPRA_MTR5 (10U) //!< Bit position for AIPS_MPRA_MTR5.
bogdanm 82:6473597d706e 219 #define BM_AIPS_MPRA_MTR5 (0x00000400U) //!< Bit mask for AIPS_MPRA_MTR5.
bogdanm 82:6473597d706e 220 #define BS_AIPS_MPRA_MTR5 (1U) //!< Bit field size in bits for AIPS_MPRA_MTR5.
bogdanm 82:6473597d706e 221
bogdanm 82:6473597d706e 222 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 223 //! @brief Read current value of the AIPS_MPRA_MTR5 field.
bogdanm 82:6473597d706e 224 #define BR_AIPS_MPRA_MTR5(x) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTR5))
bogdanm 82:6473597d706e 225 #endif
bogdanm 82:6473597d706e 226
bogdanm 82:6473597d706e 227 //! @brief Format value for bitfield AIPS_MPRA_MTR5.
bogdanm 82:6473597d706e 228 #define BF_AIPS_MPRA_MTR5(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_MPRA_MTR5), uint32_t) & BM_AIPS_MPRA_MTR5)
bogdanm 82:6473597d706e 229
bogdanm 82:6473597d706e 230 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 231 //! @brief Set the MTR5 field to a new value.
bogdanm 82:6473597d706e 232 #define BW_AIPS_MPRA_MTR5(x, v) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTR5) = (v))
bogdanm 82:6473597d706e 233 #endif
bogdanm 82:6473597d706e 234 //@}
bogdanm 82:6473597d706e 235
bogdanm 82:6473597d706e 236 /*!
bogdanm 82:6473597d706e 237 * @name Register AIPS_MPRA, field MPL4[12] (RW)
bogdanm 82:6473597d706e 238 *
bogdanm 82:6473597d706e 239 * Specifies how the privilege level of the master is determined.
bogdanm 82:6473597d706e 240 *
bogdanm 82:6473597d706e 241 * Values:
bogdanm 82:6473597d706e 242 * - 0 - Accesses from this master are forced to user-mode.
bogdanm 82:6473597d706e 243 * - 1 - Accesses from this master are not forced to user-mode.
bogdanm 82:6473597d706e 244 */
bogdanm 82:6473597d706e 245 //@{
bogdanm 82:6473597d706e 246 #define BP_AIPS_MPRA_MPL4 (12U) //!< Bit position for AIPS_MPRA_MPL4.
bogdanm 82:6473597d706e 247 #define BM_AIPS_MPRA_MPL4 (0x00001000U) //!< Bit mask for AIPS_MPRA_MPL4.
bogdanm 82:6473597d706e 248 #define BS_AIPS_MPRA_MPL4 (1U) //!< Bit field size in bits for AIPS_MPRA_MPL4.
bogdanm 82:6473597d706e 249
bogdanm 82:6473597d706e 250 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 251 //! @brief Read current value of the AIPS_MPRA_MPL4 field.
bogdanm 82:6473597d706e 252 #define BR_AIPS_MPRA_MPL4(x) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MPL4))
bogdanm 82:6473597d706e 253 #endif
bogdanm 82:6473597d706e 254
bogdanm 82:6473597d706e 255 //! @brief Format value for bitfield AIPS_MPRA_MPL4.
bogdanm 82:6473597d706e 256 #define BF_AIPS_MPRA_MPL4(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_MPRA_MPL4), uint32_t) & BM_AIPS_MPRA_MPL4)
bogdanm 82:6473597d706e 257
bogdanm 82:6473597d706e 258 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 259 //! @brief Set the MPL4 field to a new value.
bogdanm 82:6473597d706e 260 #define BW_AIPS_MPRA_MPL4(x, v) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MPL4) = (v))
bogdanm 82:6473597d706e 261 #endif
bogdanm 82:6473597d706e 262 //@}
bogdanm 82:6473597d706e 263
bogdanm 82:6473597d706e 264 /*!
bogdanm 82:6473597d706e 265 * @name Register AIPS_MPRA, field MTW4[13] (RW)
bogdanm 82:6473597d706e 266 *
bogdanm 82:6473597d706e 267 * Determines whether the master is trusted for write accesses.
bogdanm 82:6473597d706e 268 *
bogdanm 82:6473597d706e 269 * Values:
bogdanm 82:6473597d706e 270 * - 0 - This master is not trusted for write accesses.
bogdanm 82:6473597d706e 271 * - 1 - This master is trusted for write accesses.
bogdanm 82:6473597d706e 272 */
bogdanm 82:6473597d706e 273 //@{
bogdanm 82:6473597d706e 274 #define BP_AIPS_MPRA_MTW4 (13U) //!< Bit position for AIPS_MPRA_MTW4.
bogdanm 82:6473597d706e 275 #define BM_AIPS_MPRA_MTW4 (0x00002000U) //!< Bit mask for AIPS_MPRA_MTW4.
bogdanm 82:6473597d706e 276 #define BS_AIPS_MPRA_MTW4 (1U) //!< Bit field size in bits for AIPS_MPRA_MTW4.
bogdanm 82:6473597d706e 277
bogdanm 82:6473597d706e 278 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 279 //! @brief Read current value of the AIPS_MPRA_MTW4 field.
bogdanm 82:6473597d706e 280 #define BR_AIPS_MPRA_MTW4(x) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTW4))
bogdanm 82:6473597d706e 281 #endif
bogdanm 82:6473597d706e 282
bogdanm 82:6473597d706e 283 //! @brief Format value for bitfield AIPS_MPRA_MTW4.
bogdanm 82:6473597d706e 284 #define BF_AIPS_MPRA_MTW4(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_MPRA_MTW4), uint32_t) & BM_AIPS_MPRA_MTW4)
bogdanm 82:6473597d706e 285
bogdanm 82:6473597d706e 286 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 287 //! @brief Set the MTW4 field to a new value.
bogdanm 82:6473597d706e 288 #define BW_AIPS_MPRA_MTW4(x, v) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTW4) = (v))
bogdanm 82:6473597d706e 289 #endif
bogdanm 82:6473597d706e 290 //@}
bogdanm 82:6473597d706e 291
bogdanm 82:6473597d706e 292 /*!
bogdanm 82:6473597d706e 293 * @name Register AIPS_MPRA, field MTR4[14] (RW)
bogdanm 82:6473597d706e 294 *
bogdanm 82:6473597d706e 295 * Determines whether the master is trusted for read accesses.
bogdanm 82:6473597d706e 296 *
bogdanm 82:6473597d706e 297 * Values:
bogdanm 82:6473597d706e 298 * - 0 - This master is not trusted for read accesses.
bogdanm 82:6473597d706e 299 * - 1 - This master is trusted for read accesses.
bogdanm 82:6473597d706e 300 */
bogdanm 82:6473597d706e 301 //@{
bogdanm 82:6473597d706e 302 #define BP_AIPS_MPRA_MTR4 (14U) //!< Bit position for AIPS_MPRA_MTR4.
bogdanm 82:6473597d706e 303 #define BM_AIPS_MPRA_MTR4 (0x00004000U) //!< Bit mask for AIPS_MPRA_MTR4.
bogdanm 82:6473597d706e 304 #define BS_AIPS_MPRA_MTR4 (1U) //!< Bit field size in bits for AIPS_MPRA_MTR4.
bogdanm 82:6473597d706e 305
bogdanm 82:6473597d706e 306 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 307 //! @brief Read current value of the AIPS_MPRA_MTR4 field.
bogdanm 82:6473597d706e 308 #define BR_AIPS_MPRA_MTR4(x) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTR4))
bogdanm 82:6473597d706e 309 #endif
bogdanm 82:6473597d706e 310
bogdanm 82:6473597d706e 311 //! @brief Format value for bitfield AIPS_MPRA_MTR4.
bogdanm 82:6473597d706e 312 #define BF_AIPS_MPRA_MTR4(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_MPRA_MTR4), uint32_t) & BM_AIPS_MPRA_MTR4)
bogdanm 82:6473597d706e 313
bogdanm 82:6473597d706e 314 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 315 //! @brief Set the MTR4 field to a new value.
bogdanm 82:6473597d706e 316 #define BW_AIPS_MPRA_MTR4(x, v) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTR4) = (v))
bogdanm 82:6473597d706e 317 #endif
bogdanm 82:6473597d706e 318 //@}
bogdanm 82:6473597d706e 319
bogdanm 82:6473597d706e 320 /*!
bogdanm 82:6473597d706e 321 * @name Register AIPS_MPRA, field MPL3[16] (RW)
bogdanm 82:6473597d706e 322 *
bogdanm 82:6473597d706e 323 * Specifies how the privilege level of the master is determined.
bogdanm 82:6473597d706e 324 *
bogdanm 82:6473597d706e 325 * Values:
bogdanm 82:6473597d706e 326 * - 0 - Accesses from this master are forced to user-mode.
bogdanm 82:6473597d706e 327 * - 1 - Accesses from this master are not forced to user-mode.
bogdanm 82:6473597d706e 328 */
bogdanm 82:6473597d706e 329 //@{
bogdanm 82:6473597d706e 330 #define BP_AIPS_MPRA_MPL3 (16U) //!< Bit position for AIPS_MPRA_MPL3.
bogdanm 82:6473597d706e 331 #define BM_AIPS_MPRA_MPL3 (0x00010000U) //!< Bit mask for AIPS_MPRA_MPL3.
bogdanm 82:6473597d706e 332 #define BS_AIPS_MPRA_MPL3 (1U) //!< Bit field size in bits for AIPS_MPRA_MPL3.
bogdanm 82:6473597d706e 333
bogdanm 82:6473597d706e 334 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 335 //! @brief Read current value of the AIPS_MPRA_MPL3 field.
bogdanm 82:6473597d706e 336 #define BR_AIPS_MPRA_MPL3(x) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MPL3))
bogdanm 82:6473597d706e 337 #endif
bogdanm 82:6473597d706e 338
bogdanm 82:6473597d706e 339 //! @brief Format value for bitfield AIPS_MPRA_MPL3.
bogdanm 82:6473597d706e 340 #define BF_AIPS_MPRA_MPL3(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_MPRA_MPL3), uint32_t) & BM_AIPS_MPRA_MPL3)
bogdanm 82:6473597d706e 341
bogdanm 82:6473597d706e 342 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 343 //! @brief Set the MPL3 field to a new value.
bogdanm 82:6473597d706e 344 #define BW_AIPS_MPRA_MPL3(x, v) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MPL3) = (v))
bogdanm 82:6473597d706e 345 #endif
bogdanm 82:6473597d706e 346 //@}
bogdanm 82:6473597d706e 347
bogdanm 82:6473597d706e 348 /*!
bogdanm 82:6473597d706e 349 * @name Register AIPS_MPRA, field MTW3[17] (RW)
bogdanm 82:6473597d706e 350 *
bogdanm 82:6473597d706e 351 * Determines whether the master is trusted for write accesses.
bogdanm 82:6473597d706e 352 *
bogdanm 82:6473597d706e 353 * Values:
bogdanm 82:6473597d706e 354 * - 0 - This master is not trusted for write accesses.
bogdanm 82:6473597d706e 355 * - 1 - This master is trusted for write accesses.
bogdanm 82:6473597d706e 356 */
bogdanm 82:6473597d706e 357 //@{
bogdanm 82:6473597d706e 358 #define BP_AIPS_MPRA_MTW3 (17U) //!< Bit position for AIPS_MPRA_MTW3.
bogdanm 82:6473597d706e 359 #define BM_AIPS_MPRA_MTW3 (0x00020000U) //!< Bit mask for AIPS_MPRA_MTW3.
bogdanm 82:6473597d706e 360 #define BS_AIPS_MPRA_MTW3 (1U) //!< Bit field size in bits for AIPS_MPRA_MTW3.
bogdanm 82:6473597d706e 361
bogdanm 82:6473597d706e 362 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 363 //! @brief Read current value of the AIPS_MPRA_MTW3 field.
bogdanm 82:6473597d706e 364 #define BR_AIPS_MPRA_MTW3(x) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTW3))
bogdanm 82:6473597d706e 365 #endif
bogdanm 82:6473597d706e 366
bogdanm 82:6473597d706e 367 //! @brief Format value for bitfield AIPS_MPRA_MTW3.
bogdanm 82:6473597d706e 368 #define BF_AIPS_MPRA_MTW3(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_MPRA_MTW3), uint32_t) & BM_AIPS_MPRA_MTW3)
bogdanm 82:6473597d706e 369
bogdanm 82:6473597d706e 370 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 371 //! @brief Set the MTW3 field to a new value.
bogdanm 82:6473597d706e 372 #define BW_AIPS_MPRA_MTW3(x, v) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTW3) = (v))
bogdanm 82:6473597d706e 373 #endif
bogdanm 82:6473597d706e 374 //@}
bogdanm 82:6473597d706e 375
bogdanm 82:6473597d706e 376 /*!
bogdanm 82:6473597d706e 377 * @name Register AIPS_MPRA, field MTR3[18] (RW)
bogdanm 82:6473597d706e 378 *
bogdanm 82:6473597d706e 379 * Determines whether the master is trusted for read accesses.
bogdanm 82:6473597d706e 380 *
bogdanm 82:6473597d706e 381 * Values:
bogdanm 82:6473597d706e 382 * - 0 - This master is not trusted for read accesses.
bogdanm 82:6473597d706e 383 * - 1 - This master is trusted for read accesses.
bogdanm 82:6473597d706e 384 */
bogdanm 82:6473597d706e 385 //@{
bogdanm 82:6473597d706e 386 #define BP_AIPS_MPRA_MTR3 (18U) //!< Bit position for AIPS_MPRA_MTR3.
bogdanm 82:6473597d706e 387 #define BM_AIPS_MPRA_MTR3 (0x00040000U) //!< Bit mask for AIPS_MPRA_MTR3.
bogdanm 82:6473597d706e 388 #define BS_AIPS_MPRA_MTR3 (1U) //!< Bit field size in bits for AIPS_MPRA_MTR3.
bogdanm 82:6473597d706e 389
bogdanm 82:6473597d706e 390 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 391 //! @brief Read current value of the AIPS_MPRA_MTR3 field.
bogdanm 82:6473597d706e 392 #define BR_AIPS_MPRA_MTR3(x) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTR3))
bogdanm 82:6473597d706e 393 #endif
bogdanm 82:6473597d706e 394
bogdanm 82:6473597d706e 395 //! @brief Format value for bitfield AIPS_MPRA_MTR3.
bogdanm 82:6473597d706e 396 #define BF_AIPS_MPRA_MTR3(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_MPRA_MTR3), uint32_t) & BM_AIPS_MPRA_MTR3)
bogdanm 82:6473597d706e 397
bogdanm 82:6473597d706e 398 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 399 //! @brief Set the MTR3 field to a new value.
bogdanm 82:6473597d706e 400 #define BW_AIPS_MPRA_MTR3(x, v) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTR3) = (v))
bogdanm 82:6473597d706e 401 #endif
bogdanm 82:6473597d706e 402 //@}
bogdanm 82:6473597d706e 403
bogdanm 82:6473597d706e 404 /*!
bogdanm 82:6473597d706e 405 * @name Register AIPS_MPRA, field MPL2[20] (RW)
bogdanm 82:6473597d706e 406 *
bogdanm 82:6473597d706e 407 * Specifies how the privilege level of the master is determined.
bogdanm 82:6473597d706e 408 *
bogdanm 82:6473597d706e 409 * Values:
bogdanm 82:6473597d706e 410 * - 0 - Accesses from this master are forced to user-mode.
bogdanm 82:6473597d706e 411 * - 1 - Accesses from this master are not forced to user-mode.
bogdanm 82:6473597d706e 412 */
bogdanm 82:6473597d706e 413 //@{
bogdanm 82:6473597d706e 414 #define BP_AIPS_MPRA_MPL2 (20U) //!< Bit position for AIPS_MPRA_MPL2.
bogdanm 82:6473597d706e 415 #define BM_AIPS_MPRA_MPL2 (0x00100000U) //!< Bit mask for AIPS_MPRA_MPL2.
bogdanm 82:6473597d706e 416 #define BS_AIPS_MPRA_MPL2 (1U) //!< Bit field size in bits for AIPS_MPRA_MPL2.
bogdanm 82:6473597d706e 417
bogdanm 82:6473597d706e 418 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 419 //! @brief Read current value of the AIPS_MPRA_MPL2 field.
bogdanm 82:6473597d706e 420 #define BR_AIPS_MPRA_MPL2(x) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MPL2))
bogdanm 82:6473597d706e 421 #endif
bogdanm 82:6473597d706e 422
bogdanm 82:6473597d706e 423 //! @brief Format value for bitfield AIPS_MPRA_MPL2.
bogdanm 82:6473597d706e 424 #define BF_AIPS_MPRA_MPL2(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_MPRA_MPL2), uint32_t) & BM_AIPS_MPRA_MPL2)
bogdanm 82:6473597d706e 425
bogdanm 82:6473597d706e 426 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 427 //! @brief Set the MPL2 field to a new value.
bogdanm 82:6473597d706e 428 #define BW_AIPS_MPRA_MPL2(x, v) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MPL2) = (v))
bogdanm 82:6473597d706e 429 #endif
bogdanm 82:6473597d706e 430 //@}
bogdanm 82:6473597d706e 431
bogdanm 82:6473597d706e 432 /*!
bogdanm 82:6473597d706e 433 * @name Register AIPS_MPRA, field MTW2[21] (RW)
bogdanm 82:6473597d706e 434 *
bogdanm 82:6473597d706e 435 * Determines whether the master is trusted for write accesses.
bogdanm 82:6473597d706e 436 *
bogdanm 82:6473597d706e 437 * Values:
bogdanm 82:6473597d706e 438 * - 0 - This master is not trusted for write accesses.
bogdanm 82:6473597d706e 439 * - 1 - This master is trusted for write accesses.
bogdanm 82:6473597d706e 440 */
bogdanm 82:6473597d706e 441 //@{
bogdanm 82:6473597d706e 442 #define BP_AIPS_MPRA_MTW2 (21U) //!< Bit position for AIPS_MPRA_MTW2.
bogdanm 82:6473597d706e 443 #define BM_AIPS_MPRA_MTW2 (0x00200000U) //!< Bit mask for AIPS_MPRA_MTW2.
bogdanm 82:6473597d706e 444 #define BS_AIPS_MPRA_MTW2 (1U) //!< Bit field size in bits for AIPS_MPRA_MTW2.
bogdanm 82:6473597d706e 445
bogdanm 82:6473597d706e 446 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 447 //! @brief Read current value of the AIPS_MPRA_MTW2 field.
bogdanm 82:6473597d706e 448 #define BR_AIPS_MPRA_MTW2(x) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTW2))
bogdanm 82:6473597d706e 449 #endif
bogdanm 82:6473597d706e 450
bogdanm 82:6473597d706e 451 //! @brief Format value for bitfield AIPS_MPRA_MTW2.
bogdanm 82:6473597d706e 452 #define BF_AIPS_MPRA_MTW2(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_MPRA_MTW2), uint32_t) & BM_AIPS_MPRA_MTW2)
bogdanm 82:6473597d706e 453
bogdanm 82:6473597d706e 454 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 455 //! @brief Set the MTW2 field to a new value.
bogdanm 82:6473597d706e 456 #define BW_AIPS_MPRA_MTW2(x, v) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTW2) = (v))
bogdanm 82:6473597d706e 457 #endif
bogdanm 82:6473597d706e 458 //@}
bogdanm 82:6473597d706e 459
bogdanm 82:6473597d706e 460 /*!
bogdanm 82:6473597d706e 461 * @name Register AIPS_MPRA, field MTR2[22] (RW)
bogdanm 82:6473597d706e 462 *
bogdanm 82:6473597d706e 463 * Determines whether the master is trusted for read accesses.
bogdanm 82:6473597d706e 464 *
bogdanm 82:6473597d706e 465 * Values:
bogdanm 82:6473597d706e 466 * - 0 - This master is not trusted for read accesses.
bogdanm 82:6473597d706e 467 * - 1 - This master is trusted for read accesses.
bogdanm 82:6473597d706e 468 */
bogdanm 82:6473597d706e 469 //@{
bogdanm 82:6473597d706e 470 #define BP_AIPS_MPRA_MTR2 (22U) //!< Bit position for AIPS_MPRA_MTR2.
bogdanm 82:6473597d706e 471 #define BM_AIPS_MPRA_MTR2 (0x00400000U) //!< Bit mask for AIPS_MPRA_MTR2.
bogdanm 82:6473597d706e 472 #define BS_AIPS_MPRA_MTR2 (1U) //!< Bit field size in bits for AIPS_MPRA_MTR2.
bogdanm 82:6473597d706e 473
bogdanm 82:6473597d706e 474 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 475 //! @brief Read current value of the AIPS_MPRA_MTR2 field.
bogdanm 82:6473597d706e 476 #define BR_AIPS_MPRA_MTR2(x) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTR2))
bogdanm 82:6473597d706e 477 #endif
bogdanm 82:6473597d706e 478
bogdanm 82:6473597d706e 479 //! @brief Format value for bitfield AIPS_MPRA_MTR2.
bogdanm 82:6473597d706e 480 #define BF_AIPS_MPRA_MTR2(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_MPRA_MTR2), uint32_t) & BM_AIPS_MPRA_MTR2)
bogdanm 82:6473597d706e 481
bogdanm 82:6473597d706e 482 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 483 //! @brief Set the MTR2 field to a new value.
bogdanm 82:6473597d706e 484 #define BW_AIPS_MPRA_MTR2(x, v) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTR2) = (v))
bogdanm 82:6473597d706e 485 #endif
bogdanm 82:6473597d706e 486 //@}
bogdanm 82:6473597d706e 487
bogdanm 82:6473597d706e 488 /*!
bogdanm 82:6473597d706e 489 * @name Register AIPS_MPRA, field MPL1[24] (RW)
bogdanm 82:6473597d706e 490 *
bogdanm 82:6473597d706e 491 * Specifies how the privilege level of the master is determined.
bogdanm 82:6473597d706e 492 *
bogdanm 82:6473597d706e 493 * Values:
bogdanm 82:6473597d706e 494 * - 0 - Accesses from this master are forced to user-mode.
bogdanm 82:6473597d706e 495 * - 1 - Accesses from this master are not forced to user-mode.
bogdanm 82:6473597d706e 496 */
bogdanm 82:6473597d706e 497 //@{
bogdanm 82:6473597d706e 498 #define BP_AIPS_MPRA_MPL1 (24U) //!< Bit position for AIPS_MPRA_MPL1.
bogdanm 82:6473597d706e 499 #define BM_AIPS_MPRA_MPL1 (0x01000000U) //!< Bit mask for AIPS_MPRA_MPL1.
bogdanm 82:6473597d706e 500 #define BS_AIPS_MPRA_MPL1 (1U) //!< Bit field size in bits for AIPS_MPRA_MPL1.
bogdanm 82:6473597d706e 501
bogdanm 82:6473597d706e 502 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 503 //! @brief Read current value of the AIPS_MPRA_MPL1 field.
bogdanm 82:6473597d706e 504 #define BR_AIPS_MPRA_MPL1(x) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MPL1))
bogdanm 82:6473597d706e 505 #endif
bogdanm 82:6473597d706e 506
bogdanm 82:6473597d706e 507 //! @brief Format value for bitfield AIPS_MPRA_MPL1.
bogdanm 82:6473597d706e 508 #define BF_AIPS_MPRA_MPL1(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_MPRA_MPL1), uint32_t) & BM_AIPS_MPRA_MPL1)
bogdanm 82:6473597d706e 509
bogdanm 82:6473597d706e 510 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 511 //! @brief Set the MPL1 field to a new value.
bogdanm 82:6473597d706e 512 #define BW_AIPS_MPRA_MPL1(x, v) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MPL1) = (v))
bogdanm 82:6473597d706e 513 #endif
bogdanm 82:6473597d706e 514 //@}
bogdanm 82:6473597d706e 515
bogdanm 82:6473597d706e 516 /*!
bogdanm 82:6473597d706e 517 * @name Register AIPS_MPRA, field MTW1[25] (RW)
bogdanm 82:6473597d706e 518 *
bogdanm 82:6473597d706e 519 * Determines whether the master is trusted for write accesses.
bogdanm 82:6473597d706e 520 *
bogdanm 82:6473597d706e 521 * Values:
bogdanm 82:6473597d706e 522 * - 0 - This master is not trusted for write accesses.
bogdanm 82:6473597d706e 523 * - 1 - This master is trusted for write accesses.
bogdanm 82:6473597d706e 524 */
bogdanm 82:6473597d706e 525 //@{
bogdanm 82:6473597d706e 526 #define BP_AIPS_MPRA_MTW1 (25U) //!< Bit position for AIPS_MPRA_MTW1.
bogdanm 82:6473597d706e 527 #define BM_AIPS_MPRA_MTW1 (0x02000000U) //!< Bit mask for AIPS_MPRA_MTW1.
bogdanm 82:6473597d706e 528 #define BS_AIPS_MPRA_MTW1 (1U) //!< Bit field size in bits for AIPS_MPRA_MTW1.
bogdanm 82:6473597d706e 529
bogdanm 82:6473597d706e 530 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 531 //! @brief Read current value of the AIPS_MPRA_MTW1 field.
bogdanm 82:6473597d706e 532 #define BR_AIPS_MPRA_MTW1(x) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTW1))
bogdanm 82:6473597d706e 533 #endif
bogdanm 82:6473597d706e 534
bogdanm 82:6473597d706e 535 //! @brief Format value for bitfield AIPS_MPRA_MTW1.
bogdanm 82:6473597d706e 536 #define BF_AIPS_MPRA_MTW1(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_MPRA_MTW1), uint32_t) & BM_AIPS_MPRA_MTW1)
bogdanm 82:6473597d706e 537
bogdanm 82:6473597d706e 538 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 539 //! @brief Set the MTW1 field to a new value.
bogdanm 82:6473597d706e 540 #define BW_AIPS_MPRA_MTW1(x, v) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTW1) = (v))
bogdanm 82:6473597d706e 541 #endif
bogdanm 82:6473597d706e 542 //@}
bogdanm 82:6473597d706e 543
bogdanm 82:6473597d706e 544 /*!
bogdanm 82:6473597d706e 545 * @name Register AIPS_MPRA, field MTR1[26] (RW)
bogdanm 82:6473597d706e 546 *
bogdanm 82:6473597d706e 547 * Determines whether the master is trusted for read accesses.
bogdanm 82:6473597d706e 548 *
bogdanm 82:6473597d706e 549 * Values:
bogdanm 82:6473597d706e 550 * - 0 - This master is not trusted for read accesses.
bogdanm 82:6473597d706e 551 * - 1 - This master is trusted for read accesses.
bogdanm 82:6473597d706e 552 */
bogdanm 82:6473597d706e 553 //@{
bogdanm 82:6473597d706e 554 #define BP_AIPS_MPRA_MTR1 (26U) //!< Bit position for AIPS_MPRA_MTR1.
bogdanm 82:6473597d706e 555 #define BM_AIPS_MPRA_MTR1 (0x04000000U) //!< Bit mask for AIPS_MPRA_MTR1.
bogdanm 82:6473597d706e 556 #define BS_AIPS_MPRA_MTR1 (1U) //!< Bit field size in bits for AIPS_MPRA_MTR1.
bogdanm 82:6473597d706e 557
bogdanm 82:6473597d706e 558 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 559 //! @brief Read current value of the AIPS_MPRA_MTR1 field.
bogdanm 82:6473597d706e 560 #define BR_AIPS_MPRA_MTR1(x) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTR1))
bogdanm 82:6473597d706e 561 #endif
bogdanm 82:6473597d706e 562
bogdanm 82:6473597d706e 563 //! @brief Format value for bitfield AIPS_MPRA_MTR1.
bogdanm 82:6473597d706e 564 #define BF_AIPS_MPRA_MTR1(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_MPRA_MTR1), uint32_t) & BM_AIPS_MPRA_MTR1)
bogdanm 82:6473597d706e 565
bogdanm 82:6473597d706e 566 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 567 //! @brief Set the MTR1 field to a new value.
bogdanm 82:6473597d706e 568 #define BW_AIPS_MPRA_MTR1(x, v) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTR1) = (v))
bogdanm 82:6473597d706e 569 #endif
bogdanm 82:6473597d706e 570 //@}
bogdanm 82:6473597d706e 571
bogdanm 82:6473597d706e 572 /*!
bogdanm 82:6473597d706e 573 * @name Register AIPS_MPRA, field MPL0[28] (RW)
bogdanm 82:6473597d706e 574 *
bogdanm 82:6473597d706e 575 * Specifies how the privilege level of the master is determined.
bogdanm 82:6473597d706e 576 *
bogdanm 82:6473597d706e 577 * Values:
bogdanm 82:6473597d706e 578 * - 0 - Accesses from this master are forced to user-mode.
bogdanm 82:6473597d706e 579 * - 1 - Accesses from this master are not forced to user-mode.
bogdanm 82:6473597d706e 580 */
bogdanm 82:6473597d706e 581 //@{
bogdanm 82:6473597d706e 582 #define BP_AIPS_MPRA_MPL0 (28U) //!< Bit position for AIPS_MPRA_MPL0.
bogdanm 82:6473597d706e 583 #define BM_AIPS_MPRA_MPL0 (0x10000000U) //!< Bit mask for AIPS_MPRA_MPL0.
bogdanm 82:6473597d706e 584 #define BS_AIPS_MPRA_MPL0 (1U) //!< Bit field size in bits for AIPS_MPRA_MPL0.
bogdanm 82:6473597d706e 585
bogdanm 82:6473597d706e 586 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 587 //! @brief Read current value of the AIPS_MPRA_MPL0 field.
bogdanm 82:6473597d706e 588 #define BR_AIPS_MPRA_MPL0(x) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MPL0))
bogdanm 82:6473597d706e 589 #endif
bogdanm 82:6473597d706e 590
bogdanm 82:6473597d706e 591 //! @brief Format value for bitfield AIPS_MPRA_MPL0.
bogdanm 82:6473597d706e 592 #define BF_AIPS_MPRA_MPL0(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_MPRA_MPL0), uint32_t) & BM_AIPS_MPRA_MPL0)
bogdanm 82:6473597d706e 593
bogdanm 82:6473597d706e 594 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 595 //! @brief Set the MPL0 field to a new value.
bogdanm 82:6473597d706e 596 #define BW_AIPS_MPRA_MPL0(x, v) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MPL0) = (v))
bogdanm 82:6473597d706e 597 #endif
bogdanm 82:6473597d706e 598 //@}
bogdanm 82:6473597d706e 599
bogdanm 82:6473597d706e 600 /*!
bogdanm 82:6473597d706e 601 * @name Register AIPS_MPRA, field MTW0[29] (RW)
bogdanm 82:6473597d706e 602 *
bogdanm 82:6473597d706e 603 * Determines whether the master is trusted for write accesses.
bogdanm 82:6473597d706e 604 *
bogdanm 82:6473597d706e 605 * Values:
bogdanm 82:6473597d706e 606 * - 0 - This master is not trusted for write accesses.
bogdanm 82:6473597d706e 607 * - 1 - This master is trusted for write accesses.
bogdanm 82:6473597d706e 608 */
bogdanm 82:6473597d706e 609 //@{
bogdanm 82:6473597d706e 610 #define BP_AIPS_MPRA_MTW0 (29U) //!< Bit position for AIPS_MPRA_MTW0.
bogdanm 82:6473597d706e 611 #define BM_AIPS_MPRA_MTW0 (0x20000000U) //!< Bit mask for AIPS_MPRA_MTW0.
bogdanm 82:6473597d706e 612 #define BS_AIPS_MPRA_MTW0 (1U) //!< Bit field size in bits for AIPS_MPRA_MTW0.
bogdanm 82:6473597d706e 613
bogdanm 82:6473597d706e 614 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 615 //! @brief Read current value of the AIPS_MPRA_MTW0 field.
bogdanm 82:6473597d706e 616 #define BR_AIPS_MPRA_MTW0(x) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTW0))
bogdanm 82:6473597d706e 617 #endif
bogdanm 82:6473597d706e 618
bogdanm 82:6473597d706e 619 //! @brief Format value for bitfield AIPS_MPRA_MTW0.
bogdanm 82:6473597d706e 620 #define BF_AIPS_MPRA_MTW0(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_MPRA_MTW0), uint32_t) & BM_AIPS_MPRA_MTW0)
bogdanm 82:6473597d706e 621
bogdanm 82:6473597d706e 622 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 623 //! @brief Set the MTW0 field to a new value.
bogdanm 82:6473597d706e 624 #define BW_AIPS_MPRA_MTW0(x, v) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTW0) = (v))
bogdanm 82:6473597d706e 625 #endif
bogdanm 82:6473597d706e 626 //@}
bogdanm 82:6473597d706e 627
bogdanm 82:6473597d706e 628 /*!
bogdanm 82:6473597d706e 629 * @name Register AIPS_MPRA, field MTR0[30] (RW)
bogdanm 82:6473597d706e 630 *
bogdanm 82:6473597d706e 631 * Determines whether the master is trusted for read accesses.
bogdanm 82:6473597d706e 632 *
bogdanm 82:6473597d706e 633 * Values:
bogdanm 82:6473597d706e 634 * - 0 - This master is not trusted for read accesses.
bogdanm 82:6473597d706e 635 * - 1 - This master is trusted for read accesses.
bogdanm 82:6473597d706e 636 */
bogdanm 82:6473597d706e 637 //@{
bogdanm 82:6473597d706e 638 #define BP_AIPS_MPRA_MTR0 (30U) //!< Bit position for AIPS_MPRA_MTR0.
bogdanm 82:6473597d706e 639 #define BM_AIPS_MPRA_MTR0 (0x40000000U) //!< Bit mask for AIPS_MPRA_MTR0.
bogdanm 82:6473597d706e 640 #define BS_AIPS_MPRA_MTR0 (1U) //!< Bit field size in bits for AIPS_MPRA_MTR0.
bogdanm 82:6473597d706e 641
bogdanm 82:6473597d706e 642 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 643 //! @brief Read current value of the AIPS_MPRA_MTR0 field.
bogdanm 82:6473597d706e 644 #define BR_AIPS_MPRA_MTR0(x) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTR0))
bogdanm 82:6473597d706e 645 #endif
bogdanm 82:6473597d706e 646
bogdanm 82:6473597d706e 647 //! @brief Format value for bitfield AIPS_MPRA_MTR0.
bogdanm 82:6473597d706e 648 #define BF_AIPS_MPRA_MTR0(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_MPRA_MTR0), uint32_t) & BM_AIPS_MPRA_MTR0)
bogdanm 82:6473597d706e 649
bogdanm 82:6473597d706e 650 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 651 //! @brief Set the MTR0 field to a new value.
bogdanm 82:6473597d706e 652 #define BW_AIPS_MPRA_MTR0(x, v) (BITBAND_ACCESS32(HW_AIPS_MPRA_ADDR(x), BP_AIPS_MPRA_MTR0) = (v))
bogdanm 82:6473597d706e 653 #endif
bogdanm 82:6473597d706e 654 //@}
bogdanm 82:6473597d706e 655
bogdanm 82:6473597d706e 656 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 657 // HW_AIPS_PACRA - Peripheral Access Control Register
bogdanm 82:6473597d706e 658 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 659
bogdanm 82:6473597d706e 660 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 661 /*!
bogdanm 82:6473597d706e 662 * @brief HW_AIPS_PACRA - Peripheral Access Control Register (RW)
bogdanm 82:6473597d706e 663 *
bogdanm 82:6473597d706e 664 * Reset value: 0x50004000U
bogdanm 82:6473597d706e 665 *
bogdanm 82:6473597d706e 666 * Each PACR register consists of eight 4-bit PACR fields. Each PACR field
bogdanm 82:6473597d706e 667 * defines the access levels for a particular peripheral. The mapping between a
bogdanm 82:6473597d706e 668 * peripheral and its PACR field is shown in the table below. The peripheral assignment
bogdanm 82:6473597d706e 669 * to each PACR is defined by the memory map slot that the peripheral is
bogdanm 82:6473597d706e 670 * assigned to. See this chip's memory map for the assignment of a particular
bogdanm 82:6473597d706e 671 * peripheral. The following table shows the location of each peripheral slot's PACR field
bogdanm 82:6473597d706e 672 * in the PACR registers. Offset Register [31:28] [27:24] [23:20] [19:16] [15:12]
bogdanm 82:6473597d706e 673 * [11:8] [7:4] [3:0] 0x20 PACRA PACR0 PACR1 PACR2 PACR3 PACR4 PACR5 PACR6 PACR7
bogdanm 82:6473597d706e 674 * 0x24 PACRB PACR8 PACR9 PACR10 PACR11 PACR12 PACR13 PACR14 PACR15 0x28 PACRC
bogdanm 82:6473597d706e 675 * PACR16 PACR17 PACR18 PACR19 PACR20 PACR21 PACR22 PACR23 0x2C PACRD PACR24
bogdanm 82:6473597d706e 676 * PACR25 PACR26 PACR27 PACR28 PACR29 PACR30 PACR31 0x30 Reserved 0x34 Reserved 0x38
bogdanm 82:6473597d706e 677 * Reserved 0x3C Reserved 0x40 PACRE PACR32 PACR33 PACR34 PACR35 PACR36 PACR37
bogdanm 82:6473597d706e 678 * PACR38 PACR39 0x44 PACRF PACR40 PACR41 PACR42 PACR43 PACR44 PACR45 PACR46 PACR47
bogdanm 82:6473597d706e 679 * 0x48 PACRG PACR48 PACR49 PACR50 PACR51 PACR52 PACR53 PACR54 PACR55 0x4C PACRH
bogdanm 82:6473597d706e 680 * PACR56 PACR57 PACR58 PACR59 PACR60 PACR61 PACR62 PACR63 0x50 PACRI PACR64
bogdanm 82:6473597d706e 681 * PACR65 PACR66 PACR67 PACR68 PACR69 PACR70 PACR71 0x54 PACRJ PACR72 PACR73 PACR74
bogdanm 82:6473597d706e 682 * PACR75 PACR76 PACR77 PACR78 PACR79 0x58 PACRK PACR80 PACR81 PACR82 PACR83
bogdanm 82:6473597d706e 683 * PACR84 PACR85 PACR86 PACR87 0x5C PACRL PACR88 PACR89 PACR90 PACR91 PACR92 PACR93
bogdanm 82:6473597d706e 684 * PACR94 PACR95 0x60 PACRM PACR96 PACR97 PACR98 PACR99 PACR100 PACR101 PACR102
bogdanm 82:6473597d706e 685 * PACR103 0x64 PACRN PACR104 PACR105 PACR106 PACR107 PACR108 PACR109 PACR110
bogdanm 82:6473597d706e 686 * PACR111 0x68 PACRO PACR112 PACR113 PACR114 PACR115 PACR116 PACR117 PACR118 PACR119
bogdanm 82:6473597d706e 687 * 0x6C PACRP PACR120 PACR121 PACR122 PACR123 PACR124 PACR125 PACR126 PACR127 0x80
bogdanm 82:6473597d706e 688 * PACRU PACR GBL0 PACR GBL1 Reserved The register field descriptions for PACR
bogdanm 82:6473597d706e 689 * A-D, which control peripheral slots 0-31, are shown below. The following
bogdanm 82:6473597d706e 690 * section, PACRPeripheral Access Control Register , shows the register field
bogdanm 82:6473597d706e 691 * descriptions for PACR E-P. All PACR registers are identical. They are divided into two
bogdanm 82:6473597d706e 692 * sections because they occupy two non-contiguous address spaces.
bogdanm 82:6473597d706e 693 */
bogdanm 82:6473597d706e 694 typedef union _hw_aips_pacra
bogdanm 82:6473597d706e 695 {
bogdanm 82:6473597d706e 696 uint32_t U;
bogdanm 82:6473597d706e 697 struct _hw_aips_pacra_bitfields
bogdanm 82:6473597d706e 698 {
bogdanm 82:6473597d706e 699 uint32_t TP7 : 1; //!< [0] Trusted Protect
bogdanm 82:6473597d706e 700 uint32_t WP7 : 1; //!< [1] Write Protect
bogdanm 82:6473597d706e 701 uint32_t SP7 : 1; //!< [2] Supervisor Protect
bogdanm 82:6473597d706e 702 uint32_t RESERVED0 : 1; //!< [3]
bogdanm 82:6473597d706e 703 uint32_t TP6 : 1; //!< [4] Trusted Protect
bogdanm 82:6473597d706e 704 uint32_t WP6 : 1; //!< [5] Write Protect
bogdanm 82:6473597d706e 705 uint32_t SP6 : 1; //!< [6] Supervisor Protect
bogdanm 82:6473597d706e 706 uint32_t RESERVED1 : 1; //!< [7]
bogdanm 82:6473597d706e 707 uint32_t TP5 : 1; //!< [8] Trusted Protect
bogdanm 82:6473597d706e 708 uint32_t WP5 : 1; //!< [9] Write Protect
bogdanm 82:6473597d706e 709 uint32_t SP5 : 1; //!< [10] Supervisor Protect
bogdanm 82:6473597d706e 710 uint32_t RESERVED2 : 1; //!< [11]
bogdanm 82:6473597d706e 711 uint32_t TP4 : 1; //!< [12] Trusted Protect
bogdanm 82:6473597d706e 712 uint32_t WP4 : 1; //!< [13] Write Protect
bogdanm 82:6473597d706e 713 uint32_t SP4 : 1; //!< [14] Supervisor Protect
bogdanm 82:6473597d706e 714 uint32_t RESERVED3 : 1; //!< [15]
bogdanm 82:6473597d706e 715 uint32_t TP3 : 1; //!< [16] Trusted Protect
bogdanm 82:6473597d706e 716 uint32_t WP3 : 1; //!< [17] Write Protect
bogdanm 82:6473597d706e 717 uint32_t SP3 : 1; //!< [18] Supervisor Protect
bogdanm 82:6473597d706e 718 uint32_t RESERVED4 : 1; //!< [19]
bogdanm 82:6473597d706e 719 uint32_t TP2 : 1; //!< [20] Trusted Protect
bogdanm 82:6473597d706e 720 uint32_t WP2 : 1; //!< [21] Write Protect
bogdanm 82:6473597d706e 721 uint32_t SP2 : 1; //!< [22] Supervisor Protect
bogdanm 82:6473597d706e 722 uint32_t RESERVED5 : 1; //!< [23]
bogdanm 82:6473597d706e 723 uint32_t TP1 : 1; //!< [24] Trusted Protect
bogdanm 82:6473597d706e 724 uint32_t WP1 : 1; //!< [25] Write Protect
bogdanm 82:6473597d706e 725 uint32_t SP1 : 1; //!< [26] Supervisor Protect
bogdanm 82:6473597d706e 726 uint32_t RESERVED6 : 1; //!< [27]
bogdanm 82:6473597d706e 727 uint32_t TP0 : 1; //!< [28] Trusted Protect
bogdanm 82:6473597d706e 728 uint32_t WP0 : 1; //!< [29] Write Protect
bogdanm 82:6473597d706e 729 uint32_t SP0 : 1; //!< [30] Supervisor Protect
bogdanm 82:6473597d706e 730 uint32_t RESERVED7 : 1; //!< [31]
bogdanm 82:6473597d706e 731 } B;
bogdanm 82:6473597d706e 732 } hw_aips_pacra_t;
bogdanm 82:6473597d706e 733 #endif
bogdanm 82:6473597d706e 734
bogdanm 82:6473597d706e 735 /*!
bogdanm 82:6473597d706e 736 * @name Constants and macros for entire AIPS_PACRA register
bogdanm 82:6473597d706e 737 */
bogdanm 82:6473597d706e 738 //@{
bogdanm 82:6473597d706e 739 #define HW_AIPS_PACRA_ADDR(x) (REGS_AIPS_BASE(x) + 0x20U)
bogdanm 82:6473597d706e 740
bogdanm 82:6473597d706e 741 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 742 #define HW_AIPS_PACRA(x) (*(__IO hw_aips_pacra_t *) HW_AIPS_PACRA_ADDR(x))
bogdanm 82:6473597d706e 743 #define HW_AIPS_PACRA_RD(x) (HW_AIPS_PACRA(x).U)
bogdanm 82:6473597d706e 744 #define HW_AIPS_PACRA_WR(x, v) (HW_AIPS_PACRA(x).U = (v))
bogdanm 82:6473597d706e 745 #define HW_AIPS_PACRA_SET(x, v) (HW_AIPS_PACRA_WR(x, HW_AIPS_PACRA_RD(x) | (v)))
bogdanm 82:6473597d706e 746 #define HW_AIPS_PACRA_CLR(x, v) (HW_AIPS_PACRA_WR(x, HW_AIPS_PACRA_RD(x) & ~(v)))
bogdanm 82:6473597d706e 747 #define HW_AIPS_PACRA_TOG(x, v) (HW_AIPS_PACRA_WR(x, HW_AIPS_PACRA_RD(x) ^ (v)))
bogdanm 82:6473597d706e 748 #endif
bogdanm 82:6473597d706e 749 //@}
bogdanm 82:6473597d706e 750
bogdanm 82:6473597d706e 751 /*
bogdanm 82:6473597d706e 752 * Constants & macros for individual AIPS_PACRA bitfields
bogdanm 82:6473597d706e 753 */
bogdanm 82:6473597d706e 754
bogdanm 82:6473597d706e 755 /*!
bogdanm 82:6473597d706e 756 * @name Register AIPS_PACRA, field TP7[0] (RW)
bogdanm 82:6473597d706e 757 *
bogdanm 82:6473597d706e 758 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 759 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 760 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 761 *
bogdanm 82:6473597d706e 762 * Values:
bogdanm 82:6473597d706e 763 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 764 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 765 */
bogdanm 82:6473597d706e 766 //@{
bogdanm 82:6473597d706e 767 #define BP_AIPS_PACRA_TP7 (0U) //!< Bit position for AIPS_PACRA_TP7.
bogdanm 82:6473597d706e 768 #define BM_AIPS_PACRA_TP7 (0x00000001U) //!< Bit mask for AIPS_PACRA_TP7.
bogdanm 82:6473597d706e 769 #define BS_AIPS_PACRA_TP7 (1U) //!< Bit field size in bits for AIPS_PACRA_TP7.
bogdanm 82:6473597d706e 770
bogdanm 82:6473597d706e 771 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 772 //! @brief Read current value of the AIPS_PACRA_TP7 field.
bogdanm 82:6473597d706e 773 #define BR_AIPS_PACRA_TP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP7))
bogdanm 82:6473597d706e 774 #endif
bogdanm 82:6473597d706e 775
bogdanm 82:6473597d706e 776 //! @brief Format value for bitfield AIPS_PACRA_TP7.
bogdanm 82:6473597d706e 777 #define BF_AIPS_PACRA_TP7(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRA_TP7), uint32_t) & BM_AIPS_PACRA_TP7)
bogdanm 82:6473597d706e 778
bogdanm 82:6473597d706e 779 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 780 //! @brief Set the TP7 field to a new value.
bogdanm 82:6473597d706e 781 #define BW_AIPS_PACRA_TP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP7) = (v))
bogdanm 82:6473597d706e 782 #endif
bogdanm 82:6473597d706e 783 //@}
bogdanm 82:6473597d706e 784
bogdanm 82:6473597d706e 785 /*!
bogdanm 82:6473597d706e 786 * @name Register AIPS_PACRA, field WP7[1] (RW)
bogdanm 82:6473597d706e 787 *
bogdanm 82:6473597d706e 788 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 789 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 790 * and no peripheral access initiates.
bogdanm 82:6473597d706e 791 *
bogdanm 82:6473597d706e 792 * Values:
bogdanm 82:6473597d706e 793 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 794 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 795 */
bogdanm 82:6473597d706e 796 //@{
bogdanm 82:6473597d706e 797 #define BP_AIPS_PACRA_WP7 (1U) //!< Bit position for AIPS_PACRA_WP7.
bogdanm 82:6473597d706e 798 #define BM_AIPS_PACRA_WP7 (0x00000002U) //!< Bit mask for AIPS_PACRA_WP7.
bogdanm 82:6473597d706e 799 #define BS_AIPS_PACRA_WP7 (1U) //!< Bit field size in bits for AIPS_PACRA_WP7.
bogdanm 82:6473597d706e 800
bogdanm 82:6473597d706e 801 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 802 //! @brief Read current value of the AIPS_PACRA_WP7 field.
bogdanm 82:6473597d706e 803 #define BR_AIPS_PACRA_WP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP7))
bogdanm 82:6473597d706e 804 #endif
bogdanm 82:6473597d706e 805
bogdanm 82:6473597d706e 806 //! @brief Format value for bitfield AIPS_PACRA_WP7.
bogdanm 82:6473597d706e 807 #define BF_AIPS_PACRA_WP7(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRA_WP7), uint32_t) & BM_AIPS_PACRA_WP7)
bogdanm 82:6473597d706e 808
bogdanm 82:6473597d706e 809 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 810 //! @brief Set the WP7 field to a new value.
bogdanm 82:6473597d706e 811 #define BW_AIPS_PACRA_WP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP7) = (v))
bogdanm 82:6473597d706e 812 #endif
bogdanm 82:6473597d706e 813 //@}
bogdanm 82:6473597d706e 814
bogdanm 82:6473597d706e 815 /*!
bogdanm 82:6473597d706e 816 * @name Register AIPS_PACRA, field SP7[2] (RW)
bogdanm 82:6473597d706e 817 *
bogdanm 82:6473597d706e 818 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 819 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 820 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 821 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 822 * access initiates.
bogdanm 82:6473597d706e 823 *
bogdanm 82:6473597d706e 824 * Values:
bogdanm 82:6473597d706e 825 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 826 * accesses.
bogdanm 82:6473597d706e 827 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 828 */
bogdanm 82:6473597d706e 829 //@{
bogdanm 82:6473597d706e 830 #define BP_AIPS_PACRA_SP7 (2U) //!< Bit position for AIPS_PACRA_SP7.
bogdanm 82:6473597d706e 831 #define BM_AIPS_PACRA_SP7 (0x00000004U) //!< Bit mask for AIPS_PACRA_SP7.
bogdanm 82:6473597d706e 832 #define BS_AIPS_PACRA_SP7 (1U) //!< Bit field size in bits for AIPS_PACRA_SP7.
bogdanm 82:6473597d706e 833
bogdanm 82:6473597d706e 834 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 835 //! @brief Read current value of the AIPS_PACRA_SP7 field.
bogdanm 82:6473597d706e 836 #define BR_AIPS_PACRA_SP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP7))
bogdanm 82:6473597d706e 837 #endif
bogdanm 82:6473597d706e 838
bogdanm 82:6473597d706e 839 //! @brief Format value for bitfield AIPS_PACRA_SP7.
bogdanm 82:6473597d706e 840 #define BF_AIPS_PACRA_SP7(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRA_SP7), uint32_t) & BM_AIPS_PACRA_SP7)
bogdanm 82:6473597d706e 841
bogdanm 82:6473597d706e 842 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 843 //! @brief Set the SP7 field to a new value.
bogdanm 82:6473597d706e 844 #define BW_AIPS_PACRA_SP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP7) = (v))
bogdanm 82:6473597d706e 845 #endif
bogdanm 82:6473597d706e 846 //@}
bogdanm 82:6473597d706e 847
bogdanm 82:6473597d706e 848 /*!
bogdanm 82:6473597d706e 849 * @name Register AIPS_PACRA, field TP6[4] (RW)
bogdanm 82:6473597d706e 850 *
bogdanm 82:6473597d706e 851 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 852 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 853 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 854 *
bogdanm 82:6473597d706e 855 * Values:
bogdanm 82:6473597d706e 856 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 857 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 858 */
bogdanm 82:6473597d706e 859 //@{
bogdanm 82:6473597d706e 860 #define BP_AIPS_PACRA_TP6 (4U) //!< Bit position for AIPS_PACRA_TP6.
bogdanm 82:6473597d706e 861 #define BM_AIPS_PACRA_TP6 (0x00000010U) //!< Bit mask for AIPS_PACRA_TP6.
bogdanm 82:6473597d706e 862 #define BS_AIPS_PACRA_TP6 (1U) //!< Bit field size in bits for AIPS_PACRA_TP6.
bogdanm 82:6473597d706e 863
bogdanm 82:6473597d706e 864 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 865 //! @brief Read current value of the AIPS_PACRA_TP6 field.
bogdanm 82:6473597d706e 866 #define BR_AIPS_PACRA_TP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP6))
bogdanm 82:6473597d706e 867 #endif
bogdanm 82:6473597d706e 868
bogdanm 82:6473597d706e 869 //! @brief Format value for bitfield AIPS_PACRA_TP6.
bogdanm 82:6473597d706e 870 #define BF_AIPS_PACRA_TP6(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRA_TP6), uint32_t) & BM_AIPS_PACRA_TP6)
bogdanm 82:6473597d706e 871
bogdanm 82:6473597d706e 872 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 873 //! @brief Set the TP6 field to a new value.
bogdanm 82:6473597d706e 874 #define BW_AIPS_PACRA_TP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP6) = (v))
bogdanm 82:6473597d706e 875 #endif
bogdanm 82:6473597d706e 876 //@}
bogdanm 82:6473597d706e 877
bogdanm 82:6473597d706e 878 /*!
bogdanm 82:6473597d706e 879 * @name Register AIPS_PACRA, field WP6[5] (RW)
bogdanm 82:6473597d706e 880 *
bogdanm 82:6473597d706e 881 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 882 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 883 * and no peripheral access initiates.
bogdanm 82:6473597d706e 884 *
bogdanm 82:6473597d706e 885 * Values:
bogdanm 82:6473597d706e 886 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 887 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 888 */
bogdanm 82:6473597d706e 889 //@{
bogdanm 82:6473597d706e 890 #define BP_AIPS_PACRA_WP6 (5U) //!< Bit position for AIPS_PACRA_WP6.
bogdanm 82:6473597d706e 891 #define BM_AIPS_PACRA_WP6 (0x00000020U) //!< Bit mask for AIPS_PACRA_WP6.
bogdanm 82:6473597d706e 892 #define BS_AIPS_PACRA_WP6 (1U) //!< Bit field size in bits for AIPS_PACRA_WP6.
bogdanm 82:6473597d706e 893
bogdanm 82:6473597d706e 894 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 895 //! @brief Read current value of the AIPS_PACRA_WP6 field.
bogdanm 82:6473597d706e 896 #define BR_AIPS_PACRA_WP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP6))
bogdanm 82:6473597d706e 897 #endif
bogdanm 82:6473597d706e 898
bogdanm 82:6473597d706e 899 //! @brief Format value for bitfield AIPS_PACRA_WP6.
bogdanm 82:6473597d706e 900 #define BF_AIPS_PACRA_WP6(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRA_WP6), uint32_t) & BM_AIPS_PACRA_WP6)
bogdanm 82:6473597d706e 901
bogdanm 82:6473597d706e 902 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 903 //! @brief Set the WP6 field to a new value.
bogdanm 82:6473597d706e 904 #define BW_AIPS_PACRA_WP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP6) = (v))
bogdanm 82:6473597d706e 905 #endif
bogdanm 82:6473597d706e 906 //@}
bogdanm 82:6473597d706e 907
bogdanm 82:6473597d706e 908 /*!
bogdanm 82:6473597d706e 909 * @name Register AIPS_PACRA, field SP6[6] (RW)
bogdanm 82:6473597d706e 910 *
bogdanm 82:6473597d706e 911 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 912 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 913 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 914 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 915 * access initiates.
bogdanm 82:6473597d706e 916 *
bogdanm 82:6473597d706e 917 * Values:
bogdanm 82:6473597d706e 918 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 919 * accesses.
bogdanm 82:6473597d706e 920 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 921 */
bogdanm 82:6473597d706e 922 //@{
bogdanm 82:6473597d706e 923 #define BP_AIPS_PACRA_SP6 (6U) //!< Bit position for AIPS_PACRA_SP6.
bogdanm 82:6473597d706e 924 #define BM_AIPS_PACRA_SP6 (0x00000040U) //!< Bit mask for AIPS_PACRA_SP6.
bogdanm 82:6473597d706e 925 #define BS_AIPS_PACRA_SP6 (1U) //!< Bit field size in bits for AIPS_PACRA_SP6.
bogdanm 82:6473597d706e 926
bogdanm 82:6473597d706e 927 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 928 //! @brief Read current value of the AIPS_PACRA_SP6 field.
bogdanm 82:6473597d706e 929 #define BR_AIPS_PACRA_SP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP6))
bogdanm 82:6473597d706e 930 #endif
bogdanm 82:6473597d706e 931
bogdanm 82:6473597d706e 932 //! @brief Format value for bitfield AIPS_PACRA_SP6.
bogdanm 82:6473597d706e 933 #define BF_AIPS_PACRA_SP6(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRA_SP6), uint32_t) & BM_AIPS_PACRA_SP6)
bogdanm 82:6473597d706e 934
bogdanm 82:6473597d706e 935 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 936 //! @brief Set the SP6 field to a new value.
bogdanm 82:6473597d706e 937 #define BW_AIPS_PACRA_SP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP6) = (v))
bogdanm 82:6473597d706e 938 #endif
bogdanm 82:6473597d706e 939 //@}
bogdanm 82:6473597d706e 940
bogdanm 82:6473597d706e 941 /*!
bogdanm 82:6473597d706e 942 * @name Register AIPS_PACRA, field TP5[8] (RW)
bogdanm 82:6473597d706e 943 *
bogdanm 82:6473597d706e 944 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 945 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 946 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 947 *
bogdanm 82:6473597d706e 948 * Values:
bogdanm 82:6473597d706e 949 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 950 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 951 */
bogdanm 82:6473597d706e 952 //@{
bogdanm 82:6473597d706e 953 #define BP_AIPS_PACRA_TP5 (8U) //!< Bit position for AIPS_PACRA_TP5.
bogdanm 82:6473597d706e 954 #define BM_AIPS_PACRA_TP5 (0x00000100U) //!< Bit mask for AIPS_PACRA_TP5.
bogdanm 82:6473597d706e 955 #define BS_AIPS_PACRA_TP5 (1U) //!< Bit field size in bits for AIPS_PACRA_TP5.
bogdanm 82:6473597d706e 956
bogdanm 82:6473597d706e 957 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 958 //! @brief Read current value of the AIPS_PACRA_TP5 field.
bogdanm 82:6473597d706e 959 #define BR_AIPS_PACRA_TP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP5))
bogdanm 82:6473597d706e 960 #endif
bogdanm 82:6473597d706e 961
bogdanm 82:6473597d706e 962 //! @brief Format value for bitfield AIPS_PACRA_TP5.
bogdanm 82:6473597d706e 963 #define BF_AIPS_PACRA_TP5(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRA_TP5), uint32_t) & BM_AIPS_PACRA_TP5)
bogdanm 82:6473597d706e 964
bogdanm 82:6473597d706e 965 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 966 //! @brief Set the TP5 field to a new value.
bogdanm 82:6473597d706e 967 #define BW_AIPS_PACRA_TP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP5) = (v))
bogdanm 82:6473597d706e 968 #endif
bogdanm 82:6473597d706e 969 //@}
bogdanm 82:6473597d706e 970
bogdanm 82:6473597d706e 971 /*!
bogdanm 82:6473597d706e 972 * @name Register AIPS_PACRA, field WP5[9] (RW)
bogdanm 82:6473597d706e 973 *
bogdanm 82:6473597d706e 974 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 975 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 976 * and no peripheral access initiates.
bogdanm 82:6473597d706e 977 *
bogdanm 82:6473597d706e 978 * Values:
bogdanm 82:6473597d706e 979 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 980 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 981 */
bogdanm 82:6473597d706e 982 //@{
bogdanm 82:6473597d706e 983 #define BP_AIPS_PACRA_WP5 (9U) //!< Bit position for AIPS_PACRA_WP5.
bogdanm 82:6473597d706e 984 #define BM_AIPS_PACRA_WP5 (0x00000200U) //!< Bit mask for AIPS_PACRA_WP5.
bogdanm 82:6473597d706e 985 #define BS_AIPS_PACRA_WP5 (1U) //!< Bit field size in bits for AIPS_PACRA_WP5.
bogdanm 82:6473597d706e 986
bogdanm 82:6473597d706e 987 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 988 //! @brief Read current value of the AIPS_PACRA_WP5 field.
bogdanm 82:6473597d706e 989 #define BR_AIPS_PACRA_WP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP5))
bogdanm 82:6473597d706e 990 #endif
bogdanm 82:6473597d706e 991
bogdanm 82:6473597d706e 992 //! @brief Format value for bitfield AIPS_PACRA_WP5.
bogdanm 82:6473597d706e 993 #define BF_AIPS_PACRA_WP5(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRA_WP5), uint32_t) & BM_AIPS_PACRA_WP5)
bogdanm 82:6473597d706e 994
bogdanm 82:6473597d706e 995 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 996 //! @brief Set the WP5 field to a new value.
bogdanm 82:6473597d706e 997 #define BW_AIPS_PACRA_WP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP5) = (v))
bogdanm 82:6473597d706e 998 #endif
bogdanm 82:6473597d706e 999 //@}
bogdanm 82:6473597d706e 1000
bogdanm 82:6473597d706e 1001 /*!
bogdanm 82:6473597d706e 1002 * @name Register AIPS_PACRA, field SP5[10] (RW)
bogdanm 82:6473597d706e 1003 *
bogdanm 82:6473597d706e 1004 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 1005 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 1006 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 1007 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 1008 * access initiates.
bogdanm 82:6473597d706e 1009 *
bogdanm 82:6473597d706e 1010 * Values:
bogdanm 82:6473597d706e 1011 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 1012 * accesses.
bogdanm 82:6473597d706e 1013 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 1014 */
bogdanm 82:6473597d706e 1015 //@{
bogdanm 82:6473597d706e 1016 #define BP_AIPS_PACRA_SP5 (10U) //!< Bit position for AIPS_PACRA_SP5.
bogdanm 82:6473597d706e 1017 #define BM_AIPS_PACRA_SP5 (0x00000400U) //!< Bit mask for AIPS_PACRA_SP5.
bogdanm 82:6473597d706e 1018 #define BS_AIPS_PACRA_SP5 (1U) //!< Bit field size in bits for AIPS_PACRA_SP5.
bogdanm 82:6473597d706e 1019
bogdanm 82:6473597d706e 1020 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1021 //! @brief Read current value of the AIPS_PACRA_SP5 field.
bogdanm 82:6473597d706e 1022 #define BR_AIPS_PACRA_SP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP5))
bogdanm 82:6473597d706e 1023 #endif
bogdanm 82:6473597d706e 1024
bogdanm 82:6473597d706e 1025 //! @brief Format value for bitfield AIPS_PACRA_SP5.
bogdanm 82:6473597d706e 1026 #define BF_AIPS_PACRA_SP5(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRA_SP5), uint32_t) & BM_AIPS_PACRA_SP5)
bogdanm 82:6473597d706e 1027
bogdanm 82:6473597d706e 1028 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1029 //! @brief Set the SP5 field to a new value.
bogdanm 82:6473597d706e 1030 #define BW_AIPS_PACRA_SP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP5) = (v))
bogdanm 82:6473597d706e 1031 #endif
bogdanm 82:6473597d706e 1032 //@}
bogdanm 82:6473597d706e 1033
bogdanm 82:6473597d706e 1034 /*!
bogdanm 82:6473597d706e 1035 * @name Register AIPS_PACRA, field TP4[12] (RW)
bogdanm 82:6473597d706e 1036 *
bogdanm 82:6473597d706e 1037 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 1038 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 1039 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 1040 *
bogdanm 82:6473597d706e 1041 * Values:
bogdanm 82:6473597d706e 1042 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 1043 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 1044 */
bogdanm 82:6473597d706e 1045 //@{
bogdanm 82:6473597d706e 1046 #define BP_AIPS_PACRA_TP4 (12U) //!< Bit position for AIPS_PACRA_TP4.
bogdanm 82:6473597d706e 1047 #define BM_AIPS_PACRA_TP4 (0x00001000U) //!< Bit mask for AIPS_PACRA_TP4.
bogdanm 82:6473597d706e 1048 #define BS_AIPS_PACRA_TP4 (1U) //!< Bit field size in bits for AIPS_PACRA_TP4.
bogdanm 82:6473597d706e 1049
bogdanm 82:6473597d706e 1050 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1051 //! @brief Read current value of the AIPS_PACRA_TP4 field.
bogdanm 82:6473597d706e 1052 #define BR_AIPS_PACRA_TP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP4))
bogdanm 82:6473597d706e 1053 #endif
bogdanm 82:6473597d706e 1054
bogdanm 82:6473597d706e 1055 //! @brief Format value for bitfield AIPS_PACRA_TP4.
bogdanm 82:6473597d706e 1056 #define BF_AIPS_PACRA_TP4(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRA_TP4), uint32_t) & BM_AIPS_PACRA_TP4)
bogdanm 82:6473597d706e 1057
bogdanm 82:6473597d706e 1058 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1059 //! @brief Set the TP4 field to a new value.
bogdanm 82:6473597d706e 1060 #define BW_AIPS_PACRA_TP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP4) = (v))
bogdanm 82:6473597d706e 1061 #endif
bogdanm 82:6473597d706e 1062 //@}
bogdanm 82:6473597d706e 1063
bogdanm 82:6473597d706e 1064 /*!
bogdanm 82:6473597d706e 1065 * @name Register AIPS_PACRA, field WP4[13] (RW)
bogdanm 82:6473597d706e 1066 *
bogdanm 82:6473597d706e 1067 * Determines whether the peripheral allows write accesss. When this bit is set
bogdanm 82:6473597d706e 1068 * and a write access is attempted, access terminates with an error response and
bogdanm 82:6473597d706e 1069 * no peripheral access initiates.
bogdanm 82:6473597d706e 1070 *
bogdanm 82:6473597d706e 1071 * Values:
bogdanm 82:6473597d706e 1072 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 1073 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 1074 */
bogdanm 82:6473597d706e 1075 //@{
bogdanm 82:6473597d706e 1076 #define BP_AIPS_PACRA_WP4 (13U) //!< Bit position for AIPS_PACRA_WP4.
bogdanm 82:6473597d706e 1077 #define BM_AIPS_PACRA_WP4 (0x00002000U) //!< Bit mask for AIPS_PACRA_WP4.
bogdanm 82:6473597d706e 1078 #define BS_AIPS_PACRA_WP4 (1U) //!< Bit field size in bits for AIPS_PACRA_WP4.
bogdanm 82:6473597d706e 1079
bogdanm 82:6473597d706e 1080 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1081 //! @brief Read current value of the AIPS_PACRA_WP4 field.
bogdanm 82:6473597d706e 1082 #define BR_AIPS_PACRA_WP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP4))
bogdanm 82:6473597d706e 1083 #endif
bogdanm 82:6473597d706e 1084
bogdanm 82:6473597d706e 1085 //! @brief Format value for bitfield AIPS_PACRA_WP4.
bogdanm 82:6473597d706e 1086 #define BF_AIPS_PACRA_WP4(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRA_WP4), uint32_t) & BM_AIPS_PACRA_WP4)
bogdanm 82:6473597d706e 1087
bogdanm 82:6473597d706e 1088 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1089 //! @brief Set the WP4 field to a new value.
bogdanm 82:6473597d706e 1090 #define BW_AIPS_PACRA_WP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP4) = (v))
bogdanm 82:6473597d706e 1091 #endif
bogdanm 82:6473597d706e 1092 //@}
bogdanm 82:6473597d706e 1093
bogdanm 82:6473597d706e 1094 /*!
bogdanm 82:6473597d706e 1095 * @name Register AIPS_PACRA, field SP4[14] (RW)
bogdanm 82:6473597d706e 1096 *
bogdanm 82:6473597d706e 1097 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 1098 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 1099 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 1100 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 1101 * access initiates.
bogdanm 82:6473597d706e 1102 *
bogdanm 82:6473597d706e 1103 * Values:
bogdanm 82:6473597d706e 1104 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 1105 * accesses.
bogdanm 82:6473597d706e 1106 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 1107 */
bogdanm 82:6473597d706e 1108 //@{
bogdanm 82:6473597d706e 1109 #define BP_AIPS_PACRA_SP4 (14U) //!< Bit position for AIPS_PACRA_SP4.
bogdanm 82:6473597d706e 1110 #define BM_AIPS_PACRA_SP4 (0x00004000U) //!< Bit mask for AIPS_PACRA_SP4.
bogdanm 82:6473597d706e 1111 #define BS_AIPS_PACRA_SP4 (1U) //!< Bit field size in bits for AIPS_PACRA_SP4.
bogdanm 82:6473597d706e 1112
bogdanm 82:6473597d706e 1113 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1114 //! @brief Read current value of the AIPS_PACRA_SP4 field.
bogdanm 82:6473597d706e 1115 #define BR_AIPS_PACRA_SP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP4))
bogdanm 82:6473597d706e 1116 #endif
bogdanm 82:6473597d706e 1117
bogdanm 82:6473597d706e 1118 //! @brief Format value for bitfield AIPS_PACRA_SP4.
bogdanm 82:6473597d706e 1119 #define BF_AIPS_PACRA_SP4(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRA_SP4), uint32_t) & BM_AIPS_PACRA_SP4)
bogdanm 82:6473597d706e 1120
bogdanm 82:6473597d706e 1121 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1122 //! @brief Set the SP4 field to a new value.
bogdanm 82:6473597d706e 1123 #define BW_AIPS_PACRA_SP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP4) = (v))
bogdanm 82:6473597d706e 1124 #endif
bogdanm 82:6473597d706e 1125 //@}
bogdanm 82:6473597d706e 1126
bogdanm 82:6473597d706e 1127 /*!
bogdanm 82:6473597d706e 1128 * @name Register AIPS_PACRA, field TP3[16] (RW)
bogdanm 82:6473597d706e 1129 *
bogdanm 82:6473597d706e 1130 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 1131 * When this bit is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 1132 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 1133 *
bogdanm 82:6473597d706e 1134 * Values:
bogdanm 82:6473597d706e 1135 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 1136 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 1137 */
bogdanm 82:6473597d706e 1138 //@{
bogdanm 82:6473597d706e 1139 #define BP_AIPS_PACRA_TP3 (16U) //!< Bit position for AIPS_PACRA_TP3.
bogdanm 82:6473597d706e 1140 #define BM_AIPS_PACRA_TP3 (0x00010000U) //!< Bit mask for AIPS_PACRA_TP3.
bogdanm 82:6473597d706e 1141 #define BS_AIPS_PACRA_TP3 (1U) //!< Bit field size in bits for AIPS_PACRA_TP3.
bogdanm 82:6473597d706e 1142
bogdanm 82:6473597d706e 1143 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1144 //! @brief Read current value of the AIPS_PACRA_TP3 field.
bogdanm 82:6473597d706e 1145 #define BR_AIPS_PACRA_TP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP3))
bogdanm 82:6473597d706e 1146 #endif
bogdanm 82:6473597d706e 1147
bogdanm 82:6473597d706e 1148 //! @brief Format value for bitfield AIPS_PACRA_TP3.
bogdanm 82:6473597d706e 1149 #define BF_AIPS_PACRA_TP3(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRA_TP3), uint32_t) & BM_AIPS_PACRA_TP3)
bogdanm 82:6473597d706e 1150
bogdanm 82:6473597d706e 1151 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1152 //! @brief Set the TP3 field to a new value.
bogdanm 82:6473597d706e 1153 #define BW_AIPS_PACRA_TP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP3) = (v))
bogdanm 82:6473597d706e 1154 #endif
bogdanm 82:6473597d706e 1155 //@}
bogdanm 82:6473597d706e 1156
bogdanm 82:6473597d706e 1157 /*!
bogdanm 82:6473597d706e 1158 * @name Register AIPS_PACRA, field WP3[17] (RW)
bogdanm 82:6473597d706e 1159 *
bogdanm 82:6473597d706e 1160 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 1161 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 1162 * and no peripheral access initiates.
bogdanm 82:6473597d706e 1163 *
bogdanm 82:6473597d706e 1164 * Values:
bogdanm 82:6473597d706e 1165 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 1166 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 1167 */
bogdanm 82:6473597d706e 1168 //@{
bogdanm 82:6473597d706e 1169 #define BP_AIPS_PACRA_WP3 (17U) //!< Bit position for AIPS_PACRA_WP3.
bogdanm 82:6473597d706e 1170 #define BM_AIPS_PACRA_WP3 (0x00020000U) //!< Bit mask for AIPS_PACRA_WP3.
bogdanm 82:6473597d706e 1171 #define BS_AIPS_PACRA_WP3 (1U) //!< Bit field size in bits for AIPS_PACRA_WP3.
bogdanm 82:6473597d706e 1172
bogdanm 82:6473597d706e 1173 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1174 //! @brief Read current value of the AIPS_PACRA_WP3 field.
bogdanm 82:6473597d706e 1175 #define BR_AIPS_PACRA_WP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP3))
bogdanm 82:6473597d706e 1176 #endif
bogdanm 82:6473597d706e 1177
bogdanm 82:6473597d706e 1178 //! @brief Format value for bitfield AIPS_PACRA_WP3.
bogdanm 82:6473597d706e 1179 #define BF_AIPS_PACRA_WP3(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRA_WP3), uint32_t) & BM_AIPS_PACRA_WP3)
bogdanm 82:6473597d706e 1180
bogdanm 82:6473597d706e 1181 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1182 //! @brief Set the WP3 field to a new value.
bogdanm 82:6473597d706e 1183 #define BW_AIPS_PACRA_WP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP3) = (v))
bogdanm 82:6473597d706e 1184 #endif
bogdanm 82:6473597d706e 1185 //@}
bogdanm 82:6473597d706e 1186
bogdanm 82:6473597d706e 1187 /*!
bogdanm 82:6473597d706e 1188 * @name Register AIPS_PACRA, field SP3[18] (RW)
bogdanm 82:6473597d706e 1189 *
bogdanm 82:6473597d706e 1190 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 1191 * access. When this bit is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 1192 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
bogdanm 82:6473597d706e 1193 * set. If not, access terminates with an error response and no peripheral access
bogdanm 82:6473597d706e 1194 * initiates.
bogdanm 82:6473597d706e 1195 *
bogdanm 82:6473597d706e 1196 * Values:
bogdanm 82:6473597d706e 1197 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 1198 * accesses.
bogdanm 82:6473597d706e 1199 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 1200 */
bogdanm 82:6473597d706e 1201 //@{
bogdanm 82:6473597d706e 1202 #define BP_AIPS_PACRA_SP3 (18U) //!< Bit position for AIPS_PACRA_SP3.
bogdanm 82:6473597d706e 1203 #define BM_AIPS_PACRA_SP3 (0x00040000U) //!< Bit mask for AIPS_PACRA_SP3.
bogdanm 82:6473597d706e 1204 #define BS_AIPS_PACRA_SP3 (1U) //!< Bit field size in bits for AIPS_PACRA_SP3.
bogdanm 82:6473597d706e 1205
bogdanm 82:6473597d706e 1206 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1207 //! @brief Read current value of the AIPS_PACRA_SP3 field.
bogdanm 82:6473597d706e 1208 #define BR_AIPS_PACRA_SP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP3))
bogdanm 82:6473597d706e 1209 #endif
bogdanm 82:6473597d706e 1210
bogdanm 82:6473597d706e 1211 //! @brief Format value for bitfield AIPS_PACRA_SP3.
bogdanm 82:6473597d706e 1212 #define BF_AIPS_PACRA_SP3(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRA_SP3), uint32_t) & BM_AIPS_PACRA_SP3)
bogdanm 82:6473597d706e 1213
bogdanm 82:6473597d706e 1214 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1215 //! @brief Set the SP3 field to a new value.
bogdanm 82:6473597d706e 1216 #define BW_AIPS_PACRA_SP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP3) = (v))
bogdanm 82:6473597d706e 1217 #endif
bogdanm 82:6473597d706e 1218 //@}
bogdanm 82:6473597d706e 1219
bogdanm 82:6473597d706e 1220 /*!
bogdanm 82:6473597d706e 1221 * @name Register AIPS_PACRA, field TP2[20] (RW)
bogdanm 82:6473597d706e 1222 *
bogdanm 82:6473597d706e 1223 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 1224 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 1225 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 1226 *
bogdanm 82:6473597d706e 1227 * Values:
bogdanm 82:6473597d706e 1228 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 1229 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 1230 */
bogdanm 82:6473597d706e 1231 //@{
bogdanm 82:6473597d706e 1232 #define BP_AIPS_PACRA_TP2 (20U) //!< Bit position for AIPS_PACRA_TP2.
bogdanm 82:6473597d706e 1233 #define BM_AIPS_PACRA_TP2 (0x00100000U) //!< Bit mask for AIPS_PACRA_TP2.
bogdanm 82:6473597d706e 1234 #define BS_AIPS_PACRA_TP2 (1U) //!< Bit field size in bits for AIPS_PACRA_TP2.
bogdanm 82:6473597d706e 1235
bogdanm 82:6473597d706e 1236 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1237 //! @brief Read current value of the AIPS_PACRA_TP2 field.
bogdanm 82:6473597d706e 1238 #define BR_AIPS_PACRA_TP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP2))
bogdanm 82:6473597d706e 1239 #endif
bogdanm 82:6473597d706e 1240
bogdanm 82:6473597d706e 1241 //! @brief Format value for bitfield AIPS_PACRA_TP2.
bogdanm 82:6473597d706e 1242 #define BF_AIPS_PACRA_TP2(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRA_TP2), uint32_t) & BM_AIPS_PACRA_TP2)
bogdanm 82:6473597d706e 1243
bogdanm 82:6473597d706e 1244 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1245 //! @brief Set the TP2 field to a new value.
bogdanm 82:6473597d706e 1246 #define BW_AIPS_PACRA_TP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP2) = (v))
bogdanm 82:6473597d706e 1247 #endif
bogdanm 82:6473597d706e 1248 //@}
bogdanm 82:6473597d706e 1249
bogdanm 82:6473597d706e 1250 /*!
bogdanm 82:6473597d706e 1251 * @name Register AIPS_PACRA, field WP2[21] (RW)
bogdanm 82:6473597d706e 1252 *
bogdanm 82:6473597d706e 1253 * Determines whether the peripheral allows write accesss. When this bit is set
bogdanm 82:6473597d706e 1254 * and a write access is attempted, access terminates with an error response and
bogdanm 82:6473597d706e 1255 * no peripheral access initiates.
bogdanm 82:6473597d706e 1256 *
bogdanm 82:6473597d706e 1257 * Values:
bogdanm 82:6473597d706e 1258 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 1259 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 1260 */
bogdanm 82:6473597d706e 1261 //@{
bogdanm 82:6473597d706e 1262 #define BP_AIPS_PACRA_WP2 (21U) //!< Bit position for AIPS_PACRA_WP2.
bogdanm 82:6473597d706e 1263 #define BM_AIPS_PACRA_WP2 (0x00200000U) //!< Bit mask for AIPS_PACRA_WP2.
bogdanm 82:6473597d706e 1264 #define BS_AIPS_PACRA_WP2 (1U) //!< Bit field size in bits for AIPS_PACRA_WP2.
bogdanm 82:6473597d706e 1265
bogdanm 82:6473597d706e 1266 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1267 //! @brief Read current value of the AIPS_PACRA_WP2 field.
bogdanm 82:6473597d706e 1268 #define BR_AIPS_PACRA_WP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP2))
bogdanm 82:6473597d706e 1269 #endif
bogdanm 82:6473597d706e 1270
bogdanm 82:6473597d706e 1271 //! @brief Format value for bitfield AIPS_PACRA_WP2.
bogdanm 82:6473597d706e 1272 #define BF_AIPS_PACRA_WP2(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRA_WP2), uint32_t) & BM_AIPS_PACRA_WP2)
bogdanm 82:6473597d706e 1273
bogdanm 82:6473597d706e 1274 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1275 //! @brief Set the WP2 field to a new value.
bogdanm 82:6473597d706e 1276 #define BW_AIPS_PACRA_WP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP2) = (v))
bogdanm 82:6473597d706e 1277 #endif
bogdanm 82:6473597d706e 1278 //@}
bogdanm 82:6473597d706e 1279
bogdanm 82:6473597d706e 1280 /*!
bogdanm 82:6473597d706e 1281 * @name Register AIPS_PACRA, field SP2[22] (RW)
bogdanm 82:6473597d706e 1282 *
bogdanm 82:6473597d706e 1283 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 1284 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 1285 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 1286 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 1287 * access initiates.
bogdanm 82:6473597d706e 1288 *
bogdanm 82:6473597d706e 1289 * Values:
bogdanm 82:6473597d706e 1290 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 1291 * accesses.
bogdanm 82:6473597d706e 1292 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 1293 */
bogdanm 82:6473597d706e 1294 //@{
bogdanm 82:6473597d706e 1295 #define BP_AIPS_PACRA_SP2 (22U) //!< Bit position for AIPS_PACRA_SP2.
bogdanm 82:6473597d706e 1296 #define BM_AIPS_PACRA_SP2 (0x00400000U) //!< Bit mask for AIPS_PACRA_SP2.
bogdanm 82:6473597d706e 1297 #define BS_AIPS_PACRA_SP2 (1U) //!< Bit field size in bits for AIPS_PACRA_SP2.
bogdanm 82:6473597d706e 1298
bogdanm 82:6473597d706e 1299 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1300 //! @brief Read current value of the AIPS_PACRA_SP2 field.
bogdanm 82:6473597d706e 1301 #define BR_AIPS_PACRA_SP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP2))
bogdanm 82:6473597d706e 1302 #endif
bogdanm 82:6473597d706e 1303
bogdanm 82:6473597d706e 1304 //! @brief Format value for bitfield AIPS_PACRA_SP2.
bogdanm 82:6473597d706e 1305 #define BF_AIPS_PACRA_SP2(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRA_SP2), uint32_t) & BM_AIPS_PACRA_SP2)
bogdanm 82:6473597d706e 1306
bogdanm 82:6473597d706e 1307 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1308 //! @brief Set the SP2 field to a new value.
bogdanm 82:6473597d706e 1309 #define BW_AIPS_PACRA_SP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP2) = (v))
bogdanm 82:6473597d706e 1310 #endif
bogdanm 82:6473597d706e 1311 //@}
bogdanm 82:6473597d706e 1312
bogdanm 82:6473597d706e 1313 /*!
bogdanm 82:6473597d706e 1314 * @name Register AIPS_PACRA, field TP1[24] (RW)
bogdanm 82:6473597d706e 1315 *
bogdanm 82:6473597d706e 1316 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 1317 * When this bit is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 1318 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 1319 *
bogdanm 82:6473597d706e 1320 * Values:
bogdanm 82:6473597d706e 1321 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 1322 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 1323 */
bogdanm 82:6473597d706e 1324 //@{
bogdanm 82:6473597d706e 1325 #define BP_AIPS_PACRA_TP1 (24U) //!< Bit position for AIPS_PACRA_TP1.
bogdanm 82:6473597d706e 1326 #define BM_AIPS_PACRA_TP1 (0x01000000U) //!< Bit mask for AIPS_PACRA_TP1.
bogdanm 82:6473597d706e 1327 #define BS_AIPS_PACRA_TP1 (1U) //!< Bit field size in bits for AIPS_PACRA_TP1.
bogdanm 82:6473597d706e 1328
bogdanm 82:6473597d706e 1329 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1330 //! @brief Read current value of the AIPS_PACRA_TP1 field.
bogdanm 82:6473597d706e 1331 #define BR_AIPS_PACRA_TP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP1))
bogdanm 82:6473597d706e 1332 #endif
bogdanm 82:6473597d706e 1333
bogdanm 82:6473597d706e 1334 //! @brief Format value for bitfield AIPS_PACRA_TP1.
bogdanm 82:6473597d706e 1335 #define BF_AIPS_PACRA_TP1(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRA_TP1), uint32_t) & BM_AIPS_PACRA_TP1)
bogdanm 82:6473597d706e 1336
bogdanm 82:6473597d706e 1337 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1338 //! @brief Set the TP1 field to a new value.
bogdanm 82:6473597d706e 1339 #define BW_AIPS_PACRA_TP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP1) = (v))
bogdanm 82:6473597d706e 1340 #endif
bogdanm 82:6473597d706e 1341 //@}
bogdanm 82:6473597d706e 1342
bogdanm 82:6473597d706e 1343 /*!
bogdanm 82:6473597d706e 1344 * @name Register AIPS_PACRA, field WP1[25] (RW)
bogdanm 82:6473597d706e 1345 *
bogdanm 82:6473597d706e 1346 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 1347 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 1348 * and no peripheral access initiates.
bogdanm 82:6473597d706e 1349 *
bogdanm 82:6473597d706e 1350 * Values:
bogdanm 82:6473597d706e 1351 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 1352 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 1353 */
bogdanm 82:6473597d706e 1354 //@{
bogdanm 82:6473597d706e 1355 #define BP_AIPS_PACRA_WP1 (25U) //!< Bit position for AIPS_PACRA_WP1.
bogdanm 82:6473597d706e 1356 #define BM_AIPS_PACRA_WP1 (0x02000000U) //!< Bit mask for AIPS_PACRA_WP1.
bogdanm 82:6473597d706e 1357 #define BS_AIPS_PACRA_WP1 (1U) //!< Bit field size in bits for AIPS_PACRA_WP1.
bogdanm 82:6473597d706e 1358
bogdanm 82:6473597d706e 1359 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1360 //! @brief Read current value of the AIPS_PACRA_WP1 field.
bogdanm 82:6473597d706e 1361 #define BR_AIPS_PACRA_WP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP1))
bogdanm 82:6473597d706e 1362 #endif
bogdanm 82:6473597d706e 1363
bogdanm 82:6473597d706e 1364 //! @brief Format value for bitfield AIPS_PACRA_WP1.
bogdanm 82:6473597d706e 1365 #define BF_AIPS_PACRA_WP1(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRA_WP1), uint32_t) & BM_AIPS_PACRA_WP1)
bogdanm 82:6473597d706e 1366
bogdanm 82:6473597d706e 1367 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1368 //! @brief Set the WP1 field to a new value.
bogdanm 82:6473597d706e 1369 #define BW_AIPS_PACRA_WP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP1) = (v))
bogdanm 82:6473597d706e 1370 #endif
bogdanm 82:6473597d706e 1371 //@}
bogdanm 82:6473597d706e 1372
bogdanm 82:6473597d706e 1373 /*!
bogdanm 82:6473597d706e 1374 * @name Register AIPS_PACRA, field SP1[26] (RW)
bogdanm 82:6473597d706e 1375 *
bogdanm 82:6473597d706e 1376 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 1377 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 1378 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 1379 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 1380 * access initiates.
bogdanm 82:6473597d706e 1381 *
bogdanm 82:6473597d706e 1382 * Values:
bogdanm 82:6473597d706e 1383 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 1384 * accesses.
bogdanm 82:6473597d706e 1385 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 1386 */
bogdanm 82:6473597d706e 1387 //@{
bogdanm 82:6473597d706e 1388 #define BP_AIPS_PACRA_SP1 (26U) //!< Bit position for AIPS_PACRA_SP1.
bogdanm 82:6473597d706e 1389 #define BM_AIPS_PACRA_SP1 (0x04000000U) //!< Bit mask for AIPS_PACRA_SP1.
bogdanm 82:6473597d706e 1390 #define BS_AIPS_PACRA_SP1 (1U) //!< Bit field size in bits for AIPS_PACRA_SP1.
bogdanm 82:6473597d706e 1391
bogdanm 82:6473597d706e 1392 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1393 //! @brief Read current value of the AIPS_PACRA_SP1 field.
bogdanm 82:6473597d706e 1394 #define BR_AIPS_PACRA_SP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP1))
bogdanm 82:6473597d706e 1395 #endif
bogdanm 82:6473597d706e 1396
bogdanm 82:6473597d706e 1397 //! @brief Format value for bitfield AIPS_PACRA_SP1.
bogdanm 82:6473597d706e 1398 #define BF_AIPS_PACRA_SP1(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRA_SP1), uint32_t) & BM_AIPS_PACRA_SP1)
bogdanm 82:6473597d706e 1399
bogdanm 82:6473597d706e 1400 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1401 //! @brief Set the SP1 field to a new value.
bogdanm 82:6473597d706e 1402 #define BW_AIPS_PACRA_SP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP1) = (v))
bogdanm 82:6473597d706e 1403 #endif
bogdanm 82:6473597d706e 1404 //@}
bogdanm 82:6473597d706e 1405
bogdanm 82:6473597d706e 1406 /*!
bogdanm 82:6473597d706e 1407 * @name Register AIPS_PACRA, field TP0[28] (RW)
bogdanm 82:6473597d706e 1408 *
bogdanm 82:6473597d706e 1409 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 1410 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 1411 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 1412 *
bogdanm 82:6473597d706e 1413 * Values:
bogdanm 82:6473597d706e 1414 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 1415 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 1416 */
bogdanm 82:6473597d706e 1417 //@{
bogdanm 82:6473597d706e 1418 #define BP_AIPS_PACRA_TP0 (28U) //!< Bit position for AIPS_PACRA_TP0.
bogdanm 82:6473597d706e 1419 #define BM_AIPS_PACRA_TP0 (0x10000000U) //!< Bit mask for AIPS_PACRA_TP0.
bogdanm 82:6473597d706e 1420 #define BS_AIPS_PACRA_TP0 (1U) //!< Bit field size in bits for AIPS_PACRA_TP0.
bogdanm 82:6473597d706e 1421
bogdanm 82:6473597d706e 1422 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1423 //! @brief Read current value of the AIPS_PACRA_TP0 field.
bogdanm 82:6473597d706e 1424 #define BR_AIPS_PACRA_TP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP0))
bogdanm 82:6473597d706e 1425 #endif
bogdanm 82:6473597d706e 1426
bogdanm 82:6473597d706e 1427 //! @brief Format value for bitfield AIPS_PACRA_TP0.
bogdanm 82:6473597d706e 1428 #define BF_AIPS_PACRA_TP0(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRA_TP0), uint32_t) & BM_AIPS_PACRA_TP0)
bogdanm 82:6473597d706e 1429
bogdanm 82:6473597d706e 1430 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1431 //! @brief Set the TP0 field to a new value.
bogdanm 82:6473597d706e 1432 #define BW_AIPS_PACRA_TP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_TP0) = (v))
bogdanm 82:6473597d706e 1433 #endif
bogdanm 82:6473597d706e 1434 //@}
bogdanm 82:6473597d706e 1435
bogdanm 82:6473597d706e 1436 /*!
bogdanm 82:6473597d706e 1437 * @name Register AIPS_PACRA, field WP0[29] (RW)
bogdanm 82:6473597d706e 1438 *
bogdanm 82:6473597d706e 1439 * Determines whether the peripheral allows write accesss. When this bit is set
bogdanm 82:6473597d706e 1440 * and a write access is attempted, access terminates with an error response and
bogdanm 82:6473597d706e 1441 * no peripheral access initiates.
bogdanm 82:6473597d706e 1442 *
bogdanm 82:6473597d706e 1443 * Values:
bogdanm 82:6473597d706e 1444 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 1445 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 1446 */
bogdanm 82:6473597d706e 1447 //@{
bogdanm 82:6473597d706e 1448 #define BP_AIPS_PACRA_WP0 (29U) //!< Bit position for AIPS_PACRA_WP0.
bogdanm 82:6473597d706e 1449 #define BM_AIPS_PACRA_WP0 (0x20000000U) //!< Bit mask for AIPS_PACRA_WP0.
bogdanm 82:6473597d706e 1450 #define BS_AIPS_PACRA_WP0 (1U) //!< Bit field size in bits for AIPS_PACRA_WP0.
bogdanm 82:6473597d706e 1451
bogdanm 82:6473597d706e 1452 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1453 //! @brief Read current value of the AIPS_PACRA_WP0 field.
bogdanm 82:6473597d706e 1454 #define BR_AIPS_PACRA_WP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP0))
bogdanm 82:6473597d706e 1455 #endif
bogdanm 82:6473597d706e 1456
bogdanm 82:6473597d706e 1457 //! @brief Format value for bitfield AIPS_PACRA_WP0.
bogdanm 82:6473597d706e 1458 #define BF_AIPS_PACRA_WP0(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRA_WP0), uint32_t) & BM_AIPS_PACRA_WP0)
bogdanm 82:6473597d706e 1459
bogdanm 82:6473597d706e 1460 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1461 //! @brief Set the WP0 field to a new value.
bogdanm 82:6473597d706e 1462 #define BW_AIPS_PACRA_WP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_WP0) = (v))
bogdanm 82:6473597d706e 1463 #endif
bogdanm 82:6473597d706e 1464 //@}
bogdanm 82:6473597d706e 1465
bogdanm 82:6473597d706e 1466 /*!
bogdanm 82:6473597d706e 1467 * @name Register AIPS_PACRA, field SP0[30] (RW)
bogdanm 82:6473597d706e 1468 *
bogdanm 82:6473597d706e 1469 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 1470 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 1471 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 1472 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 1473 * access initiates.
bogdanm 82:6473597d706e 1474 *
bogdanm 82:6473597d706e 1475 * Values:
bogdanm 82:6473597d706e 1476 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 1477 * accesses.
bogdanm 82:6473597d706e 1478 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 1479 */
bogdanm 82:6473597d706e 1480 //@{
bogdanm 82:6473597d706e 1481 #define BP_AIPS_PACRA_SP0 (30U) //!< Bit position for AIPS_PACRA_SP0.
bogdanm 82:6473597d706e 1482 #define BM_AIPS_PACRA_SP0 (0x40000000U) //!< Bit mask for AIPS_PACRA_SP0.
bogdanm 82:6473597d706e 1483 #define BS_AIPS_PACRA_SP0 (1U) //!< Bit field size in bits for AIPS_PACRA_SP0.
bogdanm 82:6473597d706e 1484
bogdanm 82:6473597d706e 1485 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1486 //! @brief Read current value of the AIPS_PACRA_SP0 field.
bogdanm 82:6473597d706e 1487 #define BR_AIPS_PACRA_SP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP0))
bogdanm 82:6473597d706e 1488 #endif
bogdanm 82:6473597d706e 1489
bogdanm 82:6473597d706e 1490 //! @brief Format value for bitfield AIPS_PACRA_SP0.
bogdanm 82:6473597d706e 1491 #define BF_AIPS_PACRA_SP0(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRA_SP0), uint32_t) & BM_AIPS_PACRA_SP0)
bogdanm 82:6473597d706e 1492
bogdanm 82:6473597d706e 1493 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1494 //! @brief Set the SP0 field to a new value.
bogdanm 82:6473597d706e 1495 #define BW_AIPS_PACRA_SP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRA_ADDR(x), BP_AIPS_PACRA_SP0) = (v))
bogdanm 82:6473597d706e 1496 #endif
bogdanm 82:6473597d706e 1497 //@}
bogdanm 82:6473597d706e 1498
bogdanm 82:6473597d706e 1499 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 1500 // HW_AIPS_PACRB - Peripheral Access Control Register
bogdanm 82:6473597d706e 1501 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 1502
bogdanm 82:6473597d706e 1503 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1504 /*!
bogdanm 82:6473597d706e 1505 * @brief HW_AIPS_PACRB - Peripheral Access Control Register (RW)
bogdanm 82:6473597d706e 1506 *
bogdanm 82:6473597d706e 1507 * Reset value: 0x44004400U
bogdanm 82:6473597d706e 1508 *
bogdanm 82:6473597d706e 1509 * Each PACR register consists of eight 4-bit PACR fields. Each PACR field
bogdanm 82:6473597d706e 1510 * defines the access levels for a particular peripheral. The mapping between a
bogdanm 82:6473597d706e 1511 * peripheral and its PACR field is shown in the table below. The peripheral assignment
bogdanm 82:6473597d706e 1512 * to each PACR is defined by the memory map slot that the peripheral is
bogdanm 82:6473597d706e 1513 * assigned to. See this chip's memory map for the assignment of a particular
bogdanm 82:6473597d706e 1514 * peripheral. The following table shows the location of each peripheral slot's PACR field
bogdanm 82:6473597d706e 1515 * in the PACR registers. Offset Register [31:28] [27:24] [23:20] [19:16] [15:12]
bogdanm 82:6473597d706e 1516 * [11:8] [7:4] [3:0] 0x20 PACRA PACR0 PACR1 PACR2 PACR3 PACR4 PACR5 PACR6 PACR7
bogdanm 82:6473597d706e 1517 * 0x24 PACRB PACR8 PACR9 PACR10 PACR11 PACR12 PACR13 PACR14 PACR15 0x28 PACRC
bogdanm 82:6473597d706e 1518 * PACR16 PACR17 PACR18 PACR19 PACR20 PACR21 PACR22 PACR23 0x2C PACRD PACR24
bogdanm 82:6473597d706e 1519 * PACR25 PACR26 PACR27 PACR28 PACR29 PACR30 PACR31 0x30 Reserved 0x34 Reserved 0x38
bogdanm 82:6473597d706e 1520 * Reserved 0x3C Reserved 0x40 PACRE PACR32 PACR33 PACR34 PACR35 PACR36 PACR37
bogdanm 82:6473597d706e 1521 * PACR38 PACR39 0x44 PACRF PACR40 PACR41 PACR42 PACR43 PACR44 PACR45 PACR46 PACR47
bogdanm 82:6473597d706e 1522 * 0x48 PACRG PACR48 PACR49 PACR50 PACR51 PACR52 PACR53 PACR54 PACR55 0x4C PACRH
bogdanm 82:6473597d706e 1523 * PACR56 PACR57 PACR58 PACR59 PACR60 PACR61 PACR62 PACR63 0x50 PACRI PACR64
bogdanm 82:6473597d706e 1524 * PACR65 PACR66 PACR67 PACR68 PACR69 PACR70 PACR71 0x54 PACRJ PACR72 PACR73 PACR74
bogdanm 82:6473597d706e 1525 * PACR75 PACR76 PACR77 PACR78 PACR79 0x58 PACRK PACR80 PACR81 PACR82 PACR83
bogdanm 82:6473597d706e 1526 * PACR84 PACR85 PACR86 PACR87 0x5C PACRL PACR88 PACR89 PACR90 PACR91 PACR92 PACR93
bogdanm 82:6473597d706e 1527 * PACR94 PACR95 0x60 PACRM PACR96 PACR97 PACR98 PACR99 PACR100 PACR101 PACR102
bogdanm 82:6473597d706e 1528 * PACR103 0x64 PACRN PACR104 PACR105 PACR106 PACR107 PACR108 PACR109 PACR110
bogdanm 82:6473597d706e 1529 * PACR111 0x68 PACRO PACR112 PACR113 PACR114 PACR115 PACR116 PACR117 PACR118 PACR119
bogdanm 82:6473597d706e 1530 * 0x6C PACRP PACR120 PACR121 PACR122 PACR123 PACR124 PACR125 PACR126 PACR127 0x80
bogdanm 82:6473597d706e 1531 * PACRU PACR GBL0 PACR GBL1 Reserved The register field descriptions for PACR
bogdanm 82:6473597d706e 1532 * A-D, which control peripheral slots 0-31, are shown below. The following
bogdanm 82:6473597d706e 1533 * section, PACRPeripheral Access Control Register , shows the register field
bogdanm 82:6473597d706e 1534 * descriptions for PACR E-P. All PACR registers are identical. They are divided into two
bogdanm 82:6473597d706e 1535 * sections because they occupy two non-contiguous address spaces.
bogdanm 82:6473597d706e 1536 */
bogdanm 82:6473597d706e 1537 typedef union _hw_aips_pacrb
bogdanm 82:6473597d706e 1538 {
bogdanm 82:6473597d706e 1539 uint32_t U;
bogdanm 82:6473597d706e 1540 struct _hw_aips_pacrb_bitfields
bogdanm 82:6473597d706e 1541 {
bogdanm 82:6473597d706e 1542 uint32_t TP7 : 1; //!< [0] Trusted Protect
bogdanm 82:6473597d706e 1543 uint32_t WP7 : 1; //!< [1] Write Protect
bogdanm 82:6473597d706e 1544 uint32_t SP7 : 1; //!< [2] Supervisor Protect
bogdanm 82:6473597d706e 1545 uint32_t RESERVED0 : 1; //!< [3]
bogdanm 82:6473597d706e 1546 uint32_t TP6 : 1; //!< [4] Trusted Protect
bogdanm 82:6473597d706e 1547 uint32_t WP6 : 1; //!< [5] Write Protect
bogdanm 82:6473597d706e 1548 uint32_t SP6 : 1; //!< [6] Supervisor Protect
bogdanm 82:6473597d706e 1549 uint32_t RESERVED1 : 1; //!< [7]
bogdanm 82:6473597d706e 1550 uint32_t TP5 : 1; //!< [8] Trusted Protect
bogdanm 82:6473597d706e 1551 uint32_t WP5 : 1; //!< [9] Write Protect
bogdanm 82:6473597d706e 1552 uint32_t SP5 : 1; //!< [10] Supervisor Protect
bogdanm 82:6473597d706e 1553 uint32_t RESERVED2 : 1; //!< [11]
bogdanm 82:6473597d706e 1554 uint32_t TP4 : 1; //!< [12] Trusted Protect
bogdanm 82:6473597d706e 1555 uint32_t WP4 : 1; //!< [13] Write Protect
bogdanm 82:6473597d706e 1556 uint32_t SP4 : 1; //!< [14] Supervisor Protect
bogdanm 82:6473597d706e 1557 uint32_t RESERVED3 : 1; //!< [15]
bogdanm 82:6473597d706e 1558 uint32_t TP3 : 1; //!< [16] Trusted Protect
bogdanm 82:6473597d706e 1559 uint32_t WP3 : 1; //!< [17] Write Protect
bogdanm 82:6473597d706e 1560 uint32_t SP3 : 1; //!< [18] Supervisor Protect
bogdanm 82:6473597d706e 1561 uint32_t RESERVED4 : 1; //!< [19]
bogdanm 82:6473597d706e 1562 uint32_t TP2 : 1; //!< [20] Trusted Protect
bogdanm 82:6473597d706e 1563 uint32_t WP2 : 1; //!< [21] Write Protect
bogdanm 82:6473597d706e 1564 uint32_t SP2 : 1; //!< [22] Supervisor Protect
bogdanm 82:6473597d706e 1565 uint32_t RESERVED5 : 1; //!< [23]
bogdanm 82:6473597d706e 1566 uint32_t TP1 : 1; //!< [24] Trusted Protect
bogdanm 82:6473597d706e 1567 uint32_t WP1 : 1; //!< [25] Write Protect
bogdanm 82:6473597d706e 1568 uint32_t SP1 : 1; //!< [26] Supervisor Protect
bogdanm 82:6473597d706e 1569 uint32_t RESERVED6 : 1; //!< [27]
bogdanm 82:6473597d706e 1570 uint32_t TP0 : 1; //!< [28] Trusted Protect
bogdanm 82:6473597d706e 1571 uint32_t WP0 : 1; //!< [29] Write Protect
bogdanm 82:6473597d706e 1572 uint32_t SP0 : 1; //!< [30] Supervisor Protect
bogdanm 82:6473597d706e 1573 uint32_t RESERVED7 : 1; //!< [31]
bogdanm 82:6473597d706e 1574 } B;
bogdanm 82:6473597d706e 1575 } hw_aips_pacrb_t;
bogdanm 82:6473597d706e 1576 #endif
bogdanm 82:6473597d706e 1577
bogdanm 82:6473597d706e 1578 /*!
bogdanm 82:6473597d706e 1579 * @name Constants and macros for entire AIPS_PACRB register
bogdanm 82:6473597d706e 1580 */
bogdanm 82:6473597d706e 1581 //@{
bogdanm 82:6473597d706e 1582 #define HW_AIPS_PACRB_ADDR(x) (REGS_AIPS_BASE(x) + 0x24U)
bogdanm 82:6473597d706e 1583
bogdanm 82:6473597d706e 1584 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1585 #define HW_AIPS_PACRB(x) (*(__IO hw_aips_pacrb_t *) HW_AIPS_PACRB_ADDR(x))
bogdanm 82:6473597d706e 1586 #define HW_AIPS_PACRB_RD(x) (HW_AIPS_PACRB(x).U)
bogdanm 82:6473597d706e 1587 #define HW_AIPS_PACRB_WR(x, v) (HW_AIPS_PACRB(x).U = (v))
bogdanm 82:6473597d706e 1588 #define HW_AIPS_PACRB_SET(x, v) (HW_AIPS_PACRB_WR(x, HW_AIPS_PACRB_RD(x) | (v)))
bogdanm 82:6473597d706e 1589 #define HW_AIPS_PACRB_CLR(x, v) (HW_AIPS_PACRB_WR(x, HW_AIPS_PACRB_RD(x) & ~(v)))
bogdanm 82:6473597d706e 1590 #define HW_AIPS_PACRB_TOG(x, v) (HW_AIPS_PACRB_WR(x, HW_AIPS_PACRB_RD(x) ^ (v)))
bogdanm 82:6473597d706e 1591 #endif
bogdanm 82:6473597d706e 1592 //@}
bogdanm 82:6473597d706e 1593
bogdanm 82:6473597d706e 1594 /*
bogdanm 82:6473597d706e 1595 * Constants & macros for individual AIPS_PACRB bitfields
bogdanm 82:6473597d706e 1596 */
bogdanm 82:6473597d706e 1597
bogdanm 82:6473597d706e 1598 /*!
bogdanm 82:6473597d706e 1599 * @name Register AIPS_PACRB, field TP7[0] (RW)
bogdanm 82:6473597d706e 1600 *
bogdanm 82:6473597d706e 1601 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 1602 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 1603 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 1604 *
bogdanm 82:6473597d706e 1605 * Values:
bogdanm 82:6473597d706e 1606 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 1607 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 1608 */
bogdanm 82:6473597d706e 1609 //@{
bogdanm 82:6473597d706e 1610 #define BP_AIPS_PACRB_TP7 (0U) //!< Bit position for AIPS_PACRB_TP7.
bogdanm 82:6473597d706e 1611 #define BM_AIPS_PACRB_TP7 (0x00000001U) //!< Bit mask for AIPS_PACRB_TP7.
bogdanm 82:6473597d706e 1612 #define BS_AIPS_PACRB_TP7 (1U) //!< Bit field size in bits for AIPS_PACRB_TP7.
bogdanm 82:6473597d706e 1613
bogdanm 82:6473597d706e 1614 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1615 //! @brief Read current value of the AIPS_PACRB_TP7 field.
bogdanm 82:6473597d706e 1616 #define BR_AIPS_PACRB_TP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP7))
bogdanm 82:6473597d706e 1617 #endif
bogdanm 82:6473597d706e 1618
bogdanm 82:6473597d706e 1619 //! @brief Format value for bitfield AIPS_PACRB_TP7.
bogdanm 82:6473597d706e 1620 #define BF_AIPS_PACRB_TP7(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRB_TP7), uint32_t) & BM_AIPS_PACRB_TP7)
bogdanm 82:6473597d706e 1621
bogdanm 82:6473597d706e 1622 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1623 //! @brief Set the TP7 field to a new value.
bogdanm 82:6473597d706e 1624 #define BW_AIPS_PACRB_TP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP7) = (v))
bogdanm 82:6473597d706e 1625 #endif
bogdanm 82:6473597d706e 1626 //@}
bogdanm 82:6473597d706e 1627
bogdanm 82:6473597d706e 1628 /*!
bogdanm 82:6473597d706e 1629 * @name Register AIPS_PACRB, field WP7[1] (RW)
bogdanm 82:6473597d706e 1630 *
bogdanm 82:6473597d706e 1631 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 1632 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 1633 * and no peripheral access initiates.
bogdanm 82:6473597d706e 1634 *
bogdanm 82:6473597d706e 1635 * Values:
bogdanm 82:6473597d706e 1636 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 1637 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 1638 */
bogdanm 82:6473597d706e 1639 //@{
bogdanm 82:6473597d706e 1640 #define BP_AIPS_PACRB_WP7 (1U) //!< Bit position for AIPS_PACRB_WP7.
bogdanm 82:6473597d706e 1641 #define BM_AIPS_PACRB_WP7 (0x00000002U) //!< Bit mask for AIPS_PACRB_WP7.
bogdanm 82:6473597d706e 1642 #define BS_AIPS_PACRB_WP7 (1U) //!< Bit field size in bits for AIPS_PACRB_WP7.
bogdanm 82:6473597d706e 1643
bogdanm 82:6473597d706e 1644 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1645 //! @brief Read current value of the AIPS_PACRB_WP7 field.
bogdanm 82:6473597d706e 1646 #define BR_AIPS_PACRB_WP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP7))
bogdanm 82:6473597d706e 1647 #endif
bogdanm 82:6473597d706e 1648
bogdanm 82:6473597d706e 1649 //! @brief Format value for bitfield AIPS_PACRB_WP7.
bogdanm 82:6473597d706e 1650 #define BF_AIPS_PACRB_WP7(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRB_WP7), uint32_t) & BM_AIPS_PACRB_WP7)
bogdanm 82:6473597d706e 1651
bogdanm 82:6473597d706e 1652 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1653 //! @brief Set the WP7 field to a new value.
bogdanm 82:6473597d706e 1654 #define BW_AIPS_PACRB_WP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP7) = (v))
bogdanm 82:6473597d706e 1655 #endif
bogdanm 82:6473597d706e 1656 //@}
bogdanm 82:6473597d706e 1657
bogdanm 82:6473597d706e 1658 /*!
bogdanm 82:6473597d706e 1659 * @name Register AIPS_PACRB, field SP7[2] (RW)
bogdanm 82:6473597d706e 1660 *
bogdanm 82:6473597d706e 1661 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 1662 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 1663 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 1664 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 1665 * access initiates.
bogdanm 82:6473597d706e 1666 *
bogdanm 82:6473597d706e 1667 * Values:
bogdanm 82:6473597d706e 1668 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 1669 * accesses.
bogdanm 82:6473597d706e 1670 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 1671 */
bogdanm 82:6473597d706e 1672 //@{
bogdanm 82:6473597d706e 1673 #define BP_AIPS_PACRB_SP7 (2U) //!< Bit position for AIPS_PACRB_SP7.
bogdanm 82:6473597d706e 1674 #define BM_AIPS_PACRB_SP7 (0x00000004U) //!< Bit mask for AIPS_PACRB_SP7.
bogdanm 82:6473597d706e 1675 #define BS_AIPS_PACRB_SP7 (1U) //!< Bit field size in bits for AIPS_PACRB_SP7.
bogdanm 82:6473597d706e 1676
bogdanm 82:6473597d706e 1677 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1678 //! @brief Read current value of the AIPS_PACRB_SP7 field.
bogdanm 82:6473597d706e 1679 #define BR_AIPS_PACRB_SP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP7))
bogdanm 82:6473597d706e 1680 #endif
bogdanm 82:6473597d706e 1681
bogdanm 82:6473597d706e 1682 //! @brief Format value for bitfield AIPS_PACRB_SP7.
bogdanm 82:6473597d706e 1683 #define BF_AIPS_PACRB_SP7(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRB_SP7), uint32_t) & BM_AIPS_PACRB_SP7)
bogdanm 82:6473597d706e 1684
bogdanm 82:6473597d706e 1685 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1686 //! @brief Set the SP7 field to a new value.
bogdanm 82:6473597d706e 1687 #define BW_AIPS_PACRB_SP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP7) = (v))
bogdanm 82:6473597d706e 1688 #endif
bogdanm 82:6473597d706e 1689 //@}
bogdanm 82:6473597d706e 1690
bogdanm 82:6473597d706e 1691 /*!
bogdanm 82:6473597d706e 1692 * @name Register AIPS_PACRB, field TP6[4] (RW)
bogdanm 82:6473597d706e 1693 *
bogdanm 82:6473597d706e 1694 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 1695 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 1696 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 1697 *
bogdanm 82:6473597d706e 1698 * Values:
bogdanm 82:6473597d706e 1699 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 1700 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 1701 */
bogdanm 82:6473597d706e 1702 //@{
bogdanm 82:6473597d706e 1703 #define BP_AIPS_PACRB_TP6 (4U) //!< Bit position for AIPS_PACRB_TP6.
bogdanm 82:6473597d706e 1704 #define BM_AIPS_PACRB_TP6 (0x00000010U) //!< Bit mask for AIPS_PACRB_TP6.
bogdanm 82:6473597d706e 1705 #define BS_AIPS_PACRB_TP6 (1U) //!< Bit field size in bits for AIPS_PACRB_TP6.
bogdanm 82:6473597d706e 1706
bogdanm 82:6473597d706e 1707 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1708 //! @brief Read current value of the AIPS_PACRB_TP6 field.
bogdanm 82:6473597d706e 1709 #define BR_AIPS_PACRB_TP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP6))
bogdanm 82:6473597d706e 1710 #endif
bogdanm 82:6473597d706e 1711
bogdanm 82:6473597d706e 1712 //! @brief Format value for bitfield AIPS_PACRB_TP6.
bogdanm 82:6473597d706e 1713 #define BF_AIPS_PACRB_TP6(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRB_TP6), uint32_t) & BM_AIPS_PACRB_TP6)
bogdanm 82:6473597d706e 1714
bogdanm 82:6473597d706e 1715 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1716 //! @brief Set the TP6 field to a new value.
bogdanm 82:6473597d706e 1717 #define BW_AIPS_PACRB_TP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP6) = (v))
bogdanm 82:6473597d706e 1718 #endif
bogdanm 82:6473597d706e 1719 //@}
bogdanm 82:6473597d706e 1720
bogdanm 82:6473597d706e 1721 /*!
bogdanm 82:6473597d706e 1722 * @name Register AIPS_PACRB, field WP6[5] (RW)
bogdanm 82:6473597d706e 1723 *
bogdanm 82:6473597d706e 1724 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 1725 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 1726 * and no peripheral access initiates.
bogdanm 82:6473597d706e 1727 *
bogdanm 82:6473597d706e 1728 * Values:
bogdanm 82:6473597d706e 1729 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 1730 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 1731 */
bogdanm 82:6473597d706e 1732 //@{
bogdanm 82:6473597d706e 1733 #define BP_AIPS_PACRB_WP6 (5U) //!< Bit position for AIPS_PACRB_WP6.
bogdanm 82:6473597d706e 1734 #define BM_AIPS_PACRB_WP6 (0x00000020U) //!< Bit mask for AIPS_PACRB_WP6.
bogdanm 82:6473597d706e 1735 #define BS_AIPS_PACRB_WP6 (1U) //!< Bit field size in bits for AIPS_PACRB_WP6.
bogdanm 82:6473597d706e 1736
bogdanm 82:6473597d706e 1737 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1738 //! @brief Read current value of the AIPS_PACRB_WP6 field.
bogdanm 82:6473597d706e 1739 #define BR_AIPS_PACRB_WP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP6))
bogdanm 82:6473597d706e 1740 #endif
bogdanm 82:6473597d706e 1741
bogdanm 82:6473597d706e 1742 //! @brief Format value for bitfield AIPS_PACRB_WP6.
bogdanm 82:6473597d706e 1743 #define BF_AIPS_PACRB_WP6(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRB_WP6), uint32_t) & BM_AIPS_PACRB_WP6)
bogdanm 82:6473597d706e 1744
bogdanm 82:6473597d706e 1745 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1746 //! @brief Set the WP6 field to a new value.
bogdanm 82:6473597d706e 1747 #define BW_AIPS_PACRB_WP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP6) = (v))
bogdanm 82:6473597d706e 1748 #endif
bogdanm 82:6473597d706e 1749 //@}
bogdanm 82:6473597d706e 1750
bogdanm 82:6473597d706e 1751 /*!
bogdanm 82:6473597d706e 1752 * @name Register AIPS_PACRB, field SP6[6] (RW)
bogdanm 82:6473597d706e 1753 *
bogdanm 82:6473597d706e 1754 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 1755 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 1756 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 1757 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 1758 * access initiates.
bogdanm 82:6473597d706e 1759 *
bogdanm 82:6473597d706e 1760 * Values:
bogdanm 82:6473597d706e 1761 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 1762 * accesses.
bogdanm 82:6473597d706e 1763 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 1764 */
bogdanm 82:6473597d706e 1765 //@{
bogdanm 82:6473597d706e 1766 #define BP_AIPS_PACRB_SP6 (6U) //!< Bit position for AIPS_PACRB_SP6.
bogdanm 82:6473597d706e 1767 #define BM_AIPS_PACRB_SP6 (0x00000040U) //!< Bit mask for AIPS_PACRB_SP6.
bogdanm 82:6473597d706e 1768 #define BS_AIPS_PACRB_SP6 (1U) //!< Bit field size in bits for AIPS_PACRB_SP6.
bogdanm 82:6473597d706e 1769
bogdanm 82:6473597d706e 1770 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1771 //! @brief Read current value of the AIPS_PACRB_SP6 field.
bogdanm 82:6473597d706e 1772 #define BR_AIPS_PACRB_SP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP6))
bogdanm 82:6473597d706e 1773 #endif
bogdanm 82:6473597d706e 1774
bogdanm 82:6473597d706e 1775 //! @brief Format value for bitfield AIPS_PACRB_SP6.
bogdanm 82:6473597d706e 1776 #define BF_AIPS_PACRB_SP6(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRB_SP6), uint32_t) & BM_AIPS_PACRB_SP6)
bogdanm 82:6473597d706e 1777
bogdanm 82:6473597d706e 1778 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1779 //! @brief Set the SP6 field to a new value.
bogdanm 82:6473597d706e 1780 #define BW_AIPS_PACRB_SP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP6) = (v))
bogdanm 82:6473597d706e 1781 #endif
bogdanm 82:6473597d706e 1782 //@}
bogdanm 82:6473597d706e 1783
bogdanm 82:6473597d706e 1784 /*!
bogdanm 82:6473597d706e 1785 * @name Register AIPS_PACRB, field TP5[8] (RW)
bogdanm 82:6473597d706e 1786 *
bogdanm 82:6473597d706e 1787 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 1788 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 1789 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 1790 *
bogdanm 82:6473597d706e 1791 * Values:
bogdanm 82:6473597d706e 1792 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 1793 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 1794 */
bogdanm 82:6473597d706e 1795 //@{
bogdanm 82:6473597d706e 1796 #define BP_AIPS_PACRB_TP5 (8U) //!< Bit position for AIPS_PACRB_TP5.
bogdanm 82:6473597d706e 1797 #define BM_AIPS_PACRB_TP5 (0x00000100U) //!< Bit mask for AIPS_PACRB_TP5.
bogdanm 82:6473597d706e 1798 #define BS_AIPS_PACRB_TP5 (1U) //!< Bit field size in bits for AIPS_PACRB_TP5.
bogdanm 82:6473597d706e 1799
bogdanm 82:6473597d706e 1800 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1801 //! @brief Read current value of the AIPS_PACRB_TP5 field.
bogdanm 82:6473597d706e 1802 #define BR_AIPS_PACRB_TP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP5))
bogdanm 82:6473597d706e 1803 #endif
bogdanm 82:6473597d706e 1804
bogdanm 82:6473597d706e 1805 //! @brief Format value for bitfield AIPS_PACRB_TP5.
bogdanm 82:6473597d706e 1806 #define BF_AIPS_PACRB_TP5(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRB_TP5), uint32_t) & BM_AIPS_PACRB_TP5)
bogdanm 82:6473597d706e 1807
bogdanm 82:6473597d706e 1808 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1809 //! @brief Set the TP5 field to a new value.
bogdanm 82:6473597d706e 1810 #define BW_AIPS_PACRB_TP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP5) = (v))
bogdanm 82:6473597d706e 1811 #endif
bogdanm 82:6473597d706e 1812 //@}
bogdanm 82:6473597d706e 1813
bogdanm 82:6473597d706e 1814 /*!
bogdanm 82:6473597d706e 1815 * @name Register AIPS_PACRB, field WP5[9] (RW)
bogdanm 82:6473597d706e 1816 *
bogdanm 82:6473597d706e 1817 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 1818 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 1819 * and no peripheral access initiates.
bogdanm 82:6473597d706e 1820 *
bogdanm 82:6473597d706e 1821 * Values:
bogdanm 82:6473597d706e 1822 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 1823 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 1824 */
bogdanm 82:6473597d706e 1825 //@{
bogdanm 82:6473597d706e 1826 #define BP_AIPS_PACRB_WP5 (9U) //!< Bit position for AIPS_PACRB_WP5.
bogdanm 82:6473597d706e 1827 #define BM_AIPS_PACRB_WP5 (0x00000200U) //!< Bit mask for AIPS_PACRB_WP5.
bogdanm 82:6473597d706e 1828 #define BS_AIPS_PACRB_WP5 (1U) //!< Bit field size in bits for AIPS_PACRB_WP5.
bogdanm 82:6473597d706e 1829
bogdanm 82:6473597d706e 1830 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1831 //! @brief Read current value of the AIPS_PACRB_WP5 field.
bogdanm 82:6473597d706e 1832 #define BR_AIPS_PACRB_WP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP5))
bogdanm 82:6473597d706e 1833 #endif
bogdanm 82:6473597d706e 1834
bogdanm 82:6473597d706e 1835 //! @brief Format value for bitfield AIPS_PACRB_WP5.
bogdanm 82:6473597d706e 1836 #define BF_AIPS_PACRB_WP5(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRB_WP5), uint32_t) & BM_AIPS_PACRB_WP5)
bogdanm 82:6473597d706e 1837
bogdanm 82:6473597d706e 1838 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1839 //! @brief Set the WP5 field to a new value.
bogdanm 82:6473597d706e 1840 #define BW_AIPS_PACRB_WP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP5) = (v))
bogdanm 82:6473597d706e 1841 #endif
bogdanm 82:6473597d706e 1842 //@}
bogdanm 82:6473597d706e 1843
bogdanm 82:6473597d706e 1844 /*!
bogdanm 82:6473597d706e 1845 * @name Register AIPS_PACRB, field SP5[10] (RW)
bogdanm 82:6473597d706e 1846 *
bogdanm 82:6473597d706e 1847 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 1848 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 1849 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 1850 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 1851 * access initiates.
bogdanm 82:6473597d706e 1852 *
bogdanm 82:6473597d706e 1853 * Values:
bogdanm 82:6473597d706e 1854 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 1855 * accesses.
bogdanm 82:6473597d706e 1856 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 1857 */
bogdanm 82:6473597d706e 1858 //@{
bogdanm 82:6473597d706e 1859 #define BP_AIPS_PACRB_SP5 (10U) //!< Bit position for AIPS_PACRB_SP5.
bogdanm 82:6473597d706e 1860 #define BM_AIPS_PACRB_SP5 (0x00000400U) //!< Bit mask for AIPS_PACRB_SP5.
bogdanm 82:6473597d706e 1861 #define BS_AIPS_PACRB_SP5 (1U) //!< Bit field size in bits for AIPS_PACRB_SP5.
bogdanm 82:6473597d706e 1862
bogdanm 82:6473597d706e 1863 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1864 //! @brief Read current value of the AIPS_PACRB_SP5 field.
bogdanm 82:6473597d706e 1865 #define BR_AIPS_PACRB_SP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP5))
bogdanm 82:6473597d706e 1866 #endif
bogdanm 82:6473597d706e 1867
bogdanm 82:6473597d706e 1868 //! @brief Format value for bitfield AIPS_PACRB_SP5.
bogdanm 82:6473597d706e 1869 #define BF_AIPS_PACRB_SP5(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRB_SP5), uint32_t) & BM_AIPS_PACRB_SP5)
bogdanm 82:6473597d706e 1870
bogdanm 82:6473597d706e 1871 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1872 //! @brief Set the SP5 field to a new value.
bogdanm 82:6473597d706e 1873 #define BW_AIPS_PACRB_SP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP5) = (v))
bogdanm 82:6473597d706e 1874 #endif
bogdanm 82:6473597d706e 1875 //@}
bogdanm 82:6473597d706e 1876
bogdanm 82:6473597d706e 1877 /*!
bogdanm 82:6473597d706e 1878 * @name Register AIPS_PACRB, field TP4[12] (RW)
bogdanm 82:6473597d706e 1879 *
bogdanm 82:6473597d706e 1880 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 1881 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 1882 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 1883 *
bogdanm 82:6473597d706e 1884 * Values:
bogdanm 82:6473597d706e 1885 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 1886 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 1887 */
bogdanm 82:6473597d706e 1888 //@{
bogdanm 82:6473597d706e 1889 #define BP_AIPS_PACRB_TP4 (12U) //!< Bit position for AIPS_PACRB_TP4.
bogdanm 82:6473597d706e 1890 #define BM_AIPS_PACRB_TP4 (0x00001000U) //!< Bit mask for AIPS_PACRB_TP4.
bogdanm 82:6473597d706e 1891 #define BS_AIPS_PACRB_TP4 (1U) //!< Bit field size in bits for AIPS_PACRB_TP4.
bogdanm 82:6473597d706e 1892
bogdanm 82:6473597d706e 1893 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1894 //! @brief Read current value of the AIPS_PACRB_TP4 field.
bogdanm 82:6473597d706e 1895 #define BR_AIPS_PACRB_TP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP4))
bogdanm 82:6473597d706e 1896 #endif
bogdanm 82:6473597d706e 1897
bogdanm 82:6473597d706e 1898 //! @brief Format value for bitfield AIPS_PACRB_TP4.
bogdanm 82:6473597d706e 1899 #define BF_AIPS_PACRB_TP4(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRB_TP4), uint32_t) & BM_AIPS_PACRB_TP4)
bogdanm 82:6473597d706e 1900
bogdanm 82:6473597d706e 1901 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1902 //! @brief Set the TP4 field to a new value.
bogdanm 82:6473597d706e 1903 #define BW_AIPS_PACRB_TP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP4) = (v))
bogdanm 82:6473597d706e 1904 #endif
bogdanm 82:6473597d706e 1905 //@}
bogdanm 82:6473597d706e 1906
bogdanm 82:6473597d706e 1907 /*!
bogdanm 82:6473597d706e 1908 * @name Register AIPS_PACRB, field WP4[13] (RW)
bogdanm 82:6473597d706e 1909 *
bogdanm 82:6473597d706e 1910 * Determines whether the peripheral allows write accesss. When this bit is set
bogdanm 82:6473597d706e 1911 * and a write access is attempted, access terminates with an error response and
bogdanm 82:6473597d706e 1912 * no peripheral access initiates.
bogdanm 82:6473597d706e 1913 *
bogdanm 82:6473597d706e 1914 * Values:
bogdanm 82:6473597d706e 1915 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 1916 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 1917 */
bogdanm 82:6473597d706e 1918 //@{
bogdanm 82:6473597d706e 1919 #define BP_AIPS_PACRB_WP4 (13U) //!< Bit position for AIPS_PACRB_WP4.
bogdanm 82:6473597d706e 1920 #define BM_AIPS_PACRB_WP4 (0x00002000U) //!< Bit mask for AIPS_PACRB_WP4.
bogdanm 82:6473597d706e 1921 #define BS_AIPS_PACRB_WP4 (1U) //!< Bit field size in bits for AIPS_PACRB_WP4.
bogdanm 82:6473597d706e 1922
bogdanm 82:6473597d706e 1923 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1924 //! @brief Read current value of the AIPS_PACRB_WP4 field.
bogdanm 82:6473597d706e 1925 #define BR_AIPS_PACRB_WP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP4))
bogdanm 82:6473597d706e 1926 #endif
bogdanm 82:6473597d706e 1927
bogdanm 82:6473597d706e 1928 //! @brief Format value for bitfield AIPS_PACRB_WP4.
bogdanm 82:6473597d706e 1929 #define BF_AIPS_PACRB_WP4(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRB_WP4), uint32_t) & BM_AIPS_PACRB_WP4)
bogdanm 82:6473597d706e 1930
bogdanm 82:6473597d706e 1931 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1932 //! @brief Set the WP4 field to a new value.
bogdanm 82:6473597d706e 1933 #define BW_AIPS_PACRB_WP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP4) = (v))
bogdanm 82:6473597d706e 1934 #endif
bogdanm 82:6473597d706e 1935 //@}
bogdanm 82:6473597d706e 1936
bogdanm 82:6473597d706e 1937 /*!
bogdanm 82:6473597d706e 1938 * @name Register AIPS_PACRB, field SP4[14] (RW)
bogdanm 82:6473597d706e 1939 *
bogdanm 82:6473597d706e 1940 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 1941 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 1942 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 1943 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 1944 * access initiates.
bogdanm 82:6473597d706e 1945 *
bogdanm 82:6473597d706e 1946 * Values:
bogdanm 82:6473597d706e 1947 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 1948 * accesses.
bogdanm 82:6473597d706e 1949 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 1950 */
bogdanm 82:6473597d706e 1951 //@{
bogdanm 82:6473597d706e 1952 #define BP_AIPS_PACRB_SP4 (14U) //!< Bit position for AIPS_PACRB_SP4.
bogdanm 82:6473597d706e 1953 #define BM_AIPS_PACRB_SP4 (0x00004000U) //!< Bit mask for AIPS_PACRB_SP4.
bogdanm 82:6473597d706e 1954 #define BS_AIPS_PACRB_SP4 (1U) //!< Bit field size in bits for AIPS_PACRB_SP4.
bogdanm 82:6473597d706e 1955
bogdanm 82:6473597d706e 1956 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1957 //! @brief Read current value of the AIPS_PACRB_SP4 field.
bogdanm 82:6473597d706e 1958 #define BR_AIPS_PACRB_SP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP4))
bogdanm 82:6473597d706e 1959 #endif
bogdanm 82:6473597d706e 1960
bogdanm 82:6473597d706e 1961 //! @brief Format value for bitfield AIPS_PACRB_SP4.
bogdanm 82:6473597d706e 1962 #define BF_AIPS_PACRB_SP4(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRB_SP4), uint32_t) & BM_AIPS_PACRB_SP4)
bogdanm 82:6473597d706e 1963
bogdanm 82:6473597d706e 1964 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1965 //! @brief Set the SP4 field to a new value.
bogdanm 82:6473597d706e 1966 #define BW_AIPS_PACRB_SP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP4) = (v))
bogdanm 82:6473597d706e 1967 #endif
bogdanm 82:6473597d706e 1968 //@}
bogdanm 82:6473597d706e 1969
bogdanm 82:6473597d706e 1970 /*!
bogdanm 82:6473597d706e 1971 * @name Register AIPS_PACRB, field TP3[16] (RW)
bogdanm 82:6473597d706e 1972 *
bogdanm 82:6473597d706e 1973 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 1974 * When this bit is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 1975 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 1976 *
bogdanm 82:6473597d706e 1977 * Values:
bogdanm 82:6473597d706e 1978 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 1979 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 1980 */
bogdanm 82:6473597d706e 1981 //@{
bogdanm 82:6473597d706e 1982 #define BP_AIPS_PACRB_TP3 (16U) //!< Bit position for AIPS_PACRB_TP3.
bogdanm 82:6473597d706e 1983 #define BM_AIPS_PACRB_TP3 (0x00010000U) //!< Bit mask for AIPS_PACRB_TP3.
bogdanm 82:6473597d706e 1984 #define BS_AIPS_PACRB_TP3 (1U) //!< Bit field size in bits for AIPS_PACRB_TP3.
bogdanm 82:6473597d706e 1985
bogdanm 82:6473597d706e 1986 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1987 //! @brief Read current value of the AIPS_PACRB_TP3 field.
bogdanm 82:6473597d706e 1988 #define BR_AIPS_PACRB_TP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP3))
bogdanm 82:6473597d706e 1989 #endif
bogdanm 82:6473597d706e 1990
bogdanm 82:6473597d706e 1991 //! @brief Format value for bitfield AIPS_PACRB_TP3.
bogdanm 82:6473597d706e 1992 #define BF_AIPS_PACRB_TP3(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRB_TP3), uint32_t) & BM_AIPS_PACRB_TP3)
bogdanm 82:6473597d706e 1993
bogdanm 82:6473597d706e 1994 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 1995 //! @brief Set the TP3 field to a new value.
bogdanm 82:6473597d706e 1996 #define BW_AIPS_PACRB_TP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP3) = (v))
bogdanm 82:6473597d706e 1997 #endif
bogdanm 82:6473597d706e 1998 //@}
bogdanm 82:6473597d706e 1999
bogdanm 82:6473597d706e 2000 /*!
bogdanm 82:6473597d706e 2001 * @name Register AIPS_PACRB, field WP3[17] (RW)
bogdanm 82:6473597d706e 2002 *
bogdanm 82:6473597d706e 2003 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 2004 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 2005 * and no peripheral access initiates.
bogdanm 82:6473597d706e 2006 *
bogdanm 82:6473597d706e 2007 * Values:
bogdanm 82:6473597d706e 2008 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 2009 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 2010 */
bogdanm 82:6473597d706e 2011 //@{
bogdanm 82:6473597d706e 2012 #define BP_AIPS_PACRB_WP3 (17U) //!< Bit position for AIPS_PACRB_WP3.
bogdanm 82:6473597d706e 2013 #define BM_AIPS_PACRB_WP3 (0x00020000U) //!< Bit mask for AIPS_PACRB_WP3.
bogdanm 82:6473597d706e 2014 #define BS_AIPS_PACRB_WP3 (1U) //!< Bit field size in bits for AIPS_PACRB_WP3.
bogdanm 82:6473597d706e 2015
bogdanm 82:6473597d706e 2016 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2017 //! @brief Read current value of the AIPS_PACRB_WP3 field.
bogdanm 82:6473597d706e 2018 #define BR_AIPS_PACRB_WP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP3))
bogdanm 82:6473597d706e 2019 #endif
bogdanm 82:6473597d706e 2020
bogdanm 82:6473597d706e 2021 //! @brief Format value for bitfield AIPS_PACRB_WP3.
bogdanm 82:6473597d706e 2022 #define BF_AIPS_PACRB_WP3(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRB_WP3), uint32_t) & BM_AIPS_PACRB_WP3)
bogdanm 82:6473597d706e 2023
bogdanm 82:6473597d706e 2024 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2025 //! @brief Set the WP3 field to a new value.
bogdanm 82:6473597d706e 2026 #define BW_AIPS_PACRB_WP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP3) = (v))
bogdanm 82:6473597d706e 2027 #endif
bogdanm 82:6473597d706e 2028 //@}
bogdanm 82:6473597d706e 2029
bogdanm 82:6473597d706e 2030 /*!
bogdanm 82:6473597d706e 2031 * @name Register AIPS_PACRB, field SP3[18] (RW)
bogdanm 82:6473597d706e 2032 *
bogdanm 82:6473597d706e 2033 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 2034 * access. When this bit is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 2035 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
bogdanm 82:6473597d706e 2036 * set. If not, access terminates with an error response and no peripheral access
bogdanm 82:6473597d706e 2037 * initiates.
bogdanm 82:6473597d706e 2038 *
bogdanm 82:6473597d706e 2039 * Values:
bogdanm 82:6473597d706e 2040 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 2041 * accesses.
bogdanm 82:6473597d706e 2042 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 2043 */
bogdanm 82:6473597d706e 2044 //@{
bogdanm 82:6473597d706e 2045 #define BP_AIPS_PACRB_SP3 (18U) //!< Bit position for AIPS_PACRB_SP3.
bogdanm 82:6473597d706e 2046 #define BM_AIPS_PACRB_SP3 (0x00040000U) //!< Bit mask for AIPS_PACRB_SP3.
bogdanm 82:6473597d706e 2047 #define BS_AIPS_PACRB_SP3 (1U) //!< Bit field size in bits for AIPS_PACRB_SP3.
bogdanm 82:6473597d706e 2048
bogdanm 82:6473597d706e 2049 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2050 //! @brief Read current value of the AIPS_PACRB_SP3 field.
bogdanm 82:6473597d706e 2051 #define BR_AIPS_PACRB_SP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP3))
bogdanm 82:6473597d706e 2052 #endif
bogdanm 82:6473597d706e 2053
bogdanm 82:6473597d706e 2054 //! @brief Format value for bitfield AIPS_PACRB_SP3.
bogdanm 82:6473597d706e 2055 #define BF_AIPS_PACRB_SP3(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRB_SP3), uint32_t) & BM_AIPS_PACRB_SP3)
bogdanm 82:6473597d706e 2056
bogdanm 82:6473597d706e 2057 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2058 //! @brief Set the SP3 field to a new value.
bogdanm 82:6473597d706e 2059 #define BW_AIPS_PACRB_SP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP3) = (v))
bogdanm 82:6473597d706e 2060 #endif
bogdanm 82:6473597d706e 2061 //@}
bogdanm 82:6473597d706e 2062
bogdanm 82:6473597d706e 2063 /*!
bogdanm 82:6473597d706e 2064 * @name Register AIPS_PACRB, field TP2[20] (RW)
bogdanm 82:6473597d706e 2065 *
bogdanm 82:6473597d706e 2066 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 2067 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 2068 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 2069 *
bogdanm 82:6473597d706e 2070 * Values:
bogdanm 82:6473597d706e 2071 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 2072 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 2073 */
bogdanm 82:6473597d706e 2074 //@{
bogdanm 82:6473597d706e 2075 #define BP_AIPS_PACRB_TP2 (20U) //!< Bit position for AIPS_PACRB_TP2.
bogdanm 82:6473597d706e 2076 #define BM_AIPS_PACRB_TP2 (0x00100000U) //!< Bit mask for AIPS_PACRB_TP2.
bogdanm 82:6473597d706e 2077 #define BS_AIPS_PACRB_TP2 (1U) //!< Bit field size in bits for AIPS_PACRB_TP2.
bogdanm 82:6473597d706e 2078
bogdanm 82:6473597d706e 2079 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2080 //! @brief Read current value of the AIPS_PACRB_TP2 field.
bogdanm 82:6473597d706e 2081 #define BR_AIPS_PACRB_TP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP2))
bogdanm 82:6473597d706e 2082 #endif
bogdanm 82:6473597d706e 2083
bogdanm 82:6473597d706e 2084 //! @brief Format value for bitfield AIPS_PACRB_TP2.
bogdanm 82:6473597d706e 2085 #define BF_AIPS_PACRB_TP2(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRB_TP2), uint32_t) & BM_AIPS_PACRB_TP2)
bogdanm 82:6473597d706e 2086
bogdanm 82:6473597d706e 2087 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2088 //! @brief Set the TP2 field to a new value.
bogdanm 82:6473597d706e 2089 #define BW_AIPS_PACRB_TP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP2) = (v))
bogdanm 82:6473597d706e 2090 #endif
bogdanm 82:6473597d706e 2091 //@}
bogdanm 82:6473597d706e 2092
bogdanm 82:6473597d706e 2093 /*!
bogdanm 82:6473597d706e 2094 * @name Register AIPS_PACRB, field WP2[21] (RW)
bogdanm 82:6473597d706e 2095 *
bogdanm 82:6473597d706e 2096 * Determines whether the peripheral allows write accesss. When this bit is set
bogdanm 82:6473597d706e 2097 * and a write access is attempted, access terminates with an error response and
bogdanm 82:6473597d706e 2098 * no peripheral access initiates.
bogdanm 82:6473597d706e 2099 *
bogdanm 82:6473597d706e 2100 * Values:
bogdanm 82:6473597d706e 2101 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 2102 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 2103 */
bogdanm 82:6473597d706e 2104 //@{
bogdanm 82:6473597d706e 2105 #define BP_AIPS_PACRB_WP2 (21U) //!< Bit position for AIPS_PACRB_WP2.
bogdanm 82:6473597d706e 2106 #define BM_AIPS_PACRB_WP2 (0x00200000U) //!< Bit mask for AIPS_PACRB_WP2.
bogdanm 82:6473597d706e 2107 #define BS_AIPS_PACRB_WP2 (1U) //!< Bit field size in bits for AIPS_PACRB_WP2.
bogdanm 82:6473597d706e 2108
bogdanm 82:6473597d706e 2109 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2110 //! @brief Read current value of the AIPS_PACRB_WP2 field.
bogdanm 82:6473597d706e 2111 #define BR_AIPS_PACRB_WP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP2))
bogdanm 82:6473597d706e 2112 #endif
bogdanm 82:6473597d706e 2113
bogdanm 82:6473597d706e 2114 //! @brief Format value for bitfield AIPS_PACRB_WP2.
bogdanm 82:6473597d706e 2115 #define BF_AIPS_PACRB_WP2(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRB_WP2), uint32_t) & BM_AIPS_PACRB_WP2)
bogdanm 82:6473597d706e 2116
bogdanm 82:6473597d706e 2117 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2118 //! @brief Set the WP2 field to a new value.
bogdanm 82:6473597d706e 2119 #define BW_AIPS_PACRB_WP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP2) = (v))
bogdanm 82:6473597d706e 2120 #endif
bogdanm 82:6473597d706e 2121 //@}
bogdanm 82:6473597d706e 2122
bogdanm 82:6473597d706e 2123 /*!
bogdanm 82:6473597d706e 2124 * @name Register AIPS_PACRB, field SP2[22] (RW)
bogdanm 82:6473597d706e 2125 *
bogdanm 82:6473597d706e 2126 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 2127 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 2128 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 2129 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 2130 * access initiates.
bogdanm 82:6473597d706e 2131 *
bogdanm 82:6473597d706e 2132 * Values:
bogdanm 82:6473597d706e 2133 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 2134 * accesses.
bogdanm 82:6473597d706e 2135 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 2136 */
bogdanm 82:6473597d706e 2137 //@{
bogdanm 82:6473597d706e 2138 #define BP_AIPS_PACRB_SP2 (22U) //!< Bit position for AIPS_PACRB_SP2.
bogdanm 82:6473597d706e 2139 #define BM_AIPS_PACRB_SP2 (0x00400000U) //!< Bit mask for AIPS_PACRB_SP2.
bogdanm 82:6473597d706e 2140 #define BS_AIPS_PACRB_SP2 (1U) //!< Bit field size in bits for AIPS_PACRB_SP2.
bogdanm 82:6473597d706e 2141
bogdanm 82:6473597d706e 2142 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2143 //! @brief Read current value of the AIPS_PACRB_SP2 field.
bogdanm 82:6473597d706e 2144 #define BR_AIPS_PACRB_SP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP2))
bogdanm 82:6473597d706e 2145 #endif
bogdanm 82:6473597d706e 2146
bogdanm 82:6473597d706e 2147 //! @brief Format value for bitfield AIPS_PACRB_SP2.
bogdanm 82:6473597d706e 2148 #define BF_AIPS_PACRB_SP2(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRB_SP2), uint32_t) & BM_AIPS_PACRB_SP2)
bogdanm 82:6473597d706e 2149
bogdanm 82:6473597d706e 2150 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2151 //! @brief Set the SP2 field to a new value.
bogdanm 82:6473597d706e 2152 #define BW_AIPS_PACRB_SP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP2) = (v))
bogdanm 82:6473597d706e 2153 #endif
bogdanm 82:6473597d706e 2154 //@}
bogdanm 82:6473597d706e 2155
bogdanm 82:6473597d706e 2156 /*!
bogdanm 82:6473597d706e 2157 * @name Register AIPS_PACRB, field TP1[24] (RW)
bogdanm 82:6473597d706e 2158 *
bogdanm 82:6473597d706e 2159 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 2160 * When this bit is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 2161 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 2162 *
bogdanm 82:6473597d706e 2163 * Values:
bogdanm 82:6473597d706e 2164 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 2165 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 2166 */
bogdanm 82:6473597d706e 2167 //@{
bogdanm 82:6473597d706e 2168 #define BP_AIPS_PACRB_TP1 (24U) //!< Bit position for AIPS_PACRB_TP1.
bogdanm 82:6473597d706e 2169 #define BM_AIPS_PACRB_TP1 (0x01000000U) //!< Bit mask for AIPS_PACRB_TP1.
bogdanm 82:6473597d706e 2170 #define BS_AIPS_PACRB_TP1 (1U) //!< Bit field size in bits for AIPS_PACRB_TP1.
bogdanm 82:6473597d706e 2171
bogdanm 82:6473597d706e 2172 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2173 //! @brief Read current value of the AIPS_PACRB_TP1 field.
bogdanm 82:6473597d706e 2174 #define BR_AIPS_PACRB_TP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP1))
bogdanm 82:6473597d706e 2175 #endif
bogdanm 82:6473597d706e 2176
bogdanm 82:6473597d706e 2177 //! @brief Format value for bitfield AIPS_PACRB_TP1.
bogdanm 82:6473597d706e 2178 #define BF_AIPS_PACRB_TP1(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRB_TP1), uint32_t) & BM_AIPS_PACRB_TP1)
bogdanm 82:6473597d706e 2179
bogdanm 82:6473597d706e 2180 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2181 //! @brief Set the TP1 field to a new value.
bogdanm 82:6473597d706e 2182 #define BW_AIPS_PACRB_TP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP1) = (v))
bogdanm 82:6473597d706e 2183 #endif
bogdanm 82:6473597d706e 2184 //@}
bogdanm 82:6473597d706e 2185
bogdanm 82:6473597d706e 2186 /*!
bogdanm 82:6473597d706e 2187 * @name Register AIPS_PACRB, field WP1[25] (RW)
bogdanm 82:6473597d706e 2188 *
bogdanm 82:6473597d706e 2189 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 2190 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 2191 * and no peripheral access initiates.
bogdanm 82:6473597d706e 2192 *
bogdanm 82:6473597d706e 2193 * Values:
bogdanm 82:6473597d706e 2194 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 2195 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 2196 */
bogdanm 82:6473597d706e 2197 //@{
bogdanm 82:6473597d706e 2198 #define BP_AIPS_PACRB_WP1 (25U) //!< Bit position for AIPS_PACRB_WP1.
bogdanm 82:6473597d706e 2199 #define BM_AIPS_PACRB_WP1 (0x02000000U) //!< Bit mask for AIPS_PACRB_WP1.
bogdanm 82:6473597d706e 2200 #define BS_AIPS_PACRB_WP1 (1U) //!< Bit field size in bits for AIPS_PACRB_WP1.
bogdanm 82:6473597d706e 2201
bogdanm 82:6473597d706e 2202 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2203 //! @brief Read current value of the AIPS_PACRB_WP1 field.
bogdanm 82:6473597d706e 2204 #define BR_AIPS_PACRB_WP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP1))
bogdanm 82:6473597d706e 2205 #endif
bogdanm 82:6473597d706e 2206
bogdanm 82:6473597d706e 2207 //! @brief Format value for bitfield AIPS_PACRB_WP1.
bogdanm 82:6473597d706e 2208 #define BF_AIPS_PACRB_WP1(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRB_WP1), uint32_t) & BM_AIPS_PACRB_WP1)
bogdanm 82:6473597d706e 2209
bogdanm 82:6473597d706e 2210 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2211 //! @brief Set the WP1 field to a new value.
bogdanm 82:6473597d706e 2212 #define BW_AIPS_PACRB_WP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP1) = (v))
bogdanm 82:6473597d706e 2213 #endif
bogdanm 82:6473597d706e 2214 //@}
bogdanm 82:6473597d706e 2215
bogdanm 82:6473597d706e 2216 /*!
bogdanm 82:6473597d706e 2217 * @name Register AIPS_PACRB, field SP1[26] (RW)
bogdanm 82:6473597d706e 2218 *
bogdanm 82:6473597d706e 2219 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 2220 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 2221 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 2222 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 2223 * access initiates.
bogdanm 82:6473597d706e 2224 *
bogdanm 82:6473597d706e 2225 * Values:
bogdanm 82:6473597d706e 2226 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 2227 * accesses.
bogdanm 82:6473597d706e 2228 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 2229 */
bogdanm 82:6473597d706e 2230 //@{
bogdanm 82:6473597d706e 2231 #define BP_AIPS_PACRB_SP1 (26U) //!< Bit position for AIPS_PACRB_SP1.
bogdanm 82:6473597d706e 2232 #define BM_AIPS_PACRB_SP1 (0x04000000U) //!< Bit mask for AIPS_PACRB_SP1.
bogdanm 82:6473597d706e 2233 #define BS_AIPS_PACRB_SP1 (1U) //!< Bit field size in bits for AIPS_PACRB_SP1.
bogdanm 82:6473597d706e 2234
bogdanm 82:6473597d706e 2235 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2236 //! @brief Read current value of the AIPS_PACRB_SP1 field.
bogdanm 82:6473597d706e 2237 #define BR_AIPS_PACRB_SP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP1))
bogdanm 82:6473597d706e 2238 #endif
bogdanm 82:6473597d706e 2239
bogdanm 82:6473597d706e 2240 //! @brief Format value for bitfield AIPS_PACRB_SP1.
bogdanm 82:6473597d706e 2241 #define BF_AIPS_PACRB_SP1(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRB_SP1), uint32_t) & BM_AIPS_PACRB_SP1)
bogdanm 82:6473597d706e 2242
bogdanm 82:6473597d706e 2243 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2244 //! @brief Set the SP1 field to a new value.
bogdanm 82:6473597d706e 2245 #define BW_AIPS_PACRB_SP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP1) = (v))
bogdanm 82:6473597d706e 2246 #endif
bogdanm 82:6473597d706e 2247 //@}
bogdanm 82:6473597d706e 2248
bogdanm 82:6473597d706e 2249 /*!
bogdanm 82:6473597d706e 2250 * @name Register AIPS_PACRB, field TP0[28] (RW)
bogdanm 82:6473597d706e 2251 *
bogdanm 82:6473597d706e 2252 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 2253 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 2254 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 2255 *
bogdanm 82:6473597d706e 2256 * Values:
bogdanm 82:6473597d706e 2257 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 2258 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 2259 */
bogdanm 82:6473597d706e 2260 //@{
bogdanm 82:6473597d706e 2261 #define BP_AIPS_PACRB_TP0 (28U) //!< Bit position for AIPS_PACRB_TP0.
bogdanm 82:6473597d706e 2262 #define BM_AIPS_PACRB_TP0 (0x10000000U) //!< Bit mask for AIPS_PACRB_TP0.
bogdanm 82:6473597d706e 2263 #define BS_AIPS_PACRB_TP0 (1U) //!< Bit field size in bits for AIPS_PACRB_TP0.
bogdanm 82:6473597d706e 2264
bogdanm 82:6473597d706e 2265 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2266 //! @brief Read current value of the AIPS_PACRB_TP0 field.
bogdanm 82:6473597d706e 2267 #define BR_AIPS_PACRB_TP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP0))
bogdanm 82:6473597d706e 2268 #endif
bogdanm 82:6473597d706e 2269
bogdanm 82:6473597d706e 2270 //! @brief Format value for bitfield AIPS_PACRB_TP0.
bogdanm 82:6473597d706e 2271 #define BF_AIPS_PACRB_TP0(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRB_TP0), uint32_t) & BM_AIPS_PACRB_TP0)
bogdanm 82:6473597d706e 2272
bogdanm 82:6473597d706e 2273 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2274 //! @brief Set the TP0 field to a new value.
bogdanm 82:6473597d706e 2275 #define BW_AIPS_PACRB_TP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_TP0) = (v))
bogdanm 82:6473597d706e 2276 #endif
bogdanm 82:6473597d706e 2277 //@}
bogdanm 82:6473597d706e 2278
bogdanm 82:6473597d706e 2279 /*!
bogdanm 82:6473597d706e 2280 * @name Register AIPS_PACRB, field WP0[29] (RW)
bogdanm 82:6473597d706e 2281 *
bogdanm 82:6473597d706e 2282 * Determines whether the peripheral allows write accesss. When this bit is set
bogdanm 82:6473597d706e 2283 * and a write access is attempted, access terminates with an error response and
bogdanm 82:6473597d706e 2284 * no peripheral access initiates.
bogdanm 82:6473597d706e 2285 *
bogdanm 82:6473597d706e 2286 * Values:
bogdanm 82:6473597d706e 2287 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 2288 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 2289 */
bogdanm 82:6473597d706e 2290 //@{
bogdanm 82:6473597d706e 2291 #define BP_AIPS_PACRB_WP0 (29U) //!< Bit position for AIPS_PACRB_WP0.
bogdanm 82:6473597d706e 2292 #define BM_AIPS_PACRB_WP0 (0x20000000U) //!< Bit mask for AIPS_PACRB_WP0.
bogdanm 82:6473597d706e 2293 #define BS_AIPS_PACRB_WP0 (1U) //!< Bit field size in bits for AIPS_PACRB_WP0.
bogdanm 82:6473597d706e 2294
bogdanm 82:6473597d706e 2295 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2296 //! @brief Read current value of the AIPS_PACRB_WP0 field.
bogdanm 82:6473597d706e 2297 #define BR_AIPS_PACRB_WP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP0))
bogdanm 82:6473597d706e 2298 #endif
bogdanm 82:6473597d706e 2299
bogdanm 82:6473597d706e 2300 //! @brief Format value for bitfield AIPS_PACRB_WP0.
bogdanm 82:6473597d706e 2301 #define BF_AIPS_PACRB_WP0(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRB_WP0), uint32_t) & BM_AIPS_PACRB_WP0)
bogdanm 82:6473597d706e 2302
bogdanm 82:6473597d706e 2303 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2304 //! @brief Set the WP0 field to a new value.
bogdanm 82:6473597d706e 2305 #define BW_AIPS_PACRB_WP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_WP0) = (v))
bogdanm 82:6473597d706e 2306 #endif
bogdanm 82:6473597d706e 2307 //@}
bogdanm 82:6473597d706e 2308
bogdanm 82:6473597d706e 2309 /*!
bogdanm 82:6473597d706e 2310 * @name Register AIPS_PACRB, field SP0[30] (RW)
bogdanm 82:6473597d706e 2311 *
bogdanm 82:6473597d706e 2312 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 2313 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 2314 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 2315 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 2316 * access initiates.
bogdanm 82:6473597d706e 2317 *
bogdanm 82:6473597d706e 2318 * Values:
bogdanm 82:6473597d706e 2319 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 2320 * accesses.
bogdanm 82:6473597d706e 2321 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 2322 */
bogdanm 82:6473597d706e 2323 //@{
bogdanm 82:6473597d706e 2324 #define BP_AIPS_PACRB_SP0 (30U) //!< Bit position for AIPS_PACRB_SP0.
bogdanm 82:6473597d706e 2325 #define BM_AIPS_PACRB_SP0 (0x40000000U) //!< Bit mask for AIPS_PACRB_SP0.
bogdanm 82:6473597d706e 2326 #define BS_AIPS_PACRB_SP0 (1U) //!< Bit field size in bits for AIPS_PACRB_SP0.
bogdanm 82:6473597d706e 2327
bogdanm 82:6473597d706e 2328 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2329 //! @brief Read current value of the AIPS_PACRB_SP0 field.
bogdanm 82:6473597d706e 2330 #define BR_AIPS_PACRB_SP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP0))
bogdanm 82:6473597d706e 2331 #endif
bogdanm 82:6473597d706e 2332
bogdanm 82:6473597d706e 2333 //! @brief Format value for bitfield AIPS_PACRB_SP0.
bogdanm 82:6473597d706e 2334 #define BF_AIPS_PACRB_SP0(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRB_SP0), uint32_t) & BM_AIPS_PACRB_SP0)
bogdanm 82:6473597d706e 2335
bogdanm 82:6473597d706e 2336 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2337 //! @brief Set the SP0 field to a new value.
bogdanm 82:6473597d706e 2338 #define BW_AIPS_PACRB_SP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRB_ADDR(x), BP_AIPS_PACRB_SP0) = (v))
bogdanm 82:6473597d706e 2339 #endif
bogdanm 82:6473597d706e 2340 //@}
bogdanm 82:6473597d706e 2341
bogdanm 82:6473597d706e 2342 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 2343 // HW_AIPS_PACRC - Peripheral Access Control Register
bogdanm 82:6473597d706e 2344 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 2345
bogdanm 82:6473597d706e 2346 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2347 /*!
bogdanm 82:6473597d706e 2348 * @brief HW_AIPS_PACRC - Peripheral Access Control Register (RW)
bogdanm 82:6473597d706e 2349 *
bogdanm 82:6473597d706e 2350 * Reset value: 0x00000000U
bogdanm 82:6473597d706e 2351 *
bogdanm 82:6473597d706e 2352 * Each PACR register consists of eight 4-bit PACR fields. Each PACR field
bogdanm 82:6473597d706e 2353 * defines the access levels for a particular peripheral. The mapping between a
bogdanm 82:6473597d706e 2354 * peripheral and its PACR field is shown in the table below. The peripheral assignment
bogdanm 82:6473597d706e 2355 * to each PACR is defined by the memory map slot that the peripheral is
bogdanm 82:6473597d706e 2356 * assigned to. See this chip's memory map for the assignment of a particular
bogdanm 82:6473597d706e 2357 * peripheral. The following table shows the location of each peripheral slot's PACR field
bogdanm 82:6473597d706e 2358 * in the PACR registers. Offset Register [31:28] [27:24] [23:20] [19:16] [15:12]
bogdanm 82:6473597d706e 2359 * [11:8] [7:4] [3:0] 0x20 PACRA PACR0 PACR1 PACR2 PACR3 PACR4 PACR5 PACR6 PACR7
bogdanm 82:6473597d706e 2360 * 0x24 PACRB PACR8 PACR9 PACR10 PACR11 PACR12 PACR13 PACR14 PACR15 0x28 PACRC
bogdanm 82:6473597d706e 2361 * PACR16 PACR17 PACR18 PACR19 PACR20 PACR21 PACR22 PACR23 0x2C PACRD PACR24
bogdanm 82:6473597d706e 2362 * PACR25 PACR26 PACR27 PACR28 PACR29 PACR30 PACR31 0x30 Reserved 0x34 Reserved 0x38
bogdanm 82:6473597d706e 2363 * Reserved 0x3C Reserved 0x40 PACRE PACR32 PACR33 PACR34 PACR35 PACR36 PACR37
bogdanm 82:6473597d706e 2364 * PACR38 PACR39 0x44 PACRF PACR40 PACR41 PACR42 PACR43 PACR44 PACR45 PACR46 PACR47
bogdanm 82:6473597d706e 2365 * 0x48 PACRG PACR48 PACR49 PACR50 PACR51 PACR52 PACR53 PACR54 PACR55 0x4C PACRH
bogdanm 82:6473597d706e 2366 * PACR56 PACR57 PACR58 PACR59 PACR60 PACR61 PACR62 PACR63 0x50 PACRI PACR64
bogdanm 82:6473597d706e 2367 * PACR65 PACR66 PACR67 PACR68 PACR69 PACR70 PACR71 0x54 PACRJ PACR72 PACR73 PACR74
bogdanm 82:6473597d706e 2368 * PACR75 PACR76 PACR77 PACR78 PACR79 0x58 PACRK PACR80 PACR81 PACR82 PACR83
bogdanm 82:6473597d706e 2369 * PACR84 PACR85 PACR86 PACR87 0x5C PACRL PACR88 PACR89 PACR90 PACR91 PACR92 PACR93
bogdanm 82:6473597d706e 2370 * PACR94 PACR95 0x60 PACRM PACR96 PACR97 PACR98 PACR99 PACR100 PACR101 PACR102
bogdanm 82:6473597d706e 2371 * PACR103 0x64 PACRN PACR104 PACR105 PACR106 PACR107 PACR108 PACR109 PACR110
bogdanm 82:6473597d706e 2372 * PACR111 0x68 PACRO PACR112 PACR113 PACR114 PACR115 PACR116 PACR117 PACR118 PACR119
bogdanm 82:6473597d706e 2373 * 0x6C PACRP PACR120 PACR121 PACR122 PACR123 PACR124 PACR125 PACR126 PACR127 0x80
bogdanm 82:6473597d706e 2374 * PACRU PACR GBL0 PACR GBL1 Reserved The register field descriptions for PACR
bogdanm 82:6473597d706e 2375 * A-D, which control peripheral slots 0-31, are shown below. The following
bogdanm 82:6473597d706e 2376 * section, PACRPeripheral Access Control Register , shows the register field
bogdanm 82:6473597d706e 2377 * descriptions for PACR E-P. All PACR registers are identical. They are divided into two
bogdanm 82:6473597d706e 2378 * sections because they occupy two non-contiguous address spaces.
bogdanm 82:6473597d706e 2379 */
bogdanm 82:6473597d706e 2380 typedef union _hw_aips_pacrc
bogdanm 82:6473597d706e 2381 {
bogdanm 82:6473597d706e 2382 uint32_t U;
bogdanm 82:6473597d706e 2383 struct _hw_aips_pacrc_bitfields
bogdanm 82:6473597d706e 2384 {
bogdanm 82:6473597d706e 2385 uint32_t TP7 : 1; //!< [0] Trusted Protect
bogdanm 82:6473597d706e 2386 uint32_t WP7 : 1; //!< [1] Write Protect
bogdanm 82:6473597d706e 2387 uint32_t SP7 : 1; //!< [2] Supervisor Protect
bogdanm 82:6473597d706e 2388 uint32_t RESERVED0 : 1; //!< [3]
bogdanm 82:6473597d706e 2389 uint32_t TP6 : 1; //!< [4] Trusted Protect
bogdanm 82:6473597d706e 2390 uint32_t WP6 : 1; //!< [5] Write Protect
bogdanm 82:6473597d706e 2391 uint32_t SP6 : 1; //!< [6] Supervisor Protect
bogdanm 82:6473597d706e 2392 uint32_t RESERVED1 : 1; //!< [7]
bogdanm 82:6473597d706e 2393 uint32_t TP5 : 1; //!< [8] Trusted Protect
bogdanm 82:6473597d706e 2394 uint32_t WP5 : 1; //!< [9] Write Protect
bogdanm 82:6473597d706e 2395 uint32_t SP5 : 1; //!< [10] Supervisor Protect
bogdanm 82:6473597d706e 2396 uint32_t RESERVED2 : 1; //!< [11]
bogdanm 82:6473597d706e 2397 uint32_t TP4 : 1; //!< [12] Trusted Protect
bogdanm 82:6473597d706e 2398 uint32_t WP4 : 1; //!< [13] Write Protect
bogdanm 82:6473597d706e 2399 uint32_t SP4 : 1; //!< [14] Supervisor Protect
bogdanm 82:6473597d706e 2400 uint32_t RESERVED3 : 1; //!< [15]
bogdanm 82:6473597d706e 2401 uint32_t TP3 : 1; //!< [16] Trusted Protect
bogdanm 82:6473597d706e 2402 uint32_t WP3 : 1; //!< [17] Write Protect
bogdanm 82:6473597d706e 2403 uint32_t SP3 : 1; //!< [18] Supervisor Protect
bogdanm 82:6473597d706e 2404 uint32_t RESERVED4 : 1; //!< [19]
bogdanm 82:6473597d706e 2405 uint32_t TP2 : 1; //!< [20] Trusted Protect
bogdanm 82:6473597d706e 2406 uint32_t WP2 : 1; //!< [21] Write Protect
bogdanm 82:6473597d706e 2407 uint32_t SP2 : 1; //!< [22] Supervisor Protect
bogdanm 82:6473597d706e 2408 uint32_t RESERVED5 : 1; //!< [23]
bogdanm 82:6473597d706e 2409 uint32_t TP1 : 1; //!< [24] Trusted Protect
bogdanm 82:6473597d706e 2410 uint32_t WP1 : 1; //!< [25] Write Protect
bogdanm 82:6473597d706e 2411 uint32_t SP1 : 1; //!< [26] Supervisor Protect
bogdanm 82:6473597d706e 2412 uint32_t RESERVED6 : 1; //!< [27]
bogdanm 82:6473597d706e 2413 uint32_t TP0 : 1; //!< [28] Trusted Protect
bogdanm 82:6473597d706e 2414 uint32_t WP0 : 1; //!< [29] Write Protect
bogdanm 82:6473597d706e 2415 uint32_t SP0 : 1; //!< [30] Supervisor Protect
bogdanm 82:6473597d706e 2416 uint32_t RESERVED7 : 1; //!< [31]
bogdanm 82:6473597d706e 2417 } B;
bogdanm 82:6473597d706e 2418 } hw_aips_pacrc_t;
bogdanm 82:6473597d706e 2419 #endif
bogdanm 82:6473597d706e 2420
bogdanm 82:6473597d706e 2421 /*!
bogdanm 82:6473597d706e 2422 * @name Constants and macros for entire AIPS_PACRC register
bogdanm 82:6473597d706e 2423 */
bogdanm 82:6473597d706e 2424 //@{
bogdanm 82:6473597d706e 2425 #define HW_AIPS_PACRC_ADDR(x) (REGS_AIPS_BASE(x) + 0x28U)
bogdanm 82:6473597d706e 2426
bogdanm 82:6473597d706e 2427 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2428 #define HW_AIPS_PACRC(x) (*(__IO hw_aips_pacrc_t *) HW_AIPS_PACRC_ADDR(x))
bogdanm 82:6473597d706e 2429 #define HW_AIPS_PACRC_RD(x) (HW_AIPS_PACRC(x).U)
bogdanm 82:6473597d706e 2430 #define HW_AIPS_PACRC_WR(x, v) (HW_AIPS_PACRC(x).U = (v))
bogdanm 82:6473597d706e 2431 #define HW_AIPS_PACRC_SET(x, v) (HW_AIPS_PACRC_WR(x, HW_AIPS_PACRC_RD(x) | (v)))
bogdanm 82:6473597d706e 2432 #define HW_AIPS_PACRC_CLR(x, v) (HW_AIPS_PACRC_WR(x, HW_AIPS_PACRC_RD(x) & ~(v)))
bogdanm 82:6473597d706e 2433 #define HW_AIPS_PACRC_TOG(x, v) (HW_AIPS_PACRC_WR(x, HW_AIPS_PACRC_RD(x) ^ (v)))
bogdanm 82:6473597d706e 2434 #endif
bogdanm 82:6473597d706e 2435 //@}
bogdanm 82:6473597d706e 2436
bogdanm 82:6473597d706e 2437 /*
bogdanm 82:6473597d706e 2438 * Constants & macros for individual AIPS_PACRC bitfields
bogdanm 82:6473597d706e 2439 */
bogdanm 82:6473597d706e 2440
bogdanm 82:6473597d706e 2441 /*!
bogdanm 82:6473597d706e 2442 * @name Register AIPS_PACRC, field TP7[0] (RW)
bogdanm 82:6473597d706e 2443 *
bogdanm 82:6473597d706e 2444 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 2445 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 2446 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 2447 *
bogdanm 82:6473597d706e 2448 * Values:
bogdanm 82:6473597d706e 2449 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 2450 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 2451 */
bogdanm 82:6473597d706e 2452 //@{
bogdanm 82:6473597d706e 2453 #define BP_AIPS_PACRC_TP7 (0U) //!< Bit position for AIPS_PACRC_TP7.
bogdanm 82:6473597d706e 2454 #define BM_AIPS_PACRC_TP7 (0x00000001U) //!< Bit mask for AIPS_PACRC_TP7.
bogdanm 82:6473597d706e 2455 #define BS_AIPS_PACRC_TP7 (1U) //!< Bit field size in bits for AIPS_PACRC_TP7.
bogdanm 82:6473597d706e 2456
bogdanm 82:6473597d706e 2457 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2458 //! @brief Read current value of the AIPS_PACRC_TP7 field.
bogdanm 82:6473597d706e 2459 #define BR_AIPS_PACRC_TP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP7))
bogdanm 82:6473597d706e 2460 #endif
bogdanm 82:6473597d706e 2461
bogdanm 82:6473597d706e 2462 //! @brief Format value for bitfield AIPS_PACRC_TP7.
bogdanm 82:6473597d706e 2463 #define BF_AIPS_PACRC_TP7(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRC_TP7), uint32_t) & BM_AIPS_PACRC_TP7)
bogdanm 82:6473597d706e 2464
bogdanm 82:6473597d706e 2465 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2466 //! @brief Set the TP7 field to a new value.
bogdanm 82:6473597d706e 2467 #define BW_AIPS_PACRC_TP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP7) = (v))
bogdanm 82:6473597d706e 2468 #endif
bogdanm 82:6473597d706e 2469 //@}
bogdanm 82:6473597d706e 2470
bogdanm 82:6473597d706e 2471 /*!
bogdanm 82:6473597d706e 2472 * @name Register AIPS_PACRC, field WP7[1] (RW)
bogdanm 82:6473597d706e 2473 *
bogdanm 82:6473597d706e 2474 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 2475 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 2476 * and no peripheral access initiates.
bogdanm 82:6473597d706e 2477 *
bogdanm 82:6473597d706e 2478 * Values:
bogdanm 82:6473597d706e 2479 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 2480 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 2481 */
bogdanm 82:6473597d706e 2482 //@{
bogdanm 82:6473597d706e 2483 #define BP_AIPS_PACRC_WP7 (1U) //!< Bit position for AIPS_PACRC_WP7.
bogdanm 82:6473597d706e 2484 #define BM_AIPS_PACRC_WP7 (0x00000002U) //!< Bit mask for AIPS_PACRC_WP7.
bogdanm 82:6473597d706e 2485 #define BS_AIPS_PACRC_WP7 (1U) //!< Bit field size in bits for AIPS_PACRC_WP7.
bogdanm 82:6473597d706e 2486
bogdanm 82:6473597d706e 2487 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2488 //! @brief Read current value of the AIPS_PACRC_WP7 field.
bogdanm 82:6473597d706e 2489 #define BR_AIPS_PACRC_WP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP7))
bogdanm 82:6473597d706e 2490 #endif
bogdanm 82:6473597d706e 2491
bogdanm 82:6473597d706e 2492 //! @brief Format value for bitfield AIPS_PACRC_WP7.
bogdanm 82:6473597d706e 2493 #define BF_AIPS_PACRC_WP7(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRC_WP7), uint32_t) & BM_AIPS_PACRC_WP7)
bogdanm 82:6473597d706e 2494
bogdanm 82:6473597d706e 2495 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2496 //! @brief Set the WP7 field to a new value.
bogdanm 82:6473597d706e 2497 #define BW_AIPS_PACRC_WP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP7) = (v))
bogdanm 82:6473597d706e 2498 #endif
bogdanm 82:6473597d706e 2499 //@}
bogdanm 82:6473597d706e 2500
bogdanm 82:6473597d706e 2501 /*!
bogdanm 82:6473597d706e 2502 * @name Register AIPS_PACRC, field SP7[2] (RW)
bogdanm 82:6473597d706e 2503 *
bogdanm 82:6473597d706e 2504 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 2505 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 2506 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 2507 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 2508 * access initiates.
bogdanm 82:6473597d706e 2509 *
bogdanm 82:6473597d706e 2510 * Values:
bogdanm 82:6473597d706e 2511 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 2512 * accesses.
bogdanm 82:6473597d706e 2513 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 2514 */
bogdanm 82:6473597d706e 2515 //@{
bogdanm 82:6473597d706e 2516 #define BP_AIPS_PACRC_SP7 (2U) //!< Bit position for AIPS_PACRC_SP7.
bogdanm 82:6473597d706e 2517 #define BM_AIPS_PACRC_SP7 (0x00000004U) //!< Bit mask for AIPS_PACRC_SP7.
bogdanm 82:6473597d706e 2518 #define BS_AIPS_PACRC_SP7 (1U) //!< Bit field size in bits for AIPS_PACRC_SP7.
bogdanm 82:6473597d706e 2519
bogdanm 82:6473597d706e 2520 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2521 //! @brief Read current value of the AIPS_PACRC_SP7 field.
bogdanm 82:6473597d706e 2522 #define BR_AIPS_PACRC_SP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP7))
bogdanm 82:6473597d706e 2523 #endif
bogdanm 82:6473597d706e 2524
bogdanm 82:6473597d706e 2525 //! @brief Format value for bitfield AIPS_PACRC_SP7.
bogdanm 82:6473597d706e 2526 #define BF_AIPS_PACRC_SP7(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRC_SP7), uint32_t) & BM_AIPS_PACRC_SP7)
bogdanm 82:6473597d706e 2527
bogdanm 82:6473597d706e 2528 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2529 //! @brief Set the SP7 field to a new value.
bogdanm 82:6473597d706e 2530 #define BW_AIPS_PACRC_SP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP7) = (v))
bogdanm 82:6473597d706e 2531 #endif
bogdanm 82:6473597d706e 2532 //@}
bogdanm 82:6473597d706e 2533
bogdanm 82:6473597d706e 2534 /*!
bogdanm 82:6473597d706e 2535 * @name Register AIPS_PACRC, field TP6[4] (RW)
bogdanm 82:6473597d706e 2536 *
bogdanm 82:6473597d706e 2537 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 2538 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 2539 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 2540 *
bogdanm 82:6473597d706e 2541 * Values:
bogdanm 82:6473597d706e 2542 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 2543 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 2544 */
bogdanm 82:6473597d706e 2545 //@{
bogdanm 82:6473597d706e 2546 #define BP_AIPS_PACRC_TP6 (4U) //!< Bit position for AIPS_PACRC_TP6.
bogdanm 82:6473597d706e 2547 #define BM_AIPS_PACRC_TP6 (0x00000010U) //!< Bit mask for AIPS_PACRC_TP6.
bogdanm 82:6473597d706e 2548 #define BS_AIPS_PACRC_TP6 (1U) //!< Bit field size in bits for AIPS_PACRC_TP6.
bogdanm 82:6473597d706e 2549
bogdanm 82:6473597d706e 2550 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2551 //! @brief Read current value of the AIPS_PACRC_TP6 field.
bogdanm 82:6473597d706e 2552 #define BR_AIPS_PACRC_TP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP6))
bogdanm 82:6473597d706e 2553 #endif
bogdanm 82:6473597d706e 2554
bogdanm 82:6473597d706e 2555 //! @brief Format value for bitfield AIPS_PACRC_TP6.
bogdanm 82:6473597d706e 2556 #define BF_AIPS_PACRC_TP6(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRC_TP6), uint32_t) & BM_AIPS_PACRC_TP6)
bogdanm 82:6473597d706e 2557
bogdanm 82:6473597d706e 2558 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2559 //! @brief Set the TP6 field to a new value.
bogdanm 82:6473597d706e 2560 #define BW_AIPS_PACRC_TP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP6) = (v))
bogdanm 82:6473597d706e 2561 #endif
bogdanm 82:6473597d706e 2562 //@}
bogdanm 82:6473597d706e 2563
bogdanm 82:6473597d706e 2564 /*!
bogdanm 82:6473597d706e 2565 * @name Register AIPS_PACRC, field WP6[5] (RW)
bogdanm 82:6473597d706e 2566 *
bogdanm 82:6473597d706e 2567 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 2568 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 2569 * and no peripheral access initiates.
bogdanm 82:6473597d706e 2570 *
bogdanm 82:6473597d706e 2571 * Values:
bogdanm 82:6473597d706e 2572 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 2573 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 2574 */
bogdanm 82:6473597d706e 2575 //@{
bogdanm 82:6473597d706e 2576 #define BP_AIPS_PACRC_WP6 (5U) //!< Bit position for AIPS_PACRC_WP6.
bogdanm 82:6473597d706e 2577 #define BM_AIPS_PACRC_WP6 (0x00000020U) //!< Bit mask for AIPS_PACRC_WP6.
bogdanm 82:6473597d706e 2578 #define BS_AIPS_PACRC_WP6 (1U) //!< Bit field size in bits for AIPS_PACRC_WP6.
bogdanm 82:6473597d706e 2579
bogdanm 82:6473597d706e 2580 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2581 //! @brief Read current value of the AIPS_PACRC_WP6 field.
bogdanm 82:6473597d706e 2582 #define BR_AIPS_PACRC_WP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP6))
bogdanm 82:6473597d706e 2583 #endif
bogdanm 82:6473597d706e 2584
bogdanm 82:6473597d706e 2585 //! @brief Format value for bitfield AIPS_PACRC_WP6.
bogdanm 82:6473597d706e 2586 #define BF_AIPS_PACRC_WP6(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRC_WP6), uint32_t) & BM_AIPS_PACRC_WP6)
bogdanm 82:6473597d706e 2587
bogdanm 82:6473597d706e 2588 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2589 //! @brief Set the WP6 field to a new value.
bogdanm 82:6473597d706e 2590 #define BW_AIPS_PACRC_WP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP6) = (v))
bogdanm 82:6473597d706e 2591 #endif
bogdanm 82:6473597d706e 2592 //@}
bogdanm 82:6473597d706e 2593
bogdanm 82:6473597d706e 2594 /*!
bogdanm 82:6473597d706e 2595 * @name Register AIPS_PACRC, field SP6[6] (RW)
bogdanm 82:6473597d706e 2596 *
bogdanm 82:6473597d706e 2597 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 2598 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 2599 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 2600 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 2601 * access initiates.
bogdanm 82:6473597d706e 2602 *
bogdanm 82:6473597d706e 2603 * Values:
bogdanm 82:6473597d706e 2604 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 2605 * accesses.
bogdanm 82:6473597d706e 2606 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 2607 */
bogdanm 82:6473597d706e 2608 //@{
bogdanm 82:6473597d706e 2609 #define BP_AIPS_PACRC_SP6 (6U) //!< Bit position for AIPS_PACRC_SP6.
bogdanm 82:6473597d706e 2610 #define BM_AIPS_PACRC_SP6 (0x00000040U) //!< Bit mask for AIPS_PACRC_SP6.
bogdanm 82:6473597d706e 2611 #define BS_AIPS_PACRC_SP6 (1U) //!< Bit field size in bits for AIPS_PACRC_SP6.
bogdanm 82:6473597d706e 2612
bogdanm 82:6473597d706e 2613 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2614 //! @brief Read current value of the AIPS_PACRC_SP6 field.
bogdanm 82:6473597d706e 2615 #define BR_AIPS_PACRC_SP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP6))
bogdanm 82:6473597d706e 2616 #endif
bogdanm 82:6473597d706e 2617
bogdanm 82:6473597d706e 2618 //! @brief Format value for bitfield AIPS_PACRC_SP6.
bogdanm 82:6473597d706e 2619 #define BF_AIPS_PACRC_SP6(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRC_SP6), uint32_t) & BM_AIPS_PACRC_SP6)
bogdanm 82:6473597d706e 2620
bogdanm 82:6473597d706e 2621 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2622 //! @brief Set the SP6 field to a new value.
bogdanm 82:6473597d706e 2623 #define BW_AIPS_PACRC_SP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP6) = (v))
bogdanm 82:6473597d706e 2624 #endif
bogdanm 82:6473597d706e 2625 //@}
bogdanm 82:6473597d706e 2626
bogdanm 82:6473597d706e 2627 /*!
bogdanm 82:6473597d706e 2628 * @name Register AIPS_PACRC, field TP5[8] (RW)
bogdanm 82:6473597d706e 2629 *
bogdanm 82:6473597d706e 2630 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 2631 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 2632 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 2633 *
bogdanm 82:6473597d706e 2634 * Values:
bogdanm 82:6473597d706e 2635 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 2636 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 2637 */
bogdanm 82:6473597d706e 2638 //@{
bogdanm 82:6473597d706e 2639 #define BP_AIPS_PACRC_TP5 (8U) //!< Bit position for AIPS_PACRC_TP5.
bogdanm 82:6473597d706e 2640 #define BM_AIPS_PACRC_TP5 (0x00000100U) //!< Bit mask for AIPS_PACRC_TP5.
bogdanm 82:6473597d706e 2641 #define BS_AIPS_PACRC_TP5 (1U) //!< Bit field size in bits for AIPS_PACRC_TP5.
bogdanm 82:6473597d706e 2642
bogdanm 82:6473597d706e 2643 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2644 //! @brief Read current value of the AIPS_PACRC_TP5 field.
bogdanm 82:6473597d706e 2645 #define BR_AIPS_PACRC_TP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP5))
bogdanm 82:6473597d706e 2646 #endif
bogdanm 82:6473597d706e 2647
bogdanm 82:6473597d706e 2648 //! @brief Format value for bitfield AIPS_PACRC_TP5.
bogdanm 82:6473597d706e 2649 #define BF_AIPS_PACRC_TP5(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRC_TP5), uint32_t) & BM_AIPS_PACRC_TP5)
bogdanm 82:6473597d706e 2650
bogdanm 82:6473597d706e 2651 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2652 //! @brief Set the TP5 field to a new value.
bogdanm 82:6473597d706e 2653 #define BW_AIPS_PACRC_TP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP5) = (v))
bogdanm 82:6473597d706e 2654 #endif
bogdanm 82:6473597d706e 2655 //@}
bogdanm 82:6473597d706e 2656
bogdanm 82:6473597d706e 2657 /*!
bogdanm 82:6473597d706e 2658 * @name Register AIPS_PACRC, field WP5[9] (RW)
bogdanm 82:6473597d706e 2659 *
bogdanm 82:6473597d706e 2660 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 2661 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 2662 * and no peripheral access initiates.
bogdanm 82:6473597d706e 2663 *
bogdanm 82:6473597d706e 2664 * Values:
bogdanm 82:6473597d706e 2665 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 2666 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 2667 */
bogdanm 82:6473597d706e 2668 //@{
bogdanm 82:6473597d706e 2669 #define BP_AIPS_PACRC_WP5 (9U) //!< Bit position for AIPS_PACRC_WP5.
bogdanm 82:6473597d706e 2670 #define BM_AIPS_PACRC_WP5 (0x00000200U) //!< Bit mask for AIPS_PACRC_WP5.
bogdanm 82:6473597d706e 2671 #define BS_AIPS_PACRC_WP5 (1U) //!< Bit field size in bits for AIPS_PACRC_WP5.
bogdanm 82:6473597d706e 2672
bogdanm 82:6473597d706e 2673 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2674 //! @brief Read current value of the AIPS_PACRC_WP5 field.
bogdanm 82:6473597d706e 2675 #define BR_AIPS_PACRC_WP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP5))
bogdanm 82:6473597d706e 2676 #endif
bogdanm 82:6473597d706e 2677
bogdanm 82:6473597d706e 2678 //! @brief Format value for bitfield AIPS_PACRC_WP5.
bogdanm 82:6473597d706e 2679 #define BF_AIPS_PACRC_WP5(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRC_WP5), uint32_t) & BM_AIPS_PACRC_WP5)
bogdanm 82:6473597d706e 2680
bogdanm 82:6473597d706e 2681 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2682 //! @brief Set the WP5 field to a new value.
bogdanm 82:6473597d706e 2683 #define BW_AIPS_PACRC_WP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP5) = (v))
bogdanm 82:6473597d706e 2684 #endif
bogdanm 82:6473597d706e 2685 //@}
bogdanm 82:6473597d706e 2686
bogdanm 82:6473597d706e 2687 /*!
bogdanm 82:6473597d706e 2688 * @name Register AIPS_PACRC, field SP5[10] (RW)
bogdanm 82:6473597d706e 2689 *
bogdanm 82:6473597d706e 2690 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 2691 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 2692 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 2693 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 2694 * access initiates.
bogdanm 82:6473597d706e 2695 *
bogdanm 82:6473597d706e 2696 * Values:
bogdanm 82:6473597d706e 2697 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 2698 * accesses.
bogdanm 82:6473597d706e 2699 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 2700 */
bogdanm 82:6473597d706e 2701 //@{
bogdanm 82:6473597d706e 2702 #define BP_AIPS_PACRC_SP5 (10U) //!< Bit position for AIPS_PACRC_SP5.
bogdanm 82:6473597d706e 2703 #define BM_AIPS_PACRC_SP5 (0x00000400U) //!< Bit mask for AIPS_PACRC_SP5.
bogdanm 82:6473597d706e 2704 #define BS_AIPS_PACRC_SP5 (1U) //!< Bit field size in bits for AIPS_PACRC_SP5.
bogdanm 82:6473597d706e 2705
bogdanm 82:6473597d706e 2706 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2707 //! @brief Read current value of the AIPS_PACRC_SP5 field.
bogdanm 82:6473597d706e 2708 #define BR_AIPS_PACRC_SP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP5))
bogdanm 82:6473597d706e 2709 #endif
bogdanm 82:6473597d706e 2710
bogdanm 82:6473597d706e 2711 //! @brief Format value for bitfield AIPS_PACRC_SP5.
bogdanm 82:6473597d706e 2712 #define BF_AIPS_PACRC_SP5(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRC_SP5), uint32_t) & BM_AIPS_PACRC_SP5)
bogdanm 82:6473597d706e 2713
bogdanm 82:6473597d706e 2714 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2715 //! @brief Set the SP5 field to a new value.
bogdanm 82:6473597d706e 2716 #define BW_AIPS_PACRC_SP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP5) = (v))
bogdanm 82:6473597d706e 2717 #endif
bogdanm 82:6473597d706e 2718 //@}
bogdanm 82:6473597d706e 2719
bogdanm 82:6473597d706e 2720 /*!
bogdanm 82:6473597d706e 2721 * @name Register AIPS_PACRC, field TP4[12] (RW)
bogdanm 82:6473597d706e 2722 *
bogdanm 82:6473597d706e 2723 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 2724 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 2725 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 2726 *
bogdanm 82:6473597d706e 2727 * Values:
bogdanm 82:6473597d706e 2728 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 2729 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 2730 */
bogdanm 82:6473597d706e 2731 //@{
bogdanm 82:6473597d706e 2732 #define BP_AIPS_PACRC_TP4 (12U) //!< Bit position for AIPS_PACRC_TP4.
bogdanm 82:6473597d706e 2733 #define BM_AIPS_PACRC_TP4 (0x00001000U) //!< Bit mask for AIPS_PACRC_TP4.
bogdanm 82:6473597d706e 2734 #define BS_AIPS_PACRC_TP4 (1U) //!< Bit field size in bits for AIPS_PACRC_TP4.
bogdanm 82:6473597d706e 2735
bogdanm 82:6473597d706e 2736 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2737 //! @brief Read current value of the AIPS_PACRC_TP4 field.
bogdanm 82:6473597d706e 2738 #define BR_AIPS_PACRC_TP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP4))
bogdanm 82:6473597d706e 2739 #endif
bogdanm 82:6473597d706e 2740
bogdanm 82:6473597d706e 2741 //! @brief Format value for bitfield AIPS_PACRC_TP4.
bogdanm 82:6473597d706e 2742 #define BF_AIPS_PACRC_TP4(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRC_TP4), uint32_t) & BM_AIPS_PACRC_TP4)
bogdanm 82:6473597d706e 2743
bogdanm 82:6473597d706e 2744 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2745 //! @brief Set the TP4 field to a new value.
bogdanm 82:6473597d706e 2746 #define BW_AIPS_PACRC_TP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP4) = (v))
bogdanm 82:6473597d706e 2747 #endif
bogdanm 82:6473597d706e 2748 //@}
bogdanm 82:6473597d706e 2749
bogdanm 82:6473597d706e 2750 /*!
bogdanm 82:6473597d706e 2751 * @name Register AIPS_PACRC, field WP4[13] (RW)
bogdanm 82:6473597d706e 2752 *
bogdanm 82:6473597d706e 2753 * Determines whether the peripheral allows write accesss. When this bit is set
bogdanm 82:6473597d706e 2754 * and a write access is attempted, access terminates with an error response and
bogdanm 82:6473597d706e 2755 * no peripheral access initiates.
bogdanm 82:6473597d706e 2756 *
bogdanm 82:6473597d706e 2757 * Values:
bogdanm 82:6473597d706e 2758 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 2759 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 2760 */
bogdanm 82:6473597d706e 2761 //@{
bogdanm 82:6473597d706e 2762 #define BP_AIPS_PACRC_WP4 (13U) //!< Bit position for AIPS_PACRC_WP4.
bogdanm 82:6473597d706e 2763 #define BM_AIPS_PACRC_WP4 (0x00002000U) //!< Bit mask for AIPS_PACRC_WP4.
bogdanm 82:6473597d706e 2764 #define BS_AIPS_PACRC_WP4 (1U) //!< Bit field size in bits for AIPS_PACRC_WP4.
bogdanm 82:6473597d706e 2765
bogdanm 82:6473597d706e 2766 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2767 //! @brief Read current value of the AIPS_PACRC_WP4 field.
bogdanm 82:6473597d706e 2768 #define BR_AIPS_PACRC_WP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP4))
bogdanm 82:6473597d706e 2769 #endif
bogdanm 82:6473597d706e 2770
bogdanm 82:6473597d706e 2771 //! @brief Format value for bitfield AIPS_PACRC_WP4.
bogdanm 82:6473597d706e 2772 #define BF_AIPS_PACRC_WP4(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRC_WP4), uint32_t) & BM_AIPS_PACRC_WP4)
bogdanm 82:6473597d706e 2773
bogdanm 82:6473597d706e 2774 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2775 //! @brief Set the WP4 field to a new value.
bogdanm 82:6473597d706e 2776 #define BW_AIPS_PACRC_WP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP4) = (v))
bogdanm 82:6473597d706e 2777 #endif
bogdanm 82:6473597d706e 2778 //@}
bogdanm 82:6473597d706e 2779
bogdanm 82:6473597d706e 2780 /*!
bogdanm 82:6473597d706e 2781 * @name Register AIPS_PACRC, field SP4[14] (RW)
bogdanm 82:6473597d706e 2782 *
bogdanm 82:6473597d706e 2783 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 2784 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 2785 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 2786 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 2787 * access initiates.
bogdanm 82:6473597d706e 2788 *
bogdanm 82:6473597d706e 2789 * Values:
bogdanm 82:6473597d706e 2790 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 2791 * accesses.
bogdanm 82:6473597d706e 2792 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 2793 */
bogdanm 82:6473597d706e 2794 //@{
bogdanm 82:6473597d706e 2795 #define BP_AIPS_PACRC_SP4 (14U) //!< Bit position for AIPS_PACRC_SP4.
bogdanm 82:6473597d706e 2796 #define BM_AIPS_PACRC_SP4 (0x00004000U) //!< Bit mask for AIPS_PACRC_SP4.
bogdanm 82:6473597d706e 2797 #define BS_AIPS_PACRC_SP4 (1U) //!< Bit field size in bits for AIPS_PACRC_SP4.
bogdanm 82:6473597d706e 2798
bogdanm 82:6473597d706e 2799 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2800 //! @brief Read current value of the AIPS_PACRC_SP4 field.
bogdanm 82:6473597d706e 2801 #define BR_AIPS_PACRC_SP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP4))
bogdanm 82:6473597d706e 2802 #endif
bogdanm 82:6473597d706e 2803
bogdanm 82:6473597d706e 2804 //! @brief Format value for bitfield AIPS_PACRC_SP4.
bogdanm 82:6473597d706e 2805 #define BF_AIPS_PACRC_SP4(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRC_SP4), uint32_t) & BM_AIPS_PACRC_SP4)
bogdanm 82:6473597d706e 2806
bogdanm 82:6473597d706e 2807 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2808 //! @brief Set the SP4 field to a new value.
bogdanm 82:6473597d706e 2809 #define BW_AIPS_PACRC_SP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP4) = (v))
bogdanm 82:6473597d706e 2810 #endif
bogdanm 82:6473597d706e 2811 //@}
bogdanm 82:6473597d706e 2812
bogdanm 82:6473597d706e 2813 /*!
bogdanm 82:6473597d706e 2814 * @name Register AIPS_PACRC, field TP3[16] (RW)
bogdanm 82:6473597d706e 2815 *
bogdanm 82:6473597d706e 2816 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 2817 * When this bit is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 2818 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 2819 *
bogdanm 82:6473597d706e 2820 * Values:
bogdanm 82:6473597d706e 2821 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 2822 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 2823 */
bogdanm 82:6473597d706e 2824 //@{
bogdanm 82:6473597d706e 2825 #define BP_AIPS_PACRC_TP3 (16U) //!< Bit position for AIPS_PACRC_TP3.
bogdanm 82:6473597d706e 2826 #define BM_AIPS_PACRC_TP3 (0x00010000U) //!< Bit mask for AIPS_PACRC_TP3.
bogdanm 82:6473597d706e 2827 #define BS_AIPS_PACRC_TP3 (1U) //!< Bit field size in bits for AIPS_PACRC_TP3.
bogdanm 82:6473597d706e 2828
bogdanm 82:6473597d706e 2829 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2830 //! @brief Read current value of the AIPS_PACRC_TP3 field.
bogdanm 82:6473597d706e 2831 #define BR_AIPS_PACRC_TP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP3))
bogdanm 82:6473597d706e 2832 #endif
bogdanm 82:6473597d706e 2833
bogdanm 82:6473597d706e 2834 //! @brief Format value for bitfield AIPS_PACRC_TP3.
bogdanm 82:6473597d706e 2835 #define BF_AIPS_PACRC_TP3(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRC_TP3), uint32_t) & BM_AIPS_PACRC_TP3)
bogdanm 82:6473597d706e 2836
bogdanm 82:6473597d706e 2837 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2838 //! @brief Set the TP3 field to a new value.
bogdanm 82:6473597d706e 2839 #define BW_AIPS_PACRC_TP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP3) = (v))
bogdanm 82:6473597d706e 2840 #endif
bogdanm 82:6473597d706e 2841 //@}
bogdanm 82:6473597d706e 2842
bogdanm 82:6473597d706e 2843 /*!
bogdanm 82:6473597d706e 2844 * @name Register AIPS_PACRC, field WP3[17] (RW)
bogdanm 82:6473597d706e 2845 *
bogdanm 82:6473597d706e 2846 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 2847 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 2848 * and no peripheral access initiates.
bogdanm 82:6473597d706e 2849 *
bogdanm 82:6473597d706e 2850 * Values:
bogdanm 82:6473597d706e 2851 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 2852 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 2853 */
bogdanm 82:6473597d706e 2854 //@{
bogdanm 82:6473597d706e 2855 #define BP_AIPS_PACRC_WP3 (17U) //!< Bit position for AIPS_PACRC_WP3.
bogdanm 82:6473597d706e 2856 #define BM_AIPS_PACRC_WP3 (0x00020000U) //!< Bit mask for AIPS_PACRC_WP3.
bogdanm 82:6473597d706e 2857 #define BS_AIPS_PACRC_WP3 (1U) //!< Bit field size in bits for AIPS_PACRC_WP3.
bogdanm 82:6473597d706e 2858
bogdanm 82:6473597d706e 2859 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2860 //! @brief Read current value of the AIPS_PACRC_WP3 field.
bogdanm 82:6473597d706e 2861 #define BR_AIPS_PACRC_WP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP3))
bogdanm 82:6473597d706e 2862 #endif
bogdanm 82:6473597d706e 2863
bogdanm 82:6473597d706e 2864 //! @brief Format value for bitfield AIPS_PACRC_WP3.
bogdanm 82:6473597d706e 2865 #define BF_AIPS_PACRC_WP3(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRC_WP3), uint32_t) & BM_AIPS_PACRC_WP3)
bogdanm 82:6473597d706e 2866
bogdanm 82:6473597d706e 2867 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2868 //! @brief Set the WP3 field to a new value.
bogdanm 82:6473597d706e 2869 #define BW_AIPS_PACRC_WP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP3) = (v))
bogdanm 82:6473597d706e 2870 #endif
bogdanm 82:6473597d706e 2871 //@}
bogdanm 82:6473597d706e 2872
bogdanm 82:6473597d706e 2873 /*!
bogdanm 82:6473597d706e 2874 * @name Register AIPS_PACRC, field SP3[18] (RW)
bogdanm 82:6473597d706e 2875 *
bogdanm 82:6473597d706e 2876 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 2877 * access. When this bit is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 2878 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
bogdanm 82:6473597d706e 2879 * set. If not, access terminates with an error response and no peripheral access
bogdanm 82:6473597d706e 2880 * initiates.
bogdanm 82:6473597d706e 2881 *
bogdanm 82:6473597d706e 2882 * Values:
bogdanm 82:6473597d706e 2883 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 2884 * accesses.
bogdanm 82:6473597d706e 2885 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 2886 */
bogdanm 82:6473597d706e 2887 //@{
bogdanm 82:6473597d706e 2888 #define BP_AIPS_PACRC_SP3 (18U) //!< Bit position for AIPS_PACRC_SP3.
bogdanm 82:6473597d706e 2889 #define BM_AIPS_PACRC_SP3 (0x00040000U) //!< Bit mask for AIPS_PACRC_SP3.
bogdanm 82:6473597d706e 2890 #define BS_AIPS_PACRC_SP3 (1U) //!< Bit field size in bits for AIPS_PACRC_SP3.
bogdanm 82:6473597d706e 2891
bogdanm 82:6473597d706e 2892 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2893 //! @brief Read current value of the AIPS_PACRC_SP3 field.
bogdanm 82:6473597d706e 2894 #define BR_AIPS_PACRC_SP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP3))
bogdanm 82:6473597d706e 2895 #endif
bogdanm 82:6473597d706e 2896
bogdanm 82:6473597d706e 2897 //! @brief Format value for bitfield AIPS_PACRC_SP3.
bogdanm 82:6473597d706e 2898 #define BF_AIPS_PACRC_SP3(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRC_SP3), uint32_t) & BM_AIPS_PACRC_SP3)
bogdanm 82:6473597d706e 2899
bogdanm 82:6473597d706e 2900 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2901 //! @brief Set the SP3 field to a new value.
bogdanm 82:6473597d706e 2902 #define BW_AIPS_PACRC_SP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP3) = (v))
bogdanm 82:6473597d706e 2903 #endif
bogdanm 82:6473597d706e 2904 //@}
bogdanm 82:6473597d706e 2905
bogdanm 82:6473597d706e 2906 /*!
bogdanm 82:6473597d706e 2907 * @name Register AIPS_PACRC, field TP2[20] (RW)
bogdanm 82:6473597d706e 2908 *
bogdanm 82:6473597d706e 2909 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 2910 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 2911 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 2912 *
bogdanm 82:6473597d706e 2913 * Values:
bogdanm 82:6473597d706e 2914 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 2915 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 2916 */
bogdanm 82:6473597d706e 2917 //@{
bogdanm 82:6473597d706e 2918 #define BP_AIPS_PACRC_TP2 (20U) //!< Bit position for AIPS_PACRC_TP2.
bogdanm 82:6473597d706e 2919 #define BM_AIPS_PACRC_TP2 (0x00100000U) //!< Bit mask for AIPS_PACRC_TP2.
bogdanm 82:6473597d706e 2920 #define BS_AIPS_PACRC_TP2 (1U) //!< Bit field size in bits for AIPS_PACRC_TP2.
bogdanm 82:6473597d706e 2921
bogdanm 82:6473597d706e 2922 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2923 //! @brief Read current value of the AIPS_PACRC_TP2 field.
bogdanm 82:6473597d706e 2924 #define BR_AIPS_PACRC_TP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP2))
bogdanm 82:6473597d706e 2925 #endif
bogdanm 82:6473597d706e 2926
bogdanm 82:6473597d706e 2927 //! @brief Format value for bitfield AIPS_PACRC_TP2.
bogdanm 82:6473597d706e 2928 #define BF_AIPS_PACRC_TP2(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRC_TP2), uint32_t) & BM_AIPS_PACRC_TP2)
bogdanm 82:6473597d706e 2929
bogdanm 82:6473597d706e 2930 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2931 //! @brief Set the TP2 field to a new value.
bogdanm 82:6473597d706e 2932 #define BW_AIPS_PACRC_TP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP2) = (v))
bogdanm 82:6473597d706e 2933 #endif
bogdanm 82:6473597d706e 2934 //@}
bogdanm 82:6473597d706e 2935
bogdanm 82:6473597d706e 2936 /*!
bogdanm 82:6473597d706e 2937 * @name Register AIPS_PACRC, field WP2[21] (RW)
bogdanm 82:6473597d706e 2938 *
bogdanm 82:6473597d706e 2939 * Determines whether the peripheral allows write accesss. When this bit is set
bogdanm 82:6473597d706e 2940 * and a write access is attempted, access terminates with an error response and
bogdanm 82:6473597d706e 2941 * no peripheral access initiates.
bogdanm 82:6473597d706e 2942 *
bogdanm 82:6473597d706e 2943 * Values:
bogdanm 82:6473597d706e 2944 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 2945 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 2946 */
bogdanm 82:6473597d706e 2947 //@{
bogdanm 82:6473597d706e 2948 #define BP_AIPS_PACRC_WP2 (21U) //!< Bit position for AIPS_PACRC_WP2.
bogdanm 82:6473597d706e 2949 #define BM_AIPS_PACRC_WP2 (0x00200000U) //!< Bit mask for AIPS_PACRC_WP2.
bogdanm 82:6473597d706e 2950 #define BS_AIPS_PACRC_WP2 (1U) //!< Bit field size in bits for AIPS_PACRC_WP2.
bogdanm 82:6473597d706e 2951
bogdanm 82:6473597d706e 2952 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2953 //! @brief Read current value of the AIPS_PACRC_WP2 field.
bogdanm 82:6473597d706e 2954 #define BR_AIPS_PACRC_WP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP2))
bogdanm 82:6473597d706e 2955 #endif
bogdanm 82:6473597d706e 2956
bogdanm 82:6473597d706e 2957 //! @brief Format value for bitfield AIPS_PACRC_WP2.
bogdanm 82:6473597d706e 2958 #define BF_AIPS_PACRC_WP2(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRC_WP2), uint32_t) & BM_AIPS_PACRC_WP2)
bogdanm 82:6473597d706e 2959
bogdanm 82:6473597d706e 2960 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2961 //! @brief Set the WP2 field to a new value.
bogdanm 82:6473597d706e 2962 #define BW_AIPS_PACRC_WP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP2) = (v))
bogdanm 82:6473597d706e 2963 #endif
bogdanm 82:6473597d706e 2964 //@}
bogdanm 82:6473597d706e 2965
bogdanm 82:6473597d706e 2966 /*!
bogdanm 82:6473597d706e 2967 * @name Register AIPS_PACRC, field SP2[22] (RW)
bogdanm 82:6473597d706e 2968 *
bogdanm 82:6473597d706e 2969 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 2970 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 2971 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 2972 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 2973 * access initiates.
bogdanm 82:6473597d706e 2974 *
bogdanm 82:6473597d706e 2975 * Values:
bogdanm 82:6473597d706e 2976 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 2977 * accesses.
bogdanm 82:6473597d706e 2978 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 2979 */
bogdanm 82:6473597d706e 2980 //@{
bogdanm 82:6473597d706e 2981 #define BP_AIPS_PACRC_SP2 (22U) //!< Bit position for AIPS_PACRC_SP2.
bogdanm 82:6473597d706e 2982 #define BM_AIPS_PACRC_SP2 (0x00400000U) //!< Bit mask for AIPS_PACRC_SP2.
bogdanm 82:6473597d706e 2983 #define BS_AIPS_PACRC_SP2 (1U) //!< Bit field size in bits for AIPS_PACRC_SP2.
bogdanm 82:6473597d706e 2984
bogdanm 82:6473597d706e 2985 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2986 //! @brief Read current value of the AIPS_PACRC_SP2 field.
bogdanm 82:6473597d706e 2987 #define BR_AIPS_PACRC_SP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP2))
bogdanm 82:6473597d706e 2988 #endif
bogdanm 82:6473597d706e 2989
bogdanm 82:6473597d706e 2990 //! @brief Format value for bitfield AIPS_PACRC_SP2.
bogdanm 82:6473597d706e 2991 #define BF_AIPS_PACRC_SP2(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRC_SP2), uint32_t) & BM_AIPS_PACRC_SP2)
bogdanm 82:6473597d706e 2992
bogdanm 82:6473597d706e 2993 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 2994 //! @brief Set the SP2 field to a new value.
bogdanm 82:6473597d706e 2995 #define BW_AIPS_PACRC_SP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP2) = (v))
bogdanm 82:6473597d706e 2996 #endif
bogdanm 82:6473597d706e 2997 //@}
bogdanm 82:6473597d706e 2998
bogdanm 82:6473597d706e 2999 /*!
bogdanm 82:6473597d706e 3000 * @name Register AIPS_PACRC, field TP1[24] (RW)
bogdanm 82:6473597d706e 3001 *
bogdanm 82:6473597d706e 3002 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 3003 * When this bit is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 3004 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 3005 *
bogdanm 82:6473597d706e 3006 * Values:
bogdanm 82:6473597d706e 3007 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 3008 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 3009 */
bogdanm 82:6473597d706e 3010 //@{
bogdanm 82:6473597d706e 3011 #define BP_AIPS_PACRC_TP1 (24U) //!< Bit position for AIPS_PACRC_TP1.
bogdanm 82:6473597d706e 3012 #define BM_AIPS_PACRC_TP1 (0x01000000U) //!< Bit mask for AIPS_PACRC_TP1.
bogdanm 82:6473597d706e 3013 #define BS_AIPS_PACRC_TP1 (1U) //!< Bit field size in bits for AIPS_PACRC_TP1.
bogdanm 82:6473597d706e 3014
bogdanm 82:6473597d706e 3015 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3016 //! @brief Read current value of the AIPS_PACRC_TP1 field.
bogdanm 82:6473597d706e 3017 #define BR_AIPS_PACRC_TP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP1))
bogdanm 82:6473597d706e 3018 #endif
bogdanm 82:6473597d706e 3019
bogdanm 82:6473597d706e 3020 //! @brief Format value for bitfield AIPS_PACRC_TP1.
bogdanm 82:6473597d706e 3021 #define BF_AIPS_PACRC_TP1(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRC_TP1), uint32_t) & BM_AIPS_PACRC_TP1)
bogdanm 82:6473597d706e 3022
bogdanm 82:6473597d706e 3023 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3024 //! @brief Set the TP1 field to a new value.
bogdanm 82:6473597d706e 3025 #define BW_AIPS_PACRC_TP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP1) = (v))
bogdanm 82:6473597d706e 3026 #endif
bogdanm 82:6473597d706e 3027 //@}
bogdanm 82:6473597d706e 3028
bogdanm 82:6473597d706e 3029 /*!
bogdanm 82:6473597d706e 3030 * @name Register AIPS_PACRC, field WP1[25] (RW)
bogdanm 82:6473597d706e 3031 *
bogdanm 82:6473597d706e 3032 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 3033 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 3034 * and no peripheral access initiates.
bogdanm 82:6473597d706e 3035 *
bogdanm 82:6473597d706e 3036 * Values:
bogdanm 82:6473597d706e 3037 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 3038 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 3039 */
bogdanm 82:6473597d706e 3040 //@{
bogdanm 82:6473597d706e 3041 #define BP_AIPS_PACRC_WP1 (25U) //!< Bit position for AIPS_PACRC_WP1.
bogdanm 82:6473597d706e 3042 #define BM_AIPS_PACRC_WP1 (0x02000000U) //!< Bit mask for AIPS_PACRC_WP1.
bogdanm 82:6473597d706e 3043 #define BS_AIPS_PACRC_WP1 (1U) //!< Bit field size in bits for AIPS_PACRC_WP1.
bogdanm 82:6473597d706e 3044
bogdanm 82:6473597d706e 3045 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3046 //! @brief Read current value of the AIPS_PACRC_WP1 field.
bogdanm 82:6473597d706e 3047 #define BR_AIPS_PACRC_WP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP1))
bogdanm 82:6473597d706e 3048 #endif
bogdanm 82:6473597d706e 3049
bogdanm 82:6473597d706e 3050 //! @brief Format value for bitfield AIPS_PACRC_WP1.
bogdanm 82:6473597d706e 3051 #define BF_AIPS_PACRC_WP1(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRC_WP1), uint32_t) & BM_AIPS_PACRC_WP1)
bogdanm 82:6473597d706e 3052
bogdanm 82:6473597d706e 3053 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3054 //! @brief Set the WP1 field to a new value.
bogdanm 82:6473597d706e 3055 #define BW_AIPS_PACRC_WP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP1) = (v))
bogdanm 82:6473597d706e 3056 #endif
bogdanm 82:6473597d706e 3057 //@}
bogdanm 82:6473597d706e 3058
bogdanm 82:6473597d706e 3059 /*!
bogdanm 82:6473597d706e 3060 * @name Register AIPS_PACRC, field SP1[26] (RW)
bogdanm 82:6473597d706e 3061 *
bogdanm 82:6473597d706e 3062 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 3063 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 3064 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 3065 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 3066 * access initiates.
bogdanm 82:6473597d706e 3067 *
bogdanm 82:6473597d706e 3068 * Values:
bogdanm 82:6473597d706e 3069 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 3070 * accesses.
bogdanm 82:6473597d706e 3071 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 3072 */
bogdanm 82:6473597d706e 3073 //@{
bogdanm 82:6473597d706e 3074 #define BP_AIPS_PACRC_SP1 (26U) //!< Bit position for AIPS_PACRC_SP1.
bogdanm 82:6473597d706e 3075 #define BM_AIPS_PACRC_SP1 (0x04000000U) //!< Bit mask for AIPS_PACRC_SP1.
bogdanm 82:6473597d706e 3076 #define BS_AIPS_PACRC_SP1 (1U) //!< Bit field size in bits for AIPS_PACRC_SP1.
bogdanm 82:6473597d706e 3077
bogdanm 82:6473597d706e 3078 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3079 //! @brief Read current value of the AIPS_PACRC_SP1 field.
bogdanm 82:6473597d706e 3080 #define BR_AIPS_PACRC_SP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP1))
bogdanm 82:6473597d706e 3081 #endif
bogdanm 82:6473597d706e 3082
bogdanm 82:6473597d706e 3083 //! @brief Format value for bitfield AIPS_PACRC_SP1.
bogdanm 82:6473597d706e 3084 #define BF_AIPS_PACRC_SP1(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRC_SP1), uint32_t) & BM_AIPS_PACRC_SP1)
bogdanm 82:6473597d706e 3085
bogdanm 82:6473597d706e 3086 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3087 //! @brief Set the SP1 field to a new value.
bogdanm 82:6473597d706e 3088 #define BW_AIPS_PACRC_SP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP1) = (v))
bogdanm 82:6473597d706e 3089 #endif
bogdanm 82:6473597d706e 3090 //@}
bogdanm 82:6473597d706e 3091
bogdanm 82:6473597d706e 3092 /*!
bogdanm 82:6473597d706e 3093 * @name Register AIPS_PACRC, field TP0[28] (RW)
bogdanm 82:6473597d706e 3094 *
bogdanm 82:6473597d706e 3095 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 3096 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 3097 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 3098 *
bogdanm 82:6473597d706e 3099 * Values:
bogdanm 82:6473597d706e 3100 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 3101 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 3102 */
bogdanm 82:6473597d706e 3103 //@{
bogdanm 82:6473597d706e 3104 #define BP_AIPS_PACRC_TP0 (28U) //!< Bit position for AIPS_PACRC_TP0.
bogdanm 82:6473597d706e 3105 #define BM_AIPS_PACRC_TP0 (0x10000000U) //!< Bit mask for AIPS_PACRC_TP0.
bogdanm 82:6473597d706e 3106 #define BS_AIPS_PACRC_TP0 (1U) //!< Bit field size in bits for AIPS_PACRC_TP0.
bogdanm 82:6473597d706e 3107
bogdanm 82:6473597d706e 3108 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3109 //! @brief Read current value of the AIPS_PACRC_TP0 field.
bogdanm 82:6473597d706e 3110 #define BR_AIPS_PACRC_TP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP0))
bogdanm 82:6473597d706e 3111 #endif
bogdanm 82:6473597d706e 3112
bogdanm 82:6473597d706e 3113 //! @brief Format value for bitfield AIPS_PACRC_TP0.
bogdanm 82:6473597d706e 3114 #define BF_AIPS_PACRC_TP0(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRC_TP0), uint32_t) & BM_AIPS_PACRC_TP0)
bogdanm 82:6473597d706e 3115
bogdanm 82:6473597d706e 3116 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3117 //! @brief Set the TP0 field to a new value.
bogdanm 82:6473597d706e 3118 #define BW_AIPS_PACRC_TP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_TP0) = (v))
bogdanm 82:6473597d706e 3119 #endif
bogdanm 82:6473597d706e 3120 //@}
bogdanm 82:6473597d706e 3121
bogdanm 82:6473597d706e 3122 /*!
bogdanm 82:6473597d706e 3123 * @name Register AIPS_PACRC, field WP0[29] (RW)
bogdanm 82:6473597d706e 3124 *
bogdanm 82:6473597d706e 3125 * Determines whether the peripheral allows write accesss. When this bit is set
bogdanm 82:6473597d706e 3126 * and a write access is attempted, access terminates with an error response and
bogdanm 82:6473597d706e 3127 * no peripheral access initiates.
bogdanm 82:6473597d706e 3128 *
bogdanm 82:6473597d706e 3129 * Values:
bogdanm 82:6473597d706e 3130 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 3131 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 3132 */
bogdanm 82:6473597d706e 3133 //@{
bogdanm 82:6473597d706e 3134 #define BP_AIPS_PACRC_WP0 (29U) //!< Bit position for AIPS_PACRC_WP0.
bogdanm 82:6473597d706e 3135 #define BM_AIPS_PACRC_WP0 (0x20000000U) //!< Bit mask for AIPS_PACRC_WP0.
bogdanm 82:6473597d706e 3136 #define BS_AIPS_PACRC_WP0 (1U) //!< Bit field size in bits for AIPS_PACRC_WP0.
bogdanm 82:6473597d706e 3137
bogdanm 82:6473597d706e 3138 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3139 //! @brief Read current value of the AIPS_PACRC_WP0 field.
bogdanm 82:6473597d706e 3140 #define BR_AIPS_PACRC_WP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP0))
bogdanm 82:6473597d706e 3141 #endif
bogdanm 82:6473597d706e 3142
bogdanm 82:6473597d706e 3143 //! @brief Format value for bitfield AIPS_PACRC_WP0.
bogdanm 82:6473597d706e 3144 #define BF_AIPS_PACRC_WP0(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRC_WP0), uint32_t) & BM_AIPS_PACRC_WP0)
bogdanm 82:6473597d706e 3145
bogdanm 82:6473597d706e 3146 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3147 //! @brief Set the WP0 field to a new value.
bogdanm 82:6473597d706e 3148 #define BW_AIPS_PACRC_WP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_WP0) = (v))
bogdanm 82:6473597d706e 3149 #endif
bogdanm 82:6473597d706e 3150 //@}
bogdanm 82:6473597d706e 3151
bogdanm 82:6473597d706e 3152 /*!
bogdanm 82:6473597d706e 3153 * @name Register AIPS_PACRC, field SP0[30] (RW)
bogdanm 82:6473597d706e 3154 *
bogdanm 82:6473597d706e 3155 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 3156 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 3157 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 3158 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 3159 * access initiates.
bogdanm 82:6473597d706e 3160 *
bogdanm 82:6473597d706e 3161 * Values:
bogdanm 82:6473597d706e 3162 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 3163 * accesses.
bogdanm 82:6473597d706e 3164 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 3165 */
bogdanm 82:6473597d706e 3166 //@{
bogdanm 82:6473597d706e 3167 #define BP_AIPS_PACRC_SP0 (30U) //!< Bit position for AIPS_PACRC_SP0.
bogdanm 82:6473597d706e 3168 #define BM_AIPS_PACRC_SP0 (0x40000000U) //!< Bit mask for AIPS_PACRC_SP0.
bogdanm 82:6473597d706e 3169 #define BS_AIPS_PACRC_SP0 (1U) //!< Bit field size in bits for AIPS_PACRC_SP0.
bogdanm 82:6473597d706e 3170
bogdanm 82:6473597d706e 3171 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3172 //! @brief Read current value of the AIPS_PACRC_SP0 field.
bogdanm 82:6473597d706e 3173 #define BR_AIPS_PACRC_SP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP0))
bogdanm 82:6473597d706e 3174 #endif
bogdanm 82:6473597d706e 3175
bogdanm 82:6473597d706e 3176 //! @brief Format value for bitfield AIPS_PACRC_SP0.
bogdanm 82:6473597d706e 3177 #define BF_AIPS_PACRC_SP0(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRC_SP0), uint32_t) & BM_AIPS_PACRC_SP0)
bogdanm 82:6473597d706e 3178
bogdanm 82:6473597d706e 3179 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3180 //! @brief Set the SP0 field to a new value.
bogdanm 82:6473597d706e 3181 #define BW_AIPS_PACRC_SP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRC_ADDR(x), BP_AIPS_PACRC_SP0) = (v))
bogdanm 82:6473597d706e 3182 #endif
bogdanm 82:6473597d706e 3183 //@}
bogdanm 82:6473597d706e 3184
bogdanm 82:6473597d706e 3185 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 3186 // HW_AIPS_PACRD - Peripheral Access Control Register
bogdanm 82:6473597d706e 3187 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 3188
bogdanm 82:6473597d706e 3189 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3190 /*!
bogdanm 82:6473597d706e 3191 * @brief HW_AIPS_PACRD - Peripheral Access Control Register (RW)
bogdanm 82:6473597d706e 3192 *
bogdanm 82:6473597d706e 3193 * Reset value: 0x00000004U
bogdanm 82:6473597d706e 3194 *
bogdanm 82:6473597d706e 3195 * Each PACR register consists of eight 4-bit PACR fields. Each PACR field
bogdanm 82:6473597d706e 3196 * defines the access levels for a particular peripheral. The mapping between a
bogdanm 82:6473597d706e 3197 * peripheral and its PACR field is shown in the table below. The peripheral assignment
bogdanm 82:6473597d706e 3198 * to each PACR is defined by the memory map slot that the peripheral is
bogdanm 82:6473597d706e 3199 * assigned to. See this chip's memory map for the assignment of a particular
bogdanm 82:6473597d706e 3200 * peripheral. The following table shows the location of each peripheral slot's PACR field
bogdanm 82:6473597d706e 3201 * in the PACR registers. Offset Register [31:28] [27:24] [23:20] [19:16] [15:12]
bogdanm 82:6473597d706e 3202 * [11:8] [7:4] [3:0] 0x20 PACRA PACR0 PACR1 PACR2 PACR3 PACR4 PACR5 PACR6 PACR7
bogdanm 82:6473597d706e 3203 * 0x24 PACRB PACR8 PACR9 PACR10 PACR11 PACR12 PACR13 PACR14 PACR15 0x28 PACRC
bogdanm 82:6473597d706e 3204 * PACR16 PACR17 PACR18 PACR19 PACR20 PACR21 PACR22 PACR23 0x2C PACRD PACR24
bogdanm 82:6473597d706e 3205 * PACR25 PACR26 PACR27 PACR28 PACR29 PACR30 PACR31 0x30 Reserved 0x34 Reserved 0x38
bogdanm 82:6473597d706e 3206 * Reserved 0x3C Reserved 0x40 PACRE PACR32 PACR33 PACR34 PACR35 PACR36 PACR37
bogdanm 82:6473597d706e 3207 * PACR38 PACR39 0x44 PACRF PACR40 PACR41 PACR42 PACR43 PACR44 PACR45 PACR46 PACR47
bogdanm 82:6473597d706e 3208 * 0x48 PACRG PACR48 PACR49 PACR50 PACR51 PACR52 PACR53 PACR54 PACR55 0x4C PACRH
bogdanm 82:6473597d706e 3209 * PACR56 PACR57 PACR58 PACR59 PACR60 PACR61 PACR62 PACR63 0x50 PACRI PACR64
bogdanm 82:6473597d706e 3210 * PACR65 PACR66 PACR67 PACR68 PACR69 PACR70 PACR71 0x54 PACRJ PACR72 PACR73 PACR74
bogdanm 82:6473597d706e 3211 * PACR75 PACR76 PACR77 PACR78 PACR79 0x58 PACRK PACR80 PACR81 PACR82 PACR83
bogdanm 82:6473597d706e 3212 * PACR84 PACR85 PACR86 PACR87 0x5C PACRL PACR88 PACR89 PACR90 PACR91 PACR92 PACR93
bogdanm 82:6473597d706e 3213 * PACR94 PACR95 0x60 PACRM PACR96 PACR97 PACR98 PACR99 PACR100 PACR101 PACR102
bogdanm 82:6473597d706e 3214 * PACR103 0x64 PACRN PACR104 PACR105 PACR106 PACR107 PACR108 PACR109 PACR110
bogdanm 82:6473597d706e 3215 * PACR111 0x68 PACRO PACR112 PACR113 PACR114 PACR115 PACR116 PACR117 PACR118 PACR119
bogdanm 82:6473597d706e 3216 * 0x6C PACRP PACR120 PACR121 PACR122 PACR123 PACR124 PACR125 PACR126 PACR127 0x80
bogdanm 82:6473597d706e 3217 * PACRU PACR GBL0 PACR GBL1 Reserved The register field descriptions for PACR
bogdanm 82:6473597d706e 3218 * A-D, which control peripheral slots 0-31, are shown below. The following
bogdanm 82:6473597d706e 3219 * section, PACRPeripheral Access Control Register , shows the register field
bogdanm 82:6473597d706e 3220 * descriptions for PACR E-P. All PACR registers are identical. They are divided into two
bogdanm 82:6473597d706e 3221 * sections because they occupy two non-contiguous address spaces.
bogdanm 82:6473597d706e 3222 */
bogdanm 82:6473597d706e 3223 typedef union _hw_aips_pacrd
bogdanm 82:6473597d706e 3224 {
bogdanm 82:6473597d706e 3225 uint32_t U;
bogdanm 82:6473597d706e 3226 struct _hw_aips_pacrd_bitfields
bogdanm 82:6473597d706e 3227 {
bogdanm 82:6473597d706e 3228 uint32_t TP7 : 1; //!< [0] Trusted Protect
bogdanm 82:6473597d706e 3229 uint32_t WP7 : 1; //!< [1] Write Protect
bogdanm 82:6473597d706e 3230 uint32_t SP7 : 1; //!< [2] Supervisor Protect
bogdanm 82:6473597d706e 3231 uint32_t RESERVED0 : 1; //!< [3]
bogdanm 82:6473597d706e 3232 uint32_t TP6 : 1; //!< [4] Trusted Protect
bogdanm 82:6473597d706e 3233 uint32_t WP6 : 1; //!< [5] Write Protect
bogdanm 82:6473597d706e 3234 uint32_t SP6 : 1; //!< [6] Supervisor Protect
bogdanm 82:6473597d706e 3235 uint32_t RESERVED1 : 1; //!< [7]
bogdanm 82:6473597d706e 3236 uint32_t TP5 : 1; //!< [8] Trusted Protect
bogdanm 82:6473597d706e 3237 uint32_t WP5 : 1; //!< [9] Write Protect
bogdanm 82:6473597d706e 3238 uint32_t SP5 : 1; //!< [10] Supervisor Protect
bogdanm 82:6473597d706e 3239 uint32_t RESERVED2 : 1; //!< [11]
bogdanm 82:6473597d706e 3240 uint32_t TP4 : 1; //!< [12] Trusted Protect
bogdanm 82:6473597d706e 3241 uint32_t WP4 : 1; //!< [13] Write Protect
bogdanm 82:6473597d706e 3242 uint32_t SP4 : 1; //!< [14] Supervisor Protect
bogdanm 82:6473597d706e 3243 uint32_t RESERVED3 : 1; //!< [15]
bogdanm 82:6473597d706e 3244 uint32_t TP3 : 1; //!< [16] Trusted Protect
bogdanm 82:6473597d706e 3245 uint32_t WP3 : 1; //!< [17] Write Protect
bogdanm 82:6473597d706e 3246 uint32_t SP3 : 1; //!< [18] Supervisor Protect
bogdanm 82:6473597d706e 3247 uint32_t RESERVED4 : 1; //!< [19]
bogdanm 82:6473597d706e 3248 uint32_t TP2 : 1; //!< [20] Trusted Protect
bogdanm 82:6473597d706e 3249 uint32_t WP2 : 1; //!< [21] Write Protect
bogdanm 82:6473597d706e 3250 uint32_t SP2 : 1; //!< [22] Supervisor Protect
bogdanm 82:6473597d706e 3251 uint32_t RESERVED5 : 1; //!< [23]
bogdanm 82:6473597d706e 3252 uint32_t TP1 : 1; //!< [24] Trusted Protect
bogdanm 82:6473597d706e 3253 uint32_t WP1 : 1; //!< [25] Write Protect
bogdanm 82:6473597d706e 3254 uint32_t SP1 : 1; //!< [26] Supervisor Protect
bogdanm 82:6473597d706e 3255 uint32_t RESERVED6 : 1; //!< [27]
bogdanm 82:6473597d706e 3256 uint32_t TP0 : 1; //!< [28] Trusted Protect
bogdanm 82:6473597d706e 3257 uint32_t WP0 : 1; //!< [29] Write Protect
bogdanm 82:6473597d706e 3258 uint32_t SP0 : 1; //!< [30] Supervisor Protect
bogdanm 82:6473597d706e 3259 uint32_t RESERVED7 : 1; //!< [31]
bogdanm 82:6473597d706e 3260 } B;
bogdanm 82:6473597d706e 3261 } hw_aips_pacrd_t;
bogdanm 82:6473597d706e 3262 #endif
bogdanm 82:6473597d706e 3263
bogdanm 82:6473597d706e 3264 /*!
bogdanm 82:6473597d706e 3265 * @name Constants and macros for entire AIPS_PACRD register
bogdanm 82:6473597d706e 3266 */
bogdanm 82:6473597d706e 3267 //@{
bogdanm 82:6473597d706e 3268 #define HW_AIPS_PACRD_ADDR(x) (REGS_AIPS_BASE(x) + 0x2CU)
bogdanm 82:6473597d706e 3269
bogdanm 82:6473597d706e 3270 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3271 #define HW_AIPS_PACRD(x) (*(__IO hw_aips_pacrd_t *) HW_AIPS_PACRD_ADDR(x))
bogdanm 82:6473597d706e 3272 #define HW_AIPS_PACRD_RD(x) (HW_AIPS_PACRD(x).U)
bogdanm 82:6473597d706e 3273 #define HW_AIPS_PACRD_WR(x, v) (HW_AIPS_PACRD(x).U = (v))
bogdanm 82:6473597d706e 3274 #define HW_AIPS_PACRD_SET(x, v) (HW_AIPS_PACRD_WR(x, HW_AIPS_PACRD_RD(x) | (v)))
bogdanm 82:6473597d706e 3275 #define HW_AIPS_PACRD_CLR(x, v) (HW_AIPS_PACRD_WR(x, HW_AIPS_PACRD_RD(x) & ~(v)))
bogdanm 82:6473597d706e 3276 #define HW_AIPS_PACRD_TOG(x, v) (HW_AIPS_PACRD_WR(x, HW_AIPS_PACRD_RD(x) ^ (v)))
bogdanm 82:6473597d706e 3277 #endif
bogdanm 82:6473597d706e 3278 //@}
bogdanm 82:6473597d706e 3279
bogdanm 82:6473597d706e 3280 /*
bogdanm 82:6473597d706e 3281 * Constants & macros for individual AIPS_PACRD bitfields
bogdanm 82:6473597d706e 3282 */
bogdanm 82:6473597d706e 3283
bogdanm 82:6473597d706e 3284 /*!
bogdanm 82:6473597d706e 3285 * @name Register AIPS_PACRD, field TP7[0] (RW)
bogdanm 82:6473597d706e 3286 *
bogdanm 82:6473597d706e 3287 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 3288 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 3289 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 3290 *
bogdanm 82:6473597d706e 3291 * Values:
bogdanm 82:6473597d706e 3292 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 3293 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 3294 */
bogdanm 82:6473597d706e 3295 //@{
bogdanm 82:6473597d706e 3296 #define BP_AIPS_PACRD_TP7 (0U) //!< Bit position for AIPS_PACRD_TP7.
bogdanm 82:6473597d706e 3297 #define BM_AIPS_PACRD_TP7 (0x00000001U) //!< Bit mask for AIPS_PACRD_TP7.
bogdanm 82:6473597d706e 3298 #define BS_AIPS_PACRD_TP7 (1U) //!< Bit field size in bits for AIPS_PACRD_TP7.
bogdanm 82:6473597d706e 3299
bogdanm 82:6473597d706e 3300 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3301 //! @brief Read current value of the AIPS_PACRD_TP7 field.
bogdanm 82:6473597d706e 3302 #define BR_AIPS_PACRD_TP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP7))
bogdanm 82:6473597d706e 3303 #endif
bogdanm 82:6473597d706e 3304
bogdanm 82:6473597d706e 3305 //! @brief Format value for bitfield AIPS_PACRD_TP7.
bogdanm 82:6473597d706e 3306 #define BF_AIPS_PACRD_TP7(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRD_TP7), uint32_t) & BM_AIPS_PACRD_TP7)
bogdanm 82:6473597d706e 3307
bogdanm 82:6473597d706e 3308 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3309 //! @brief Set the TP7 field to a new value.
bogdanm 82:6473597d706e 3310 #define BW_AIPS_PACRD_TP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP7) = (v))
bogdanm 82:6473597d706e 3311 #endif
bogdanm 82:6473597d706e 3312 //@}
bogdanm 82:6473597d706e 3313
bogdanm 82:6473597d706e 3314 /*!
bogdanm 82:6473597d706e 3315 * @name Register AIPS_PACRD, field WP7[1] (RW)
bogdanm 82:6473597d706e 3316 *
bogdanm 82:6473597d706e 3317 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 3318 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 3319 * and no peripheral access initiates.
bogdanm 82:6473597d706e 3320 *
bogdanm 82:6473597d706e 3321 * Values:
bogdanm 82:6473597d706e 3322 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 3323 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 3324 */
bogdanm 82:6473597d706e 3325 //@{
bogdanm 82:6473597d706e 3326 #define BP_AIPS_PACRD_WP7 (1U) //!< Bit position for AIPS_PACRD_WP7.
bogdanm 82:6473597d706e 3327 #define BM_AIPS_PACRD_WP7 (0x00000002U) //!< Bit mask for AIPS_PACRD_WP7.
bogdanm 82:6473597d706e 3328 #define BS_AIPS_PACRD_WP7 (1U) //!< Bit field size in bits for AIPS_PACRD_WP7.
bogdanm 82:6473597d706e 3329
bogdanm 82:6473597d706e 3330 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3331 //! @brief Read current value of the AIPS_PACRD_WP7 field.
bogdanm 82:6473597d706e 3332 #define BR_AIPS_PACRD_WP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP7))
bogdanm 82:6473597d706e 3333 #endif
bogdanm 82:6473597d706e 3334
bogdanm 82:6473597d706e 3335 //! @brief Format value for bitfield AIPS_PACRD_WP7.
bogdanm 82:6473597d706e 3336 #define BF_AIPS_PACRD_WP7(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRD_WP7), uint32_t) & BM_AIPS_PACRD_WP7)
bogdanm 82:6473597d706e 3337
bogdanm 82:6473597d706e 3338 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3339 //! @brief Set the WP7 field to a new value.
bogdanm 82:6473597d706e 3340 #define BW_AIPS_PACRD_WP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP7) = (v))
bogdanm 82:6473597d706e 3341 #endif
bogdanm 82:6473597d706e 3342 //@}
bogdanm 82:6473597d706e 3343
bogdanm 82:6473597d706e 3344 /*!
bogdanm 82:6473597d706e 3345 * @name Register AIPS_PACRD, field SP7[2] (RW)
bogdanm 82:6473597d706e 3346 *
bogdanm 82:6473597d706e 3347 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 3348 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 3349 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 3350 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 3351 * access initiates.
bogdanm 82:6473597d706e 3352 *
bogdanm 82:6473597d706e 3353 * Values:
bogdanm 82:6473597d706e 3354 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 3355 * accesses.
bogdanm 82:6473597d706e 3356 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 3357 */
bogdanm 82:6473597d706e 3358 //@{
bogdanm 82:6473597d706e 3359 #define BP_AIPS_PACRD_SP7 (2U) //!< Bit position for AIPS_PACRD_SP7.
bogdanm 82:6473597d706e 3360 #define BM_AIPS_PACRD_SP7 (0x00000004U) //!< Bit mask for AIPS_PACRD_SP7.
bogdanm 82:6473597d706e 3361 #define BS_AIPS_PACRD_SP7 (1U) //!< Bit field size in bits for AIPS_PACRD_SP7.
bogdanm 82:6473597d706e 3362
bogdanm 82:6473597d706e 3363 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3364 //! @brief Read current value of the AIPS_PACRD_SP7 field.
bogdanm 82:6473597d706e 3365 #define BR_AIPS_PACRD_SP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP7))
bogdanm 82:6473597d706e 3366 #endif
bogdanm 82:6473597d706e 3367
bogdanm 82:6473597d706e 3368 //! @brief Format value for bitfield AIPS_PACRD_SP7.
bogdanm 82:6473597d706e 3369 #define BF_AIPS_PACRD_SP7(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRD_SP7), uint32_t) & BM_AIPS_PACRD_SP7)
bogdanm 82:6473597d706e 3370
bogdanm 82:6473597d706e 3371 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3372 //! @brief Set the SP7 field to a new value.
bogdanm 82:6473597d706e 3373 #define BW_AIPS_PACRD_SP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP7) = (v))
bogdanm 82:6473597d706e 3374 #endif
bogdanm 82:6473597d706e 3375 //@}
bogdanm 82:6473597d706e 3376
bogdanm 82:6473597d706e 3377 /*!
bogdanm 82:6473597d706e 3378 * @name Register AIPS_PACRD, field TP6[4] (RW)
bogdanm 82:6473597d706e 3379 *
bogdanm 82:6473597d706e 3380 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 3381 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 3382 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 3383 *
bogdanm 82:6473597d706e 3384 * Values:
bogdanm 82:6473597d706e 3385 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 3386 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 3387 */
bogdanm 82:6473597d706e 3388 //@{
bogdanm 82:6473597d706e 3389 #define BP_AIPS_PACRD_TP6 (4U) //!< Bit position for AIPS_PACRD_TP6.
bogdanm 82:6473597d706e 3390 #define BM_AIPS_PACRD_TP6 (0x00000010U) //!< Bit mask for AIPS_PACRD_TP6.
bogdanm 82:6473597d706e 3391 #define BS_AIPS_PACRD_TP6 (1U) //!< Bit field size in bits for AIPS_PACRD_TP6.
bogdanm 82:6473597d706e 3392
bogdanm 82:6473597d706e 3393 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3394 //! @brief Read current value of the AIPS_PACRD_TP6 field.
bogdanm 82:6473597d706e 3395 #define BR_AIPS_PACRD_TP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP6))
bogdanm 82:6473597d706e 3396 #endif
bogdanm 82:6473597d706e 3397
bogdanm 82:6473597d706e 3398 //! @brief Format value for bitfield AIPS_PACRD_TP6.
bogdanm 82:6473597d706e 3399 #define BF_AIPS_PACRD_TP6(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRD_TP6), uint32_t) & BM_AIPS_PACRD_TP6)
bogdanm 82:6473597d706e 3400
bogdanm 82:6473597d706e 3401 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3402 //! @brief Set the TP6 field to a new value.
bogdanm 82:6473597d706e 3403 #define BW_AIPS_PACRD_TP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP6) = (v))
bogdanm 82:6473597d706e 3404 #endif
bogdanm 82:6473597d706e 3405 //@}
bogdanm 82:6473597d706e 3406
bogdanm 82:6473597d706e 3407 /*!
bogdanm 82:6473597d706e 3408 * @name Register AIPS_PACRD, field WP6[5] (RW)
bogdanm 82:6473597d706e 3409 *
bogdanm 82:6473597d706e 3410 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 3411 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 3412 * and no peripheral access initiates.
bogdanm 82:6473597d706e 3413 *
bogdanm 82:6473597d706e 3414 * Values:
bogdanm 82:6473597d706e 3415 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 3416 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 3417 */
bogdanm 82:6473597d706e 3418 //@{
bogdanm 82:6473597d706e 3419 #define BP_AIPS_PACRD_WP6 (5U) //!< Bit position for AIPS_PACRD_WP6.
bogdanm 82:6473597d706e 3420 #define BM_AIPS_PACRD_WP6 (0x00000020U) //!< Bit mask for AIPS_PACRD_WP6.
bogdanm 82:6473597d706e 3421 #define BS_AIPS_PACRD_WP6 (1U) //!< Bit field size in bits for AIPS_PACRD_WP6.
bogdanm 82:6473597d706e 3422
bogdanm 82:6473597d706e 3423 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3424 //! @brief Read current value of the AIPS_PACRD_WP6 field.
bogdanm 82:6473597d706e 3425 #define BR_AIPS_PACRD_WP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP6))
bogdanm 82:6473597d706e 3426 #endif
bogdanm 82:6473597d706e 3427
bogdanm 82:6473597d706e 3428 //! @brief Format value for bitfield AIPS_PACRD_WP6.
bogdanm 82:6473597d706e 3429 #define BF_AIPS_PACRD_WP6(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRD_WP6), uint32_t) & BM_AIPS_PACRD_WP6)
bogdanm 82:6473597d706e 3430
bogdanm 82:6473597d706e 3431 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3432 //! @brief Set the WP6 field to a new value.
bogdanm 82:6473597d706e 3433 #define BW_AIPS_PACRD_WP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP6) = (v))
bogdanm 82:6473597d706e 3434 #endif
bogdanm 82:6473597d706e 3435 //@}
bogdanm 82:6473597d706e 3436
bogdanm 82:6473597d706e 3437 /*!
bogdanm 82:6473597d706e 3438 * @name Register AIPS_PACRD, field SP6[6] (RW)
bogdanm 82:6473597d706e 3439 *
bogdanm 82:6473597d706e 3440 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 3441 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 3442 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 3443 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 3444 * access initiates.
bogdanm 82:6473597d706e 3445 *
bogdanm 82:6473597d706e 3446 * Values:
bogdanm 82:6473597d706e 3447 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 3448 * accesses.
bogdanm 82:6473597d706e 3449 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 3450 */
bogdanm 82:6473597d706e 3451 //@{
bogdanm 82:6473597d706e 3452 #define BP_AIPS_PACRD_SP6 (6U) //!< Bit position for AIPS_PACRD_SP6.
bogdanm 82:6473597d706e 3453 #define BM_AIPS_PACRD_SP6 (0x00000040U) //!< Bit mask for AIPS_PACRD_SP6.
bogdanm 82:6473597d706e 3454 #define BS_AIPS_PACRD_SP6 (1U) //!< Bit field size in bits for AIPS_PACRD_SP6.
bogdanm 82:6473597d706e 3455
bogdanm 82:6473597d706e 3456 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3457 //! @brief Read current value of the AIPS_PACRD_SP6 field.
bogdanm 82:6473597d706e 3458 #define BR_AIPS_PACRD_SP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP6))
bogdanm 82:6473597d706e 3459 #endif
bogdanm 82:6473597d706e 3460
bogdanm 82:6473597d706e 3461 //! @brief Format value for bitfield AIPS_PACRD_SP6.
bogdanm 82:6473597d706e 3462 #define BF_AIPS_PACRD_SP6(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRD_SP6), uint32_t) & BM_AIPS_PACRD_SP6)
bogdanm 82:6473597d706e 3463
bogdanm 82:6473597d706e 3464 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3465 //! @brief Set the SP6 field to a new value.
bogdanm 82:6473597d706e 3466 #define BW_AIPS_PACRD_SP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP6) = (v))
bogdanm 82:6473597d706e 3467 #endif
bogdanm 82:6473597d706e 3468 //@}
bogdanm 82:6473597d706e 3469
bogdanm 82:6473597d706e 3470 /*!
bogdanm 82:6473597d706e 3471 * @name Register AIPS_PACRD, field TP5[8] (RW)
bogdanm 82:6473597d706e 3472 *
bogdanm 82:6473597d706e 3473 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 3474 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 3475 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 3476 *
bogdanm 82:6473597d706e 3477 * Values:
bogdanm 82:6473597d706e 3478 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 3479 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 3480 */
bogdanm 82:6473597d706e 3481 //@{
bogdanm 82:6473597d706e 3482 #define BP_AIPS_PACRD_TP5 (8U) //!< Bit position for AIPS_PACRD_TP5.
bogdanm 82:6473597d706e 3483 #define BM_AIPS_PACRD_TP5 (0x00000100U) //!< Bit mask for AIPS_PACRD_TP5.
bogdanm 82:6473597d706e 3484 #define BS_AIPS_PACRD_TP5 (1U) //!< Bit field size in bits for AIPS_PACRD_TP5.
bogdanm 82:6473597d706e 3485
bogdanm 82:6473597d706e 3486 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3487 //! @brief Read current value of the AIPS_PACRD_TP5 field.
bogdanm 82:6473597d706e 3488 #define BR_AIPS_PACRD_TP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP5))
bogdanm 82:6473597d706e 3489 #endif
bogdanm 82:6473597d706e 3490
bogdanm 82:6473597d706e 3491 //! @brief Format value for bitfield AIPS_PACRD_TP5.
bogdanm 82:6473597d706e 3492 #define BF_AIPS_PACRD_TP5(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRD_TP5), uint32_t) & BM_AIPS_PACRD_TP5)
bogdanm 82:6473597d706e 3493
bogdanm 82:6473597d706e 3494 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3495 //! @brief Set the TP5 field to a new value.
bogdanm 82:6473597d706e 3496 #define BW_AIPS_PACRD_TP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP5) = (v))
bogdanm 82:6473597d706e 3497 #endif
bogdanm 82:6473597d706e 3498 //@}
bogdanm 82:6473597d706e 3499
bogdanm 82:6473597d706e 3500 /*!
bogdanm 82:6473597d706e 3501 * @name Register AIPS_PACRD, field WP5[9] (RW)
bogdanm 82:6473597d706e 3502 *
bogdanm 82:6473597d706e 3503 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 3504 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 3505 * and no peripheral access initiates.
bogdanm 82:6473597d706e 3506 *
bogdanm 82:6473597d706e 3507 * Values:
bogdanm 82:6473597d706e 3508 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 3509 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 3510 */
bogdanm 82:6473597d706e 3511 //@{
bogdanm 82:6473597d706e 3512 #define BP_AIPS_PACRD_WP5 (9U) //!< Bit position for AIPS_PACRD_WP5.
bogdanm 82:6473597d706e 3513 #define BM_AIPS_PACRD_WP5 (0x00000200U) //!< Bit mask for AIPS_PACRD_WP5.
bogdanm 82:6473597d706e 3514 #define BS_AIPS_PACRD_WP5 (1U) //!< Bit field size in bits for AIPS_PACRD_WP5.
bogdanm 82:6473597d706e 3515
bogdanm 82:6473597d706e 3516 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3517 //! @brief Read current value of the AIPS_PACRD_WP5 field.
bogdanm 82:6473597d706e 3518 #define BR_AIPS_PACRD_WP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP5))
bogdanm 82:6473597d706e 3519 #endif
bogdanm 82:6473597d706e 3520
bogdanm 82:6473597d706e 3521 //! @brief Format value for bitfield AIPS_PACRD_WP5.
bogdanm 82:6473597d706e 3522 #define BF_AIPS_PACRD_WP5(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRD_WP5), uint32_t) & BM_AIPS_PACRD_WP5)
bogdanm 82:6473597d706e 3523
bogdanm 82:6473597d706e 3524 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3525 //! @brief Set the WP5 field to a new value.
bogdanm 82:6473597d706e 3526 #define BW_AIPS_PACRD_WP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP5) = (v))
bogdanm 82:6473597d706e 3527 #endif
bogdanm 82:6473597d706e 3528 //@}
bogdanm 82:6473597d706e 3529
bogdanm 82:6473597d706e 3530 /*!
bogdanm 82:6473597d706e 3531 * @name Register AIPS_PACRD, field SP5[10] (RW)
bogdanm 82:6473597d706e 3532 *
bogdanm 82:6473597d706e 3533 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 3534 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 3535 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 3536 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 3537 * access initiates.
bogdanm 82:6473597d706e 3538 *
bogdanm 82:6473597d706e 3539 * Values:
bogdanm 82:6473597d706e 3540 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 3541 * accesses.
bogdanm 82:6473597d706e 3542 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 3543 */
bogdanm 82:6473597d706e 3544 //@{
bogdanm 82:6473597d706e 3545 #define BP_AIPS_PACRD_SP5 (10U) //!< Bit position for AIPS_PACRD_SP5.
bogdanm 82:6473597d706e 3546 #define BM_AIPS_PACRD_SP5 (0x00000400U) //!< Bit mask for AIPS_PACRD_SP5.
bogdanm 82:6473597d706e 3547 #define BS_AIPS_PACRD_SP5 (1U) //!< Bit field size in bits for AIPS_PACRD_SP5.
bogdanm 82:6473597d706e 3548
bogdanm 82:6473597d706e 3549 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3550 //! @brief Read current value of the AIPS_PACRD_SP5 field.
bogdanm 82:6473597d706e 3551 #define BR_AIPS_PACRD_SP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP5))
bogdanm 82:6473597d706e 3552 #endif
bogdanm 82:6473597d706e 3553
bogdanm 82:6473597d706e 3554 //! @brief Format value for bitfield AIPS_PACRD_SP5.
bogdanm 82:6473597d706e 3555 #define BF_AIPS_PACRD_SP5(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRD_SP5), uint32_t) & BM_AIPS_PACRD_SP5)
bogdanm 82:6473597d706e 3556
bogdanm 82:6473597d706e 3557 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3558 //! @brief Set the SP5 field to a new value.
bogdanm 82:6473597d706e 3559 #define BW_AIPS_PACRD_SP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP5) = (v))
bogdanm 82:6473597d706e 3560 #endif
bogdanm 82:6473597d706e 3561 //@}
bogdanm 82:6473597d706e 3562
bogdanm 82:6473597d706e 3563 /*!
bogdanm 82:6473597d706e 3564 * @name Register AIPS_PACRD, field TP4[12] (RW)
bogdanm 82:6473597d706e 3565 *
bogdanm 82:6473597d706e 3566 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 3567 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 3568 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 3569 *
bogdanm 82:6473597d706e 3570 * Values:
bogdanm 82:6473597d706e 3571 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 3572 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 3573 */
bogdanm 82:6473597d706e 3574 //@{
bogdanm 82:6473597d706e 3575 #define BP_AIPS_PACRD_TP4 (12U) //!< Bit position for AIPS_PACRD_TP4.
bogdanm 82:6473597d706e 3576 #define BM_AIPS_PACRD_TP4 (0x00001000U) //!< Bit mask for AIPS_PACRD_TP4.
bogdanm 82:6473597d706e 3577 #define BS_AIPS_PACRD_TP4 (1U) //!< Bit field size in bits for AIPS_PACRD_TP4.
bogdanm 82:6473597d706e 3578
bogdanm 82:6473597d706e 3579 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3580 //! @brief Read current value of the AIPS_PACRD_TP4 field.
bogdanm 82:6473597d706e 3581 #define BR_AIPS_PACRD_TP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP4))
bogdanm 82:6473597d706e 3582 #endif
bogdanm 82:6473597d706e 3583
bogdanm 82:6473597d706e 3584 //! @brief Format value for bitfield AIPS_PACRD_TP4.
bogdanm 82:6473597d706e 3585 #define BF_AIPS_PACRD_TP4(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRD_TP4), uint32_t) & BM_AIPS_PACRD_TP4)
bogdanm 82:6473597d706e 3586
bogdanm 82:6473597d706e 3587 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3588 //! @brief Set the TP4 field to a new value.
bogdanm 82:6473597d706e 3589 #define BW_AIPS_PACRD_TP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP4) = (v))
bogdanm 82:6473597d706e 3590 #endif
bogdanm 82:6473597d706e 3591 //@}
bogdanm 82:6473597d706e 3592
bogdanm 82:6473597d706e 3593 /*!
bogdanm 82:6473597d706e 3594 * @name Register AIPS_PACRD, field WP4[13] (RW)
bogdanm 82:6473597d706e 3595 *
bogdanm 82:6473597d706e 3596 * Determines whether the peripheral allows write accesss. When this bit is set
bogdanm 82:6473597d706e 3597 * and a write access is attempted, access terminates with an error response and
bogdanm 82:6473597d706e 3598 * no peripheral access initiates.
bogdanm 82:6473597d706e 3599 *
bogdanm 82:6473597d706e 3600 * Values:
bogdanm 82:6473597d706e 3601 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 3602 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 3603 */
bogdanm 82:6473597d706e 3604 //@{
bogdanm 82:6473597d706e 3605 #define BP_AIPS_PACRD_WP4 (13U) //!< Bit position for AIPS_PACRD_WP4.
bogdanm 82:6473597d706e 3606 #define BM_AIPS_PACRD_WP4 (0x00002000U) //!< Bit mask for AIPS_PACRD_WP4.
bogdanm 82:6473597d706e 3607 #define BS_AIPS_PACRD_WP4 (1U) //!< Bit field size in bits for AIPS_PACRD_WP4.
bogdanm 82:6473597d706e 3608
bogdanm 82:6473597d706e 3609 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3610 //! @brief Read current value of the AIPS_PACRD_WP4 field.
bogdanm 82:6473597d706e 3611 #define BR_AIPS_PACRD_WP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP4))
bogdanm 82:6473597d706e 3612 #endif
bogdanm 82:6473597d706e 3613
bogdanm 82:6473597d706e 3614 //! @brief Format value for bitfield AIPS_PACRD_WP4.
bogdanm 82:6473597d706e 3615 #define BF_AIPS_PACRD_WP4(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRD_WP4), uint32_t) & BM_AIPS_PACRD_WP4)
bogdanm 82:6473597d706e 3616
bogdanm 82:6473597d706e 3617 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3618 //! @brief Set the WP4 field to a new value.
bogdanm 82:6473597d706e 3619 #define BW_AIPS_PACRD_WP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP4) = (v))
bogdanm 82:6473597d706e 3620 #endif
bogdanm 82:6473597d706e 3621 //@}
bogdanm 82:6473597d706e 3622
bogdanm 82:6473597d706e 3623 /*!
bogdanm 82:6473597d706e 3624 * @name Register AIPS_PACRD, field SP4[14] (RW)
bogdanm 82:6473597d706e 3625 *
bogdanm 82:6473597d706e 3626 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 3627 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 3628 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 3629 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 3630 * access initiates.
bogdanm 82:6473597d706e 3631 *
bogdanm 82:6473597d706e 3632 * Values:
bogdanm 82:6473597d706e 3633 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 3634 * accesses.
bogdanm 82:6473597d706e 3635 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 3636 */
bogdanm 82:6473597d706e 3637 //@{
bogdanm 82:6473597d706e 3638 #define BP_AIPS_PACRD_SP4 (14U) //!< Bit position for AIPS_PACRD_SP4.
bogdanm 82:6473597d706e 3639 #define BM_AIPS_PACRD_SP4 (0x00004000U) //!< Bit mask for AIPS_PACRD_SP4.
bogdanm 82:6473597d706e 3640 #define BS_AIPS_PACRD_SP4 (1U) //!< Bit field size in bits for AIPS_PACRD_SP4.
bogdanm 82:6473597d706e 3641
bogdanm 82:6473597d706e 3642 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3643 //! @brief Read current value of the AIPS_PACRD_SP4 field.
bogdanm 82:6473597d706e 3644 #define BR_AIPS_PACRD_SP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP4))
bogdanm 82:6473597d706e 3645 #endif
bogdanm 82:6473597d706e 3646
bogdanm 82:6473597d706e 3647 //! @brief Format value for bitfield AIPS_PACRD_SP4.
bogdanm 82:6473597d706e 3648 #define BF_AIPS_PACRD_SP4(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRD_SP4), uint32_t) & BM_AIPS_PACRD_SP4)
bogdanm 82:6473597d706e 3649
bogdanm 82:6473597d706e 3650 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3651 //! @brief Set the SP4 field to a new value.
bogdanm 82:6473597d706e 3652 #define BW_AIPS_PACRD_SP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP4) = (v))
bogdanm 82:6473597d706e 3653 #endif
bogdanm 82:6473597d706e 3654 //@}
bogdanm 82:6473597d706e 3655
bogdanm 82:6473597d706e 3656 /*!
bogdanm 82:6473597d706e 3657 * @name Register AIPS_PACRD, field TP3[16] (RW)
bogdanm 82:6473597d706e 3658 *
bogdanm 82:6473597d706e 3659 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 3660 * When this bit is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 3661 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 3662 *
bogdanm 82:6473597d706e 3663 * Values:
bogdanm 82:6473597d706e 3664 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 3665 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 3666 */
bogdanm 82:6473597d706e 3667 //@{
bogdanm 82:6473597d706e 3668 #define BP_AIPS_PACRD_TP3 (16U) //!< Bit position for AIPS_PACRD_TP3.
bogdanm 82:6473597d706e 3669 #define BM_AIPS_PACRD_TP3 (0x00010000U) //!< Bit mask for AIPS_PACRD_TP3.
bogdanm 82:6473597d706e 3670 #define BS_AIPS_PACRD_TP3 (1U) //!< Bit field size in bits for AIPS_PACRD_TP3.
bogdanm 82:6473597d706e 3671
bogdanm 82:6473597d706e 3672 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3673 //! @brief Read current value of the AIPS_PACRD_TP3 field.
bogdanm 82:6473597d706e 3674 #define BR_AIPS_PACRD_TP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP3))
bogdanm 82:6473597d706e 3675 #endif
bogdanm 82:6473597d706e 3676
bogdanm 82:6473597d706e 3677 //! @brief Format value for bitfield AIPS_PACRD_TP3.
bogdanm 82:6473597d706e 3678 #define BF_AIPS_PACRD_TP3(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRD_TP3), uint32_t) & BM_AIPS_PACRD_TP3)
bogdanm 82:6473597d706e 3679
bogdanm 82:6473597d706e 3680 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3681 //! @brief Set the TP3 field to a new value.
bogdanm 82:6473597d706e 3682 #define BW_AIPS_PACRD_TP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP3) = (v))
bogdanm 82:6473597d706e 3683 #endif
bogdanm 82:6473597d706e 3684 //@}
bogdanm 82:6473597d706e 3685
bogdanm 82:6473597d706e 3686 /*!
bogdanm 82:6473597d706e 3687 * @name Register AIPS_PACRD, field WP3[17] (RW)
bogdanm 82:6473597d706e 3688 *
bogdanm 82:6473597d706e 3689 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 3690 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 3691 * and no peripheral access initiates.
bogdanm 82:6473597d706e 3692 *
bogdanm 82:6473597d706e 3693 * Values:
bogdanm 82:6473597d706e 3694 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 3695 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 3696 */
bogdanm 82:6473597d706e 3697 //@{
bogdanm 82:6473597d706e 3698 #define BP_AIPS_PACRD_WP3 (17U) //!< Bit position for AIPS_PACRD_WP3.
bogdanm 82:6473597d706e 3699 #define BM_AIPS_PACRD_WP3 (0x00020000U) //!< Bit mask for AIPS_PACRD_WP3.
bogdanm 82:6473597d706e 3700 #define BS_AIPS_PACRD_WP3 (1U) //!< Bit field size in bits for AIPS_PACRD_WP3.
bogdanm 82:6473597d706e 3701
bogdanm 82:6473597d706e 3702 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3703 //! @brief Read current value of the AIPS_PACRD_WP3 field.
bogdanm 82:6473597d706e 3704 #define BR_AIPS_PACRD_WP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP3))
bogdanm 82:6473597d706e 3705 #endif
bogdanm 82:6473597d706e 3706
bogdanm 82:6473597d706e 3707 //! @brief Format value for bitfield AIPS_PACRD_WP3.
bogdanm 82:6473597d706e 3708 #define BF_AIPS_PACRD_WP3(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRD_WP3), uint32_t) & BM_AIPS_PACRD_WP3)
bogdanm 82:6473597d706e 3709
bogdanm 82:6473597d706e 3710 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3711 //! @brief Set the WP3 field to a new value.
bogdanm 82:6473597d706e 3712 #define BW_AIPS_PACRD_WP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP3) = (v))
bogdanm 82:6473597d706e 3713 #endif
bogdanm 82:6473597d706e 3714 //@}
bogdanm 82:6473597d706e 3715
bogdanm 82:6473597d706e 3716 /*!
bogdanm 82:6473597d706e 3717 * @name Register AIPS_PACRD, field SP3[18] (RW)
bogdanm 82:6473597d706e 3718 *
bogdanm 82:6473597d706e 3719 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 3720 * access. When this bit is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 3721 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
bogdanm 82:6473597d706e 3722 * set. If not, access terminates with an error response and no peripheral access
bogdanm 82:6473597d706e 3723 * initiates.
bogdanm 82:6473597d706e 3724 *
bogdanm 82:6473597d706e 3725 * Values:
bogdanm 82:6473597d706e 3726 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 3727 * accesses.
bogdanm 82:6473597d706e 3728 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 3729 */
bogdanm 82:6473597d706e 3730 //@{
bogdanm 82:6473597d706e 3731 #define BP_AIPS_PACRD_SP3 (18U) //!< Bit position for AIPS_PACRD_SP3.
bogdanm 82:6473597d706e 3732 #define BM_AIPS_PACRD_SP3 (0x00040000U) //!< Bit mask for AIPS_PACRD_SP3.
bogdanm 82:6473597d706e 3733 #define BS_AIPS_PACRD_SP3 (1U) //!< Bit field size in bits for AIPS_PACRD_SP3.
bogdanm 82:6473597d706e 3734
bogdanm 82:6473597d706e 3735 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3736 //! @brief Read current value of the AIPS_PACRD_SP3 field.
bogdanm 82:6473597d706e 3737 #define BR_AIPS_PACRD_SP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP3))
bogdanm 82:6473597d706e 3738 #endif
bogdanm 82:6473597d706e 3739
bogdanm 82:6473597d706e 3740 //! @brief Format value for bitfield AIPS_PACRD_SP3.
bogdanm 82:6473597d706e 3741 #define BF_AIPS_PACRD_SP3(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRD_SP3), uint32_t) & BM_AIPS_PACRD_SP3)
bogdanm 82:6473597d706e 3742
bogdanm 82:6473597d706e 3743 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3744 //! @brief Set the SP3 field to a new value.
bogdanm 82:6473597d706e 3745 #define BW_AIPS_PACRD_SP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP3) = (v))
bogdanm 82:6473597d706e 3746 #endif
bogdanm 82:6473597d706e 3747 //@}
bogdanm 82:6473597d706e 3748
bogdanm 82:6473597d706e 3749 /*!
bogdanm 82:6473597d706e 3750 * @name Register AIPS_PACRD, field TP2[20] (RW)
bogdanm 82:6473597d706e 3751 *
bogdanm 82:6473597d706e 3752 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 3753 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 3754 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 3755 *
bogdanm 82:6473597d706e 3756 * Values:
bogdanm 82:6473597d706e 3757 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 3758 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 3759 */
bogdanm 82:6473597d706e 3760 //@{
bogdanm 82:6473597d706e 3761 #define BP_AIPS_PACRD_TP2 (20U) //!< Bit position for AIPS_PACRD_TP2.
bogdanm 82:6473597d706e 3762 #define BM_AIPS_PACRD_TP2 (0x00100000U) //!< Bit mask for AIPS_PACRD_TP2.
bogdanm 82:6473597d706e 3763 #define BS_AIPS_PACRD_TP2 (1U) //!< Bit field size in bits for AIPS_PACRD_TP2.
bogdanm 82:6473597d706e 3764
bogdanm 82:6473597d706e 3765 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3766 //! @brief Read current value of the AIPS_PACRD_TP2 field.
bogdanm 82:6473597d706e 3767 #define BR_AIPS_PACRD_TP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP2))
bogdanm 82:6473597d706e 3768 #endif
bogdanm 82:6473597d706e 3769
bogdanm 82:6473597d706e 3770 //! @brief Format value for bitfield AIPS_PACRD_TP2.
bogdanm 82:6473597d706e 3771 #define BF_AIPS_PACRD_TP2(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRD_TP2), uint32_t) & BM_AIPS_PACRD_TP2)
bogdanm 82:6473597d706e 3772
bogdanm 82:6473597d706e 3773 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3774 //! @brief Set the TP2 field to a new value.
bogdanm 82:6473597d706e 3775 #define BW_AIPS_PACRD_TP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP2) = (v))
bogdanm 82:6473597d706e 3776 #endif
bogdanm 82:6473597d706e 3777 //@}
bogdanm 82:6473597d706e 3778
bogdanm 82:6473597d706e 3779 /*!
bogdanm 82:6473597d706e 3780 * @name Register AIPS_PACRD, field WP2[21] (RW)
bogdanm 82:6473597d706e 3781 *
bogdanm 82:6473597d706e 3782 * Determines whether the peripheral allows write accesss. When this bit is set
bogdanm 82:6473597d706e 3783 * and a write access is attempted, access terminates with an error response and
bogdanm 82:6473597d706e 3784 * no peripheral access initiates.
bogdanm 82:6473597d706e 3785 *
bogdanm 82:6473597d706e 3786 * Values:
bogdanm 82:6473597d706e 3787 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 3788 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 3789 */
bogdanm 82:6473597d706e 3790 //@{
bogdanm 82:6473597d706e 3791 #define BP_AIPS_PACRD_WP2 (21U) //!< Bit position for AIPS_PACRD_WP2.
bogdanm 82:6473597d706e 3792 #define BM_AIPS_PACRD_WP2 (0x00200000U) //!< Bit mask for AIPS_PACRD_WP2.
bogdanm 82:6473597d706e 3793 #define BS_AIPS_PACRD_WP2 (1U) //!< Bit field size in bits for AIPS_PACRD_WP2.
bogdanm 82:6473597d706e 3794
bogdanm 82:6473597d706e 3795 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3796 //! @brief Read current value of the AIPS_PACRD_WP2 field.
bogdanm 82:6473597d706e 3797 #define BR_AIPS_PACRD_WP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP2))
bogdanm 82:6473597d706e 3798 #endif
bogdanm 82:6473597d706e 3799
bogdanm 82:6473597d706e 3800 //! @brief Format value for bitfield AIPS_PACRD_WP2.
bogdanm 82:6473597d706e 3801 #define BF_AIPS_PACRD_WP2(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRD_WP2), uint32_t) & BM_AIPS_PACRD_WP2)
bogdanm 82:6473597d706e 3802
bogdanm 82:6473597d706e 3803 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3804 //! @brief Set the WP2 field to a new value.
bogdanm 82:6473597d706e 3805 #define BW_AIPS_PACRD_WP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP2) = (v))
bogdanm 82:6473597d706e 3806 #endif
bogdanm 82:6473597d706e 3807 //@}
bogdanm 82:6473597d706e 3808
bogdanm 82:6473597d706e 3809 /*!
bogdanm 82:6473597d706e 3810 * @name Register AIPS_PACRD, field SP2[22] (RW)
bogdanm 82:6473597d706e 3811 *
bogdanm 82:6473597d706e 3812 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 3813 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 3814 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 3815 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 3816 * access initiates.
bogdanm 82:6473597d706e 3817 *
bogdanm 82:6473597d706e 3818 * Values:
bogdanm 82:6473597d706e 3819 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 3820 * accesses.
bogdanm 82:6473597d706e 3821 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 3822 */
bogdanm 82:6473597d706e 3823 //@{
bogdanm 82:6473597d706e 3824 #define BP_AIPS_PACRD_SP2 (22U) //!< Bit position for AIPS_PACRD_SP2.
bogdanm 82:6473597d706e 3825 #define BM_AIPS_PACRD_SP2 (0x00400000U) //!< Bit mask for AIPS_PACRD_SP2.
bogdanm 82:6473597d706e 3826 #define BS_AIPS_PACRD_SP2 (1U) //!< Bit field size in bits for AIPS_PACRD_SP2.
bogdanm 82:6473597d706e 3827
bogdanm 82:6473597d706e 3828 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3829 //! @brief Read current value of the AIPS_PACRD_SP2 field.
bogdanm 82:6473597d706e 3830 #define BR_AIPS_PACRD_SP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP2))
bogdanm 82:6473597d706e 3831 #endif
bogdanm 82:6473597d706e 3832
bogdanm 82:6473597d706e 3833 //! @brief Format value for bitfield AIPS_PACRD_SP2.
bogdanm 82:6473597d706e 3834 #define BF_AIPS_PACRD_SP2(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRD_SP2), uint32_t) & BM_AIPS_PACRD_SP2)
bogdanm 82:6473597d706e 3835
bogdanm 82:6473597d706e 3836 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3837 //! @brief Set the SP2 field to a new value.
bogdanm 82:6473597d706e 3838 #define BW_AIPS_PACRD_SP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP2) = (v))
bogdanm 82:6473597d706e 3839 #endif
bogdanm 82:6473597d706e 3840 //@}
bogdanm 82:6473597d706e 3841
bogdanm 82:6473597d706e 3842 /*!
bogdanm 82:6473597d706e 3843 * @name Register AIPS_PACRD, field TP1[24] (RW)
bogdanm 82:6473597d706e 3844 *
bogdanm 82:6473597d706e 3845 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 3846 * When this bit is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 3847 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 3848 *
bogdanm 82:6473597d706e 3849 * Values:
bogdanm 82:6473597d706e 3850 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 3851 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 3852 */
bogdanm 82:6473597d706e 3853 //@{
bogdanm 82:6473597d706e 3854 #define BP_AIPS_PACRD_TP1 (24U) //!< Bit position for AIPS_PACRD_TP1.
bogdanm 82:6473597d706e 3855 #define BM_AIPS_PACRD_TP1 (0x01000000U) //!< Bit mask for AIPS_PACRD_TP1.
bogdanm 82:6473597d706e 3856 #define BS_AIPS_PACRD_TP1 (1U) //!< Bit field size in bits for AIPS_PACRD_TP1.
bogdanm 82:6473597d706e 3857
bogdanm 82:6473597d706e 3858 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3859 //! @brief Read current value of the AIPS_PACRD_TP1 field.
bogdanm 82:6473597d706e 3860 #define BR_AIPS_PACRD_TP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP1))
bogdanm 82:6473597d706e 3861 #endif
bogdanm 82:6473597d706e 3862
bogdanm 82:6473597d706e 3863 //! @brief Format value for bitfield AIPS_PACRD_TP1.
bogdanm 82:6473597d706e 3864 #define BF_AIPS_PACRD_TP1(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRD_TP1), uint32_t) & BM_AIPS_PACRD_TP1)
bogdanm 82:6473597d706e 3865
bogdanm 82:6473597d706e 3866 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3867 //! @brief Set the TP1 field to a new value.
bogdanm 82:6473597d706e 3868 #define BW_AIPS_PACRD_TP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP1) = (v))
bogdanm 82:6473597d706e 3869 #endif
bogdanm 82:6473597d706e 3870 //@}
bogdanm 82:6473597d706e 3871
bogdanm 82:6473597d706e 3872 /*!
bogdanm 82:6473597d706e 3873 * @name Register AIPS_PACRD, field WP1[25] (RW)
bogdanm 82:6473597d706e 3874 *
bogdanm 82:6473597d706e 3875 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 3876 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 3877 * and no peripheral access initiates.
bogdanm 82:6473597d706e 3878 *
bogdanm 82:6473597d706e 3879 * Values:
bogdanm 82:6473597d706e 3880 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 3881 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 3882 */
bogdanm 82:6473597d706e 3883 //@{
bogdanm 82:6473597d706e 3884 #define BP_AIPS_PACRD_WP1 (25U) //!< Bit position for AIPS_PACRD_WP1.
bogdanm 82:6473597d706e 3885 #define BM_AIPS_PACRD_WP1 (0x02000000U) //!< Bit mask for AIPS_PACRD_WP1.
bogdanm 82:6473597d706e 3886 #define BS_AIPS_PACRD_WP1 (1U) //!< Bit field size in bits for AIPS_PACRD_WP1.
bogdanm 82:6473597d706e 3887
bogdanm 82:6473597d706e 3888 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3889 //! @brief Read current value of the AIPS_PACRD_WP1 field.
bogdanm 82:6473597d706e 3890 #define BR_AIPS_PACRD_WP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP1))
bogdanm 82:6473597d706e 3891 #endif
bogdanm 82:6473597d706e 3892
bogdanm 82:6473597d706e 3893 //! @brief Format value for bitfield AIPS_PACRD_WP1.
bogdanm 82:6473597d706e 3894 #define BF_AIPS_PACRD_WP1(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRD_WP1), uint32_t) & BM_AIPS_PACRD_WP1)
bogdanm 82:6473597d706e 3895
bogdanm 82:6473597d706e 3896 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3897 //! @brief Set the WP1 field to a new value.
bogdanm 82:6473597d706e 3898 #define BW_AIPS_PACRD_WP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP1) = (v))
bogdanm 82:6473597d706e 3899 #endif
bogdanm 82:6473597d706e 3900 //@}
bogdanm 82:6473597d706e 3901
bogdanm 82:6473597d706e 3902 /*!
bogdanm 82:6473597d706e 3903 * @name Register AIPS_PACRD, field SP1[26] (RW)
bogdanm 82:6473597d706e 3904 *
bogdanm 82:6473597d706e 3905 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 3906 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 3907 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 3908 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 3909 * access initiates.
bogdanm 82:6473597d706e 3910 *
bogdanm 82:6473597d706e 3911 * Values:
bogdanm 82:6473597d706e 3912 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 3913 * accesses.
bogdanm 82:6473597d706e 3914 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 3915 */
bogdanm 82:6473597d706e 3916 //@{
bogdanm 82:6473597d706e 3917 #define BP_AIPS_PACRD_SP1 (26U) //!< Bit position for AIPS_PACRD_SP1.
bogdanm 82:6473597d706e 3918 #define BM_AIPS_PACRD_SP1 (0x04000000U) //!< Bit mask for AIPS_PACRD_SP1.
bogdanm 82:6473597d706e 3919 #define BS_AIPS_PACRD_SP1 (1U) //!< Bit field size in bits for AIPS_PACRD_SP1.
bogdanm 82:6473597d706e 3920
bogdanm 82:6473597d706e 3921 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3922 //! @brief Read current value of the AIPS_PACRD_SP1 field.
bogdanm 82:6473597d706e 3923 #define BR_AIPS_PACRD_SP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP1))
bogdanm 82:6473597d706e 3924 #endif
bogdanm 82:6473597d706e 3925
bogdanm 82:6473597d706e 3926 //! @brief Format value for bitfield AIPS_PACRD_SP1.
bogdanm 82:6473597d706e 3927 #define BF_AIPS_PACRD_SP1(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRD_SP1), uint32_t) & BM_AIPS_PACRD_SP1)
bogdanm 82:6473597d706e 3928
bogdanm 82:6473597d706e 3929 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3930 //! @brief Set the SP1 field to a new value.
bogdanm 82:6473597d706e 3931 #define BW_AIPS_PACRD_SP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP1) = (v))
bogdanm 82:6473597d706e 3932 #endif
bogdanm 82:6473597d706e 3933 //@}
bogdanm 82:6473597d706e 3934
bogdanm 82:6473597d706e 3935 /*!
bogdanm 82:6473597d706e 3936 * @name Register AIPS_PACRD, field TP0[28] (RW)
bogdanm 82:6473597d706e 3937 *
bogdanm 82:6473597d706e 3938 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 3939 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 3940 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 3941 *
bogdanm 82:6473597d706e 3942 * Values:
bogdanm 82:6473597d706e 3943 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 3944 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 3945 */
bogdanm 82:6473597d706e 3946 //@{
bogdanm 82:6473597d706e 3947 #define BP_AIPS_PACRD_TP0 (28U) //!< Bit position for AIPS_PACRD_TP0.
bogdanm 82:6473597d706e 3948 #define BM_AIPS_PACRD_TP0 (0x10000000U) //!< Bit mask for AIPS_PACRD_TP0.
bogdanm 82:6473597d706e 3949 #define BS_AIPS_PACRD_TP0 (1U) //!< Bit field size in bits for AIPS_PACRD_TP0.
bogdanm 82:6473597d706e 3950
bogdanm 82:6473597d706e 3951 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3952 //! @brief Read current value of the AIPS_PACRD_TP0 field.
bogdanm 82:6473597d706e 3953 #define BR_AIPS_PACRD_TP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP0))
bogdanm 82:6473597d706e 3954 #endif
bogdanm 82:6473597d706e 3955
bogdanm 82:6473597d706e 3956 //! @brief Format value for bitfield AIPS_PACRD_TP0.
bogdanm 82:6473597d706e 3957 #define BF_AIPS_PACRD_TP0(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRD_TP0), uint32_t) & BM_AIPS_PACRD_TP0)
bogdanm 82:6473597d706e 3958
bogdanm 82:6473597d706e 3959 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3960 //! @brief Set the TP0 field to a new value.
bogdanm 82:6473597d706e 3961 #define BW_AIPS_PACRD_TP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_TP0) = (v))
bogdanm 82:6473597d706e 3962 #endif
bogdanm 82:6473597d706e 3963 //@}
bogdanm 82:6473597d706e 3964
bogdanm 82:6473597d706e 3965 /*!
bogdanm 82:6473597d706e 3966 * @name Register AIPS_PACRD, field WP0[29] (RW)
bogdanm 82:6473597d706e 3967 *
bogdanm 82:6473597d706e 3968 * Determines whether the peripheral allows write accesss. When this bit is set
bogdanm 82:6473597d706e 3969 * and a write access is attempted, access terminates with an error response and
bogdanm 82:6473597d706e 3970 * no peripheral access initiates.
bogdanm 82:6473597d706e 3971 *
bogdanm 82:6473597d706e 3972 * Values:
bogdanm 82:6473597d706e 3973 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 3974 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 3975 */
bogdanm 82:6473597d706e 3976 //@{
bogdanm 82:6473597d706e 3977 #define BP_AIPS_PACRD_WP0 (29U) //!< Bit position for AIPS_PACRD_WP0.
bogdanm 82:6473597d706e 3978 #define BM_AIPS_PACRD_WP0 (0x20000000U) //!< Bit mask for AIPS_PACRD_WP0.
bogdanm 82:6473597d706e 3979 #define BS_AIPS_PACRD_WP0 (1U) //!< Bit field size in bits for AIPS_PACRD_WP0.
bogdanm 82:6473597d706e 3980
bogdanm 82:6473597d706e 3981 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3982 //! @brief Read current value of the AIPS_PACRD_WP0 field.
bogdanm 82:6473597d706e 3983 #define BR_AIPS_PACRD_WP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP0))
bogdanm 82:6473597d706e 3984 #endif
bogdanm 82:6473597d706e 3985
bogdanm 82:6473597d706e 3986 //! @brief Format value for bitfield AIPS_PACRD_WP0.
bogdanm 82:6473597d706e 3987 #define BF_AIPS_PACRD_WP0(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRD_WP0), uint32_t) & BM_AIPS_PACRD_WP0)
bogdanm 82:6473597d706e 3988
bogdanm 82:6473597d706e 3989 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 3990 //! @brief Set the WP0 field to a new value.
bogdanm 82:6473597d706e 3991 #define BW_AIPS_PACRD_WP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_WP0) = (v))
bogdanm 82:6473597d706e 3992 #endif
bogdanm 82:6473597d706e 3993 //@}
bogdanm 82:6473597d706e 3994
bogdanm 82:6473597d706e 3995 /*!
bogdanm 82:6473597d706e 3996 * @name Register AIPS_PACRD, field SP0[30] (RW)
bogdanm 82:6473597d706e 3997 *
bogdanm 82:6473597d706e 3998 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 3999 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 4000 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 4001 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 4002 * access initiates.
bogdanm 82:6473597d706e 4003 *
bogdanm 82:6473597d706e 4004 * Values:
bogdanm 82:6473597d706e 4005 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 4006 * accesses.
bogdanm 82:6473597d706e 4007 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 4008 */
bogdanm 82:6473597d706e 4009 //@{
bogdanm 82:6473597d706e 4010 #define BP_AIPS_PACRD_SP0 (30U) //!< Bit position for AIPS_PACRD_SP0.
bogdanm 82:6473597d706e 4011 #define BM_AIPS_PACRD_SP0 (0x40000000U) //!< Bit mask for AIPS_PACRD_SP0.
bogdanm 82:6473597d706e 4012 #define BS_AIPS_PACRD_SP0 (1U) //!< Bit field size in bits for AIPS_PACRD_SP0.
bogdanm 82:6473597d706e 4013
bogdanm 82:6473597d706e 4014 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4015 //! @brief Read current value of the AIPS_PACRD_SP0 field.
bogdanm 82:6473597d706e 4016 #define BR_AIPS_PACRD_SP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP0))
bogdanm 82:6473597d706e 4017 #endif
bogdanm 82:6473597d706e 4018
bogdanm 82:6473597d706e 4019 //! @brief Format value for bitfield AIPS_PACRD_SP0.
bogdanm 82:6473597d706e 4020 #define BF_AIPS_PACRD_SP0(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRD_SP0), uint32_t) & BM_AIPS_PACRD_SP0)
bogdanm 82:6473597d706e 4021
bogdanm 82:6473597d706e 4022 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4023 //! @brief Set the SP0 field to a new value.
bogdanm 82:6473597d706e 4024 #define BW_AIPS_PACRD_SP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRD_ADDR(x), BP_AIPS_PACRD_SP0) = (v))
bogdanm 82:6473597d706e 4025 #endif
bogdanm 82:6473597d706e 4026 //@}
bogdanm 82:6473597d706e 4027
bogdanm 82:6473597d706e 4028 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 4029 // HW_AIPS_PACRE - Peripheral Access Control Register
bogdanm 82:6473597d706e 4030 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 4031
bogdanm 82:6473597d706e 4032 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4033 /*!
bogdanm 82:6473597d706e 4034 * @brief HW_AIPS_PACRE - Peripheral Access Control Register (RW)
bogdanm 82:6473597d706e 4035 *
bogdanm 82:6473597d706e 4036 * Reset value: 0x44444444U
bogdanm 82:6473597d706e 4037 *
bogdanm 82:6473597d706e 4038 * This section describes PACR registers E-P, which control peripheral slots
bogdanm 82:6473597d706e 4039 * 32-127. See PACRPeripheral Access Control Register for the description of these
bogdanm 82:6473597d706e 4040 * registers.
bogdanm 82:6473597d706e 4041 */
bogdanm 82:6473597d706e 4042 typedef union _hw_aips_pacre
bogdanm 82:6473597d706e 4043 {
bogdanm 82:6473597d706e 4044 uint32_t U;
bogdanm 82:6473597d706e 4045 struct _hw_aips_pacre_bitfields
bogdanm 82:6473597d706e 4046 {
bogdanm 82:6473597d706e 4047 uint32_t TP7 : 1; //!< [0] Trusted Protect
bogdanm 82:6473597d706e 4048 uint32_t WP7 : 1; //!< [1] Write Protect
bogdanm 82:6473597d706e 4049 uint32_t SP7 : 1; //!< [2] Supervisor Protect
bogdanm 82:6473597d706e 4050 uint32_t RESERVED0 : 1; //!< [3]
bogdanm 82:6473597d706e 4051 uint32_t TP6 : 1; //!< [4] Trusted Protect
bogdanm 82:6473597d706e 4052 uint32_t WP6 : 1; //!< [5] Write Protect
bogdanm 82:6473597d706e 4053 uint32_t SP6 : 1; //!< [6] Supervisor Protect
bogdanm 82:6473597d706e 4054 uint32_t RESERVED1 : 1; //!< [7]
bogdanm 82:6473597d706e 4055 uint32_t TP5 : 1; //!< [8] Trusted Protect
bogdanm 82:6473597d706e 4056 uint32_t WP5 : 1; //!< [9] Write Protect
bogdanm 82:6473597d706e 4057 uint32_t SP5 : 1; //!< [10] Supervisor Protect
bogdanm 82:6473597d706e 4058 uint32_t RESERVED2 : 1; //!< [11]
bogdanm 82:6473597d706e 4059 uint32_t TP4 : 1; //!< [12] Trusted Protect
bogdanm 82:6473597d706e 4060 uint32_t WP4 : 1; //!< [13] Write Protect
bogdanm 82:6473597d706e 4061 uint32_t SP4 : 1; //!< [14] Supervisor Protect
bogdanm 82:6473597d706e 4062 uint32_t RESERVED3 : 1; //!< [15]
bogdanm 82:6473597d706e 4063 uint32_t TP3 : 1; //!< [16] Trusted Protect
bogdanm 82:6473597d706e 4064 uint32_t WP3 : 1; //!< [17] Write Protect
bogdanm 82:6473597d706e 4065 uint32_t SP3 : 1; //!< [18] Supervisor Protect
bogdanm 82:6473597d706e 4066 uint32_t RESERVED4 : 1; //!< [19]
bogdanm 82:6473597d706e 4067 uint32_t TP2 : 1; //!< [20] Trusted Protect
bogdanm 82:6473597d706e 4068 uint32_t WP2 : 1; //!< [21] Write Protect
bogdanm 82:6473597d706e 4069 uint32_t SP2 : 1; //!< [22] Supervisor Protect
bogdanm 82:6473597d706e 4070 uint32_t RESERVED5 : 1; //!< [23]
bogdanm 82:6473597d706e 4071 uint32_t TP1 : 1; //!< [24] Trusted Protect
bogdanm 82:6473597d706e 4072 uint32_t WP1 : 1; //!< [25] Write Protect
bogdanm 82:6473597d706e 4073 uint32_t SP1 : 1; //!< [26] Supervisor Protect
bogdanm 82:6473597d706e 4074 uint32_t RESERVED6 : 1; //!< [27]
bogdanm 82:6473597d706e 4075 uint32_t TP0 : 1; //!< [28] Trusted Protect
bogdanm 82:6473597d706e 4076 uint32_t WP0 : 1; //!< [29] Write Protect
bogdanm 82:6473597d706e 4077 uint32_t SP0 : 1; //!< [30] Supervisor Protect
bogdanm 82:6473597d706e 4078 uint32_t RESERVED7 : 1; //!< [31]
bogdanm 82:6473597d706e 4079 } B;
bogdanm 82:6473597d706e 4080 } hw_aips_pacre_t;
bogdanm 82:6473597d706e 4081 #endif
bogdanm 82:6473597d706e 4082
bogdanm 82:6473597d706e 4083 /*!
bogdanm 82:6473597d706e 4084 * @name Constants and macros for entire AIPS_PACRE register
bogdanm 82:6473597d706e 4085 */
bogdanm 82:6473597d706e 4086 //@{
bogdanm 82:6473597d706e 4087 #define HW_AIPS_PACRE_ADDR(x) (REGS_AIPS_BASE(x) + 0x40U)
bogdanm 82:6473597d706e 4088
bogdanm 82:6473597d706e 4089 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4090 #define HW_AIPS_PACRE(x) (*(__IO hw_aips_pacre_t *) HW_AIPS_PACRE_ADDR(x))
bogdanm 82:6473597d706e 4091 #define HW_AIPS_PACRE_RD(x) (HW_AIPS_PACRE(x).U)
bogdanm 82:6473597d706e 4092 #define HW_AIPS_PACRE_WR(x, v) (HW_AIPS_PACRE(x).U = (v))
bogdanm 82:6473597d706e 4093 #define HW_AIPS_PACRE_SET(x, v) (HW_AIPS_PACRE_WR(x, HW_AIPS_PACRE_RD(x) | (v)))
bogdanm 82:6473597d706e 4094 #define HW_AIPS_PACRE_CLR(x, v) (HW_AIPS_PACRE_WR(x, HW_AIPS_PACRE_RD(x) & ~(v)))
bogdanm 82:6473597d706e 4095 #define HW_AIPS_PACRE_TOG(x, v) (HW_AIPS_PACRE_WR(x, HW_AIPS_PACRE_RD(x) ^ (v)))
bogdanm 82:6473597d706e 4096 #endif
bogdanm 82:6473597d706e 4097 //@}
bogdanm 82:6473597d706e 4098
bogdanm 82:6473597d706e 4099 /*
bogdanm 82:6473597d706e 4100 * Constants & macros for individual AIPS_PACRE bitfields
bogdanm 82:6473597d706e 4101 */
bogdanm 82:6473597d706e 4102
bogdanm 82:6473597d706e 4103 /*!
bogdanm 82:6473597d706e 4104 * @name Register AIPS_PACRE, field TP7[0] (RW)
bogdanm 82:6473597d706e 4105 *
bogdanm 82:6473597d706e 4106 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 4107 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 4108 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 4109 *
bogdanm 82:6473597d706e 4110 * Values:
bogdanm 82:6473597d706e 4111 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 4112 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 4113 */
bogdanm 82:6473597d706e 4114 //@{
bogdanm 82:6473597d706e 4115 #define BP_AIPS_PACRE_TP7 (0U) //!< Bit position for AIPS_PACRE_TP7.
bogdanm 82:6473597d706e 4116 #define BM_AIPS_PACRE_TP7 (0x00000001U) //!< Bit mask for AIPS_PACRE_TP7.
bogdanm 82:6473597d706e 4117 #define BS_AIPS_PACRE_TP7 (1U) //!< Bit field size in bits for AIPS_PACRE_TP7.
bogdanm 82:6473597d706e 4118
bogdanm 82:6473597d706e 4119 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4120 //! @brief Read current value of the AIPS_PACRE_TP7 field.
bogdanm 82:6473597d706e 4121 #define BR_AIPS_PACRE_TP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP7))
bogdanm 82:6473597d706e 4122 #endif
bogdanm 82:6473597d706e 4123
bogdanm 82:6473597d706e 4124 //! @brief Format value for bitfield AIPS_PACRE_TP7.
bogdanm 82:6473597d706e 4125 #define BF_AIPS_PACRE_TP7(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRE_TP7), uint32_t) & BM_AIPS_PACRE_TP7)
bogdanm 82:6473597d706e 4126
bogdanm 82:6473597d706e 4127 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4128 //! @brief Set the TP7 field to a new value.
bogdanm 82:6473597d706e 4129 #define BW_AIPS_PACRE_TP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP7) = (v))
bogdanm 82:6473597d706e 4130 #endif
bogdanm 82:6473597d706e 4131 //@}
bogdanm 82:6473597d706e 4132
bogdanm 82:6473597d706e 4133 /*!
bogdanm 82:6473597d706e 4134 * @name Register AIPS_PACRE, field WP7[1] (RW)
bogdanm 82:6473597d706e 4135 *
bogdanm 82:6473597d706e 4136 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 4137 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 4138 * and no peripheral access initiates.
bogdanm 82:6473597d706e 4139 *
bogdanm 82:6473597d706e 4140 * Values:
bogdanm 82:6473597d706e 4141 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 4142 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 4143 */
bogdanm 82:6473597d706e 4144 //@{
bogdanm 82:6473597d706e 4145 #define BP_AIPS_PACRE_WP7 (1U) //!< Bit position for AIPS_PACRE_WP7.
bogdanm 82:6473597d706e 4146 #define BM_AIPS_PACRE_WP7 (0x00000002U) //!< Bit mask for AIPS_PACRE_WP7.
bogdanm 82:6473597d706e 4147 #define BS_AIPS_PACRE_WP7 (1U) //!< Bit field size in bits for AIPS_PACRE_WP7.
bogdanm 82:6473597d706e 4148
bogdanm 82:6473597d706e 4149 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4150 //! @brief Read current value of the AIPS_PACRE_WP7 field.
bogdanm 82:6473597d706e 4151 #define BR_AIPS_PACRE_WP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP7))
bogdanm 82:6473597d706e 4152 #endif
bogdanm 82:6473597d706e 4153
bogdanm 82:6473597d706e 4154 //! @brief Format value for bitfield AIPS_PACRE_WP7.
bogdanm 82:6473597d706e 4155 #define BF_AIPS_PACRE_WP7(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRE_WP7), uint32_t) & BM_AIPS_PACRE_WP7)
bogdanm 82:6473597d706e 4156
bogdanm 82:6473597d706e 4157 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4158 //! @brief Set the WP7 field to a new value.
bogdanm 82:6473597d706e 4159 #define BW_AIPS_PACRE_WP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP7) = (v))
bogdanm 82:6473597d706e 4160 #endif
bogdanm 82:6473597d706e 4161 //@}
bogdanm 82:6473597d706e 4162
bogdanm 82:6473597d706e 4163 /*!
bogdanm 82:6473597d706e 4164 * @name Register AIPS_PACRE, field SP7[2] (RW)
bogdanm 82:6473597d706e 4165 *
bogdanm 82:6473597d706e 4166 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 4167 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 4168 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 4169 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 4170 * access initiates.
bogdanm 82:6473597d706e 4171 *
bogdanm 82:6473597d706e 4172 * Values:
bogdanm 82:6473597d706e 4173 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 4174 * accesses.
bogdanm 82:6473597d706e 4175 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 4176 */
bogdanm 82:6473597d706e 4177 //@{
bogdanm 82:6473597d706e 4178 #define BP_AIPS_PACRE_SP7 (2U) //!< Bit position for AIPS_PACRE_SP7.
bogdanm 82:6473597d706e 4179 #define BM_AIPS_PACRE_SP7 (0x00000004U) //!< Bit mask for AIPS_PACRE_SP7.
bogdanm 82:6473597d706e 4180 #define BS_AIPS_PACRE_SP7 (1U) //!< Bit field size in bits for AIPS_PACRE_SP7.
bogdanm 82:6473597d706e 4181
bogdanm 82:6473597d706e 4182 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4183 //! @brief Read current value of the AIPS_PACRE_SP7 field.
bogdanm 82:6473597d706e 4184 #define BR_AIPS_PACRE_SP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP7))
bogdanm 82:6473597d706e 4185 #endif
bogdanm 82:6473597d706e 4186
bogdanm 82:6473597d706e 4187 //! @brief Format value for bitfield AIPS_PACRE_SP7.
bogdanm 82:6473597d706e 4188 #define BF_AIPS_PACRE_SP7(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRE_SP7), uint32_t) & BM_AIPS_PACRE_SP7)
bogdanm 82:6473597d706e 4189
bogdanm 82:6473597d706e 4190 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4191 //! @brief Set the SP7 field to a new value.
bogdanm 82:6473597d706e 4192 #define BW_AIPS_PACRE_SP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP7) = (v))
bogdanm 82:6473597d706e 4193 #endif
bogdanm 82:6473597d706e 4194 //@}
bogdanm 82:6473597d706e 4195
bogdanm 82:6473597d706e 4196 /*!
bogdanm 82:6473597d706e 4197 * @name Register AIPS_PACRE, field TP6[4] (RW)
bogdanm 82:6473597d706e 4198 *
bogdanm 82:6473597d706e 4199 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 4200 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 4201 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 4202 *
bogdanm 82:6473597d706e 4203 * Values:
bogdanm 82:6473597d706e 4204 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 4205 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 4206 */
bogdanm 82:6473597d706e 4207 //@{
bogdanm 82:6473597d706e 4208 #define BP_AIPS_PACRE_TP6 (4U) //!< Bit position for AIPS_PACRE_TP6.
bogdanm 82:6473597d706e 4209 #define BM_AIPS_PACRE_TP6 (0x00000010U) //!< Bit mask for AIPS_PACRE_TP6.
bogdanm 82:6473597d706e 4210 #define BS_AIPS_PACRE_TP6 (1U) //!< Bit field size in bits for AIPS_PACRE_TP6.
bogdanm 82:6473597d706e 4211
bogdanm 82:6473597d706e 4212 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4213 //! @brief Read current value of the AIPS_PACRE_TP6 field.
bogdanm 82:6473597d706e 4214 #define BR_AIPS_PACRE_TP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP6))
bogdanm 82:6473597d706e 4215 #endif
bogdanm 82:6473597d706e 4216
bogdanm 82:6473597d706e 4217 //! @brief Format value for bitfield AIPS_PACRE_TP6.
bogdanm 82:6473597d706e 4218 #define BF_AIPS_PACRE_TP6(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRE_TP6), uint32_t) & BM_AIPS_PACRE_TP6)
bogdanm 82:6473597d706e 4219
bogdanm 82:6473597d706e 4220 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4221 //! @brief Set the TP6 field to a new value.
bogdanm 82:6473597d706e 4222 #define BW_AIPS_PACRE_TP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP6) = (v))
bogdanm 82:6473597d706e 4223 #endif
bogdanm 82:6473597d706e 4224 //@}
bogdanm 82:6473597d706e 4225
bogdanm 82:6473597d706e 4226 /*!
bogdanm 82:6473597d706e 4227 * @name Register AIPS_PACRE, field WP6[5] (RW)
bogdanm 82:6473597d706e 4228 *
bogdanm 82:6473597d706e 4229 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 4230 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 4231 * and no peripheral access initiates.
bogdanm 82:6473597d706e 4232 *
bogdanm 82:6473597d706e 4233 * Values:
bogdanm 82:6473597d706e 4234 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 4235 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 4236 */
bogdanm 82:6473597d706e 4237 //@{
bogdanm 82:6473597d706e 4238 #define BP_AIPS_PACRE_WP6 (5U) //!< Bit position for AIPS_PACRE_WP6.
bogdanm 82:6473597d706e 4239 #define BM_AIPS_PACRE_WP6 (0x00000020U) //!< Bit mask for AIPS_PACRE_WP6.
bogdanm 82:6473597d706e 4240 #define BS_AIPS_PACRE_WP6 (1U) //!< Bit field size in bits for AIPS_PACRE_WP6.
bogdanm 82:6473597d706e 4241
bogdanm 82:6473597d706e 4242 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4243 //! @brief Read current value of the AIPS_PACRE_WP6 field.
bogdanm 82:6473597d706e 4244 #define BR_AIPS_PACRE_WP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP6))
bogdanm 82:6473597d706e 4245 #endif
bogdanm 82:6473597d706e 4246
bogdanm 82:6473597d706e 4247 //! @brief Format value for bitfield AIPS_PACRE_WP6.
bogdanm 82:6473597d706e 4248 #define BF_AIPS_PACRE_WP6(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRE_WP6), uint32_t) & BM_AIPS_PACRE_WP6)
bogdanm 82:6473597d706e 4249
bogdanm 82:6473597d706e 4250 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4251 //! @brief Set the WP6 field to a new value.
bogdanm 82:6473597d706e 4252 #define BW_AIPS_PACRE_WP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP6) = (v))
bogdanm 82:6473597d706e 4253 #endif
bogdanm 82:6473597d706e 4254 //@}
bogdanm 82:6473597d706e 4255
bogdanm 82:6473597d706e 4256 /*!
bogdanm 82:6473597d706e 4257 * @name Register AIPS_PACRE, field SP6[6] (RW)
bogdanm 82:6473597d706e 4258 *
bogdanm 82:6473597d706e 4259 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 4260 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 4261 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 4262 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 4263 * access initiates.
bogdanm 82:6473597d706e 4264 *
bogdanm 82:6473597d706e 4265 * Values:
bogdanm 82:6473597d706e 4266 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 4267 * accesses.
bogdanm 82:6473597d706e 4268 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 4269 */
bogdanm 82:6473597d706e 4270 //@{
bogdanm 82:6473597d706e 4271 #define BP_AIPS_PACRE_SP6 (6U) //!< Bit position for AIPS_PACRE_SP6.
bogdanm 82:6473597d706e 4272 #define BM_AIPS_PACRE_SP6 (0x00000040U) //!< Bit mask for AIPS_PACRE_SP6.
bogdanm 82:6473597d706e 4273 #define BS_AIPS_PACRE_SP6 (1U) //!< Bit field size in bits for AIPS_PACRE_SP6.
bogdanm 82:6473597d706e 4274
bogdanm 82:6473597d706e 4275 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4276 //! @brief Read current value of the AIPS_PACRE_SP6 field.
bogdanm 82:6473597d706e 4277 #define BR_AIPS_PACRE_SP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP6))
bogdanm 82:6473597d706e 4278 #endif
bogdanm 82:6473597d706e 4279
bogdanm 82:6473597d706e 4280 //! @brief Format value for bitfield AIPS_PACRE_SP6.
bogdanm 82:6473597d706e 4281 #define BF_AIPS_PACRE_SP6(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRE_SP6), uint32_t) & BM_AIPS_PACRE_SP6)
bogdanm 82:6473597d706e 4282
bogdanm 82:6473597d706e 4283 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4284 //! @brief Set the SP6 field to a new value.
bogdanm 82:6473597d706e 4285 #define BW_AIPS_PACRE_SP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP6) = (v))
bogdanm 82:6473597d706e 4286 #endif
bogdanm 82:6473597d706e 4287 //@}
bogdanm 82:6473597d706e 4288
bogdanm 82:6473597d706e 4289 /*!
bogdanm 82:6473597d706e 4290 * @name Register AIPS_PACRE, field TP5[8] (RW)
bogdanm 82:6473597d706e 4291 *
bogdanm 82:6473597d706e 4292 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 4293 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 4294 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 4295 *
bogdanm 82:6473597d706e 4296 * Values:
bogdanm 82:6473597d706e 4297 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 4298 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 4299 */
bogdanm 82:6473597d706e 4300 //@{
bogdanm 82:6473597d706e 4301 #define BP_AIPS_PACRE_TP5 (8U) //!< Bit position for AIPS_PACRE_TP5.
bogdanm 82:6473597d706e 4302 #define BM_AIPS_PACRE_TP5 (0x00000100U) //!< Bit mask for AIPS_PACRE_TP5.
bogdanm 82:6473597d706e 4303 #define BS_AIPS_PACRE_TP5 (1U) //!< Bit field size in bits for AIPS_PACRE_TP5.
bogdanm 82:6473597d706e 4304
bogdanm 82:6473597d706e 4305 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4306 //! @brief Read current value of the AIPS_PACRE_TP5 field.
bogdanm 82:6473597d706e 4307 #define BR_AIPS_PACRE_TP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP5))
bogdanm 82:6473597d706e 4308 #endif
bogdanm 82:6473597d706e 4309
bogdanm 82:6473597d706e 4310 //! @brief Format value for bitfield AIPS_PACRE_TP5.
bogdanm 82:6473597d706e 4311 #define BF_AIPS_PACRE_TP5(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRE_TP5), uint32_t) & BM_AIPS_PACRE_TP5)
bogdanm 82:6473597d706e 4312
bogdanm 82:6473597d706e 4313 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4314 //! @brief Set the TP5 field to a new value.
bogdanm 82:6473597d706e 4315 #define BW_AIPS_PACRE_TP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP5) = (v))
bogdanm 82:6473597d706e 4316 #endif
bogdanm 82:6473597d706e 4317 //@}
bogdanm 82:6473597d706e 4318
bogdanm 82:6473597d706e 4319 /*!
bogdanm 82:6473597d706e 4320 * @name Register AIPS_PACRE, field WP5[9] (RW)
bogdanm 82:6473597d706e 4321 *
bogdanm 82:6473597d706e 4322 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 4323 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 4324 * and no peripheral access initiates.
bogdanm 82:6473597d706e 4325 *
bogdanm 82:6473597d706e 4326 * Values:
bogdanm 82:6473597d706e 4327 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 4328 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 4329 */
bogdanm 82:6473597d706e 4330 //@{
bogdanm 82:6473597d706e 4331 #define BP_AIPS_PACRE_WP5 (9U) //!< Bit position for AIPS_PACRE_WP5.
bogdanm 82:6473597d706e 4332 #define BM_AIPS_PACRE_WP5 (0x00000200U) //!< Bit mask for AIPS_PACRE_WP5.
bogdanm 82:6473597d706e 4333 #define BS_AIPS_PACRE_WP5 (1U) //!< Bit field size in bits for AIPS_PACRE_WP5.
bogdanm 82:6473597d706e 4334
bogdanm 82:6473597d706e 4335 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4336 //! @brief Read current value of the AIPS_PACRE_WP5 field.
bogdanm 82:6473597d706e 4337 #define BR_AIPS_PACRE_WP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP5))
bogdanm 82:6473597d706e 4338 #endif
bogdanm 82:6473597d706e 4339
bogdanm 82:6473597d706e 4340 //! @brief Format value for bitfield AIPS_PACRE_WP5.
bogdanm 82:6473597d706e 4341 #define BF_AIPS_PACRE_WP5(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRE_WP5), uint32_t) & BM_AIPS_PACRE_WP5)
bogdanm 82:6473597d706e 4342
bogdanm 82:6473597d706e 4343 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4344 //! @brief Set the WP5 field to a new value.
bogdanm 82:6473597d706e 4345 #define BW_AIPS_PACRE_WP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP5) = (v))
bogdanm 82:6473597d706e 4346 #endif
bogdanm 82:6473597d706e 4347 //@}
bogdanm 82:6473597d706e 4348
bogdanm 82:6473597d706e 4349 /*!
bogdanm 82:6473597d706e 4350 * @name Register AIPS_PACRE, field SP5[10] (RW)
bogdanm 82:6473597d706e 4351 *
bogdanm 82:6473597d706e 4352 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 4353 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 4354 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 4355 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 4356 * access initiates.
bogdanm 82:6473597d706e 4357 *
bogdanm 82:6473597d706e 4358 * Values:
bogdanm 82:6473597d706e 4359 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 4360 * accesses.
bogdanm 82:6473597d706e 4361 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 4362 */
bogdanm 82:6473597d706e 4363 //@{
bogdanm 82:6473597d706e 4364 #define BP_AIPS_PACRE_SP5 (10U) //!< Bit position for AIPS_PACRE_SP5.
bogdanm 82:6473597d706e 4365 #define BM_AIPS_PACRE_SP5 (0x00000400U) //!< Bit mask for AIPS_PACRE_SP5.
bogdanm 82:6473597d706e 4366 #define BS_AIPS_PACRE_SP5 (1U) //!< Bit field size in bits for AIPS_PACRE_SP5.
bogdanm 82:6473597d706e 4367
bogdanm 82:6473597d706e 4368 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4369 //! @brief Read current value of the AIPS_PACRE_SP5 field.
bogdanm 82:6473597d706e 4370 #define BR_AIPS_PACRE_SP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP5))
bogdanm 82:6473597d706e 4371 #endif
bogdanm 82:6473597d706e 4372
bogdanm 82:6473597d706e 4373 //! @brief Format value for bitfield AIPS_PACRE_SP5.
bogdanm 82:6473597d706e 4374 #define BF_AIPS_PACRE_SP5(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRE_SP5), uint32_t) & BM_AIPS_PACRE_SP5)
bogdanm 82:6473597d706e 4375
bogdanm 82:6473597d706e 4376 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4377 //! @brief Set the SP5 field to a new value.
bogdanm 82:6473597d706e 4378 #define BW_AIPS_PACRE_SP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP5) = (v))
bogdanm 82:6473597d706e 4379 #endif
bogdanm 82:6473597d706e 4380 //@}
bogdanm 82:6473597d706e 4381
bogdanm 82:6473597d706e 4382 /*!
bogdanm 82:6473597d706e 4383 * @name Register AIPS_PACRE, field TP4[12] (RW)
bogdanm 82:6473597d706e 4384 *
bogdanm 82:6473597d706e 4385 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 4386 * When this bit is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 4387 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 4388 *
bogdanm 82:6473597d706e 4389 * Values:
bogdanm 82:6473597d706e 4390 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 4391 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 4392 */
bogdanm 82:6473597d706e 4393 //@{
bogdanm 82:6473597d706e 4394 #define BP_AIPS_PACRE_TP4 (12U) //!< Bit position for AIPS_PACRE_TP4.
bogdanm 82:6473597d706e 4395 #define BM_AIPS_PACRE_TP4 (0x00001000U) //!< Bit mask for AIPS_PACRE_TP4.
bogdanm 82:6473597d706e 4396 #define BS_AIPS_PACRE_TP4 (1U) //!< Bit field size in bits for AIPS_PACRE_TP4.
bogdanm 82:6473597d706e 4397
bogdanm 82:6473597d706e 4398 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4399 //! @brief Read current value of the AIPS_PACRE_TP4 field.
bogdanm 82:6473597d706e 4400 #define BR_AIPS_PACRE_TP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP4))
bogdanm 82:6473597d706e 4401 #endif
bogdanm 82:6473597d706e 4402
bogdanm 82:6473597d706e 4403 //! @brief Format value for bitfield AIPS_PACRE_TP4.
bogdanm 82:6473597d706e 4404 #define BF_AIPS_PACRE_TP4(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRE_TP4), uint32_t) & BM_AIPS_PACRE_TP4)
bogdanm 82:6473597d706e 4405
bogdanm 82:6473597d706e 4406 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4407 //! @brief Set the TP4 field to a new value.
bogdanm 82:6473597d706e 4408 #define BW_AIPS_PACRE_TP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP4) = (v))
bogdanm 82:6473597d706e 4409 #endif
bogdanm 82:6473597d706e 4410 //@}
bogdanm 82:6473597d706e 4411
bogdanm 82:6473597d706e 4412 /*!
bogdanm 82:6473597d706e 4413 * @name Register AIPS_PACRE, field WP4[13] (RW)
bogdanm 82:6473597d706e 4414 *
bogdanm 82:6473597d706e 4415 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 4416 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 4417 * and no peripheral access initiates.
bogdanm 82:6473597d706e 4418 *
bogdanm 82:6473597d706e 4419 * Values:
bogdanm 82:6473597d706e 4420 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 4421 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 4422 */
bogdanm 82:6473597d706e 4423 //@{
bogdanm 82:6473597d706e 4424 #define BP_AIPS_PACRE_WP4 (13U) //!< Bit position for AIPS_PACRE_WP4.
bogdanm 82:6473597d706e 4425 #define BM_AIPS_PACRE_WP4 (0x00002000U) //!< Bit mask for AIPS_PACRE_WP4.
bogdanm 82:6473597d706e 4426 #define BS_AIPS_PACRE_WP4 (1U) //!< Bit field size in bits for AIPS_PACRE_WP4.
bogdanm 82:6473597d706e 4427
bogdanm 82:6473597d706e 4428 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4429 //! @brief Read current value of the AIPS_PACRE_WP4 field.
bogdanm 82:6473597d706e 4430 #define BR_AIPS_PACRE_WP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP4))
bogdanm 82:6473597d706e 4431 #endif
bogdanm 82:6473597d706e 4432
bogdanm 82:6473597d706e 4433 //! @brief Format value for bitfield AIPS_PACRE_WP4.
bogdanm 82:6473597d706e 4434 #define BF_AIPS_PACRE_WP4(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRE_WP4), uint32_t) & BM_AIPS_PACRE_WP4)
bogdanm 82:6473597d706e 4435
bogdanm 82:6473597d706e 4436 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4437 //! @brief Set the WP4 field to a new value.
bogdanm 82:6473597d706e 4438 #define BW_AIPS_PACRE_WP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP4) = (v))
bogdanm 82:6473597d706e 4439 #endif
bogdanm 82:6473597d706e 4440 //@}
bogdanm 82:6473597d706e 4441
bogdanm 82:6473597d706e 4442 /*!
bogdanm 82:6473597d706e 4443 * @name Register AIPS_PACRE, field SP4[14] (RW)
bogdanm 82:6473597d706e 4444 *
bogdanm 82:6473597d706e 4445 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 4446 * access. When this bit is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 4447 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
bogdanm 82:6473597d706e 4448 * set. If not, access terminates with an error response and no peripheral access
bogdanm 82:6473597d706e 4449 * initiates.
bogdanm 82:6473597d706e 4450 *
bogdanm 82:6473597d706e 4451 * Values:
bogdanm 82:6473597d706e 4452 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 4453 * accesses.
bogdanm 82:6473597d706e 4454 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 4455 */
bogdanm 82:6473597d706e 4456 //@{
bogdanm 82:6473597d706e 4457 #define BP_AIPS_PACRE_SP4 (14U) //!< Bit position for AIPS_PACRE_SP4.
bogdanm 82:6473597d706e 4458 #define BM_AIPS_PACRE_SP4 (0x00004000U) //!< Bit mask for AIPS_PACRE_SP4.
bogdanm 82:6473597d706e 4459 #define BS_AIPS_PACRE_SP4 (1U) //!< Bit field size in bits for AIPS_PACRE_SP4.
bogdanm 82:6473597d706e 4460
bogdanm 82:6473597d706e 4461 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4462 //! @brief Read current value of the AIPS_PACRE_SP4 field.
bogdanm 82:6473597d706e 4463 #define BR_AIPS_PACRE_SP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP4))
bogdanm 82:6473597d706e 4464 #endif
bogdanm 82:6473597d706e 4465
bogdanm 82:6473597d706e 4466 //! @brief Format value for bitfield AIPS_PACRE_SP4.
bogdanm 82:6473597d706e 4467 #define BF_AIPS_PACRE_SP4(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRE_SP4), uint32_t) & BM_AIPS_PACRE_SP4)
bogdanm 82:6473597d706e 4468
bogdanm 82:6473597d706e 4469 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4470 //! @brief Set the SP4 field to a new value.
bogdanm 82:6473597d706e 4471 #define BW_AIPS_PACRE_SP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP4) = (v))
bogdanm 82:6473597d706e 4472 #endif
bogdanm 82:6473597d706e 4473 //@}
bogdanm 82:6473597d706e 4474
bogdanm 82:6473597d706e 4475 /*!
bogdanm 82:6473597d706e 4476 * @name Register AIPS_PACRE, field TP3[16] (RW)
bogdanm 82:6473597d706e 4477 *
bogdanm 82:6473597d706e 4478 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 4479 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 4480 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 4481 *
bogdanm 82:6473597d706e 4482 * Values:
bogdanm 82:6473597d706e 4483 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 4484 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 4485 */
bogdanm 82:6473597d706e 4486 //@{
bogdanm 82:6473597d706e 4487 #define BP_AIPS_PACRE_TP3 (16U) //!< Bit position for AIPS_PACRE_TP3.
bogdanm 82:6473597d706e 4488 #define BM_AIPS_PACRE_TP3 (0x00010000U) //!< Bit mask for AIPS_PACRE_TP3.
bogdanm 82:6473597d706e 4489 #define BS_AIPS_PACRE_TP3 (1U) //!< Bit field size in bits for AIPS_PACRE_TP3.
bogdanm 82:6473597d706e 4490
bogdanm 82:6473597d706e 4491 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4492 //! @brief Read current value of the AIPS_PACRE_TP3 field.
bogdanm 82:6473597d706e 4493 #define BR_AIPS_PACRE_TP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP3))
bogdanm 82:6473597d706e 4494 #endif
bogdanm 82:6473597d706e 4495
bogdanm 82:6473597d706e 4496 //! @brief Format value for bitfield AIPS_PACRE_TP3.
bogdanm 82:6473597d706e 4497 #define BF_AIPS_PACRE_TP3(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRE_TP3), uint32_t) & BM_AIPS_PACRE_TP3)
bogdanm 82:6473597d706e 4498
bogdanm 82:6473597d706e 4499 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4500 //! @brief Set the TP3 field to a new value.
bogdanm 82:6473597d706e 4501 #define BW_AIPS_PACRE_TP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP3) = (v))
bogdanm 82:6473597d706e 4502 #endif
bogdanm 82:6473597d706e 4503 //@}
bogdanm 82:6473597d706e 4504
bogdanm 82:6473597d706e 4505 /*!
bogdanm 82:6473597d706e 4506 * @name Register AIPS_PACRE, field WP3[17] (RW)
bogdanm 82:6473597d706e 4507 *
bogdanm 82:6473597d706e 4508 * Determines whether the peripheral allows write accesss. When this bit is set
bogdanm 82:6473597d706e 4509 * and a write access is attempted, access terminates with an error response and
bogdanm 82:6473597d706e 4510 * no peripheral access initiates.
bogdanm 82:6473597d706e 4511 *
bogdanm 82:6473597d706e 4512 * Values:
bogdanm 82:6473597d706e 4513 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 4514 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 4515 */
bogdanm 82:6473597d706e 4516 //@{
bogdanm 82:6473597d706e 4517 #define BP_AIPS_PACRE_WP3 (17U) //!< Bit position for AIPS_PACRE_WP3.
bogdanm 82:6473597d706e 4518 #define BM_AIPS_PACRE_WP3 (0x00020000U) //!< Bit mask for AIPS_PACRE_WP3.
bogdanm 82:6473597d706e 4519 #define BS_AIPS_PACRE_WP3 (1U) //!< Bit field size in bits for AIPS_PACRE_WP3.
bogdanm 82:6473597d706e 4520
bogdanm 82:6473597d706e 4521 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4522 //! @brief Read current value of the AIPS_PACRE_WP3 field.
bogdanm 82:6473597d706e 4523 #define BR_AIPS_PACRE_WP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP3))
bogdanm 82:6473597d706e 4524 #endif
bogdanm 82:6473597d706e 4525
bogdanm 82:6473597d706e 4526 //! @brief Format value for bitfield AIPS_PACRE_WP3.
bogdanm 82:6473597d706e 4527 #define BF_AIPS_PACRE_WP3(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRE_WP3), uint32_t) & BM_AIPS_PACRE_WP3)
bogdanm 82:6473597d706e 4528
bogdanm 82:6473597d706e 4529 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4530 //! @brief Set the WP3 field to a new value.
bogdanm 82:6473597d706e 4531 #define BW_AIPS_PACRE_WP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP3) = (v))
bogdanm 82:6473597d706e 4532 #endif
bogdanm 82:6473597d706e 4533 //@}
bogdanm 82:6473597d706e 4534
bogdanm 82:6473597d706e 4535 /*!
bogdanm 82:6473597d706e 4536 * @name Register AIPS_PACRE, field SP3[18] (RW)
bogdanm 82:6473597d706e 4537 *
bogdanm 82:6473597d706e 4538 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 4539 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 4540 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 4541 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 4542 * access initiates.
bogdanm 82:6473597d706e 4543 *
bogdanm 82:6473597d706e 4544 * Values:
bogdanm 82:6473597d706e 4545 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 4546 * accesses.
bogdanm 82:6473597d706e 4547 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 4548 */
bogdanm 82:6473597d706e 4549 //@{
bogdanm 82:6473597d706e 4550 #define BP_AIPS_PACRE_SP3 (18U) //!< Bit position for AIPS_PACRE_SP3.
bogdanm 82:6473597d706e 4551 #define BM_AIPS_PACRE_SP3 (0x00040000U) //!< Bit mask for AIPS_PACRE_SP3.
bogdanm 82:6473597d706e 4552 #define BS_AIPS_PACRE_SP3 (1U) //!< Bit field size in bits for AIPS_PACRE_SP3.
bogdanm 82:6473597d706e 4553
bogdanm 82:6473597d706e 4554 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4555 //! @brief Read current value of the AIPS_PACRE_SP3 field.
bogdanm 82:6473597d706e 4556 #define BR_AIPS_PACRE_SP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP3))
bogdanm 82:6473597d706e 4557 #endif
bogdanm 82:6473597d706e 4558
bogdanm 82:6473597d706e 4559 //! @brief Format value for bitfield AIPS_PACRE_SP3.
bogdanm 82:6473597d706e 4560 #define BF_AIPS_PACRE_SP3(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRE_SP3), uint32_t) & BM_AIPS_PACRE_SP3)
bogdanm 82:6473597d706e 4561
bogdanm 82:6473597d706e 4562 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4563 //! @brief Set the SP3 field to a new value.
bogdanm 82:6473597d706e 4564 #define BW_AIPS_PACRE_SP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP3) = (v))
bogdanm 82:6473597d706e 4565 #endif
bogdanm 82:6473597d706e 4566 //@}
bogdanm 82:6473597d706e 4567
bogdanm 82:6473597d706e 4568 /*!
bogdanm 82:6473597d706e 4569 * @name Register AIPS_PACRE, field TP2[20] (RW)
bogdanm 82:6473597d706e 4570 *
bogdanm 82:6473597d706e 4571 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 4572 * When this bit is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 4573 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 4574 *
bogdanm 82:6473597d706e 4575 * Values:
bogdanm 82:6473597d706e 4576 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 4577 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 4578 */
bogdanm 82:6473597d706e 4579 //@{
bogdanm 82:6473597d706e 4580 #define BP_AIPS_PACRE_TP2 (20U) //!< Bit position for AIPS_PACRE_TP2.
bogdanm 82:6473597d706e 4581 #define BM_AIPS_PACRE_TP2 (0x00100000U) //!< Bit mask for AIPS_PACRE_TP2.
bogdanm 82:6473597d706e 4582 #define BS_AIPS_PACRE_TP2 (1U) //!< Bit field size in bits for AIPS_PACRE_TP2.
bogdanm 82:6473597d706e 4583
bogdanm 82:6473597d706e 4584 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4585 //! @brief Read current value of the AIPS_PACRE_TP2 field.
bogdanm 82:6473597d706e 4586 #define BR_AIPS_PACRE_TP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP2))
bogdanm 82:6473597d706e 4587 #endif
bogdanm 82:6473597d706e 4588
bogdanm 82:6473597d706e 4589 //! @brief Format value for bitfield AIPS_PACRE_TP2.
bogdanm 82:6473597d706e 4590 #define BF_AIPS_PACRE_TP2(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRE_TP2), uint32_t) & BM_AIPS_PACRE_TP2)
bogdanm 82:6473597d706e 4591
bogdanm 82:6473597d706e 4592 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4593 //! @brief Set the TP2 field to a new value.
bogdanm 82:6473597d706e 4594 #define BW_AIPS_PACRE_TP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP2) = (v))
bogdanm 82:6473597d706e 4595 #endif
bogdanm 82:6473597d706e 4596 //@}
bogdanm 82:6473597d706e 4597
bogdanm 82:6473597d706e 4598 /*!
bogdanm 82:6473597d706e 4599 * @name Register AIPS_PACRE, field WP2[21] (RW)
bogdanm 82:6473597d706e 4600 *
bogdanm 82:6473597d706e 4601 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 4602 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 4603 * and no peripheral access initiates.
bogdanm 82:6473597d706e 4604 *
bogdanm 82:6473597d706e 4605 * Values:
bogdanm 82:6473597d706e 4606 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 4607 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 4608 */
bogdanm 82:6473597d706e 4609 //@{
bogdanm 82:6473597d706e 4610 #define BP_AIPS_PACRE_WP2 (21U) //!< Bit position for AIPS_PACRE_WP2.
bogdanm 82:6473597d706e 4611 #define BM_AIPS_PACRE_WP2 (0x00200000U) //!< Bit mask for AIPS_PACRE_WP2.
bogdanm 82:6473597d706e 4612 #define BS_AIPS_PACRE_WP2 (1U) //!< Bit field size in bits for AIPS_PACRE_WP2.
bogdanm 82:6473597d706e 4613
bogdanm 82:6473597d706e 4614 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4615 //! @brief Read current value of the AIPS_PACRE_WP2 field.
bogdanm 82:6473597d706e 4616 #define BR_AIPS_PACRE_WP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP2))
bogdanm 82:6473597d706e 4617 #endif
bogdanm 82:6473597d706e 4618
bogdanm 82:6473597d706e 4619 //! @brief Format value for bitfield AIPS_PACRE_WP2.
bogdanm 82:6473597d706e 4620 #define BF_AIPS_PACRE_WP2(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRE_WP2), uint32_t) & BM_AIPS_PACRE_WP2)
bogdanm 82:6473597d706e 4621
bogdanm 82:6473597d706e 4622 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4623 //! @brief Set the WP2 field to a new value.
bogdanm 82:6473597d706e 4624 #define BW_AIPS_PACRE_WP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP2) = (v))
bogdanm 82:6473597d706e 4625 #endif
bogdanm 82:6473597d706e 4626 //@}
bogdanm 82:6473597d706e 4627
bogdanm 82:6473597d706e 4628 /*!
bogdanm 82:6473597d706e 4629 * @name Register AIPS_PACRE, field SP2[22] (RW)
bogdanm 82:6473597d706e 4630 *
bogdanm 82:6473597d706e 4631 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 4632 * access. When this bit is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 4633 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
bogdanm 82:6473597d706e 4634 * set. If not, access terminates with an error response and no peripheral access
bogdanm 82:6473597d706e 4635 * initiates.
bogdanm 82:6473597d706e 4636 *
bogdanm 82:6473597d706e 4637 * Values:
bogdanm 82:6473597d706e 4638 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 4639 * accesses.
bogdanm 82:6473597d706e 4640 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 4641 */
bogdanm 82:6473597d706e 4642 //@{
bogdanm 82:6473597d706e 4643 #define BP_AIPS_PACRE_SP2 (22U) //!< Bit position for AIPS_PACRE_SP2.
bogdanm 82:6473597d706e 4644 #define BM_AIPS_PACRE_SP2 (0x00400000U) //!< Bit mask for AIPS_PACRE_SP2.
bogdanm 82:6473597d706e 4645 #define BS_AIPS_PACRE_SP2 (1U) //!< Bit field size in bits for AIPS_PACRE_SP2.
bogdanm 82:6473597d706e 4646
bogdanm 82:6473597d706e 4647 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4648 //! @brief Read current value of the AIPS_PACRE_SP2 field.
bogdanm 82:6473597d706e 4649 #define BR_AIPS_PACRE_SP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP2))
bogdanm 82:6473597d706e 4650 #endif
bogdanm 82:6473597d706e 4651
bogdanm 82:6473597d706e 4652 //! @brief Format value for bitfield AIPS_PACRE_SP2.
bogdanm 82:6473597d706e 4653 #define BF_AIPS_PACRE_SP2(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRE_SP2), uint32_t) & BM_AIPS_PACRE_SP2)
bogdanm 82:6473597d706e 4654
bogdanm 82:6473597d706e 4655 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4656 //! @brief Set the SP2 field to a new value.
bogdanm 82:6473597d706e 4657 #define BW_AIPS_PACRE_SP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP2) = (v))
bogdanm 82:6473597d706e 4658 #endif
bogdanm 82:6473597d706e 4659 //@}
bogdanm 82:6473597d706e 4660
bogdanm 82:6473597d706e 4661 /*!
bogdanm 82:6473597d706e 4662 * @name Register AIPS_PACRE, field TP1[24] (RW)
bogdanm 82:6473597d706e 4663 *
bogdanm 82:6473597d706e 4664 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 4665 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 4666 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 4667 *
bogdanm 82:6473597d706e 4668 * Values:
bogdanm 82:6473597d706e 4669 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 4670 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 4671 */
bogdanm 82:6473597d706e 4672 //@{
bogdanm 82:6473597d706e 4673 #define BP_AIPS_PACRE_TP1 (24U) //!< Bit position for AIPS_PACRE_TP1.
bogdanm 82:6473597d706e 4674 #define BM_AIPS_PACRE_TP1 (0x01000000U) //!< Bit mask for AIPS_PACRE_TP1.
bogdanm 82:6473597d706e 4675 #define BS_AIPS_PACRE_TP1 (1U) //!< Bit field size in bits for AIPS_PACRE_TP1.
bogdanm 82:6473597d706e 4676
bogdanm 82:6473597d706e 4677 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4678 //! @brief Read current value of the AIPS_PACRE_TP1 field.
bogdanm 82:6473597d706e 4679 #define BR_AIPS_PACRE_TP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP1))
bogdanm 82:6473597d706e 4680 #endif
bogdanm 82:6473597d706e 4681
bogdanm 82:6473597d706e 4682 //! @brief Format value for bitfield AIPS_PACRE_TP1.
bogdanm 82:6473597d706e 4683 #define BF_AIPS_PACRE_TP1(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRE_TP1), uint32_t) & BM_AIPS_PACRE_TP1)
bogdanm 82:6473597d706e 4684
bogdanm 82:6473597d706e 4685 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4686 //! @brief Set the TP1 field to a new value.
bogdanm 82:6473597d706e 4687 #define BW_AIPS_PACRE_TP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP1) = (v))
bogdanm 82:6473597d706e 4688 #endif
bogdanm 82:6473597d706e 4689 //@}
bogdanm 82:6473597d706e 4690
bogdanm 82:6473597d706e 4691 /*!
bogdanm 82:6473597d706e 4692 * @name Register AIPS_PACRE, field WP1[25] (RW)
bogdanm 82:6473597d706e 4693 *
bogdanm 82:6473597d706e 4694 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 4695 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 4696 * and no peripheral access initiates.
bogdanm 82:6473597d706e 4697 *
bogdanm 82:6473597d706e 4698 * Values:
bogdanm 82:6473597d706e 4699 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 4700 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 4701 */
bogdanm 82:6473597d706e 4702 //@{
bogdanm 82:6473597d706e 4703 #define BP_AIPS_PACRE_WP1 (25U) //!< Bit position for AIPS_PACRE_WP1.
bogdanm 82:6473597d706e 4704 #define BM_AIPS_PACRE_WP1 (0x02000000U) //!< Bit mask for AIPS_PACRE_WP1.
bogdanm 82:6473597d706e 4705 #define BS_AIPS_PACRE_WP1 (1U) //!< Bit field size in bits for AIPS_PACRE_WP1.
bogdanm 82:6473597d706e 4706
bogdanm 82:6473597d706e 4707 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4708 //! @brief Read current value of the AIPS_PACRE_WP1 field.
bogdanm 82:6473597d706e 4709 #define BR_AIPS_PACRE_WP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP1))
bogdanm 82:6473597d706e 4710 #endif
bogdanm 82:6473597d706e 4711
bogdanm 82:6473597d706e 4712 //! @brief Format value for bitfield AIPS_PACRE_WP1.
bogdanm 82:6473597d706e 4713 #define BF_AIPS_PACRE_WP1(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRE_WP1), uint32_t) & BM_AIPS_PACRE_WP1)
bogdanm 82:6473597d706e 4714
bogdanm 82:6473597d706e 4715 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4716 //! @brief Set the WP1 field to a new value.
bogdanm 82:6473597d706e 4717 #define BW_AIPS_PACRE_WP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP1) = (v))
bogdanm 82:6473597d706e 4718 #endif
bogdanm 82:6473597d706e 4719 //@}
bogdanm 82:6473597d706e 4720
bogdanm 82:6473597d706e 4721 /*!
bogdanm 82:6473597d706e 4722 * @name Register AIPS_PACRE, field SP1[26] (RW)
bogdanm 82:6473597d706e 4723 *
bogdanm 82:6473597d706e 4724 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 4725 * access. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 4726 * supervisor access attribute, and the MPRx[MPLn] control field for the master must
bogdanm 82:6473597d706e 4727 * be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 4728 * access initiates.
bogdanm 82:6473597d706e 4729 *
bogdanm 82:6473597d706e 4730 * Values:
bogdanm 82:6473597d706e 4731 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 4732 * accesses.
bogdanm 82:6473597d706e 4733 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 4734 */
bogdanm 82:6473597d706e 4735 //@{
bogdanm 82:6473597d706e 4736 #define BP_AIPS_PACRE_SP1 (26U) //!< Bit position for AIPS_PACRE_SP1.
bogdanm 82:6473597d706e 4737 #define BM_AIPS_PACRE_SP1 (0x04000000U) //!< Bit mask for AIPS_PACRE_SP1.
bogdanm 82:6473597d706e 4738 #define BS_AIPS_PACRE_SP1 (1U) //!< Bit field size in bits for AIPS_PACRE_SP1.
bogdanm 82:6473597d706e 4739
bogdanm 82:6473597d706e 4740 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4741 //! @brief Read current value of the AIPS_PACRE_SP1 field.
bogdanm 82:6473597d706e 4742 #define BR_AIPS_PACRE_SP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP1))
bogdanm 82:6473597d706e 4743 #endif
bogdanm 82:6473597d706e 4744
bogdanm 82:6473597d706e 4745 //! @brief Format value for bitfield AIPS_PACRE_SP1.
bogdanm 82:6473597d706e 4746 #define BF_AIPS_PACRE_SP1(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRE_SP1), uint32_t) & BM_AIPS_PACRE_SP1)
bogdanm 82:6473597d706e 4747
bogdanm 82:6473597d706e 4748 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4749 //! @brief Set the SP1 field to a new value.
bogdanm 82:6473597d706e 4750 #define BW_AIPS_PACRE_SP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP1) = (v))
bogdanm 82:6473597d706e 4751 #endif
bogdanm 82:6473597d706e 4752 //@}
bogdanm 82:6473597d706e 4753
bogdanm 82:6473597d706e 4754 /*!
bogdanm 82:6473597d706e 4755 * @name Register AIPS_PACRE, field TP0[28] (RW)
bogdanm 82:6473597d706e 4756 *
bogdanm 82:6473597d706e 4757 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 4758 * When this bit is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 4759 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 4760 *
bogdanm 82:6473597d706e 4761 * Values:
bogdanm 82:6473597d706e 4762 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 4763 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 4764 */
bogdanm 82:6473597d706e 4765 //@{
bogdanm 82:6473597d706e 4766 #define BP_AIPS_PACRE_TP0 (28U) //!< Bit position for AIPS_PACRE_TP0.
bogdanm 82:6473597d706e 4767 #define BM_AIPS_PACRE_TP0 (0x10000000U) //!< Bit mask for AIPS_PACRE_TP0.
bogdanm 82:6473597d706e 4768 #define BS_AIPS_PACRE_TP0 (1U) //!< Bit field size in bits for AIPS_PACRE_TP0.
bogdanm 82:6473597d706e 4769
bogdanm 82:6473597d706e 4770 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4771 //! @brief Read current value of the AIPS_PACRE_TP0 field.
bogdanm 82:6473597d706e 4772 #define BR_AIPS_PACRE_TP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP0))
bogdanm 82:6473597d706e 4773 #endif
bogdanm 82:6473597d706e 4774
bogdanm 82:6473597d706e 4775 //! @brief Format value for bitfield AIPS_PACRE_TP0.
bogdanm 82:6473597d706e 4776 #define BF_AIPS_PACRE_TP0(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRE_TP0), uint32_t) & BM_AIPS_PACRE_TP0)
bogdanm 82:6473597d706e 4777
bogdanm 82:6473597d706e 4778 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4779 //! @brief Set the TP0 field to a new value.
bogdanm 82:6473597d706e 4780 #define BW_AIPS_PACRE_TP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_TP0) = (v))
bogdanm 82:6473597d706e 4781 #endif
bogdanm 82:6473597d706e 4782 //@}
bogdanm 82:6473597d706e 4783
bogdanm 82:6473597d706e 4784 /*!
bogdanm 82:6473597d706e 4785 * @name Register AIPS_PACRE, field WP0[29] (RW)
bogdanm 82:6473597d706e 4786 *
bogdanm 82:6473597d706e 4787 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 4788 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 4789 * and no peripheral access initiates.
bogdanm 82:6473597d706e 4790 *
bogdanm 82:6473597d706e 4791 * Values:
bogdanm 82:6473597d706e 4792 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 4793 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 4794 */
bogdanm 82:6473597d706e 4795 //@{
bogdanm 82:6473597d706e 4796 #define BP_AIPS_PACRE_WP0 (29U) //!< Bit position for AIPS_PACRE_WP0.
bogdanm 82:6473597d706e 4797 #define BM_AIPS_PACRE_WP0 (0x20000000U) //!< Bit mask for AIPS_PACRE_WP0.
bogdanm 82:6473597d706e 4798 #define BS_AIPS_PACRE_WP0 (1U) //!< Bit field size in bits for AIPS_PACRE_WP0.
bogdanm 82:6473597d706e 4799
bogdanm 82:6473597d706e 4800 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4801 //! @brief Read current value of the AIPS_PACRE_WP0 field.
bogdanm 82:6473597d706e 4802 #define BR_AIPS_PACRE_WP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP0))
bogdanm 82:6473597d706e 4803 #endif
bogdanm 82:6473597d706e 4804
bogdanm 82:6473597d706e 4805 //! @brief Format value for bitfield AIPS_PACRE_WP0.
bogdanm 82:6473597d706e 4806 #define BF_AIPS_PACRE_WP0(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRE_WP0), uint32_t) & BM_AIPS_PACRE_WP0)
bogdanm 82:6473597d706e 4807
bogdanm 82:6473597d706e 4808 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4809 //! @brief Set the WP0 field to a new value.
bogdanm 82:6473597d706e 4810 #define BW_AIPS_PACRE_WP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_WP0) = (v))
bogdanm 82:6473597d706e 4811 #endif
bogdanm 82:6473597d706e 4812 //@}
bogdanm 82:6473597d706e 4813
bogdanm 82:6473597d706e 4814 /*!
bogdanm 82:6473597d706e 4815 * @name Register AIPS_PACRE, field SP0[30] (RW)
bogdanm 82:6473597d706e 4816 *
bogdanm 82:6473597d706e 4817 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 4818 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 4819 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 4820 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 4821 * access initiates.
bogdanm 82:6473597d706e 4822 *
bogdanm 82:6473597d706e 4823 * Values:
bogdanm 82:6473597d706e 4824 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 4825 * accesses.
bogdanm 82:6473597d706e 4826 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 4827 */
bogdanm 82:6473597d706e 4828 //@{
bogdanm 82:6473597d706e 4829 #define BP_AIPS_PACRE_SP0 (30U) //!< Bit position for AIPS_PACRE_SP0.
bogdanm 82:6473597d706e 4830 #define BM_AIPS_PACRE_SP0 (0x40000000U) //!< Bit mask for AIPS_PACRE_SP0.
bogdanm 82:6473597d706e 4831 #define BS_AIPS_PACRE_SP0 (1U) //!< Bit field size in bits for AIPS_PACRE_SP0.
bogdanm 82:6473597d706e 4832
bogdanm 82:6473597d706e 4833 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4834 //! @brief Read current value of the AIPS_PACRE_SP0 field.
bogdanm 82:6473597d706e 4835 #define BR_AIPS_PACRE_SP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP0))
bogdanm 82:6473597d706e 4836 #endif
bogdanm 82:6473597d706e 4837
bogdanm 82:6473597d706e 4838 //! @brief Format value for bitfield AIPS_PACRE_SP0.
bogdanm 82:6473597d706e 4839 #define BF_AIPS_PACRE_SP0(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRE_SP0), uint32_t) & BM_AIPS_PACRE_SP0)
bogdanm 82:6473597d706e 4840
bogdanm 82:6473597d706e 4841 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4842 //! @brief Set the SP0 field to a new value.
bogdanm 82:6473597d706e 4843 #define BW_AIPS_PACRE_SP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRE_ADDR(x), BP_AIPS_PACRE_SP0) = (v))
bogdanm 82:6473597d706e 4844 #endif
bogdanm 82:6473597d706e 4845 //@}
bogdanm 82:6473597d706e 4846
bogdanm 82:6473597d706e 4847 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 4848 // HW_AIPS_PACRF - Peripheral Access Control Register
bogdanm 82:6473597d706e 4849 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 4850
bogdanm 82:6473597d706e 4851 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4852 /*!
bogdanm 82:6473597d706e 4853 * @brief HW_AIPS_PACRF - Peripheral Access Control Register (RW)
bogdanm 82:6473597d706e 4854 *
bogdanm 82:6473597d706e 4855 * Reset value: 0x44444444U
bogdanm 82:6473597d706e 4856 *
bogdanm 82:6473597d706e 4857 * This section describes PACR registers E-P, which control peripheral slots
bogdanm 82:6473597d706e 4858 * 32-127. See PACRPeripheral Access Control Register for the description of these
bogdanm 82:6473597d706e 4859 * registers.
bogdanm 82:6473597d706e 4860 */
bogdanm 82:6473597d706e 4861 typedef union _hw_aips_pacrf
bogdanm 82:6473597d706e 4862 {
bogdanm 82:6473597d706e 4863 uint32_t U;
bogdanm 82:6473597d706e 4864 struct _hw_aips_pacrf_bitfields
bogdanm 82:6473597d706e 4865 {
bogdanm 82:6473597d706e 4866 uint32_t TP7 : 1; //!< [0] Trusted Protect
bogdanm 82:6473597d706e 4867 uint32_t WP7 : 1; //!< [1] Write Protect
bogdanm 82:6473597d706e 4868 uint32_t SP7 : 1; //!< [2] Supervisor Protect
bogdanm 82:6473597d706e 4869 uint32_t RESERVED0 : 1; //!< [3]
bogdanm 82:6473597d706e 4870 uint32_t TP6 : 1; //!< [4] Trusted Protect
bogdanm 82:6473597d706e 4871 uint32_t WP6 : 1; //!< [5] Write Protect
bogdanm 82:6473597d706e 4872 uint32_t SP6 : 1; //!< [6] Supervisor Protect
bogdanm 82:6473597d706e 4873 uint32_t RESERVED1 : 1; //!< [7]
bogdanm 82:6473597d706e 4874 uint32_t TP5 : 1; //!< [8] Trusted Protect
bogdanm 82:6473597d706e 4875 uint32_t WP5 : 1; //!< [9] Write Protect
bogdanm 82:6473597d706e 4876 uint32_t SP5 : 1; //!< [10] Supervisor Protect
bogdanm 82:6473597d706e 4877 uint32_t RESERVED2 : 1; //!< [11]
bogdanm 82:6473597d706e 4878 uint32_t TP4 : 1; //!< [12] Trusted Protect
bogdanm 82:6473597d706e 4879 uint32_t WP4 : 1; //!< [13] Write Protect
bogdanm 82:6473597d706e 4880 uint32_t SP4 : 1; //!< [14] Supervisor Protect
bogdanm 82:6473597d706e 4881 uint32_t RESERVED3 : 1; //!< [15]
bogdanm 82:6473597d706e 4882 uint32_t TP3 : 1; //!< [16] Trusted Protect
bogdanm 82:6473597d706e 4883 uint32_t WP3 : 1; //!< [17] Write Protect
bogdanm 82:6473597d706e 4884 uint32_t SP3 : 1; //!< [18] Supervisor Protect
bogdanm 82:6473597d706e 4885 uint32_t RESERVED4 : 1; //!< [19]
bogdanm 82:6473597d706e 4886 uint32_t TP2 : 1; //!< [20] Trusted Protect
bogdanm 82:6473597d706e 4887 uint32_t WP2 : 1; //!< [21] Write Protect
bogdanm 82:6473597d706e 4888 uint32_t SP2 : 1; //!< [22] Supervisor Protect
bogdanm 82:6473597d706e 4889 uint32_t RESERVED5 : 1; //!< [23]
bogdanm 82:6473597d706e 4890 uint32_t TP1 : 1; //!< [24] Trusted Protect
bogdanm 82:6473597d706e 4891 uint32_t WP1 : 1; //!< [25] Write Protect
bogdanm 82:6473597d706e 4892 uint32_t SP1 : 1; //!< [26] Supervisor Protect
bogdanm 82:6473597d706e 4893 uint32_t RESERVED6 : 1; //!< [27]
bogdanm 82:6473597d706e 4894 uint32_t TP0 : 1; //!< [28] Trusted Protect
bogdanm 82:6473597d706e 4895 uint32_t WP0 : 1; //!< [29] Write Protect
bogdanm 82:6473597d706e 4896 uint32_t SP0 : 1; //!< [30] Supervisor Protect
bogdanm 82:6473597d706e 4897 uint32_t RESERVED7 : 1; //!< [31]
bogdanm 82:6473597d706e 4898 } B;
bogdanm 82:6473597d706e 4899 } hw_aips_pacrf_t;
bogdanm 82:6473597d706e 4900 #endif
bogdanm 82:6473597d706e 4901
bogdanm 82:6473597d706e 4902 /*!
bogdanm 82:6473597d706e 4903 * @name Constants and macros for entire AIPS_PACRF register
bogdanm 82:6473597d706e 4904 */
bogdanm 82:6473597d706e 4905 //@{
bogdanm 82:6473597d706e 4906 #define HW_AIPS_PACRF_ADDR(x) (REGS_AIPS_BASE(x) + 0x44U)
bogdanm 82:6473597d706e 4907
bogdanm 82:6473597d706e 4908 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4909 #define HW_AIPS_PACRF(x) (*(__IO hw_aips_pacrf_t *) HW_AIPS_PACRF_ADDR(x))
bogdanm 82:6473597d706e 4910 #define HW_AIPS_PACRF_RD(x) (HW_AIPS_PACRF(x).U)
bogdanm 82:6473597d706e 4911 #define HW_AIPS_PACRF_WR(x, v) (HW_AIPS_PACRF(x).U = (v))
bogdanm 82:6473597d706e 4912 #define HW_AIPS_PACRF_SET(x, v) (HW_AIPS_PACRF_WR(x, HW_AIPS_PACRF_RD(x) | (v)))
bogdanm 82:6473597d706e 4913 #define HW_AIPS_PACRF_CLR(x, v) (HW_AIPS_PACRF_WR(x, HW_AIPS_PACRF_RD(x) & ~(v)))
bogdanm 82:6473597d706e 4914 #define HW_AIPS_PACRF_TOG(x, v) (HW_AIPS_PACRF_WR(x, HW_AIPS_PACRF_RD(x) ^ (v)))
bogdanm 82:6473597d706e 4915 #endif
bogdanm 82:6473597d706e 4916 //@}
bogdanm 82:6473597d706e 4917
bogdanm 82:6473597d706e 4918 /*
bogdanm 82:6473597d706e 4919 * Constants & macros for individual AIPS_PACRF bitfields
bogdanm 82:6473597d706e 4920 */
bogdanm 82:6473597d706e 4921
bogdanm 82:6473597d706e 4922 /*!
bogdanm 82:6473597d706e 4923 * @name Register AIPS_PACRF, field TP7[0] (RW)
bogdanm 82:6473597d706e 4924 *
bogdanm 82:6473597d706e 4925 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 4926 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 4927 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 4928 *
bogdanm 82:6473597d706e 4929 * Values:
bogdanm 82:6473597d706e 4930 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 4931 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 4932 */
bogdanm 82:6473597d706e 4933 //@{
bogdanm 82:6473597d706e 4934 #define BP_AIPS_PACRF_TP7 (0U) //!< Bit position for AIPS_PACRF_TP7.
bogdanm 82:6473597d706e 4935 #define BM_AIPS_PACRF_TP7 (0x00000001U) //!< Bit mask for AIPS_PACRF_TP7.
bogdanm 82:6473597d706e 4936 #define BS_AIPS_PACRF_TP7 (1U) //!< Bit field size in bits for AIPS_PACRF_TP7.
bogdanm 82:6473597d706e 4937
bogdanm 82:6473597d706e 4938 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4939 //! @brief Read current value of the AIPS_PACRF_TP7 field.
bogdanm 82:6473597d706e 4940 #define BR_AIPS_PACRF_TP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP7))
bogdanm 82:6473597d706e 4941 #endif
bogdanm 82:6473597d706e 4942
bogdanm 82:6473597d706e 4943 //! @brief Format value for bitfield AIPS_PACRF_TP7.
bogdanm 82:6473597d706e 4944 #define BF_AIPS_PACRF_TP7(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRF_TP7), uint32_t) & BM_AIPS_PACRF_TP7)
bogdanm 82:6473597d706e 4945
bogdanm 82:6473597d706e 4946 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4947 //! @brief Set the TP7 field to a new value.
bogdanm 82:6473597d706e 4948 #define BW_AIPS_PACRF_TP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP7) = (v))
bogdanm 82:6473597d706e 4949 #endif
bogdanm 82:6473597d706e 4950 //@}
bogdanm 82:6473597d706e 4951
bogdanm 82:6473597d706e 4952 /*!
bogdanm 82:6473597d706e 4953 * @name Register AIPS_PACRF, field WP7[1] (RW)
bogdanm 82:6473597d706e 4954 *
bogdanm 82:6473597d706e 4955 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 4956 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 4957 * and no peripheral access initiates.
bogdanm 82:6473597d706e 4958 *
bogdanm 82:6473597d706e 4959 * Values:
bogdanm 82:6473597d706e 4960 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 4961 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 4962 */
bogdanm 82:6473597d706e 4963 //@{
bogdanm 82:6473597d706e 4964 #define BP_AIPS_PACRF_WP7 (1U) //!< Bit position for AIPS_PACRF_WP7.
bogdanm 82:6473597d706e 4965 #define BM_AIPS_PACRF_WP7 (0x00000002U) //!< Bit mask for AIPS_PACRF_WP7.
bogdanm 82:6473597d706e 4966 #define BS_AIPS_PACRF_WP7 (1U) //!< Bit field size in bits for AIPS_PACRF_WP7.
bogdanm 82:6473597d706e 4967
bogdanm 82:6473597d706e 4968 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4969 //! @brief Read current value of the AIPS_PACRF_WP7 field.
bogdanm 82:6473597d706e 4970 #define BR_AIPS_PACRF_WP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP7))
bogdanm 82:6473597d706e 4971 #endif
bogdanm 82:6473597d706e 4972
bogdanm 82:6473597d706e 4973 //! @brief Format value for bitfield AIPS_PACRF_WP7.
bogdanm 82:6473597d706e 4974 #define BF_AIPS_PACRF_WP7(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRF_WP7), uint32_t) & BM_AIPS_PACRF_WP7)
bogdanm 82:6473597d706e 4975
bogdanm 82:6473597d706e 4976 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 4977 //! @brief Set the WP7 field to a new value.
bogdanm 82:6473597d706e 4978 #define BW_AIPS_PACRF_WP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP7) = (v))
bogdanm 82:6473597d706e 4979 #endif
bogdanm 82:6473597d706e 4980 //@}
bogdanm 82:6473597d706e 4981
bogdanm 82:6473597d706e 4982 /*!
bogdanm 82:6473597d706e 4983 * @name Register AIPS_PACRF, field SP7[2] (RW)
bogdanm 82:6473597d706e 4984 *
bogdanm 82:6473597d706e 4985 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 4986 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 4987 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 4988 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 4989 * access initiates.
bogdanm 82:6473597d706e 4990 *
bogdanm 82:6473597d706e 4991 * Values:
bogdanm 82:6473597d706e 4992 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 4993 * accesses.
bogdanm 82:6473597d706e 4994 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 4995 */
bogdanm 82:6473597d706e 4996 //@{
bogdanm 82:6473597d706e 4997 #define BP_AIPS_PACRF_SP7 (2U) //!< Bit position for AIPS_PACRF_SP7.
bogdanm 82:6473597d706e 4998 #define BM_AIPS_PACRF_SP7 (0x00000004U) //!< Bit mask for AIPS_PACRF_SP7.
bogdanm 82:6473597d706e 4999 #define BS_AIPS_PACRF_SP7 (1U) //!< Bit field size in bits for AIPS_PACRF_SP7.
bogdanm 82:6473597d706e 5000
bogdanm 82:6473597d706e 5001 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5002 //! @brief Read current value of the AIPS_PACRF_SP7 field.
bogdanm 82:6473597d706e 5003 #define BR_AIPS_PACRF_SP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP7))
bogdanm 82:6473597d706e 5004 #endif
bogdanm 82:6473597d706e 5005
bogdanm 82:6473597d706e 5006 //! @brief Format value for bitfield AIPS_PACRF_SP7.
bogdanm 82:6473597d706e 5007 #define BF_AIPS_PACRF_SP7(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRF_SP7), uint32_t) & BM_AIPS_PACRF_SP7)
bogdanm 82:6473597d706e 5008
bogdanm 82:6473597d706e 5009 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5010 //! @brief Set the SP7 field to a new value.
bogdanm 82:6473597d706e 5011 #define BW_AIPS_PACRF_SP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP7) = (v))
bogdanm 82:6473597d706e 5012 #endif
bogdanm 82:6473597d706e 5013 //@}
bogdanm 82:6473597d706e 5014
bogdanm 82:6473597d706e 5015 /*!
bogdanm 82:6473597d706e 5016 * @name Register AIPS_PACRF, field TP6[4] (RW)
bogdanm 82:6473597d706e 5017 *
bogdanm 82:6473597d706e 5018 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 5019 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 5020 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 5021 *
bogdanm 82:6473597d706e 5022 * Values:
bogdanm 82:6473597d706e 5023 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 5024 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 5025 */
bogdanm 82:6473597d706e 5026 //@{
bogdanm 82:6473597d706e 5027 #define BP_AIPS_PACRF_TP6 (4U) //!< Bit position for AIPS_PACRF_TP6.
bogdanm 82:6473597d706e 5028 #define BM_AIPS_PACRF_TP6 (0x00000010U) //!< Bit mask for AIPS_PACRF_TP6.
bogdanm 82:6473597d706e 5029 #define BS_AIPS_PACRF_TP6 (1U) //!< Bit field size in bits for AIPS_PACRF_TP6.
bogdanm 82:6473597d706e 5030
bogdanm 82:6473597d706e 5031 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5032 //! @brief Read current value of the AIPS_PACRF_TP6 field.
bogdanm 82:6473597d706e 5033 #define BR_AIPS_PACRF_TP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP6))
bogdanm 82:6473597d706e 5034 #endif
bogdanm 82:6473597d706e 5035
bogdanm 82:6473597d706e 5036 //! @brief Format value for bitfield AIPS_PACRF_TP6.
bogdanm 82:6473597d706e 5037 #define BF_AIPS_PACRF_TP6(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRF_TP6), uint32_t) & BM_AIPS_PACRF_TP6)
bogdanm 82:6473597d706e 5038
bogdanm 82:6473597d706e 5039 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5040 //! @brief Set the TP6 field to a new value.
bogdanm 82:6473597d706e 5041 #define BW_AIPS_PACRF_TP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP6) = (v))
bogdanm 82:6473597d706e 5042 #endif
bogdanm 82:6473597d706e 5043 //@}
bogdanm 82:6473597d706e 5044
bogdanm 82:6473597d706e 5045 /*!
bogdanm 82:6473597d706e 5046 * @name Register AIPS_PACRF, field WP6[5] (RW)
bogdanm 82:6473597d706e 5047 *
bogdanm 82:6473597d706e 5048 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 5049 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 5050 * and no peripheral access initiates.
bogdanm 82:6473597d706e 5051 *
bogdanm 82:6473597d706e 5052 * Values:
bogdanm 82:6473597d706e 5053 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 5054 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 5055 */
bogdanm 82:6473597d706e 5056 //@{
bogdanm 82:6473597d706e 5057 #define BP_AIPS_PACRF_WP6 (5U) //!< Bit position for AIPS_PACRF_WP6.
bogdanm 82:6473597d706e 5058 #define BM_AIPS_PACRF_WP6 (0x00000020U) //!< Bit mask for AIPS_PACRF_WP6.
bogdanm 82:6473597d706e 5059 #define BS_AIPS_PACRF_WP6 (1U) //!< Bit field size in bits for AIPS_PACRF_WP6.
bogdanm 82:6473597d706e 5060
bogdanm 82:6473597d706e 5061 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5062 //! @brief Read current value of the AIPS_PACRF_WP6 field.
bogdanm 82:6473597d706e 5063 #define BR_AIPS_PACRF_WP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP6))
bogdanm 82:6473597d706e 5064 #endif
bogdanm 82:6473597d706e 5065
bogdanm 82:6473597d706e 5066 //! @brief Format value for bitfield AIPS_PACRF_WP6.
bogdanm 82:6473597d706e 5067 #define BF_AIPS_PACRF_WP6(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRF_WP6), uint32_t) & BM_AIPS_PACRF_WP6)
bogdanm 82:6473597d706e 5068
bogdanm 82:6473597d706e 5069 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5070 //! @brief Set the WP6 field to a new value.
bogdanm 82:6473597d706e 5071 #define BW_AIPS_PACRF_WP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP6) = (v))
bogdanm 82:6473597d706e 5072 #endif
bogdanm 82:6473597d706e 5073 //@}
bogdanm 82:6473597d706e 5074
bogdanm 82:6473597d706e 5075 /*!
bogdanm 82:6473597d706e 5076 * @name Register AIPS_PACRF, field SP6[6] (RW)
bogdanm 82:6473597d706e 5077 *
bogdanm 82:6473597d706e 5078 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 5079 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 5080 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 5081 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 5082 * access initiates.
bogdanm 82:6473597d706e 5083 *
bogdanm 82:6473597d706e 5084 * Values:
bogdanm 82:6473597d706e 5085 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 5086 * accesses.
bogdanm 82:6473597d706e 5087 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 5088 */
bogdanm 82:6473597d706e 5089 //@{
bogdanm 82:6473597d706e 5090 #define BP_AIPS_PACRF_SP6 (6U) //!< Bit position for AIPS_PACRF_SP6.
bogdanm 82:6473597d706e 5091 #define BM_AIPS_PACRF_SP6 (0x00000040U) //!< Bit mask for AIPS_PACRF_SP6.
bogdanm 82:6473597d706e 5092 #define BS_AIPS_PACRF_SP6 (1U) //!< Bit field size in bits for AIPS_PACRF_SP6.
bogdanm 82:6473597d706e 5093
bogdanm 82:6473597d706e 5094 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5095 //! @brief Read current value of the AIPS_PACRF_SP6 field.
bogdanm 82:6473597d706e 5096 #define BR_AIPS_PACRF_SP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP6))
bogdanm 82:6473597d706e 5097 #endif
bogdanm 82:6473597d706e 5098
bogdanm 82:6473597d706e 5099 //! @brief Format value for bitfield AIPS_PACRF_SP6.
bogdanm 82:6473597d706e 5100 #define BF_AIPS_PACRF_SP6(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRF_SP6), uint32_t) & BM_AIPS_PACRF_SP6)
bogdanm 82:6473597d706e 5101
bogdanm 82:6473597d706e 5102 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5103 //! @brief Set the SP6 field to a new value.
bogdanm 82:6473597d706e 5104 #define BW_AIPS_PACRF_SP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP6) = (v))
bogdanm 82:6473597d706e 5105 #endif
bogdanm 82:6473597d706e 5106 //@}
bogdanm 82:6473597d706e 5107
bogdanm 82:6473597d706e 5108 /*!
bogdanm 82:6473597d706e 5109 * @name Register AIPS_PACRF, field TP5[8] (RW)
bogdanm 82:6473597d706e 5110 *
bogdanm 82:6473597d706e 5111 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 5112 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 5113 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 5114 *
bogdanm 82:6473597d706e 5115 * Values:
bogdanm 82:6473597d706e 5116 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 5117 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 5118 */
bogdanm 82:6473597d706e 5119 //@{
bogdanm 82:6473597d706e 5120 #define BP_AIPS_PACRF_TP5 (8U) //!< Bit position for AIPS_PACRF_TP5.
bogdanm 82:6473597d706e 5121 #define BM_AIPS_PACRF_TP5 (0x00000100U) //!< Bit mask for AIPS_PACRF_TP5.
bogdanm 82:6473597d706e 5122 #define BS_AIPS_PACRF_TP5 (1U) //!< Bit field size in bits for AIPS_PACRF_TP5.
bogdanm 82:6473597d706e 5123
bogdanm 82:6473597d706e 5124 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5125 //! @brief Read current value of the AIPS_PACRF_TP5 field.
bogdanm 82:6473597d706e 5126 #define BR_AIPS_PACRF_TP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP5))
bogdanm 82:6473597d706e 5127 #endif
bogdanm 82:6473597d706e 5128
bogdanm 82:6473597d706e 5129 //! @brief Format value for bitfield AIPS_PACRF_TP5.
bogdanm 82:6473597d706e 5130 #define BF_AIPS_PACRF_TP5(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRF_TP5), uint32_t) & BM_AIPS_PACRF_TP5)
bogdanm 82:6473597d706e 5131
bogdanm 82:6473597d706e 5132 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5133 //! @brief Set the TP5 field to a new value.
bogdanm 82:6473597d706e 5134 #define BW_AIPS_PACRF_TP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP5) = (v))
bogdanm 82:6473597d706e 5135 #endif
bogdanm 82:6473597d706e 5136 //@}
bogdanm 82:6473597d706e 5137
bogdanm 82:6473597d706e 5138 /*!
bogdanm 82:6473597d706e 5139 * @name Register AIPS_PACRF, field WP5[9] (RW)
bogdanm 82:6473597d706e 5140 *
bogdanm 82:6473597d706e 5141 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 5142 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 5143 * and no peripheral access initiates.
bogdanm 82:6473597d706e 5144 *
bogdanm 82:6473597d706e 5145 * Values:
bogdanm 82:6473597d706e 5146 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 5147 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 5148 */
bogdanm 82:6473597d706e 5149 //@{
bogdanm 82:6473597d706e 5150 #define BP_AIPS_PACRF_WP5 (9U) //!< Bit position for AIPS_PACRF_WP5.
bogdanm 82:6473597d706e 5151 #define BM_AIPS_PACRF_WP5 (0x00000200U) //!< Bit mask for AIPS_PACRF_WP5.
bogdanm 82:6473597d706e 5152 #define BS_AIPS_PACRF_WP5 (1U) //!< Bit field size in bits for AIPS_PACRF_WP5.
bogdanm 82:6473597d706e 5153
bogdanm 82:6473597d706e 5154 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5155 //! @brief Read current value of the AIPS_PACRF_WP5 field.
bogdanm 82:6473597d706e 5156 #define BR_AIPS_PACRF_WP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP5))
bogdanm 82:6473597d706e 5157 #endif
bogdanm 82:6473597d706e 5158
bogdanm 82:6473597d706e 5159 //! @brief Format value for bitfield AIPS_PACRF_WP5.
bogdanm 82:6473597d706e 5160 #define BF_AIPS_PACRF_WP5(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRF_WP5), uint32_t) & BM_AIPS_PACRF_WP5)
bogdanm 82:6473597d706e 5161
bogdanm 82:6473597d706e 5162 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5163 //! @brief Set the WP5 field to a new value.
bogdanm 82:6473597d706e 5164 #define BW_AIPS_PACRF_WP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP5) = (v))
bogdanm 82:6473597d706e 5165 #endif
bogdanm 82:6473597d706e 5166 //@}
bogdanm 82:6473597d706e 5167
bogdanm 82:6473597d706e 5168 /*!
bogdanm 82:6473597d706e 5169 * @name Register AIPS_PACRF, field SP5[10] (RW)
bogdanm 82:6473597d706e 5170 *
bogdanm 82:6473597d706e 5171 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 5172 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 5173 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 5174 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 5175 * access initiates.
bogdanm 82:6473597d706e 5176 *
bogdanm 82:6473597d706e 5177 * Values:
bogdanm 82:6473597d706e 5178 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 5179 * accesses.
bogdanm 82:6473597d706e 5180 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 5181 */
bogdanm 82:6473597d706e 5182 //@{
bogdanm 82:6473597d706e 5183 #define BP_AIPS_PACRF_SP5 (10U) //!< Bit position for AIPS_PACRF_SP5.
bogdanm 82:6473597d706e 5184 #define BM_AIPS_PACRF_SP5 (0x00000400U) //!< Bit mask for AIPS_PACRF_SP5.
bogdanm 82:6473597d706e 5185 #define BS_AIPS_PACRF_SP5 (1U) //!< Bit field size in bits for AIPS_PACRF_SP5.
bogdanm 82:6473597d706e 5186
bogdanm 82:6473597d706e 5187 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5188 //! @brief Read current value of the AIPS_PACRF_SP5 field.
bogdanm 82:6473597d706e 5189 #define BR_AIPS_PACRF_SP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP5))
bogdanm 82:6473597d706e 5190 #endif
bogdanm 82:6473597d706e 5191
bogdanm 82:6473597d706e 5192 //! @brief Format value for bitfield AIPS_PACRF_SP5.
bogdanm 82:6473597d706e 5193 #define BF_AIPS_PACRF_SP5(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRF_SP5), uint32_t) & BM_AIPS_PACRF_SP5)
bogdanm 82:6473597d706e 5194
bogdanm 82:6473597d706e 5195 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5196 //! @brief Set the SP5 field to a new value.
bogdanm 82:6473597d706e 5197 #define BW_AIPS_PACRF_SP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP5) = (v))
bogdanm 82:6473597d706e 5198 #endif
bogdanm 82:6473597d706e 5199 //@}
bogdanm 82:6473597d706e 5200
bogdanm 82:6473597d706e 5201 /*!
bogdanm 82:6473597d706e 5202 * @name Register AIPS_PACRF, field TP4[12] (RW)
bogdanm 82:6473597d706e 5203 *
bogdanm 82:6473597d706e 5204 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 5205 * When this bit is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 5206 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 5207 *
bogdanm 82:6473597d706e 5208 * Values:
bogdanm 82:6473597d706e 5209 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 5210 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 5211 */
bogdanm 82:6473597d706e 5212 //@{
bogdanm 82:6473597d706e 5213 #define BP_AIPS_PACRF_TP4 (12U) //!< Bit position for AIPS_PACRF_TP4.
bogdanm 82:6473597d706e 5214 #define BM_AIPS_PACRF_TP4 (0x00001000U) //!< Bit mask for AIPS_PACRF_TP4.
bogdanm 82:6473597d706e 5215 #define BS_AIPS_PACRF_TP4 (1U) //!< Bit field size in bits for AIPS_PACRF_TP4.
bogdanm 82:6473597d706e 5216
bogdanm 82:6473597d706e 5217 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5218 //! @brief Read current value of the AIPS_PACRF_TP4 field.
bogdanm 82:6473597d706e 5219 #define BR_AIPS_PACRF_TP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP4))
bogdanm 82:6473597d706e 5220 #endif
bogdanm 82:6473597d706e 5221
bogdanm 82:6473597d706e 5222 //! @brief Format value for bitfield AIPS_PACRF_TP4.
bogdanm 82:6473597d706e 5223 #define BF_AIPS_PACRF_TP4(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRF_TP4), uint32_t) & BM_AIPS_PACRF_TP4)
bogdanm 82:6473597d706e 5224
bogdanm 82:6473597d706e 5225 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5226 //! @brief Set the TP4 field to a new value.
bogdanm 82:6473597d706e 5227 #define BW_AIPS_PACRF_TP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP4) = (v))
bogdanm 82:6473597d706e 5228 #endif
bogdanm 82:6473597d706e 5229 //@}
bogdanm 82:6473597d706e 5230
bogdanm 82:6473597d706e 5231 /*!
bogdanm 82:6473597d706e 5232 * @name Register AIPS_PACRF, field WP4[13] (RW)
bogdanm 82:6473597d706e 5233 *
bogdanm 82:6473597d706e 5234 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 5235 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 5236 * and no peripheral access initiates.
bogdanm 82:6473597d706e 5237 *
bogdanm 82:6473597d706e 5238 * Values:
bogdanm 82:6473597d706e 5239 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 5240 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 5241 */
bogdanm 82:6473597d706e 5242 //@{
bogdanm 82:6473597d706e 5243 #define BP_AIPS_PACRF_WP4 (13U) //!< Bit position for AIPS_PACRF_WP4.
bogdanm 82:6473597d706e 5244 #define BM_AIPS_PACRF_WP4 (0x00002000U) //!< Bit mask for AIPS_PACRF_WP4.
bogdanm 82:6473597d706e 5245 #define BS_AIPS_PACRF_WP4 (1U) //!< Bit field size in bits for AIPS_PACRF_WP4.
bogdanm 82:6473597d706e 5246
bogdanm 82:6473597d706e 5247 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5248 //! @brief Read current value of the AIPS_PACRF_WP4 field.
bogdanm 82:6473597d706e 5249 #define BR_AIPS_PACRF_WP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP4))
bogdanm 82:6473597d706e 5250 #endif
bogdanm 82:6473597d706e 5251
bogdanm 82:6473597d706e 5252 //! @brief Format value for bitfield AIPS_PACRF_WP4.
bogdanm 82:6473597d706e 5253 #define BF_AIPS_PACRF_WP4(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRF_WP4), uint32_t) & BM_AIPS_PACRF_WP4)
bogdanm 82:6473597d706e 5254
bogdanm 82:6473597d706e 5255 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5256 //! @brief Set the WP4 field to a new value.
bogdanm 82:6473597d706e 5257 #define BW_AIPS_PACRF_WP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP4) = (v))
bogdanm 82:6473597d706e 5258 #endif
bogdanm 82:6473597d706e 5259 //@}
bogdanm 82:6473597d706e 5260
bogdanm 82:6473597d706e 5261 /*!
bogdanm 82:6473597d706e 5262 * @name Register AIPS_PACRF, field SP4[14] (RW)
bogdanm 82:6473597d706e 5263 *
bogdanm 82:6473597d706e 5264 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 5265 * access. When this bit is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 5266 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
bogdanm 82:6473597d706e 5267 * set. If not, access terminates with an error response and no peripheral access
bogdanm 82:6473597d706e 5268 * initiates.
bogdanm 82:6473597d706e 5269 *
bogdanm 82:6473597d706e 5270 * Values:
bogdanm 82:6473597d706e 5271 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 5272 * accesses.
bogdanm 82:6473597d706e 5273 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 5274 */
bogdanm 82:6473597d706e 5275 //@{
bogdanm 82:6473597d706e 5276 #define BP_AIPS_PACRF_SP4 (14U) //!< Bit position for AIPS_PACRF_SP4.
bogdanm 82:6473597d706e 5277 #define BM_AIPS_PACRF_SP4 (0x00004000U) //!< Bit mask for AIPS_PACRF_SP4.
bogdanm 82:6473597d706e 5278 #define BS_AIPS_PACRF_SP4 (1U) //!< Bit field size in bits for AIPS_PACRF_SP4.
bogdanm 82:6473597d706e 5279
bogdanm 82:6473597d706e 5280 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5281 //! @brief Read current value of the AIPS_PACRF_SP4 field.
bogdanm 82:6473597d706e 5282 #define BR_AIPS_PACRF_SP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP4))
bogdanm 82:6473597d706e 5283 #endif
bogdanm 82:6473597d706e 5284
bogdanm 82:6473597d706e 5285 //! @brief Format value for bitfield AIPS_PACRF_SP4.
bogdanm 82:6473597d706e 5286 #define BF_AIPS_PACRF_SP4(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRF_SP4), uint32_t) & BM_AIPS_PACRF_SP4)
bogdanm 82:6473597d706e 5287
bogdanm 82:6473597d706e 5288 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5289 //! @brief Set the SP4 field to a new value.
bogdanm 82:6473597d706e 5290 #define BW_AIPS_PACRF_SP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP4) = (v))
bogdanm 82:6473597d706e 5291 #endif
bogdanm 82:6473597d706e 5292 //@}
bogdanm 82:6473597d706e 5293
bogdanm 82:6473597d706e 5294 /*!
bogdanm 82:6473597d706e 5295 * @name Register AIPS_PACRF, field TP3[16] (RW)
bogdanm 82:6473597d706e 5296 *
bogdanm 82:6473597d706e 5297 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 5298 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 5299 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 5300 *
bogdanm 82:6473597d706e 5301 * Values:
bogdanm 82:6473597d706e 5302 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 5303 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 5304 */
bogdanm 82:6473597d706e 5305 //@{
bogdanm 82:6473597d706e 5306 #define BP_AIPS_PACRF_TP3 (16U) //!< Bit position for AIPS_PACRF_TP3.
bogdanm 82:6473597d706e 5307 #define BM_AIPS_PACRF_TP3 (0x00010000U) //!< Bit mask for AIPS_PACRF_TP3.
bogdanm 82:6473597d706e 5308 #define BS_AIPS_PACRF_TP3 (1U) //!< Bit field size in bits for AIPS_PACRF_TP3.
bogdanm 82:6473597d706e 5309
bogdanm 82:6473597d706e 5310 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5311 //! @brief Read current value of the AIPS_PACRF_TP3 field.
bogdanm 82:6473597d706e 5312 #define BR_AIPS_PACRF_TP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP3))
bogdanm 82:6473597d706e 5313 #endif
bogdanm 82:6473597d706e 5314
bogdanm 82:6473597d706e 5315 //! @brief Format value for bitfield AIPS_PACRF_TP3.
bogdanm 82:6473597d706e 5316 #define BF_AIPS_PACRF_TP3(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRF_TP3), uint32_t) & BM_AIPS_PACRF_TP3)
bogdanm 82:6473597d706e 5317
bogdanm 82:6473597d706e 5318 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5319 //! @brief Set the TP3 field to a new value.
bogdanm 82:6473597d706e 5320 #define BW_AIPS_PACRF_TP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP3) = (v))
bogdanm 82:6473597d706e 5321 #endif
bogdanm 82:6473597d706e 5322 //@}
bogdanm 82:6473597d706e 5323
bogdanm 82:6473597d706e 5324 /*!
bogdanm 82:6473597d706e 5325 * @name Register AIPS_PACRF, field WP3[17] (RW)
bogdanm 82:6473597d706e 5326 *
bogdanm 82:6473597d706e 5327 * Determines whether the peripheral allows write accesss. When this bit is set
bogdanm 82:6473597d706e 5328 * and a write access is attempted, access terminates with an error response and
bogdanm 82:6473597d706e 5329 * no peripheral access initiates.
bogdanm 82:6473597d706e 5330 *
bogdanm 82:6473597d706e 5331 * Values:
bogdanm 82:6473597d706e 5332 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 5333 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 5334 */
bogdanm 82:6473597d706e 5335 //@{
bogdanm 82:6473597d706e 5336 #define BP_AIPS_PACRF_WP3 (17U) //!< Bit position for AIPS_PACRF_WP3.
bogdanm 82:6473597d706e 5337 #define BM_AIPS_PACRF_WP3 (0x00020000U) //!< Bit mask for AIPS_PACRF_WP3.
bogdanm 82:6473597d706e 5338 #define BS_AIPS_PACRF_WP3 (1U) //!< Bit field size in bits for AIPS_PACRF_WP3.
bogdanm 82:6473597d706e 5339
bogdanm 82:6473597d706e 5340 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5341 //! @brief Read current value of the AIPS_PACRF_WP3 field.
bogdanm 82:6473597d706e 5342 #define BR_AIPS_PACRF_WP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP3))
bogdanm 82:6473597d706e 5343 #endif
bogdanm 82:6473597d706e 5344
bogdanm 82:6473597d706e 5345 //! @brief Format value for bitfield AIPS_PACRF_WP3.
bogdanm 82:6473597d706e 5346 #define BF_AIPS_PACRF_WP3(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRF_WP3), uint32_t) & BM_AIPS_PACRF_WP3)
bogdanm 82:6473597d706e 5347
bogdanm 82:6473597d706e 5348 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5349 //! @brief Set the WP3 field to a new value.
bogdanm 82:6473597d706e 5350 #define BW_AIPS_PACRF_WP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP3) = (v))
bogdanm 82:6473597d706e 5351 #endif
bogdanm 82:6473597d706e 5352 //@}
bogdanm 82:6473597d706e 5353
bogdanm 82:6473597d706e 5354 /*!
bogdanm 82:6473597d706e 5355 * @name Register AIPS_PACRF, field SP3[18] (RW)
bogdanm 82:6473597d706e 5356 *
bogdanm 82:6473597d706e 5357 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 5358 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 5359 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 5360 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 5361 * access initiates.
bogdanm 82:6473597d706e 5362 *
bogdanm 82:6473597d706e 5363 * Values:
bogdanm 82:6473597d706e 5364 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 5365 * accesses.
bogdanm 82:6473597d706e 5366 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 5367 */
bogdanm 82:6473597d706e 5368 //@{
bogdanm 82:6473597d706e 5369 #define BP_AIPS_PACRF_SP3 (18U) //!< Bit position for AIPS_PACRF_SP3.
bogdanm 82:6473597d706e 5370 #define BM_AIPS_PACRF_SP3 (0x00040000U) //!< Bit mask for AIPS_PACRF_SP3.
bogdanm 82:6473597d706e 5371 #define BS_AIPS_PACRF_SP3 (1U) //!< Bit field size in bits for AIPS_PACRF_SP3.
bogdanm 82:6473597d706e 5372
bogdanm 82:6473597d706e 5373 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5374 //! @brief Read current value of the AIPS_PACRF_SP3 field.
bogdanm 82:6473597d706e 5375 #define BR_AIPS_PACRF_SP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP3))
bogdanm 82:6473597d706e 5376 #endif
bogdanm 82:6473597d706e 5377
bogdanm 82:6473597d706e 5378 //! @brief Format value for bitfield AIPS_PACRF_SP3.
bogdanm 82:6473597d706e 5379 #define BF_AIPS_PACRF_SP3(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRF_SP3), uint32_t) & BM_AIPS_PACRF_SP3)
bogdanm 82:6473597d706e 5380
bogdanm 82:6473597d706e 5381 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5382 //! @brief Set the SP3 field to a new value.
bogdanm 82:6473597d706e 5383 #define BW_AIPS_PACRF_SP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP3) = (v))
bogdanm 82:6473597d706e 5384 #endif
bogdanm 82:6473597d706e 5385 //@}
bogdanm 82:6473597d706e 5386
bogdanm 82:6473597d706e 5387 /*!
bogdanm 82:6473597d706e 5388 * @name Register AIPS_PACRF, field TP2[20] (RW)
bogdanm 82:6473597d706e 5389 *
bogdanm 82:6473597d706e 5390 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 5391 * When this bit is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 5392 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 5393 *
bogdanm 82:6473597d706e 5394 * Values:
bogdanm 82:6473597d706e 5395 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 5396 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 5397 */
bogdanm 82:6473597d706e 5398 //@{
bogdanm 82:6473597d706e 5399 #define BP_AIPS_PACRF_TP2 (20U) //!< Bit position for AIPS_PACRF_TP2.
bogdanm 82:6473597d706e 5400 #define BM_AIPS_PACRF_TP2 (0x00100000U) //!< Bit mask for AIPS_PACRF_TP2.
bogdanm 82:6473597d706e 5401 #define BS_AIPS_PACRF_TP2 (1U) //!< Bit field size in bits for AIPS_PACRF_TP2.
bogdanm 82:6473597d706e 5402
bogdanm 82:6473597d706e 5403 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5404 //! @brief Read current value of the AIPS_PACRF_TP2 field.
bogdanm 82:6473597d706e 5405 #define BR_AIPS_PACRF_TP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP2))
bogdanm 82:6473597d706e 5406 #endif
bogdanm 82:6473597d706e 5407
bogdanm 82:6473597d706e 5408 //! @brief Format value for bitfield AIPS_PACRF_TP2.
bogdanm 82:6473597d706e 5409 #define BF_AIPS_PACRF_TP2(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRF_TP2), uint32_t) & BM_AIPS_PACRF_TP2)
bogdanm 82:6473597d706e 5410
bogdanm 82:6473597d706e 5411 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5412 //! @brief Set the TP2 field to a new value.
bogdanm 82:6473597d706e 5413 #define BW_AIPS_PACRF_TP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP2) = (v))
bogdanm 82:6473597d706e 5414 #endif
bogdanm 82:6473597d706e 5415 //@}
bogdanm 82:6473597d706e 5416
bogdanm 82:6473597d706e 5417 /*!
bogdanm 82:6473597d706e 5418 * @name Register AIPS_PACRF, field WP2[21] (RW)
bogdanm 82:6473597d706e 5419 *
bogdanm 82:6473597d706e 5420 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 5421 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 5422 * and no peripheral access initiates.
bogdanm 82:6473597d706e 5423 *
bogdanm 82:6473597d706e 5424 * Values:
bogdanm 82:6473597d706e 5425 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 5426 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 5427 */
bogdanm 82:6473597d706e 5428 //@{
bogdanm 82:6473597d706e 5429 #define BP_AIPS_PACRF_WP2 (21U) //!< Bit position for AIPS_PACRF_WP2.
bogdanm 82:6473597d706e 5430 #define BM_AIPS_PACRF_WP2 (0x00200000U) //!< Bit mask for AIPS_PACRF_WP2.
bogdanm 82:6473597d706e 5431 #define BS_AIPS_PACRF_WP2 (1U) //!< Bit field size in bits for AIPS_PACRF_WP2.
bogdanm 82:6473597d706e 5432
bogdanm 82:6473597d706e 5433 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5434 //! @brief Read current value of the AIPS_PACRF_WP2 field.
bogdanm 82:6473597d706e 5435 #define BR_AIPS_PACRF_WP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP2))
bogdanm 82:6473597d706e 5436 #endif
bogdanm 82:6473597d706e 5437
bogdanm 82:6473597d706e 5438 //! @brief Format value for bitfield AIPS_PACRF_WP2.
bogdanm 82:6473597d706e 5439 #define BF_AIPS_PACRF_WP2(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRF_WP2), uint32_t) & BM_AIPS_PACRF_WP2)
bogdanm 82:6473597d706e 5440
bogdanm 82:6473597d706e 5441 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5442 //! @brief Set the WP2 field to a new value.
bogdanm 82:6473597d706e 5443 #define BW_AIPS_PACRF_WP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP2) = (v))
bogdanm 82:6473597d706e 5444 #endif
bogdanm 82:6473597d706e 5445 //@}
bogdanm 82:6473597d706e 5446
bogdanm 82:6473597d706e 5447 /*!
bogdanm 82:6473597d706e 5448 * @name Register AIPS_PACRF, field SP2[22] (RW)
bogdanm 82:6473597d706e 5449 *
bogdanm 82:6473597d706e 5450 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 5451 * access. When this bit is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 5452 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
bogdanm 82:6473597d706e 5453 * set. If not, access terminates with an error response and no peripheral access
bogdanm 82:6473597d706e 5454 * initiates.
bogdanm 82:6473597d706e 5455 *
bogdanm 82:6473597d706e 5456 * Values:
bogdanm 82:6473597d706e 5457 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 5458 * accesses.
bogdanm 82:6473597d706e 5459 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 5460 */
bogdanm 82:6473597d706e 5461 //@{
bogdanm 82:6473597d706e 5462 #define BP_AIPS_PACRF_SP2 (22U) //!< Bit position for AIPS_PACRF_SP2.
bogdanm 82:6473597d706e 5463 #define BM_AIPS_PACRF_SP2 (0x00400000U) //!< Bit mask for AIPS_PACRF_SP2.
bogdanm 82:6473597d706e 5464 #define BS_AIPS_PACRF_SP2 (1U) //!< Bit field size in bits for AIPS_PACRF_SP2.
bogdanm 82:6473597d706e 5465
bogdanm 82:6473597d706e 5466 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5467 //! @brief Read current value of the AIPS_PACRF_SP2 field.
bogdanm 82:6473597d706e 5468 #define BR_AIPS_PACRF_SP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP2))
bogdanm 82:6473597d706e 5469 #endif
bogdanm 82:6473597d706e 5470
bogdanm 82:6473597d706e 5471 //! @brief Format value for bitfield AIPS_PACRF_SP2.
bogdanm 82:6473597d706e 5472 #define BF_AIPS_PACRF_SP2(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRF_SP2), uint32_t) & BM_AIPS_PACRF_SP2)
bogdanm 82:6473597d706e 5473
bogdanm 82:6473597d706e 5474 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5475 //! @brief Set the SP2 field to a new value.
bogdanm 82:6473597d706e 5476 #define BW_AIPS_PACRF_SP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP2) = (v))
bogdanm 82:6473597d706e 5477 #endif
bogdanm 82:6473597d706e 5478 //@}
bogdanm 82:6473597d706e 5479
bogdanm 82:6473597d706e 5480 /*!
bogdanm 82:6473597d706e 5481 * @name Register AIPS_PACRF, field TP1[24] (RW)
bogdanm 82:6473597d706e 5482 *
bogdanm 82:6473597d706e 5483 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 5484 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 5485 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 5486 *
bogdanm 82:6473597d706e 5487 * Values:
bogdanm 82:6473597d706e 5488 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 5489 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 5490 */
bogdanm 82:6473597d706e 5491 //@{
bogdanm 82:6473597d706e 5492 #define BP_AIPS_PACRF_TP1 (24U) //!< Bit position for AIPS_PACRF_TP1.
bogdanm 82:6473597d706e 5493 #define BM_AIPS_PACRF_TP1 (0x01000000U) //!< Bit mask for AIPS_PACRF_TP1.
bogdanm 82:6473597d706e 5494 #define BS_AIPS_PACRF_TP1 (1U) //!< Bit field size in bits for AIPS_PACRF_TP1.
bogdanm 82:6473597d706e 5495
bogdanm 82:6473597d706e 5496 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5497 //! @brief Read current value of the AIPS_PACRF_TP1 field.
bogdanm 82:6473597d706e 5498 #define BR_AIPS_PACRF_TP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP1))
bogdanm 82:6473597d706e 5499 #endif
bogdanm 82:6473597d706e 5500
bogdanm 82:6473597d706e 5501 //! @brief Format value for bitfield AIPS_PACRF_TP1.
bogdanm 82:6473597d706e 5502 #define BF_AIPS_PACRF_TP1(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRF_TP1), uint32_t) & BM_AIPS_PACRF_TP1)
bogdanm 82:6473597d706e 5503
bogdanm 82:6473597d706e 5504 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5505 //! @brief Set the TP1 field to a new value.
bogdanm 82:6473597d706e 5506 #define BW_AIPS_PACRF_TP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP1) = (v))
bogdanm 82:6473597d706e 5507 #endif
bogdanm 82:6473597d706e 5508 //@}
bogdanm 82:6473597d706e 5509
bogdanm 82:6473597d706e 5510 /*!
bogdanm 82:6473597d706e 5511 * @name Register AIPS_PACRF, field WP1[25] (RW)
bogdanm 82:6473597d706e 5512 *
bogdanm 82:6473597d706e 5513 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 5514 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 5515 * and no peripheral access initiates.
bogdanm 82:6473597d706e 5516 *
bogdanm 82:6473597d706e 5517 * Values:
bogdanm 82:6473597d706e 5518 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 5519 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 5520 */
bogdanm 82:6473597d706e 5521 //@{
bogdanm 82:6473597d706e 5522 #define BP_AIPS_PACRF_WP1 (25U) //!< Bit position for AIPS_PACRF_WP1.
bogdanm 82:6473597d706e 5523 #define BM_AIPS_PACRF_WP1 (0x02000000U) //!< Bit mask for AIPS_PACRF_WP1.
bogdanm 82:6473597d706e 5524 #define BS_AIPS_PACRF_WP1 (1U) //!< Bit field size in bits for AIPS_PACRF_WP1.
bogdanm 82:6473597d706e 5525
bogdanm 82:6473597d706e 5526 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5527 //! @brief Read current value of the AIPS_PACRF_WP1 field.
bogdanm 82:6473597d706e 5528 #define BR_AIPS_PACRF_WP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP1))
bogdanm 82:6473597d706e 5529 #endif
bogdanm 82:6473597d706e 5530
bogdanm 82:6473597d706e 5531 //! @brief Format value for bitfield AIPS_PACRF_WP1.
bogdanm 82:6473597d706e 5532 #define BF_AIPS_PACRF_WP1(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRF_WP1), uint32_t) & BM_AIPS_PACRF_WP1)
bogdanm 82:6473597d706e 5533
bogdanm 82:6473597d706e 5534 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5535 //! @brief Set the WP1 field to a new value.
bogdanm 82:6473597d706e 5536 #define BW_AIPS_PACRF_WP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP1) = (v))
bogdanm 82:6473597d706e 5537 #endif
bogdanm 82:6473597d706e 5538 //@}
bogdanm 82:6473597d706e 5539
bogdanm 82:6473597d706e 5540 /*!
bogdanm 82:6473597d706e 5541 * @name Register AIPS_PACRF, field SP1[26] (RW)
bogdanm 82:6473597d706e 5542 *
bogdanm 82:6473597d706e 5543 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 5544 * access. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 5545 * supervisor access attribute, and the MPRx[MPLn] control field for the master must
bogdanm 82:6473597d706e 5546 * be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 5547 * access initiates.
bogdanm 82:6473597d706e 5548 *
bogdanm 82:6473597d706e 5549 * Values:
bogdanm 82:6473597d706e 5550 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 5551 * accesses.
bogdanm 82:6473597d706e 5552 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 5553 */
bogdanm 82:6473597d706e 5554 //@{
bogdanm 82:6473597d706e 5555 #define BP_AIPS_PACRF_SP1 (26U) //!< Bit position for AIPS_PACRF_SP1.
bogdanm 82:6473597d706e 5556 #define BM_AIPS_PACRF_SP1 (0x04000000U) //!< Bit mask for AIPS_PACRF_SP1.
bogdanm 82:6473597d706e 5557 #define BS_AIPS_PACRF_SP1 (1U) //!< Bit field size in bits for AIPS_PACRF_SP1.
bogdanm 82:6473597d706e 5558
bogdanm 82:6473597d706e 5559 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5560 //! @brief Read current value of the AIPS_PACRF_SP1 field.
bogdanm 82:6473597d706e 5561 #define BR_AIPS_PACRF_SP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP1))
bogdanm 82:6473597d706e 5562 #endif
bogdanm 82:6473597d706e 5563
bogdanm 82:6473597d706e 5564 //! @brief Format value for bitfield AIPS_PACRF_SP1.
bogdanm 82:6473597d706e 5565 #define BF_AIPS_PACRF_SP1(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRF_SP1), uint32_t) & BM_AIPS_PACRF_SP1)
bogdanm 82:6473597d706e 5566
bogdanm 82:6473597d706e 5567 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5568 //! @brief Set the SP1 field to a new value.
bogdanm 82:6473597d706e 5569 #define BW_AIPS_PACRF_SP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP1) = (v))
bogdanm 82:6473597d706e 5570 #endif
bogdanm 82:6473597d706e 5571 //@}
bogdanm 82:6473597d706e 5572
bogdanm 82:6473597d706e 5573 /*!
bogdanm 82:6473597d706e 5574 * @name Register AIPS_PACRF, field TP0[28] (RW)
bogdanm 82:6473597d706e 5575 *
bogdanm 82:6473597d706e 5576 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 5577 * When this bit is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 5578 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 5579 *
bogdanm 82:6473597d706e 5580 * Values:
bogdanm 82:6473597d706e 5581 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 5582 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 5583 */
bogdanm 82:6473597d706e 5584 //@{
bogdanm 82:6473597d706e 5585 #define BP_AIPS_PACRF_TP0 (28U) //!< Bit position for AIPS_PACRF_TP0.
bogdanm 82:6473597d706e 5586 #define BM_AIPS_PACRF_TP0 (0x10000000U) //!< Bit mask for AIPS_PACRF_TP0.
bogdanm 82:6473597d706e 5587 #define BS_AIPS_PACRF_TP0 (1U) //!< Bit field size in bits for AIPS_PACRF_TP0.
bogdanm 82:6473597d706e 5588
bogdanm 82:6473597d706e 5589 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5590 //! @brief Read current value of the AIPS_PACRF_TP0 field.
bogdanm 82:6473597d706e 5591 #define BR_AIPS_PACRF_TP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP0))
bogdanm 82:6473597d706e 5592 #endif
bogdanm 82:6473597d706e 5593
bogdanm 82:6473597d706e 5594 //! @brief Format value for bitfield AIPS_PACRF_TP0.
bogdanm 82:6473597d706e 5595 #define BF_AIPS_PACRF_TP0(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRF_TP0), uint32_t) & BM_AIPS_PACRF_TP0)
bogdanm 82:6473597d706e 5596
bogdanm 82:6473597d706e 5597 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5598 //! @brief Set the TP0 field to a new value.
bogdanm 82:6473597d706e 5599 #define BW_AIPS_PACRF_TP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_TP0) = (v))
bogdanm 82:6473597d706e 5600 #endif
bogdanm 82:6473597d706e 5601 //@}
bogdanm 82:6473597d706e 5602
bogdanm 82:6473597d706e 5603 /*!
bogdanm 82:6473597d706e 5604 * @name Register AIPS_PACRF, field WP0[29] (RW)
bogdanm 82:6473597d706e 5605 *
bogdanm 82:6473597d706e 5606 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 5607 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 5608 * and no peripheral access initiates.
bogdanm 82:6473597d706e 5609 *
bogdanm 82:6473597d706e 5610 * Values:
bogdanm 82:6473597d706e 5611 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 5612 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 5613 */
bogdanm 82:6473597d706e 5614 //@{
bogdanm 82:6473597d706e 5615 #define BP_AIPS_PACRF_WP0 (29U) //!< Bit position for AIPS_PACRF_WP0.
bogdanm 82:6473597d706e 5616 #define BM_AIPS_PACRF_WP0 (0x20000000U) //!< Bit mask for AIPS_PACRF_WP0.
bogdanm 82:6473597d706e 5617 #define BS_AIPS_PACRF_WP0 (1U) //!< Bit field size in bits for AIPS_PACRF_WP0.
bogdanm 82:6473597d706e 5618
bogdanm 82:6473597d706e 5619 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5620 //! @brief Read current value of the AIPS_PACRF_WP0 field.
bogdanm 82:6473597d706e 5621 #define BR_AIPS_PACRF_WP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP0))
bogdanm 82:6473597d706e 5622 #endif
bogdanm 82:6473597d706e 5623
bogdanm 82:6473597d706e 5624 //! @brief Format value for bitfield AIPS_PACRF_WP0.
bogdanm 82:6473597d706e 5625 #define BF_AIPS_PACRF_WP0(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRF_WP0), uint32_t) & BM_AIPS_PACRF_WP0)
bogdanm 82:6473597d706e 5626
bogdanm 82:6473597d706e 5627 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5628 //! @brief Set the WP0 field to a new value.
bogdanm 82:6473597d706e 5629 #define BW_AIPS_PACRF_WP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_WP0) = (v))
bogdanm 82:6473597d706e 5630 #endif
bogdanm 82:6473597d706e 5631 //@}
bogdanm 82:6473597d706e 5632
bogdanm 82:6473597d706e 5633 /*!
bogdanm 82:6473597d706e 5634 * @name Register AIPS_PACRF, field SP0[30] (RW)
bogdanm 82:6473597d706e 5635 *
bogdanm 82:6473597d706e 5636 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 5637 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 5638 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 5639 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 5640 * access initiates.
bogdanm 82:6473597d706e 5641 *
bogdanm 82:6473597d706e 5642 * Values:
bogdanm 82:6473597d706e 5643 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 5644 * accesses.
bogdanm 82:6473597d706e 5645 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 5646 */
bogdanm 82:6473597d706e 5647 //@{
bogdanm 82:6473597d706e 5648 #define BP_AIPS_PACRF_SP0 (30U) //!< Bit position for AIPS_PACRF_SP0.
bogdanm 82:6473597d706e 5649 #define BM_AIPS_PACRF_SP0 (0x40000000U) //!< Bit mask for AIPS_PACRF_SP0.
bogdanm 82:6473597d706e 5650 #define BS_AIPS_PACRF_SP0 (1U) //!< Bit field size in bits for AIPS_PACRF_SP0.
bogdanm 82:6473597d706e 5651
bogdanm 82:6473597d706e 5652 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5653 //! @brief Read current value of the AIPS_PACRF_SP0 field.
bogdanm 82:6473597d706e 5654 #define BR_AIPS_PACRF_SP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP0))
bogdanm 82:6473597d706e 5655 #endif
bogdanm 82:6473597d706e 5656
bogdanm 82:6473597d706e 5657 //! @brief Format value for bitfield AIPS_PACRF_SP0.
bogdanm 82:6473597d706e 5658 #define BF_AIPS_PACRF_SP0(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRF_SP0), uint32_t) & BM_AIPS_PACRF_SP0)
bogdanm 82:6473597d706e 5659
bogdanm 82:6473597d706e 5660 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5661 //! @brief Set the SP0 field to a new value.
bogdanm 82:6473597d706e 5662 #define BW_AIPS_PACRF_SP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRF_ADDR(x), BP_AIPS_PACRF_SP0) = (v))
bogdanm 82:6473597d706e 5663 #endif
bogdanm 82:6473597d706e 5664 //@}
bogdanm 82:6473597d706e 5665
bogdanm 82:6473597d706e 5666 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 5667 // HW_AIPS_PACRG - Peripheral Access Control Register
bogdanm 82:6473597d706e 5668 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 5669
bogdanm 82:6473597d706e 5670 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5671 /*!
bogdanm 82:6473597d706e 5672 * @brief HW_AIPS_PACRG - Peripheral Access Control Register (RW)
bogdanm 82:6473597d706e 5673 *
bogdanm 82:6473597d706e 5674 * Reset value: 0x44444444U
bogdanm 82:6473597d706e 5675 *
bogdanm 82:6473597d706e 5676 * This section describes PACR registers E-P, which control peripheral slots
bogdanm 82:6473597d706e 5677 * 32-127. See PACRPeripheral Access Control Register for the description of these
bogdanm 82:6473597d706e 5678 * registers.
bogdanm 82:6473597d706e 5679 */
bogdanm 82:6473597d706e 5680 typedef union _hw_aips_pacrg
bogdanm 82:6473597d706e 5681 {
bogdanm 82:6473597d706e 5682 uint32_t U;
bogdanm 82:6473597d706e 5683 struct _hw_aips_pacrg_bitfields
bogdanm 82:6473597d706e 5684 {
bogdanm 82:6473597d706e 5685 uint32_t TP7 : 1; //!< [0] Trusted Protect
bogdanm 82:6473597d706e 5686 uint32_t WP7 : 1; //!< [1] Write Protect
bogdanm 82:6473597d706e 5687 uint32_t SP7 : 1; //!< [2] Supervisor Protect
bogdanm 82:6473597d706e 5688 uint32_t RESERVED0 : 1; //!< [3]
bogdanm 82:6473597d706e 5689 uint32_t TP6 : 1; //!< [4] Trusted Protect
bogdanm 82:6473597d706e 5690 uint32_t WP6 : 1; //!< [5] Write Protect
bogdanm 82:6473597d706e 5691 uint32_t SP6 : 1; //!< [6] Supervisor Protect
bogdanm 82:6473597d706e 5692 uint32_t RESERVED1 : 1; //!< [7]
bogdanm 82:6473597d706e 5693 uint32_t TP5 : 1; //!< [8] Trusted Protect
bogdanm 82:6473597d706e 5694 uint32_t WP5 : 1; //!< [9] Write Protect
bogdanm 82:6473597d706e 5695 uint32_t SP5 : 1; //!< [10] Supervisor Protect
bogdanm 82:6473597d706e 5696 uint32_t RESERVED2 : 1; //!< [11]
bogdanm 82:6473597d706e 5697 uint32_t TP4 : 1; //!< [12] Trusted Protect
bogdanm 82:6473597d706e 5698 uint32_t WP4 : 1; //!< [13] Write Protect
bogdanm 82:6473597d706e 5699 uint32_t SP4 : 1; //!< [14] Supervisor Protect
bogdanm 82:6473597d706e 5700 uint32_t RESERVED3 : 1; //!< [15]
bogdanm 82:6473597d706e 5701 uint32_t TP3 : 1; //!< [16] Trusted Protect
bogdanm 82:6473597d706e 5702 uint32_t WP3 : 1; //!< [17] Write Protect
bogdanm 82:6473597d706e 5703 uint32_t SP3 : 1; //!< [18] Supervisor Protect
bogdanm 82:6473597d706e 5704 uint32_t RESERVED4 : 1; //!< [19]
bogdanm 82:6473597d706e 5705 uint32_t TP2 : 1; //!< [20] Trusted Protect
bogdanm 82:6473597d706e 5706 uint32_t WP2 : 1; //!< [21] Write Protect
bogdanm 82:6473597d706e 5707 uint32_t SP2 : 1; //!< [22] Supervisor Protect
bogdanm 82:6473597d706e 5708 uint32_t RESERVED5 : 1; //!< [23]
bogdanm 82:6473597d706e 5709 uint32_t TP1 : 1; //!< [24] Trusted Protect
bogdanm 82:6473597d706e 5710 uint32_t WP1 : 1; //!< [25] Write Protect
bogdanm 82:6473597d706e 5711 uint32_t SP1 : 1; //!< [26] Supervisor Protect
bogdanm 82:6473597d706e 5712 uint32_t RESERVED6 : 1; //!< [27]
bogdanm 82:6473597d706e 5713 uint32_t TP0 : 1; //!< [28] Trusted Protect
bogdanm 82:6473597d706e 5714 uint32_t WP0 : 1; //!< [29] Write Protect
bogdanm 82:6473597d706e 5715 uint32_t SP0 : 1; //!< [30] Supervisor Protect
bogdanm 82:6473597d706e 5716 uint32_t RESERVED7 : 1; //!< [31]
bogdanm 82:6473597d706e 5717 } B;
bogdanm 82:6473597d706e 5718 } hw_aips_pacrg_t;
bogdanm 82:6473597d706e 5719 #endif
bogdanm 82:6473597d706e 5720
bogdanm 82:6473597d706e 5721 /*!
bogdanm 82:6473597d706e 5722 * @name Constants and macros for entire AIPS_PACRG register
bogdanm 82:6473597d706e 5723 */
bogdanm 82:6473597d706e 5724 //@{
bogdanm 82:6473597d706e 5725 #define HW_AIPS_PACRG_ADDR(x) (REGS_AIPS_BASE(x) + 0x48U)
bogdanm 82:6473597d706e 5726
bogdanm 82:6473597d706e 5727 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5728 #define HW_AIPS_PACRG(x) (*(__IO hw_aips_pacrg_t *) HW_AIPS_PACRG_ADDR(x))
bogdanm 82:6473597d706e 5729 #define HW_AIPS_PACRG_RD(x) (HW_AIPS_PACRG(x).U)
bogdanm 82:6473597d706e 5730 #define HW_AIPS_PACRG_WR(x, v) (HW_AIPS_PACRG(x).U = (v))
bogdanm 82:6473597d706e 5731 #define HW_AIPS_PACRG_SET(x, v) (HW_AIPS_PACRG_WR(x, HW_AIPS_PACRG_RD(x) | (v)))
bogdanm 82:6473597d706e 5732 #define HW_AIPS_PACRG_CLR(x, v) (HW_AIPS_PACRG_WR(x, HW_AIPS_PACRG_RD(x) & ~(v)))
bogdanm 82:6473597d706e 5733 #define HW_AIPS_PACRG_TOG(x, v) (HW_AIPS_PACRG_WR(x, HW_AIPS_PACRG_RD(x) ^ (v)))
bogdanm 82:6473597d706e 5734 #endif
bogdanm 82:6473597d706e 5735 //@}
bogdanm 82:6473597d706e 5736
bogdanm 82:6473597d706e 5737 /*
bogdanm 82:6473597d706e 5738 * Constants & macros for individual AIPS_PACRG bitfields
bogdanm 82:6473597d706e 5739 */
bogdanm 82:6473597d706e 5740
bogdanm 82:6473597d706e 5741 /*!
bogdanm 82:6473597d706e 5742 * @name Register AIPS_PACRG, field TP7[0] (RW)
bogdanm 82:6473597d706e 5743 *
bogdanm 82:6473597d706e 5744 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 5745 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 5746 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 5747 *
bogdanm 82:6473597d706e 5748 * Values:
bogdanm 82:6473597d706e 5749 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 5750 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 5751 */
bogdanm 82:6473597d706e 5752 //@{
bogdanm 82:6473597d706e 5753 #define BP_AIPS_PACRG_TP7 (0U) //!< Bit position for AIPS_PACRG_TP7.
bogdanm 82:6473597d706e 5754 #define BM_AIPS_PACRG_TP7 (0x00000001U) //!< Bit mask for AIPS_PACRG_TP7.
bogdanm 82:6473597d706e 5755 #define BS_AIPS_PACRG_TP7 (1U) //!< Bit field size in bits for AIPS_PACRG_TP7.
bogdanm 82:6473597d706e 5756
bogdanm 82:6473597d706e 5757 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5758 //! @brief Read current value of the AIPS_PACRG_TP7 field.
bogdanm 82:6473597d706e 5759 #define BR_AIPS_PACRG_TP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP7))
bogdanm 82:6473597d706e 5760 #endif
bogdanm 82:6473597d706e 5761
bogdanm 82:6473597d706e 5762 //! @brief Format value for bitfield AIPS_PACRG_TP7.
bogdanm 82:6473597d706e 5763 #define BF_AIPS_PACRG_TP7(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRG_TP7), uint32_t) & BM_AIPS_PACRG_TP7)
bogdanm 82:6473597d706e 5764
bogdanm 82:6473597d706e 5765 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5766 //! @brief Set the TP7 field to a new value.
bogdanm 82:6473597d706e 5767 #define BW_AIPS_PACRG_TP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP7) = (v))
bogdanm 82:6473597d706e 5768 #endif
bogdanm 82:6473597d706e 5769 //@}
bogdanm 82:6473597d706e 5770
bogdanm 82:6473597d706e 5771 /*!
bogdanm 82:6473597d706e 5772 * @name Register AIPS_PACRG, field WP7[1] (RW)
bogdanm 82:6473597d706e 5773 *
bogdanm 82:6473597d706e 5774 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 5775 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 5776 * and no peripheral access initiates.
bogdanm 82:6473597d706e 5777 *
bogdanm 82:6473597d706e 5778 * Values:
bogdanm 82:6473597d706e 5779 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 5780 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 5781 */
bogdanm 82:6473597d706e 5782 //@{
bogdanm 82:6473597d706e 5783 #define BP_AIPS_PACRG_WP7 (1U) //!< Bit position for AIPS_PACRG_WP7.
bogdanm 82:6473597d706e 5784 #define BM_AIPS_PACRG_WP7 (0x00000002U) //!< Bit mask for AIPS_PACRG_WP7.
bogdanm 82:6473597d706e 5785 #define BS_AIPS_PACRG_WP7 (1U) //!< Bit field size in bits for AIPS_PACRG_WP7.
bogdanm 82:6473597d706e 5786
bogdanm 82:6473597d706e 5787 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5788 //! @brief Read current value of the AIPS_PACRG_WP7 field.
bogdanm 82:6473597d706e 5789 #define BR_AIPS_PACRG_WP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP7))
bogdanm 82:6473597d706e 5790 #endif
bogdanm 82:6473597d706e 5791
bogdanm 82:6473597d706e 5792 //! @brief Format value for bitfield AIPS_PACRG_WP7.
bogdanm 82:6473597d706e 5793 #define BF_AIPS_PACRG_WP7(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRG_WP7), uint32_t) & BM_AIPS_PACRG_WP7)
bogdanm 82:6473597d706e 5794
bogdanm 82:6473597d706e 5795 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5796 //! @brief Set the WP7 field to a new value.
bogdanm 82:6473597d706e 5797 #define BW_AIPS_PACRG_WP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP7) = (v))
bogdanm 82:6473597d706e 5798 #endif
bogdanm 82:6473597d706e 5799 //@}
bogdanm 82:6473597d706e 5800
bogdanm 82:6473597d706e 5801 /*!
bogdanm 82:6473597d706e 5802 * @name Register AIPS_PACRG, field SP7[2] (RW)
bogdanm 82:6473597d706e 5803 *
bogdanm 82:6473597d706e 5804 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 5805 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 5806 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 5807 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 5808 * access initiates.
bogdanm 82:6473597d706e 5809 *
bogdanm 82:6473597d706e 5810 * Values:
bogdanm 82:6473597d706e 5811 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 5812 * accesses.
bogdanm 82:6473597d706e 5813 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 5814 */
bogdanm 82:6473597d706e 5815 //@{
bogdanm 82:6473597d706e 5816 #define BP_AIPS_PACRG_SP7 (2U) //!< Bit position for AIPS_PACRG_SP7.
bogdanm 82:6473597d706e 5817 #define BM_AIPS_PACRG_SP7 (0x00000004U) //!< Bit mask for AIPS_PACRG_SP7.
bogdanm 82:6473597d706e 5818 #define BS_AIPS_PACRG_SP7 (1U) //!< Bit field size in bits for AIPS_PACRG_SP7.
bogdanm 82:6473597d706e 5819
bogdanm 82:6473597d706e 5820 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5821 //! @brief Read current value of the AIPS_PACRG_SP7 field.
bogdanm 82:6473597d706e 5822 #define BR_AIPS_PACRG_SP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP7))
bogdanm 82:6473597d706e 5823 #endif
bogdanm 82:6473597d706e 5824
bogdanm 82:6473597d706e 5825 //! @brief Format value for bitfield AIPS_PACRG_SP7.
bogdanm 82:6473597d706e 5826 #define BF_AIPS_PACRG_SP7(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRG_SP7), uint32_t) & BM_AIPS_PACRG_SP7)
bogdanm 82:6473597d706e 5827
bogdanm 82:6473597d706e 5828 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5829 //! @brief Set the SP7 field to a new value.
bogdanm 82:6473597d706e 5830 #define BW_AIPS_PACRG_SP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP7) = (v))
bogdanm 82:6473597d706e 5831 #endif
bogdanm 82:6473597d706e 5832 //@}
bogdanm 82:6473597d706e 5833
bogdanm 82:6473597d706e 5834 /*!
bogdanm 82:6473597d706e 5835 * @name Register AIPS_PACRG, field TP6[4] (RW)
bogdanm 82:6473597d706e 5836 *
bogdanm 82:6473597d706e 5837 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 5838 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 5839 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 5840 *
bogdanm 82:6473597d706e 5841 * Values:
bogdanm 82:6473597d706e 5842 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 5843 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 5844 */
bogdanm 82:6473597d706e 5845 //@{
bogdanm 82:6473597d706e 5846 #define BP_AIPS_PACRG_TP6 (4U) //!< Bit position for AIPS_PACRG_TP6.
bogdanm 82:6473597d706e 5847 #define BM_AIPS_PACRG_TP6 (0x00000010U) //!< Bit mask for AIPS_PACRG_TP6.
bogdanm 82:6473597d706e 5848 #define BS_AIPS_PACRG_TP6 (1U) //!< Bit field size in bits for AIPS_PACRG_TP6.
bogdanm 82:6473597d706e 5849
bogdanm 82:6473597d706e 5850 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5851 //! @brief Read current value of the AIPS_PACRG_TP6 field.
bogdanm 82:6473597d706e 5852 #define BR_AIPS_PACRG_TP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP6))
bogdanm 82:6473597d706e 5853 #endif
bogdanm 82:6473597d706e 5854
bogdanm 82:6473597d706e 5855 //! @brief Format value for bitfield AIPS_PACRG_TP6.
bogdanm 82:6473597d706e 5856 #define BF_AIPS_PACRG_TP6(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRG_TP6), uint32_t) & BM_AIPS_PACRG_TP6)
bogdanm 82:6473597d706e 5857
bogdanm 82:6473597d706e 5858 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5859 //! @brief Set the TP6 field to a new value.
bogdanm 82:6473597d706e 5860 #define BW_AIPS_PACRG_TP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP6) = (v))
bogdanm 82:6473597d706e 5861 #endif
bogdanm 82:6473597d706e 5862 //@}
bogdanm 82:6473597d706e 5863
bogdanm 82:6473597d706e 5864 /*!
bogdanm 82:6473597d706e 5865 * @name Register AIPS_PACRG, field WP6[5] (RW)
bogdanm 82:6473597d706e 5866 *
bogdanm 82:6473597d706e 5867 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 5868 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 5869 * and no peripheral access initiates.
bogdanm 82:6473597d706e 5870 *
bogdanm 82:6473597d706e 5871 * Values:
bogdanm 82:6473597d706e 5872 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 5873 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 5874 */
bogdanm 82:6473597d706e 5875 //@{
bogdanm 82:6473597d706e 5876 #define BP_AIPS_PACRG_WP6 (5U) //!< Bit position for AIPS_PACRG_WP6.
bogdanm 82:6473597d706e 5877 #define BM_AIPS_PACRG_WP6 (0x00000020U) //!< Bit mask for AIPS_PACRG_WP6.
bogdanm 82:6473597d706e 5878 #define BS_AIPS_PACRG_WP6 (1U) //!< Bit field size in bits for AIPS_PACRG_WP6.
bogdanm 82:6473597d706e 5879
bogdanm 82:6473597d706e 5880 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5881 //! @brief Read current value of the AIPS_PACRG_WP6 field.
bogdanm 82:6473597d706e 5882 #define BR_AIPS_PACRG_WP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP6))
bogdanm 82:6473597d706e 5883 #endif
bogdanm 82:6473597d706e 5884
bogdanm 82:6473597d706e 5885 //! @brief Format value for bitfield AIPS_PACRG_WP6.
bogdanm 82:6473597d706e 5886 #define BF_AIPS_PACRG_WP6(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRG_WP6), uint32_t) & BM_AIPS_PACRG_WP6)
bogdanm 82:6473597d706e 5887
bogdanm 82:6473597d706e 5888 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5889 //! @brief Set the WP6 field to a new value.
bogdanm 82:6473597d706e 5890 #define BW_AIPS_PACRG_WP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP6) = (v))
bogdanm 82:6473597d706e 5891 #endif
bogdanm 82:6473597d706e 5892 //@}
bogdanm 82:6473597d706e 5893
bogdanm 82:6473597d706e 5894 /*!
bogdanm 82:6473597d706e 5895 * @name Register AIPS_PACRG, field SP6[6] (RW)
bogdanm 82:6473597d706e 5896 *
bogdanm 82:6473597d706e 5897 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 5898 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 5899 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 5900 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 5901 * access initiates.
bogdanm 82:6473597d706e 5902 *
bogdanm 82:6473597d706e 5903 * Values:
bogdanm 82:6473597d706e 5904 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 5905 * accesses.
bogdanm 82:6473597d706e 5906 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 5907 */
bogdanm 82:6473597d706e 5908 //@{
bogdanm 82:6473597d706e 5909 #define BP_AIPS_PACRG_SP6 (6U) //!< Bit position for AIPS_PACRG_SP6.
bogdanm 82:6473597d706e 5910 #define BM_AIPS_PACRG_SP6 (0x00000040U) //!< Bit mask for AIPS_PACRG_SP6.
bogdanm 82:6473597d706e 5911 #define BS_AIPS_PACRG_SP6 (1U) //!< Bit field size in bits for AIPS_PACRG_SP6.
bogdanm 82:6473597d706e 5912
bogdanm 82:6473597d706e 5913 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5914 //! @brief Read current value of the AIPS_PACRG_SP6 field.
bogdanm 82:6473597d706e 5915 #define BR_AIPS_PACRG_SP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP6))
bogdanm 82:6473597d706e 5916 #endif
bogdanm 82:6473597d706e 5917
bogdanm 82:6473597d706e 5918 //! @brief Format value for bitfield AIPS_PACRG_SP6.
bogdanm 82:6473597d706e 5919 #define BF_AIPS_PACRG_SP6(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRG_SP6), uint32_t) & BM_AIPS_PACRG_SP6)
bogdanm 82:6473597d706e 5920
bogdanm 82:6473597d706e 5921 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5922 //! @brief Set the SP6 field to a new value.
bogdanm 82:6473597d706e 5923 #define BW_AIPS_PACRG_SP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP6) = (v))
bogdanm 82:6473597d706e 5924 #endif
bogdanm 82:6473597d706e 5925 //@}
bogdanm 82:6473597d706e 5926
bogdanm 82:6473597d706e 5927 /*!
bogdanm 82:6473597d706e 5928 * @name Register AIPS_PACRG, field TP5[8] (RW)
bogdanm 82:6473597d706e 5929 *
bogdanm 82:6473597d706e 5930 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 5931 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 5932 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 5933 *
bogdanm 82:6473597d706e 5934 * Values:
bogdanm 82:6473597d706e 5935 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 5936 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 5937 */
bogdanm 82:6473597d706e 5938 //@{
bogdanm 82:6473597d706e 5939 #define BP_AIPS_PACRG_TP5 (8U) //!< Bit position for AIPS_PACRG_TP5.
bogdanm 82:6473597d706e 5940 #define BM_AIPS_PACRG_TP5 (0x00000100U) //!< Bit mask for AIPS_PACRG_TP5.
bogdanm 82:6473597d706e 5941 #define BS_AIPS_PACRG_TP5 (1U) //!< Bit field size in bits for AIPS_PACRG_TP5.
bogdanm 82:6473597d706e 5942
bogdanm 82:6473597d706e 5943 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5944 //! @brief Read current value of the AIPS_PACRG_TP5 field.
bogdanm 82:6473597d706e 5945 #define BR_AIPS_PACRG_TP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP5))
bogdanm 82:6473597d706e 5946 #endif
bogdanm 82:6473597d706e 5947
bogdanm 82:6473597d706e 5948 //! @brief Format value for bitfield AIPS_PACRG_TP5.
bogdanm 82:6473597d706e 5949 #define BF_AIPS_PACRG_TP5(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRG_TP5), uint32_t) & BM_AIPS_PACRG_TP5)
bogdanm 82:6473597d706e 5950
bogdanm 82:6473597d706e 5951 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5952 //! @brief Set the TP5 field to a new value.
bogdanm 82:6473597d706e 5953 #define BW_AIPS_PACRG_TP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP5) = (v))
bogdanm 82:6473597d706e 5954 #endif
bogdanm 82:6473597d706e 5955 //@}
bogdanm 82:6473597d706e 5956
bogdanm 82:6473597d706e 5957 /*!
bogdanm 82:6473597d706e 5958 * @name Register AIPS_PACRG, field WP5[9] (RW)
bogdanm 82:6473597d706e 5959 *
bogdanm 82:6473597d706e 5960 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 5961 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 5962 * and no peripheral access initiates.
bogdanm 82:6473597d706e 5963 *
bogdanm 82:6473597d706e 5964 * Values:
bogdanm 82:6473597d706e 5965 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 5966 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 5967 */
bogdanm 82:6473597d706e 5968 //@{
bogdanm 82:6473597d706e 5969 #define BP_AIPS_PACRG_WP5 (9U) //!< Bit position for AIPS_PACRG_WP5.
bogdanm 82:6473597d706e 5970 #define BM_AIPS_PACRG_WP5 (0x00000200U) //!< Bit mask for AIPS_PACRG_WP5.
bogdanm 82:6473597d706e 5971 #define BS_AIPS_PACRG_WP5 (1U) //!< Bit field size in bits for AIPS_PACRG_WP5.
bogdanm 82:6473597d706e 5972
bogdanm 82:6473597d706e 5973 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5974 //! @brief Read current value of the AIPS_PACRG_WP5 field.
bogdanm 82:6473597d706e 5975 #define BR_AIPS_PACRG_WP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP5))
bogdanm 82:6473597d706e 5976 #endif
bogdanm 82:6473597d706e 5977
bogdanm 82:6473597d706e 5978 //! @brief Format value for bitfield AIPS_PACRG_WP5.
bogdanm 82:6473597d706e 5979 #define BF_AIPS_PACRG_WP5(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRG_WP5), uint32_t) & BM_AIPS_PACRG_WP5)
bogdanm 82:6473597d706e 5980
bogdanm 82:6473597d706e 5981 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 5982 //! @brief Set the WP5 field to a new value.
bogdanm 82:6473597d706e 5983 #define BW_AIPS_PACRG_WP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP5) = (v))
bogdanm 82:6473597d706e 5984 #endif
bogdanm 82:6473597d706e 5985 //@}
bogdanm 82:6473597d706e 5986
bogdanm 82:6473597d706e 5987 /*!
bogdanm 82:6473597d706e 5988 * @name Register AIPS_PACRG, field SP5[10] (RW)
bogdanm 82:6473597d706e 5989 *
bogdanm 82:6473597d706e 5990 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 5991 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 5992 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 5993 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 5994 * access initiates.
bogdanm 82:6473597d706e 5995 *
bogdanm 82:6473597d706e 5996 * Values:
bogdanm 82:6473597d706e 5997 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 5998 * accesses.
bogdanm 82:6473597d706e 5999 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 6000 */
bogdanm 82:6473597d706e 6001 //@{
bogdanm 82:6473597d706e 6002 #define BP_AIPS_PACRG_SP5 (10U) //!< Bit position for AIPS_PACRG_SP5.
bogdanm 82:6473597d706e 6003 #define BM_AIPS_PACRG_SP5 (0x00000400U) //!< Bit mask for AIPS_PACRG_SP5.
bogdanm 82:6473597d706e 6004 #define BS_AIPS_PACRG_SP5 (1U) //!< Bit field size in bits for AIPS_PACRG_SP5.
bogdanm 82:6473597d706e 6005
bogdanm 82:6473597d706e 6006 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6007 //! @brief Read current value of the AIPS_PACRG_SP5 field.
bogdanm 82:6473597d706e 6008 #define BR_AIPS_PACRG_SP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP5))
bogdanm 82:6473597d706e 6009 #endif
bogdanm 82:6473597d706e 6010
bogdanm 82:6473597d706e 6011 //! @brief Format value for bitfield AIPS_PACRG_SP5.
bogdanm 82:6473597d706e 6012 #define BF_AIPS_PACRG_SP5(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRG_SP5), uint32_t) & BM_AIPS_PACRG_SP5)
bogdanm 82:6473597d706e 6013
bogdanm 82:6473597d706e 6014 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6015 //! @brief Set the SP5 field to a new value.
bogdanm 82:6473597d706e 6016 #define BW_AIPS_PACRG_SP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP5) = (v))
bogdanm 82:6473597d706e 6017 #endif
bogdanm 82:6473597d706e 6018 //@}
bogdanm 82:6473597d706e 6019
bogdanm 82:6473597d706e 6020 /*!
bogdanm 82:6473597d706e 6021 * @name Register AIPS_PACRG, field TP4[12] (RW)
bogdanm 82:6473597d706e 6022 *
bogdanm 82:6473597d706e 6023 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 6024 * When this bit is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 6025 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 6026 *
bogdanm 82:6473597d706e 6027 * Values:
bogdanm 82:6473597d706e 6028 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 6029 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 6030 */
bogdanm 82:6473597d706e 6031 //@{
bogdanm 82:6473597d706e 6032 #define BP_AIPS_PACRG_TP4 (12U) //!< Bit position for AIPS_PACRG_TP4.
bogdanm 82:6473597d706e 6033 #define BM_AIPS_PACRG_TP4 (0x00001000U) //!< Bit mask for AIPS_PACRG_TP4.
bogdanm 82:6473597d706e 6034 #define BS_AIPS_PACRG_TP4 (1U) //!< Bit field size in bits for AIPS_PACRG_TP4.
bogdanm 82:6473597d706e 6035
bogdanm 82:6473597d706e 6036 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6037 //! @brief Read current value of the AIPS_PACRG_TP4 field.
bogdanm 82:6473597d706e 6038 #define BR_AIPS_PACRG_TP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP4))
bogdanm 82:6473597d706e 6039 #endif
bogdanm 82:6473597d706e 6040
bogdanm 82:6473597d706e 6041 //! @brief Format value for bitfield AIPS_PACRG_TP4.
bogdanm 82:6473597d706e 6042 #define BF_AIPS_PACRG_TP4(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRG_TP4), uint32_t) & BM_AIPS_PACRG_TP4)
bogdanm 82:6473597d706e 6043
bogdanm 82:6473597d706e 6044 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6045 //! @brief Set the TP4 field to a new value.
bogdanm 82:6473597d706e 6046 #define BW_AIPS_PACRG_TP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP4) = (v))
bogdanm 82:6473597d706e 6047 #endif
bogdanm 82:6473597d706e 6048 //@}
bogdanm 82:6473597d706e 6049
bogdanm 82:6473597d706e 6050 /*!
bogdanm 82:6473597d706e 6051 * @name Register AIPS_PACRG, field WP4[13] (RW)
bogdanm 82:6473597d706e 6052 *
bogdanm 82:6473597d706e 6053 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 6054 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 6055 * and no peripheral access initiates.
bogdanm 82:6473597d706e 6056 *
bogdanm 82:6473597d706e 6057 * Values:
bogdanm 82:6473597d706e 6058 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 6059 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 6060 */
bogdanm 82:6473597d706e 6061 //@{
bogdanm 82:6473597d706e 6062 #define BP_AIPS_PACRG_WP4 (13U) //!< Bit position for AIPS_PACRG_WP4.
bogdanm 82:6473597d706e 6063 #define BM_AIPS_PACRG_WP4 (0x00002000U) //!< Bit mask for AIPS_PACRG_WP4.
bogdanm 82:6473597d706e 6064 #define BS_AIPS_PACRG_WP4 (1U) //!< Bit field size in bits for AIPS_PACRG_WP4.
bogdanm 82:6473597d706e 6065
bogdanm 82:6473597d706e 6066 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6067 //! @brief Read current value of the AIPS_PACRG_WP4 field.
bogdanm 82:6473597d706e 6068 #define BR_AIPS_PACRG_WP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP4))
bogdanm 82:6473597d706e 6069 #endif
bogdanm 82:6473597d706e 6070
bogdanm 82:6473597d706e 6071 //! @brief Format value for bitfield AIPS_PACRG_WP4.
bogdanm 82:6473597d706e 6072 #define BF_AIPS_PACRG_WP4(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRG_WP4), uint32_t) & BM_AIPS_PACRG_WP4)
bogdanm 82:6473597d706e 6073
bogdanm 82:6473597d706e 6074 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6075 //! @brief Set the WP4 field to a new value.
bogdanm 82:6473597d706e 6076 #define BW_AIPS_PACRG_WP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP4) = (v))
bogdanm 82:6473597d706e 6077 #endif
bogdanm 82:6473597d706e 6078 //@}
bogdanm 82:6473597d706e 6079
bogdanm 82:6473597d706e 6080 /*!
bogdanm 82:6473597d706e 6081 * @name Register AIPS_PACRG, field SP4[14] (RW)
bogdanm 82:6473597d706e 6082 *
bogdanm 82:6473597d706e 6083 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 6084 * access. When this bit is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 6085 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
bogdanm 82:6473597d706e 6086 * set. If not, access terminates with an error response and no peripheral access
bogdanm 82:6473597d706e 6087 * initiates.
bogdanm 82:6473597d706e 6088 *
bogdanm 82:6473597d706e 6089 * Values:
bogdanm 82:6473597d706e 6090 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 6091 * accesses.
bogdanm 82:6473597d706e 6092 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 6093 */
bogdanm 82:6473597d706e 6094 //@{
bogdanm 82:6473597d706e 6095 #define BP_AIPS_PACRG_SP4 (14U) //!< Bit position for AIPS_PACRG_SP4.
bogdanm 82:6473597d706e 6096 #define BM_AIPS_PACRG_SP4 (0x00004000U) //!< Bit mask for AIPS_PACRG_SP4.
bogdanm 82:6473597d706e 6097 #define BS_AIPS_PACRG_SP4 (1U) //!< Bit field size in bits for AIPS_PACRG_SP4.
bogdanm 82:6473597d706e 6098
bogdanm 82:6473597d706e 6099 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6100 //! @brief Read current value of the AIPS_PACRG_SP4 field.
bogdanm 82:6473597d706e 6101 #define BR_AIPS_PACRG_SP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP4))
bogdanm 82:6473597d706e 6102 #endif
bogdanm 82:6473597d706e 6103
bogdanm 82:6473597d706e 6104 //! @brief Format value for bitfield AIPS_PACRG_SP4.
bogdanm 82:6473597d706e 6105 #define BF_AIPS_PACRG_SP4(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRG_SP4), uint32_t) & BM_AIPS_PACRG_SP4)
bogdanm 82:6473597d706e 6106
bogdanm 82:6473597d706e 6107 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6108 //! @brief Set the SP4 field to a new value.
bogdanm 82:6473597d706e 6109 #define BW_AIPS_PACRG_SP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP4) = (v))
bogdanm 82:6473597d706e 6110 #endif
bogdanm 82:6473597d706e 6111 //@}
bogdanm 82:6473597d706e 6112
bogdanm 82:6473597d706e 6113 /*!
bogdanm 82:6473597d706e 6114 * @name Register AIPS_PACRG, field TP3[16] (RW)
bogdanm 82:6473597d706e 6115 *
bogdanm 82:6473597d706e 6116 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 6117 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 6118 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 6119 *
bogdanm 82:6473597d706e 6120 * Values:
bogdanm 82:6473597d706e 6121 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 6122 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 6123 */
bogdanm 82:6473597d706e 6124 //@{
bogdanm 82:6473597d706e 6125 #define BP_AIPS_PACRG_TP3 (16U) //!< Bit position for AIPS_PACRG_TP3.
bogdanm 82:6473597d706e 6126 #define BM_AIPS_PACRG_TP3 (0x00010000U) //!< Bit mask for AIPS_PACRG_TP3.
bogdanm 82:6473597d706e 6127 #define BS_AIPS_PACRG_TP3 (1U) //!< Bit field size in bits for AIPS_PACRG_TP3.
bogdanm 82:6473597d706e 6128
bogdanm 82:6473597d706e 6129 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6130 //! @brief Read current value of the AIPS_PACRG_TP3 field.
bogdanm 82:6473597d706e 6131 #define BR_AIPS_PACRG_TP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP3))
bogdanm 82:6473597d706e 6132 #endif
bogdanm 82:6473597d706e 6133
bogdanm 82:6473597d706e 6134 //! @brief Format value for bitfield AIPS_PACRG_TP3.
bogdanm 82:6473597d706e 6135 #define BF_AIPS_PACRG_TP3(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRG_TP3), uint32_t) & BM_AIPS_PACRG_TP3)
bogdanm 82:6473597d706e 6136
bogdanm 82:6473597d706e 6137 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6138 //! @brief Set the TP3 field to a new value.
bogdanm 82:6473597d706e 6139 #define BW_AIPS_PACRG_TP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP3) = (v))
bogdanm 82:6473597d706e 6140 #endif
bogdanm 82:6473597d706e 6141 //@}
bogdanm 82:6473597d706e 6142
bogdanm 82:6473597d706e 6143 /*!
bogdanm 82:6473597d706e 6144 * @name Register AIPS_PACRG, field WP3[17] (RW)
bogdanm 82:6473597d706e 6145 *
bogdanm 82:6473597d706e 6146 * Determines whether the peripheral allows write accesss. When this bit is set
bogdanm 82:6473597d706e 6147 * and a write access is attempted, access terminates with an error response and
bogdanm 82:6473597d706e 6148 * no peripheral access initiates.
bogdanm 82:6473597d706e 6149 *
bogdanm 82:6473597d706e 6150 * Values:
bogdanm 82:6473597d706e 6151 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 6152 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 6153 */
bogdanm 82:6473597d706e 6154 //@{
bogdanm 82:6473597d706e 6155 #define BP_AIPS_PACRG_WP3 (17U) //!< Bit position for AIPS_PACRG_WP3.
bogdanm 82:6473597d706e 6156 #define BM_AIPS_PACRG_WP3 (0x00020000U) //!< Bit mask for AIPS_PACRG_WP3.
bogdanm 82:6473597d706e 6157 #define BS_AIPS_PACRG_WP3 (1U) //!< Bit field size in bits for AIPS_PACRG_WP3.
bogdanm 82:6473597d706e 6158
bogdanm 82:6473597d706e 6159 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6160 //! @brief Read current value of the AIPS_PACRG_WP3 field.
bogdanm 82:6473597d706e 6161 #define BR_AIPS_PACRG_WP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP3))
bogdanm 82:6473597d706e 6162 #endif
bogdanm 82:6473597d706e 6163
bogdanm 82:6473597d706e 6164 //! @brief Format value for bitfield AIPS_PACRG_WP3.
bogdanm 82:6473597d706e 6165 #define BF_AIPS_PACRG_WP3(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRG_WP3), uint32_t) & BM_AIPS_PACRG_WP3)
bogdanm 82:6473597d706e 6166
bogdanm 82:6473597d706e 6167 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6168 //! @brief Set the WP3 field to a new value.
bogdanm 82:6473597d706e 6169 #define BW_AIPS_PACRG_WP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP3) = (v))
bogdanm 82:6473597d706e 6170 #endif
bogdanm 82:6473597d706e 6171 //@}
bogdanm 82:6473597d706e 6172
bogdanm 82:6473597d706e 6173 /*!
bogdanm 82:6473597d706e 6174 * @name Register AIPS_PACRG, field SP3[18] (RW)
bogdanm 82:6473597d706e 6175 *
bogdanm 82:6473597d706e 6176 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 6177 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 6178 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 6179 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 6180 * access initiates.
bogdanm 82:6473597d706e 6181 *
bogdanm 82:6473597d706e 6182 * Values:
bogdanm 82:6473597d706e 6183 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 6184 * accesses.
bogdanm 82:6473597d706e 6185 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 6186 */
bogdanm 82:6473597d706e 6187 //@{
bogdanm 82:6473597d706e 6188 #define BP_AIPS_PACRG_SP3 (18U) //!< Bit position for AIPS_PACRG_SP3.
bogdanm 82:6473597d706e 6189 #define BM_AIPS_PACRG_SP3 (0x00040000U) //!< Bit mask for AIPS_PACRG_SP3.
bogdanm 82:6473597d706e 6190 #define BS_AIPS_PACRG_SP3 (1U) //!< Bit field size in bits for AIPS_PACRG_SP3.
bogdanm 82:6473597d706e 6191
bogdanm 82:6473597d706e 6192 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6193 //! @brief Read current value of the AIPS_PACRG_SP3 field.
bogdanm 82:6473597d706e 6194 #define BR_AIPS_PACRG_SP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP3))
bogdanm 82:6473597d706e 6195 #endif
bogdanm 82:6473597d706e 6196
bogdanm 82:6473597d706e 6197 //! @brief Format value for bitfield AIPS_PACRG_SP3.
bogdanm 82:6473597d706e 6198 #define BF_AIPS_PACRG_SP3(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRG_SP3), uint32_t) & BM_AIPS_PACRG_SP3)
bogdanm 82:6473597d706e 6199
bogdanm 82:6473597d706e 6200 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6201 //! @brief Set the SP3 field to a new value.
bogdanm 82:6473597d706e 6202 #define BW_AIPS_PACRG_SP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP3) = (v))
bogdanm 82:6473597d706e 6203 #endif
bogdanm 82:6473597d706e 6204 //@}
bogdanm 82:6473597d706e 6205
bogdanm 82:6473597d706e 6206 /*!
bogdanm 82:6473597d706e 6207 * @name Register AIPS_PACRG, field TP2[20] (RW)
bogdanm 82:6473597d706e 6208 *
bogdanm 82:6473597d706e 6209 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 6210 * When this bit is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 6211 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 6212 *
bogdanm 82:6473597d706e 6213 * Values:
bogdanm 82:6473597d706e 6214 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 6215 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 6216 */
bogdanm 82:6473597d706e 6217 //@{
bogdanm 82:6473597d706e 6218 #define BP_AIPS_PACRG_TP2 (20U) //!< Bit position for AIPS_PACRG_TP2.
bogdanm 82:6473597d706e 6219 #define BM_AIPS_PACRG_TP2 (0x00100000U) //!< Bit mask for AIPS_PACRG_TP2.
bogdanm 82:6473597d706e 6220 #define BS_AIPS_PACRG_TP2 (1U) //!< Bit field size in bits for AIPS_PACRG_TP2.
bogdanm 82:6473597d706e 6221
bogdanm 82:6473597d706e 6222 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6223 //! @brief Read current value of the AIPS_PACRG_TP2 field.
bogdanm 82:6473597d706e 6224 #define BR_AIPS_PACRG_TP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP2))
bogdanm 82:6473597d706e 6225 #endif
bogdanm 82:6473597d706e 6226
bogdanm 82:6473597d706e 6227 //! @brief Format value for bitfield AIPS_PACRG_TP2.
bogdanm 82:6473597d706e 6228 #define BF_AIPS_PACRG_TP2(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRG_TP2), uint32_t) & BM_AIPS_PACRG_TP2)
bogdanm 82:6473597d706e 6229
bogdanm 82:6473597d706e 6230 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6231 //! @brief Set the TP2 field to a new value.
bogdanm 82:6473597d706e 6232 #define BW_AIPS_PACRG_TP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP2) = (v))
bogdanm 82:6473597d706e 6233 #endif
bogdanm 82:6473597d706e 6234 //@}
bogdanm 82:6473597d706e 6235
bogdanm 82:6473597d706e 6236 /*!
bogdanm 82:6473597d706e 6237 * @name Register AIPS_PACRG, field WP2[21] (RW)
bogdanm 82:6473597d706e 6238 *
bogdanm 82:6473597d706e 6239 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 6240 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 6241 * and no peripheral access initiates.
bogdanm 82:6473597d706e 6242 *
bogdanm 82:6473597d706e 6243 * Values:
bogdanm 82:6473597d706e 6244 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 6245 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 6246 */
bogdanm 82:6473597d706e 6247 //@{
bogdanm 82:6473597d706e 6248 #define BP_AIPS_PACRG_WP2 (21U) //!< Bit position for AIPS_PACRG_WP2.
bogdanm 82:6473597d706e 6249 #define BM_AIPS_PACRG_WP2 (0x00200000U) //!< Bit mask for AIPS_PACRG_WP2.
bogdanm 82:6473597d706e 6250 #define BS_AIPS_PACRG_WP2 (1U) //!< Bit field size in bits for AIPS_PACRG_WP2.
bogdanm 82:6473597d706e 6251
bogdanm 82:6473597d706e 6252 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6253 //! @brief Read current value of the AIPS_PACRG_WP2 field.
bogdanm 82:6473597d706e 6254 #define BR_AIPS_PACRG_WP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP2))
bogdanm 82:6473597d706e 6255 #endif
bogdanm 82:6473597d706e 6256
bogdanm 82:6473597d706e 6257 //! @brief Format value for bitfield AIPS_PACRG_WP2.
bogdanm 82:6473597d706e 6258 #define BF_AIPS_PACRG_WP2(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRG_WP2), uint32_t) & BM_AIPS_PACRG_WP2)
bogdanm 82:6473597d706e 6259
bogdanm 82:6473597d706e 6260 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6261 //! @brief Set the WP2 field to a new value.
bogdanm 82:6473597d706e 6262 #define BW_AIPS_PACRG_WP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP2) = (v))
bogdanm 82:6473597d706e 6263 #endif
bogdanm 82:6473597d706e 6264 //@}
bogdanm 82:6473597d706e 6265
bogdanm 82:6473597d706e 6266 /*!
bogdanm 82:6473597d706e 6267 * @name Register AIPS_PACRG, field SP2[22] (RW)
bogdanm 82:6473597d706e 6268 *
bogdanm 82:6473597d706e 6269 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 6270 * access. When this bit is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 6271 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
bogdanm 82:6473597d706e 6272 * set. If not, access terminates with an error response and no peripheral access
bogdanm 82:6473597d706e 6273 * initiates.
bogdanm 82:6473597d706e 6274 *
bogdanm 82:6473597d706e 6275 * Values:
bogdanm 82:6473597d706e 6276 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 6277 * accesses.
bogdanm 82:6473597d706e 6278 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 6279 */
bogdanm 82:6473597d706e 6280 //@{
bogdanm 82:6473597d706e 6281 #define BP_AIPS_PACRG_SP2 (22U) //!< Bit position for AIPS_PACRG_SP2.
bogdanm 82:6473597d706e 6282 #define BM_AIPS_PACRG_SP2 (0x00400000U) //!< Bit mask for AIPS_PACRG_SP2.
bogdanm 82:6473597d706e 6283 #define BS_AIPS_PACRG_SP2 (1U) //!< Bit field size in bits for AIPS_PACRG_SP2.
bogdanm 82:6473597d706e 6284
bogdanm 82:6473597d706e 6285 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6286 //! @brief Read current value of the AIPS_PACRG_SP2 field.
bogdanm 82:6473597d706e 6287 #define BR_AIPS_PACRG_SP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP2))
bogdanm 82:6473597d706e 6288 #endif
bogdanm 82:6473597d706e 6289
bogdanm 82:6473597d706e 6290 //! @brief Format value for bitfield AIPS_PACRG_SP2.
bogdanm 82:6473597d706e 6291 #define BF_AIPS_PACRG_SP2(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRG_SP2), uint32_t) & BM_AIPS_PACRG_SP2)
bogdanm 82:6473597d706e 6292
bogdanm 82:6473597d706e 6293 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6294 //! @brief Set the SP2 field to a new value.
bogdanm 82:6473597d706e 6295 #define BW_AIPS_PACRG_SP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP2) = (v))
bogdanm 82:6473597d706e 6296 #endif
bogdanm 82:6473597d706e 6297 //@}
bogdanm 82:6473597d706e 6298
bogdanm 82:6473597d706e 6299 /*!
bogdanm 82:6473597d706e 6300 * @name Register AIPS_PACRG, field TP1[24] (RW)
bogdanm 82:6473597d706e 6301 *
bogdanm 82:6473597d706e 6302 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 6303 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 6304 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 6305 *
bogdanm 82:6473597d706e 6306 * Values:
bogdanm 82:6473597d706e 6307 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 6308 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 6309 */
bogdanm 82:6473597d706e 6310 //@{
bogdanm 82:6473597d706e 6311 #define BP_AIPS_PACRG_TP1 (24U) //!< Bit position for AIPS_PACRG_TP1.
bogdanm 82:6473597d706e 6312 #define BM_AIPS_PACRG_TP1 (0x01000000U) //!< Bit mask for AIPS_PACRG_TP1.
bogdanm 82:6473597d706e 6313 #define BS_AIPS_PACRG_TP1 (1U) //!< Bit field size in bits for AIPS_PACRG_TP1.
bogdanm 82:6473597d706e 6314
bogdanm 82:6473597d706e 6315 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6316 //! @brief Read current value of the AIPS_PACRG_TP1 field.
bogdanm 82:6473597d706e 6317 #define BR_AIPS_PACRG_TP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP1))
bogdanm 82:6473597d706e 6318 #endif
bogdanm 82:6473597d706e 6319
bogdanm 82:6473597d706e 6320 //! @brief Format value for bitfield AIPS_PACRG_TP1.
bogdanm 82:6473597d706e 6321 #define BF_AIPS_PACRG_TP1(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRG_TP1), uint32_t) & BM_AIPS_PACRG_TP1)
bogdanm 82:6473597d706e 6322
bogdanm 82:6473597d706e 6323 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6324 //! @brief Set the TP1 field to a new value.
bogdanm 82:6473597d706e 6325 #define BW_AIPS_PACRG_TP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP1) = (v))
bogdanm 82:6473597d706e 6326 #endif
bogdanm 82:6473597d706e 6327 //@}
bogdanm 82:6473597d706e 6328
bogdanm 82:6473597d706e 6329 /*!
bogdanm 82:6473597d706e 6330 * @name Register AIPS_PACRG, field WP1[25] (RW)
bogdanm 82:6473597d706e 6331 *
bogdanm 82:6473597d706e 6332 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 6333 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 6334 * and no peripheral access initiates.
bogdanm 82:6473597d706e 6335 *
bogdanm 82:6473597d706e 6336 * Values:
bogdanm 82:6473597d706e 6337 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 6338 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 6339 */
bogdanm 82:6473597d706e 6340 //@{
bogdanm 82:6473597d706e 6341 #define BP_AIPS_PACRG_WP1 (25U) //!< Bit position for AIPS_PACRG_WP1.
bogdanm 82:6473597d706e 6342 #define BM_AIPS_PACRG_WP1 (0x02000000U) //!< Bit mask for AIPS_PACRG_WP1.
bogdanm 82:6473597d706e 6343 #define BS_AIPS_PACRG_WP1 (1U) //!< Bit field size in bits for AIPS_PACRG_WP1.
bogdanm 82:6473597d706e 6344
bogdanm 82:6473597d706e 6345 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6346 //! @brief Read current value of the AIPS_PACRG_WP1 field.
bogdanm 82:6473597d706e 6347 #define BR_AIPS_PACRG_WP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP1))
bogdanm 82:6473597d706e 6348 #endif
bogdanm 82:6473597d706e 6349
bogdanm 82:6473597d706e 6350 //! @brief Format value for bitfield AIPS_PACRG_WP1.
bogdanm 82:6473597d706e 6351 #define BF_AIPS_PACRG_WP1(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRG_WP1), uint32_t) & BM_AIPS_PACRG_WP1)
bogdanm 82:6473597d706e 6352
bogdanm 82:6473597d706e 6353 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6354 //! @brief Set the WP1 field to a new value.
bogdanm 82:6473597d706e 6355 #define BW_AIPS_PACRG_WP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP1) = (v))
bogdanm 82:6473597d706e 6356 #endif
bogdanm 82:6473597d706e 6357 //@}
bogdanm 82:6473597d706e 6358
bogdanm 82:6473597d706e 6359 /*!
bogdanm 82:6473597d706e 6360 * @name Register AIPS_PACRG, field SP1[26] (RW)
bogdanm 82:6473597d706e 6361 *
bogdanm 82:6473597d706e 6362 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 6363 * access. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 6364 * supervisor access attribute, and the MPRx[MPLn] control field for the master must
bogdanm 82:6473597d706e 6365 * be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 6366 * access initiates.
bogdanm 82:6473597d706e 6367 *
bogdanm 82:6473597d706e 6368 * Values:
bogdanm 82:6473597d706e 6369 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 6370 * accesses.
bogdanm 82:6473597d706e 6371 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 6372 */
bogdanm 82:6473597d706e 6373 //@{
bogdanm 82:6473597d706e 6374 #define BP_AIPS_PACRG_SP1 (26U) //!< Bit position for AIPS_PACRG_SP1.
bogdanm 82:6473597d706e 6375 #define BM_AIPS_PACRG_SP1 (0x04000000U) //!< Bit mask for AIPS_PACRG_SP1.
bogdanm 82:6473597d706e 6376 #define BS_AIPS_PACRG_SP1 (1U) //!< Bit field size in bits for AIPS_PACRG_SP1.
bogdanm 82:6473597d706e 6377
bogdanm 82:6473597d706e 6378 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6379 //! @brief Read current value of the AIPS_PACRG_SP1 field.
bogdanm 82:6473597d706e 6380 #define BR_AIPS_PACRG_SP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP1))
bogdanm 82:6473597d706e 6381 #endif
bogdanm 82:6473597d706e 6382
bogdanm 82:6473597d706e 6383 //! @brief Format value for bitfield AIPS_PACRG_SP1.
bogdanm 82:6473597d706e 6384 #define BF_AIPS_PACRG_SP1(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRG_SP1), uint32_t) & BM_AIPS_PACRG_SP1)
bogdanm 82:6473597d706e 6385
bogdanm 82:6473597d706e 6386 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6387 //! @brief Set the SP1 field to a new value.
bogdanm 82:6473597d706e 6388 #define BW_AIPS_PACRG_SP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP1) = (v))
bogdanm 82:6473597d706e 6389 #endif
bogdanm 82:6473597d706e 6390 //@}
bogdanm 82:6473597d706e 6391
bogdanm 82:6473597d706e 6392 /*!
bogdanm 82:6473597d706e 6393 * @name Register AIPS_PACRG, field TP0[28] (RW)
bogdanm 82:6473597d706e 6394 *
bogdanm 82:6473597d706e 6395 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 6396 * When this bit is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 6397 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 6398 *
bogdanm 82:6473597d706e 6399 * Values:
bogdanm 82:6473597d706e 6400 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 6401 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 6402 */
bogdanm 82:6473597d706e 6403 //@{
bogdanm 82:6473597d706e 6404 #define BP_AIPS_PACRG_TP0 (28U) //!< Bit position for AIPS_PACRG_TP0.
bogdanm 82:6473597d706e 6405 #define BM_AIPS_PACRG_TP0 (0x10000000U) //!< Bit mask for AIPS_PACRG_TP0.
bogdanm 82:6473597d706e 6406 #define BS_AIPS_PACRG_TP0 (1U) //!< Bit field size in bits for AIPS_PACRG_TP0.
bogdanm 82:6473597d706e 6407
bogdanm 82:6473597d706e 6408 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6409 //! @brief Read current value of the AIPS_PACRG_TP0 field.
bogdanm 82:6473597d706e 6410 #define BR_AIPS_PACRG_TP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP0))
bogdanm 82:6473597d706e 6411 #endif
bogdanm 82:6473597d706e 6412
bogdanm 82:6473597d706e 6413 //! @brief Format value for bitfield AIPS_PACRG_TP0.
bogdanm 82:6473597d706e 6414 #define BF_AIPS_PACRG_TP0(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRG_TP0), uint32_t) & BM_AIPS_PACRG_TP0)
bogdanm 82:6473597d706e 6415
bogdanm 82:6473597d706e 6416 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6417 //! @brief Set the TP0 field to a new value.
bogdanm 82:6473597d706e 6418 #define BW_AIPS_PACRG_TP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_TP0) = (v))
bogdanm 82:6473597d706e 6419 #endif
bogdanm 82:6473597d706e 6420 //@}
bogdanm 82:6473597d706e 6421
bogdanm 82:6473597d706e 6422 /*!
bogdanm 82:6473597d706e 6423 * @name Register AIPS_PACRG, field WP0[29] (RW)
bogdanm 82:6473597d706e 6424 *
bogdanm 82:6473597d706e 6425 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 6426 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 6427 * and no peripheral access initiates.
bogdanm 82:6473597d706e 6428 *
bogdanm 82:6473597d706e 6429 * Values:
bogdanm 82:6473597d706e 6430 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 6431 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 6432 */
bogdanm 82:6473597d706e 6433 //@{
bogdanm 82:6473597d706e 6434 #define BP_AIPS_PACRG_WP0 (29U) //!< Bit position for AIPS_PACRG_WP0.
bogdanm 82:6473597d706e 6435 #define BM_AIPS_PACRG_WP0 (0x20000000U) //!< Bit mask for AIPS_PACRG_WP0.
bogdanm 82:6473597d706e 6436 #define BS_AIPS_PACRG_WP0 (1U) //!< Bit field size in bits for AIPS_PACRG_WP0.
bogdanm 82:6473597d706e 6437
bogdanm 82:6473597d706e 6438 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6439 //! @brief Read current value of the AIPS_PACRG_WP0 field.
bogdanm 82:6473597d706e 6440 #define BR_AIPS_PACRG_WP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP0))
bogdanm 82:6473597d706e 6441 #endif
bogdanm 82:6473597d706e 6442
bogdanm 82:6473597d706e 6443 //! @brief Format value for bitfield AIPS_PACRG_WP0.
bogdanm 82:6473597d706e 6444 #define BF_AIPS_PACRG_WP0(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRG_WP0), uint32_t) & BM_AIPS_PACRG_WP0)
bogdanm 82:6473597d706e 6445
bogdanm 82:6473597d706e 6446 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6447 //! @brief Set the WP0 field to a new value.
bogdanm 82:6473597d706e 6448 #define BW_AIPS_PACRG_WP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_WP0) = (v))
bogdanm 82:6473597d706e 6449 #endif
bogdanm 82:6473597d706e 6450 //@}
bogdanm 82:6473597d706e 6451
bogdanm 82:6473597d706e 6452 /*!
bogdanm 82:6473597d706e 6453 * @name Register AIPS_PACRG, field SP0[30] (RW)
bogdanm 82:6473597d706e 6454 *
bogdanm 82:6473597d706e 6455 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 6456 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 6457 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 6458 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 6459 * access initiates.
bogdanm 82:6473597d706e 6460 *
bogdanm 82:6473597d706e 6461 * Values:
bogdanm 82:6473597d706e 6462 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 6463 * accesses.
bogdanm 82:6473597d706e 6464 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 6465 */
bogdanm 82:6473597d706e 6466 //@{
bogdanm 82:6473597d706e 6467 #define BP_AIPS_PACRG_SP0 (30U) //!< Bit position for AIPS_PACRG_SP0.
bogdanm 82:6473597d706e 6468 #define BM_AIPS_PACRG_SP0 (0x40000000U) //!< Bit mask for AIPS_PACRG_SP0.
bogdanm 82:6473597d706e 6469 #define BS_AIPS_PACRG_SP0 (1U) //!< Bit field size in bits for AIPS_PACRG_SP0.
bogdanm 82:6473597d706e 6470
bogdanm 82:6473597d706e 6471 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6472 //! @brief Read current value of the AIPS_PACRG_SP0 field.
bogdanm 82:6473597d706e 6473 #define BR_AIPS_PACRG_SP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP0))
bogdanm 82:6473597d706e 6474 #endif
bogdanm 82:6473597d706e 6475
bogdanm 82:6473597d706e 6476 //! @brief Format value for bitfield AIPS_PACRG_SP0.
bogdanm 82:6473597d706e 6477 #define BF_AIPS_PACRG_SP0(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRG_SP0), uint32_t) & BM_AIPS_PACRG_SP0)
bogdanm 82:6473597d706e 6478
bogdanm 82:6473597d706e 6479 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6480 //! @brief Set the SP0 field to a new value.
bogdanm 82:6473597d706e 6481 #define BW_AIPS_PACRG_SP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRG_ADDR(x), BP_AIPS_PACRG_SP0) = (v))
bogdanm 82:6473597d706e 6482 #endif
bogdanm 82:6473597d706e 6483 //@}
bogdanm 82:6473597d706e 6484
bogdanm 82:6473597d706e 6485 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 6486 // HW_AIPS_PACRH - Peripheral Access Control Register
bogdanm 82:6473597d706e 6487 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 6488
bogdanm 82:6473597d706e 6489 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6490 /*!
bogdanm 82:6473597d706e 6491 * @brief HW_AIPS_PACRH - Peripheral Access Control Register (RW)
bogdanm 82:6473597d706e 6492 *
bogdanm 82:6473597d706e 6493 * Reset value: 0x44444444U
bogdanm 82:6473597d706e 6494 *
bogdanm 82:6473597d706e 6495 * This section describes PACR registers E-P, which control peripheral slots
bogdanm 82:6473597d706e 6496 * 32-127. See PACRPeripheral Access Control Register for the description of these
bogdanm 82:6473597d706e 6497 * registers.
bogdanm 82:6473597d706e 6498 */
bogdanm 82:6473597d706e 6499 typedef union _hw_aips_pacrh
bogdanm 82:6473597d706e 6500 {
bogdanm 82:6473597d706e 6501 uint32_t U;
bogdanm 82:6473597d706e 6502 struct _hw_aips_pacrh_bitfields
bogdanm 82:6473597d706e 6503 {
bogdanm 82:6473597d706e 6504 uint32_t TP7 : 1; //!< [0] Trusted Protect
bogdanm 82:6473597d706e 6505 uint32_t WP7 : 1; //!< [1] Write Protect
bogdanm 82:6473597d706e 6506 uint32_t SP7 : 1; //!< [2] Supervisor Protect
bogdanm 82:6473597d706e 6507 uint32_t RESERVED0 : 1; //!< [3]
bogdanm 82:6473597d706e 6508 uint32_t TP6 : 1; //!< [4] Trusted Protect
bogdanm 82:6473597d706e 6509 uint32_t WP6 : 1; //!< [5] Write Protect
bogdanm 82:6473597d706e 6510 uint32_t SP6 : 1; //!< [6] Supervisor Protect
bogdanm 82:6473597d706e 6511 uint32_t RESERVED1 : 1; //!< [7]
bogdanm 82:6473597d706e 6512 uint32_t TP5 : 1; //!< [8] Trusted Protect
bogdanm 82:6473597d706e 6513 uint32_t WP5 : 1; //!< [9] Write Protect
bogdanm 82:6473597d706e 6514 uint32_t SP5 : 1; //!< [10] Supervisor Protect
bogdanm 82:6473597d706e 6515 uint32_t RESERVED2 : 1; //!< [11]
bogdanm 82:6473597d706e 6516 uint32_t TP4 : 1; //!< [12] Trusted Protect
bogdanm 82:6473597d706e 6517 uint32_t WP4 : 1; //!< [13] Write Protect
bogdanm 82:6473597d706e 6518 uint32_t SP4 : 1; //!< [14] Supervisor Protect
bogdanm 82:6473597d706e 6519 uint32_t RESERVED3 : 1; //!< [15]
bogdanm 82:6473597d706e 6520 uint32_t TP3 : 1; //!< [16] Trusted Protect
bogdanm 82:6473597d706e 6521 uint32_t WP3 : 1; //!< [17] Write Protect
bogdanm 82:6473597d706e 6522 uint32_t SP3 : 1; //!< [18] Supervisor Protect
bogdanm 82:6473597d706e 6523 uint32_t RESERVED4 : 1; //!< [19]
bogdanm 82:6473597d706e 6524 uint32_t TP2 : 1; //!< [20] Trusted Protect
bogdanm 82:6473597d706e 6525 uint32_t WP2 : 1; //!< [21] Write Protect
bogdanm 82:6473597d706e 6526 uint32_t SP2 : 1; //!< [22] Supervisor Protect
bogdanm 82:6473597d706e 6527 uint32_t RESERVED5 : 1; //!< [23]
bogdanm 82:6473597d706e 6528 uint32_t TP1 : 1; //!< [24] Trusted Protect
bogdanm 82:6473597d706e 6529 uint32_t WP1 : 1; //!< [25] Write Protect
bogdanm 82:6473597d706e 6530 uint32_t SP1 : 1; //!< [26] Supervisor Protect
bogdanm 82:6473597d706e 6531 uint32_t RESERVED6 : 1; //!< [27]
bogdanm 82:6473597d706e 6532 uint32_t TP0 : 1; //!< [28] Trusted Protect
bogdanm 82:6473597d706e 6533 uint32_t WP0 : 1; //!< [29] Write Protect
bogdanm 82:6473597d706e 6534 uint32_t SP0 : 1; //!< [30] Supervisor Protect
bogdanm 82:6473597d706e 6535 uint32_t RESERVED7 : 1; //!< [31]
bogdanm 82:6473597d706e 6536 } B;
bogdanm 82:6473597d706e 6537 } hw_aips_pacrh_t;
bogdanm 82:6473597d706e 6538 #endif
bogdanm 82:6473597d706e 6539
bogdanm 82:6473597d706e 6540 /*!
bogdanm 82:6473597d706e 6541 * @name Constants and macros for entire AIPS_PACRH register
bogdanm 82:6473597d706e 6542 */
bogdanm 82:6473597d706e 6543 //@{
bogdanm 82:6473597d706e 6544 #define HW_AIPS_PACRH_ADDR(x) (REGS_AIPS_BASE(x) + 0x4CU)
bogdanm 82:6473597d706e 6545
bogdanm 82:6473597d706e 6546 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6547 #define HW_AIPS_PACRH(x) (*(__IO hw_aips_pacrh_t *) HW_AIPS_PACRH_ADDR(x))
bogdanm 82:6473597d706e 6548 #define HW_AIPS_PACRH_RD(x) (HW_AIPS_PACRH(x).U)
bogdanm 82:6473597d706e 6549 #define HW_AIPS_PACRH_WR(x, v) (HW_AIPS_PACRH(x).U = (v))
bogdanm 82:6473597d706e 6550 #define HW_AIPS_PACRH_SET(x, v) (HW_AIPS_PACRH_WR(x, HW_AIPS_PACRH_RD(x) | (v)))
bogdanm 82:6473597d706e 6551 #define HW_AIPS_PACRH_CLR(x, v) (HW_AIPS_PACRH_WR(x, HW_AIPS_PACRH_RD(x) & ~(v)))
bogdanm 82:6473597d706e 6552 #define HW_AIPS_PACRH_TOG(x, v) (HW_AIPS_PACRH_WR(x, HW_AIPS_PACRH_RD(x) ^ (v)))
bogdanm 82:6473597d706e 6553 #endif
bogdanm 82:6473597d706e 6554 //@}
bogdanm 82:6473597d706e 6555
bogdanm 82:6473597d706e 6556 /*
bogdanm 82:6473597d706e 6557 * Constants & macros for individual AIPS_PACRH bitfields
bogdanm 82:6473597d706e 6558 */
bogdanm 82:6473597d706e 6559
bogdanm 82:6473597d706e 6560 /*!
bogdanm 82:6473597d706e 6561 * @name Register AIPS_PACRH, field TP7[0] (RW)
bogdanm 82:6473597d706e 6562 *
bogdanm 82:6473597d706e 6563 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 6564 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 6565 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 6566 *
bogdanm 82:6473597d706e 6567 * Values:
bogdanm 82:6473597d706e 6568 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 6569 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 6570 */
bogdanm 82:6473597d706e 6571 //@{
bogdanm 82:6473597d706e 6572 #define BP_AIPS_PACRH_TP7 (0U) //!< Bit position for AIPS_PACRH_TP7.
bogdanm 82:6473597d706e 6573 #define BM_AIPS_PACRH_TP7 (0x00000001U) //!< Bit mask for AIPS_PACRH_TP7.
bogdanm 82:6473597d706e 6574 #define BS_AIPS_PACRH_TP7 (1U) //!< Bit field size in bits for AIPS_PACRH_TP7.
bogdanm 82:6473597d706e 6575
bogdanm 82:6473597d706e 6576 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6577 //! @brief Read current value of the AIPS_PACRH_TP7 field.
bogdanm 82:6473597d706e 6578 #define BR_AIPS_PACRH_TP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP7))
bogdanm 82:6473597d706e 6579 #endif
bogdanm 82:6473597d706e 6580
bogdanm 82:6473597d706e 6581 //! @brief Format value for bitfield AIPS_PACRH_TP7.
bogdanm 82:6473597d706e 6582 #define BF_AIPS_PACRH_TP7(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRH_TP7), uint32_t) & BM_AIPS_PACRH_TP7)
bogdanm 82:6473597d706e 6583
bogdanm 82:6473597d706e 6584 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6585 //! @brief Set the TP7 field to a new value.
bogdanm 82:6473597d706e 6586 #define BW_AIPS_PACRH_TP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP7) = (v))
bogdanm 82:6473597d706e 6587 #endif
bogdanm 82:6473597d706e 6588 //@}
bogdanm 82:6473597d706e 6589
bogdanm 82:6473597d706e 6590 /*!
bogdanm 82:6473597d706e 6591 * @name Register AIPS_PACRH, field WP7[1] (RW)
bogdanm 82:6473597d706e 6592 *
bogdanm 82:6473597d706e 6593 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 6594 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 6595 * and no peripheral access initiates.
bogdanm 82:6473597d706e 6596 *
bogdanm 82:6473597d706e 6597 * Values:
bogdanm 82:6473597d706e 6598 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 6599 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 6600 */
bogdanm 82:6473597d706e 6601 //@{
bogdanm 82:6473597d706e 6602 #define BP_AIPS_PACRH_WP7 (1U) //!< Bit position for AIPS_PACRH_WP7.
bogdanm 82:6473597d706e 6603 #define BM_AIPS_PACRH_WP7 (0x00000002U) //!< Bit mask for AIPS_PACRH_WP7.
bogdanm 82:6473597d706e 6604 #define BS_AIPS_PACRH_WP7 (1U) //!< Bit field size in bits for AIPS_PACRH_WP7.
bogdanm 82:6473597d706e 6605
bogdanm 82:6473597d706e 6606 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6607 //! @brief Read current value of the AIPS_PACRH_WP7 field.
bogdanm 82:6473597d706e 6608 #define BR_AIPS_PACRH_WP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP7))
bogdanm 82:6473597d706e 6609 #endif
bogdanm 82:6473597d706e 6610
bogdanm 82:6473597d706e 6611 //! @brief Format value for bitfield AIPS_PACRH_WP7.
bogdanm 82:6473597d706e 6612 #define BF_AIPS_PACRH_WP7(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRH_WP7), uint32_t) & BM_AIPS_PACRH_WP7)
bogdanm 82:6473597d706e 6613
bogdanm 82:6473597d706e 6614 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6615 //! @brief Set the WP7 field to a new value.
bogdanm 82:6473597d706e 6616 #define BW_AIPS_PACRH_WP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP7) = (v))
bogdanm 82:6473597d706e 6617 #endif
bogdanm 82:6473597d706e 6618 //@}
bogdanm 82:6473597d706e 6619
bogdanm 82:6473597d706e 6620 /*!
bogdanm 82:6473597d706e 6621 * @name Register AIPS_PACRH, field SP7[2] (RW)
bogdanm 82:6473597d706e 6622 *
bogdanm 82:6473597d706e 6623 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 6624 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 6625 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 6626 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 6627 * access initiates.
bogdanm 82:6473597d706e 6628 *
bogdanm 82:6473597d706e 6629 * Values:
bogdanm 82:6473597d706e 6630 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 6631 * accesses.
bogdanm 82:6473597d706e 6632 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 6633 */
bogdanm 82:6473597d706e 6634 //@{
bogdanm 82:6473597d706e 6635 #define BP_AIPS_PACRH_SP7 (2U) //!< Bit position for AIPS_PACRH_SP7.
bogdanm 82:6473597d706e 6636 #define BM_AIPS_PACRH_SP7 (0x00000004U) //!< Bit mask for AIPS_PACRH_SP7.
bogdanm 82:6473597d706e 6637 #define BS_AIPS_PACRH_SP7 (1U) //!< Bit field size in bits for AIPS_PACRH_SP7.
bogdanm 82:6473597d706e 6638
bogdanm 82:6473597d706e 6639 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6640 //! @brief Read current value of the AIPS_PACRH_SP7 field.
bogdanm 82:6473597d706e 6641 #define BR_AIPS_PACRH_SP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP7))
bogdanm 82:6473597d706e 6642 #endif
bogdanm 82:6473597d706e 6643
bogdanm 82:6473597d706e 6644 //! @brief Format value for bitfield AIPS_PACRH_SP7.
bogdanm 82:6473597d706e 6645 #define BF_AIPS_PACRH_SP7(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRH_SP7), uint32_t) & BM_AIPS_PACRH_SP7)
bogdanm 82:6473597d706e 6646
bogdanm 82:6473597d706e 6647 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6648 //! @brief Set the SP7 field to a new value.
bogdanm 82:6473597d706e 6649 #define BW_AIPS_PACRH_SP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP7) = (v))
bogdanm 82:6473597d706e 6650 #endif
bogdanm 82:6473597d706e 6651 //@}
bogdanm 82:6473597d706e 6652
bogdanm 82:6473597d706e 6653 /*!
bogdanm 82:6473597d706e 6654 * @name Register AIPS_PACRH, field TP6[4] (RW)
bogdanm 82:6473597d706e 6655 *
bogdanm 82:6473597d706e 6656 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 6657 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 6658 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 6659 *
bogdanm 82:6473597d706e 6660 * Values:
bogdanm 82:6473597d706e 6661 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 6662 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 6663 */
bogdanm 82:6473597d706e 6664 //@{
bogdanm 82:6473597d706e 6665 #define BP_AIPS_PACRH_TP6 (4U) //!< Bit position for AIPS_PACRH_TP6.
bogdanm 82:6473597d706e 6666 #define BM_AIPS_PACRH_TP6 (0x00000010U) //!< Bit mask for AIPS_PACRH_TP6.
bogdanm 82:6473597d706e 6667 #define BS_AIPS_PACRH_TP6 (1U) //!< Bit field size in bits for AIPS_PACRH_TP6.
bogdanm 82:6473597d706e 6668
bogdanm 82:6473597d706e 6669 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6670 //! @brief Read current value of the AIPS_PACRH_TP6 field.
bogdanm 82:6473597d706e 6671 #define BR_AIPS_PACRH_TP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP6))
bogdanm 82:6473597d706e 6672 #endif
bogdanm 82:6473597d706e 6673
bogdanm 82:6473597d706e 6674 //! @brief Format value for bitfield AIPS_PACRH_TP6.
bogdanm 82:6473597d706e 6675 #define BF_AIPS_PACRH_TP6(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRH_TP6), uint32_t) & BM_AIPS_PACRH_TP6)
bogdanm 82:6473597d706e 6676
bogdanm 82:6473597d706e 6677 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6678 //! @brief Set the TP6 field to a new value.
bogdanm 82:6473597d706e 6679 #define BW_AIPS_PACRH_TP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP6) = (v))
bogdanm 82:6473597d706e 6680 #endif
bogdanm 82:6473597d706e 6681 //@}
bogdanm 82:6473597d706e 6682
bogdanm 82:6473597d706e 6683 /*!
bogdanm 82:6473597d706e 6684 * @name Register AIPS_PACRH, field WP6[5] (RW)
bogdanm 82:6473597d706e 6685 *
bogdanm 82:6473597d706e 6686 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 6687 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 6688 * and no peripheral access initiates.
bogdanm 82:6473597d706e 6689 *
bogdanm 82:6473597d706e 6690 * Values:
bogdanm 82:6473597d706e 6691 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 6692 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 6693 */
bogdanm 82:6473597d706e 6694 //@{
bogdanm 82:6473597d706e 6695 #define BP_AIPS_PACRH_WP6 (5U) //!< Bit position for AIPS_PACRH_WP6.
bogdanm 82:6473597d706e 6696 #define BM_AIPS_PACRH_WP6 (0x00000020U) //!< Bit mask for AIPS_PACRH_WP6.
bogdanm 82:6473597d706e 6697 #define BS_AIPS_PACRH_WP6 (1U) //!< Bit field size in bits for AIPS_PACRH_WP6.
bogdanm 82:6473597d706e 6698
bogdanm 82:6473597d706e 6699 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6700 //! @brief Read current value of the AIPS_PACRH_WP6 field.
bogdanm 82:6473597d706e 6701 #define BR_AIPS_PACRH_WP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP6))
bogdanm 82:6473597d706e 6702 #endif
bogdanm 82:6473597d706e 6703
bogdanm 82:6473597d706e 6704 //! @brief Format value for bitfield AIPS_PACRH_WP6.
bogdanm 82:6473597d706e 6705 #define BF_AIPS_PACRH_WP6(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRH_WP6), uint32_t) & BM_AIPS_PACRH_WP6)
bogdanm 82:6473597d706e 6706
bogdanm 82:6473597d706e 6707 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6708 //! @brief Set the WP6 field to a new value.
bogdanm 82:6473597d706e 6709 #define BW_AIPS_PACRH_WP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP6) = (v))
bogdanm 82:6473597d706e 6710 #endif
bogdanm 82:6473597d706e 6711 //@}
bogdanm 82:6473597d706e 6712
bogdanm 82:6473597d706e 6713 /*!
bogdanm 82:6473597d706e 6714 * @name Register AIPS_PACRH, field SP6[6] (RW)
bogdanm 82:6473597d706e 6715 *
bogdanm 82:6473597d706e 6716 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 6717 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 6718 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 6719 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 6720 * access initiates.
bogdanm 82:6473597d706e 6721 *
bogdanm 82:6473597d706e 6722 * Values:
bogdanm 82:6473597d706e 6723 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 6724 * accesses.
bogdanm 82:6473597d706e 6725 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 6726 */
bogdanm 82:6473597d706e 6727 //@{
bogdanm 82:6473597d706e 6728 #define BP_AIPS_PACRH_SP6 (6U) //!< Bit position for AIPS_PACRH_SP6.
bogdanm 82:6473597d706e 6729 #define BM_AIPS_PACRH_SP6 (0x00000040U) //!< Bit mask for AIPS_PACRH_SP6.
bogdanm 82:6473597d706e 6730 #define BS_AIPS_PACRH_SP6 (1U) //!< Bit field size in bits for AIPS_PACRH_SP6.
bogdanm 82:6473597d706e 6731
bogdanm 82:6473597d706e 6732 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6733 //! @brief Read current value of the AIPS_PACRH_SP6 field.
bogdanm 82:6473597d706e 6734 #define BR_AIPS_PACRH_SP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP6))
bogdanm 82:6473597d706e 6735 #endif
bogdanm 82:6473597d706e 6736
bogdanm 82:6473597d706e 6737 //! @brief Format value for bitfield AIPS_PACRH_SP6.
bogdanm 82:6473597d706e 6738 #define BF_AIPS_PACRH_SP6(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRH_SP6), uint32_t) & BM_AIPS_PACRH_SP6)
bogdanm 82:6473597d706e 6739
bogdanm 82:6473597d706e 6740 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6741 //! @brief Set the SP6 field to a new value.
bogdanm 82:6473597d706e 6742 #define BW_AIPS_PACRH_SP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP6) = (v))
bogdanm 82:6473597d706e 6743 #endif
bogdanm 82:6473597d706e 6744 //@}
bogdanm 82:6473597d706e 6745
bogdanm 82:6473597d706e 6746 /*!
bogdanm 82:6473597d706e 6747 * @name Register AIPS_PACRH, field TP5[8] (RW)
bogdanm 82:6473597d706e 6748 *
bogdanm 82:6473597d706e 6749 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 6750 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 6751 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 6752 *
bogdanm 82:6473597d706e 6753 * Values:
bogdanm 82:6473597d706e 6754 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 6755 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 6756 */
bogdanm 82:6473597d706e 6757 //@{
bogdanm 82:6473597d706e 6758 #define BP_AIPS_PACRH_TP5 (8U) //!< Bit position for AIPS_PACRH_TP5.
bogdanm 82:6473597d706e 6759 #define BM_AIPS_PACRH_TP5 (0x00000100U) //!< Bit mask for AIPS_PACRH_TP5.
bogdanm 82:6473597d706e 6760 #define BS_AIPS_PACRH_TP5 (1U) //!< Bit field size in bits for AIPS_PACRH_TP5.
bogdanm 82:6473597d706e 6761
bogdanm 82:6473597d706e 6762 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6763 //! @brief Read current value of the AIPS_PACRH_TP5 field.
bogdanm 82:6473597d706e 6764 #define BR_AIPS_PACRH_TP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP5))
bogdanm 82:6473597d706e 6765 #endif
bogdanm 82:6473597d706e 6766
bogdanm 82:6473597d706e 6767 //! @brief Format value for bitfield AIPS_PACRH_TP5.
bogdanm 82:6473597d706e 6768 #define BF_AIPS_PACRH_TP5(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRH_TP5), uint32_t) & BM_AIPS_PACRH_TP5)
bogdanm 82:6473597d706e 6769
bogdanm 82:6473597d706e 6770 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6771 //! @brief Set the TP5 field to a new value.
bogdanm 82:6473597d706e 6772 #define BW_AIPS_PACRH_TP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP5) = (v))
bogdanm 82:6473597d706e 6773 #endif
bogdanm 82:6473597d706e 6774 //@}
bogdanm 82:6473597d706e 6775
bogdanm 82:6473597d706e 6776 /*!
bogdanm 82:6473597d706e 6777 * @name Register AIPS_PACRH, field WP5[9] (RW)
bogdanm 82:6473597d706e 6778 *
bogdanm 82:6473597d706e 6779 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 6780 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 6781 * and no peripheral access initiates.
bogdanm 82:6473597d706e 6782 *
bogdanm 82:6473597d706e 6783 * Values:
bogdanm 82:6473597d706e 6784 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 6785 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 6786 */
bogdanm 82:6473597d706e 6787 //@{
bogdanm 82:6473597d706e 6788 #define BP_AIPS_PACRH_WP5 (9U) //!< Bit position for AIPS_PACRH_WP5.
bogdanm 82:6473597d706e 6789 #define BM_AIPS_PACRH_WP5 (0x00000200U) //!< Bit mask for AIPS_PACRH_WP5.
bogdanm 82:6473597d706e 6790 #define BS_AIPS_PACRH_WP5 (1U) //!< Bit field size in bits for AIPS_PACRH_WP5.
bogdanm 82:6473597d706e 6791
bogdanm 82:6473597d706e 6792 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6793 //! @brief Read current value of the AIPS_PACRH_WP5 field.
bogdanm 82:6473597d706e 6794 #define BR_AIPS_PACRH_WP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP5))
bogdanm 82:6473597d706e 6795 #endif
bogdanm 82:6473597d706e 6796
bogdanm 82:6473597d706e 6797 //! @brief Format value for bitfield AIPS_PACRH_WP5.
bogdanm 82:6473597d706e 6798 #define BF_AIPS_PACRH_WP5(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRH_WP5), uint32_t) & BM_AIPS_PACRH_WP5)
bogdanm 82:6473597d706e 6799
bogdanm 82:6473597d706e 6800 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6801 //! @brief Set the WP5 field to a new value.
bogdanm 82:6473597d706e 6802 #define BW_AIPS_PACRH_WP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP5) = (v))
bogdanm 82:6473597d706e 6803 #endif
bogdanm 82:6473597d706e 6804 //@}
bogdanm 82:6473597d706e 6805
bogdanm 82:6473597d706e 6806 /*!
bogdanm 82:6473597d706e 6807 * @name Register AIPS_PACRH, field SP5[10] (RW)
bogdanm 82:6473597d706e 6808 *
bogdanm 82:6473597d706e 6809 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 6810 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 6811 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 6812 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 6813 * access initiates.
bogdanm 82:6473597d706e 6814 *
bogdanm 82:6473597d706e 6815 * Values:
bogdanm 82:6473597d706e 6816 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 6817 * accesses.
bogdanm 82:6473597d706e 6818 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 6819 */
bogdanm 82:6473597d706e 6820 //@{
bogdanm 82:6473597d706e 6821 #define BP_AIPS_PACRH_SP5 (10U) //!< Bit position for AIPS_PACRH_SP5.
bogdanm 82:6473597d706e 6822 #define BM_AIPS_PACRH_SP5 (0x00000400U) //!< Bit mask for AIPS_PACRH_SP5.
bogdanm 82:6473597d706e 6823 #define BS_AIPS_PACRH_SP5 (1U) //!< Bit field size in bits for AIPS_PACRH_SP5.
bogdanm 82:6473597d706e 6824
bogdanm 82:6473597d706e 6825 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6826 //! @brief Read current value of the AIPS_PACRH_SP5 field.
bogdanm 82:6473597d706e 6827 #define BR_AIPS_PACRH_SP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP5))
bogdanm 82:6473597d706e 6828 #endif
bogdanm 82:6473597d706e 6829
bogdanm 82:6473597d706e 6830 //! @brief Format value for bitfield AIPS_PACRH_SP5.
bogdanm 82:6473597d706e 6831 #define BF_AIPS_PACRH_SP5(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRH_SP5), uint32_t) & BM_AIPS_PACRH_SP5)
bogdanm 82:6473597d706e 6832
bogdanm 82:6473597d706e 6833 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6834 //! @brief Set the SP5 field to a new value.
bogdanm 82:6473597d706e 6835 #define BW_AIPS_PACRH_SP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP5) = (v))
bogdanm 82:6473597d706e 6836 #endif
bogdanm 82:6473597d706e 6837 //@}
bogdanm 82:6473597d706e 6838
bogdanm 82:6473597d706e 6839 /*!
bogdanm 82:6473597d706e 6840 * @name Register AIPS_PACRH, field TP4[12] (RW)
bogdanm 82:6473597d706e 6841 *
bogdanm 82:6473597d706e 6842 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 6843 * When this bit is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 6844 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 6845 *
bogdanm 82:6473597d706e 6846 * Values:
bogdanm 82:6473597d706e 6847 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 6848 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 6849 */
bogdanm 82:6473597d706e 6850 //@{
bogdanm 82:6473597d706e 6851 #define BP_AIPS_PACRH_TP4 (12U) //!< Bit position for AIPS_PACRH_TP4.
bogdanm 82:6473597d706e 6852 #define BM_AIPS_PACRH_TP4 (0x00001000U) //!< Bit mask for AIPS_PACRH_TP4.
bogdanm 82:6473597d706e 6853 #define BS_AIPS_PACRH_TP4 (1U) //!< Bit field size in bits for AIPS_PACRH_TP4.
bogdanm 82:6473597d706e 6854
bogdanm 82:6473597d706e 6855 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6856 //! @brief Read current value of the AIPS_PACRH_TP4 field.
bogdanm 82:6473597d706e 6857 #define BR_AIPS_PACRH_TP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP4))
bogdanm 82:6473597d706e 6858 #endif
bogdanm 82:6473597d706e 6859
bogdanm 82:6473597d706e 6860 //! @brief Format value for bitfield AIPS_PACRH_TP4.
bogdanm 82:6473597d706e 6861 #define BF_AIPS_PACRH_TP4(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRH_TP4), uint32_t) & BM_AIPS_PACRH_TP4)
bogdanm 82:6473597d706e 6862
bogdanm 82:6473597d706e 6863 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6864 //! @brief Set the TP4 field to a new value.
bogdanm 82:6473597d706e 6865 #define BW_AIPS_PACRH_TP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP4) = (v))
bogdanm 82:6473597d706e 6866 #endif
bogdanm 82:6473597d706e 6867 //@}
bogdanm 82:6473597d706e 6868
bogdanm 82:6473597d706e 6869 /*!
bogdanm 82:6473597d706e 6870 * @name Register AIPS_PACRH, field WP4[13] (RW)
bogdanm 82:6473597d706e 6871 *
bogdanm 82:6473597d706e 6872 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 6873 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 6874 * and no peripheral access initiates.
bogdanm 82:6473597d706e 6875 *
bogdanm 82:6473597d706e 6876 * Values:
bogdanm 82:6473597d706e 6877 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 6878 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 6879 */
bogdanm 82:6473597d706e 6880 //@{
bogdanm 82:6473597d706e 6881 #define BP_AIPS_PACRH_WP4 (13U) //!< Bit position for AIPS_PACRH_WP4.
bogdanm 82:6473597d706e 6882 #define BM_AIPS_PACRH_WP4 (0x00002000U) //!< Bit mask for AIPS_PACRH_WP4.
bogdanm 82:6473597d706e 6883 #define BS_AIPS_PACRH_WP4 (1U) //!< Bit field size in bits for AIPS_PACRH_WP4.
bogdanm 82:6473597d706e 6884
bogdanm 82:6473597d706e 6885 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6886 //! @brief Read current value of the AIPS_PACRH_WP4 field.
bogdanm 82:6473597d706e 6887 #define BR_AIPS_PACRH_WP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP4))
bogdanm 82:6473597d706e 6888 #endif
bogdanm 82:6473597d706e 6889
bogdanm 82:6473597d706e 6890 //! @brief Format value for bitfield AIPS_PACRH_WP4.
bogdanm 82:6473597d706e 6891 #define BF_AIPS_PACRH_WP4(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRH_WP4), uint32_t) & BM_AIPS_PACRH_WP4)
bogdanm 82:6473597d706e 6892
bogdanm 82:6473597d706e 6893 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6894 //! @brief Set the WP4 field to a new value.
bogdanm 82:6473597d706e 6895 #define BW_AIPS_PACRH_WP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP4) = (v))
bogdanm 82:6473597d706e 6896 #endif
bogdanm 82:6473597d706e 6897 //@}
bogdanm 82:6473597d706e 6898
bogdanm 82:6473597d706e 6899 /*!
bogdanm 82:6473597d706e 6900 * @name Register AIPS_PACRH, field SP4[14] (RW)
bogdanm 82:6473597d706e 6901 *
bogdanm 82:6473597d706e 6902 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 6903 * access. When this bit is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 6904 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
bogdanm 82:6473597d706e 6905 * set. If not, access terminates with an error response and no peripheral access
bogdanm 82:6473597d706e 6906 * initiates.
bogdanm 82:6473597d706e 6907 *
bogdanm 82:6473597d706e 6908 * Values:
bogdanm 82:6473597d706e 6909 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 6910 * accesses.
bogdanm 82:6473597d706e 6911 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 6912 */
bogdanm 82:6473597d706e 6913 //@{
bogdanm 82:6473597d706e 6914 #define BP_AIPS_PACRH_SP4 (14U) //!< Bit position for AIPS_PACRH_SP4.
bogdanm 82:6473597d706e 6915 #define BM_AIPS_PACRH_SP4 (0x00004000U) //!< Bit mask for AIPS_PACRH_SP4.
bogdanm 82:6473597d706e 6916 #define BS_AIPS_PACRH_SP4 (1U) //!< Bit field size in bits for AIPS_PACRH_SP4.
bogdanm 82:6473597d706e 6917
bogdanm 82:6473597d706e 6918 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6919 //! @brief Read current value of the AIPS_PACRH_SP4 field.
bogdanm 82:6473597d706e 6920 #define BR_AIPS_PACRH_SP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP4))
bogdanm 82:6473597d706e 6921 #endif
bogdanm 82:6473597d706e 6922
bogdanm 82:6473597d706e 6923 //! @brief Format value for bitfield AIPS_PACRH_SP4.
bogdanm 82:6473597d706e 6924 #define BF_AIPS_PACRH_SP4(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRH_SP4), uint32_t) & BM_AIPS_PACRH_SP4)
bogdanm 82:6473597d706e 6925
bogdanm 82:6473597d706e 6926 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6927 //! @brief Set the SP4 field to a new value.
bogdanm 82:6473597d706e 6928 #define BW_AIPS_PACRH_SP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP4) = (v))
bogdanm 82:6473597d706e 6929 #endif
bogdanm 82:6473597d706e 6930 //@}
bogdanm 82:6473597d706e 6931
bogdanm 82:6473597d706e 6932 /*!
bogdanm 82:6473597d706e 6933 * @name Register AIPS_PACRH, field TP3[16] (RW)
bogdanm 82:6473597d706e 6934 *
bogdanm 82:6473597d706e 6935 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 6936 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 6937 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 6938 *
bogdanm 82:6473597d706e 6939 * Values:
bogdanm 82:6473597d706e 6940 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 6941 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 6942 */
bogdanm 82:6473597d706e 6943 //@{
bogdanm 82:6473597d706e 6944 #define BP_AIPS_PACRH_TP3 (16U) //!< Bit position for AIPS_PACRH_TP3.
bogdanm 82:6473597d706e 6945 #define BM_AIPS_PACRH_TP3 (0x00010000U) //!< Bit mask for AIPS_PACRH_TP3.
bogdanm 82:6473597d706e 6946 #define BS_AIPS_PACRH_TP3 (1U) //!< Bit field size in bits for AIPS_PACRH_TP3.
bogdanm 82:6473597d706e 6947
bogdanm 82:6473597d706e 6948 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6949 //! @brief Read current value of the AIPS_PACRH_TP3 field.
bogdanm 82:6473597d706e 6950 #define BR_AIPS_PACRH_TP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP3))
bogdanm 82:6473597d706e 6951 #endif
bogdanm 82:6473597d706e 6952
bogdanm 82:6473597d706e 6953 //! @brief Format value for bitfield AIPS_PACRH_TP3.
bogdanm 82:6473597d706e 6954 #define BF_AIPS_PACRH_TP3(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRH_TP3), uint32_t) & BM_AIPS_PACRH_TP3)
bogdanm 82:6473597d706e 6955
bogdanm 82:6473597d706e 6956 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6957 //! @brief Set the TP3 field to a new value.
bogdanm 82:6473597d706e 6958 #define BW_AIPS_PACRH_TP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP3) = (v))
bogdanm 82:6473597d706e 6959 #endif
bogdanm 82:6473597d706e 6960 //@}
bogdanm 82:6473597d706e 6961
bogdanm 82:6473597d706e 6962 /*!
bogdanm 82:6473597d706e 6963 * @name Register AIPS_PACRH, field WP3[17] (RW)
bogdanm 82:6473597d706e 6964 *
bogdanm 82:6473597d706e 6965 * Determines whether the peripheral allows write accesss. When this bit is set
bogdanm 82:6473597d706e 6966 * and a write access is attempted, access terminates with an error response and
bogdanm 82:6473597d706e 6967 * no peripheral access initiates.
bogdanm 82:6473597d706e 6968 *
bogdanm 82:6473597d706e 6969 * Values:
bogdanm 82:6473597d706e 6970 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 6971 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 6972 */
bogdanm 82:6473597d706e 6973 //@{
bogdanm 82:6473597d706e 6974 #define BP_AIPS_PACRH_WP3 (17U) //!< Bit position for AIPS_PACRH_WP3.
bogdanm 82:6473597d706e 6975 #define BM_AIPS_PACRH_WP3 (0x00020000U) //!< Bit mask for AIPS_PACRH_WP3.
bogdanm 82:6473597d706e 6976 #define BS_AIPS_PACRH_WP3 (1U) //!< Bit field size in bits for AIPS_PACRH_WP3.
bogdanm 82:6473597d706e 6977
bogdanm 82:6473597d706e 6978 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6979 //! @brief Read current value of the AIPS_PACRH_WP3 field.
bogdanm 82:6473597d706e 6980 #define BR_AIPS_PACRH_WP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP3))
bogdanm 82:6473597d706e 6981 #endif
bogdanm 82:6473597d706e 6982
bogdanm 82:6473597d706e 6983 //! @brief Format value for bitfield AIPS_PACRH_WP3.
bogdanm 82:6473597d706e 6984 #define BF_AIPS_PACRH_WP3(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRH_WP3), uint32_t) & BM_AIPS_PACRH_WP3)
bogdanm 82:6473597d706e 6985
bogdanm 82:6473597d706e 6986 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 6987 //! @brief Set the WP3 field to a new value.
bogdanm 82:6473597d706e 6988 #define BW_AIPS_PACRH_WP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP3) = (v))
bogdanm 82:6473597d706e 6989 #endif
bogdanm 82:6473597d706e 6990 //@}
bogdanm 82:6473597d706e 6991
bogdanm 82:6473597d706e 6992 /*!
bogdanm 82:6473597d706e 6993 * @name Register AIPS_PACRH, field SP3[18] (RW)
bogdanm 82:6473597d706e 6994 *
bogdanm 82:6473597d706e 6995 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 6996 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 6997 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 6998 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 6999 * access initiates.
bogdanm 82:6473597d706e 7000 *
bogdanm 82:6473597d706e 7001 * Values:
bogdanm 82:6473597d706e 7002 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 7003 * accesses.
bogdanm 82:6473597d706e 7004 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 7005 */
bogdanm 82:6473597d706e 7006 //@{
bogdanm 82:6473597d706e 7007 #define BP_AIPS_PACRH_SP3 (18U) //!< Bit position for AIPS_PACRH_SP3.
bogdanm 82:6473597d706e 7008 #define BM_AIPS_PACRH_SP3 (0x00040000U) //!< Bit mask for AIPS_PACRH_SP3.
bogdanm 82:6473597d706e 7009 #define BS_AIPS_PACRH_SP3 (1U) //!< Bit field size in bits for AIPS_PACRH_SP3.
bogdanm 82:6473597d706e 7010
bogdanm 82:6473597d706e 7011 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7012 //! @brief Read current value of the AIPS_PACRH_SP3 field.
bogdanm 82:6473597d706e 7013 #define BR_AIPS_PACRH_SP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP3))
bogdanm 82:6473597d706e 7014 #endif
bogdanm 82:6473597d706e 7015
bogdanm 82:6473597d706e 7016 //! @brief Format value for bitfield AIPS_PACRH_SP3.
bogdanm 82:6473597d706e 7017 #define BF_AIPS_PACRH_SP3(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRH_SP3), uint32_t) & BM_AIPS_PACRH_SP3)
bogdanm 82:6473597d706e 7018
bogdanm 82:6473597d706e 7019 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7020 //! @brief Set the SP3 field to a new value.
bogdanm 82:6473597d706e 7021 #define BW_AIPS_PACRH_SP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP3) = (v))
bogdanm 82:6473597d706e 7022 #endif
bogdanm 82:6473597d706e 7023 //@}
bogdanm 82:6473597d706e 7024
bogdanm 82:6473597d706e 7025 /*!
bogdanm 82:6473597d706e 7026 * @name Register AIPS_PACRH, field TP2[20] (RW)
bogdanm 82:6473597d706e 7027 *
bogdanm 82:6473597d706e 7028 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 7029 * When this bit is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 7030 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 7031 *
bogdanm 82:6473597d706e 7032 * Values:
bogdanm 82:6473597d706e 7033 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 7034 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 7035 */
bogdanm 82:6473597d706e 7036 //@{
bogdanm 82:6473597d706e 7037 #define BP_AIPS_PACRH_TP2 (20U) //!< Bit position for AIPS_PACRH_TP2.
bogdanm 82:6473597d706e 7038 #define BM_AIPS_PACRH_TP2 (0x00100000U) //!< Bit mask for AIPS_PACRH_TP2.
bogdanm 82:6473597d706e 7039 #define BS_AIPS_PACRH_TP2 (1U) //!< Bit field size in bits for AIPS_PACRH_TP2.
bogdanm 82:6473597d706e 7040
bogdanm 82:6473597d706e 7041 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7042 //! @brief Read current value of the AIPS_PACRH_TP2 field.
bogdanm 82:6473597d706e 7043 #define BR_AIPS_PACRH_TP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP2))
bogdanm 82:6473597d706e 7044 #endif
bogdanm 82:6473597d706e 7045
bogdanm 82:6473597d706e 7046 //! @brief Format value for bitfield AIPS_PACRH_TP2.
bogdanm 82:6473597d706e 7047 #define BF_AIPS_PACRH_TP2(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRH_TP2), uint32_t) & BM_AIPS_PACRH_TP2)
bogdanm 82:6473597d706e 7048
bogdanm 82:6473597d706e 7049 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7050 //! @brief Set the TP2 field to a new value.
bogdanm 82:6473597d706e 7051 #define BW_AIPS_PACRH_TP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP2) = (v))
bogdanm 82:6473597d706e 7052 #endif
bogdanm 82:6473597d706e 7053 //@}
bogdanm 82:6473597d706e 7054
bogdanm 82:6473597d706e 7055 /*!
bogdanm 82:6473597d706e 7056 * @name Register AIPS_PACRH, field WP2[21] (RW)
bogdanm 82:6473597d706e 7057 *
bogdanm 82:6473597d706e 7058 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 7059 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 7060 * and no peripheral access initiates.
bogdanm 82:6473597d706e 7061 *
bogdanm 82:6473597d706e 7062 * Values:
bogdanm 82:6473597d706e 7063 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 7064 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 7065 */
bogdanm 82:6473597d706e 7066 //@{
bogdanm 82:6473597d706e 7067 #define BP_AIPS_PACRH_WP2 (21U) //!< Bit position for AIPS_PACRH_WP2.
bogdanm 82:6473597d706e 7068 #define BM_AIPS_PACRH_WP2 (0x00200000U) //!< Bit mask for AIPS_PACRH_WP2.
bogdanm 82:6473597d706e 7069 #define BS_AIPS_PACRH_WP2 (1U) //!< Bit field size in bits for AIPS_PACRH_WP2.
bogdanm 82:6473597d706e 7070
bogdanm 82:6473597d706e 7071 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7072 //! @brief Read current value of the AIPS_PACRH_WP2 field.
bogdanm 82:6473597d706e 7073 #define BR_AIPS_PACRH_WP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP2))
bogdanm 82:6473597d706e 7074 #endif
bogdanm 82:6473597d706e 7075
bogdanm 82:6473597d706e 7076 //! @brief Format value for bitfield AIPS_PACRH_WP2.
bogdanm 82:6473597d706e 7077 #define BF_AIPS_PACRH_WP2(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRH_WP2), uint32_t) & BM_AIPS_PACRH_WP2)
bogdanm 82:6473597d706e 7078
bogdanm 82:6473597d706e 7079 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7080 //! @brief Set the WP2 field to a new value.
bogdanm 82:6473597d706e 7081 #define BW_AIPS_PACRH_WP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP2) = (v))
bogdanm 82:6473597d706e 7082 #endif
bogdanm 82:6473597d706e 7083 //@}
bogdanm 82:6473597d706e 7084
bogdanm 82:6473597d706e 7085 /*!
bogdanm 82:6473597d706e 7086 * @name Register AIPS_PACRH, field SP2[22] (RW)
bogdanm 82:6473597d706e 7087 *
bogdanm 82:6473597d706e 7088 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 7089 * access. When this bit is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 7090 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
bogdanm 82:6473597d706e 7091 * set. If not, access terminates with an error response and no peripheral access
bogdanm 82:6473597d706e 7092 * initiates.
bogdanm 82:6473597d706e 7093 *
bogdanm 82:6473597d706e 7094 * Values:
bogdanm 82:6473597d706e 7095 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 7096 * accesses.
bogdanm 82:6473597d706e 7097 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 7098 */
bogdanm 82:6473597d706e 7099 //@{
bogdanm 82:6473597d706e 7100 #define BP_AIPS_PACRH_SP2 (22U) //!< Bit position for AIPS_PACRH_SP2.
bogdanm 82:6473597d706e 7101 #define BM_AIPS_PACRH_SP2 (0x00400000U) //!< Bit mask for AIPS_PACRH_SP2.
bogdanm 82:6473597d706e 7102 #define BS_AIPS_PACRH_SP2 (1U) //!< Bit field size in bits for AIPS_PACRH_SP2.
bogdanm 82:6473597d706e 7103
bogdanm 82:6473597d706e 7104 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7105 //! @brief Read current value of the AIPS_PACRH_SP2 field.
bogdanm 82:6473597d706e 7106 #define BR_AIPS_PACRH_SP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP2))
bogdanm 82:6473597d706e 7107 #endif
bogdanm 82:6473597d706e 7108
bogdanm 82:6473597d706e 7109 //! @brief Format value for bitfield AIPS_PACRH_SP2.
bogdanm 82:6473597d706e 7110 #define BF_AIPS_PACRH_SP2(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRH_SP2), uint32_t) & BM_AIPS_PACRH_SP2)
bogdanm 82:6473597d706e 7111
bogdanm 82:6473597d706e 7112 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7113 //! @brief Set the SP2 field to a new value.
bogdanm 82:6473597d706e 7114 #define BW_AIPS_PACRH_SP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP2) = (v))
bogdanm 82:6473597d706e 7115 #endif
bogdanm 82:6473597d706e 7116 //@}
bogdanm 82:6473597d706e 7117
bogdanm 82:6473597d706e 7118 /*!
bogdanm 82:6473597d706e 7119 * @name Register AIPS_PACRH, field TP1[24] (RW)
bogdanm 82:6473597d706e 7120 *
bogdanm 82:6473597d706e 7121 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 7122 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 7123 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 7124 *
bogdanm 82:6473597d706e 7125 * Values:
bogdanm 82:6473597d706e 7126 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 7127 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 7128 */
bogdanm 82:6473597d706e 7129 //@{
bogdanm 82:6473597d706e 7130 #define BP_AIPS_PACRH_TP1 (24U) //!< Bit position for AIPS_PACRH_TP1.
bogdanm 82:6473597d706e 7131 #define BM_AIPS_PACRH_TP1 (0x01000000U) //!< Bit mask for AIPS_PACRH_TP1.
bogdanm 82:6473597d706e 7132 #define BS_AIPS_PACRH_TP1 (1U) //!< Bit field size in bits for AIPS_PACRH_TP1.
bogdanm 82:6473597d706e 7133
bogdanm 82:6473597d706e 7134 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7135 //! @brief Read current value of the AIPS_PACRH_TP1 field.
bogdanm 82:6473597d706e 7136 #define BR_AIPS_PACRH_TP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP1))
bogdanm 82:6473597d706e 7137 #endif
bogdanm 82:6473597d706e 7138
bogdanm 82:6473597d706e 7139 //! @brief Format value for bitfield AIPS_PACRH_TP1.
bogdanm 82:6473597d706e 7140 #define BF_AIPS_PACRH_TP1(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRH_TP1), uint32_t) & BM_AIPS_PACRH_TP1)
bogdanm 82:6473597d706e 7141
bogdanm 82:6473597d706e 7142 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7143 //! @brief Set the TP1 field to a new value.
bogdanm 82:6473597d706e 7144 #define BW_AIPS_PACRH_TP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP1) = (v))
bogdanm 82:6473597d706e 7145 #endif
bogdanm 82:6473597d706e 7146 //@}
bogdanm 82:6473597d706e 7147
bogdanm 82:6473597d706e 7148 /*!
bogdanm 82:6473597d706e 7149 * @name Register AIPS_PACRH, field WP1[25] (RW)
bogdanm 82:6473597d706e 7150 *
bogdanm 82:6473597d706e 7151 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 7152 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 7153 * and no peripheral access initiates.
bogdanm 82:6473597d706e 7154 *
bogdanm 82:6473597d706e 7155 * Values:
bogdanm 82:6473597d706e 7156 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 7157 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 7158 */
bogdanm 82:6473597d706e 7159 //@{
bogdanm 82:6473597d706e 7160 #define BP_AIPS_PACRH_WP1 (25U) //!< Bit position for AIPS_PACRH_WP1.
bogdanm 82:6473597d706e 7161 #define BM_AIPS_PACRH_WP1 (0x02000000U) //!< Bit mask for AIPS_PACRH_WP1.
bogdanm 82:6473597d706e 7162 #define BS_AIPS_PACRH_WP1 (1U) //!< Bit field size in bits for AIPS_PACRH_WP1.
bogdanm 82:6473597d706e 7163
bogdanm 82:6473597d706e 7164 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7165 //! @brief Read current value of the AIPS_PACRH_WP1 field.
bogdanm 82:6473597d706e 7166 #define BR_AIPS_PACRH_WP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP1))
bogdanm 82:6473597d706e 7167 #endif
bogdanm 82:6473597d706e 7168
bogdanm 82:6473597d706e 7169 //! @brief Format value for bitfield AIPS_PACRH_WP1.
bogdanm 82:6473597d706e 7170 #define BF_AIPS_PACRH_WP1(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRH_WP1), uint32_t) & BM_AIPS_PACRH_WP1)
bogdanm 82:6473597d706e 7171
bogdanm 82:6473597d706e 7172 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7173 //! @brief Set the WP1 field to a new value.
bogdanm 82:6473597d706e 7174 #define BW_AIPS_PACRH_WP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP1) = (v))
bogdanm 82:6473597d706e 7175 #endif
bogdanm 82:6473597d706e 7176 //@}
bogdanm 82:6473597d706e 7177
bogdanm 82:6473597d706e 7178 /*!
bogdanm 82:6473597d706e 7179 * @name Register AIPS_PACRH, field SP1[26] (RW)
bogdanm 82:6473597d706e 7180 *
bogdanm 82:6473597d706e 7181 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 7182 * access. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 7183 * supervisor access attribute, and the MPRx[MPLn] control field for the master must
bogdanm 82:6473597d706e 7184 * be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 7185 * access initiates.
bogdanm 82:6473597d706e 7186 *
bogdanm 82:6473597d706e 7187 * Values:
bogdanm 82:6473597d706e 7188 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 7189 * accesses.
bogdanm 82:6473597d706e 7190 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 7191 */
bogdanm 82:6473597d706e 7192 //@{
bogdanm 82:6473597d706e 7193 #define BP_AIPS_PACRH_SP1 (26U) //!< Bit position for AIPS_PACRH_SP1.
bogdanm 82:6473597d706e 7194 #define BM_AIPS_PACRH_SP1 (0x04000000U) //!< Bit mask for AIPS_PACRH_SP1.
bogdanm 82:6473597d706e 7195 #define BS_AIPS_PACRH_SP1 (1U) //!< Bit field size in bits for AIPS_PACRH_SP1.
bogdanm 82:6473597d706e 7196
bogdanm 82:6473597d706e 7197 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7198 //! @brief Read current value of the AIPS_PACRH_SP1 field.
bogdanm 82:6473597d706e 7199 #define BR_AIPS_PACRH_SP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP1))
bogdanm 82:6473597d706e 7200 #endif
bogdanm 82:6473597d706e 7201
bogdanm 82:6473597d706e 7202 //! @brief Format value for bitfield AIPS_PACRH_SP1.
bogdanm 82:6473597d706e 7203 #define BF_AIPS_PACRH_SP1(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRH_SP1), uint32_t) & BM_AIPS_PACRH_SP1)
bogdanm 82:6473597d706e 7204
bogdanm 82:6473597d706e 7205 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7206 //! @brief Set the SP1 field to a new value.
bogdanm 82:6473597d706e 7207 #define BW_AIPS_PACRH_SP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP1) = (v))
bogdanm 82:6473597d706e 7208 #endif
bogdanm 82:6473597d706e 7209 //@}
bogdanm 82:6473597d706e 7210
bogdanm 82:6473597d706e 7211 /*!
bogdanm 82:6473597d706e 7212 * @name Register AIPS_PACRH, field TP0[28] (RW)
bogdanm 82:6473597d706e 7213 *
bogdanm 82:6473597d706e 7214 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 7215 * When this bit is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 7216 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 7217 *
bogdanm 82:6473597d706e 7218 * Values:
bogdanm 82:6473597d706e 7219 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 7220 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 7221 */
bogdanm 82:6473597d706e 7222 //@{
bogdanm 82:6473597d706e 7223 #define BP_AIPS_PACRH_TP0 (28U) //!< Bit position for AIPS_PACRH_TP0.
bogdanm 82:6473597d706e 7224 #define BM_AIPS_PACRH_TP0 (0x10000000U) //!< Bit mask for AIPS_PACRH_TP0.
bogdanm 82:6473597d706e 7225 #define BS_AIPS_PACRH_TP0 (1U) //!< Bit field size in bits for AIPS_PACRH_TP0.
bogdanm 82:6473597d706e 7226
bogdanm 82:6473597d706e 7227 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7228 //! @brief Read current value of the AIPS_PACRH_TP0 field.
bogdanm 82:6473597d706e 7229 #define BR_AIPS_PACRH_TP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP0))
bogdanm 82:6473597d706e 7230 #endif
bogdanm 82:6473597d706e 7231
bogdanm 82:6473597d706e 7232 //! @brief Format value for bitfield AIPS_PACRH_TP0.
bogdanm 82:6473597d706e 7233 #define BF_AIPS_PACRH_TP0(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRH_TP0), uint32_t) & BM_AIPS_PACRH_TP0)
bogdanm 82:6473597d706e 7234
bogdanm 82:6473597d706e 7235 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7236 //! @brief Set the TP0 field to a new value.
bogdanm 82:6473597d706e 7237 #define BW_AIPS_PACRH_TP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_TP0) = (v))
bogdanm 82:6473597d706e 7238 #endif
bogdanm 82:6473597d706e 7239 //@}
bogdanm 82:6473597d706e 7240
bogdanm 82:6473597d706e 7241 /*!
bogdanm 82:6473597d706e 7242 * @name Register AIPS_PACRH, field WP0[29] (RW)
bogdanm 82:6473597d706e 7243 *
bogdanm 82:6473597d706e 7244 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 7245 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 7246 * and no peripheral access initiates.
bogdanm 82:6473597d706e 7247 *
bogdanm 82:6473597d706e 7248 * Values:
bogdanm 82:6473597d706e 7249 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 7250 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 7251 */
bogdanm 82:6473597d706e 7252 //@{
bogdanm 82:6473597d706e 7253 #define BP_AIPS_PACRH_WP0 (29U) //!< Bit position for AIPS_PACRH_WP0.
bogdanm 82:6473597d706e 7254 #define BM_AIPS_PACRH_WP0 (0x20000000U) //!< Bit mask for AIPS_PACRH_WP0.
bogdanm 82:6473597d706e 7255 #define BS_AIPS_PACRH_WP0 (1U) //!< Bit field size in bits for AIPS_PACRH_WP0.
bogdanm 82:6473597d706e 7256
bogdanm 82:6473597d706e 7257 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7258 //! @brief Read current value of the AIPS_PACRH_WP0 field.
bogdanm 82:6473597d706e 7259 #define BR_AIPS_PACRH_WP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP0))
bogdanm 82:6473597d706e 7260 #endif
bogdanm 82:6473597d706e 7261
bogdanm 82:6473597d706e 7262 //! @brief Format value for bitfield AIPS_PACRH_WP0.
bogdanm 82:6473597d706e 7263 #define BF_AIPS_PACRH_WP0(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRH_WP0), uint32_t) & BM_AIPS_PACRH_WP0)
bogdanm 82:6473597d706e 7264
bogdanm 82:6473597d706e 7265 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7266 //! @brief Set the WP0 field to a new value.
bogdanm 82:6473597d706e 7267 #define BW_AIPS_PACRH_WP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_WP0) = (v))
bogdanm 82:6473597d706e 7268 #endif
bogdanm 82:6473597d706e 7269 //@}
bogdanm 82:6473597d706e 7270
bogdanm 82:6473597d706e 7271 /*!
bogdanm 82:6473597d706e 7272 * @name Register AIPS_PACRH, field SP0[30] (RW)
bogdanm 82:6473597d706e 7273 *
bogdanm 82:6473597d706e 7274 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 7275 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 7276 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 7277 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 7278 * access initiates.
bogdanm 82:6473597d706e 7279 *
bogdanm 82:6473597d706e 7280 * Values:
bogdanm 82:6473597d706e 7281 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 7282 * accesses.
bogdanm 82:6473597d706e 7283 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 7284 */
bogdanm 82:6473597d706e 7285 //@{
bogdanm 82:6473597d706e 7286 #define BP_AIPS_PACRH_SP0 (30U) //!< Bit position for AIPS_PACRH_SP0.
bogdanm 82:6473597d706e 7287 #define BM_AIPS_PACRH_SP0 (0x40000000U) //!< Bit mask for AIPS_PACRH_SP0.
bogdanm 82:6473597d706e 7288 #define BS_AIPS_PACRH_SP0 (1U) //!< Bit field size in bits for AIPS_PACRH_SP0.
bogdanm 82:6473597d706e 7289
bogdanm 82:6473597d706e 7290 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7291 //! @brief Read current value of the AIPS_PACRH_SP0 field.
bogdanm 82:6473597d706e 7292 #define BR_AIPS_PACRH_SP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP0))
bogdanm 82:6473597d706e 7293 #endif
bogdanm 82:6473597d706e 7294
bogdanm 82:6473597d706e 7295 //! @brief Format value for bitfield AIPS_PACRH_SP0.
bogdanm 82:6473597d706e 7296 #define BF_AIPS_PACRH_SP0(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRH_SP0), uint32_t) & BM_AIPS_PACRH_SP0)
bogdanm 82:6473597d706e 7297
bogdanm 82:6473597d706e 7298 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7299 //! @brief Set the SP0 field to a new value.
bogdanm 82:6473597d706e 7300 #define BW_AIPS_PACRH_SP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRH_ADDR(x), BP_AIPS_PACRH_SP0) = (v))
bogdanm 82:6473597d706e 7301 #endif
bogdanm 82:6473597d706e 7302 //@}
bogdanm 82:6473597d706e 7303
bogdanm 82:6473597d706e 7304 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 7305 // HW_AIPS_PACRI - Peripheral Access Control Register
bogdanm 82:6473597d706e 7306 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 7307
bogdanm 82:6473597d706e 7308 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7309 /*!
bogdanm 82:6473597d706e 7310 * @brief HW_AIPS_PACRI - Peripheral Access Control Register (RW)
bogdanm 82:6473597d706e 7311 *
bogdanm 82:6473597d706e 7312 * Reset value: 0x44444444U
bogdanm 82:6473597d706e 7313 *
bogdanm 82:6473597d706e 7314 * This section describes PACR registers E-P, which control peripheral slots
bogdanm 82:6473597d706e 7315 * 32-127. See PACRPeripheral Access Control Register for the description of these
bogdanm 82:6473597d706e 7316 * registers.
bogdanm 82:6473597d706e 7317 */
bogdanm 82:6473597d706e 7318 typedef union _hw_aips_pacri
bogdanm 82:6473597d706e 7319 {
bogdanm 82:6473597d706e 7320 uint32_t U;
bogdanm 82:6473597d706e 7321 struct _hw_aips_pacri_bitfields
bogdanm 82:6473597d706e 7322 {
bogdanm 82:6473597d706e 7323 uint32_t TP7 : 1; //!< [0] Trusted Protect
bogdanm 82:6473597d706e 7324 uint32_t WP7 : 1; //!< [1] Write Protect
bogdanm 82:6473597d706e 7325 uint32_t SP7 : 1; //!< [2] Supervisor Protect
bogdanm 82:6473597d706e 7326 uint32_t RESERVED0 : 1; //!< [3]
bogdanm 82:6473597d706e 7327 uint32_t TP6 : 1; //!< [4] Trusted Protect
bogdanm 82:6473597d706e 7328 uint32_t WP6 : 1; //!< [5] Write Protect
bogdanm 82:6473597d706e 7329 uint32_t SP6 : 1; //!< [6] Supervisor Protect
bogdanm 82:6473597d706e 7330 uint32_t RESERVED1 : 1; //!< [7]
bogdanm 82:6473597d706e 7331 uint32_t TP5 : 1; //!< [8] Trusted Protect
bogdanm 82:6473597d706e 7332 uint32_t WP5 : 1; //!< [9] Write Protect
bogdanm 82:6473597d706e 7333 uint32_t SP5 : 1; //!< [10] Supervisor Protect
bogdanm 82:6473597d706e 7334 uint32_t RESERVED2 : 1; //!< [11]
bogdanm 82:6473597d706e 7335 uint32_t TP4 : 1; //!< [12] Trusted Protect
bogdanm 82:6473597d706e 7336 uint32_t WP4 : 1; //!< [13] Write Protect
bogdanm 82:6473597d706e 7337 uint32_t SP4 : 1; //!< [14] Supervisor Protect
bogdanm 82:6473597d706e 7338 uint32_t RESERVED3 : 1; //!< [15]
bogdanm 82:6473597d706e 7339 uint32_t TP3 : 1; //!< [16] Trusted Protect
bogdanm 82:6473597d706e 7340 uint32_t WP3 : 1; //!< [17] Write Protect
bogdanm 82:6473597d706e 7341 uint32_t SP3 : 1; //!< [18] Supervisor Protect
bogdanm 82:6473597d706e 7342 uint32_t RESERVED4 : 1; //!< [19]
bogdanm 82:6473597d706e 7343 uint32_t TP2 : 1; //!< [20] Trusted Protect
bogdanm 82:6473597d706e 7344 uint32_t WP2 : 1; //!< [21] Write Protect
bogdanm 82:6473597d706e 7345 uint32_t SP2 : 1; //!< [22] Supervisor Protect
bogdanm 82:6473597d706e 7346 uint32_t RESERVED5 : 1; //!< [23]
bogdanm 82:6473597d706e 7347 uint32_t TP1 : 1; //!< [24] Trusted Protect
bogdanm 82:6473597d706e 7348 uint32_t WP1 : 1; //!< [25] Write Protect
bogdanm 82:6473597d706e 7349 uint32_t SP1 : 1; //!< [26] Supervisor Protect
bogdanm 82:6473597d706e 7350 uint32_t RESERVED6 : 1; //!< [27]
bogdanm 82:6473597d706e 7351 uint32_t TP0 : 1; //!< [28] Trusted Protect
bogdanm 82:6473597d706e 7352 uint32_t WP0 : 1; //!< [29] Write Protect
bogdanm 82:6473597d706e 7353 uint32_t SP0 : 1; //!< [30] Supervisor Protect
bogdanm 82:6473597d706e 7354 uint32_t RESERVED7 : 1; //!< [31]
bogdanm 82:6473597d706e 7355 } B;
bogdanm 82:6473597d706e 7356 } hw_aips_pacri_t;
bogdanm 82:6473597d706e 7357 #endif
bogdanm 82:6473597d706e 7358
bogdanm 82:6473597d706e 7359 /*!
bogdanm 82:6473597d706e 7360 * @name Constants and macros for entire AIPS_PACRI register
bogdanm 82:6473597d706e 7361 */
bogdanm 82:6473597d706e 7362 //@{
bogdanm 82:6473597d706e 7363 #define HW_AIPS_PACRI_ADDR(x) (REGS_AIPS_BASE(x) + 0x50U)
bogdanm 82:6473597d706e 7364
bogdanm 82:6473597d706e 7365 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7366 #define HW_AIPS_PACRI(x) (*(__IO hw_aips_pacri_t *) HW_AIPS_PACRI_ADDR(x))
bogdanm 82:6473597d706e 7367 #define HW_AIPS_PACRI_RD(x) (HW_AIPS_PACRI(x).U)
bogdanm 82:6473597d706e 7368 #define HW_AIPS_PACRI_WR(x, v) (HW_AIPS_PACRI(x).U = (v))
bogdanm 82:6473597d706e 7369 #define HW_AIPS_PACRI_SET(x, v) (HW_AIPS_PACRI_WR(x, HW_AIPS_PACRI_RD(x) | (v)))
bogdanm 82:6473597d706e 7370 #define HW_AIPS_PACRI_CLR(x, v) (HW_AIPS_PACRI_WR(x, HW_AIPS_PACRI_RD(x) & ~(v)))
bogdanm 82:6473597d706e 7371 #define HW_AIPS_PACRI_TOG(x, v) (HW_AIPS_PACRI_WR(x, HW_AIPS_PACRI_RD(x) ^ (v)))
bogdanm 82:6473597d706e 7372 #endif
bogdanm 82:6473597d706e 7373 //@}
bogdanm 82:6473597d706e 7374
bogdanm 82:6473597d706e 7375 /*
bogdanm 82:6473597d706e 7376 * Constants & macros for individual AIPS_PACRI bitfields
bogdanm 82:6473597d706e 7377 */
bogdanm 82:6473597d706e 7378
bogdanm 82:6473597d706e 7379 /*!
bogdanm 82:6473597d706e 7380 * @name Register AIPS_PACRI, field TP7[0] (RW)
bogdanm 82:6473597d706e 7381 *
bogdanm 82:6473597d706e 7382 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 7383 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 7384 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 7385 *
bogdanm 82:6473597d706e 7386 * Values:
bogdanm 82:6473597d706e 7387 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 7388 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 7389 */
bogdanm 82:6473597d706e 7390 //@{
bogdanm 82:6473597d706e 7391 #define BP_AIPS_PACRI_TP7 (0U) //!< Bit position for AIPS_PACRI_TP7.
bogdanm 82:6473597d706e 7392 #define BM_AIPS_PACRI_TP7 (0x00000001U) //!< Bit mask for AIPS_PACRI_TP7.
bogdanm 82:6473597d706e 7393 #define BS_AIPS_PACRI_TP7 (1U) //!< Bit field size in bits for AIPS_PACRI_TP7.
bogdanm 82:6473597d706e 7394
bogdanm 82:6473597d706e 7395 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7396 //! @brief Read current value of the AIPS_PACRI_TP7 field.
bogdanm 82:6473597d706e 7397 #define BR_AIPS_PACRI_TP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP7))
bogdanm 82:6473597d706e 7398 #endif
bogdanm 82:6473597d706e 7399
bogdanm 82:6473597d706e 7400 //! @brief Format value for bitfield AIPS_PACRI_TP7.
bogdanm 82:6473597d706e 7401 #define BF_AIPS_PACRI_TP7(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRI_TP7), uint32_t) & BM_AIPS_PACRI_TP7)
bogdanm 82:6473597d706e 7402
bogdanm 82:6473597d706e 7403 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7404 //! @brief Set the TP7 field to a new value.
bogdanm 82:6473597d706e 7405 #define BW_AIPS_PACRI_TP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP7) = (v))
bogdanm 82:6473597d706e 7406 #endif
bogdanm 82:6473597d706e 7407 //@}
bogdanm 82:6473597d706e 7408
bogdanm 82:6473597d706e 7409 /*!
bogdanm 82:6473597d706e 7410 * @name Register AIPS_PACRI, field WP7[1] (RW)
bogdanm 82:6473597d706e 7411 *
bogdanm 82:6473597d706e 7412 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 7413 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 7414 * and no peripheral access initiates.
bogdanm 82:6473597d706e 7415 *
bogdanm 82:6473597d706e 7416 * Values:
bogdanm 82:6473597d706e 7417 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 7418 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 7419 */
bogdanm 82:6473597d706e 7420 //@{
bogdanm 82:6473597d706e 7421 #define BP_AIPS_PACRI_WP7 (1U) //!< Bit position for AIPS_PACRI_WP7.
bogdanm 82:6473597d706e 7422 #define BM_AIPS_PACRI_WP7 (0x00000002U) //!< Bit mask for AIPS_PACRI_WP7.
bogdanm 82:6473597d706e 7423 #define BS_AIPS_PACRI_WP7 (1U) //!< Bit field size in bits for AIPS_PACRI_WP7.
bogdanm 82:6473597d706e 7424
bogdanm 82:6473597d706e 7425 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7426 //! @brief Read current value of the AIPS_PACRI_WP7 field.
bogdanm 82:6473597d706e 7427 #define BR_AIPS_PACRI_WP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP7))
bogdanm 82:6473597d706e 7428 #endif
bogdanm 82:6473597d706e 7429
bogdanm 82:6473597d706e 7430 //! @brief Format value for bitfield AIPS_PACRI_WP7.
bogdanm 82:6473597d706e 7431 #define BF_AIPS_PACRI_WP7(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRI_WP7), uint32_t) & BM_AIPS_PACRI_WP7)
bogdanm 82:6473597d706e 7432
bogdanm 82:6473597d706e 7433 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7434 //! @brief Set the WP7 field to a new value.
bogdanm 82:6473597d706e 7435 #define BW_AIPS_PACRI_WP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP7) = (v))
bogdanm 82:6473597d706e 7436 #endif
bogdanm 82:6473597d706e 7437 //@}
bogdanm 82:6473597d706e 7438
bogdanm 82:6473597d706e 7439 /*!
bogdanm 82:6473597d706e 7440 * @name Register AIPS_PACRI, field SP7[2] (RW)
bogdanm 82:6473597d706e 7441 *
bogdanm 82:6473597d706e 7442 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 7443 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 7444 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 7445 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 7446 * access initiates.
bogdanm 82:6473597d706e 7447 *
bogdanm 82:6473597d706e 7448 * Values:
bogdanm 82:6473597d706e 7449 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 7450 * accesses.
bogdanm 82:6473597d706e 7451 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 7452 */
bogdanm 82:6473597d706e 7453 //@{
bogdanm 82:6473597d706e 7454 #define BP_AIPS_PACRI_SP7 (2U) //!< Bit position for AIPS_PACRI_SP7.
bogdanm 82:6473597d706e 7455 #define BM_AIPS_PACRI_SP7 (0x00000004U) //!< Bit mask for AIPS_PACRI_SP7.
bogdanm 82:6473597d706e 7456 #define BS_AIPS_PACRI_SP7 (1U) //!< Bit field size in bits for AIPS_PACRI_SP7.
bogdanm 82:6473597d706e 7457
bogdanm 82:6473597d706e 7458 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7459 //! @brief Read current value of the AIPS_PACRI_SP7 field.
bogdanm 82:6473597d706e 7460 #define BR_AIPS_PACRI_SP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP7))
bogdanm 82:6473597d706e 7461 #endif
bogdanm 82:6473597d706e 7462
bogdanm 82:6473597d706e 7463 //! @brief Format value for bitfield AIPS_PACRI_SP7.
bogdanm 82:6473597d706e 7464 #define BF_AIPS_PACRI_SP7(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRI_SP7), uint32_t) & BM_AIPS_PACRI_SP7)
bogdanm 82:6473597d706e 7465
bogdanm 82:6473597d706e 7466 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7467 //! @brief Set the SP7 field to a new value.
bogdanm 82:6473597d706e 7468 #define BW_AIPS_PACRI_SP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP7) = (v))
bogdanm 82:6473597d706e 7469 #endif
bogdanm 82:6473597d706e 7470 //@}
bogdanm 82:6473597d706e 7471
bogdanm 82:6473597d706e 7472 /*!
bogdanm 82:6473597d706e 7473 * @name Register AIPS_PACRI, field TP6[4] (RW)
bogdanm 82:6473597d706e 7474 *
bogdanm 82:6473597d706e 7475 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 7476 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 7477 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 7478 *
bogdanm 82:6473597d706e 7479 * Values:
bogdanm 82:6473597d706e 7480 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 7481 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 7482 */
bogdanm 82:6473597d706e 7483 //@{
bogdanm 82:6473597d706e 7484 #define BP_AIPS_PACRI_TP6 (4U) //!< Bit position for AIPS_PACRI_TP6.
bogdanm 82:6473597d706e 7485 #define BM_AIPS_PACRI_TP6 (0x00000010U) //!< Bit mask for AIPS_PACRI_TP6.
bogdanm 82:6473597d706e 7486 #define BS_AIPS_PACRI_TP6 (1U) //!< Bit field size in bits for AIPS_PACRI_TP6.
bogdanm 82:6473597d706e 7487
bogdanm 82:6473597d706e 7488 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7489 //! @brief Read current value of the AIPS_PACRI_TP6 field.
bogdanm 82:6473597d706e 7490 #define BR_AIPS_PACRI_TP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP6))
bogdanm 82:6473597d706e 7491 #endif
bogdanm 82:6473597d706e 7492
bogdanm 82:6473597d706e 7493 //! @brief Format value for bitfield AIPS_PACRI_TP6.
bogdanm 82:6473597d706e 7494 #define BF_AIPS_PACRI_TP6(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRI_TP6), uint32_t) & BM_AIPS_PACRI_TP6)
bogdanm 82:6473597d706e 7495
bogdanm 82:6473597d706e 7496 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7497 //! @brief Set the TP6 field to a new value.
bogdanm 82:6473597d706e 7498 #define BW_AIPS_PACRI_TP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP6) = (v))
bogdanm 82:6473597d706e 7499 #endif
bogdanm 82:6473597d706e 7500 //@}
bogdanm 82:6473597d706e 7501
bogdanm 82:6473597d706e 7502 /*!
bogdanm 82:6473597d706e 7503 * @name Register AIPS_PACRI, field WP6[5] (RW)
bogdanm 82:6473597d706e 7504 *
bogdanm 82:6473597d706e 7505 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 7506 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 7507 * and no peripheral access initiates.
bogdanm 82:6473597d706e 7508 *
bogdanm 82:6473597d706e 7509 * Values:
bogdanm 82:6473597d706e 7510 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 7511 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 7512 */
bogdanm 82:6473597d706e 7513 //@{
bogdanm 82:6473597d706e 7514 #define BP_AIPS_PACRI_WP6 (5U) //!< Bit position for AIPS_PACRI_WP6.
bogdanm 82:6473597d706e 7515 #define BM_AIPS_PACRI_WP6 (0x00000020U) //!< Bit mask for AIPS_PACRI_WP6.
bogdanm 82:6473597d706e 7516 #define BS_AIPS_PACRI_WP6 (1U) //!< Bit field size in bits for AIPS_PACRI_WP6.
bogdanm 82:6473597d706e 7517
bogdanm 82:6473597d706e 7518 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7519 //! @brief Read current value of the AIPS_PACRI_WP6 field.
bogdanm 82:6473597d706e 7520 #define BR_AIPS_PACRI_WP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP6))
bogdanm 82:6473597d706e 7521 #endif
bogdanm 82:6473597d706e 7522
bogdanm 82:6473597d706e 7523 //! @brief Format value for bitfield AIPS_PACRI_WP6.
bogdanm 82:6473597d706e 7524 #define BF_AIPS_PACRI_WP6(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRI_WP6), uint32_t) & BM_AIPS_PACRI_WP6)
bogdanm 82:6473597d706e 7525
bogdanm 82:6473597d706e 7526 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7527 //! @brief Set the WP6 field to a new value.
bogdanm 82:6473597d706e 7528 #define BW_AIPS_PACRI_WP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP6) = (v))
bogdanm 82:6473597d706e 7529 #endif
bogdanm 82:6473597d706e 7530 //@}
bogdanm 82:6473597d706e 7531
bogdanm 82:6473597d706e 7532 /*!
bogdanm 82:6473597d706e 7533 * @name Register AIPS_PACRI, field SP6[6] (RW)
bogdanm 82:6473597d706e 7534 *
bogdanm 82:6473597d706e 7535 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 7536 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 7537 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 7538 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 7539 * access initiates.
bogdanm 82:6473597d706e 7540 *
bogdanm 82:6473597d706e 7541 * Values:
bogdanm 82:6473597d706e 7542 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 7543 * accesses.
bogdanm 82:6473597d706e 7544 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 7545 */
bogdanm 82:6473597d706e 7546 //@{
bogdanm 82:6473597d706e 7547 #define BP_AIPS_PACRI_SP6 (6U) //!< Bit position for AIPS_PACRI_SP6.
bogdanm 82:6473597d706e 7548 #define BM_AIPS_PACRI_SP6 (0x00000040U) //!< Bit mask for AIPS_PACRI_SP6.
bogdanm 82:6473597d706e 7549 #define BS_AIPS_PACRI_SP6 (1U) //!< Bit field size in bits for AIPS_PACRI_SP6.
bogdanm 82:6473597d706e 7550
bogdanm 82:6473597d706e 7551 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7552 //! @brief Read current value of the AIPS_PACRI_SP6 field.
bogdanm 82:6473597d706e 7553 #define BR_AIPS_PACRI_SP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP6))
bogdanm 82:6473597d706e 7554 #endif
bogdanm 82:6473597d706e 7555
bogdanm 82:6473597d706e 7556 //! @brief Format value for bitfield AIPS_PACRI_SP6.
bogdanm 82:6473597d706e 7557 #define BF_AIPS_PACRI_SP6(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRI_SP6), uint32_t) & BM_AIPS_PACRI_SP6)
bogdanm 82:6473597d706e 7558
bogdanm 82:6473597d706e 7559 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7560 //! @brief Set the SP6 field to a new value.
bogdanm 82:6473597d706e 7561 #define BW_AIPS_PACRI_SP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP6) = (v))
bogdanm 82:6473597d706e 7562 #endif
bogdanm 82:6473597d706e 7563 //@}
bogdanm 82:6473597d706e 7564
bogdanm 82:6473597d706e 7565 /*!
bogdanm 82:6473597d706e 7566 * @name Register AIPS_PACRI, field TP5[8] (RW)
bogdanm 82:6473597d706e 7567 *
bogdanm 82:6473597d706e 7568 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 7569 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 7570 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 7571 *
bogdanm 82:6473597d706e 7572 * Values:
bogdanm 82:6473597d706e 7573 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 7574 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 7575 */
bogdanm 82:6473597d706e 7576 //@{
bogdanm 82:6473597d706e 7577 #define BP_AIPS_PACRI_TP5 (8U) //!< Bit position for AIPS_PACRI_TP5.
bogdanm 82:6473597d706e 7578 #define BM_AIPS_PACRI_TP5 (0x00000100U) //!< Bit mask for AIPS_PACRI_TP5.
bogdanm 82:6473597d706e 7579 #define BS_AIPS_PACRI_TP5 (1U) //!< Bit field size in bits for AIPS_PACRI_TP5.
bogdanm 82:6473597d706e 7580
bogdanm 82:6473597d706e 7581 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7582 //! @brief Read current value of the AIPS_PACRI_TP5 field.
bogdanm 82:6473597d706e 7583 #define BR_AIPS_PACRI_TP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP5))
bogdanm 82:6473597d706e 7584 #endif
bogdanm 82:6473597d706e 7585
bogdanm 82:6473597d706e 7586 //! @brief Format value for bitfield AIPS_PACRI_TP5.
bogdanm 82:6473597d706e 7587 #define BF_AIPS_PACRI_TP5(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRI_TP5), uint32_t) & BM_AIPS_PACRI_TP5)
bogdanm 82:6473597d706e 7588
bogdanm 82:6473597d706e 7589 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7590 //! @brief Set the TP5 field to a new value.
bogdanm 82:6473597d706e 7591 #define BW_AIPS_PACRI_TP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP5) = (v))
bogdanm 82:6473597d706e 7592 #endif
bogdanm 82:6473597d706e 7593 //@}
bogdanm 82:6473597d706e 7594
bogdanm 82:6473597d706e 7595 /*!
bogdanm 82:6473597d706e 7596 * @name Register AIPS_PACRI, field WP5[9] (RW)
bogdanm 82:6473597d706e 7597 *
bogdanm 82:6473597d706e 7598 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 7599 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 7600 * and no peripheral access initiates.
bogdanm 82:6473597d706e 7601 *
bogdanm 82:6473597d706e 7602 * Values:
bogdanm 82:6473597d706e 7603 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 7604 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 7605 */
bogdanm 82:6473597d706e 7606 //@{
bogdanm 82:6473597d706e 7607 #define BP_AIPS_PACRI_WP5 (9U) //!< Bit position for AIPS_PACRI_WP5.
bogdanm 82:6473597d706e 7608 #define BM_AIPS_PACRI_WP5 (0x00000200U) //!< Bit mask for AIPS_PACRI_WP5.
bogdanm 82:6473597d706e 7609 #define BS_AIPS_PACRI_WP5 (1U) //!< Bit field size in bits for AIPS_PACRI_WP5.
bogdanm 82:6473597d706e 7610
bogdanm 82:6473597d706e 7611 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7612 //! @brief Read current value of the AIPS_PACRI_WP5 field.
bogdanm 82:6473597d706e 7613 #define BR_AIPS_PACRI_WP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP5))
bogdanm 82:6473597d706e 7614 #endif
bogdanm 82:6473597d706e 7615
bogdanm 82:6473597d706e 7616 //! @brief Format value for bitfield AIPS_PACRI_WP5.
bogdanm 82:6473597d706e 7617 #define BF_AIPS_PACRI_WP5(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRI_WP5), uint32_t) & BM_AIPS_PACRI_WP5)
bogdanm 82:6473597d706e 7618
bogdanm 82:6473597d706e 7619 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7620 //! @brief Set the WP5 field to a new value.
bogdanm 82:6473597d706e 7621 #define BW_AIPS_PACRI_WP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP5) = (v))
bogdanm 82:6473597d706e 7622 #endif
bogdanm 82:6473597d706e 7623 //@}
bogdanm 82:6473597d706e 7624
bogdanm 82:6473597d706e 7625 /*!
bogdanm 82:6473597d706e 7626 * @name Register AIPS_PACRI, field SP5[10] (RW)
bogdanm 82:6473597d706e 7627 *
bogdanm 82:6473597d706e 7628 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 7629 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 7630 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 7631 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 7632 * access initiates.
bogdanm 82:6473597d706e 7633 *
bogdanm 82:6473597d706e 7634 * Values:
bogdanm 82:6473597d706e 7635 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 7636 * accesses.
bogdanm 82:6473597d706e 7637 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 7638 */
bogdanm 82:6473597d706e 7639 //@{
bogdanm 82:6473597d706e 7640 #define BP_AIPS_PACRI_SP5 (10U) //!< Bit position for AIPS_PACRI_SP5.
bogdanm 82:6473597d706e 7641 #define BM_AIPS_PACRI_SP5 (0x00000400U) //!< Bit mask for AIPS_PACRI_SP5.
bogdanm 82:6473597d706e 7642 #define BS_AIPS_PACRI_SP5 (1U) //!< Bit field size in bits for AIPS_PACRI_SP5.
bogdanm 82:6473597d706e 7643
bogdanm 82:6473597d706e 7644 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7645 //! @brief Read current value of the AIPS_PACRI_SP5 field.
bogdanm 82:6473597d706e 7646 #define BR_AIPS_PACRI_SP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP5))
bogdanm 82:6473597d706e 7647 #endif
bogdanm 82:6473597d706e 7648
bogdanm 82:6473597d706e 7649 //! @brief Format value for bitfield AIPS_PACRI_SP5.
bogdanm 82:6473597d706e 7650 #define BF_AIPS_PACRI_SP5(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRI_SP5), uint32_t) & BM_AIPS_PACRI_SP5)
bogdanm 82:6473597d706e 7651
bogdanm 82:6473597d706e 7652 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7653 //! @brief Set the SP5 field to a new value.
bogdanm 82:6473597d706e 7654 #define BW_AIPS_PACRI_SP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP5) = (v))
bogdanm 82:6473597d706e 7655 #endif
bogdanm 82:6473597d706e 7656 //@}
bogdanm 82:6473597d706e 7657
bogdanm 82:6473597d706e 7658 /*!
bogdanm 82:6473597d706e 7659 * @name Register AIPS_PACRI, field TP4[12] (RW)
bogdanm 82:6473597d706e 7660 *
bogdanm 82:6473597d706e 7661 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 7662 * When this bit is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 7663 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 7664 *
bogdanm 82:6473597d706e 7665 * Values:
bogdanm 82:6473597d706e 7666 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 7667 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 7668 */
bogdanm 82:6473597d706e 7669 //@{
bogdanm 82:6473597d706e 7670 #define BP_AIPS_PACRI_TP4 (12U) //!< Bit position for AIPS_PACRI_TP4.
bogdanm 82:6473597d706e 7671 #define BM_AIPS_PACRI_TP4 (0x00001000U) //!< Bit mask for AIPS_PACRI_TP4.
bogdanm 82:6473597d706e 7672 #define BS_AIPS_PACRI_TP4 (1U) //!< Bit field size in bits for AIPS_PACRI_TP4.
bogdanm 82:6473597d706e 7673
bogdanm 82:6473597d706e 7674 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7675 //! @brief Read current value of the AIPS_PACRI_TP4 field.
bogdanm 82:6473597d706e 7676 #define BR_AIPS_PACRI_TP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP4))
bogdanm 82:6473597d706e 7677 #endif
bogdanm 82:6473597d706e 7678
bogdanm 82:6473597d706e 7679 //! @brief Format value for bitfield AIPS_PACRI_TP4.
bogdanm 82:6473597d706e 7680 #define BF_AIPS_PACRI_TP4(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRI_TP4), uint32_t) & BM_AIPS_PACRI_TP4)
bogdanm 82:6473597d706e 7681
bogdanm 82:6473597d706e 7682 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7683 //! @brief Set the TP4 field to a new value.
bogdanm 82:6473597d706e 7684 #define BW_AIPS_PACRI_TP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP4) = (v))
bogdanm 82:6473597d706e 7685 #endif
bogdanm 82:6473597d706e 7686 //@}
bogdanm 82:6473597d706e 7687
bogdanm 82:6473597d706e 7688 /*!
bogdanm 82:6473597d706e 7689 * @name Register AIPS_PACRI, field WP4[13] (RW)
bogdanm 82:6473597d706e 7690 *
bogdanm 82:6473597d706e 7691 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 7692 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 7693 * and no peripheral access initiates.
bogdanm 82:6473597d706e 7694 *
bogdanm 82:6473597d706e 7695 * Values:
bogdanm 82:6473597d706e 7696 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 7697 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 7698 */
bogdanm 82:6473597d706e 7699 //@{
bogdanm 82:6473597d706e 7700 #define BP_AIPS_PACRI_WP4 (13U) //!< Bit position for AIPS_PACRI_WP4.
bogdanm 82:6473597d706e 7701 #define BM_AIPS_PACRI_WP4 (0x00002000U) //!< Bit mask for AIPS_PACRI_WP4.
bogdanm 82:6473597d706e 7702 #define BS_AIPS_PACRI_WP4 (1U) //!< Bit field size in bits for AIPS_PACRI_WP4.
bogdanm 82:6473597d706e 7703
bogdanm 82:6473597d706e 7704 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7705 //! @brief Read current value of the AIPS_PACRI_WP4 field.
bogdanm 82:6473597d706e 7706 #define BR_AIPS_PACRI_WP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP4))
bogdanm 82:6473597d706e 7707 #endif
bogdanm 82:6473597d706e 7708
bogdanm 82:6473597d706e 7709 //! @brief Format value for bitfield AIPS_PACRI_WP4.
bogdanm 82:6473597d706e 7710 #define BF_AIPS_PACRI_WP4(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRI_WP4), uint32_t) & BM_AIPS_PACRI_WP4)
bogdanm 82:6473597d706e 7711
bogdanm 82:6473597d706e 7712 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7713 //! @brief Set the WP4 field to a new value.
bogdanm 82:6473597d706e 7714 #define BW_AIPS_PACRI_WP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP4) = (v))
bogdanm 82:6473597d706e 7715 #endif
bogdanm 82:6473597d706e 7716 //@}
bogdanm 82:6473597d706e 7717
bogdanm 82:6473597d706e 7718 /*!
bogdanm 82:6473597d706e 7719 * @name Register AIPS_PACRI, field SP4[14] (RW)
bogdanm 82:6473597d706e 7720 *
bogdanm 82:6473597d706e 7721 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 7722 * access. When this bit is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 7723 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
bogdanm 82:6473597d706e 7724 * set. If not, access terminates with an error response and no peripheral access
bogdanm 82:6473597d706e 7725 * initiates.
bogdanm 82:6473597d706e 7726 *
bogdanm 82:6473597d706e 7727 * Values:
bogdanm 82:6473597d706e 7728 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 7729 * accesses.
bogdanm 82:6473597d706e 7730 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 7731 */
bogdanm 82:6473597d706e 7732 //@{
bogdanm 82:6473597d706e 7733 #define BP_AIPS_PACRI_SP4 (14U) //!< Bit position for AIPS_PACRI_SP4.
bogdanm 82:6473597d706e 7734 #define BM_AIPS_PACRI_SP4 (0x00004000U) //!< Bit mask for AIPS_PACRI_SP4.
bogdanm 82:6473597d706e 7735 #define BS_AIPS_PACRI_SP4 (1U) //!< Bit field size in bits for AIPS_PACRI_SP4.
bogdanm 82:6473597d706e 7736
bogdanm 82:6473597d706e 7737 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7738 //! @brief Read current value of the AIPS_PACRI_SP4 field.
bogdanm 82:6473597d706e 7739 #define BR_AIPS_PACRI_SP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP4))
bogdanm 82:6473597d706e 7740 #endif
bogdanm 82:6473597d706e 7741
bogdanm 82:6473597d706e 7742 //! @brief Format value for bitfield AIPS_PACRI_SP4.
bogdanm 82:6473597d706e 7743 #define BF_AIPS_PACRI_SP4(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRI_SP4), uint32_t) & BM_AIPS_PACRI_SP4)
bogdanm 82:6473597d706e 7744
bogdanm 82:6473597d706e 7745 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7746 //! @brief Set the SP4 field to a new value.
bogdanm 82:6473597d706e 7747 #define BW_AIPS_PACRI_SP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP4) = (v))
bogdanm 82:6473597d706e 7748 #endif
bogdanm 82:6473597d706e 7749 //@}
bogdanm 82:6473597d706e 7750
bogdanm 82:6473597d706e 7751 /*!
bogdanm 82:6473597d706e 7752 * @name Register AIPS_PACRI, field TP3[16] (RW)
bogdanm 82:6473597d706e 7753 *
bogdanm 82:6473597d706e 7754 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 7755 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 7756 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 7757 *
bogdanm 82:6473597d706e 7758 * Values:
bogdanm 82:6473597d706e 7759 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 7760 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 7761 */
bogdanm 82:6473597d706e 7762 //@{
bogdanm 82:6473597d706e 7763 #define BP_AIPS_PACRI_TP3 (16U) //!< Bit position for AIPS_PACRI_TP3.
bogdanm 82:6473597d706e 7764 #define BM_AIPS_PACRI_TP3 (0x00010000U) //!< Bit mask for AIPS_PACRI_TP3.
bogdanm 82:6473597d706e 7765 #define BS_AIPS_PACRI_TP3 (1U) //!< Bit field size in bits for AIPS_PACRI_TP3.
bogdanm 82:6473597d706e 7766
bogdanm 82:6473597d706e 7767 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7768 //! @brief Read current value of the AIPS_PACRI_TP3 field.
bogdanm 82:6473597d706e 7769 #define BR_AIPS_PACRI_TP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP3))
bogdanm 82:6473597d706e 7770 #endif
bogdanm 82:6473597d706e 7771
bogdanm 82:6473597d706e 7772 //! @brief Format value for bitfield AIPS_PACRI_TP3.
bogdanm 82:6473597d706e 7773 #define BF_AIPS_PACRI_TP3(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRI_TP3), uint32_t) & BM_AIPS_PACRI_TP3)
bogdanm 82:6473597d706e 7774
bogdanm 82:6473597d706e 7775 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7776 //! @brief Set the TP3 field to a new value.
bogdanm 82:6473597d706e 7777 #define BW_AIPS_PACRI_TP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP3) = (v))
bogdanm 82:6473597d706e 7778 #endif
bogdanm 82:6473597d706e 7779 //@}
bogdanm 82:6473597d706e 7780
bogdanm 82:6473597d706e 7781 /*!
bogdanm 82:6473597d706e 7782 * @name Register AIPS_PACRI, field WP3[17] (RW)
bogdanm 82:6473597d706e 7783 *
bogdanm 82:6473597d706e 7784 * Determines whether the peripheral allows write accesss. When this bit is set
bogdanm 82:6473597d706e 7785 * and a write access is attempted, access terminates with an error response and
bogdanm 82:6473597d706e 7786 * no peripheral access initiates.
bogdanm 82:6473597d706e 7787 *
bogdanm 82:6473597d706e 7788 * Values:
bogdanm 82:6473597d706e 7789 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 7790 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 7791 */
bogdanm 82:6473597d706e 7792 //@{
bogdanm 82:6473597d706e 7793 #define BP_AIPS_PACRI_WP3 (17U) //!< Bit position for AIPS_PACRI_WP3.
bogdanm 82:6473597d706e 7794 #define BM_AIPS_PACRI_WP3 (0x00020000U) //!< Bit mask for AIPS_PACRI_WP3.
bogdanm 82:6473597d706e 7795 #define BS_AIPS_PACRI_WP3 (1U) //!< Bit field size in bits for AIPS_PACRI_WP3.
bogdanm 82:6473597d706e 7796
bogdanm 82:6473597d706e 7797 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7798 //! @brief Read current value of the AIPS_PACRI_WP3 field.
bogdanm 82:6473597d706e 7799 #define BR_AIPS_PACRI_WP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP3))
bogdanm 82:6473597d706e 7800 #endif
bogdanm 82:6473597d706e 7801
bogdanm 82:6473597d706e 7802 //! @brief Format value for bitfield AIPS_PACRI_WP3.
bogdanm 82:6473597d706e 7803 #define BF_AIPS_PACRI_WP3(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRI_WP3), uint32_t) & BM_AIPS_PACRI_WP3)
bogdanm 82:6473597d706e 7804
bogdanm 82:6473597d706e 7805 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7806 //! @brief Set the WP3 field to a new value.
bogdanm 82:6473597d706e 7807 #define BW_AIPS_PACRI_WP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP3) = (v))
bogdanm 82:6473597d706e 7808 #endif
bogdanm 82:6473597d706e 7809 //@}
bogdanm 82:6473597d706e 7810
bogdanm 82:6473597d706e 7811 /*!
bogdanm 82:6473597d706e 7812 * @name Register AIPS_PACRI, field SP3[18] (RW)
bogdanm 82:6473597d706e 7813 *
bogdanm 82:6473597d706e 7814 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 7815 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 7816 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 7817 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 7818 * access initiates.
bogdanm 82:6473597d706e 7819 *
bogdanm 82:6473597d706e 7820 * Values:
bogdanm 82:6473597d706e 7821 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 7822 * accesses.
bogdanm 82:6473597d706e 7823 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 7824 */
bogdanm 82:6473597d706e 7825 //@{
bogdanm 82:6473597d706e 7826 #define BP_AIPS_PACRI_SP3 (18U) //!< Bit position for AIPS_PACRI_SP3.
bogdanm 82:6473597d706e 7827 #define BM_AIPS_PACRI_SP3 (0x00040000U) //!< Bit mask for AIPS_PACRI_SP3.
bogdanm 82:6473597d706e 7828 #define BS_AIPS_PACRI_SP3 (1U) //!< Bit field size in bits for AIPS_PACRI_SP3.
bogdanm 82:6473597d706e 7829
bogdanm 82:6473597d706e 7830 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7831 //! @brief Read current value of the AIPS_PACRI_SP3 field.
bogdanm 82:6473597d706e 7832 #define BR_AIPS_PACRI_SP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP3))
bogdanm 82:6473597d706e 7833 #endif
bogdanm 82:6473597d706e 7834
bogdanm 82:6473597d706e 7835 //! @brief Format value for bitfield AIPS_PACRI_SP3.
bogdanm 82:6473597d706e 7836 #define BF_AIPS_PACRI_SP3(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRI_SP3), uint32_t) & BM_AIPS_PACRI_SP3)
bogdanm 82:6473597d706e 7837
bogdanm 82:6473597d706e 7838 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7839 //! @brief Set the SP3 field to a new value.
bogdanm 82:6473597d706e 7840 #define BW_AIPS_PACRI_SP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP3) = (v))
bogdanm 82:6473597d706e 7841 #endif
bogdanm 82:6473597d706e 7842 //@}
bogdanm 82:6473597d706e 7843
bogdanm 82:6473597d706e 7844 /*!
bogdanm 82:6473597d706e 7845 * @name Register AIPS_PACRI, field TP2[20] (RW)
bogdanm 82:6473597d706e 7846 *
bogdanm 82:6473597d706e 7847 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 7848 * When this bit is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 7849 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 7850 *
bogdanm 82:6473597d706e 7851 * Values:
bogdanm 82:6473597d706e 7852 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 7853 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 7854 */
bogdanm 82:6473597d706e 7855 //@{
bogdanm 82:6473597d706e 7856 #define BP_AIPS_PACRI_TP2 (20U) //!< Bit position for AIPS_PACRI_TP2.
bogdanm 82:6473597d706e 7857 #define BM_AIPS_PACRI_TP2 (0x00100000U) //!< Bit mask for AIPS_PACRI_TP2.
bogdanm 82:6473597d706e 7858 #define BS_AIPS_PACRI_TP2 (1U) //!< Bit field size in bits for AIPS_PACRI_TP2.
bogdanm 82:6473597d706e 7859
bogdanm 82:6473597d706e 7860 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7861 //! @brief Read current value of the AIPS_PACRI_TP2 field.
bogdanm 82:6473597d706e 7862 #define BR_AIPS_PACRI_TP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP2))
bogdanm 82:6473597d706e 7863 #endif
bogdanm 82:6473597d706e 7864
bogdanm 82:6473597d706e 7865 //! @brief Format value for bitfield AIPS_PACRI_TP2.
bogdanm 82:6473597d706e 7866 #define BF_AIPS_PACRI_TP2(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRI_TP2), uint32_t) & BM_AIPS_PACRI_TP2)
bogdanm 82:6473597d706e 7867
bogdanm 82:6473597d706e 7868 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7869 //! @brief Set the TP2 field to a new value.
bogdanm 82:6473597d706e 7870 #define BW_AIPS_PACRI_TP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP2) = (v))
bogdanm 82:6473597d706e 7871 #endif
bogdanm 82:6473597d706e 7872 //@}
bogdanm 82:6473597d706e 7873
bogdanm 82:6473597d706e 7874 /*!
bogdanm 82:6473597d706e 7875 * @name Register AIPS_PACRI, field WP2[21] (RW)
bogdanm 82:6473597d706e 7876 *
bogdanm 82:6473597d706e 7877 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 7878 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 7879 * and no peripheral access initiates.
bogdanm 82:6473597d706e 7880 *
bogdanm 82:6473597d706e 7881 * Values:
bogdanm 82:6473597d706e 7882 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 7883 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 7884 */
bogdanm 82:6473597d706e 7885 //@{
bogdanm 82:6473597d706e 7886 #define BP_AIPS_PACRI_WP2 (21U) //!< Bit position for AIPS_PACRI_WP2.
bogdanm 82:6473597d706e 7887 #define BM_AIPS_PACRI_WP2 (0x00200000U) //!< Bit mask for AIPS_PACRI_WP2.
bogdanm 82:6473597d706e 7888 #define BS_AIPS_PACRI_WP2 (1U) //!< Bit field size in bits for AIPS_PACRI_WP2.
bogdanm 82:6473597d706e 7889
bogdanm 82:6473597d706e 7890 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7891 //! @brief Read current value of the AIPS_PACRI_WP2 field.
bogdanm 82:6473597d706e 7892 #define BR_AIPS_PACRI_WP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP2))
bogdanm 82:6473597d706e 7893 #endif
bogdanm 82:6473597d706e 7894
bogdanm 82:6473597d706e 7895 //! @brief Format value for bitfield AIPS_PACRI_WP2.
bogdanm 82:6473597d706e 7896 #define BF_AIPS_PACRI_WP2(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRI_WP2), uint32_t) & BM_AIPS_PACRI_WP2)
bogdanm 82:6473597d706e 7897
bogdanm 82:6473597d706e 7898 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7899 //! @brief Set the WP2 field to a new value.
bogdanm 82:6473597d706e 7900 #define BW_AIPS_PACRI_WP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP2) = (v))
bogdanm 82:6473597d706e 7901 #endif
bogdanm 82:6473597d706e 7902 //@}
bogdanm 82:6473597d706e 7903
bogdanm 82:6473597d706e 7904 /*!
bogdanm 82:6473597d706e 7905 * @name Register AIPS_PACRI, field SP2[22] (RW)
bogdanm 82:6473597d706e 7906 *
bogdanm 82:6473597d706e 7907 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 7908 * access. When this bit is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 7909 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
bogdanm 82:6473597d706e 7910 * set. If not, access terminates with an error response and no peripheral access
bogdanm 82:6473597d706e 7911 * initiates.
bogdanm 82:6473597d706e 7912 *
bogdanm 82:6473597d706e 7913 * Values:
bogdanm 82:6473597d706e 7914 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 7915 * accesses.
bogdanm 82:6473597d706e 7916 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 7917 */
bogdanm 82:6473597d706e 7918 //@{
bogdanm 82:6473597d706e 7919 #define BP_AIPS_PACRI_SP2 (22U) //!< Bit position for AIPS_PACRI_SP2.
bogdanm 82:6473597d706e 7920 #define BM_AIPS_PACRI_SP2 (0x00400000U) //!< Bit mask for AIPS_PACRI_SP2.
bogdanm 82:6473597d706e 7921 #define BS_AIPS_PACRI_SP2 (1U) //!< Bit field size in bits for AIPS_PACRI_SP2.
bogdanm 82:6473597d706e 7922
bogdanm 82:6473597d706e 7923 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7924 //! @brief Read current value of the AIPS_PACRI_SP2 field.
bogdanm 82:6473597d706e 7925 #define BR_AIPS_PACRI_SP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP2))
bogdanm 82:6473597d706e 7926 #endif
bogdanm 82:6473597d706e 7927
bogdanm 82:6473597d706e 7928 //! @brief Format value for bitfield AIPS_PACRI_SP2.
bogdanm 82:6473597d706e 7929 #define BF_AIPS_PACRI_SP2(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRI_SP2), uint32_t) & BM_AIPS_PACRI_SP2)
bogdanm 82:6473597d706e 7930
bogdanm 82:6473597d706e 7931 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7932 //! @brief Set the SP2 field to a new value.
bogdanm 82:6473597d706e 7933 #define BW_AIPS_PACRI_SP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP2) = (v))
bogdanm 82:6473597d706e 7934 #endif
bogdanm 82:6473597d706e 7935 //@}
bogdanm 82:6473597d706e 7936
bogdanm 82:6473597d706e 7937 /*!
bogdanm 82:6473597d706e 7938 * @name Register AIPS_PACRI, field TP1[24] (RW)
bogdanm 82:6473597d706e 7939 *
bogdanm 82:6473597d706e 7940 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 7941 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 7942 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 7943 *
bogdanm 82:6473597d706e 7944 * Values:
bogdanm 82:6473597d706e 7945 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 7946 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 7947 */
bogdanm 82:6473597d706e 7948 //@{
bogdanm 82:6473597d706e 7949 #define BP_AIPS_PACRI_TP1 (24U) //!< Bit position for AIPS_PACRI_TP1.
bogdanm 82:6473597d706e 7950 #define BM_AIPS_PACRI_TP1 (0x01000000U) //!< Bit mask for AIPS_PACRI_TP1.
bogdanm 82:6473597d706e 7951 #define BS_AIPS_PACRI_TP1 (1U) //!< Bit field size in bits for AIPS_PACRI_TP1.
bogdanm 82:6473597d706e 7952
bogdanm 82:6473597d706e 7953 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7954 //! @brief Read current value of the AIPS_PACRI_TP1 field.
bogdanm 82:6473597d706e 7955 #define BR_AIPS_PACRI_TP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP1))
bogdanm 82:6473597d706e 7956 #endif
bogdanm 82:6473597d706e 7957
bogdanm 82:6473597d706e 7958 //! @brief Format value for bitfield AIPS_PACRI_TP1.
bogdanm 82:6473597d706e 7959 #define BF_AIPS_PACRI_TP1(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRI_TP1), uint32_t) & BM_AIPS_PACRI_TP1)
bogdanm 82:6473597d706e 7960
bogdanm 82:6473597d706e 7961 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7962 //! @brief Set the TP1 field to a new value.
bogdanm 82:6473597d706e 7963 #define BW_AIPS_PACRI_TP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP1) = (v))
bogdanm 82:6473597d706e 7964 #endif
bogdanm 82:6473597d706e 7965 //@}
bogdanm 82:6473597d706e 7966
bogdanm 82:6473597d706e 7967 /*!
bogdanm 82:6473597d706e 7968 * @name Register AIPS_PACRI, field WP1[25] (RW)
bogdanm 82:6473597d706e 7969 *
bogdanm 82:6473597d706e 7970 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 7971 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 7972 * and no peripheral access initiates.
bogdanm 82:6473597d706e 7973 *
bogdanm 82:6473597d706e 7974 * Values:
bogdanm 82:6473597d706e 7975 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 7976 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 7977 */
bogdanm 82:6473597d706e 7978 //@{
bogdanm 82:6473597d706e 7979 #define BP_AIPS_PACRI_WP1 (25U) //!< Bit position for AIPS_PACRI_WP1.
bogdanm 82:6473597d706e 7980 #define BM_AIPS_PACRI_WP1 (0x02000000U) //!< Bit mask for AIPS_PACRI_WP1.
bogdanm 82:6473597d706e 7981 #define BS_AIPS_PACRI_WP1 (1U) //!< Bit field size in bits for AIPS_PACRI_WP1.
bogdanm 82:6473597d706e 7982
bogdanm 82:6473597d706e 7983 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7984 //! @brief Read current value of the AIPS_PACRI_WP1 field.
bogdanm 82:6473597d706e 7985 #define BR_AIPS_PACRI_WP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP1))
bogdanm 82:6473597d706e 7986 #endif
bogdanm 82:6473597d706e 7987
bogdanm 82:6473597d706e 7988 //! @brief Format value for bitfield AIPS_PACRI_WP1.
bogdanm 82:6473597d706e 7989 #define BF_AIPS_PACRI_WP1(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRI_WP1), uint32_t) & BM_AIPS_PACRI_WP1)
bogdanm 82:6473597d706e 7990
bogdanm 82:6473597d706e 7991 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 7992 //! @brief Set the WP1 field to a new value.
bogdanm 82:6473597d706e 7993 #define BW_AIPS_PACRI_WP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP1) = (v))
bogdanm 82:6473597d706e 7994 #endif
bogdanm 82:6473597d706e 7995 //@}
bogdanm 82:6473597d706e 7996
bogdanm 82:6473597d706e 7997 /*!
bogdanm 82:6473597d706e 7998 * @name Register AIPS_PACRI, field SP1[26] (RW)
bogdanm 82:6473597d706e 7999 *
bogdanm 82:6473597d706e 8000 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 8001 * access. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 8002 * supervisor access attribute, and the MPRx[MPLn] control field for the master must
bogdanm 82:6473597d706e 8003 * be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 8004 * access initiates.
bogdanm 82:6473597d706e 8005 *
bogdanm 82:6473597d706e 8006 * Values:
bogdanm 82:6473597d706e 8007 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 8008 * accesses.
bogdanm 82:6473597d706e 8009 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 8010 */
bogdanm 82:6473597d706e 8011 //@{
bogdanm 82:6473597d706e 8012 #define BP_AIPS_PACRI_SP1 (26U) //!< Bit position for AIPS_PACRI_SP1.
bogdanm 82:6473597d706e 8013 #define BM_AIPS_PACRI_SP1 (0x04000000U) //!< Bit mask for AIPS_PACRI_SP1.
bogdanm 82:6473597d706e 8014 #define BS_AIPS_PACRI_SP1 (1U) //!< Bit field size in bits for AIPS_PACRI_SP1.
bogdanm 82:6473597d706e 8015
bogdanm 82:6473597d706e 8016 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8017 //! @brief Read current value of the AIPS_PACRI_SP1 field.
bogdanm 82:6473597d706e 8018 #define BR_AIPS_PACRI_SP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP1))
bogdanm 82:6473597d706e 8019 #endif
bogdanm 82:6473597d706e 8020
bogdanm 82:6473597d706e 8021 //! @brief Format value for bitfield AIPS_PACRI_SP1.
bogdanm 82:6473597d706e 8022 #define BF_AIPS_PACRI_SP1(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRI_SP1), uint32_t) & BM_AIPS_PACRI_SP1)
bogdanm 82:6473597d706e 8023
bogdanm 82:6473597d706e 8024 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8025 //! @brief Set the SP1 field to a new value.
bogdanm 82:6473597d706e 8026 #define BW_AIPS_PACRI_SP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP1) = (v))
bogdanm 82:6473597d706e 8027 #endif
bogdanm 82:6473597d706e 8028 //@}
bogdanm 82:6473597d706e 8029
bogdanm 82:6473597d706e 8030 /*!
bogdanm 82:6473597d706e 8031 * @name Register AIPS_PACRI, field TP0[28] (RW)
bogdanm 82:6473597d706e 8032 *
bogdanm 82:6473597d706e 8033 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 8034 * When this bit is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 8035 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 8036 *
bogdanm 82:6473597d706e 8037 * Values:
bogdanm 82:6473597d706e 8038 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 8039 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 8040 */
bogdanm 82:6473597d706e 8041 //@{
bogdanm 82:6473597d706e 8042 #define BP_AIPS_PACRI_TP0 (28U) //!< Bit position for AIPS_PACRI_TP0.
bogdanm 82:6473597d706e 8043 #define BM_AIPS_PACRI_TP0 (0x10000000U) //!< Bit mask for AIPS_PACRI_TP0.
bogdanm 82:6473597d706e 8044 #define BS_AIPS_PACRI_TP0 (1U) //!< Bit field size in bits for AIPS_PACRI_TP0.
bogdanm 82:6473597d706e 8045
bogdanm 82:6473597d706e 8046 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8047 //! @brief Read current value of the AIPS_PACRI_TP0 field.
bogdanm 82:6473597d706e 8048 #define BR_AIPS_PACRI_TP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP0))
bogdanm 82:6473597d706e 8049 #endif
bogdanm 82:6473597d706e 8050
bogdanm 82:6473597d706e 8051 //! @brief Format value for bitfield AIPS_PACRI_TP0.
bogdanm 82:6473597d706e 8052 #define BF_AIPS_PACRI_TP0(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRI_TP0), uint32_t) & BM_AIPS_PACRI_TP0)
bogdanm 82:6473597d706e 8053
bogdanm 82:6473597d706e 8054 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8055 //! @brief Set the TP0 field to a new value.
bogdanm 82:6473597d706e 8056 #define BW_AIPS_PACRI_TP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_TP0) = (v))
bogdanm 82:6473597d706e 8057 #endif
bogdanm 82:6473597d706e 8058 //@}
bogdanm 82:6473597d706e 8059
bogdanm 82:6473597d706e 8060 /*!
bogdanm 82:6473597d706e 8061 * @name Register AIPS_PACRI, field WP0[29] (RW)
bogdanm 82:6473597d706e 8062 *
bogdanm 82:6473597d706e 8063 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 8064 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 8065 * and no peripheral access initiates.
bogdanm 82:6473597d706e 8066 *
bogdanm 82:6473597d706e 8067 * Values:
bogdanm 82:6473597d706e 8068 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 8069 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 8070 */
bogdanm 82:6473597d706e 8071 //@{
bogdanm 82:6473597d706e 8072 #define BP_AIPS_PACRI_WP0 (29U) //!< Bit position for AIPS_PACRI_WP0.
bogdanm 82:6473597d706e 8073 #define BM_AIPS_PACRI_WP0 (0x20000000U) //!< Bit mask for AIPS_PACRI_WP0.
bogdanm 82:6473597d706e 8074 #define BS_AIPS_PACRI_WP0 (1U) //!< Bit field size in bits for AIPS_PACRI_WP0.
bogdanm 82:6473597d706e 8075
bogdanm 82:6473597d706e 8076 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8077 //! @brief Read current value of the AIPS_PACRI_WP0 field.
bogdanm 82:6473597d706e 8078 #define BR_AIPS_PACRI_WP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP0))
bogdanm 82:6473597d706e 8079 #endif
bogdanm 82:6473597d706e 8080
bogdanm 82:6473597d706e 8081 //! @brief Format value for bitfield AIPS_PACRI_WP0.
bogdanm 82:6473597d706e 8082 #define BF_AIPS_PACRI_WP0(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRI_WP0), uint32_t) & BM_AIPS_PACRI_WP0)
bogdanm 82:6473597d706e 8083
bogdanm 82:6473597d706e 8084 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8085 //! @brief Set the WP0 field to a new value.
bogdanm 82:6473597d706e 8086 #define BW_AIPS_PACRI_WP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_WP0) = (v))
bogdanm 82:6473597d706e 8087 #endif
bogdanm 82:6473597d706e 8088 //@}
bogdanm 82:6473597d706e 8089
bogdanm 82:6473597d706e 8090 /*!
bogdanm 82:6473597d706e 8091 * @name Register AIPS_PACRI, field SP0[30] (RW)
bogdanm 82:6473597d706e 8092 *
bogdanm 82:6473597d706e 8093 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 8094 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 8095 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 8096 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 8097 * access initiates.
bogdanm 82:6473597d706e 8098 *
bogdanm 82:6473597d706e 8099 * Values:
bogdanm 82:6473597d706e 8100 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 8101 * accesses.
bogdanm 82:6473597d706e 8102 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 8103 */
bogdanm 82:6473597d706e 8104 //@{
bogdanm 82:6473597d706e 8105 #define BP_AIPS_PACRI_SP0 (30U) //!< Bit position for AIPS_PACRI_SP0.
bogdanm 82:6473597d706e 8106 #define BM_AIPS_PACRI_SP0 (0x40000000U) //!< Bit mask for AIPS_PACRI_SP0.
bogdanm 82:6473597d706e 8107 #define BS_AIPS_PACRI_SP0 (1U) //!< Bit field size in bits for AIPS_PACRI_SP0.
bogdanm 82:6473597d706e 8108
bogdanm 82:6473597d706e 8109 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8110 //! @brief Read current value of the AIPS_PACRI_SP0 field.
bogdanm 82:6473597d706e 8111 #define BR_AIPS_PACRI_SP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP0))
bogdanm 82:6473597d706e 8112 #endif
bogdanm 82:6473597d706e 8113
bogdanm 82:6473597d706e 8114 //! @brief Format value for bitfield AIPS_PACRI_SP0.
bogdanm 82:6473597d706e 8115 #define BF_AIPS_PACRI_SP0(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRI_SP0), uint32_t) & BM_AIPS_PACRI_SP0)
bogdanm 82:6473597d706e 8116
bogdanm 82:6473597d706e 8117 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8118 //! @brief Set the SP0 field to a new value.
bogdanm 82:6473597d706e 8119 #define BW_AIPS_PACRI_SP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRI_ADDR(x), BP_AIPS_PACRI_SP0) = (v))
bogdanm 82:6473597d706e 8120 #endif
bogdanm 82:6473597d706e 8121 //@}
bogdanm 82:6473597d706e 8122
bogdanm 82:6473597d706e 8123 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 8124 // HW_AIPS_PACRJ - Peripheral Access Control Register
bogdanm 82:6473597d706e 8125 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 8126
bogdanm 82:6473597d706e 8127 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8128 /*!
bogdanm 82:6473597d706e 8129 * @brief HW_AIPS_PACRJ - Peripheral Access Control Register (RW)
bogdanm 82:6473597d706e 8130 *
bogdanm 82:6473597d706e 8131 * Reset value: 0x44444444U
bogdanm 82:6473597d706e 8132 *
bogdanm 82:6473597d706e 8133 * This section describes PACR registers E-P, which control peripheral slots
bogdanm 82:6473597d706e 8134 * 32-127. See PACRPeripheral Access Control Register for the description of these
bogdanm 82:6473597d706e 8135 * registers.
bogdanm 82:6473597d706e 8136 */
bogdanm 82:6473597d706e 8137 typedef union _hw_aips_pacrj
bogdanm 82:6473597d706e 8138 {
bogdanm 82:6473597d706e 8139 uint32_t U;
bogdanm 82:6473597d706e 8140 struct _hw_aips_pacrj_bitfields
bogdanm 82:6473597d706e 8141 {
bogdanm 82:6473597d706e 8142 uint32_t TP7 : 1; //!< [0] Trusted Protect
bogdanm 82:6473597d706e 8143 uint32_t WP7 : 1; //!< [1] Write Protect
bogdanm 82:6473597d706e 8144 uint32_t SP7 : 1; //!< [2] Supervisor Protect
bogdanm 82:6473597d706e 8145 uint32_t RESERVED0 : 1; //!< [3]
bogdanm 82:6473597d706e 8146 uint32_t TP6 : 1; //!< [4] Trusted Protect
bogdanm 82:6473597d706e 8147 uint32_t WP6 : 1; //!< [5] Write Protect
bogdanm 82:6473597d706e 8148 uint32_t SP6 : 1; //!< [6] Supervisor Protect
bogdanm 82:6473597d706e 8149 uint32_t RESERVED1 : 1; //!< [7]
bogdanm 82:6473597d706e 8150 uint32_t TP5 : 1; //!< [8] Trusted Protect
bogdanm 82:6473597d706e 8151 uint32_t WP5 : 1; //!< [9] Write Protect
bogdanm 82:6473597d706e 8152 uint32_t SP5 : 1; //!< [10] Supervisor Protect
bogdanm 82:6473597d706e 8153 uint32_t RESERVED2 : 1; //!< [11]
bogdanm 82:6473597d706e 8154 uint32_t TP4 : 1; //!< [12] Trusted Protect
bogdanm 82:6473597d706e 8155 uint32_t WP4 : 1; //!< [13] Write Protect
bogdanm 82:6473597d706e 8156 uint32_t SP4 : 1; //!< [14] Supervisor Protect
bogdanm 82:6473597d706e 8157 uint32_t RESERVED3 : 1; //!< [15]
bogdanm 82:6473597d706e 8158 uint32_t TP3 : 1; //!< [16] Trusted Protect
bogdanm 82:6473597d706e 8159 uint32_t WP3 : 1; //!< [17] Write Protect
bogdanm 82:6473597d706e 8160 uint32_t SP3 : 1; //!< [18] Supervisor Protect
bogdanm 82:6473597d706e 8161 uint32_t RESERVED4 : 1; //!< [19]
bogdanm 82:6473597d706e 8162 uint32_t TP2 : 1; //!< [20] Trusted Protect
bogdanm 82:6473597d706e 8163 uint32_t WP2 : 1; //!< [21] Write Protect
bogdanm 82:6473597d706e 8164 uint32_t SP2 : 1; //!< [22] Supervisor Protect
bogdanm 82:6473597d706e 8165 uint32_t RESERVED5 : 1; //!< [23]
bogdanm 82:6473597d706e 8166 uint32_t TP1 : 1; //!< [24] Trusted Protect
bogdanm 82:6473597d706e 8167 uint32_t WP1 : 1; //!< [25] Write Protect
bogdanm 82:6473597d706e 8168 uint32_t SP1 : 1; //!< [26] Supervisor Protect
bogdanm 82:6473597d706e 8169 uint32_t RESERVED6 : 1; //!< [27]
bogdanm 82:6473597d706e 8170 uint32_t TP0 : 1; //!< [28] Trusted Protect
bogdanm 82:6473597d706e 8171 uint32_t WP0 : 1; //!< [29] Write Protect
bogdanm 82:6473597d706e 8172 uint32_t SP0 : 1; //!< [30] Supervisor Protect
bogdanm 82:6473597d706e 8173 uint32_t RESERVED7 : 1; //!< [31]
bogdanm 82:6473597d706e 8174 } B;
bogdanm 82:6473597d706e 8175 } hw_aips_pacrj_t;
bogdanm 82:6473597d706e 8176 #endif
bogdanm 82:6473597d706e 8177
bogdanm 82:6473597d706e 8178 /*!
bogdanm 82:6473597d706e 8179 * @name Constants and macros for entire AIPS_PACRJ register
bogdanm 82:6473597d706e 8180 */
bogdanm 82:6473597d706e 8181 //@{
bogdanm 82:6473597d706e 8182 #define HW_AIPS_PACRJ_ADDR(x) (REGS_AIPS_BASE(x) + 0x54U)
bogdanm 82:6473597d706e 8183
bogdanm 82:6473597d706e 8184 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8185 #define HW_AIPS_PACRJ(x) (*(__IO hw_aips_pacrj_t *) HW_AIPS_PACRJ_ADDR(x))
bogdanm 82:6473597d706e 8186 #define HW_AIPS_PACRJ_RD(x) (HW_AIPS_PACRJ(x).U)
bogdanm 82:6473597d706e 8187 #define HW_AIPS_PACRJ_WR(x, v) (HW_AIPS_PACRJ(x).U = (v))
bogdanm 82:6473597d706e 8188 #define HW_AIPS_PACRJ_SET(x, v) (HW_AIPS_PACRJ_WR(x, HW_AIPS_PACRJ_RD(x) | (v)))
bogdanm 82:6473597d706e 8189 #define HW_AIPS_PACRJ_CLR(x, v) (HW_AIPS_PACRJ_WR(x, HW_AIPS_PACRJ_RD(x) & ~(v)))
bogdanm 82:6473597d706e 8190 #define HW_AIPS_PACRJ_TOG(x, v) (HW_AIPS_PACRJ_WR(x, HW_AIPS_PACRJ_RD(x) ^ (v)))
bogdanm 82:6473597d706e 8191 #endif
bogdanm 82:6473597d706e 8192 //@}
bogdanm 82:6473597d706e 8193
bogdanm 82:6473597d706e 8194 /*
bogdanm 82:6473597d706e 8195 * Constants & macros for individual AIPS_PACRJ bitfields
bogdanm 82:6473597d706e 8196 */
bogdanm 82:6473597d706e 8197
bogdanm 82:6473597d706e 8198 /*!
bogdanm 82:6473597d706e 8199 * @name Register AIPS_PACRJ, field TP7[0] (RW)
bogdanm 82:6473597d706e 8200 *
bogdanm 82:6473597d706e 8201 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 8202 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 8203 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 8204 *
bogdanm 82:6473597d706e 8205 * Values:
bogdanm 82:6473597d706e 8206 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 8207 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 8208 */
bogdanm 82:6473597d706e 8209 //@{
bogdanm 82:6473597d706e 8210 #define BP_AIPS_PACRJ_TP7 (0U) //!< Bit position for AIPS_PACRJ_TP7.
bogdanm 82:6473597d706e 8211 #define BM_AIPS_PACRJ_TP7 (0x00000001U) //!< Bit mask for AIPS_PACRJ_TP7.
bogdanm 82:6473597d706e 8212 #define BS_AIPS_PACRJ_TP7 (1U) //!< Bit field size in bits for AIPS_PACRJ_TP7.
bogdanm 82:6473597d706e 8213
bogdanm 82:6473597d706e 8214 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8215 //! @brief Read current value of the AIPS_PACRJ_TP7 field.
bogdanm 82:6473597d706e 8216 #define BR_AIPS_PACRJ_TP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP7))
bogdanm 82:6473597d706e 8217 #endif
bogdanm 82:6473597d706e 8218
bogdanm 82:6473597d706e 8219 //! @brief Format value for bitfield AIPS_PACRJ_TP7.
bogdanm 82:6473597d706e 8220 #define BF_AIPS_PACRJ_TP7(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRJ_TP7), uint32_t) & BM_AIPS_PACRJ_TP7)
bogdanm 82:6473597d706e 8221
bogdanm 82:6473597d706e 8222 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8223 //! @brief Set the TP7 field to a new value.
bogdanm 82:6473597d706e 8224 #define BW_AIPS_PACRJ_TP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP7) = (v))
bogdanm 82:6473597d706e 8225 #endif
bogdanm 82:6473597d706e 8226 //@}
bogdanm 82:6473597d706e 8227
bogdanm 82:6473597d706e 8228 /*!
bogdanm 82:6473597d706e 8229 * @name Register AIPS_PACRJ, field WP7[1] (RW)
bogdanm 82:6473597d706e 8230 *
bogdanm 82:6473597d706e 8231 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 8232 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 8233 * and no peripheral access initiates.
bogdanm 82:6473597d706e 8234 *
bogdanm 82:6473597d706e 8235 * Values:
bogdanm 82:6473597d706e 8236 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 8237 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 8238 */
bogdanm 82:6473597d706e 8239 //@{
bogdanm 82:6473597d706e 8240 #define BP_AIPS_PACRJ_WP7 (1U) //!< Bit position for AIPS_PACRJ_WP7.
bogdanm 82:6473597d706e 8241 #define BM_AIPS_PACRJ_WP7 (0x00000002U) //!< Bit mask for AIPS_PACRJ_WP7.
bogdanm 82:6473597d706e 8242 #define BS_AIPS_PACRJ_WP7 (1U) //!< Bit field size in bits for AIPS_PACRJ_WP7.
bogdanm 82:6473597d706e 8243
bogdanm 82:6473597d706e 8244 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8245 //! @brief Read current value of the AIPS_PACRJ_WP7 field.
bogdanm 82:6473597d706e 8246 #define BR_AIPS_PACRJ_WP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP7))
bogdanm 82:6473597d706e 8247 #endif
bogdanm 82:6473597d706e 8248
bogdanm 82:6473597d706e 8249 //! @brief Format value for bitfield AIPS_PACRJ_WP7.
bogdanm 82:6473597d706e 8250 #define BF_AIPS_PACRJ_WP7(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRJ_WP7), uint32_t) & BM_AIPS_PACRJ_WP7)
bogdanm 82:6473597d706e 8251
bogdanm 82:6473597d706e 8252 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8253 //! @brief Set the WP7 field to a new value.
bogdanm 82:6473597d706e 8254 #define BW_AIPS_PACRJ_WP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP7) = (v))
bogdanm 82:6473597d706e 8255 #endif
bogdanm 82:6473597d706e 8256 //@}
bogdanm 82:6473597d706e 8257
bogdanm 82:6473597d706e 8258 /*!
bogdanm 82:6473597d706e 8259 * @name Register AIPS_PACRJ, field SP7[2] (RW)
bogdanm 82:6473597d706e 8260 *
bogdanm 82:6473597d706e 8261 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 8262 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 8263 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 8264 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 8265 * access initiates.
bogdanm 82:6473597d706e 8266 *
bogdanm 82:6473597d706e 8267 * Values:
bogdanm 82:6473597d706e 8268 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 8269 * accesses.
bogdanm 82:6473597d706e 8270 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 8271 */
bogdanm 82:6473597d706e 8272 //@{
bogdanm 82:6473597d706e 8273 #define BP_AIPS_PACRJ_SP7 (2U) //!< Bit position for AIPS_PACRJ_SP7.
bogdanm 82:6473597d706e 8274 #define BM_AIPS_PACRJ_SP7 (0x00000004U) //!< Bit mask for AIPS_PACRJ_SP7.
bogdanm 82:6473597d706e 8275 #define BS_AIPS_PACRJ_SP7 (1U) //!< Bit field size in bits for AIPS_PACRJ_SP7.
bogdanm 82:6473597d706e 8276
bogdanm 82:6473597d706e 8277 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8278 //! @brief Read current value of the AIPS_PACRJ_SP7 field.
bogdanm 82:6473597d706e 8279 #define BR_AIPS_PACRJ_SP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP7))
bogdanm 82:6473597d706e 8280 #endif
bogdanm 82:6473597d706e 8281
bogdanm 82:6473597d706e 8282 //! @brief Format value for bitfield AIPS_PACRJ_SP7.
bogdanm 82:6473597d706e 8283 #define BF_AIPS_PACRJ_SP7(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRJ_SP7), uint32_t) & BM_AIPS_PACRJ_SP7)
bogdanm 82:6473597d706e 8284
bogdanm 82:6473597d706e 8285 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8286 //! @brief Set the SP7 field to a new value.
bogdanm 82:6473597d706e 8287 #define BW_AIPS_PACRJ_SP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP7) = (v))
bogdanm 82:6473597d706e 8288 #endif
bogdanm 82:6473597d706e 8289 //@}
bogdanm 82:6473597d706e 8290
bogdanm 82:6473597d706e 8291 /*!
bogdanm 82:6473597d706e 8292 * @name Register AIPS_PACRJ, field TP6[4] (RW)
bogdanm 82:6473597d706e 8293 *
bogdanm 82:6473597d706e 8294 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 8295 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 8296 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 8297 *
bogdanm 82:6473597d706e 8298 * Values:
bogdanm 82:6473597d706e 8299 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 8300 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 8301 */
bogdanm 82:6473597d706e 8302 //@{
bogdanm 82:6473597d706e 8303 #define BP_AIPS_PACRJ_TP6 (4U) //!< Bit position for AIPS_PACRJ_TP6.
bogdanm 82:6473597d706e 8304 #define BM_AIPS_PACRJ_TP6 (0x00000010U) //!< Bit mask for AIPS_PACRJ_TP6.
bogdanm 82:6473597d706e 8305 #define BS_AIPS_PACRJ_TP6 (1U) //!< Bit field size in bits for AIPS_PACRJ_TP6.
bogdanm 82:6473597d706e 8306
bogdanm 82:6473597d706e 8307 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8308 //! @brief Read current value of the AIPS_PACRJ_TP6 field.
bogdanm 82:6473597d706e 8309 #define BR_AIPS_PACRJ_TP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP6))
bogdanm 82:6473597d706e 8310 #endif
bogdanm 82:6473597d706e 8311
bogdanm 82:6473597d706e 8312 //! @brief Format value for bitfield AIPS_PACRJ_TP6.
bogdanm 82:6473597d706e 8313 #define BF_AIPS_PACRJ_TP6(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRJ_TP6), uint32_t) & BM_AIPS_PACRJ_TP6)
bogdanm 82:6473597d706e 8314
bogdanm 82:6473597d706e 8315 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8316 //! @brief Set the TP6 field to a new value.
bogdanm 82:6473597d706e 8317 #define BW_AIPS_PACRJ_TP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP6) = (v))
bogdanm 82:6473597d706e 8318 #endif
bogdanm 82:6473597d706e 8319 //@}
bogdanm 82:6473597d706e 8320
bogdanm 82:6473597d706e 8321 /*!
bogdanm 82:6473597d706e 8322 * @name Register AIPS_PACRJ, field WP6[5] (RW)
bogdanm 82:6473597d706e 8323 *
bogdanm 82:6473597d706e 8324 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 8325 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 8326 * and no peripheral access initiates.
bogdanm 82:6473597d706e 8327 *
bogdanm 82:6473597d706e 8328 * Values:
bogdanm 82:6473597d706e 8329 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 8330 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 8331 */
bogdanm 82:6473597d706e 8332 //@{
bogdanm 82:6473597d706e 8333 #define BP_AIPS_PACRJ_WP6 (5U) //!< Bit position for AIPS_PACRJ_WP6.
bogdanm 82:6473597d706e 8334 #define BM_AIPS_PACRJ_WP6 (0x00000020U) //!< Bit mask for AIPS_PACRJ_WP6.
bogdanm 82:6473597d706e 8335 #define BS_AIPS_PACRJ_WP6 (1U) //!< Bit field size in bits for AIPS_PACRJ_WP6.
bogdanm 82:6473597d706e 8336
bogdanm 82:6473597d706e 8337 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8338 //! @brief Read current value of the AIPS_PACRJ_WP6 field.
bogdanm 82:6473597d706e 8339 #define BR_AIPS_PACRJ_WP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP6))
bogdanm 82:6473597d706e 8340 #endif
bogdanm 82:6473597d706e 8341
bogdanm 82:6473597d706e 8342 //! @brief Format value for bitfield AIPS_PACRJ_WP6.
bogdanm 82:6473597d706e 8343 #define BF_AIPS_PACRJ_WP6(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRJ_WP6), uint32_t) & BM_AIPS_PACRJ_WP6)
bogdanm 82:6473597d706e 8344
bogdanm 82:6473597d706e 8345 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8346 //! @brief Set the WP6 field to a new value.
bogdanm 82:6473597d706e 8347 #define BW_AIPS_PACRJ_WP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP6) = (v))
bogdanm 82:6473597d706e 8348 #endif
bogdanm 82:6473597d706e 8349 //@}
bogdanm 82:6473597d706e 8350
bogdanm 82:6473597d706e 8351 /*!
bogdanm 82:6473597d706e 8352 * @name Register AIPS_PACRJ, field SP6[6] (RW)
bogdanm 82:6473597d706e 8353 *
bogdanm 82:6473597d706e 8354 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 8355 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 8356 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 8357 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 8358 * access initiates.
bogdanm 82:6473597d706e 8359 *
bogdanm 82:6473597d706e 8360 * Values:
bogdanm 82:6473597d706e 8361 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 8362 * accesses.
bogdanm 82:6473597d706e 8363 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 8364 */
bogdanm 82:6473597d706e 8365 //@{
bogdanm 82:6473597d706e 8366 #define BP_AIPS_PACRJ_SP6 (6U) //!< Bit position for AIPS_PACRJ_SP6.
bogdanm 82:6473597d706e 8367 #define BM_AIPS_PACRJ_SP6 (0x00000040U) //!< Bit mask for AIPS_PACRJ_SP6.
bogdanm 82:6473597d706e 8368 #define BS_AIPS_PACRJ_SP6 (1U) //!< Bit field size in bits for AIPS_PACRJ_SP6.
bogdanm 82:6473597d706e 8369
bogdanm 82:6473597d706e 8370 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8371 //! @brief Read current value of the AIPS_PACRJ_SP6 field.
bogdanm 82:6473597d706e 8372 #define BR_AIPS_PACRJ_SP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP6))
bogdanm 82:6473597d706e 8373 #endif
bogdanm 82:6473597d706e 8374
bogdanm 82:6473597d706e 8375 //! @brief Format value for bitfield AIPS_PACRJ_SP6.
bogdanm 82:6473597d706e 8376 #define BF_AIPS_PACRJ_SP6(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRJ_SP6), uint32_t) & BM_AIPS_PACRJ_SP6)
bogdanm 82:6473597d706e 8377
bogdanm 82:6473597d706e 8378 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8379 //! @brief Set the SP6 field to a new value.
bogdanm 82:6473597d706e 8380 #define BW_AIPS_PACRJ_SP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP6) = (v))
bogdanm 82:6473597d706e 8381 #endif
bogdanm 82:6473597d706e 8382 //@}
bogdanm 82:6473597d706e 8383
bogdanm 82:6473597d706e 8384 /*!
bogdanm 82:6473597d706e 8385 * @name Register AIPS_PACRJ, field TP5[8] (RW)
bogdanm 82:6473597d706e 8386 *
bogdanm 82:6473597d706e 8387 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 8388 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 8389 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 8390 *
bogdanm 82:6473597d706e 8391 * Values:
bogdanm 82:6473597d706e 8392 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 8393 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 8394 */
bogdanm 82:6473597d706e 8395 //@{
bogdanm 82:6473597d706e 8396 #define BP_AIPS_PACRJ_TP5 (8U) //!< Bit position for AIPS_PACRJ_TP5.
bogdanm 82:6473597d706e 8397 #define BM_AIPS_PACRJ_TP5 (0x00000100U) //!< Bit mask for AIPS_PACRJ_TP5.
bogdanm 82:6473597d706e 8398 #define BS_AIPS_PACRJ_TP5 (1U) //!< Bit field size in bits for AIPS_PACRJ_TP5.
bogdanm 82:6473597d706e 8399
bogdanm 82:6473597d706e 8400 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8401 //! @brief Read current value of the AIPS_PACRJ_TP5 field.
bogdanm 82:6473597d706e 8402 #define BR_AIPS_PACRJ_TP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP5))
bogdanm 82:6473597d706e 8403 #endif
bogdanm 82:6473597d706e 8404
bogdanm 82:6473597d706e 8405 //! @brief Format value for bitfield AIPS_PACRJ_TP5.
bogdanm 82:6473597d706e 8406 #define BF_AIPS_PACRJ_TP5(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRJ_TP5), uint32_t) & BM_AIPS_PACRJ_TP5)
bogdanm 82:6473597d706e 8407
bogdanm 82:6473597d706e 8408 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8409 //! @brief Set the TP5 field to a new value.
bogdanm 82:6473597d706e 8410 #define BW_AIPS_PACRJ_TP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP5) = (v))
bogdanm 82:6473597d706e 8411 #endif
bogdanm 82:6473597d706e 8412 //@}
bogdanm 82:6473597d706e 8413
bogdanm 82:6473597d706e 8414 /*!
bogdanm 82:6473597d706e 8415 * @name Register AIPS_PACRJ, field WP5[9] (RW)
bogdanm 82:6473597d706e 8416 *
bogdanm 82:6473597d706e 8417 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 8418 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 8419 * and no peripheral access initiates.
bogdanm 82:6473597d706e 8420 *
bogdanm 82:6473597d706e 8421 * Values:
bogdanm 82:6473597d706e 8422 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 8423 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 8424 */
bogdanm 82:6473597d706e 8425 //@{
bogdanm 82:6473597d706e 8426 #define BP_AIPS_PACRJ_WP5 (9U) //!< Bit position for AIPS_PACRJ_WP5.
bogdanm 82:6473597d706e 8427 #define BM_AIPS_PACRJ_WP5 (0x00000200U) //!< Bit mask for AIPS_PACRJ_WP5.
bogdanm 82:6473597d706e 8428 #define BS_AIPS_PACRJ_WP5 (1U) //!< Bit field size in bits for AIPS_PACRJ_WP5.
bogdanm 82:6473597d706e 8429
bogdanm 82:6473597d706e 8430 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8431 //! @brief Read current value of the AIPS_PACRJ_WP5 field.
bogdanm 82:6473597d706e 8432 #define BR_AIPS_PACRJ_WP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP5))
bogdanm 82:6473597d706e 8433 #endif
bogdanm 82:6473597d706e 8434
bogdanm 82:6473597d706e 8435 //! @brief Format value for bitfield AIPS_PACRJ_WP5.
bogdanm 82:6473597d706e 8436 #define BF_AIPS_PACRJ_WP5(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRJ_WP5), uint32_t) & BM_AIPS_PACRJ_WP5)
bogdanm 82:6473597d706e 8437
bogdanm 82:6473597d706e 8438 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8439 //! @brief Set the WP5 field to a new value.
bogdanm 82:6473597d706e 8440 #define BW_AIPS_PACRJ_WP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP5) = (v))
bogdanm 82:6473597d706e 8441 #endif
bogdanm 82:6473597d706e 8442 //@}
bogdanm 82:6473597d706e 8443
bogdanm 82:6473597d706e 8444 /*!
bogdanm 82:6473597d706e 8445 * @name Register AIPS_PACRJ, field SP5[10] (RW)
bogdanm 82:6473597d706e 8446 *
bogdanm 82:6473597d706e 8447 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 8448 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 8449 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 8450 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 8451 * access initiates.
bogdanm 82:6473597d706e 8452 *
bogdanm 82:6473597d706e 8453 * Values:
bogdanm 82:6473597d706e 8454 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 8455 * accesses.
bogdanm 82:6473597d706e 8456 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 8457 */
bogdanm 82:6473597d706e 8458 //@{
bogdanm 82:6473597d706e 8459 #define BP_AIPS_PACRJ_SP5 (10U) //!< Bit position for AIPS_PACRJ_SP5.
bogdanm 82:6473597d706e 8460 #define BM_AIPS_PACRJ_SP5 (0x00000400U) //!< Bit mask for AIPS_PACRJ_SP5.
bogdanm 82:6473597d706e 8461 #define BS_AIPS_PACRJ_SP5 (1U) //!< Bit field size in bits for AIPS_PACRJ_SP5.
bogdanm 82:6473597d706e 8462
bogdanm 82:6473597d706e 8463 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8464 //! @brief Read current value of the AIPS_PACRJ_SP5 field.
bogdanm 82:6473597d706e 8465 #define BR_AIPS_PACRJ_SP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP5))
bogdanm 82:6473597d706e 8466 #endif
bogdanm 82:6473597d706e 8467
bogdanm 82:6473597d706e 8468 //! @brief Format value for bitfield AIPS_PACRJ_SP5.
bogdanm 82:6473597d706e 8469 #define BF_AIPS_PACRJ_SP5(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRJ_SP5), uint32_t) & BM_AIPS_PACRJ_SP5)
bogdanm 82:6473597d706e 8470
bogdanm 82:6473597d706e 8471 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8472 //! @brief Set the SP5 field to a new value.
bogdanm 82:6473597d706e 8473 #define BW_AIPS_PACRJ_SP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP5) = (v))
bogdanm 82:6473597d706e 8474 #endif
bogdanm 82:6473597d706e 8475 //@}
bogdanm 82:6473597d706e 8476
bogdanm 82:6473597d706e 8477 /*!
bogdanm 82:6473597d706e 8478 * @name Register AIPS_PACRJ, field TP4[12] (RW)
bogdanm 82:6473597d706e 8479 *
bogdanm 82:6473597d706e 8480 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 8481 * When this bit is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 8482 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 8483 *
bogdanm 82:6473597d706e 8484 * Values:
bogdanm 82:6473597d706e 8485 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 8486 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 8487 */
bogdanm 82:6473597d706e 8488 //@{
bogdanm 82:6473597d706e 8489 #define BP_AIPS_PACRJ_TP4 (12U) //!< Bit position for AIPS_PACRJ_TP4.
bogdanm 82:6473597d706e 8490 #define BM_AIPS_PACRJ_TP4 (0x00001000U) //!< Bit mask for AIPS_PACRJ_TP4.
bogdanm 82:6473597d706e 8491 #define BS_AIPS_PACRJ_TP4 (1U) //!< Bit field size in bits for AIPS_PACRJ_TP4.
bogdanm 82:6473597d706e 8492
bogdanm 82:6473597d706e 8493 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8494 //! @brief Read current value of the AIPS_PACRJ_TP4 field.
bogdanm 82:6473597d706e 8495 #define BR_AIPS_PACRJ_TP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP4))
bogdanm 82:6473597d706e 8496 #endif
bogdanm 82:6473597d706e 8497
bogdanm 82:6473597d706e 8498 //! @brief Format value for bitfield AIPS_PACRJ_TP4.
bogdanm 82:6473597d706e 8499 #define BF_AIPS_PACRJ_TP4(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRJ_TP4), uint32_t) & BM_AIPS_PACRJ_TP4)
bogdanm 82:6473597d706e 8500
bogdanm 82:6473597d706e 8501 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8502 //! @brief Set the TP4 field to a new value.
bogdanm 82:6473597d706e 8503 #define BW_AIPS_PACRJ_TP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP4) = (v))
bogdanm 82:6473597d706e 8504 #endif
bogdanm 82:6473597d706e 8505 //@}
bogdanm 82:6473597d706e 8506
bogdanm 82:6473597d706e 8507 /*!
bogdanm 82:6473597d706e 8508 * @name Register AIPS_PACRJ, field WP4[13] (RW)
bogdanm 82:6473597d706e 8509 *
bogdanm 82:6473597d706e 8510 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 8511 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 8512 * and no peripheral access initiates.
bogdanm 82:6473597d706e 8513 *
bogdanm 82:6473597d706e 8514 * Values:
bogdanm 82:6473597d706e 8515 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 8516 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 8517 */
bogdanm 82:6473597d706e 8518 //@{
bogdanm 82:6473597d706e 8519 #define BP_AIPS_PACRJ_WP4 (13U) //!< Bit position for AIPS_PACRJ_WP4.
bogdanm 82:6473597d706e 8520 #define BM_AIPS_PACRJ_WP4 (0x00002000U) //!< Bit mask for AIPS_PACRJ_WP4.
bogdanm 82:6473597d706e 8521 #define BS_AIPS_PACRJ_WP4 (1U) //!< Bit field size in bits for AIPS_PACRJ_WP4.
bogdanm 82:6473597d706e 8522
bogdanm 82:6473597d706e 8523 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8524 //! @brief Read current value of the AIPS_PACRJ_WP4 field.
bogdanm 82:6473597d706e 8525 #define BR_AIPS_PACRJ_WP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP4))
bogdanm 82:6473597d706e 8526 #endif
bogdanm 82:6473597d706e 8527
bogdanm 82:6473597d706e 8528 //! @brief Format value for bitfield AIPS_PACRJ_WP4.
bogdanm 82:6473597d706e 8529 #define BF_AIPS_PACRJ_WP4(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRJ_WP4), uint32_t) & BM_AIPS_PACRJ_WP4)
bogdanm 82:6473597d706e 8530
bogdanm 82:6473597d706e 8531 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8532 //! @brief Set the WP4 field to a new value.
bogdanm 82:6473597d706e 8533 #define BW_AIPS_PACRJ_WP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP4) = (v))
bogdanm 82:6473597d706e 8534 #endif
bogdanm 82:6473597d706e 8535 //@}
bogdanm 82:6473597d706e 8536
bogdanm 82:6473597d706e 8537 /*!
bogdanm 82:6473597d706e 8538 * @name Register AIPS_PACRJ, field SP4[14] (RW)
bogdanm 82:6473597d706e 8539 *
bogdanm 82:6473597d706e 8540 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 8541 * access. When this bit is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 8542 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
bogdanm 82:6473597d706e 8543 * set. If not, access terminates with an error response and no peripheral access
bogdanm 82:6473597d706e 8544 * initiates.
bogdanm 82:6473597d706e 8545 *
bogdanm 82:6473597d706e 8546 * Values:
bogdanm 82:6473597d706e 8547 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 8548 * accesses.
bogdanm 82:6473597d706e 8549 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 8550 */
bogdanm 82:6473597d706e 8551 //@{
bogdanm 82:6473597d706e 8552 #define BP_AIPS_PACRJ_SP4 (14U) //!< Bit position for AIPS_PACRJ_SP4.
bogdanm 82:6473597d706e 8553 #define BM_AIPS_PACRJ_SP4 (0x00004000U) //!< Bit mask for AIPS_PACRJ_SP4.
bogdanm 82:6473597d706e 8554 #define BS_AIPS_PACRJ_SP4 (1U) //!< Bit field size in bits for AIPS_PACRJ_SP4.
bogdanm 82:6473597d706e 8555
bogdanm 82:6473597d706e 8556 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8557 //! @brief Read current value of the AIPS_PACRJ_SP4 field.
bogdanm 82:6473597d706e 8558 #define BR_AIPS_PACRJ_SP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP4))
bogdanm 82:6473597d706e 8559 #endif
bogdanm 82:6473597d706e 8560
bogdanm 82:6473597d706e 8561 //! @brief Format value for bitfield AIPS_PACRJ_SP4.
bogdanm 82:6473597d706e 8562 #define BF_AIPS_PACRJ_SP4(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRJ_SP4), uint32_t) & BM_AIPS_PACRJ_SP4)
bogdanm 82:6473597d706e 8563
bogdanm 82:6473597d706e 8564 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8565 //! @brief Set the SP4 field to a new value.
bogdanm 82:6473597d706e 8566 #define BW_AIPS_PACRJ_SP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP4) = (v))
bogdanm 82:6473597d706e 8567 #endif
bogdanm 82:6473597d706e 8568 //@}
bogdanm 82:6473597d706e 8569
bogdanm 82:6473597d706e 8570 /*!
bogdanm 82:6473597d706e 8571 * @name Register AIPS_PACRJ, field TP3[16] (RW)
bogdanm 82:6473597d706e 8572 *
bogdanm 82:6473597d706e 8573 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 8574 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 8575 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 8576 *
bogdanm 82:6473597d706e 8577 * Values:
bogdanm 82:6473597d706e 8578 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 8579 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 8580 */
bogdanm 82:6473597d706e 8581 //@{
bogdanm 82:6473597d706e 8582 #define BP_AIPS_PACRJ_TP3 (16U) //!< Bit position for AIPS_PACRJ_TP3.
bogdanm 82:6473597d706e 8583 #define BM_AIPS_PACRJ_TP3 (0x00010000U) //!< Bit mask for AIPS_PACRJ_TP3.
bogdanm 82:6473597d706e 8584 #define BS_AIPS_PACRJ_TP3 (1U) //!< Bit field size in bits for AIPS_PACRJ_TP3.
bogdanm 82:6473597d706e 8585
bogdanm 82:6473597d706e 8586 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8587 //! @brief Read current value of the AIPS_PACRJ_TP3 field.
bogdanm 82:6473597d706e 8588 #define BR_AIPS_PACRJ_TP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP3))
bogdanm 82:6473597d706e 8589 #endif
bogdanm 82:6473597d706e 8590
bogdanm 82:6473597d706e 8591 //! @brief Format value for bitfield AIPS_PACRJ_TP3.
bogdanm 82:6473597d706e 8592 #define BF_AIPS_PACRJ_TP3(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRJ_TP3), uint32_t) & BM_AIPS_PACRJ_TP3)
bogdanm 82:6473597d706e 8593
bogdanm 82:6473597d706e 8594 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8595 //! @brief Set the TP3 field to a new value.
bogdanm 82:6473597d706e 8596 #define BW_AIPS_PACRJ_TP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP3) = (v))
bogdanm 82:6473597d706e 8597 #endif
bogdanm 82:6473597d706e 8598 //@}
bogdanm 82:6473597d706e 8599
bogdanm 82:6473597d706e 8600 /*!
bogdanm 82:6473597d706e 8601 * @name Register AIPS_PACRJ, field WP3[17] (RW)
bogdanm 82:6473597d706e 8602 *
bogdanm 82:6473597d706e 8603 * Determines whether the peripheral allows write accesss. When this bit is set
bogdanm 82:6473597d706e 8604 * and a write access is attempted, access terminates with an error response and
bogdanm 82:6473597d706e 8605 * no peripheral access initiates.
bogdanm 82:6473597d706e 8606 *
bogdanm 82:6473597d706e 8607 * Values:
bogdanm 82:6473597d706e 8608 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 8609 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 8610 */
bogdanm 82:6473597d706e 8611 //@{
bogdanm 82:6473597d706e 8612 #define BP_AIPS_PACRJ_WP3 (17U) //!< Bit position for AIPS_PACRJ_WP3.
bogdanm 82:6473597d706e 8613 #define BM_AIPS_PACRJ_WP3 (0x00020000U) //!< Bit mask for AIPS_PACRJ_WP3.
bogdanm 82:6473597d706e 8614 #define BS_AIPS_PACRJ_WP3 (1U) //!< Bit field size in bits for AIPS_PACRJ_WP3.
bogdanm 82:6473597d706e 8615
bogdanm 82:6473597d706e 8616 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8617 //! @brief Read current value of the AIPS_PACRJ_WP3 field.
bogdanm 82:6473597d706e 8618 #define BR_AIPS_PACRJ_WP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP3))
bogdanm 82:6473597d706e 8619 #endif
bogdanm 82:6473597d706e 8620
bogdanm 82:6473597d706e 8621 //! @brief Format value for bitfield AIPS_PACRJ_WP3.
bogdanm 82:6473597d706e 8622 #define BF_AIPS_PACRJ_WP3(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRJ_WP3), uint32_t) & BM_AIPS_PACRJ_WP3)
bogdanm 82:6473597d706e 8623
bogdanm 82:6473597d706e 8624 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8625 //! @brief Set the WP3 field to a new value.
bogdanm 82:6473597d706e 8626 #define BW_AIPS_PACRJ_WP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP3) = (v))
bogdanm 82:6473597d706e 8627 #endif
bogdanm 82:6473597d706e 8628 //@}
bogdanm 82:6473597d706e 8629
bogdanm 82:6473597d706e 8630 /*!
bogdanm 82:6473597d706e 8631 * @name Register AIPS_PACRJ, field SP3[18] (RW)
bogdanm 82:6473597d706e 8632 *
bogdanm 82:6473597d706e 8633 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 8634 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 8635 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 8636 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 8637 * access initiates.
bogdanm 82:6473597d706e 8638 *
bogdanm 82:6473597d706e 8639 * Values:
bogdanm 82:6473597d706e 8640 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 8641 * accesses.
bogdanm 82:6473597d706e 8642 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 8643 */
bogdanm 82:6473597d706e 8644 //@{
bogdanm 82:6473597d706e 8645 #define BP_AIPS_PACRJ_SP3 (18U) //!< Bit position for AIPS_PACRJ_SP3.
bogdanm 82:6473597d706e 8646 #define BM_AIPS_PACRJ_SP3 (0x00040000U) //!< Bit mask for AIPS_PACRJ_SP3.
bogdanm 82:6473597d706e 8647 #define BS_AIPS_PACRJ_SP3 (1U) //!< Bit field size in bits for AIPS_PACRJ_SP3.
bogdanm 82:6473597d706e 8648
bogdanm 82:6473597d706e 8649 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8650 //! @brief Read current value of the AIPS_PACRJ_SP3 field.
bogdanm 82:6473597d706e 8651 #define BR_AIPS_PACRJ_SP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP3))
bogdanm 82:6473597d706e 8652 #endif
bogdanm 82:6473597d706e 8653
bogdanm 82:6473597d706e 8654 //! @brief Format value for bitfield AIPS_PACRJ_SP3.
bogdanm 82:6473597d706e 8655 #define BF_AIPS_PACRJ_SP3(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRJ_SP3), uint32_t) & BM_AIPS_PACRJ_SP3)
bogdanm 82:6473597d706e 8656
bogdanm 82:6473597d706e 8657 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8658 //! @brief Set the SP3 field to a new value.
bogdanm 82:6473597d706e 8659 #define BW_AIPS_PACRJ_SP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP3) = (v))
bogdanm 82:6473597d706e 8660 #endif
bogdanm 82:6473597d706e 8661 //@}
bogdanm 82:6473597d706e 8662
bogdanm 82:6473597d706e 8663 /*!
bogdanm 82:6473597d706e 8664 * @name Register AIPS_PACRJ, field TP2[20] (RW)
bogdanm 82:6473597d706e 8665 *
bogdanm 82:6473597d706e 8666 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 8667 * When this bit is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 8668 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 8669 *
bogdanm 82:6473597d706e 8670 * Values:
bogdanm 82:6473597d706e 8671 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 8672 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 8673 */
bogdanm 82:6473597d706e 8674 //@{
bogdanm 82:6473597d706e 8675 #define BP_AIPS_PACRJ_TP2 (20U) //!< Bit position for AIPS_PACRJ_TP2.
bogdanm 82:6473597d706e 8676 #define BM_AIPS_PACRJ_TP2 (0x00100000U) //!< Bit mask for AIPS_PACRJ_TP2.
bogdanm 82:6473597d706e 8677 #define BS_AIPS_PACRJ_TP2 (1U) //!< Bit field size in bits for AIPS_PACRJ_TP2.
bogdanm 82:6473597d706e 8678
bogdanm 82:6473597d706e 8679 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8680 //! @brief Read current value of the AIPS_PACRJ_TP2 field.
bogdanm 82:6473597d706e 8681 #define BR_AIPS_PACRJ_TP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP2))
bogdanm 82:6473597d706e 8682 #endif
bogdanm 82:6473597d706e 8683
bogdanm 82:6473597d706e 8684 //! @brief Format value for bitfield AIPS_PACRJ_TP2.
bogdanm 82:6473597d706e 8685 #define BF_AIPS_PACRJ_TP2(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRJ_TP2), uint32_t) & BM_AIPS_PACRJ_TP2)
bogdanm 82:6473597d706e 8686
bogdanm 82:6473597d706e 8687 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8688 //! @brief Set the TP2 field to a new value.
bogdanm 82:6473597d706e 8689 #define BW_AIPS_PACRJ_TP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP2) = (v))
bogdanm 82:6473597d706e 8690 #endif
bogdanm 82:6473597d706e 8691 //@}
bogdanm 82:6473597d706e 8692
bogdanm 82:6473597d706e 8693 /*!
bogdanm 82:6473597d706e 8694 * @name Register AIPS_PACRJ, field WP2[21] (RW)
bogdanm 82:6473597d706e 8695 *
bogdanm 82:6473597d706e 8696 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 8697 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 8698 * and no peripheral access initiates.
bogdanm 82:6473597d706e 8699 *
bogdanm 82:6473597d706e 8700 * Values:
bogdanm 82:6473597d706e 8701 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 8702 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 8703 */
bogdanm 82:6473597d706e 8704 //@{
bogdanm 82:6473597d706e 8705 #define BP_AIPS_PACRJ_WP2 (21U) //!< Bit position for AIPS_PACRJ_WP2.
bogdanm 82:6473597d706e 8706 #define BM_AIPS_PACRJ_WP2 (0x00200000U) //!< Bit mask for AIPS_PACRJ_WP2.
bogdanm 82:6473597d706e 8707 #define BS_AIPS_PACRJ_WP2 (1U) //!< Bit field size in bits for AIPS_PACRJ_WP2.
bogdanm 82:6473597d706e 8708
bogdanm 82:6473597d706e 8709 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8710 //! @brief Read current value of the AIPS_PACRJ_WP2 field.
bogdanm 82:6473597d706e 8711 #define BR_AIPS_PACRJ_WP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP2))
bogdanm 82:6473597d706e 8712 #endif
bogdanm 82:6473597d706e 8713
bogdanm 82:6473597d706e 8714 //! @brief Format value for bitfield AIPS_PACRJ_WP2.
bogdanm 82:6473597d706e 8715 #define BF_AIPS_PACRJ_WP2(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRJ_WP2), uint32_t) & BM_AIPS_PACRJ_WP2)
bogdanm 82:6473597d706e 8716
bogdanm 82:6473597d706e 8717 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8718 //! @brief Set the WP2 field to a new value.
bogdanm 82:6473597d706e 8719 #define BW_AIPS_PACRJ_WP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP2) = (v))
bogdanm 82:6473597d706e 8720 #endif
bogdanm 82:6473597d706e 8721 //@}
bogdanm 82:6473597d706e 8722
bogdanm 82:6473597d706e 8723 /*!
bogdanm 82:6473597d706e 8724 * @name Register AIPS_PACRJ, field SP2[22] (RW)
bogdanm 82:6473597d706e 8725 *
bogdanm 82:6473597d706e 8726 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 8727 * access. When this bit is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 8728 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
bogdanm 82:6473597d706e 8729 * set. If not, access terminates with an error response and no peripheral access
bogdanm 82:6473597d706e 8730 * initiates.
bogdanm 82:6473597d706e 8731 *
bogdanm 82:6473597d706e 8732 * Values:
bogdanm 82:6473597d706e 8733 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 8734 * accesses.
bogdanm 82:6473597d706e 8735 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 8736 */
bogdanm 82:6473597d706e 8737 //@{
bogdanm 82:6473597d706e 8738 #define BP_AIPS_PACRJ_SP2 (22U) //!< Bit position for AIPS_PACRJ_SP2.
bogdanm 82:6473597d706e 8739 #define BM_AIPS_PACRJ_SP2 (0x00400000U) //!< Bit mask for AIPS_PACRJ_SP2.
bogdanm 82:6473597d706e 8740 #define BS_AIPS_PACRJ_SP2 (1U) //!< Bit field size in bits for AIPS_PACRJ_SP2.
bogdanm 82:6473597d706e 8741
bogdanm 82:6473597d706e 8742 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8743 //! @brief Read current value of the AIPS_PACRJ_SP2 field.
bogdanm 82:6473597d706e 8744 #define BR_AIPS_PACRJ_SP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP2))
bogdanm 82:6473597d706e 8745 #endif
bogdanm 82:6473597d706e 8746
bogdanm 82:6473597d706e 8747 //! @brief Format value for bitfield AIPS_PACRJ_SP2.
bogdanm 82:6473597d706e 8748 #define BF_AIPS_PACRJ_SP2(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRJ_SP2), uint32_t) & BM_AIPS_PACRJ_SP2)
bogdanm 82:6473597d706e 8749
bogdanm 82:6473597d706e 8750 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8751 //! @brief Set the SP2 field to a new value.
bogdanm 82:6473597d706e 8752 #define BW_AIPS_PACRJ_SP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP2) = (v))
bogdanm 82:6473597d706e 8753 #endif
bogdanm 82:6473597d706e 8754 //@}
bogdanm 82:6473597d706e 8755
bogdanm 82:6473597d706e 8756 /*!
bogdanm 82:6473597d706e 8757 * @name Register AIPS_PACRJ, field TP1[24] (RW)
bogdanm 82:6473597d706e 8758 *
bogdanm 82:6473597d706e 8759 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 8760 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 8761 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 8762 *
bogdanm 82:6473597d706e 8763 * Values:
bogdanm 82:6473597d706e 8764 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 8765 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 8766 */
bogdanm 82:6473597d706e 8767 //@{
bogdanm 82:6473597d706e 8768 #define BP_AIPS_PACRJ_TP1 (24U) //!< Bit position for AIPS_PACRJ_TP1.
bogdanm 82:6473597d706e 8769 #define BM_AIPS_PACRJ_TP1 (0x01000000U) //!< Bit mask for AIPS_PACRJ_TP1.
bogdanm 82:6473597d706e 8770 #define BS_AIPS_PACRJ_TP1 (1U) //!< Bit field size in bits for AIPS_PACRJ_TP1.
bogdanm 82:6473597d706e 8771
bogdanm 82:6473597d706e 8772 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8773 //! @brief Read current value of the AIPS_PACRJ_TP1 field.
bogdanm 82:6473597d706e 8774 #define BR_AIPS_PACRJ_TP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP1))
bogdanm 82:6473597d706e 8775 #endif
bogdanm 82:6473597d706e 8776
bogdanm 82:6473597d706e 8777 //! @brief Format value for bitfield AIPS_PACRJ_TP1.
bogdanm 82:6473597d706e 8778 #define BF_AIPS_PACRJ_TP1(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRJ_TP1), uint32_t) & BM_AIPS_PACRJ_TP1)
bogdanm 82:6473597d706e 8779
bogdanm 82:6473597d706e 8780 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8781 //! @brief Set the TP1 field to a new value.
bogdanm 82:6473597d706e 8782 #define BW_AIPS_PACRJ_TP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP1) = (v))
bogdanm 82:6473597d706e 8783 #endif
bogdanm 82:6473597d706e 8784 //@}
bogdanm 82:6473597d706e 8785
bogdanm 82:6473597d706e 8786 /*!
bogdanm 82:6473597d706e 8787 * @name Register AIPS_PACRJ, field WP1[25] (RW)
bogdanm 82:6473597d706e 8788 *
bogdanm 82:6473597d706e 8789 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 8790 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 8791 * and no peripheral access initiates.
bogdanm 82:6473597d706e 8792 *
bogdanm 82:6473597d706e 8793 * Values:
bogdanm 82:6473597d706e 8794 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 8795 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 8796 */
bogdanm 82:6473597d706e 8797 //@{
bogdanm 82:6473597d706e 8798 #define BP_AIPS_PACRJ_WP1 (25U) //!< Bit position for AIPS_PACRJ_WP1.
bogdanm 82:6473597d706e 8799 #define BM_AIPS_PACRJ_WP1 (0x02000000U) //!< Bit mask for AIPS_PACRJ_WP1.
bogdanm 82:6473597d706e 8800 #define BS_AIPS_PACRJ_WP1 (1U) //!< Bit field size in bits for AIPS_PACRJ_WP1.
bogdanm 82:6473597d706e 8801
bogdanm 82:6473597d706e 8802 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8803 //! @brief Read current value of the AIPS_PACRJ_WP1 field.
bogdanm 82:6473597d706e 8804 #define BR_AIPS_PACRJ_WP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP1))
bogdanm 82:6473597d706e 8805 #endif
bogdanm 82:6473597d706e 8806
bogdanm 82:6473597d706e 8807 //! @brief Format value for bitfield AIPS_PACRJ_WP1.
bogdanm 82:6473597d706e 8808 #define BF_AIPS_PACRJ_WP1(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRJ_WP1), uint32_t) & BM_AIPS_PACRJ_WP1)
bogdanm 82:6473597d706e 8809
bogdanm 82:6473597d706e 8810 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8811 //! @brief Set the WP1 field to a new value.
bogdanm 82:6473597d706e 8812 #define BW_AIPS_PACRJ_WP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP1) = (v))
bogdanm 82:6473597d706e 8813 #endif
bogdanm 82:6473597d706e 8814 //@}
bogdanm 82:6473597d706e 8815
bogdanm 82:6473597d706e 8816 /*!
bogdanm 82:6473597d706e 8817 * @name Register AIPS_PACRJ, field SP1[26] (RW)
bogdanm 82:6473597d706e 8818 *
bogdanm 82:6473597d706e 8819 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 8820 * access. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 8821 * supervisor access attribute, and the MPRx[MPLn] control field for the master must
bogdanm 82:6473597d706e 8822 * be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 8823 * access initiates.
bogdanm 82:6473597d706e 8824 *
bogdanm 82:6473597d706e 8825 * Values:
bogdanm 82:6473597d706e 8826 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 8827 * accesses.
bogdanm 82:6473597d706e 8828 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 8829 */
bogdanm 82:6473597d706e 8830 //@{
bogdanm 82:6473597d706e 8831 #define BP_AIPS_PACRJ_SP1 (26U) //!< Bit position for AIPS_PACRJ_SP1.
bogdanm 82:6473597d706e 8832 #define BM_AIPS_PACRJ_SP1 (0x04000000U) //!< Bit mask for AIPS_PACRJ_SP1.
bogdanm 82:6473597d706e 8833 #define BS_AIPS_PACRJ_SP1 (1U) //!< Bit field size in bits for AIPS_PACRJ_SP1.
bogdanm 82:6473597d706e 8834
bogdanm 82:6473597d706e 8835 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8836 //! @brief Read current value of the AIPS_PACRJ_SP1 field.
bogdanm 82:6473597d706e 8837 #define BR_AIPS_PACRJ_SP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP1))
bogdanm 82:6473597d706e 8838 #endif
bogdanm 82:6473597d706e 8839
bogdanm 82:6473597d706e 8840 //! @brief Format value for bitfield AIPS_PACRJ_SP1.
bogdanm 82:6473597d706e 8841 #define BF_AIPS_PACRJ_SP1(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRJ_SP1), uint32_t) & BM_AIPS_PACRJ_SP1)
bogdanm 82:6473597d706e 8842
bogdanm 82:6473597d706e 8843 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8844 //! @brief Set the SP1 field to a new value.
bogdanm 82:6473597d706e 8845 #define BW_AIPS_PACRJ_SP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP1) = (v))
bogdanm 82:6473597d706e 8846 #endif
bogdanm 82:6473597d706e 8847 //@}
bogdanm 82:6473597d706e 8848
bogdanm 82:6473597d706e 8849 /*!
bogdanm 82:6473597d706e 8850 * @name Register AIPS_PACRJ, field TP0[28] (RW)
bogdanm 82:6473597d706e 8851 *
bogdanm 82:6473597d706e 8852 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 8853 * When this bit is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 8854 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 8855 *
bogdanm 82:6473597d706e 8856 * Values:
bogdanm 82:6473597d706e 8857 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 8858 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 8859 */
bogdanm 82:6473597d706e 8860 //@{
bogdanm 82:6473597d706e 8861 #define BP_AIPS_PACRJ_TP0 (28U) //!< Bit position for AIPS_PACRJ_TP0.
bogdanm 82:6473597d706e 8862 #define BM_AIPS_PACRJ_TP0 (0x10000000U) //!< Bit mask for AIPS_PACRJ_TP0.
bogdanm 82:6473597d706e 8863 #define BS_AIPS_PACRJ_TP0 (1U) //!< Bit field size in bits for AIPS_PACRJ_TP0.
bogdanm 82:6473597d706e 8864
bogdanm 82:6473597d706e 8865 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8866 //! @brief Read current value of the AIPS_PACRJ_TP0 field.
bogdanm 82:6473597d706e 8867 #define BR_AIPS_PACRJ_TP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP0))
bogdanm 82:6473597d706e 8868 #endif
bogdanm 82:6473597d706e 8869
bogdanm 82:6473597d706e 8870 //! @brief Format value for bitfield AIPS_PACRJ_TP0.
bogdanm 82:6473597d706e 8871 #define BF_AIPS_PACRJ_TP0(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRJ_TP0), uint32_t) & BM_AIPS_PACRJ_TP0)
bogdanm 82:6473597d706e 8872
bogdanm 82:6473597d706e 8873 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8874 //! @brief Set the TP0 field to a new value.
bogdanm 82:6473597d706e 8875 #define BW_AIPS_PACRJ_TP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_TP0) = (v))
bogdanm 82:6473597d706e 8876 #endif
bogdanm 82:6473597d706e 8877 //@}
bogdanm 82:6473597d706e 8878
bogdanm 82:6473597d706e 8879 /*!
bogdanm 82:6473597d706e 8880 * @name Register AIPS_PACRJ, field WP0[29] (RW)
bogdanm 82:6473597d706e 8881 *
bogdanm 82:6473597d706e 8882 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 8883 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 8884 * and no peripheral access initiates.
bogdanm 82:6473597d706e 8885 *
bogdanm 82:6473597d706e 8886 * Values:
bogdanm 82:6473597d706e 8887 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 8888 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 8889 */
bogdanm 82:6473597d706e 8890 //@{
bogdanm 82:6473597d706e 8891 #define BP_AIPS_PACRJ_WP0 (29U) //!< Bit position for AIPS_PACRJ_WP0.
bogdanm 82:6473597d706e 8892 #define BM_AIPS_PACRJ_WP0 (0x20000000U) //!< Bit mask for AIPS_PACRJ_WP0.
bogdanm 82:6473597d706e 8893 #define BS_AIPS_PACRJ_WP0 (1U) //!< Bit field size in bits for AIPS_PACRJ_WP0.
bogdanm 82:6473597d706e 8894
bogdanm 82:6473597d706e 8895 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8896 //! @brief Read current value of the AIPS_PACRJ_WP0 field.
bogdanm 82:6473597d706e 8897 #define BR_AIPS_PACRJ_WP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP0))
bogdanm 82:6473597d706e 8898 #endif
bogdanm 82:6473597d706e 8899
bogdanm 82:6473597d706e 8900 //! @brief Format value for bitfield AIPS_PACRJ_WP0.
bogdanm 82:6473597d706e 8901 #define BF_AIPS_PACRJ_WP0(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRJ_WP0), uint32_t) & BM_AIPS_PACRJ_WP0)
bogdanm 82:6473597d706e 8902
bogdanm 82:6473597d706e 8903 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8904 //! @brief Set the WP0 field to a new value.
bogdanm 82:6473597d706e 8905 #define BW_AIPS_PACRJ_WP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_WP0) = (v))
bogdanm 82:6473597d706e 8906 #endif
bogdanm 82:6473597d706e 8907 //@}
bogdanm 82:6473597d706e 8908
bogdanm 82:6473597d706e 8909 /*!
bogdanm 82:6473597d706e 8910 * @name Register AIPS_PACRJ, field SP0[30] (RW)
bogdanm 82:6473597d706e 8911 *
bogdanm 82:6473597d706e 8912 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 8913 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 8914 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 8915 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 8916 * access initiates.
bogdanm 82:6473597d706e 8917 *
bogdanm 82:6473597d706e 8918 * Values:
bogdanm 82:6473597d706e 8919 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 8920 * accesses.
bogdanm 82:6473597d706e 8921 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 8922 */
bogdanm 82:6473597d706e 8923 //@{
bogdanm 82:6473597d706e 8924 #define BP_AIPS_PACRJ_SP0 (30U) //!< Bit position for AIPS_PACRJ_SP0.
bogdanm 82:6473597d706e 8925 #define BM_AIPS_PACRJ_SP0 (0x40000000U) //!< Bit mask for AIPS_PACRJ_SP0.
bogdanm 82:6473597d706e 8926 #define BS_AIPS_PACRJ_SP0 (1U) //!< Bit field size in bits for AIPS_PACRJ_SP0.
bogdanm 82:6473597d706e 8927
bogdanm 82:6473597d706e 8928 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8929 //! @brief Read current value of the AIPS_PACRJ_SP0 field.
bogdanm 82:6473597d706e 8930 #define BR_AIPS_PACRJ_SP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP0))
bogdanm 82:6473597d706e 8931 #endif
bogdanm 82:6473597d706e 8932
bogdanm 82:6473597d706e 8933 //! @brief Format value for bitfield AIPS_PACRJ_SP0.
bogdanm 82:6473597d706e 8934 #define BF_AIPS_PACRJ_SP0(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRJ_SP0), uint32_t) & BM_AIPS_PACRJ_SP0)
bogdanm 82:6473597d706e 8935
bogdanm 82:6473597d706e 8936 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8937 //! @brief Set the SP0 field to a new value.
bogdanm 82:6473597d706e 8938 #define BW_AIPS_PACRJ_SP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRJ_ADDR(x), BP_AIPS_PACRJ_SP0) = (v))
bogdanm 82:6473597d706e 8939 #endif
bogdanm 82:6473597d706e 8940 //@}
bogdanm 82:6473597d706e 8941
bogdanm 82:6473597d706e 8942 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 8943 // HW_AIPS_PACRK - Peripheral Access Control Register
bogdanm 82:6473597d706e 8944 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 8945
bogdanm 82:6473597d706e 8946 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 8947 /*!
bogdanm 82:6473597d706e 8948 * @brief HW_AIPS_PACRK - Peripheral Access Control Register (RW)
bogdanm 82:6473597d706e 8949 *
bogdanm 82:6473597d706e 8950 * Reset value: 0x44444444U
bogdanm 82:6473597d706e 8951 *
bogdanm 82:6473597d706e 8952 * This section describes PACR registers E-P, which control peripheral slots
bogdanm 82:6473597d706e 8953 * 32-127. See PACRPeripheral Access Control Register for the description of these
bogdanm 82:6473597d706e 8954 * registers.
bogdanm 82:6473597d706e 8955 */
bogdanm 82:6473597d706e 8956 typedef union _hw_aips_pacrk
bogdanm 82:6473597d706e 8957 {
bogdanm 82:6473597d706e 8958 uint32_t U;
bogdanm 82:6473597d706e 8959 struct _hw_aips_pacrk_bitfields
bogdanm 82:6473597d706e 8960 {
bogdanm 82:6473597d706e 8961 uint32_t TP7 : 1; //!< [0] Trusted Protect
bogdanm 82:6473597d706e 8962 uint32_t WP7 : 1; //!< [1] Write Protect
bogdanm 82:6473597d706e 8963 uint32_t SP7 : 1; //!< [2] Supervisor Protect
bogdanm 82:6473597d706e 8964 uint32_t RESERVED0 : 1; //!< [3]
bogdanm 82:6473597d706e 8965 uint32_t TP6 : 1; //!< [4] Trusted Protect
bogdanm 82:6473597d706e 8966 uint32_t WP6 : 1; //!< [5] Write Protect
bogdanm 82:6473597d706e 8967 uint32_t SP6 : 1; //!< [6] Supervisor Protect
bogdanm 82:6473597d706e 8968 uint32_t RESERVED1 : 1; //!< [7]
bogdanm 82:6473597d706e 8969 uint32_t TP5 : 1; //!< [8] Trusted Protect
bogdanm 82:6473597d706e 8970 uint32_t WP5 : 1; //!< [9] Write Protect
bogdanm 82:6473597d706e 8971 uint32_t SP5 : 1; //!< [10] Supervisor Protect
bogdanm 82:6473597d706e 8972 uint32_t RESERVED2 : 1; //!< [11]
bogdanm 82:6473597d706e 8973 uint32_t TP4 : 1; //!< [12] Trusted Protect
bogdanm 82:6473597d706e 8974 uint32_t WP4 : 1; //!< [13] Write Protect
bogdanm 82:6473597d706e 8975 uint32_t SP4 : 1; //!< [14] Supervisor Protect
bogdanm 82:6473597d706e 8976 uint32_t RESERVED3 : 1; //!< [15]
bogdanm 82:6473597d706e 8977 uint32_t TP3 : 1; //!< [16] Trusted Protect
bogdanm 82:6473597d706e 8978 uint32_t WP3 : 1; //!< [17] Write Protect
bogdanm 82:6473597d706e 8979 uint32_t SP3 : 1; //!< [18] Supervisor Protect
bogdanm 82:6473597d706e 8980 uint32_t RESERVED4 : 1; //!< [19]
bogdanm 82:6473597d706e 8981 uint32_t TP2 : 1; //!< [20] Trusted Protect
bogdanm 82:6473597d706e 8982 uint32_t WP2 : 1; //!< [21] Write Protect
bogdanm 82:6473597d706e 8983 uint32_t SP2 : 1; //!< [22] Supervisor Protect
bogdanm 82:6473597d706e 8984 uint32_t RESERVED5 : 1; //!< [23]
bogdanm 82:6473597d706e 8985 uint32_t TP1 : 1; //!< [24] Trusted Protect
bogdanm 82:6473597d706e 8986 uint32_t WP1 : 1; //!< [25] Write Protect
bogdanm 82:6473597d706e 8987 uint32_t SP1 : 1; //!< [26] Supervisor Protect
bogdanm 82:6473597d706e 8988 uint32_t RESERVED6 : 1; //!< [27]
bogdanm 82:6473597d706e 8989 uint32_t TP0 : 1; //!< [28] Trusted Protect
bogdanm 82:6473597d706e 8990 uint32_t WP0 : 1; //!< [29] Write Protect
bogdanm 82:6473597d706e 8991 uint32_t SP0 : 1; //!< [30] Supervisor Protect
bogdanm 82:6473597d706e 8992 uint32_t RESERVED7 : 1; //!< [31]
bogdanm 82:6473597d706e 8993 } B;
bogdanm 82:6473597d706e 8994 } hw_aips_pacrk_t;
bogdanm 82:6473597d706e 8995 #endif
bogdanm 82:6473597d706e 8996
bogdanm 82:6473597d706e 8997 /*!
bogdanm 82:6473597d706e 8998 * @name Constants and macros for entire AIPS_PACRK register
bogdanm 82:6473597d706e 8999 */
bogdanm 82:6473597d706e 9000 //@{
bogdanm 82:6473597d706e 9001 #define HW_AIPS_PACRK_ADDR(x) (REGS_AIPS_BASE(x) + 0x58U)
bogdanm 82:6473597d706e 9002
bogdanm 82:6473597d706e 9003 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9004 #define HW_AIPS_PACRK(x) (*(__IO hw_aips_pacrk_t *) HW_AIPS_PACRK_ADDR(x))
bogdanm 82:6473597d706e 9005 #define HW_AIPS_PACRK_RD(x) (HW_AIPS_PACRK(x).U)
bogdanm 82:6473597d706e 9006 #define HW_AIPS_PACRK_WR(x, v) (HW_AIPS_PACRK(x).U = (v))
bogdanm 82:6473597d706e 9007 #define HW_AIPS_PACRK_SET(x, v) (HW_AIPS_PACRK_WR(x, HW_AIPS_PACRK_RD(x) | (v)))
bogdanm 82:6473597d706e 9008 #define HW_AIPS_PACRK_CLR(x, v) (HW_AIPS_PACRK_WR(x, HW_AIPS_PACRK_RD(x) & ~(v)))
bogdanm 82:6473597d706e 9009 #define HW_AIPS_PACRK_TOG(x, v) (HW_AIPS_PACRK_WR(x, HW_AIPS_PACRK_RD(x) ^ (v)))
bogdanm 82:6473597d706e 9010 #endif
bogdanm 82:6473597d706e 9011 //@}
bogdanm 82:6473597d706e 9012
bogdanm 82:6473597d706e 9013 /*
bogdanm 82:6473597d706e 9014 * Constants & macros for individual AIPS_PACRK bitfields
bogdanm 82:6473597d706e 9015 */
bogdanm 82:6473597d706e 9016
bogdanm 82:6473597d706e 9017 /*!
bogdanm 82:6473597d706e 9018 * @name Register AIPS_PACRK, field TP7[0] (RW)
bogdanm 82:6473597d706e 9019 *
bogdanm 82:6473597d706e 9020 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 9021 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 9022 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 9023 *
bogdanm 82:6473597d706e 9024 * Values:
bogdanm 82:6473597d706e 9025 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 9026 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 9027 */
bogdanm 82:6473597d706e 9028 //@{
bogdanm 82:6473597d706e 9029 #define BP_AIPS_PACRK_TP7 (0U) //!< Bit position for AIPS_PACRK_TP7.
bogdanm 82:6473597d706e 9030 #define BM_AIPS_PACRK_TP7 (0x00000001U) //!< Bit mask for AIPS_PACRK_TP7.
bogdanm 82:6473597d706e 9031 #define BS_AIPS_PACRK_TP7 (1U) //!< Bit field size in bits for AIPS_PACRK_TP7.
bogdanm 82:6473597d706e 9032
bogdanm 82:6473597d706e 9033 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9034 //! @brief Read current value of the AIPS_PACRK_TP7 field.
bogdanm 82:6473597d706e 9035 #define BR_AIPS_PACRK_TP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP7))
bogdanm 82:6473597d706e 9036 #endif
bogdanm 82:6473597d706e 9037
bogdanm 82:6473597d706e 9038 //! @brief Format value for bitfield AIPS_PACRK_TP7.
bogdanm 82:6473597d706e 9039 #define BF_AIPS_PACRK_TP7(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRK_TP7), uint32_t) & BM_AIPS_PACRK_TP7)
bogdanm 82:6473597d706e 9040
bogdanm 82:6473597d706e 9041 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9042 //! @brief Set the TP7 field to a new value.
bogdanm 82:6473597d706e 9043 #define BW_AIPS_PACRK_TP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP7) = (v))
bogdanm 82:6473597d706e 9044 #endif
bogdanm 82:6473597d706e 9045 //@}
bogdanm 82:6473597d706e 9046
bogdanm 82:6473597d706e 9047 /*!
bogdanm 82:6473597d706e 9048 * @name Register AIPS_PACRK, field WP7[1] (RW)
bogdanm 82:6473597d706e 9049 *
bogdanm 82:6473597d706e 9050 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 9051 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 9052 * and no peripheral access initiates.
bogdanm 82:6473597d706e 9053 *
bogdanm 82:6473597d706e 9054 * Values:
bogdanm 82:6473597d706e 9055 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 9056 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 9057 */
bogdanm 82:6473597d706e 9058 //@{
bogdanm 82:6473597d706e 9059 #define BP_AIPS_PACRK_WP7 (1U) //!< Bit position for AIPS_PACRK_WP7.
bogdanm 82:6473597d706e 9060 #define BM_AIPS_PACRK_WP7 (0x00000002U) //!< Bit mask for AIPS_PACRK_WP7.
bogdanm 82:6473597d706e 9061 #define BS_AIPS_PACRK_WP7 (1U) //!< Bit field size in bits for AIPS_PACRK_WP7.
bogdanm 82:6473597d706e 9062
bogdanm 82:6473597d706e 9063 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9064 //! @brief Read current value of the AIPS_PACRK_WP7 field.
bogdanm 82:6473597d706e 9065 #define BR_AIPS_PACRK_WP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP7))
bogdanm 82:6473597d706e 9066 #endif
bogdanm 82:6473597d706e 9067
bogdanm 82:6473597d706e 9068 //! @brief Format value for bitfield AIPS_PACRK_WP7.
bogdanm 82:6473597d706e 9069 #define BF_AIPS_PACRK_WP7(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRK_WP7), uint32_t) & BM_AIPS_PACRK_WP7)
bogdanm 82:6473597d706e 9070
bogdanm 82:6473597d706e 9071 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9072 //! @brief Set the WP7 field to a new value.
bogdanm 82:6473597d706e 9073 #define BW_AIPS_PACRK_WP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP7) = (v))
bogdanm 82:6473597d706e 9074 #endif
bogdanm 82:6473597d706e 9075 //@}
bogdanm 82:6473597d706e 9076
bogdanm 82:6473597d706e 9077 /*!
bogdanm 82:6473597d706e 9078 * @name Register AIPS_PACRK, field SP7[2] (RW)
bogdanm 82:6473597d706e 9079 *
bogdanm 82:6473597d706e 9080 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 9081 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 9082 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 9083 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 9084 * access initiates.
bogdanm 82:6473597d706e 9085 *
bogdanm 82:6473597d706e 9086 * Values:
bogdanm 82:6473597d706e 9087 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 9088 * accesses.
bogdanm 82:6473597d706e 9089 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 9090 */
bogdanm 82:6473597d706e 9091 //@{
bogdanm 82:6473597d706e 9092 #define BP_AIPS_PACRK_SP7 (2U) //!< Bit position for AIPS_PACRK_SP7.
bogdanm 82:6473597d706e 9093 #define BM_AIPS_PACRK_SP7 (0x00000004U) //!< Bit mask for AIPS_PACRK_SP7.
bogdanm 82:6473597d706e 9094 #define BS_AIPS_PACRK_SP7 (1U) //!< Bit field size in bits for AIPS_PACRK_SP7.
bogdanm 82:6473597d706e 9095
bogdanm 82:6473597d706e 9096 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9097 //! @brief Read current value of the AIPS_PACRK_SP7 field.
bogdanm 82:6473597d706e 9098 #define BR_AIPS_PACRK_SP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP7))
bogdanm 82:6473597d706e 9099 #endif
bogdanm 82:6473597d706e 9100
bogdanm 82:6473597d706e 9101 //! @brief Format value for bitfield AIPS_PACRK_SP7.
bogdanm 82:6473597d706e 9102 #define BF_AIPS_PACRK_SP7(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRK_SP7), uint32_t) & BM_AIPS_PACRK_SP7)
bogdanm 82:6473597d706e 9103
bogdanm 82:6473597d706e 9104 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9105 //! @brief Set the SP7 field to a new value.
bogdanm 82:6473597d706e 9106 #define BW_AIPS_PACRK_SP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP7) = (v))
bogdanm 82:6473597d706e 9107 #endif
bogdanm 82:6473597d706e 9108 //@}
bogdanm 82:6473597d706e 9109
bogdanm 82:6473597d706e 9110 /*!
bogdanm 82:6473597d706e 9111 * @name Register AIPS_PACRK, field TP6[4] (RW)
bogdanm 82:6473597d706e 9112 *
bogdanm 82:6473597d706e 9113 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 9114 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 9115 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 9116 *
bogdanm 82:6473597d706e 9117 * Values:
bogdanm 82:6473597d706e 9118 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 9119 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 9120 */
bogdanm 82:6473597d706e 9121 //@{
bogdanm 82:6473597d706e 9122 #define BP_AIPS_PACRK_TP6 (4U) //!< Bit position for AIPS_PACRK_TP6.
bogdanm 82:6473597d706e 9123 #define BM_AIPS_PACRK_TP6 (0x00000010U) //!< Bit mask for AIPS_PACRK_TP6.
bogdanm 82:6473597d706e 9124 #define BS_AIPS_PACRK_TP6 (1U) //!< Bit field size in bits for AIPS_PACRK_TP6.
bogdanm 82:6473597d706e 9125
bogdanm 82:6473597d706e 9126 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9127 //! @brief Read current value of the AIPS_PACRK_TP6 field.
bogdanm 82:6473597d706e 9128 #define BR_AIPS_PACRK_TP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP6))
bogdanm 82:6473597d706e 9129 #endif
bogdanm 82:6473597d706e 9130
bogdanm 82:6473597d706e 9131 //! @brief Format value for bitfield AIPS_PACRK_TP6.
bogdanm 82:6473597d706e 9132 #define BF_AIPS_PACRK_TP6(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRK_TP6), uint32_t) & BM_AIPS_PACRK_TP6)
bogdanm 82:6473597d706e 9133
bogdanm 82:6473597d706e 9134 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9135 //! @brief Set the TP6 field to a new value.
bogdanm 82:6473597d706e 9136 #define BW_AIPS_PACRK_TP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP6) = (v))
bogdanm 82:6473597d706e 9137 #endif
bogdanm 82:6473597d706e 9138 //@}
bogdanm 82:6473597d706e 9139
bogdanm 82:6473597d706e 9140 /*!
bogdanm 82:6473597d706e 9141 * @name Register AIPS_PACRK, field WP6[5] (RW)
bogdanm 82:6473597d706e 9142 *
bogdanm 82:6473597d706e 9143 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 9144 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 9145 * and no peripheral access initiates.
bogdanm 82:6473597d706e 9146 *
bogdanm 82:6473597d706e 9147 * Values:
bogdanm 82:6473597d706e 9148 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 9149 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 9150 */
bogdanm 82:6473597d706e 9151 //@{
bogdanm 82:6473597d706e 9152 #define BP_AIPS_PACRK_WP6 (5U) //!< Bit position for AIPS_PACRK_WP6.
bogdanm 82:6473597d706e 9153 #define BM_AIPS_PACRK_WP6 (0x00000020U) //!< Bit mask for AIPS_PACRK_WP6.
bogdanm 82:6473597d706e 9154 #define BS_AIPS_PACRK_WP6 (1U) //!< Bit field size in bits for AIPS_PACRK_WP6.
bogdanm 82:6473597d706e 9155
bogdanm 82:6473597d706e 9156 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9157 //! @brief Read current value of the AIPS_PACRK_WP6 field.
bogdanm 82:6473597d706e 9158 #define BR_AIPS_PACRK_WP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP6))
bogdanm 82:6473597d706e 9159 #endif
bogdanm 82:6473597d706e 9160
bogdanm 82:6473597d706e 9161 //! @brief Format value for bitfield AIPS_PACRK_WP6.
bogdanm 82:6473597d706e 9162 #define BF_AIPS_PACRK_WP6(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRK_WP6), uint32_t) & BM_AIPS_PACRK_WP6)
bogdanm 82:6473597d706e 9163
bogdanm 82:6473597d706e 9164 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9165 //! @brief Set the WP6 field to a new value.
bogdanm 82:6473597d706e 9166 #define BW_AIPS_PACRK_WP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP6) = (v))
bogdanm 82:6473597d706e 9167 #endif
bogdanm 82:6473597d706e 9168 //@}
bogdanm 82:6473597d706e 9169
bogdanm 82:6473597d706e 9170 /*!
bogdanm 82:6473597d706e 9171 * @name Register AIPS_PACRK, field SP6[6] (RW)
bogdanm 82:6473597d706e 9172 *
bogdanm 82:6473597d706e 9173 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 9174 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 9175 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 9176 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 9177 * access initiates.
bogdanm 82:6473597d706e 9178 *
bogdanm 82:6473597d706e 9179 * Values:
bogdanm 82:6473597d706e 9180 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 9181 * accesses.
bogdanm 82:6473597d706e 9182 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 9183 */
bogdanm 82:6473597d706e 9184 //@{
bogdanm 82:6473597d706e 9185 #define BP_AIPS_PACRK_SP6 (6U) //!< Bit position for AIPS_PACRK_SP6.
bogdanm 82:6473597d706e 9186 #define BM_AIPS_PACRK_SP6 (0x00000040U) //!< Bit mask for AIPS_PACRK_SP6.
bogdanm 82:6473597d706e 9187 #define BS_AIPS_PACRK_SP6 (1U) //!< Bit field size in bits for AIPS_PACRK_SP6.
bogdanm 82:6473597d706e 9188
bogdanm 82:6473597d706e 9189 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9190 //! @brief Read current value of the AIPS_PACRK_SP6 field.
bogdanm 82:6473597d706e 9191 #define BR_AIPS_PACRK_SP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP6))
bogdanm 82:6473597d706e 9192 #endif
bogdanm 82:6473597d706e 9193
bogdanm 82:6473597d706e 9194 //! @brief Format value for bitfield AIPS_PACRK_SP6.
bogdanm 82:6473597d706e 9195 #define BF_AIPS_PACRK_SP6(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRK_SP6), uint32_t) & BM_AIPS_PACRK_SP6)
bogdanm 82:6473597d706e 9196
bogdanm 82:6473597d706e 9197 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9198 //! @brief Set the SP6 field to a new value.
bogdanm 82:6473597d706e 9199 #define BW_AIPS_PACRK_SP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP6) = (v))
bogdanm 82:6473597d706e 9200 #endif
bogdanm 82:6473597d706e 9201 //@}
bogdanm 82:6473597d706e 9202
bogdanm 82:6473597d706e 9203 /*!
bogdanm 82:6473597d706e 9204 * @name Register AIPS_PACRK, field TP5[8] (RW)
bogdanm 82:6473597d706e 9205 *
bogdanm 82:6473597d706e 9206 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 9207 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 9208 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 9209 *
bogdanm 82:6473597d706e 9210 * Values:
bogdanm 82:6473597d706e 9211 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 9212 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 9213 */
bogdanm 82:6473597d706e 9214 //@{
bogdanm 82:6473597d706e 9215 #define BP_AIPS_PACRK_TP5 (8U) //!< Bit position for AIPS_PACRK_TP5.
bogdanm 82:6473597d706e 9216 #define BM_AIPS_PACRK_TP5 (0x00000100U) //!< Bit mask for AIPS_PACRK_TP5.
bogdanm 82:6473597d706e 9217 #define BS_AIPS_PACRK_TP5 (1U) //!< Bit field size in bits for AIPS_PACRK_TP5.
bogdanm 82:6473597d706e 9218
bogdanm 82:6473597d706e 9219 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9220 //! @brief Read current value of the AIPS_PACRK_TP5 field.
bogdanm 82:6473597d706e 9221 #define BR_AIPS_PACRK_TP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP5))
bogdanm 82:6473597d706e 9222 #endif
bogdanm 82:6473597d706e 9223
bogdanm 82:6473597d706e 9224 //! @brief Format value for bitfield AIPS_PACRK_TP5.
bogdanm 82:6473597d706e 9225 #define BF_AIPS_PACRK_TP5(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRK_TP5), uint32_t) & BM_AIPS_PACRK_TP5)
bogdanm 82:6473597d706e 9226
bogdanm 82:6473597d706e 9227 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9228 //! @brief Set the TP5 field to a new value.
bogdanm 82:6473597d706e 9229 #define BW_AIPS_PACRK_TP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP5) = (v))
bogdanm 82:6473597d706e 9230 #endif
bogdanm 82:6473597d706e 9231 //@}
bogdanm 82:6473597d706e 9232
bogdanm 82:6473597d706e 9233 /*!
bogdanm 82:6473597d706e 9234 * @name Register AIPS_PACRK, field WP5[9] (RW)
bogdanm 82:6473597d706e 9235 *
bogdanm 82:6473597d706e 9236 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 9237 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 9238 * and no peripheral access initiates.
bogdanm 82:6473597d706e 9239 *
bogdanm 82:6473597d706e 9240 * Values:
bogdanm 82:6473597d706e 9241 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 9242 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 9243 */
bogdanm 82:6473597d706e 9244 //@{
bogdanm 82:6473597d706e 9245 #define BP_AIPS_PACRK_WP5 (9U) //!< Bit position for AIPS_PACRK_WP5.
bogdanm 82:6473597d706e 9246 #define BM_AIPS_PACRK_WP5 (0x00000200U) //!< Bit mask for AIPS_PACRK_WP5.
bogdanm 82:6473597d706e 9247 #define BS_AIPS_PACRK_WP5 (1U) //!< Bit field size in bits for AIPS_PACRK_WP5.
bogdanm 82:6473597d706e 9248
bogdanm 82:6473597d706e 9249 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9250 //! @brief Read current value of the AIPS_PACRK_WP5 field.
bogdanm 82:6473597d706e 9251 #define BR_AIPS_PACRK_WP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP5))
bogdanm 82:6473597d706e 9252 #endif
bogdanm 82:6473597d706e 9253
bogdanm 82:6473597d706e 9254 //! @brief Format value for bitfield AIPS_PACRK_WP5.
bogdanm 82:6473597d706e 9255 #define BF_AIPS_PACRK_WP5(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRK_WP5), uint32_t) & BM_AIPS_PACRK_WP5)
bogdanm 82:6473597d706e 9256
bogdanm 82:6473597d706e 9257 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9258 //! @brief Set the WP5 field to a new value.
bogdanm 82:6473597d706e 9259 #define BW_AIPS_PACRK_WP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP5) = (v))
bogdanm 82:6473597d706e 9260 #endif
bogdanm 82:6473597d706e 9261 //@}
bogdanm 82:6473597d706e 9262
bogdanm 82:6473597d706e 9263 /*!
bogdanm 82:6473597d706e 9264 * @name Register AIPS_PACRK, field SP5[10] (RW)
bogdanm 82:6473597d706e 9265 *
bogdanm 82:6473597d706e 9266 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 9267 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 9268 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 9269 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 9270 * access initiates.
bogdanm 82:6473597d706e 9271 *
bogdanm 82:6473597d706e 9272 * Values:
bogdanm 82:6473597d706e 9273 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 9274 * accesses.
bogdanm 82:6473597d706e 9275 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 9276 */
bogdanm 82:6473597d706e 9277 //@{
bogdanm 82:6473597d706e 9278 #define BP_AIPS_PACRK_SP5 (10U) //!< Bit position for AIPS_PACRK_SP5.
bogdanm 82:6473597d706e 9279 #define BM_AIPS_PACRK_SP5 (0x00000400U) //!< Bit mask for AIPS_PACRK_SP5.
bogdanm 82:6473597d706e 9280 #define BS_AIPS_PACRK_SP5 (1U) //!< Bit field size in bits for AIPS_PACRK_SP5.
bogdanm 82:6473597d706e 9281
bogdanm 82:6473597d706e 9282 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9283 //! @brief Read current value of the AIPS_PACRK_SP5 field.
bogdanm 82:6473597d706e 9284 #define BR_AIPS_PACRK_SP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP5))
bogdanm 82:6473597d706e 9285 #endif
bogdanm 82:6473597d706e 9286
bogdanm 82:6473597d706e 9287 //! @brief Format value for bitfield AIPS_PACRK_SP5.
bogdanm 82:6473597d706e 9288 #define BF_AIPS_PACRK_SP5(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRK_SP5), uint32_t) & BM_AIPS_PACRK_SP5)
bogdanm 82:6473597d706e 9289
bogdanm 82:6473597d706e 9290 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9291 //! @brief Set the SP5 field to a new value.
bogdanm 82:6473597d706e 9292 #define BW_AIPS_PACRK_SP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP5) = (v))
bogdanm 82:6473597d706e 9293 #endif
bogdanm 82:6473597d706e 9294 //@}
bogdanm 82:6473597d706e 9295
bogdanm 82:6473597d706e 9296 /*!
bogdanm 82:6473597d706e 9297 * @name Register AIPS_PACRK, field TP4[12] (RW)
bogdanm 82:6473597d706e 9298 *
bogdanm 82:6473597d706e 9299 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 9300 * When this bit is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 9301 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 9302 *
bogdanm 82:6473597d706e 9303 * Values:
bogdanm 82:6473597d706e 9304 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 9305 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 9306 */
bogdanm 82:6473597d706e 9307 //@{
bogdanm 82:6473597d706e 9308 #define BP_AIPS_PACRK_TP4 (12U) //!< Bit position for AIPS_PACRK_TP4.
bogdanm 82:6473597d706e 9309 #define BM_AIPS_PACRK_TP4 (0x00001000U) //!< Bit mask for AIPS_PACRK_TP4.
bogdanm 82:6473597d706e 9310 #define BS_AIPS_PACRK_TP4 (1U) //!< Bit field size in bits for AIPS_PACRK_TP4.
bogdanm 82:6473597d706e 9311
bogdanm 82:6473597d706e 9312 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9313 //! @brief Read current value of the AIPS_PACRK_TP4 field.
bogdanm 82:6473597d706e 9314 #define BR_AIPS_PACRK_TP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP4))
bogdanm 82:6473597d706e 9315 #endif
bogdanm 82:6473597d706e 9316
bogdanm 82:6473597d706e 9317 //! @brief Format value for bitfield AIPS_PACRK_TP4.
bogdanm 82:6473597d706e 9318 #define BF_AIPS_PACRK_TP4(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRK_TP4), uint32_t) & BM_AIPS_PACRK_TP4)
bogdanm 82:6473597d706e 9319
bogdanm 82:6473597d706e 9320 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9321 //! @brief Set the TP4 field to a new value.
bogdanm 82:6473597d706e 9322 #define BW_AIPS_PACRK_TP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP4) = (v))
bogdanm 82:6473597d706e 9323 #endif
bogdanm 82:6473597d706e 9324 //@}
bogdanm 82:6473597d706e 9325
bogdanm 82:6473597d706e 9326 /*!
bogdanm 82:6473597d706e 9327 * @name Register AIPS_PACRK, field WP4[13] (RW)
bogdanm 82:6473597d706e 9328 *
bogdanm 82:6473597d706e 9329 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 9330 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 9331 * and no peripheral access initiates.
bogdanm 82:6473597d706e 9332 *
bogdanm 82:6473597d706e 9333 * Values:
bogdanm 82:6473597d706e 9334 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 9335 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 9336 */
bogdanm 82:6473597d706e 9337 //@{
bogdanm 82:6473597d706e 9338 #define BP_AIPS_PACRK_WP4 (13U) //!< Bit position for AIPS_PACRK_WP4.
bogdanm 82:6473597d706e 9339 #define BM_AIPS_PACRK_WP4 (0x00002000U) //!< Bit mask for AIPS_PACRK_WP4.
bogdanm 82:6473597d706e 9340 #define BS_AIPS_PACRK_WP4 (1U) //!< Bit field size in bits for AIPS_PACRK_WP4.
bogdanm 82:6473597d706e 9341
bogdanm 82:6473597d706e 9342 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9343 //! @brief Read current value of the AIPS_PACRK_WP4 field.
bogdanm 82:6473597d706e 9344 #define BR_AIPS_PACRK_WP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP4))
bogdanm 82:6473597d706e 9345 #endif
bogdanm 82:6473597d706e 9346
bogdanm 82:6473597d706e 9347 //! @brief Format value for bitfield AIPS_PACRK_WP4.
bogdanm 82:6473597d706e 9348 #define BF_AIPS_PACRK_WP4(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRK_WP4), uint32_t) & BM_AIPS_PACRK_WP4)
bogdanm 82:6473597d706e 9349
bogdanm 82:6473597d706e 9350 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9351 //! @brief Set the WP4 field to a new value.
bogdanm 82:6473597d706e 9352 #define BW_AIPS_PACRK_WP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP4) = (v))
bogdanm 82:6473597d706e 9353 #endif
bogdanm 82:6473597d706e 9354 //@}
bogdanm 82:6473597d706e 9355
bogdanm 82:6473597d706e 9356 /*!
bogdanm 82:6473597d706e 9357 * @name Register AIPS_PACRK, field SP4[14] (RW)
bogdanm 82:6473597d706e 9358 *
bogdanm 82:6473597d706e 9359 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 9360 * access. When this bit is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 9361 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
bogdanm 82:6473597d706e 9362 * set. If not, access terminates with an error response and no peripheral access
bogdanm 82:6473597d706e 9363 * initiates.
bogdanm 82:6473597d706e 9364 *
bogdanm 82:6473597d706e 9365 * Values:
bogdanm 82:6473597d706e 9366 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 9367 * accesses.
bogdanm 82:6473597d706e 9368 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 9369 */
bogdanm 82:6473597d706e 9370 //@{
bogdanm 82:6473597d706e 9371 #define BP_AIPS_PACRK_SP4 (14U) //!< Bit position for AIPS_PACRK_SP4.
bogdanm 82:6473597d706e 9372 #define BM_AIPS_PACRK_SP4 (0x00004000U) //!< Bit mask for AIPS_PACRK_SP4.
bogdanm 82:6473597d706e 9373 #define BS_AIPS_PACRK_SP4 (1U) //!< Bit field size in bits for AIPS_PACRK_SP4.
bogdanm 82:6473597d706e 9374
bogdanm 82:6473597d706e 9375 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9376 //! @brief Read current value of the AIPS_PACRK_SP4 field.
bogdanm 82:6473597d706e 9377 #define BR_AIPS_PACRK_SP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP4))
bogdanm 82:6473597d706e 9378 #endif
bogdanm 82:6473597d706e 9379
bogdanm 82:6473597d706e 9380 //! @brief Format value for bitfield AIPS_PACRK_SP4.
bogdanm 82:6473597d706e 9381 #define BF_AIPS_PACRK_SP4(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRK_SP4), uint32_t) & BM_AIPS_PACRK_SP4)
bogdanm 82:6473597d706e 9382
bogdanm 82:6473597d706e 9383 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9384 //! @brief Set the SP4 field to a new value.
bogdanm 82:6473597d706e 9385 #define BW_AIPS_PACRK_SP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP4) = (v))
bogdanm 82:6473597d706e 9386 #endif
bogdanm 82:6473597d706e 9387 //@}
bogdanm 82:6473597d706e 9388
bogdanm 82:6473597d706e 9389 /*!
bogdanm 82:6473597d706e 9390 * @name Register AIPS_PACRK, field TP3[16] (RW)
bogdanm 82:6473597d706e 9391 *
bogdanm 82:6473597d706e 9392 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 9393 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 9394 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 9395 *
bogdanm 82:6473597d706e 9396 * Values:
bogdanm 82:6473597d706e 9397 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 9398 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 9399 */
bogdanm 82:6473597d706e 9400 //@{
bogdanm 82:6473597d706e 9401 #define BP_AIPS_PACRK_TP3 (16U) //!< Bit position for AIPS_PACRK_TP3.
bogdanm 82:6473597d706e 9402 #define BM_AIPS_PACRK_TP3 (0x00010000U) //!< Bit mask for AIPS_PACRK_TP3.
bogdanm 82:6473597d706e 9403 #define BS_AIPS_PACRK_TP3 (1U) //!< Bit field size in bits for AIPS_PACRK_TP3.
bogdanm 82:6473597d706e 9404
bogdanm 82:6473597d706e 9405 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9406 //! @brief Read current value of the AIPS_PACRK_TP3 field.
bogdanm 82:6473597d706e 9407 #define BR_AIPS_PACRK_TP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP3))
bogdanm 82:6473597d706e 9408 #endif
bogdanm 82:6473597d706e 9409
bogdanm 82:6473597d706e 9410 //! @brief Format value for bitfield AIPS_PACRK_TP3.
bogdanm 82:6473597d706e 9411 #define BF_AIPS_PACRK_TP3(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRK_TP3), uint32_t) & BM_AIPS_PACRK_TP3)
bogdanm 82:6473597d706e 9412
bogdanm 82:6473597d706e 9413 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9414 //! @brief Set the TP3 field to a new value.
bogdanm 82:6473597d706e 9415 #define BW_AIPS_PACRK_TP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP3) = (v))
bogdanm 82:6473597d706e 9416 #endif
bogdanm 82:6473597d706e 9417 //@}
bogdanm 82:6473597d706e 9418
bogdanm 82:6473597d706e 9419 /*!
bogdanm 82:6473597d706e 9420 * @name Register AIPS_PACRK, field WP3[17] (RW)
bogdanm 82:6473597d706e 9421 *
bogdanm 82:6473597d706e 9422 * Determines whether the peripheral allows write accesss. When this bit is set
bogdanm 82:6473597d706e 9423 * and a write access is attempted, access terminates with an error response and
bogdanm 82:6473597d706e 9424 * no peripheral access initiates.
bogdanm 82:6473597d706e 9425 *
bogdanm 82:6473597d706e 9426 * Values:
bogdanm 82:6473597d706e 9427 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 9428 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 9429 */
bogdanm 82:6473597d706e 9430 //@{
bogdanm 82:6473597d706e 9431 #define BP_AIPS_PACRK_WP3 (17U) //!< Bit position for AIPS_PACRK_WP3.
bogdanm 82:6473597d706e 9432 #define BM_AIPS_PACRK_WP3 (0x00020000U) //!< Bit mask for AIPS_PACRK_WP3.
bogdanm 82:6473597d706e 9433 #define BS_AIPS_PACRK_WP3 (1U) //!< Bit field size in bits for AIPS_PACRK_WP3.
bogdanm 82:6473597d706e 9434
bogdanm 82:6473597d706e 9435 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9436 //! @brief Read current value of the AIPS_PACRK_WP3 field.
bogdanm 82:6473597d706e 9437 #define BR_AIPS_PACRK_WP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP3))
bogdanm 82:6473597d706e 9438 #endif
bogdanm 82:6473597d706e 9439
bogdanm 82:6473597d706e 9440 //! @brief Format value for bitfield AIPS_PACRK_WP3.
bogdanm 82:6473597d706e 9441 #define BF_AIPS_PACRK_WP3(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRK_WP3), uint32_t) & BM_AIPS_PACRK_WP3)
bogdanm 82:6473597d706e 9442
bogdanm 82:6473597d706e 9443 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9444 //! @brief Set the WP3 field to a new value.
bogdanm 82:6473597d706e 9445 #define BW_AIPS_PACRK_WP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP3) = (v))
bogdanm 82:6473597d706e 9446 #endif
bogdanm 82:6473597d706e 9447 //@}
bogdanm 82:6473597d706e 9448
bogdanm 82:6473597d706e 9449 /*!
bogdanm 82:6473597d706e 9450 * @name Register AIPS_PACRK, field SP3[18] (RW)
bogdanm 82:6473597d706e 9451 *
bogdanm 82:6473597d706e 9452 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 9453 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 9454 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 9455 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 9456 * access initiates.
bogdanm 82:6473597d706e 9457 *
bogdanm 82:6473597d706e 9458 * Values:
bogdanm 82:6473597d706e 9459 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 9460 * accesses.
bogdanm 82:6473597d706e 9461 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 9462 */
bogdanm 82:6473597d706e 9463 //@{
bogdanm 82:6473597d706e 9464 #define BP_AIPS_PACRK_SP3 (18U) //!< Bit position for AIPS_PACRK_SP3.
bogdanm 82:6473597d706e 9465 #define BM_AIPS_PACRK_SP3 (0x00040000U) //!< Bit mask for AIPS_PACRK_SP3.
bogdanm 82:6473597d706e 9466 #define BS_AIPS_PACRK_SP3 (1U) //!< Bit field size in bits for AIPS_PACRK_SP3.
bogdanm 82:6473597d706e 9467
bogdanm 82:6473597d706e 9468 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9469 //! @brief Read current value of the AIPS_PACRK_SP3 field.
bogdanm 82:6473597d706e 9470 #define BR_AIPS_PACRK_SP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP3))
bogdanm 82:6473597d706e 9471 #endif
bogdanm 82:6473597d706e 9472
bogdanm 82:6473597d706e 9473 //! @brief Format value for bitfield AIPS_PACRK_SP3.
bogdanm 82:6473597d706e 9474 #define BF_AIPS_PACRK_SP3(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRK_SP3), uint32_t) & BM_AIPS_PACRK_SP3)
bogdanm 82:6473597d706e 9475
bogdanm 82:6473597d706e 9476 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9477 //! @brief Set the SP3 field to a new value.
bogdanm 82:6473597d706e 9478 #define BW_AIPS_PACRK_SP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP3) = (v))
bogdanm 82:6473597d706e 9479 #endif
bogdanm 82:6473597d706e 9480 //@}
bogdanm 82:6473597d706e 9481
bogdanm 82:6473597d706e 9482 /*!
bogdanm 82:6473597d706e 9483 * @name Register AIPS_PACRK, field TP2[20] (RW)
bogdanm 82:6473597d706e 9484 *
bogdanm 82:6473597d706e 9485 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 9486 * When this bit is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 9487 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 9488 *
bogdanm 82:6473597d706e 9489 * Values:
bogdanm 82:6473597d706e 9490 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 9491 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 9492 */
bogdanm 82:6473597d706e 9493 //@{
bogdanm 82:6473597d706e 9494 #define BP_AIPS_PACRK_TP2 (20U) //!< Bit position for AIPS_PACRK_TP2.
bogdanm 82:6473597d706e 9495 #define BM_AIPS_PACRK_TP2 (0x00100000U) //!< Bit mask for AIPS_PACRK_TP2.
bogdanm 82:6473597d706e 9496 #define BS_AIPS_PACRK_TP2 (1U) //!< Bit field size in bits for AIPS_PACRK_TP2.
bogdanm 82:6473597d706e 9497
bogdanm 82:6473597d706e 9498 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9499 //! @brief Read current value of the AIPS_PACRK_TP2 field.
bogdanm 82:6473597d706e 9500 #define BR_AIPS_PACRK_TP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP2))
bogdanm 82:6473597d706e 9501 #endif
bogdanm 82:6473597d706e 9502
bogdanm 82:6473597d706e 9503 //! @brief Format value for bitfield AIPS_PACRK_TP2.
bogdanm 82:6473597d706e 9504 #define BF_AIPS_PACRK_TP2(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRK_TP2), uint32_t) & BM_AIPS_PACRK_TP2)
bogdanm 82:6473597d706e 9505
bogdanm 82:6473597d706e 9506 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9507 //! @brief Set the TP2 field to a new value.
bogdanm 82:6473597d706e 9508 #define BW_AIPS_PACRK_TP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP2) = (v))
bogdanm 82:6473597d706e 9509 #endif
bogdanm 82:6473597d706e 9510 //@}
bogdanm 82:6473597d706e 9511
bogdanm 82:6473597d706e 9512 /*!
bogdanm 82:6473597d706e 9513 * @name Register AIPS_PACRK, field WP2[21] (RW)
bogdanm 82:6473597d706e 9514 *
bogdanm 82:6473597d706e 9515 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 9516 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 9517 * and no peripheral access initiates.
bogdanm 82:6473597d706e 9518 *
bogdanm 82:6473597d706e 9519 * Values:
bogdanm 82:6473597d706e 9520 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 9521 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 9522 */
bogdanm 82:6473597d706e 9523 //@{
bogdanm 82:6473597d706e 9524 #define BP_AIPS_PACRK_WP2 (21U) //!< Bit position for AIPS_PACRK_WP2.
bogdanm 82:6473597d706e 9525 #define BM_AIPS_PACRK_WP2 (0x00200000U) //!< Bit mask for AIPS_PACRK_WP2.
bogdanm 82:6473597d706e 9526 #define BS_AIPS_PACRK_WP2 (1U) //!< Bit field size in bits for AIPS_PACRK_WP2.
bogdanm 82:6473597d706e 9527
bogdanm 82:6473597d706e 9528 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9529 //! @brief Read current value of the AIPS_PACRK_WP2 field.
bogdanm 82:6473597d706e 9530 #define BR_AIPS_PACRK_WP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP2))
bogdanm 82:6473597d706e 9531 #endif
bogdanm 82:6473597d706e 9532
bogdanm 82:6473597d706e 9533 //! @brief Format value for bitfield AIPS_PACRK_WP2.
bogdanm 82:6473597d706e 9534 #define BF_AIPS_PACRK_WP2(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRK_WP2), uint32_t) & BM_AIPS_PACRK_WP2)
bogdanm 82:6473597d706e 9535
bogdanm 82:6473597d706e 9536 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9537 //! @brief Set the WP2 field to a new value.
bogdanm 82:6473597d706e 9538 #define BW_AIPS_PACRK_WP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP2) = (v))
bogdanm 82:6473597d706e 9539 #endif
bogdanm 82:6473597d706e 9540 //@}
bogdanm 82:6473597d706e 9541
bogdanm 82:6473597d706e 9542 /*!
bogdanm 82:6473597d706e 9543 * @name Register AIPS_PACRK, field SP2[22] (RW)
bogdanm 82:6473597d706e 9544 *
bogdanm 82:6473597d706e 9545 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 9546 * access. When this bit is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 9547 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
bogdanm 82:6473597d706e 9548 * set. If not, access terminates with an error response and no peripheral access
bogdanm 82:6473597d706e 9549 * initiates.
bogdanm 82:6473597d706e 9550 *
bogdanm 82:6473597d706e 9551 * Values:
bogdanm 82:6473597d706e 9552 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 9553 * accesses.
bogdanm 82:6473597d706e 9554 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 9555 */
bogdanm 82:6473597d706e 9556 //@{
bogdanm 82:6473597d706e 9557 #define BP_AIPS_PACRK_SP2 (22U) //!< Bit position for AIPS_PACRK_SP2.
bogdanm 82:6473597d706e 9558 #define BM_AIPS_PACRK_SP2 (0x00400000U) //!< Bit mask for AIPS_PACRK_SP2.
bogdanm 82:6473597d706e 9559 #define BS_AIPS_PACRK_SP2 (1U) //!< Bit field size in bits for AIPS_PACRK_SP2.
bogdanm 82:6473597d706e 9560
bogdanm 82:6473597d706e 9561 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9562 //! @brief Read current value of the AIPS_PACRK_SP2 field.
bogdanm 82:6473597d706e 9563 #define BR_AIPS_PACRK_SP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP2))
bogdanm 82:6473597d706e 9564 #endif
bogdanm 82:6473597d706e 9565
bogdanm 82:6473597d706e 9566 //! @brief Format value for bitfield AIPS_PACRK_SP2.
bogdanm 82:6473597d706e 9567 #define BF_AIPS_PACRK_SP2(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRK_SP2), uint32_t) & BM_AIPS_PACRK_SP2)
bogdanm 82:6473597d706e 9568
bogdanm 82:6473597d706e 9569 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9570 //! @brief Set the SP2 field to a new value.
bogdanm 82:6473597d706e 9571 #define BW_AIPS_PACRK_SP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP2) = (v))
bogdanm 82:6473597d706e 9572 #endif
bogdanm 82:6473597d706e 9573 //@}
bogdanm 82:6473597d706e 9574
bogdanm 82:6473597d706e 9575 /*!
bogdanm 82:6473597d706e 9576 * @name Register AIPS_PACRK, field TP1[24] (RW)
bogdanm 82:6473597d706e 9577 *
bogdanm 82:6473597d706e 9578 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 9579 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 9580 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 9581 *
bogdanm 82:6473597d706e 9582 * Values:
bogdanm 82:6473597d706e 9583 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 9584 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 9585 */
bogdanm 82:6473597d706e 9586 //@{
bogdanm 82:6473597d706e 9587 #define BP_AIPS_PACRK_TP1 (24U) //!< Bit position for AIPS_PACRK_TP1.
bogdanm 82:6473597d706e 9588 #define BM_AIPS_PACRK_TP1 (0x01000000U) //!< Bit mask for AIPS_PACRK_TP1.
bogdanm 82:6473597d706e 9589 #define BS_AIPS_PACRK_TP1 (1U) //!< Bit field size in bits for AIPS_PACRK_TP1.
bogdanm 82:6473597d706e 9590
bogdanm 82:6473597d706e 9591 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9592 //! @brief Read current value of the AIPS_PACRK_TP1 field.
bogdanm 82:6473597d706e 9593 #define BR_AIPS_PACRK_TP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP1))
bogdanm 82:6473597d706e 9594 #endif
bogdanm 82:6473597d706e 9595
bogdanm 82:6473597d706e 9596 //! @brief Format value for bitfield AIPS_PACRK_TP1.
bogdanm 82:6473597d706e 9597 #define BF_AIPS_PACRK_TP1(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRK_TP1), uint32_t) & BM_AIPS_PACRK_TP1)
bogdanm 82:6473597d706e 9598
bogdanm 82:6473597d706e 9599 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9600 //! @brief Set the TP1 field to a new value.
bogdanm 82:6473597d706e 9601 #define BW_AIPS_PACRK_TP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP1) = (v))
bogdanm 82:6473597d706e 9602 #endif
bogdanm 82:6473597d706e 9603 //@}
bogdanm 82:6473597d706e 9604
bogdanm 82:6473597d706e 9605 /*!
bogdanm 82:6473597d706e 9606 * @name Register AIPS_PACRK, field WP1[25] (RW)
bogdanm 82:6473597d706e 9607 *
bogdanm 82:6473597d706e 9608 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 9609 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 9610 * and no peripheral access initiates.
bogdanm 82:6473597d706e 9611 *
bogdanm 82:6473597d706e 9612 * Values:
bogdanm 82:6473597d706e 9613 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 9614 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 9615 */
bogdanm 82:6473597d706e 9616 //@{
bogdanm 82:6473597d706e 9617 #define BP_AIPS_PACRK_WP1 (25U) //!< Bit position for AIPS_PACRK_WP1.
bogdanm 82:6473597d706e 9618 #define BM_AIPS_PACRK_WP1 (0x02000000U) //!< Bit mask for AIPS_PACRK_WP1.
bogdanm 82:6473597d706e 9619 #define BS_AIPS_PACRK_WP1 (1U) //!< Bit field size in bits for AIPS_PACRK_WP1.
bogdanm 82:6473597d706e 9620
bogdanm 82:6473597d706e 9621 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9622 //! @brief Read current value of the AIPS_PACRK_WP1 field.
bogdanm 82:6473597d706e 9623 #define BR_AIPS_PACRK_WP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP1))
bogdanm 82:6473597d706e 9624 #endif
bogdanm 82:6473597d706e 9625
bogdanm 82:6473597d706e 9626 //! @brief Format value for bitfield AIPS_PACRK_WP1.
bogdanm 82:6473597d706e 9627 #define BF_AIPS_PACRK_WP1(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRK_WP1), uint32_t) & BM_AIPS_PACRK_WP1)
bogdanm 82:6473597d706e 9628
bogdanm 82:6473597d706e 9629 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9630 //! @brief Set the WP1 field to a new value.
bogdanm 82:6473597d706e 9631 #define BW_AIPS_PACRK_WP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP1) = (v))
bogdanm 82:6473597d706e 9632 #endif
bogdanm 82:6473597d706e 9633 //@}
bogdanm 82:6473597d706e 9634
bogdanm 82:6473597d706e 9635 /*!
bogdanm 82:6473597d706e 9636 * @name Register AIPS_PACRK, field SP1[26] (RW)
bogdanm 82:6473597d706e 9637 *
bogdanm 82:6473597d706e 9638 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 9639 * access. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 9640 * supervisor access attribute, and the MPRx[MPLn] control field for the master must
bogdanm 82:6473597d706e 9641 * be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 9642 * access initiates.
bogdanm 82:6473597d706e 9643 *
bogdanm 82:6473597d706e 9644 * Values:
bogdanm 82:6473597d706e 9645 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 9646 * accesses.
bogdanm 82:6473597d706e 9647 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 9648 */
bogdanm 82:6473597d706e 9649 //@{
bogdanm 82:6473597d706e 9650 #define BP_AIPS_PACRK_SP1 (26U) //!< Bit position for AIPS_PACRK_SP1.
bogdanm 82:6473597d706e 9651 #define BM_AIPS_PACRK_SP1 (0x04000000U) //!< Bit mask for AIPS_PACRK_SP1.
bogdanm 82:6473597d706e 9652 #define BS_AIPS_PACRK_SP1 (1U) //!< Bit field size in bits for AIPS_PACRK_SP1.
bogdanm 82:6473597d706e 9653
bogdanm 82:6473597d706e 9654 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9655 //! @brief Read current value of the AIPS_PACRK_SP1 field.
bogdanm 82:6473597d706e 9656 #define BR_AIPS_PACRK_SP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP1))
bogdanm 82:6473597d706e 9657 #endif
bogdanm 82:6473597d706e 9658
bogdanm 82:6473597d706e 9659 //! @brief Format value for bitfield AIPS_PACRK_SP1.
bogdanm 82:6473597d706e 9660 #define BF_AIPS_PACRK_SP1(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRK_SP1), uint32_t) & BM_AIPS_PACRK_SP1)
bogdanm 82:6473597d706e 9661
bogdanm 82:6473597d706e 9662 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9663 //! @brief Set the SP1 field to a new value.
bogdanm 82:6473597d706e 9664 #define BW_AIPS_PACRK_SP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP1) = (v))
bogdanm 82:6473597d706e 9665 #endif
bogdanm 82:6473597d706e 9666 //@}
bogdanm 82:6473597d706e 9667
bogdanm 82:6473597d706e 9668 /*!
bogdanm 82:6473597d706e 9669 * @name Register AIPS_PACRK, field TP0[28] (RW)
bogdanm 82:6473597d706e 9670 *
bogdanm 82:6473597d706e 9671 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 9672 * When this bit is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 9673 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 9674 *
bogdanm 82:6473597d706e 9675 * Values:
bogdanm 82:6473597d706e 9676 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 9677 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 9678 */
bogdanm 82:6473597d706e 9679 //@{
bogdanm 82:6473597d706e 9680 #define BP_AIPS_PACRK_TP0 (28U) //!< Bit position for AIPS_PACRK_TP0.
bogdanm 82:6473597d706e 9681 #define BM_AIPS_PACRK_TP0 (0x10000000U) //!< Bit mask for AIPS_PACRK_TP0.
bogdanm 82:6473597d706e 9682 #define BS_AIPS_PACRK_TP0 (1U) //!< Bit field size in bits for AIPS_PACRK_TP0.
bogdanm 82:6473597d706e 9683
bogdanm 82:6473597d706e 9684 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9685 //! @brief Read current value of the AIPS_PACRK_TP0 field.
bogdanm 82:6473597d706e 9686 #define BR_AIPS_PACRK_TP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP0))
bogdanm 82:6473597d706e 9687 #endif
bogdanm 82:6473597d706e 9688
bogdanm 82:6473597d706e 9689 //! @brief Format value for bitfield AIPS_PACRK_TP0.
bogdanm 82:6473597d706e 9690 #define BF_AIPS_PACRK_TP0(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRK_TP0), uint32_t) & BM_AIPS_PACRK_TP0)
bogdanm 82:6473597d706e 9691
bogdanm 82:6473597d706e 9692 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9693 //! @brief Set the TP0 field to a new value.
bogdanm 82:6473597d706e 9694 #define BW_AIPS_PACRK_TP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_TP0) = (v))
bogdanm 82:6473597d706e 9695 #endif
bogdanm 82:6473597d706e 9696 //@}
bogdanm 82:6473597d706e 9697
bogdanm 82:6473597d706e 9698 /*!
bogdanm 82:6473597d706e 9699 * @name Register AIPS_PACRK, field WP0[29] (RW)
bogdanm 82:6473597d706e 9700 *
bogdanm 82:6473597d706e 9701 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 9702 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 9703 * and no peripheral access initiates.
bogdanm 82:6473597d706e 9704 *
bogdanm 82:6473597d706e 9705 * Values:
bogdanm 82:6473597d706e 9706 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 9707 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 9708 */
bogdanm 82:6473597d706e 9709 //@{
bogdanm 82:6473597d706e 9710 #define BP_AIPS_PACRK_WP0 (29U) //!< Bit position for AIPS_PACRK_WP0.
bogdanm 82:6473597d706e 9711 #define BM_AIPS_PACRK_WP0 (0x20000000U) //!< Bit mask for AIPS_PACRK_WP0.
bogdanm 82:6473597d706e 9712 #define BS_AIPS_PACRK_WP0 (1U) //!< Bit field size in bits for AIPS_PACRK_WP0.
bogdanm 82:6473597d706e 9713
bogdanm 82:6473597d706e 9714 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9715 //! @brief Read current value of the AIPS_PACRK_WP0 field.
bogdanm 82:6473597d706e 9716 #define BR_AIPS_PACRK_WP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP0))
bogdanm 82:6473597d706e 9717 #endif
bogdanm 82:6473597d706e 9718
bogdanm 82:6473597d706e 9719 //! @brief Format value for bitfield AIPS_PACRK_WP0.
bogdanm 82:6473597d706e 9720 #define BF_AIPS_PACRK_WP0(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRK_WP0), uint32_t) & BM_AIPS_PACRK_WP0)
bogdanm 82:6473597d706e 9721
bogdanm 82:6473597d706e 9722 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9723 //! @brief Set the WP0 field to a new value.
bogdanm 82:6473597d706e 9724 #define BW_AIPS_PACRK_WP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_WP0) = (v))
bogdanm 82:6473597d706e 9725 #endif
bogdanm 82:6473597d706e 9726 //@}
bogdanm 82:6473597d706e 9727
bogdanm 82:6473597d706e 9728 /*!
bogdanm 82:6473597d706e 9729 * @name Register AIPS_PACRK, field SP0[30] (RW)
bogdanm 82:6473597d706e 9730 *
bogdanm 82:6473597d706e 9731 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 9732 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 9733 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 9734 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 9735 * access initiates.
bogdanm 82:6473597d706e 9736 *
bogdanm 82:6473597d706e 9737 * Values:
bogdanm 82:6473597d706e 9738 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 9739 * accesses.
bogdanm 82:6473597d706e 9740 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 9741 */
bogdanm 82:6473597d706e 9742 //@{
bogdanm 82:6473597d706e 9743 #define BP_AIPS_PACRK_SP0 (30U) //!< Bit position for AIPS_PACRK_SP0.
bogdanm 82:6473597d706e 9744 #define BM_AIPS_PACRK_SP0 (0x40000000U) //!< Bit mask for AIPS_PACRK_SP0.
bogdanm 82:6473597d706e 9745 #define BS_AIPS_PACRK_SP0 (1U) //!< Bit field size in bits for AIPS_PACRK_SP0.
bogdanm 82:6473597d706e 9746
bogdanm 82:6473597d706e 9747 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9748 //! @brief Read current value of the AIPS_PACRK_SP0 field.
bogdanm 82:6473597d706e 9749 #define BR_AIPS_PACRK_SP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP0))
bogdanm 82:6473597d706e 9750 #endif
bogdanm 82:6473597d706e 9751
bogdanm 82:6473597d706e 9752 //! @brief Format value for bitfield AIPS_PACRK_SP0.
bogdanm 82:6473597d706e 9753 #define BF_AIPS_PACRK_SP0(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRK_SP0), uint32_t) & BM_AIPS_PACRK_SP0)
bogdanm 82:6473597d706e 9754
bogdanm 82:6473597d706e 9755 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9756 //! @brief Set the SP0 field to a new value.
bogdanm 82:6473597d706e 9757 #define BW_AIPS_PACRK_SP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRK_ADDR(x), BP_AIPS_PACRK_SP0) = (v))
bogdanm 82:6473597d706e 9758 #endif
bogdanm 82:6473597d706e 9759 //@}
bogdanm 82:6473597d706e 9760
bogdanm 82:6473597d706e 9761 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 9762 // HW_AIPS_PACRL - Peripheral Access Control Register
bogdanm 82:6473597d706e 9763 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 9764
bogdanm 82:6473597d706e 9765 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9766 /*!
bogdanm 82:6473597d706e 9767 * @brief HW_AIPS_PACRL - Peripheral Access Control Register (RW)
bogdanm 82:6473597d706e 9768 *
bogdanm 82:6473597d706e 9769 * Reset value: 0x44444444U
bogdanm 82:6473597d706e 9770 *
bogdanm 82:6473597d706e 9771 * This section describes PACR registers E-P, which control peripheral slots
bogdanm 82:6473597d706e 9772 * 32-127. See PACRPeripheral Access Control Register for the description of these
bogdanm 82:6473597d706e 9773 * registers.
bogdanm 82:6473597d706e 9774 */
bogdanm 82:6473597d706e 9775 typedef union _hw_aips_pacrl
bogdanm 82:6473597d706e 9776 {
bogdanm 82:6473597d706e 9777 uint32_t U;
bogdanm 82:6473597d706e 9778 struct _hw_aips_pacrl_bitfields
bogdanm 82:6473597d706e 9779 {
bogdanm 82:6473597d706e 9780 uint32_t TP7 : 1; //!< [0] Trusted Protect
bogdanm 82:6473597d706e 9781 uint32_t WP7 : 1; //!< [1] Write Protect
bogdanm 82:6473597d706e 9782 uint32_t SP7 : 1; //!< [2] Supervisor Protect
bogdanm 82:6473597d706e 9783 uint32_t RESERVED0 : 1; //!< [3]
bogdanm 82:6473597d706e 9784 uint32_t TP6 : 1; //!< [4] Trusted Protect
bogdanm 82:6473597d706e 9785 uint32_t WP6 : 1; //!< [5] Write Protect
bogdanm 82:6473597d706e 9786 uint32_t SP6 : 1; //!< [6] Supervisor Protect
bogdanm 82:6473597d706e 9787 uint32_t RESERVED1 : 1; //!< [7]
bogdanm 82:6473597d706e 9788 uint32_t TP5 : 1; //!< [8] Trusted Protect
bogdanm 82:6473597d706e 9789 uint32_t WP5 : 1; //!< [9] Write Protect
bogdanm 82:6473597d706e 9790 uint32_t SP5 : 1; //!< [10] Supervisor Protect
bogdanm 82:6473597d706e 9791 uint32_t RESERVED2 : 1; //!< [11]
bogdanm 82:6473597d706e 9792 uint32_t TP4 : 1; //!< [12] Trusted Protect
bogdanm 82:6473597d706e 9793 uint32_t WP4 : 1; //!< [13] Write Protect
bogdanm 82:6473597d706e 9794 uint32_t SP4 : 1; //!< [14] Supervisor Protect
bogdanm 82:6473597d706e 9795 uint32_t RESERVED3 : 1; //!< [15]
bogdanm 82:6473597d706e 9796 uint32_t TP3 : 1; //!< [16] Trusted Protect
bogdanm 82:6473597d706e 9797 uint32_t WP3 : 1; //!< [17] Write Protect
bogdanm 82:6473597d706e 9798 uint32_t SP3 : 1; //!< [18] Supervisor Protect
bogdanm 82:6473597d706e 9799 uint32_t RESERVED4 : 1; //!< [19]
bogdanm 82:6473597d706e 9800 uint32_t TP2 : 1; //!< [20] Trusted Protect
bogdanm 82:6473597d706e 9801 uint32_t WP2 : 1; //!< [21] Write Protect
bogdanm 82:6473597d706e 9802 uint32_t SP2 : 1; //!< [22] Supervisor Protect
bogdanm 82:6473597d706e 9803 uint32_t RESERVED5 : 1; //!< [23]
bogdanm 82:6473597d706e 9804 uint32_t TP1 : 1; //!< [24] Trusted Protect
bogdanm 82:6473597d706e 9805 uint32_t WP1 : 1; //!< [25] Write Protect
bogdanm 82:6473597d706e 9806 uint32_t SP1 : 1; //!< [26] Supervisor Protect
bogdanm 82:6473597d706e 9807 uint32_t RESERVED6 : 1; //!< [27]
bogdanm 82:6473597d706e 9808 uint32_t TP0 : 1; //!< [28] Trusted Protect
bogdanm 82:6473597d706e 9809 uint32_t WP0 : 1; //!< [29] Write Protect
bogdanm 82:6473597d706e 9810 uint32_t SP0 : 1; //!< [30] Supervisor Protect
bogdanm 82:6473597d706e 9811 uint32_t RESERVED7 : 1; //!< [31]
bogdanm 82:6473597d706e 9812 } B;
bogdanm 82:6473597d706e 9813 } hw_aips_pacrl_t;
bogdanm 82:6473597d706e 9814 #endif
bogdanm 82:6473597d706e 9815
bogdanm 82:6473597d706e 9816 /*!
bogdanm 82:6473597d706e 9817 * @name Constants and macros for entire AIPS_PACRL register
bogdanm 82:6473597d706e 9818 */
bogdanm 82:6473597d706e 9819 //@{
bogdanm 82:6473597d706e 9820 #define HW_AIPS_PACRL_ADDR(x) (REGS_AIPS_BASE(x) + 0x5CU)
bogdanm 82:6473597d706e 9821
bogdanm 82:6473597d706e 9822 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9823 #define HW_AIPS_PACRL(x) (*(__IO hw_aips_pacrl_t *) HW_AIPS_PACRL_ADDR(x))
bogdanm 82:6473597d706e 9824 #define HW_AIPS_PACRL_RD(x) (HW_AIPS_PACRL(x).U)
bogdanm 82:6473597d706e 9825 #define HW_AIPS_PACRL_WR(x, v) (HW_AIPS_PACRL(x).U = (v))
bogdanm 82:6473597d706e 9826 #define HW_AIPS_PACRL_SET(x, v) (HW_AIPS_PACRL_WR(x, HW_AIPS_PACRL_RD(x) | (v)))
bogdanm 82:6473597d706e 9827 #define HW_AIPS_PACRL_CLR(x, v) (HW_AIPS_PACRL_WR(x, HW_AIPS_PACRL_RD(x) & ~(v)))
bogdanm 82:6473597d706e 9828 #define HW_AIPS_PACRL_TOG(x, v) (HW_AIPS_PACRL_WR(x, HW_AIPS_PACRL_RD(x) ^ (v)))
bogdanm 82:6473597d706e 9829 #endif
bogdanm 82:6473597d706e 9830 //@}
bogdanm 82:6473597d706e 9831
bogdanm 82:6473597d706e 9832 /*
bogdanm 82:6473597d706e 9833 * Constants & macros for individual AIPS_PACRL bitfields
bogdanm 82:6473597d706e 9834 */
bogdanm 82:6473597d706e 9835
bogdanm 82:6473597d706e 9836 /*!
bogdanm 82:6473597d706e 9837 * @name Register AIPS_PACRL, field TP7[0] (RW)
bogdanm 82:6473597d706e 9838 *
bogdanm 82:6473597d706e 9839 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 9840 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 9841 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 9842 *
bogdanm 82:6473597d706e 9843 * Values:
bogdanm 82:6473597d706e 9844 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 9845 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 9846 */
bogdanm 82:6473597d706e 9847 //@{
bogdanm 82:6473597d706e 9848 #define BP_AIPS_PACRL_TP7 (0U) //!< Bit position for AIPS_PACRL_TP7.
bogdanm 82:6473597d706e 9849 #define BM_AIPS_PACRL_TP7 (0x00000001U) //!< Bit mask for AIPS_PACRL_TP7.
bogdanm 82:6473597d706e 9850 #define BS_AIPS_PACRL_TP7 (1U) //!< Bit field size in bits for AIPS_PACRL_TP7.
bogdanm 82:6473597d706e 9851
bogdanm 82:6473597d706e 9852 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9853 //! @brief Read current value of the AIPS_PACRL_TP7 field.
bogdanm 82:6473597d706e 9854 #define BR_AIPS_PACRL_TP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP7))
bogdanm 82:6473597d706e 9855 #endif
bogdanm 82:6473597d706e 9856
bogdanm 82:6473597d706e 9857 //! @brief Format value for bitfield AIPS_PACRL_TP7.
bogdanm 82:6473597d706e 9858 #define BF_AIPS_PACRL_TP7(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRL_TP7), uint32_t) & BM_AIPS_PACRL_TP7)
bogdanm 82:6473597d706e 9859
bogdanm 82:6473597d706e 9860 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9861 //! @brief Set the TP7 field to a new value.
bogdanm 82:6473597d706e 9862 #define BW_AIPS_PACRL_TP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP7) = (v))
bogdanm 82:6473597d706e 9863 #endif
bogdanm 82:6473597d706e 9864 //@}
bogdanm 82:6473597d706e 9865
bogdanm 82:6473597d706e 9866 /*!
bogdanm 82:6473597d706e 9867 * @name Register AIPS_PACRL, field WP7[1] (RW)
bogdanm 82:6473597d706e 9868 *
bogdanm 82:6473597d706e 9869 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 9870 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 9871 * and no peripheral access initiates.
bogdanm 82:6473597d706e 9872 *
bogdanm 82:6473597d706e 9873 * Values:
bogdanm 82:6473597d706e 9874 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 9875 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 9876 */
bogdanm 82:6473597d706e 9877 //@{
bogdanm 82:6473597d706e 9878 #define BP_AIPS_PACRL_WP7 (1U) //!< Bit position for AIPS_PACRL_WP7.
bogdanm 82:6473597d706e 9879 #define BM_AIPS_PACRL_WP7 (0x00000002U) //!< Bit mask for AIPS_PACRL_WP7.
bogdanm 82:6473597d706e 9880 #define BS_AIPS_PACRL_WP7 (1U) //!< Bit field size in bits for AIPS_PACRL_WP7.
bogdanm 82:6473597d706e 9881
bogdanm 82:6473597d706e 9882 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9883 //! @brief Read current value of the AIPS_PACRL_WP7 field.
bogdanm 82:6473597d706e 9884 #define BR_AIPS_PACRL_WP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP7))
bogdanm 82:6473597d706e 9885 #endif
bogdanm 82:6473597d706e 9886
bogdanm 82:6473597d706e 9887 //! @brief Format value for bitfield AIPS_PACRL_WP7.
bogdanm 82:6473597d706e 9888 #define BF_AIPS_PACRL_WP7(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRL_WP7), uint32_t) & BM_AIPS_PACRL_WP7)
bogdanm 82:6473597d706e 9889
bogdanm 82:6473597d706e 9890 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9891 //! @brief Set the WP7 field to a new value.
bogdanm 82:6473597d706e 9892 #define BW_AIPS_PACRL_WP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP7) = (v))
bogdanm 82:6473597d706e 9893 #endif
bogdanm 82:6473597d706e 9894 //@}
bogdanm 82:6473597d706e 9895
bogdanm 82:6473597d706e 9896 /*!
bogdanm 82:6473597d706e 9897 * @name Register AIPS_PACRL, field SP7[2] (RW)
bogdanm 82:6473597d706e 9898 *
bogdanm 82:6473597d706e 9899 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 9900 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 9901 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 9902 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 9903 * access initiates.
bogdanm 82:6473597d706e 9904 *
bogdanm 82:6473597d706e 9905 * Values:
bogdanm 82:6473597d706e 9906 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 9907 * accesses.
bogdanm 82:6473597d706e 9908 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 9909 */
bogdanm 82:6473597d706e 9910 //@{
bogdanm 82:6473597d706e 9911 #define BP_AIPS_PACRL_SP7 (2U) //!< Bit position for AIPS_PACRL_SP7.
bogdanm 82:6473597d706e 9912 #define BM_AIPS_PACRL_SP7 (0x00000004U) //!< Bit mask for AIPS_PACRL_SP7.
bogdanm 82:6473597d706e 9913 #define BS_AIPS_PACRL_SP7 (1U) //!< Bit field size in bits for AIPS_PACRL_SP7.
bogdanm 82:6473597d706e 9914
bogdanm 82:6473597d706e 9915 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9916 //! @brief Read current value of the AIPS_PACRL_SP7 field.
bogdanm 82:6473597d706e 9917 #define BR_AIPS_PACRL_SP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP7))
bogdanm 82:6473597d706e 9918 #endif
bogdanm 82:6473597d706e 9919
bogdanm 82:6473597d706e 9920 //! @brief Format value for bitfield AIPS_PACRL_SP7.
bogdanm 82:6473597d706e 9921 #define BF_AIPS_PACRL_SP7(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRL_SP7), uint32_t) & BM_AIPS_PACRL_SP7)
bogdanm 82:6473597d706e 9922
bogdanm 82:6473597d706e 9923 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9924 //! @brief Set the SP7 field to a new value.
bogdanm 82:6473597d706e 9925 #define BW_AIPS_PACRL_SP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP7) = (v))
bogdanm 82:6473597d706e 9926 #endif
bogdanm 82:6473597d706e 9927 //@}
bogdanm 82:6473597d706e 9928
bogdanm 82:6473597d706e 9929 /*!
bogdanm 82:6473597d706e 9930 * @name Register AIPS_PACRL, field TP6[4] (RW)
bogdanm 82:6473597d706e 9931 *
bogdanm 82:6473597d706e 9932 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 9933 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 9934 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 9935 *
bogdanm 82:6473597d706e 9936 * Values:
bogdanm 82:6473597d706e 9937 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 9938 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 9939 */
bogdanm 82:6473597d706e 9940 //@{
bogdanm 82:6473597d706e 9941 #define BP_AIPS_PACRL_TP6 (4U) //!< Bit position for AIPS_PACRL_TP6.
bogdanm 82:6473597d706e 9942 #define BM_AIPS_PACRL_TP6 (0x00000010U) //!< Bit mask for AIPS_PACRL_TP6.
bogdanm 82:6473597d706e 9943 #define BS_AIPS_PACRL_TP6 (1U) //!< Bit field size in bits for AIPS_PACRL_TP6.
bogdanm 82:6473597d706e 9944
bogdanm 82:6473597d706e 9945 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9946 //! @brief Read current value of the AIPS_PACRL_TP6 field.
bogdanm 82:6473597d706e 9947 #define BR_AIPS_PACRL_TP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP6))
bogdanm 82:6473597d706e 9948 #endif
bogdanm 82:6473597d706e 9949
bogdanm 82:6473597d706e 9950 //! @brief Format value for bitfield AIPS_PACRL_TP6.
bogdanm 82:6473597d706e 9951 #define BF_AIPS_PACRL_TP6(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRL_TP6), uint32_t) & BM_AIPS_PACRL_TP6)
bogdanm 82:6473597d706e 9952
bogdanm 82:6473597d706e 9953 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9954 //! @brief Set the TP6 field to a new value.
bogdanm 82:6473597d706e 9955 #define BW_AIPS_PACRL_TP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP6) = (v))
bogdanm 82:6473597d706e 9956 #endif
bogdanm 82:6473597d706e 9957 //@}
bogdanm 82:6473597d706e 9958
bogdanm 82:6473597d706e 9959 /*!
bogdanm 82:6473597d706e 9960 * @name Register AIPS_PACRL, field WP6[5] (RW)
bogdanm 82:6473597d706e 9961 *
bogdanm 82:6473597d706e 9962 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 9963 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 9964 * and no peripheral access initiates.
bogdanm 82:6473597d706e 9965 *
bogdanm 82:6473597d706e 9966 * Values:
bogdanm 82:6473597d706e 9967 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 9968 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 9969 */
bogdanm 82:6473597d706e 9970 //@{
bogdanm 82:6473597d706e 9971 #define BP_AIPS_PACRL_WP6 (5U) //!< Bit position for AIPS_PACRL_WP6.
bogdanm 82:6473597d706e 9972 #define BM_AIPS_PACRL_WP6 (0x00000020U) //!< Bit mask for AIPS_PACRL_WP6.
bogdanm 82:6473597d706e 9973 #define BS_AIPS_PACRL_WP6 (1U) //!< Bit field size in bits for AIPS_PACRL_WP6.
bogdanm 82:6473597d706e 9974
bogdanm 82:6473597d706e 9975 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9976 //! @brief Read current value of the AIPS_PACRL_WP6 field.
bogdanm 82:6473597d706e 9977 #define BR_AIPS_PACRL_WP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP6))
bogdanm 82:6473597d706e 9978 #endif
bogdanm 82:6473597d706e 9979
bogdanm 82:6473597d706e 9980 //! @brief Format value for bitfield AIPS_PACRL_WP6.
bogdanm 82:6473597d706e 9981 #define BF_AIPS_PACRL_WP6(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRL_WP6), uint32_t) & BM_AIPS_PACRL_WP6)
bogdanm 82:6473597d706e 9982
bogdanm 82:6473597d706e 9983 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 9984 //! @brief Set the WP6 field to a new value.
bogdanm 82:6473597d706e 9985 #define BW_AIPS_PACRL_WP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP6) = (v))
bogdanm 82:6473597d706e 9986 #endif
bogdanm 82:6473597d706e 9987 //@}
bogdanm 82:6473597d706e 9988
bogdanm 82:6473597d706e 9989 /*!
bogdanm 82:6473597d706e 9990 * @name Register AIPS_PACRL, field SP6[6] (RW)
bogdanm 82:6473597d706e 9991 *
bogdanm 82:6473597d706e 9992 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 9993 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 9994 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 9995 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 9996 * access initiates.
bogdanm 82:6473597d706e 9997 *
bogdanm 82:6473597d706e 9998 * Values:
bogdanm 82:6473597d706e 9999 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 10000 * accesses.
bogdanm 82:6473597d706e 10001 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 10002 */
bogdanm 82:6473597d706e 10003 //@{
bogdanm 82:6473597d706e 10004 #define BP_AIPS_PACRL_SP6 (6U) //!< Bit position for AIPS_PACRL_SP6.
bogdanm 82:6473597d706e 10005 #define BM_AIPS_PACRL_SP6 (0x00000040U) //!< Bit mask for AIPS_PACRL_SP6.
bogdanm 82:6473597d706e 10006 #define BS_AIPS_PACRL_SP6 (1U) //!< Bit field size in bits for AIPS_PACRL_SP6.
bogdanm 82:6473597d706e 10007
bogdanm 82:6473597d706e 10008 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10009 //! @brief Read current value of the AIPS_PACRL_SP6 field.
bogdanm 82:6473597d706e 10010 #define BR_AIPS_PACRL_SP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP6))
bogdanm 82:6473597d706e 10011 #endif
bogdanm 82:6473597d706e 10012
bogdanm 82:6473597d706e 10013 //! @brief Format value for bitfield AIPS_PACRL_SP6.
bogdanm 82:6473597d706e 10014 #define BF_AIPS_PACRL_SP6(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRL_SP6), uint32_t) & BM_AIPS_PACRL_SP6)
bogdanm 82:6473597d706e 10015
bogdanm 82:6473597d706e 10016 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10017 //! @brief Set the SP6 field to a new value.
bogdanm 82:6473597d706e 10018 #define BW_AIPS_PACRL_SP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP6) = (v))
bogdanm 82:6473597d706e 10019 #endif
bogdanm 82:6473597d706e 10020 //@}
bogdanm 82:6473597d706e 10021
bogdanm 82:6473597d706e 10022 /*!
bogdanm 82:6473597d706e 10023 * @name Register AIPS_PACRL, field TP5[8] (RW)
bogdanm 82:6473597d706e 10024 *
bogdanm 82:6473597d706e 10025 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 10026 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 10027 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 10028 *
bogdanm 82:6473597d706e 10029 * Values:
bogdanm 82:6473597d706e 10030 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 10031 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 10032 */
bogdanm 82:6473597d706e 10033 //@{
bogdanm 82:6473597d706e 10034 #define BP_AIPS_PACRL_TP5 (8U) //!< Bit position for AIPS_PACRL_TP5.
bogdanm 82:6473597d706e 10035 #define BM_AIPS_PACRL_TP5 (0x00000100U) //!< Bit mask for AIPS_PACRL_TP5.
bogdanm 82:6473597d706e 10036 #define BS_AIPS_PACRL_TP5 (1U) //!< Bit field size in bits for AIPS_PACRL_TP5.
bogdanm 82:6473597d706e 10037
bogdanm 82:6473597d706e 10038 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10039 //! @brief Read current value of the AIPS_PACRL_TP5 field.
bogdanm 82:6473597d706e 10040 #define BR_AIPS_PACRL_TP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP5))
bogdanm 82:6473597d706e 10041 #endif
bogdanm 82:6473597d706e 10042
bogdanm 82:6473597d706e 10043 //! @brief Format value for bitfield AIPS_PACRL_TP5.
bogdanm 82:6473597d706e 10044 #define BF_AIPS_PACRL_TP5(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRL_TP5), uint32_t) & BM_AIPS_PACRL_TP5)
bogdanm 82:6473597d706e 10045
bogdanm 82:6473597d706e 10046 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10047 //! @brief Set the TP5 field to a new value.
bogdanm 82:6473597d706e 10048 #define BW_AIPS_PACRL_TP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP5) = (v))
bogdanm 82:6473597d706e 10049 #endif
bogdanm 82:6473597d706e 10050 //@}
bogdanm 82:6473597d706e 10051
bogdanm 82:6473597d706e 10052 /*!
bogdanm 82:6473597d706e 10053 * @name Register AIPS_PACRL, field WP5[9] (RW)
bogdanm 82:6473597d706e 10054 *
bogdanm 82:6473597d706e 10055 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 10056 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 10057 * and no peripheral access initiates.
bogdanm 82:6473597d706e 10058 *
bogdanm 82:6473597d706e 10059 * Values:
bogdanm 82:6473597d706e 10060 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 10061 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 10062 */
bogdanm 82:6473597d706e 10063 //@{
bogdanm 82:6473597d706e 10064 #define BP_AIPS_PACRL_WP5 (9U) //!< Bit position for AIPS_PACRL_WP5.
bogdanm 82:6473597d706e 10065 #define BM_AIPS_PACRL_WP5 (0x00000200U) //!< Bit mask for AIPS_PACRL_WP5.
bogdanm 82:6473597d706e 10066 #define BS_AIPS_PACRL_WP5 (1U) //!< Bit field size in bits for AIPS_PACRL_WP5.
bogdanm 82:6473597d706e 10067
bogdanm 82:6473597d706e 10068 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10069 //! @brief Read current value of the AIPS_PACRL_WP5 field.
bogdanm 82:6473597d706e 10070 #define BR_AIPS_PACRL_WP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP5))
bogdanm 82:6473597d706e 10071 #endif
bogdanm 82:6473597d706e 10072
bogdanm 82:6473597d706e 10073 //! @brief Format value for bitfield AIPS_PACRL_WP5.
bogdanm 82:6473597d706e 10074 #define BF_AIPS_PACRL_WP5(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRL_WP5), uint32_t) & BM_AIPS_PACRL_WP5)
bogdanm 82:6473597d706e 10075
bogdanm 82:6473597d706e 10076 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10077 //! @brief Set the WP5 field to a new value.
bogdanm 82:6473597d706e 10078 #define BW_AIPS_PACRL_WP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP5) = (v))
bogdanm 82:6473597d706e 10079 #endif
bogdanm 82:6473597d706e 10080 //@}
bogdanm 82:6473597d706e 10081
bogdanm 82:6473597d706e 10082 /*!
bogdanm 82:6473597d706e 10083 * @name Register AIPS_PACRL, field SP5[10] (RW)
bogdanm 82:6473597d706e 10084 *
bogdanm 82:6473597d706e 10085 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 10086 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 10087 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 10088 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 10089 * access initiates.
bogdanm 82:6473597d706e 10090 *
bogdanm 82:6473597d706e 10091 * Values:
bogdanm 82:6473597d706e 10092 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 10093 * accesses.
bogdanm 82:6473597d706e 10094 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 10095 */
bogdanm 82:6473597d706e 10096 //@{
bogdanm 82:6473597d706e 10097 #define BP_AIPS_PACRL_SP5 (10U) //!< Bit position for AIPS_PACRL_SP5.
bogdanm 82:6473597d706e 10098 #define BM_AIPS_PACRL_SP5 (0x00000400U) //!< Bit mask for AIPS_PACRL_SP5.
bogdanm 82:6473597d706e 10099 #define BS_AIPS_PACRL_SP5 (1U) //!< Bit field size in bits for AIPS_PACRL_SP5.
bogdanm 82:6473597d706e 10100
bogdanm 82:6473597d706e 10101 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10102 //! @brief Read current value of the AIPS_PACRL_SP5 field.
bogdanm 82:6473597d706e 10103 #define BR_AIPS_PACRL_SP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP5))
bogdanm 82:6473597d706e 10104 #endif
bogdanm 82:6473597d706e 10105
bogdanm 82:6473597d706e 10106 //! @brief Format value for bitfield AIPS_PACRL_SP5.
bogdanm 82:6473597d706e 10107 #define BF_AIPS_PACRL_SP5(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRL_SP5), uint32_t) & BM_AIPS_PACRL_SP5)
bogdanm 82:6473597d706e 10108
bogdanm 82:6473597d706e 10109 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10110 //! @brief Set the SP5 field to a new value.
bogdanm 82:6473597d706e 10111 #define BW_AIPS_PACRL_SP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP5) = (v))
bogdanm 82:6473597d706e 10112 #endif
bogdanm 82:6473597d706e 10113 //@}
bogdanm 82:6473597d706e 10114
bogdanm 82:6473597d706e 10115 /*!
bogdanm 82:6473597d706e 10116 * @name Register AIPS_PACRL, field TP4[12] (RW)
bogdanm 82:6473597d706e 10117 *
bogdanm 82:6473597d706e 10118 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 10119 * When this bit is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 10120 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 10121 *
bogdanm 82:6473597d706e 10122 * Values:
bogdanm 82:6473597d706e 10123 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 10124 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 10125 */
bogdanm 82:6473597d706e 10126 //@{
bogdanm 82:6473597d706e 10127 #define BP_AIPS_PACRL_TP4 (12U) //!< Bit position for AIPS_PACRL_TP4.
bogdanm 82:6473597d706e 10128 #define BM_AIPS_PACRL_TP4 (0x00001000U) //!< Bit mask for AIPS_PACRL_TP4.
bogdanm 82:6473597d706e 10129 #define BS_AIPS_PACRL_TP4 (1U) //!< Bit field size in bits for AIPS_PACRL_TP4.
bogdanm 82:6473597d706e 10130
bogdanm 82:6473597d706e 10131 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10132 //! @brief Read current value of the AIPS_PACRL_TP4 field.
bogdanm 82:6473597d706e 10133 #define BR_AIPS_PACRL_TP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP4))
bogdanm 82:6473597d706e 10134 #endif
bogdanm 82:6473597d706e 10135
bogdanm 82:6473597d706e 10136 //! @brief Format value for bitfield AIPS_PACRL_TP4.
bogdanm 82:6473597d706e 10137 #define BF_AIPS_PACRL_TP4(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRL_TP4), uint32_t) & BM_AIPS_PACRL_TP4)
bogdanm 82:6473597d706e 10138
bogdanm 82:6473597d706e 10139 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10140 //! @brief Set the TP4 field to a new value.
bogdanm 82:6473597d706e 10141 #define BW_AIPS_PACRL_TP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP4) = (v))
bogdanm 82:6473597d706e 10142 #endif
bogdanm 82:6473597d706e 10143 //@}
bogdanm 82:6473597d706e 10144
bogdanm 82:6473597d706e 10145 /*!
bogdanm 82:6473597d706e 10146 * @name Register AIPS_PACRL, field WP4[13] (RW)
bogdanm 82:6473597d706e 10147 *
bogdanm 82:6473597d706e 10148 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 10149 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 10150 * and no peripheral access initiates.
bogdanm 82:6473597d706e 10151 *
bogdanm 82:6473597d706e 10152 * Values:
bogdanm 82:6473597d706e 10153 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 10154 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 10155 */
bogdanm 82:6473597d706e 10156 //@{
bogdanm 82:6473597d706e 10157 #define BP_AIPS_PACRL_WP4 (13U) //!< Bit position for AIPS_PACRL_WP4.
bogdanm 82:6473597d706e 10158 #define BM_AIPS_PACRL_WP4 (0x00002000U) //!< Bit mask for AIPS_PACRL_WP4.
bogdanm 82:6473597d706e 10159 #define BS_AIPS_PACRL_WP4 (1U) //!< Bit field size in bits for AIPS_PACRL_WP4.
bogdanm 82:6473597d706e 10160
bogdanm 82:6473597d706e 10161 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10162 //! @brief Read current value of the AIPS_PACRL_WP4 field.
bogdanm 82:6473597d706e 10163 #define BR_AIPS_PACRL_WP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP4))
bogdanm 82:6473597d706e 10164 #endif
bogdanm 82:6473597d706e 10165
bogdanm 82:6473597d706e 10166 //! @brief Format value for bitfield AIPS_PACRL_WP4.
bogdanm 82:6473597d706e 10167 #define BF_AIPS_PACRL_WP4(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRL_WP4), uint32_t) & BM_AIPS_PACRL_WP4)
bogdanm 82:6473597d706e 10168
bogdanm 82:6473597d706e 10169 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10170 //! @brief Set the WP4 field to a new value.
bogdanm 82:6473597d706e 10171 #define BW_AIPS_PACRL_WP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP4) = (v))
bogdanm 82:6473597d706e 10172 #endif
bogdanm 82:6473597d706e 10173 //@}
bogdanm 82:6473597d706e 10174
bogdanm 82:6473597d706e 10175 /*!
bogdanm 82:6473597d706e 10176 * @name Register AIPS_PACRL, field SP4[14] (RW)
bogdanm 82:6473597d706e 10177 *
bogdanm 82:6473597d706e 10178 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 10179 * access. When this bit is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 10180 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
bogdanm 82:6473597d706e 10181 * set. If not, access terminates with an error response and no peripheral access
bogdanm 82:6473597d706e 10182 * initiates.
bogdanm 82:6473597d706e 10183 *
bogdanm 82:6473597d706e 10184 * Values:
bogdanm 82:6473597d706e 10185 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 10186 * accesses.
bogdanm 82:6473597d706e 10187 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 10188 */
bogdanm 82:6473597d706e 10189 //@{
bogdanm 82:6473597d706e 10190 #define BP_AIPS_PACRL_SP4 (14U) //!< Bit position for AIPS_PACRL_SP4.
bogdanm 82:6473597d706e 10191 #define BM_AIPS_PACRL_SP4 (0x00004000U) //!< Bit mask for AIPS_PACRL_SP4.
bogdanm 82:6473597d706e 10192 #define BS_AIPS_PACRL_SP4 (1U) //!< Bit field size in bits for AIPS_PACRL_SP4.
bogdanm 82:6473597d706e 10193
bogdanm 82:6473597d706e 10194 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10195 //! @brief Read current value of the AIPS_PACRL_SP4 field.
bogdanm 82:6473597d706e 10196 #define BR_AIPS_PACRL_SP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP4))
bogdanm 82:6473597d706e 10197 #endif
bogdanm 82:6473597d706e 10198
bogdanm 82:6473597d706e 10199 //! @brief Format value for bitfield AIPS_PACRL_SP4.
bogdanm 82:6473597d706e 10200 #define BF_AIPS_PACRL_SP4(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRL_SP4), uint32_t) & BM_AIPS_PACRL_SP4)
bogdanm 82:6473597d706e 10201
bogdanm 82:6473597d706e 10202 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10203 //! @brief Set the SP4 field to a new value.
bogdanm 82:6473597d706e 10204 #define BW_AIPS_PACRL_SP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP4) = (v))
bogdanm 82:6473597d706e 10205 #endif
bogdanm 82:6473597d706e 10206 //@}
bogdanm 82:6473597d706e 10207
bogdanm 82:6473597d706e 10208 /*!
bogdanm 82:6473597d706e 10209 * @name Register AIPS_PACRL, field TP3[16] (RW)
bogdanm 82:6473597d706e 10210 *
bogdanm 82:6473597d706e 10211 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 10212 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 10213 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 10214 *
bogdanm 82:6473597d706e 10215 * Values:
bogdanm 82:6473597d706e 10216 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 10217 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 10218 */
bogdanm 82:6473597d706e 10219 //@{
bogdanm 82:6473597d706e 10220 #define BP_AIPS_PACRL_TP3 (16U) //!< Bit position for AIPS_PACRL_TP3.
bogdanm 82:6473597d706e 10221 #define BM_AIPS_PACRL_TP3 (0x00010000U) //!< Bit mask for AIPS_PACRL_TP3.
bogdanm 82:6473597d706e 10222 #define BS_AIPS_PACRL_TP3 (1U) //!< Bit field size in bits for AIPS_PACRL_TP3.
bogdanm 82:6473597d706e 10223
bogdanm 82:6473597d706e 10224 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10225 //! @brief Read current value of the AIPS_PACRL_TP3 field.
bogdanm 82:6473597d706e 10226 #define BR_AIPS_PACRL_TP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP3))
bogdanm 82:6473597d706e 10227 #endif
bogdanm 82:6473597d706e 10228
bogdanm 82:6473597d706e 10229 //! @brief Format value for bitfield AIPS_PACRL_TP3.
bogdanm 82:6473597d706e 10230 #define BF_AIPS_PACRL_TP3(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRL_TP3), uint32_t) & BM_AIPS_PACRL_TP3)
bogdanm 82:6473597d706e 10231
bogdanm 82:6473597d706e 10232 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10233 //! @brief Set the TP3 field to a new value.
bogdanm 82:6473597d706e 10234 #define BW_AIPS_PACRL_TP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP3) = (v))
bogdanm 82:6473597d706e 10235 #endif
bogdanm 82:6473597d706e 10236 //@}
bogdanm 82:6473597d706e 10237
bogdanm 82:6473597d706e 10238 /*!
bogdanm 82:6473597d706e 10239 * @name Register AIPS_PACRL, field WP3[17] (RW)
bogdanm 82:6473597d706e 10240 *
bogdanm 82:6473597d706e 10241 * Determines whether the peripheral allows write accesss. When this bit is set
bogdanm 82:6473597d706e 10242 * and a write access is attempted, access terminates with an error response and
bogdanm 82:6473597d706e 10243 * no peripheral access initiates.
bogdanm 82:6473597d706e 10244 *
bogdanm 82:6473597d706e 10245 * Values:
bogdanm 82:6473597d706e 10246 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 10247 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 10248 */
bogdanm 82:6473597d706e 10249 //@{
bogdanm 82:6473597d706e 10250 #define BP_AIPS_PACRL_WP3 (17U) //!< Bit position for AIPS_PACRL_WP3.
bogdanm 82:6473597d706e 10251 #define BM_AIPS_PACRL_WP3 (0x00020000U) //!< Bit mask for AIPS_PACRL_WP3.
bogdanm 82:6473597d706e 10252 #define BS_AIPS_PACRL_WP3 (1U) //!< Bit field size in bits for AIPS_PACRL_WP3.
bogdanm 82:6473597d706e 10253
bogdanm 82:6473597d706e 10254 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10255 //! @brief Read current value of the AIPS_PACRL_WP3 field.
bogdanm 82:6473597d706e 10256 #define BR_AIPS_PACRL_WP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP3))
bogdanm 82:6473597d706e 10257 #endif
bogdanm 82:6473597d706e 10258
bogdanm 82:6473597d706e 10259 //! @brief Format value for bitfield AIPS_PACRL_WP3.
bogdanm 82:6473597d706e 10260 #define BF_AIPS_PACRL_WP3(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRL_WP3), uint32_t) & BM_AIPS_PACRL_WP3)
bogdanm 82:6473597d706e 10261
bogdanm 82:6473597d706e 10262 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10263 //! @brief Set the WP3 field to a new value.
bogdanm 82:6473597d706e 10264 #define BW_AIPS_PACRL_WP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP3) = (v))
bogdanm 82:6473597d706e 10265 #endif
bogdanm 82:6473597d706e 10266 //@}
bogdanm 82:6473597d706e 10267
bogdanm 82:6473597d706e 10268 /*!
bogdanm 82:6473597d706e 10269 * @name Register AIPS_PACRL, field SP3[18] (RW)
bogdanm 82:6473597d706e 10270 *
bogdanm 82:6473597d706e 10271 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 10272 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 10273 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 10274 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 10275 * access initiates.
bogdanm 82:6473597d706e 10276 *
bogdanm 82:6473597d706e 10277 * Values:
bogdanm 82:6473597d706e 10278 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 10279 * accesses.
bogdanm 82:6473597d706e 10280 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 10281 */
bogdanm 82:6473597d706e 10282 //@{
bogdanm 82:6473597d706e 10283 #define BP_AIPS_PACRL_SP3 (18U) //!< Bit position for AIPS_PACRL_SP3.
bogdanm 82:6473597d706e 10284 #define BM_AIPS_PACRL_SP3 (0x00040000U) //!< Bit mask for AIPS_PACRL_SP3.
bogdanm 82:6473597d706e 10285 #define BS_AIPS_PACRL_SP3 (1U) //!< Bit field size in bits for AIPS_PACRL_SP3.
bogdanm 82:6473597d706e 10286
bogdanm 82:6473597d706e 10287 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10288 //! @brief Read current value of the AIPS_PACRL_SP3 field.
bogdanm 82:6473597d706e 10289 #define BR_AIPS_PACRL_SP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP3))
bogdanm 82:6473597d706e 10290 #endif
bogdanm 82:6473597d706e 10291
bogdanm 82:6473597d706e 10292 //! @brief Format value for bitfield AIPS_PACRL_SP3.
bogdanm 82:6473597d706e 10293 #define BF_AIPS_PACRL_SP3(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRL_SP3), uint32_t) & BM_AIPS_PACRL_SP3)
bogdanm 82:6473597d706e 10294
bogdanm 82:6473597d706e 10295 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10296 //! @brief Set the SP3 field to a new value.
bogdanm 82:6473597d706e 10297 #define BW_AIPS_PACRL_SP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP3) = (v))
bogdanm 82:6473597d706e 10298 #endif
bogdanm 82:6473597d706e 10299 //@}
bogdanm 82:6473597d706e 10300
bogdanm 82:6473597d706e 10301 /*!
bogdanm 82:6473597d706e 10302 * @name Register AIPS_PACRL, field TP2[20] (RW)
bogdanm 82:6473597d706e 10303 *
bogdanm 82:6473597d706e 10304 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 10305 * When this bit is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 10306 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 10307 *
bogdanm 82:6473597d706e 10308 * Values:
bogdanm 82:6473597d706e 10309 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 10310 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 10311 */
bogdanm 82:6473597d706e 10312 //@{
bogdanm 82:6473597d706e 10313 #define BP_AIPS_PACRL_TP2 (20U) //!< Bit position for AIPS_PACRL_TP2.
bogdanm 82:6473597d706e 10314 #define BM_AIPS_PACRL_TP2 (0x00100000U) //!< Bit mask for AIPS_PACRL_TP2.
bogdanm 82:6473597d706e 10315 #define BS_AIPS_PACRL_TP2 (1U) //!< Bit field size in bits for AIPS_PACRL_TP2.
bogdanm 82:6473597d706e 10316
bogdanm 82:6473597d706e 10317 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10318 //! @brief Read current value of the AIPS_PACRL_TP2 field.
bogdanm 82:6473597d706e 10319 #define BR_AIPS_PACRL_TP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP2))
bogdanm 82:6473597d706e 10320 #endif
bogdanm 82:6473597d706e 10321
bogdanm 82:6473597d706e 10322 //! @brief Format value for bitfield AIPS_PACRL_TP2.
bogdanm 82:6473597d706e 10323 #define BF_AIPS_PACRL_TP2(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRL_TP2), uint32_t) & BM_AIPS_PACRL_TP2)
bogdanm 82:6473597d706e 10324
bogdanm 82:6473597d706e 10325 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10326 //! @brief Set the TP2 field to a new value.
bogdanm 82:6473597d706e 10327 #define BW_AIPS_PACRL_TP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP2) = (v))
bogdanm 82:6473597d706e 10328 #endif
bogdanm 82:6473597d706e 10329 //@}
bogdanm 82:6473597d706e 10330
bogdanm 82:6473597d706e 10331 /*!
bogdanm 82:6473597d706e 10332 * @name Register AIPS_PACRL, field WP2[21] (RW)
bogdanm 82:6473597d706e 10333 *
bogdanm 82:6473597d706e 10334 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 10335 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 10336 * and no peripheral access initiates.
bogdanm 82:6473597d706e 10337 *
bogdanm 82:6473597d706e 10338 * Values:
bogdanm 82:6473597d706e 10339 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 10340 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 10341 */
bogdanm 82:6473597d706e 10342 //@{
bogdanm 82:6473597d706e 10343 #define BP_AIPS_PACRL_WP2 (21U) //!< Bit position for AIPS_PACRL_WP2.
bogdanm 82:6473597d706e 10344 #define BM_AIPS_PACRL_WP2 (0x00200000U) //!< Bit mask for AIPS_PACRL_WP2.
bogdanm 82:6473597d706e 10345 #define BS_AIPS_PACRL_WP2 (1U) //!< Bit field size in bits for AIPS_PACRL_WP2.
bogdanm 82:6473597d706e 10346
bogdanm 82:6473597d706e 10347 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10348 //! @brief Read current value of the AIPS_PACRL_WP2 field.
bogdanm 82:6473597d706e 10349 #define BR_AIPS_PACRL_WP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP2))
bogdanm 82:6473597d706e 10350 #endif
bogdanm 82:6473597d706e 10351
bogdanm 82:6473597d706e 10352 //! @brief Format value for bitfield AIPS_PACRL_WP2.
bogdanm 82:6473597d706e 10353 #define BF_AIPS_PACRL_WP2(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRL_WP2), uint32_t) & BM_AIPS_PACRL_WP2)
bogdanm 82:6473597d706e 10354
bogdanm 82:6473597d706e 10355 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10356 //! @brief Set the WP2 field to a new value.
bogdanm 82:6473597d706e 10357 #define BW_AIPS_PACRL_WP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP2) = (v))
bogdanm 82:6473597d706e 10358 #endif
bogdanm 82:6473597d706e 10359 //@}
bogdanm 82:6473597d706e 10360
bogdanm 82:6473597d706e 10361 /*!
bogdanm 82:6473597d706e 10362 * @name Register AIPS_PACRL, field SP2[22] (RW)
bogdanm 82:6473597d706e 10363 *
bogdanm 82:6473597d706e 10364 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 10365 * access. When this bit is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 10366 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
bogdanm 82:6473597d706e 10367 * set. If not, access terminates with an error response and no peripheral access
bogdanm 82:6473597d706e 10368 * initiates.
bogdanm 82:6473597d706e 10369 *
bogdanm 82:6473597d706e 10370 * Values:
bogdanm 82:6473597d706e 10371 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 10372 * accesses.
bogdanm 82:6473597d706e 10373 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 10374 */
bogdanm 82:6473597d706e 10375 //@{
bogdanm 82:6473597d706e 10376 #define BP_AIPS_PACRL_SP2 (22U) //!< Bit position for AIPS_PACRL_SP2.
bogdanm 82:6473597d706e 10377 #define BM_AIPS_PACRL_SP2 (0x00400000U) //!< Bit mask for AIPS_PACRL_SP2.
bogdanm 82:6473597d706e 10378 #define BS_AIPS_PACRL_SP2 (1U) //!< Bit field size in bits for AIPS_PACRL_SP2.
bogdanm 82:6473597d706e 10379
bogdanm 82:6473597d706e 10380 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10381 //! @brief Read current value of the AIPS_PACRL_SP2 field.
bogdanm 82:6473597d706e 10382 #define BR_AIPS_PACRL_SP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP2))
bogdanm 82:6473597d706e 10383 #endif
bogdanm 82:6473597d706e 10384
bogdanm 82:6473597d706e 10385 //! @brief Format value for bitfield AIPS_PACRL_SP2.
bogdanm 82:6473597d706e 10386 #define BF_AIPS_PACRL_SP2(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRL_SP2), uint32_t) & BM_AIPS_PACRL_SP2)
bogdanm 82:6473597d706e 10387
bogdanm 82:6473597d706e 10388 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10389 //! @brief Set the SP2 field to a new value.
bogdanm 82:6473597d706e 10390 #define BW_AIPS_PACRL_SP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP2) = (v))
bogdanm 82:6473597d706e 10391 #endif
bogdanm 82:6473597d706e 10392 //@}
bogdanm 82:6473597d706e 10393
bogdanm 82:6473597d706e 10394 /*!
bogdanm 82:6473597d706e 10395 * @name Register AIPS_PACRL, field TP1[24] (RW)
bogdanm 82:6473597d706e 10396 *
bogdanm 82:6473597d706e 10397 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 10398 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 10399 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 10400 *
bogdanm 82:6473597d706e 10401 * Values:
bogdanm 82:6473597d706e 10402 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 10403 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 10404 */
bogdanm 82:6473597d706e 10405 //@{
bogdanm 82:6473597d706e 10406 #define BP_AIPS_PACRL_TP1 (24U) //!< Bit position for AIPS_PACRL_TP1.
bogdanm 82:6473597d706e 10407 #define BM_AIPS_PACRL_TP1 (0x01000000U) //!< Bit mask for AIPS_PACRL_TP1.
bogdanm 82:6473597d706e 10408 #define BS_AIPS_PACRL_TP1 (1U) //!< Bit field size in bits for AIPS_PACRL_TP1.
bogdanm 82:6473597d706e 10409
bogdanm 82:6473597d706e 10410 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10411 //! @brief Read current value of the AIPS_PACRL_TP1 field.
bogdanm 82:6473597d706e 10412 #define BR_AIPS_PACRL_TP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP1))
bogdanm 82:6473597d706e 10413 #endif
bogdanm 82:6473597d706e 10414
bogdanm 82:6473597d706e 10415 //! @brief Format value for bitfield AIPS_PACRL_TP1.
bogdanm 82:6473597d706e 10416 #define BF_AIPS_PACRL_TP1(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRL_TP1), uint32_t) & BM_AIPS_PACRL_TP1)
bogdanm 82:6473597d706e 10417
bogdanm 82:6473597d706e 10418 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10419 //! @brief Set the TP1 field to a new value.
bogdanm 82:6473597d706e 10420 #define BW_AIPS_PACRL_TP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP1) = (v))
bogdanm 82:6473597d706e 10421 #endif
bogdanm 82:6473597d706e 10422 //@}
bogdanm 82:6473597d706e 10423
bogdanm 82:6473597d706e 10424 /*!
bogdanm 82:6473597d706e 10425 * @name Register AIPS_PACRL, field WP1[25] (RW)
bogdanm 82:6473597d706e 10426 *
bogdanm 82:6473597d706e 10427 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 10428 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 10429 * and no peripheral access initiates.
bogdanm 82:6473597d706e 10430 *
bogdanm 82:6473597d706e 10431 * Values:
bogdanm 82:6473597d706e 10432 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 10433 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 10434 */
bogdanm 82:6473597d706e 10435 //@{
bogdanm 82:6473597d706e 10436 #define BP_AIPS_PACRL_WP1 (25U) //!< Bit position for AIPS_PACRL_WP1.
bogdanm 82:6473597d706e 10437 #define BM_AIPS_PACRL_WP1 (0x02000000U) //!< Bit mask for AIPS_PACRL_WP1.
bogdanm 82:6473597d706e 10438 #define BS_AIPS_PACRL_WP1 (1U) //!< Bit field size in bits for AIPS_PACRL_WP1.
bogdanm 82:6473597d706e 10439
bogdanm 82:6473597d706e 10440 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10441 //! @brief Read current value of the AIPS_PACRL_WP1 field.
bogdanm 82:6473597d706e 10442 #define BR_AIPS_PACRL_WP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP1))
bogdanm 82:6473597d706e 10443 #endif
bogdanm 82:6473597d706e 10444
bogdanm 82:6473597d706e 10445 //! @brief Format value for bitfield AIPS_PACRL_WP1.
bogdanm 82:6473597d706e 10446 #define BF_AIPS_PACRL_WP1(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRL_WP1), uint32_t) & BM_AIPS_PACRL_WP1)
bogdanm 82:6473597d706e 10447
bogdanm 82:6473597d706e 10448 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10449 //! @brief Set the WP1 field to a new value.
bogdanm 82:6473597d706e 10450 #define BW_AIPS_PACRL_WP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP1) = (v))
bogdanm 82:6473597d706e 10451 #endif
bogdanm 82:6473597d706e 10452 //@}
bogdanm 82:6473597d706e 10453
bogdanm 82:6473597d706e 10454 /*!
bogdanm 82:6473597d706e 10455 * @name Register AIPS_PACRL, field SP1[26] (RW)
bogdanm 82:6473597d706e 10456 *
bogdanm 82:6473597d706e 10457 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 10458 * access. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 10459 * supervisor access attribute, and the MPRx[MPLn] control field for the master must
bogdanm 82:6473597d706e 10460 * be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 10461 * access initiates.
bogdanm 82:6473597d706e 10462 *
bogdanm 82:6473597d706e 10463 * Values:
bogdanm 82:6473597d706e 10464 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 10465 * accesses.
bogdanm 82:6473597d706e 10466 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 10467 */
bogdanm 82:6473597d706e 10468 //@{
bogdanm 82:6473597d706e 10469 #define BP_AIPS_PACRL_SP1 (26U) //!< Bit position for AIPS_PACRL_SP1.
bogdanm 82:6473597d706e 10470 #define BM_AIPS_PACRL_SP1 (0x04000000U) //!< Bit mask for AIPS_PACRL_SP1.
bogdanm 82:6473597d706e 10471 #define BS_AIPS_PACRL_SP1 (1U) //!< Bit field size in bits for AIPS_PACRL_SP1.
bogdanm 82:6473597d706e 10472
bogdanm 82:6473597d706e 10473 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10474 //! @brief Read current value of the AIPS_PACRL_SP1 field.
bogdanm 82:6473597d706e 10475 #define BR_AIPS_PACRL_SP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP1))
bogdanm 82:6473597d706e 10476 #endif
bogdanm 82:6473597d706e 10477
bogdanm 82:6473597d706e 10478 //! @brief Format value for bitfield AIPS_PACRL_SP1.
bogdanm 82:6473597d706e 10479 #define BF_AIPS_PACRL_SP1(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRL_SP1), uint32_t) & BM_AIPS_PACRL_SP1)
bogdanm 82:6473597d706e 10480
bogdanm 82:6473597d706e 10481 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10482 //! @brief Set the SP1 field to a new value.
bogdanm 82:6473597d706e 10483 #define BW_AIPS_PACRL_SP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP1) = (v))
bogdanm 82:6473597d706e 10484 #endif
bogdanm 82:6473597d706e 10485 //@}
bogdanm 82:6473597d706e 10486
bogdanm 82:6473597d706e 10487 /*!
bogdanm 82:6473597d706e 10488 * @name Register AIPS_PACRL, field TP0[28] (RW)
bogdanm 82:6473597d706e 10489 *
bogdanm 82:6473597d706e 10490 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 10491 * When this bit is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 10492 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 10493 *
bogdanm 82:6473597d706e 10494 * Values:
bogdanm 82:6473597d706e 10495 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 10496 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 10497 */
bogdanm 82:6473597d706e 10498 //@{
bogdanm 82:6473597d706e 10499 #define BP_AIPS_PACRL_TP0 (28U) //!< Bit position for AIPS_PACRL_TP0.
bogdanm 82:6473597d706e 10500 #define BM_AIPS_PACRL_TP0 (0x10000000U) //!< Bit mask for AIPS_PACRL_TP0.
bogdanm 82:6473597d706e 10501 #define BS_AIPS_PACRL_TP0 (1U) //!< Bit field size in bits for AIPS_PACRL_TP0.
bogdanm 82:6473597d706e 10502
bogdanm 82:6473597d706e 10503 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10504 //! @brief Read current value of the AIPS_PACRL_TP0 field.
bogdanm 82:6473597d706e 10505 #define BR_AIPS_PACRL_TP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP0))
bogdanm 82:6473597d706e 10506 #endif
bogdanm 82:6473597d706e 10507
bogdanm 82:6473597d706e 10508 //! @brief Format value for bitfield AIPS_PACRL_TP0.
bogdanm 82:6473597d706e 10509 #define BF_AIPS_PACRL_TP0(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRL_TP0), uint32_t) & BM_AIPS_PACRL_TP0)
bogdanm 82:6473597d706e 10510
bogdanm 82:6473597d706e 10511 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10512 //! @brief Set the TP0 field to a new value.
bogdanm 82:6473597d706e 10513 #define BW_AIPS_PACRL_TP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_TP0) = (v))
bogdanm 82:6473597d706e 10514 #endif
bogdanm 82:6473597d706e 10515 //@}
bogdanm 82:6473597d706e 10516
bogdanm 82:6473597d706e 10517 /*!
bogdanm 82:6473597d706e 10518 * @name Register AIPS_PACRL, field WP0[29] (RW)
bogdanm 82:6473597d706e 10519 *
bogdanm 82:6473597d706e 10520 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 10521 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 10522 * and no peripheral access initiates.
bogdanm 82:6473597d706e 10523 *
bogdanm 82:6473597d706e 10524 * Values:
bogdanm 82:6473597d706e 10525 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 10526 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 10527 */
bogdanm 82:6473597d706e 10528 //@{
bogdanm 82:6473597d706e 10529 #define BP_AIPS_PACRL_WP0 (29U) //!< Bit position for AIPS_PACRL_WP0.
bogdanm 82:6473597d706e 10530 #define BM_AIPS_PACRL_WP0 (0x20000000U) //!< Bit mask for AIPS_PACRL_WP0.
bogdanm 82:6473597d706e 10531 #define BS_AIPS_PACRL_WP0 (1U) //!< Bit field size in bits for AIPS_PACRL_WP0.
bogdanm 82:6473597d706e 10532
bogdanm 82:6473597d706e 10533 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10534 //! @brief Read current value of the AIPS_PACRL_WP0 field.
bogdanm 82:6473597d706e 10535 #define BR_AIPS_PACRL_WP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP0))
bogdanm 82:6473597d706e 10536 #endif
bogdanm 82:6473597d706e 10537
bogdanm 82:6473597d706e 10538 //! @brief Format value for bitfield AIPS_PACRL_WP0.
bogdanm 82:6473597d706e 10539 #define BF_AIPS_PACRL_WP0(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRL_WP0), uint32_t) & BM_AIPS_PACRL_WP0)
bogdanm 82:6473597d706e 10540
bogdanm 82:6473597d706e 10541 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10542 //! @brief Set the WP0 field to a new value.
bogdanm 82:6473597d706e 10543 #define BW_AIPS_PACRL_WP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_WP0) = (v))
bogdanm 82:6473597d706e 10544 #endif
bogdanm 82:6473597d706e 10545 //@}
bogdanm 82:6473597d706e 10546
bogdanm 82:6473597d706e 10547 /*!
bogdanm 82:6473597d706e 10548 * @name Register AIPS_PACRL, field SP0[30] (RW)
bogdanm 82:6473597d706e 10549 *
bogdanm 82:6473597d706e 10550 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 10551 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 10552 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 10553 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 10554 * access initiates.
bogdanm 82:6473597d706e 10555 *
bogdanm 82:6473597d706e 10556 * Values:
bogdanm 82:6473597d706e 10557 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 10558 * accesses.
bogdanm 82:6473597d706e 10559 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 10560 */
bogdanm 82:6473597d706e 10561 //@{
bogdanm 82:6473597d706e 10562 #define BP_AIPS_PACRL_SP0 (30U) //!< Bit position for AIPS_PACRL_SP0.
bogdanm 82:6473597d706e 10563 #define BM_AIPS_PACRL_SP0 (0x40000000U) //!< Bit mask for AIPS_PACRL_SP0.
bogdanm 82:6473597d706e 10564 #define BS_AIPS_PACRL_SP0 (1U) //!< Bit field size in bits for AIPS_PACRL_SP0.
bogdanm 82:6473597d706e 10565
bogdanm 82:6473597d706e 10566 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10567 //! @brief Read current value of the AIPS_PACRL_SP0 field.
bogdanm 82:6473597d706e 10568 #define BR_AIPS_PACRL_SP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP0))
bogdanm 82:6473597d706e 10569 #endif
bogdanm 82:6473597d706e 10570
bogdanm 82:6473597d706e 10571 //! @brief Format value for bitfield AIPS_PACRL_SP0.
bogdanm 82:6473597d706e 10572 #define BF_AIPS_PACRL_SP0(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRL_SP0), uint32_t) & BM_AIPS_PACRL_SP0)
bogdanm 82:6473597d706e 10573
bogdanm 82:6473597d706e 10574 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10575 //! @brief Set the SP0 field to a new value.
bogdanm 82:6473597d706e 10576 #define BW_AIPS_PACRL_SP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRL_ADDR(x), BP_AIPS_PACRL_SP0) = (v))
bogdanm 82:6473597d706e 10577 #endif
bogdanm 82:6473597d706e 10578 //@}
bogdanm 82:6473597d706e 10579
bogdanm 82:6473597d706e 10580 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 10581 // HW_AIPS_PACRM - Peripheral Access Control Register
bogdanm 82:6473597d706e 10582 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 10583
bogdanm 82:6473597d706e 10584 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10585 /*!
bogdanm 82:6473597d706e 10586 * @brief HW_AIPS_PACRM - Peripheral Access Control Register (RW)
bogdanm 82:6473597d706e 10587 *
bogdanm 82:6473597d706e 10588 * Reset value: 0x44444444U
bogdanm 82:6473597d706e 10589 *
bogdanm 82:6473597d706e 10590 * This section describes PACR registers E-P, which control peripheral slots
bogdanm 82:6473597d706e 10591 * 32-127. See PACRPeripheral Access Control Register for the description of these
bogdanm 82:6473597d706e 10592 * registers.
bogdanm 82:6473597d706e 10593 */
bogdanm 82:6473597d706e 10594 typedef union _hw_aips_pacrm
bogdanm 82:6473597d706e 10595 {
bogdanm 82:6473597d706e 10596 uint32_t U;
bogdanm 82:6473597d706e 10597 struct _hw_aips_pacrm_bitfields
bogdanm 82:6473597d706e 10598 {
bogdanm 82:6473597d706e 10599 uint32_t TP7 : 1; //!< [0] Trusted Protect
bogdanm 82:6473597d706e 10600 uint32_t WP7 : 1; //!< [1] Write Protect
bogdanm 82:6473597d706e 10601 uint32_t SP7 : 1; //!< [2] Supervisor Protect
bogdanm 82:6473597d706e 10602 uint32_t RESERVED0 : 1; //!< [3]
bogdanm 82:6473597d706e 10603 uint32_t TP6 : 1; //!< [4] Trusted Protect
bogdanm 82:6473597d706e 10604 uint32_t WP6 : 1; //!< [5] Write Protect
bogdanm 82:6473597d706e 10605 uint32_t SP6 : 1; //!< [6] Supervisor Protect
bogdanm 82:6473597d706e 10606 uint32_t RESERVED1 : 1; //!< [7]
bogdanm 82:6473597d706e 10607 uint32_t TP5 : 1; //!< [8] Trusted Protect
bogdanm 82:6473597d706e 10608 uint32_t WP5 : 1; //!< [9] Write Protect
bogdanm 82:6473597d706e 10609 uint32_t SP5 : 1; //!< [10] Supervisor Protect
bogdanm 82:6473597d706e 10610 uint32_t RESERVED2 : 1; //!< [11]
bogdanm 82:6473597d706e 10611 uint32_t TP4 : 1; //!< [12] Trusted Protect
bogdanm 82:6473597d706e 10612 uint32_t WP4 : 1; //!< [13] Write Protect
bogdanm 82:6473597d706e 10613 uint32_t SP4 : 1; //!< [14] Supervisor Protect
bogdanm 82:6473597d706e 10614 uint32_t RESERVED3 : 1; //!< [15]
bogdanm 82:6473597d706e 10615 uint32_t TP3 : 1; //!< [16] Trusted Protect
bogdanm 82:6473597d706e 10616 uint32_t WP3 : 1; //!< [17] Write Protect
bogdanm 82:6473597d706e 10617 uint32_t SP3 : 1; //!< [18] Supervisor Protect
bogdanm 82:6473597d706e 10618 uint32_t RESERVED4 : 1; //!< [19]
bogdanm 82:6473597d706e 10619 uint32_t TP2 : 1; //!< [20] Trusted Protect
bogdanm 82:6473597d706e 10620 uint32_t WP2 : 1; //!< [21] Write Protect
bogdanm 82:6473597d706e 10621 uint32_t SP2 : 1; //!< [22] Supervisor Protect
bogdanm 82:6473597d706e 10622 uint32_t RESERVED5 : 1; //!< [23]
bogdanm 82:6473597d706e 10623 uint32_t TP1 : 1; //!< [24] Trusted Protect
bogdanm 82:6473597d706e 10624 uint32_t WP1 : 1; //!< [25] Write Protect
bogdanm 82:6473597d706e 10625 uint32_t SP1 : 1; //!< [26] Supervisor Protect
bogdanm 82:6473597d706e 10626 uint32_t RESERVED6 : 1; //!< [27]
bogdanm 82:6473597d706e 10627 uint32_t TP0 : 1; //!< [28] Trusted Protect
bogdanm 82:6473597d706e 10628 uint32_t WP0 : 1; //!< [29] Write Protect
bogdanm 82:6473597d706e 10629 uint32_t SP0 : 1; //!< [30] Supervisor Protect
bogdanm 82:6473597d706e 10630 uint32_t RESERVED7 : 1; //!< [31]
bogdanm 82:6473597d706e 10631 } B;
bogdanm 82:6473597d706e 10632 } hw_aips_pacrm_t;
bogdanm 82:6473597d706e 10633 #endif
bogdanm 82:6473597d706e 10634
bogdanm 82:6473597d706e 10635 /*!
bogdanm 82:6473597d706e 10636 * @name Constants and macros for entire AIPS_PACRM register
bogdanm 82:6473597d706e 10637 */
bogdanm 82:6473597d706e 10638 //@{
bogdanm 82:6473597d706e 10639 #define HW_AIPS_PACRM_ADDR(x) (REGS_AIPS_BASE(x) + 0x60U)
bogdanm 82:6473597d706e 10640
bogdanm 82:6473597d706e 10641 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10642 #define HW_AIPS_PACRM(x) (*(__IO hw_aips_pacrm_t *) HW_AIPS_PACRM_ADDR(x))
bogdanm 82:6473597d706e 10643 #define HW_AIPS_PACRM_RD(x) (HW_AIPS_PACRM(x).U)
bogdanm 82:6473597d706e 10644 #define HW_AIPS_PACRM_WR(x, v) (HW_AIPS_PACRM(x).U = (v))
bogdanm 82:6473597d706e 10645 #define HW_AIPS_PACRM_SET(x, v) (HW_AIPS_PACRM_WR(x, HW_AIPS_PACRM_RD(x) | (v)))
bogdanm 82:6473597d706e 10646 #define HW_AIPS_PACRM_CLR(x, v) (HW_AIPS_PACRM_WR(x, HW_AIPS_PACRM_RD(x) & ~(v)))
bogdanm 82:6473597d706e 10647 #define HW_AIPS_PACRM_TOG(x, v) (HW_AIPS_PACRM_WR(x, HW_AIPS_PACRM_RD(x) ^ (v)))
bogdanm 82:6473597d706e 10648 #endif
bogdanm 82:6473597d706e 10649 //@}
bogdanm 82:6473597d706e 10650
bogdanm 82:6473597d706e 10651 /*
bogdanm 82:6473597d706e 10652 * Constants & macros for individual AIPS_PACRM bitfields
bogdanm 82:6473597d706e 10653 */
bogdanm 82:6473597d706e 10654
bogdanm 82:6473597d706e 10655 /*!
bogdanm 82:6473597d706e 10656 * @name Register AIPS_PACRM, field TP7[0] (RW)
bogdanm 82:6473597d706e 10657 *
bogdanm 82:6473597d706e 10658 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 10659 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 10660 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 10661 *
bogdanm 82:6473597d706e 10662 * Values:
bogdanm 82:6473597d706e 10663 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 10664 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 10665 */
bogdanm 82:6473597d706e 10666 //@{
bogdanm 82:6473597d706e 10667 #define BP_AIPS_PACRM_TP7 (0U) //!< Bit position for AIPS_PACRM_TP7.
bogdanm 82:6473597d706e 10668 #define BM_AIPS_PACRM_TP7 (0x00000001U) //!< Bit mask for AIPS_PACRM_TP7.
bogdanm 82:6473597d706e 10669 #define BS_AIPS_PACRM_TP7 (1U) //!< Bit field size in bits for AIPS_PACRM_TP7.
bogdanm 82:6473597d706e 10670
bogdanm 82:6473597d706e 10671 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10672 //! @brief Read current value of the AIPS_PACRM_TP7 field.
bogdanm 82:6473597d706e 10673 #define BR_AIPS_PACRM_TP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP7))
bogdanm 82:6473597d706e 10674 #endif
bogdanm 82:6473597d706e 10675
bogdanm 82:6473597d706e 10676 //! @brief Format value for bitfield AIPS_PACRM_TP7.
bogdanm 82:6473597d706e 10677 #define BF_AIPS_PACRM_TP7(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRM_TP7), uint32_t) & BM_AIPS_PACRM_TP7)
bogdanm 82:6473597d706e 10678
bogdanm 82:6473597d706e 10679 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10680 //! @brief Set the TP7 field to a new value.
bogdanm 82:6473597d706e 10681 #define BW_AIPS_PACRM_TP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP7) = (v))
bogdanm 82:6473597d706e 10682 #endif
bogdanm 82:6473597d706e 10683 //@}
bogdanm 82:6473597d706e 10684
bogdanm 82:6473597d706e 10685 /*!
bogdanm 82:6473597d706e 10686 * @name Register AIPS_PACRM, field WP7[1] (RW)
bogdanm 82:6473597d706e 10687 *
bogdanm 82:6473597d706e 10688 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 10689 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 10690 * and no peripheral access initiates.
bogdanm 82:6473597d706e 10691 *
bogdanm 82:6473597d706e 10692 * Values:
bogdanm 82:6473597d706e 10693 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 10694 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 10695 */
bogdanm 82:6473597d706e 10696 //@{
bogdanm 82:6473597d706e 10697 #define BP_AIPS_PACRM_WP7 (1U) //!< Bit position for AIPS_PACRM_WP7.
bogdanm 82:6473597d706e 10698 #define BM_AIPS_PACRM_WP7 (0x00000002U) //!< Bit mask for AIPS_PACRM_WP7.
bogdanm 82:6473597d706e 10699 #define BS_AIPS_PACRM_WP7 (1U) //!< Bit field size in bits for AIPS_PACRM_WP7.
bogdanm 82:6473597d706e 10700
bogdanm 82:6473597d706e 10701 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10702 //! @brief Read current value of the AIPS_PACRM_WP7 field.
bogdanm 82:6473597d706e 10703 #define BR_AIPS_PACRM_WP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP7))
bogdanm 82:6473597d706e 10704 #endif
bogdanm 82:6473597d706e 10705
bogdanm 82:6473597d706e 10706 //! @brief Format value for bitfield AIPS_PACRM_WP7.
bogdanm 82:6473597d706e 10707 #define BF_AIPS_PACRM_WP7(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRM_WP7), uint32_t) & BM_AIPS_PACRM_WP7)
bogdanm 82:6473597d706e 10708
bogdanm 82:6473597d706e 10709 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10710 //! @brief Set the WP7 field to a new value.
bogdanm 82:6473597d706e 10711 #define BW_AIPS_PACRM_WP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP7) = (v))
bogdanm 82:6473597d706e 10712 #endif
bogdanm 82:6473597d706e 10713 //@}
bogdanm 82:6473597d706e 10714
bogdanm 82:6473597d706e 10715 /*!
bogdanm 82:6473597d706e 10716 * @name Register AIPS_PACRM, field SP7[2] (RW)
bogdanm 82:6473597d706e 10717 *
bogdanm 82:6473597d706e 10718 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 10719 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 10720 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 10721 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 10722 * access initiates.
bogdanm 82:6473597d706e 10723 *
bogdanm 82:6473597d706e 10724 * Values:
bogdanm 82:6473597d706e 10725 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 10726 * accesses.
bogdanm 82:6473597d706e 10727 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 10728 */
bogdanm 82:6473597d706e 10729 //@{
bogdanm 82:6473597d706e 10730 #define BP_AIPS_PACRM_SP7 (2U) //!< Bit position for AIPS_PACRM_SP7.
bogdanm 82:6473597d706e 10731 #define BM_AIPS_PACRM_SP7 (0x00000004U) //!< Bit mask for AIPS_PACRM_SP7.
bogdanm 82:6473597d706e 10732 #define BS_AIPS_PACRM_SP7 (1U) //!< Bit field size in bits for AIPS_PACRM_SP7.
bogdanm 82:6473597d706e 10733
bogdanm 82:6473597d706e 10734 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10735 //! @brief Read current value of the AIPS_PACRM_SP7 field.
bogdanm 82:6473597d706e 10736 #define BR_AIPS_PACRM_SP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP7))
bogdanm 82:6473597d706e 10737 #endif
bogdanm 82:6473597d706e 10738
bogdanm 82:6473597d706e 10739 //! @brief Format value for bitfield AIPS_PACRM_SP7.
bogdanm 82:6473597d706e 10740 #define BF_AIPS_PACRM_SP7(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRM_SP7), uint32_t) & BM_AIPS_PACRM_SP7)
bogdanm 82:6473597d706e 10741
bogdanm 82:6473597d706e 10742 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10743 //! @brief Set the SP7 field to a new value.
bogdanm 82:6473597d706e 10744 #define BW_AIPS_PACRM_SP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP7) = (v))
bogdanm 82:6473597d706e 10745 #endif
bogdanm 82:6473597d706e 10746 //@}
bogdanm 82:6473597d706e 10747
bogdanm 82:6473597d706e 10748 /*!
bogdanm 82:6473597d706e 10749 * @name Register AIPS_PACRM, field TP6[4] (RW)
bogdanm 82:6473597d706e 10750 *
bogdanm 82:6473597d706e 10751 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 10752 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 10753 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 10754 *
bogdanm 82:6473597d706e 10755 * Values:
bogdanm 82:6473597d706e 10756 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 10757 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 10758 */
bogdanm 82:6473597d706e 10759 //@{
bogdanm 82:6473597d706e 10760 #define BP_AIPS_PACRM_TP6 (4U) //!< Bit position for AIPS_PACRM_TP6.
bogdanm 82:6473597d706e 10761 #define BM_AIPS_PACRM_TP6 (0x00000010U) //!< Bit mask for AIPS_PACRM_TP6.
bogdanm 82:6473597d706e 10762 #define BS_AIPS_PACRM_TP6 (1U) //!< Bit field size in bits for AIPS_PACRM_TP6.
bogdanm 82:6473597d706e 10763
bogdanm 82:6473597d706e 10764 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10765 //! @brief Read current value of the AIPS_PACRM_TP6 field.
bogdanm 82:6473597d706e 10766 #define BR_AIPS_PACRM_TP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP6))
bogdanm 82:6473597d706e 10767 #endif
bogdanm 82:6473597d706e 10768
bogdanm 82:6473597d706e 10769 //! @brief Format value for bitfield AIPS_PACRM_TP6.
bogdanm 82:6473597d706e 10770 #define BF_AIPS_PACRM_TP6(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRM_TP6), uint32_t) & BM_AIPS_PACRM_TP6)
bogdanm 82:6473597d706e 10771
bogdanm 82:6473597d706e 10772 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10773 //! @brief Set the TP6 field to a new value.
bogdanm 82:6473597d706e 10774 #define BW_AIPS_PACRM_TP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP6) = (v))
bogdanm 82:6473597d706e 10775 #endif
bogdanm 82:6473597d706e 10776 //@}
bogdanm 82:6473597d706e 10777
bogdanm 82:6473597d706e 10778 /*!
bogdanm 82:6473597d706e 10779 * @name Register AIPS_PACRM, field WP6[5] (RW)
bogdanm 82:6473597d706e 10780 *
bogdanm 82:6473597d706e 10781 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 10782 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 10783 * and no peripheral access initiates.
bogdanm 82:6473597d706e 10784 *
bogdanm 82:6473597d706e 10785 * Values:
bogdanm 82:6473597d706e 10786 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 10787 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 10788 */
bogdanm 82:6473597d706e 10789 //@{
bogdanm 82:6473597d706e 10790 #define BP_AIPS_PACRM_WP6 (5U) //!< Bit position for AIPS_PACRM_WP6.
bogdanm 82:6473597d706e 10791 #define BM_AIPS_PACRM_WP6 (0x00000020U) //!< Bit mask for AIPS_PACRM_WP6.
bogdanm 82:6473597d706e 10792 #define BS_AIPS_PACRM_WP6 (1U) //!< Bit field size in bits for AIPS_PACRM_WP6.
bogdanm 82:6473597d706e 10793
bogdanm 82:6473597d706e 10794 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10795 //! @brief Read current value of the AIPS_PACRM_WP6 field.
bogdanm 82:6473597d706e 10796 #define BR_AIPS_PACRM_WP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP6))
bogdanm 82:6473597d706e 10797 #endif
bogdanm 82:6473597d706e 10798
bogdanm 82:6473597d706e 10799 //! @brief Format value for bitfield AIPS_PACRM_WP6.
bogdanm 82:6473597d706e 10800 #define BF_AIPS_PACRM_WP6(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRM_WP6), uint32_t) & BM_AIPS_PACRM_WP6)
bogdanm 82:6473597d706e 10801
bogdanm 82:6473597d706e 10802 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10803 //! @brief Set the WP6 field to a new value.
bogdanm 82:6473597d706e 10804 #define BW_AIPS_PACRM_WP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP6) = (v))
bogdanm 82:6473597d706e 10805 #endif
bogdanm 82:6473597d706e 10806 //@}
bogdanm 82:6473597d706e 10807
bogdanm 82:6473597d706e 10808 /*!
bogdanm 82:6473597d706e 10809 * @name Register AIPS_PACRM, field SP6[6] (RW)
bogdanm 82:6473597d706e 10810 *
bogdanm 82:6473597d706e 10811 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 10812 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 10813 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 10814 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 10815 * access initiates.
bogdanm 82:6473597d706e 10816 *
bogdanm 82:6473597d706e 10817 * Values:
bogdanm 82:6473597d706e 10818 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 10819 * accesses.
bogdanm 82:6473597d706e 10820 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 10821 */
bogdanm 82:6473597d706e 10822 //@{
bogdanm 82:6473597d706e 10823 #define BP_AIPS_PACRM_SP6 (6U) //!< Bit position for AIPS_PACRM_SP6.
bogdanm 82:6473597d706e 10824 #define BM_AIPS_PACRM_SP6 (0x00000040U) //!< Bit mask for AIPS_PACRM_SP6.
bogdanm 82:6473597d706e 10825 #define BS_AIPS_PACRM_SP6 (1U) //!< Bit field size in bits for AIPS_PACRM_SP6.
bogdanm 82:6473597d706e 10826
bogdanm 82:6473597d706e 10827 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10828 //! @brief Read current value of the AIPS_PACRM_SP6 field.
bogdanm 82:6473597d706e 10829 #define BR_AIPS_PACRM_SP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP6))
bogdanm 82:6473597d706e 10830 #endif
bogdanm 82:6473597d706e 10831
bogdanm 82:6473597d706e 10832 //! @brief Format value for bitfield AIPS_PACRM_SP6.
bogdanm 82:6473597d706e 10833 #define BF_AIPS_PACRM_SP6(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRM_SP6), uint32_t) & BM_AIPS_PACRM_SP6)
bogdanm 82:6473597d706e 10834
bogdanm 82:6473597d706e 10835 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10836 //! @brief Set the SP6 field to a new value.
bogdanm 82:6473597d706e 10837 #define BW_AIPS_PACRM_SP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP6) = (v))
bogdanm 82:6473597d706e 10838 #endif
bogdanm 82:6473597d706e 10839 //@}
bogdanm 82:6473597d706e 10840
bogdanm 82:6473597d706e 10841 /*!
bogdanm 82:6473597d706e 10842 * @name Register AIPS_PACRM, field TP5[8] (RW)
bogdanm 82:6473597d706e 10843 *
bogdanm 82:6473597d706e 10844 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 10845 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 10846 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 10847 *
bogdanm 82:6473597d706e 10848 * Values:
bogdanm 82:6473597d706e 10849 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 10850 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 10851 */
bogdanm 82:6473597d706e 10852 //@{
bogdanm 82:6473597d706e 10853 #define BP_AIPS_PACRM_TP5 (8U) //!< Bit position for AIPS_PACRM_TP5.
bogdanm 82:6473597d706e 10854 #define BM_AIPS_PACRM_TP5 (0x00000100U) //!< Bit mask for AIPS_PACRM_TP5.
bogdanm 82:6473597d706e 10855 #define BS_AIPS_PACRM_TP5 (1U) //!< Bit field size in bits for AIPS_PACRM_TP5.
bogdanm 82:6473597d706e 10856
bogdanm 82:6473597d706e 10857 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10858 //! @brief Read current value of the AIPS_PACRM_TP5 field.
bogdanm 82:6473597d706e 10859 #define BR_AIPS_PACRM_TP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP5))
bogdanm 82:6473597d706e 10860 #endif
bogdanm 82:6473597d706e 10861
bogdanm 82:6473597d706e 10862 //! @brief Format value for bitfield AIPS_PACRM_TP5.
bogdanm 82:6473597d706e 10863 #define BF_AIPS_PACRM_TP5(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRM_TP5), uint32_t) & BM_AIPS_PACRM_TP5)
bogdanm 82:6473597d706e 10864
bogdanm 82:6473597d706e 10865 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10866 //! @brief Set the TP5 field to a new value.
bogdanm 82:6473597d706e 10867 #define BW_AIPS_PACRM_TP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP5) = (v))
bogdanm 82:6473597d706e 10868 #endif
bogdanm 82:6473597d706e 10869 //@}
bogdanm 82:6473597d706e 10870
bogdanm 82:6473597d706e 10871 /*!
bogdanm 82:6473597d706e 10872 * @name Register AIPS_PACRM, field WP5[9] (RW)
bogdanm 82:6473597d706e 10873 *
bogdanm 82:6473597d706e 10874 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 10875 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 10876 * and no peripheral access initiates.
bogdanm 82:6473597d706e 10877 *
bogdanm 82:6473597d706e 10878 * Values:
bogdanm 82:6473597d706e 10879 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 10880 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 10881 */
bogdanm 82:6473597d706e 10882 //@{
bogdanm 82:6473597d706e 10883 #define BP_AIPS_PACRM_WP5 (9U) //!< Bit position for AIPS_PACRM_WP5.
bogdanm 82:6473597d706e 10884 #define BM_AIPS_PACRM_WP5 (0x00000200U) //!< Bit mask for AIPS_PACRM_WP5.
bogdanm 82:6473597d706e 10885 #define BS_AIPS_PACRM_WP5 (1U) //!< Bit field size in bits for AIPS_PACRM_WP5.
bogdanm 82:6473597d706e 10886
bogdanm 82:6473597d706e 10887 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10888 //! @brief Read current value of the AIPS_PACRM_WP5 field.
bogdanm 82:6473597d706e 10889 #define BR_AIPS_PACRM_WP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP5))
bogdanm 82:6473597d706e 10890 #endif
bogdanm 82:6473597d706e 10891
bogdanm 82:6473597d706e 10892 //! @brief Format value for bitfield AIPS_PACRM_WP5.
bogdanm 82:6473597d706e 10893 #define BF_AIPS_PACRM_WP5(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRM_WP5), uint32_t) & BM_AIPS_PACRM_WP5)
bogdanm 82:6473597d706e 10894
bogdanm 82:6473597d706e 10895 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10896 //! @brief Set the WP5 field to a new value.
bogdanm 82:6473597d706e 10897 #define BW_AIPS_PACRM_WP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP5) = (v))
bogdanm 82:6473597d706e 10898 #endif
bogdanm 82:6473597d706e 10899 //@}
bogdanm 82:6473597d706e 10900
bogdanm 82:6473597d706e 10901 /*!
bogdanm 82:6473597d706e 10902 * @name Register AIPS_PACRM, field SP5[10] (RW)
bogdanm 82:6473597d706e 10903 *
bogdanm 82:6473597d706e 10904 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 10905 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 10906 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 10907 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 10908 * access initiates.
bogdanm 82:6473597d706e 10909 *
bogdanm 82:6473597d706e 10910 * Values:
bogdanm 82:6473597d706e 10911 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 10912 * accesses.
bogdanm 82:6473597d706e 10913 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 10914 */
bogdanm 82:6473597d706e 10915 //@{
bogdanm 82:6473597d706e 10916 #define BP_AIPS_PACRM_SP5 (10U) //!< Bit position for AIPS_PACRM_SP5.
bogdanm 82:6473597d706e 10917 #define BM_AIPS_PACRM_SP5 (0x00000400U) //!< Bit mask for AIPS_PACRM_SP5.
bogdanm 82:6473597d706e 10918 #define BS_AIPS_PACRM_SP5 (1U) //!< Bit field size in bits for AIPS_PACRM_SP5.
bogdanm 82:6473597d706e 10919
bogdanm 82:6473597d706e 10920 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10921 //! @brief Read current value of the AIPS_PACRM_SP5 field.
bogdanm 82:6473597d706e 10922 #define BR_AIPS_PACRM_SP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP5))
bogdanm 82:6473597d706e 10923 #endif
bogdanm 82:6473597d706e 10924
bogdanm 82:6473597d706e 10925 //! @brief Format value for bitfield AIPS_PACRM_SP5.
bogdanm 82:6473597d706e 10926 #define BF_AIPS_PACRM_SP5(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRM_SP5), uint32_t) & BM_AIPS_PACRM_SP5)
bogdanm 82:6473597d706e 10927
bogdanm 82:6473597d706e 10928 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10929 //! @brief Set the SP5 field to a new value.
bogdanm 82:6473597d706e 10930 #define BW_AIPS_PACRM_SP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP5) = (v))
bogdanm 82:6473597d706e 10931 #endif
bogdanm 82:6473597d706e 10932 //@}
bogdanm 82:6473597d706e 10933
bogdanm 82:6473597d706e 10934 /*!
bogdanm 82:6473597d706e 10935 * @name Register AIPS_PACRM, field TP4[12] (RW)
bogdanm 82:6473597d706e 10936 *
bogdanm 82:6473597d706e 10937 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 10938 * When this bit is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 10939 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 10940 *
bogdanm 82:6473597d706e 10941 * Values:
bogdanm 82:6473597d706e 10942 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 10943 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 10944 */
bogdanm 82:6473597d706e 10945 //@{
bogdanm 82:6473597d706e 10946 #define BP_AIPS_PACRM_TP4 (12U) //!< Bit position for AIPS_PACRM_TP4.
bogdanm 82:6473597d706e 10947 #define BM_AIPS_PACRM_TP4 (0x00001000U) //!< Bit mask for AIPS_PACRM_TP4.
bogdanm 82:6473597d706e 10948 #define BS_AIPS_PACRM_TP4 (1U) //!< Bit field size in bits for AIPS_PACRM_TP4.
bogdanm 82:6473597d706e 10949
bogdanm 82:6473597d706e 10950 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10951 //! @brief Read current value of the AIPS_PACRM_TP4 field.
bogdanm 82:6473597d706e 10952 #define BR_AIPS_PACRM_TP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP4))
bogdanm 82:6473597d706e 10953 #endif
bogdanm 82:6473597d706e 10954
bogdanm 82:6473597d706e 10955 //! @brief Format value for bitfield AIPS_PACRM_TP4.
bogdanm 82:6473597d706e 10956 #define BF_AIPS_PACRM_TP4(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRM_TP4), uint32_t) & BM_AIPS_PACRM_TP4)
bogdanm 82:6473597d706e 10957
bogdanm 82:6473597d706e 10958 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10959 //! @brief Set the TP4 field to a new value.
bogdanm 82:6473597d706e 10960 #define BW_AIPS_PACRM_TP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP4) = (v))
bogdanm 82:6473597d706e 10961 #endif
bogdanm 82:6473597d706e 10962 //@}
bogdanm 82:6473597d706e 10963
bogdanm 82:6473597d706e 10964 /*!
bogdanm 82:6473597d706e 10965 * @name Register AIPS_PACRM, field WP4[13] (RW)
bogdanm 82:6473597d706e 10966 *
bogdanm 82:6473597d706e 10967 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 10968 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 10969 * and no peripheral access initiates.
bogdanm 82:6473597d706e 10970 *
bogdanm 82:6473597d706e 10971 * Values:
bogdanm 82:6473597d706e 10972 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 10973 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 10974 */
bogdanm 82:6473597d706e 10975 //@{
bogdanm 82:6473597d706e 10976 #define BP_AIPS_PACRM_WP4 (13U) //!< Bit position for AIPS_PACRM_WP4.
bogdanm 82:6473597d706e 10977 #define BM_AIPS_PACRM_WP4 (0x00002000U) //!< Bit mask for AIPS_PACRM_WP4.
bogdanm 82:6473597d706e 10978 #define BS_AIPS_PACRM_WP4 (1U) //!< Bit field size in bits for AIPS_PACRM_WP4.
bogdanm 82:6473597d706e 10979
bogdanm 82:6473597d706e 10980 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10981 //! @brief Read current value of the AIPS_PACRM_WP4 field.
bogdanm 82:6473597d706e 10982 #define BR_AIPS_PACRM_WP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP4))
bogdanm 82:6473597d706e 10983 #endif
bogdanm 82:6473597d706e 10984
bogdanm 82:6473597d706e 10985 //! @brief Format value for bitfield AIPS_PACRM_WP4.
bogdanm 82:6473597d706e 10986 #define BF_AIPS_PACRM_WP4(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRM_WP4), uint32_t) & BM_AIPS_PACRM_WP4)
bogdanm 82:6473597d706e 10987
bogdanm 82:6473597d706e 10988 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 10989 //! @brief Set the WP4 field to a new value.
bogdanm 82:6473597d706e 10990 #define BW_AIPS_PACRM_WP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP4) = (v))
bogdanm 82:6473597d706e 10991 #endif
bogdanm 82:6473597d706e 10992 //@}
bogdanm 82:6473597d706e 10993
bogdanm 82:6473597d706e 10994 /*!
bogdanm 82:6473597d706e 10995 * @name Register AIPS_PACRM, field SP4[14] (RW)
bogdanm 82:6473597d706e 10996 *
bogdanm 82:6473597d706e 10997 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 10998 * access. When this bit is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 10999 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
bogdanm 82:6473597d706e 11000 * set. If not, access terminates with an error response and no peripheral access
bogdanm 82:6473597d706e 11001 * initiates.
bogdanm 82:6473597d706e 11002 *
bogdanm 82:6473597d706e 11003 * Values:
bogdanm 82:6473597d706e 11004 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 11005 * accesses.
bogdanm 82:6473597d706e 11006 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 11007 */
bogdanm 82:6473597d706e 11008 //@{
bogdanm 82:6473597d706e 11009 #define BP_AIPS_PACRM_SP4 (14U) //!< Bit position for AIPS_PACRM_SP4.
bogdanm 82:6473597d706e 11010 #define BM_AIPS_PACRM_SP4 (0x00004000U) //!< Bit mask for AIPS_PACRM_SP4.
bogdanm 82:6473597d706e 11011 #define BS_AIPS_PACRM_SP4 (1U) //!< Bit field size in bits for AIPS_PACRM_SP4.
bogdanm 82:6473597d706e 11012
bogdanm 82:6473597d706e 11013 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11014 //! @brief Read current value of the AIPS_PACRM_SP4 field.
bogdanm 82:6473597d706e 11015 #define BR_AIPS_PACRM_SP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP4))
bogdanm 82:6473597d706e 11016 #endif
bogdanm 82:6473597d706e 11017
bogdanm 82:6473597d706e 11018 //! @brief Format value for bitfield AIPS_PACRM_SP4.
bogdanm 82:6473597d706e 11019 #define BF_AIPS_PACRM_SP4(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRM_SP4), uint32_t) & BM_AIPS_PACRM_SP4)
bogdanm 82:6473597d706e 11020
bogdanm 82:6473597d706e 11021 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11022 //! @brief Set the SP4 field to a new value.
bogdanm 82:6473597d706e 11023 #define BW_AIPS_PACRM_SP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP4) = (v))
bogdanm 82:6473597d706e 11024 #endif
bogdanm 82:6473597d706e 11025 //@}
bogdanm 82:6473597d706e 11026
bogdanm 82:6473597d706e 11027 /*!
bogdanm 82:6473597d706e 11028 * @name Register AIPS_PACRM, field TP3[16] (RW)
bogdanm 82:6473597d706e 11029 *
bogdanm 82:6473597d706e 11030 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 11031 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 11032 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 11033 *
bogdanm 82:6473597d706e 11034 * Values:
bogdanm 82:6473597d706e 11035 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 11036 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 11037 */
bogdanm 82:6473597d706e 11038 //@{
bogdanm 82:6473597d706e 11039 #define BP_AIPS_PACRM_TP3 (16U) //!< Bit position for AIPS_PACRM_TP3.
bogdanm 82:6473597d706e 11040 #define BM_AIPS_PACRM_TP3 (0x00010000U) //!< Bit mask for AIPS_PACRM_TP3.
bogdanm 82:6473597d706e 11041 #define BS_AIPS_PACRM_TP3 (1U) //!< Bit field size in bits for AIPS_PACRM_TP3.
bogdanm 82:6473597d706e 11042
bogdanm 82:6473597d706e 11043 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11044 //! @brief Read current value of the AIPS_PACRM_TP3 field.
bogdanm 82:6473597d706e 11045 #define BR_AIPS_PACRM_TP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP3))
bogdanm 82:6473597d706e 11046 #endif
bogdanm 82:6473597d706e 11047
bogdanm 82:6473597d706e 11048 //! @brief Format value for bitfield AIPS_PACRM_TP3.
bogdanm 82:6473597d706e 11049 #define BF_AIPS_PACRM_TP3(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRM_TP3), uint32_t) & BM_AIPS_PACRM_TP3)
bogdanm 82:6473597d706e 11050
bogdanm 82:6473597d706e 11051 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11052 //! @brief Set the TP3 field to a new value.
bogdanm 82:6473597d706e 11053 #define BW_AIPS_PACRM_TP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP3) = (v))
bogdanm 82:6473597d706e 11054 #endif
bogdanm 82:6473597d706e 11055 //@}
bogdanm 82:6473597d706e 11056
bogdanm 82:6473597d706e 11057 /*!
bogdanm 82:6473597d706e 11058 * @name Register AIPS_PACRM, field WP3[17] (RW)
bogdanm 82:6473597d706e 11059 *
bogdanm 82:6473597d706e 11060 * Determines whether the peripheral allows write accesss. When this bit is set
bogdanm 82:6473597d706e 11061 * and a write access is attempted, access terminates with an error response and
bogdanm 82:6473597d706e 11062 * no peripheral access initiates.
bogdanm 82:6473597d706e 11063 *
bogdanm 82:6473597d706e 11064 * Values:
bogdanm 82:6473597d706e 11065 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 11066 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 11067 */
bogdanm 82:6473597d706e 11068 //@{
bogdanm 82:6473597d706e 11069 #define BP_AIPS_PACRM_WP3 (17U) //!< Bit position for AIPS_PACRM_WP3.
bogdanm 82:6473597d706e 11070 #define BM_AIPS_PACRM_WP3 (0x00020000U) //!< Bit mask for AIPS_PACRM_WP3.
bogdanm 82:6473597d706e 11071 #define BS_AIPS_PACRM_WP3 (1U) //!< Bit field size in bits for AIPS_PACRM_WP3.
bogdanm 82:6473597d706e 11072
bogdanm 82:6473597d706e 11073 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11074 //! @brief Read current value of the AIPS_PACRM_WP3 field.
bogdanm 82:6473597d706e 11075 #define BR_AIPS_PACRM_WP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP3))
bogdanm 82:6473597d706e 11076 #endif
bogdanm 82:6473597d706e 11077
bogdanm 82:6473597d706e 11078 //! @brief Format value for bitfield AIPS_PACRM_WP3.
bogdanm 82:6473597d706e 11079 #define BF_AIPS_PACRM_WP3(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRM_WP3), uint32_t) & BM_AIPS_PACRM_WP3)
bogdanm 82:6473597d706e 11080
bogdanm 82:6473597d706e 11081 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11082 //! @brief Set the WP3 field to a new value.
bogdanm 82:6473597d706e 11083 #define BW_AIPS_PACRM_WP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP3) = (v))
bogdanm 82:6473597d706e 11084 #endif
bogdanm 82:6473597d706e 11085 //@}
bogdanm 82:6473597d706e 11086
bogdanm 82:6473597d706e 11087 /*!
bogdanm 82:6473597d706e 11088 * @name Register AIPS_PACRM, field SP3[18] (RW)
bogdanm 82:6473597d706e 11089 *
bogdanm 82:6473597d706e 11090 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 11091 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 11092 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 11093 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 11094 * access initiates.
bogdanm 82:6473597d706e 11095 *
bogdanm 82:6473597d706e 11096 * Values:
bogdanm 82:6473597d706e 11097 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 11098 * accesses.
bogdanm 82:6473597d706e 11099 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 11100 */
bogdanm 82:6473597d706e 11101 //@{
bogdanm 82:6473597d706e 11102 #define BP_AIPS_PACRM_SP3 (18U) //!< Bit position for AIPS_PACRM_SP3.
bogdanm 82:6473597d706e 11103 #define BM_AIPS_PACRM_SP3 (0x00040000U) //!< Bit mask for AIPS_PACRM_SP3.
bogdanm 82:6473597d706e 11104 #define BS_AIPS_PACRM_SP3 (1U) //!< Bit field size in bits for AIPS_PACRM_SP3.
bogdanm 82:6473597d706e 11105
bogdanm 82:6473597d706e 11106 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11107 //! @brief Read current value of the AIPS_PACRM_SP3 field.
bogdanm 82:6473597d706e 11108 #define BR_AIPS_PACRM_SP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP3))
bogdanm 82:6473597d706e 11109 #endif
bogdanm 82:6473597d706e 11110
bogdanm 82:6473597d706e 11111 //! @brief Format value for bitfield AIPS_PACRM_SP3.
bogdanm 82:6473597d706e 11112 #define BF_AIPS_PACRM_SP3(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRM_SP3), uint32_t) & BM_AIPS_PACRM_SP3)
bogdanm 82:6473597d706e 11113
bogdanm 82:6473597d706e 11114 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11115 //! @brief Set the SP3 field to a new value.
bogdanm 82:6473597d706e 11116 #define BW_AIPS_PACRM_SP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP3) = (v))
bogdanm 82:6473597d706e 11117 #endif
bogdanm 82:6473597d706e 11118 //@}
bogdanm 82:6473597d706e 11119
bogdanm 82:6473597d706e 11120 /*!
bogdanm 82:6473597d706e 11121 * @name Register AIPS_PACRM, field TP2[20] (RW)
bogdanm 82:6473597d706e 11122 *
bogdanm 82:6473597d706e 11123 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 11124 * When this bit is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 11125 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 11126 *
bogdanm 82:6473597d706e 11127 * Values:
bogdanm 82:6473597d706e 11128 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 11129 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 11130 */
bogdanm 82:6473597d706e 11131 //@{
bogdanm 82:6473597d706e 11132 #define BP_AIPS_PACRM_TP2 (20U) //!< Bit position for AIPS_PACRM_TP2.
bogdanm 82:6473597d706e 11133 #define BM_AIPS_PACRM_TP2 (0x00100000U) //!< Bit mask for AIPS_PACRM_TP2.
bogdanm 82:6473597d706e 11134 #define BS_AIPS_PACRM_TP2 (1U) //!< Bit field size in bits for AIPS_PACRM_TP2.
bogdanm 82:6473597d706e 11135
bogdanm 82:6473597d706e 11136 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11137 //! @brief Read current value of the AIPS_PACRM_TP2 field.
bogdanm 82:6473597d706e 11138 #define BR_AIPS_PACRM_TP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP2))
bogdanm 82:6473597d706e 11139 #endif
bogdanm 82:6473597d706e 11140
bogdanm 82:6473597d706e 11141 //! @brief Format value for bitfield AIPS_PACRM_TP2.
bogdanm 82:6473597d706e 11142 #define BF_AIPS_PACRM_TP2(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRM_TP2), uint32_t) & BM_AIPS_PACRM_TP2)
bogdanm 82:6473597d706e 11143
bogdanm 82:6473597d706e 11144 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11145 //! @brief Set the TP2 field to a new value.
bogdanm 82:6473597d706e 11146 #define BW_AIPS_PACRM_TP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP2) = (v))
bogdanm 82:6473597d706e 11147 #endif
bogdanm 82:6473597d706e 11148 //@}
bogdanm 82:6473597d706e 11149
bogdanm 82:6473597d706e 11150 /*!
bogdanm 82:6473597d706e 11151 * @name Register AIPS_PACRM, field WP2[21] (RW)
bogdanm 82:6473597d706e 11152 *
bogdanm 82:6473597d706e 11153 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 11154 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 11155 * and no peripheral access initiates.
bogdanm 82:6473597d706e 11156 *
bogdanm 82:6473597d706e 11157 * Values:
bogdanm 82:6473597d706e 11158 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 11159 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 11160 */
bogdanm 82:6473597d706e 11161 //@{
bogdanm 82:6473597d706e 11162 #define BP_AIPS_PACRM_WP2 (21U) //!< Bit position for AIPS_PACRM_WP2.
bogdanm 82:6473597d706e 11163 #define BM_AIPS_PACRM_WP2 (0x00200000U) //!< Bit mask for AIPS_PACRM_WP2.
bogdanm 82:6473597d706e 11164 #define BS_AIPS_PACRM_WP2 (1U) //!< Bit field size in bits for AIPS_PACRM_WP2.
bogdanm 82:6473597d706e 11165
bogdanm 82:6473597d706e 11166 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11167 //! @brief Read current value of the AIPS_PACRM_WP2 field.
bogdanm 82:6473597d706e 11168 #define BR_AIPS_PACRM_WP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP2))
bogdanm 82:6473597d706e 11169 #endif
bogdanm 82:6473597d706e 11170
bogdanm 82:6473597d706e 11171 //! @brief Format value for bitfield AIPS_PACRM_WP2.
bogdanm 82:6473597d706e 11172 #define BF_AIPS_PACRM_WP2(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRM_WP2), uint32_t) & BM_AIPS_PACRM_WP2)
bogdanm 82:6473597d706e 11173
bogdanm 82:6473597d706e 11174 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11175 //! @brief Set the WP2 field to a new value.
bogdanm 82:6473597d706e 11176 #define BW_AIPS_PACRM_WP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP2) = (v))
bogdanm 82:6473597d706e 11177 #endif
bogdanm 82:6473597d706e 11178 //@}
bogdanm 82:6473597d706e 11179
bogdanm 82:6473597d706e 11180 /*!
bogdanm 82:6473597d706e 11181 * @name Register AIPS_PACRM, field SP2[22] (RW)
bogdanm 82:6473597d706e 11182 *
bogdanm 82:6473597d706e 11183 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 11184 * access. When this bit is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 11185 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
bogdanm 82:6473597d706e 11186 * set. If not, access terminates with an error response and no peripheral access
bogdanm 82:6473597d706e 11187 * initiates.
bogdanm 82:6473597d706e 11188 *
bogdanm 82:6473597d706e 11189 * Values:
bogdanm 82:6473597d706e 11190 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 11191 * accesses.
bogdanm 82:6473597d706e 11192 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 11193 */
bogdanm 82:6473597d706e 11194 //@{
bogdanm 82:6473597d706e 11195 #define BP_AIPS_PACRM_SP2 (22U) //!< Bit position for AIPS_PACRM_SP2.
bogdanm 82:6473597d706e 11196 #define BM_AIPS_PACRM_SP2 (0x00400000U) //!< Bit mask for AIPS_PACRM_SP2.
bogdanm 82:6473597d706e 11197 #define BS_AIPS_PACRM_SP2 (1U) //!< Bit field size in bits for AIPS_PACRM_SP2.
bogdanm 82:6473597d706e 11198
bogdanm 82:6473597d706e 11199 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11200 //! @brief Read current value of the AIPS_PACRM_SP2 field.
bogdanm 82:6473597d706e 11201 #define BR_AIPS_PACRM_SP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP2))
bogdanm 82:6473597d706e 11202 #endif
bogdanm 82:6473597d706e 11203
bogdanm 82:6473597d706e 11204 //! @brief Format value for bitfield AIPS_PACRM_SP2.
bogdanm 82:6473597d706e 11205 #define BF_AIPS_PACRM_SP2(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRM_SP2), uint32_t) & BM_AIPS_PACRM_SP2)
bogdanm 82:6473597d706e 11206
bogdanm 82:6473597d706e 11207 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11208 //! @brief Set the SP2 field to a new value.
bogdanm 82:6473597d706e 11209 #define BW_AIPS_PACRM_SP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP2) = (v))
bogdanm 82:6473597d706e 11210 #endif
bogdanm 82:6473597d706e 11211 //@}
bogdanm 82:6473597d706e 11212
bogdanm 82:6473597d706e 11213 /*!
bogdanm 82:6473597d706e 11214 * @name Register AIPS_PACRM, field TP1[24] (RW)
bogdanm 82:6473597d706e 11215 *
bogdanm 82:6473597d706e 11216 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 11217 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 11218 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 11219 *
bogdanm 82:6473597d706e 11220 * Values:
bogdanm 82:6473597d706e 11221 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 11222 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 11223 */
bogdanm 82:6473597d706e 11224 //@{
bogdanm 82:6473597d706e 11225 #define BP_AIPS_PACRM_TP1 (24U) //!< Bit position for AIPS_PACRM_TP1.
bogdanm 82:6473597d706e 11226 #define BM_AIPS_PACRM_TP1 (0x01000000U) //!< Bit mask for AIPS_PACRM_TP1.
bogdanm 82:6473597d706e 11227 #define BS_AIPS_PACRM_TP1 (1U) //!< Bit field size in bits for AIPS_PACRM_TP1.
bogdanm 82:6473597d706e 11228
bogdanm 82:6473597d706e 11229 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11230 //! @brief Read current value of the AIPS_PACRM_TP1 field.
bogdanm 82:6473597d706e 11231 #define BR_AIPS_PACRM_TP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP1))
bogdanm 82:6473597d706e 11232 #endif
bogdanm 82:6473597d706e 11233
bogdanm 82:6473597d706e 11234 //! @brief Format value for bitfield AIPS_PACRM_TP1.
bogdanm 82:6473597d706e 11235 #define BF_AIPS_PACRM_TP1(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRM_TP1), uint32_t) & BM_AIPS_PACRM_TP1)
bogdanm 82:6473597d706e 11236
bogdanm 82:6473597d706e 11237 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11238 //! @brief Set the TP1 field to a new value.
bogdanm 82:6473597d706e 11239 #define BW_AIPS_PACRM_TP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP1) = (v))
bogdanm 82:6473597d706e 11240 #endif
bogdanm 82:6473597d706e 11241 //@}
bogdanm 82:6473597d706e 11242
bogdanm 82:6473597d706e 11243 /*!
bogdanm 82:6473597d706e 11244 * @name Register AIPS_PACRM, field WP1[25] (RW)
bogdanm 82:6473597d706e 11245 *
bogdanm 82:6473597d706e 11246 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 11247 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 11248 * and no peripheral access initiates.
bogdanm 82:6473597d706e 11249 *
bogdanm 82:6473597d706e 11250 * Values:
bogdanm 82:6473597d706e 11251 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 11252 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 11253 */
bogdanm 82:6473597d706e 11254 //@{
bogdanm 82:6473597d706e 11255 #define BP_AIPS_PACRM_WP1 (25U) //!< Bit position for AIPS_PACRM_WP1.
bogdanm 82:6473597d706e 11256 #define BM_AIPS_PACRM_WP1 (0x02000000U) //!< Bit mask for AIPS_PACRM_WP1.
bogdanm 82:6473597d706e 11257 #define BS_AIPS_PACRM_WP1 (1U) //!< Bit field size in bits for AIPS_PACRM_WP1.
bogdanm 82:6473597d706e 11258
bogdanm 82:6473597d706e 11259 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11260 //! @brief Read current value of the AIPS_PACRM_WP1 field.
bogdanm 82:6473597d706e 11261 #define BR_AIPS_PACRM_WP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP1))
bogdanm 82:6473597d706e 11262 #endif
bogdanm 82:6473597d706e 11263
bogdanm 82:6473597d706e 11264 //! @brief Format value for bitfield AIPS_PACRM_WP1.
bogdanm 82:6473597d706e 11265 #define BF_AIPS_PACRM_WP1(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRM_WP1), uint32_t) & BM_AIPS_PACRM_WP1)
bogdanm 82:6473597d706e 11266
bogdanm 82:6473597d706e 11267 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11268 //! @brief Set the WP1 field to a new value.
bogdanm 82:6473597d706e 11269 #define BW_AIPS_PACRM_WP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP1) = (v))
bogdanm 82:6473597d706e 11270 #endif
bogdanm 82:6473597d706e 11271 //@}
bogdanm 82:6473597d706e 11272
bogdanm 82:6473597d706e 11273 /*!
bogdanm 82:6473597d706e 11274 * @name Register AIPS_PACRM, field SP1[26] (RW)
bogdanm 82:6473597d706e 11275 *
bogdanm 82:6473597d706e 11276 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 11277 * access. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 11278 * supervisor access attribute, and the MPRx[MPLn] control field for the master must
bogdanm 82:6473597d706e 11279 * be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 11280 * access initiates.
bogdanm 82:6473597d706e 11281 *
bogdanm 82:6473597d706e 11282 * Values:
bogdanm 82:6473597d706e 11283 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 11284 * accesses.
bogdanm 82:6473597d706e 11285 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 11286 */
bogdanm 82:6473597d706e 11287 //@{
bogdanm 82:6473597d706e 11288 #define BP_AIPS_PACRM_SP1 (26U) //!< Bit position for AIPS_PACRM_SP1.
bogdanm 82:6473597d706e 11289 #define BM_AIPS_PACRM_SP1 (0x04000000U) //!< Bit mask for AIPS_PACRM_SP1.
bogdanm 82:6473597d706e 11290 #define BS_AIPS_PACRM_SP1 (1U) //!< Bit field size in bits for AIPS_PACRM_SP1.
bogdanm 82:6473597d706e 11291
bogdanm 82:6473597d706e 11292 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11293 //! @brief Read current value of the AIPS_PACRM_SP1 field.
bogdanm 82:6473597d706e 11294 #define BR_AIPS_PACRM_SP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP1))
bogdanm 82:6473597d706e 11295 #endif
bogdanm 82:6473597d706e 11296
bogdanm 82:6473597d706e 11297 //! @brief Format value for bitfield AIPS_PACRM_SP1.
bogdanm 82:6473597d706e 11298 #define BF_AIPS_PACRM_SP1(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRM_SP1), uint32_t) & BM_AIPS_PACRM_SP1)
bogdanm 82:6473597d706e 11299
bogdanm 82:6473597d706e 11300 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11301 //! @brief Set the SP1 field to a new value.
bogdanm 82:6473597d706e 11302 #define BW_AIPS_PACRM_SP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP1) = (v))
bogdanm 82:6473597d706e 11303 #endif
bogdanm 82:6473597d706e 11304 //@}
bogdanm 82:6473597d706e 11305
bogdanm 82:6473597d706e 11306 /*!
bogdanm 82:6473597d706e 11307 * @name Register AIPS_PACRM, field TP0[28] (RW)
bogdanm 82:6473597d706e 11308 *
bogdanm 82:6473597d706e 11309 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 11310 * When this bit is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 11311 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 11312 *
bogdanm 82:6473597d706e 11313 * Values:
bogdanm 82:6473597d706e 11314 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 11315 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 11316 */
bogdanm 82:6473597d706e 11317 //@{
bogdanm 82:6473597d706e 11318 #define BP_AIPS_PACRM_TP0 (28U) //!< Bit position for AIPS_PACRM_TP0.
bogdanm 82:6473597d706e 11319 #define BM_AIPS_PACRM_TP0 (0x10000000U) //!< Bit mask for AIPS_PACRM_TP0.
bogdanm 82:6473597d706e 11320 #define BS_AIPS_PACRM_TP0 (1U) //!< Bit field size in bits for AIPS_PACRM_TP0.
bogdanm 82:6473597d706e 11321
bogdanm 82:6473597d706e 11322 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11323 //! @brief Read current value of the AIPS_PACRM_TP0 field.
bogdanm 82:6473597d706e 11324 #define BR_AIPS_PACRM_TP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP0))
bogdanm 82:6473597d706e 11325 #endif
bogdanm 82:6473597d706e 11326
bogdanm 82:6473597d706e 11327 //! @brief Format value for bitfield AIPS_PACRM_TP0.
bogdanm 82:6473597d706e 11328 #define BF_AIPS_PACRM_TP0(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRM_TP0), uint32_t) & BM_AIPS_PACRM_TP0)
bogdanm 82:6473597d706e 11329
bogdanm 82:6473597d706e 11330 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11331 //! @brief Set the TP0 field to a new value.
bogdanm 82:6473597d706e 11332 #define BW_AIPS_PACRM_TP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_TP0) = (v))
bogdanm 82:6473597d706e 11333 #endif
bogdanm 82:6473597d706e 11334 //@}
bogdanm 82:6473597d706e 11335
bogdanm 82:6473597d706e 11336 /*!
bogdanm 82:6473597d706e 11337 * @name Register AIPS_PACRM, field WP0[29] (RW)
bogdanm 82:6473597d706e 11338 *
bogdanm 82:6473597d706e 11339 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 11340 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 11341 * and no peripheral access initiates.
bogdanm 82:6473597d706e 11342 *
bogdanm 82:6473597d706e 11343 * Values:
bogdanm 82:6473597d706e 11344 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 11345 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 11346 */
bogdanm 82:6473597d706e 11347 //@{
bogdanm 82:6473597d706e 11348 #define BP_AIPS_PACRM_WP0 (29U) //!< Bit position for AIPS_PACRM_WP0.
bogdanm 82:6473597d706e 11349 #define BM_AIPS_PACRM_WP0 (0x20000000U) //!< Bit mask for AIPS_PACRM_WP0.
bogdanm 82:6473597d706e 11350 #define BS_AIPS_PACRM_WP0 (1U) //!< Bit field size in bits for AIPS_PACRM_WP0.
bogdanm 82:6473597d706e 11351
bogdanm 82:6473597d706e 11352 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11353 //! @brief Read current value of the AIPS_PACRM_WP0 field.
bogdanm 82:6473597d706e 11354 #define BR_AIPS_PACRM_WP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP0))
bogdanm 82:6473597d706e 11355 #endif
bogdanm 82:6473597d706e 11356
bogdanm 82:6473597d706e 11357 //! @brief Format value for bitfield AIPS_PACRM_WP0.
bogdanm 82:6473597d706e 11358 #define BF_AIPS_PACRM_WP0(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRM_WP0), uint32_t) & BM_AIPS_PACRM_WP0)
bogdanm 82:6473597d706e 11359
bogdanm 82:6473597d706e 11360 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11361 //! @brief Set the WP0 field to a new value.
bogdanm 82:6473597d706e 11362 #define BW_AIPS_PACRM_WP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_WP0) = (v))
bogdanm 82:6473597d706e 11363 #endif
bogdanm 82:6473597d706e 11364 //@}
bogdanm 82:6473597d706e 11365
bogdanm 82:6473597d706e 11366 /*!
bogdanm 82:6473597d706e 11367 * @name Register AIPS_PACRM, field SP0[30] (RW)
bogdanm 82:6473597d706e 11368 *
bogdanm 82:6473597d706e 11369 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 11370 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 11371 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 11372 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 11373 * access initiates.
bogdanm 82:6473597d706e 11374 *
bogdanm 82:6473597d706e 11375 * Values:
bogdanm 82:6473597d706e 11376 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 11377 * accesses.
bogdanm 82:6473597d706e 11378 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 11379 */
bogdanm 82:6473597d706e 11380 //@{
bogdanm 82:6473597d706e 11381 #define BP_AIPS_PACRM_SP0 (30U) //!< Bit position for AIPS_PACRM_SP0.
bogdanm 82:6473597d706e 11382 #define BM_AIPS_PACRM_SP0 (0x40000000U) //!< Bit mask for AIPS_PACRM_SP0.
bogdanm 82:6473597d706e 11383 #define BS_AIPS_PACRM_SP0 (1U) //!< Bit field size in bits for AIPS_PACRM_SP0.
bogdanm 82:6473597d706e 11384
bogdanm 82:6473597d706e 11385 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11386 //! @brief Read current value of the AIPS_PACRM_SP0 field.
bogdanm 82:6473597d706e 11387 #define BR_AIPS_PACRM_SP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP0))
bogdanm 82:6473597d706e 11388 #endif
bogdanm 82:6473597d706e 11389
bogdanm 82:6473597d706e 11390 //! @brief Format value for bitfield AIPS_PACRM_SP0.
bogdanm 82:6473597d706e 11391 #define BF_AIPS_PACRM_SP0(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRM_SP0), uint32_t) & BM_AIPS_PACRM_SP0)
bogdanm 82:6473597d706e 11392
bogdanm 82:6473597d706e 11393 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11394 //! @brief Set the SP0 field to a new value.
bogdanm 82:6473597d706e 11395 #define BW_AIPS_PACRM_SP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRM_ADDR(x), BP_AIPS_PACRM_SP0) = (v))
bogdanm 82:6473597d706e 11396 #endif
bogdanm 82:6473597d706e 11397 //@}
bogdanm 82:6473597d706e 11398
bogdanm 82:6473597d706e 11399 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 11400 // HW_AIPS_PACRN - Peripheral Access Control Register
bogdanm 82:6473597d706e 11401 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 11402
bogdanm 82:6473597d706e 11403 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11404 /*!
bogdanm 82:6473597d706e 11405 * @brief HW_AIPS_PACRN - Peripheral Access Control Register (RW)
bogdanm 82:6473597d706e 11406 *
bogdanm 82:6473597d706e 11407 * Reset value: 0x44444444U
bogdanm 82:6473597d706e 11408 *
bogdanm 82:6473597d706e 11409 * This section describes PACR registers E-P, which control peripheral slots
bogdanm 82:6473597d706e 11410 * 32-127. See PACRPeripheral Access Control Register for the description of these
bogdanm 82:6473597d706e 11411 * registers.
bogdanm 82:6473597d706e 11412 */
bogdanm 82:6473597d706e 11413 typedef union _hw_aips_pacrn
bogdanm 82:6473597d706e 11414 {
bogdanm 82:6473597d706e 11415 uint32_t U;
bogdanm 82:6473597d706e 11416 struct _hw_aips_pacrn_bitfields
bogdanm 82:6473597d706e 11417 {
bogdanm 82:6473597d706e 11418 uint32_t TP7 : 1; //!< [0] Trusted Protect
bogdanm 82:6473597d706e 11419 uint32_t WP7 : 1; //!< [1] Write Protect
bogdanm 82:6473597d706e 11420 uint32_t SP7 : 1; //!< [2] Supervisor Protect
bogdanm 82:6473597d706e 11421 uint32_t RESERVED0 : 1; //!< [3]
bogdanm 82:6473597d706e 11422 uint32_t TP6 : 1; //!< [4] Trusted Protect
bogdanm 82:6473597d706e 11423 uint32_t WP6 : 1; //!< [5] Write Protect
bogdanm 82:6473597d706e 11424 uint32_t SP6 : 1; //!< [6] Supervisor Protect
bogdanm 82:6473597d706e 11425 uint32_t RESERVED1 : 1; //!< [7]
bogdanm 82:6473597d706e 11426 uint32_t TP5 : 1; //!< [8] Trusted Protect
bogdanm 82:6473597d706e 11427 uint32_t WP5 : 1; //!< [9] Write Protect
bogdanm 82:6473597d706e 11428 uint32_t SP5 : 1; //!< [10] Supervisor Protect
bogdanm 82:6473597d706e 11429 uint32_t RESERVED2 : 1; //!< [11]
bogdanm 82:6473597d706e 11430 uint32_t TP4 : 1; //!< [12] Trusted Protect
bogdanm 82:6473597d706e 11431 uint32_t WP4 : 1; //!< [13] Write Protect
bogdanm 82:6473597d706e 11432 uint32_t SP4 : 1; //!< [14] Supervisor Protect
bogdanm 82:6473597d706e 11433 uint32_t RESERVED3 : 1; //!< [15]
bogdanm 82:6473597d706e 11434 uint32_t TP3 : 1; //!< [16] Trusted Protect
bogdanm 82:6473597d706e 11435 uint32_t WP3 : 1; //!< [17] Write Protect
bogdanm 82:6473597d706e 11436 uint32_t SP3 : 1; //!< [18] Supervisor Protect
bogdanm 82:6473597d706e 11437 uint32_t RESERVED4 : 1; //!< [19]
bogdanm 82:6473597d706e 11438 uint32_t TP2 : 1; //!< [20] Trusted Protect
bogdanm 82:6473597d706e 11439 uint32_t WP2 : 1; //!< [21] Write Protect
bogdanm 82:6473597d706e 11440 uint32_t SP2 : 1; //!< [22] Supervisor Protect
bogdanm 82:6473597d706e 11441 uint32_t RESERVED5 : 1; //!< [23]
bogdanm 82:6473597d706e 11442 uint32_t TP1 : 1; //!< [24] Trusted Protect
bogdanm 82:6473597d706e 11443 uint32_t WP1 : 1; //!< [25] Write Protect
bogdanm 82:6473597d706e 11444 uint32_t SP1 : 1; //!< [26] Supervisor Protect
bogdanm 82:6473597d706e 11445 uint32_t RESERVED6 : 1; //!< [27]
bogdanm 82:6473597d706e 11446 uint32_t TP0 : 1; //!< [28] Trusted Protect
bogdanm 82:6473597d706e 11447 uint32_t WP0 : 1; //!< [29] Write Protect
bogdanm 82:6473597d706e 11448 uint32_t SP0 : 1; //!< [30] Supervisor Protect
bogdanm 82:6473597d706e 11449 uint32_t RESERVED7 : 1; //!< [31]
bogdanm 82:6473597d706e 11450 } B;
bogdanm 82:6473597d706e 11451 } hw_aips_pacrn_t;
bogdanm 82:6473597d706e 11452 #endif
bogdanm 82:6473597d706e 11453
bogdanm 82:6473597d706e 11454 /*!
bogdanm 82:6473597d706e 11455 * @name Constants and macros for entire AIPS_PACRN register
bogdanm 82:6473597d706e 11456 */
bogdanm 82:6473597d706e 11457 //@{
bogdanm 82:6473597d706e 11458 #define HW_AIPS_PACRN_ADDR(x) (REGS_AIPS_BASE(x) + 0x64U)
bogdanm 82:6473597d706e 11459
bogdanm 82:6473597d706e 11460 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11461 #define HW_AIPS_PACRN(x) (*(__IO hw_aips_pacrn_t *) HW_AIPS_PACRN_ADDR(x))
bogdanm 82:6473597d706e 11462 #define HW_AIPS_PACRN_RD(x) (HW_AIPS_PACRN(x).U)
bogdanm 82:6473597d706e 11463 #define HW_AIPS_PACRN_WR(x, v) (HW_AIPS_PACRN(x).U = (v))
bogdanm 82:6473597d706e 11464 #define HW_AIPS_PACRN_SET(x, v) (HW_AIPS_PACRN_WR(x, HW_AIPS_PACRN_RD(x) | (v)))
bogdanm 82:6473597d706e 11465 #define HW_AIPS_PACRN_CLR(x, v) (HW_AIPS_PACRN_WR(x, HW_AIPS_PACRN_RD(x) & ~(v)))
bogdanm 82:6473597d706e 11466 #define HW_AIPS_PACRN_TOG(x, v) (HW_AIPS_PACRN_WR(x, HW_AIPS_PACRN_RD(x) ^ (v)))
bogdanm 82:6473597d706e 11467 #endif
bogdanm 82:6473597d706e 11468 //@}
bogdanm 82:6473597d706e 11469
bogdanm 82:6473597d706e 11470 /*
bogdanm 82:6473597d706e 11471 * Constants & macros for individual AIPS_PACRN bitfields
bogdanm 82:6473597d706e 11472 */
bogdanm 82:6473597d706e 11473
bogdanm 82:6473597d706e 11474 /*!
bogdanm 82:6473597d706e 11475 * @name Register AIPS_PACRN, field TP7[0] (RW)
bogdanm 82:6473597d706e 11476 *
bogdanm 82:6473597d706e 11477 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 11478 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 11479 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 11480 *
bogdanm 82:6473597d706e 11481 * Values:
bogdanm 82:6473597d706e 11482 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 11483 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 11484 */
bogdanm 82:6473597d706e 11485 //@{
bogdanm 82:6473597d706e 11486 #define BP_AIPS_PACRN_TP7 (0U) //!< Bit position for AIPS_PACRN_TP7.
bogdanm 82:6473597d706e 11487 #define BM_AIPS_PACRN_TP7 (0x00000001U) //!< Bit mask for AIPS_PACRN_TP7.
bogdanm 82:6473597d706e 11488 #define BS_AIPS_PACRN_TP7 (1U) //!< Bit field size in bits for AIPS_PACRN_TP7.
bogdanm 82:6473597d706e 11489
bogdanm 82:6473597d706e 11490 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11491 //! @brief Read current value of the AIPS_PACRN_TP7 field.
bogdanm 82:6473597d706e 11492 #define BR_AIPS_PACRN_TP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP7))
bogdanm 82:6473597d706e 11493 #endif
bogdanm 82:6473597d706e 11494
bogdanm 82:6473597d706e 11495 //! @brief Format value for bitfield AIPS_PACRN_TP7.
bogdanm 82:6473597d706e 11496 #define BF_AIPS_PACRN_TP7(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRN_TP7), uint32_t) & BM_AIPS_PACRN_TP7)
bogdanm 82:6473597d706e 11497
bogdanm 82:6473597d706e 11498 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11499 //! @brief Set the TP7 field to a new value.
bogdanm 82:6473597d706e 11500 #define BW_AIPS_PACRN_TP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP7) = (v))
bogdanm 82:6473597d706e 11501 #endif
bogdanm 82:6473597d706e 11502 //@}
bogdanm 82:6473597d706e 11503
bogdanm 82:6473597d706e 11504 /*!
bogdanm 82:6473597d706e 11505 * @name Register AIPS_PACRN, field WP7[1] (RW)
bogdanm 82:6473597d706e 11506 *
bogdanm 82:6473597d706e 11507 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 11508 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 11509 * and no peripheral access initiates.
bogdanm 82:6473597d706e 11510 *
bogdanm 82:6473597d706e 11511 * Values:
bogdanm 82:6473597d706e 11512 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 11513 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 11514 */
bogdanm 82:6473597d706e 11515 //@{
bogdanm 82:6473597d706e 11516 #define BP_AIPS_PACRN_WP7 (1U) //!< Bit position for AIPS_PACRN_WP7.
bogdanm 82:6473597d706e 11517 #define BM_AIPS_PACRN_WP7 (0x00000002U) //!< Bit mask for AIPS_PACRN_WP7.
bogdanm 82:6473597d706e 11518 #define BS_AIPS_PACRN_WP7 (1U) //!< Bit field size in bits for AIPS_PACRN_WP7.
bogdanm 82:6473597d706e 11519
bogdanm 82:6473597d706e 11520 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11521 //! @brief Read current value of the AIPS_PACRN_WP7 field.
bogdanm 82:6473597d706e 11522 #define BR_AIPS_PACRN_WP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP7))
bogdanm 82:6473597d706e 11523 #endif
bogdanm 82:6473597d706e 11524
bogdanm 82:6473597d706e 11525 //! @brief Format value for bitfield AIPS_PACRN_WP7.
bogdanm 82:6473597d706e 11526 #define BF_AIPS_PACRN_WP7(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRN_WP7), uint32_t) & BM_AIPS_PACRN_WP7)
bogdanm 82:6473597d706e 11527
bogdanm 82:6473597d706e 11528 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11529 //! @brief Set the WP7 field to a new value.
bogdanm 82:6473597d706e 11530 #define BW_AIPS_PACRN_WP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP7) = (v))
bogdanm 82:6473597d706e 11531 #endif
bogdanm 82:6473597d706e 11532 //@}
bogdanm 82:6473597d706e 11533
bogdanm 82:6473597d706e 11534 /*!
bogdanm 82:6473597d706e 11535 * @name Register AIPS_PACRN, field SP7[2] (RW)
bogdanm 82:6473597d706e 11536 *
bogdanm 82:6473597d706e 11537 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 11538 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 11539 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 11540 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 11541 * access initiates.
bogdanm 82:6473597d706e 11542 *
bogdanm 82:6473597d706e 11543 * Values:
bogdanm 82:6473597d706e 11544 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 11545 * accesses.
bogdanm 82:6473597d706e 11546 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 11547 */
bogdanm 82:6473597d706e 11548 //@{
bogdanm 82:6473597d706e 11549 #define BP_AIPS_PACRN_SP7 (2U) //!< Bit position for AIPS_PACRN_SP7.
bogdanm 82:6473597d706e 11550 #define BM_AIPS_PACRN_SP7 (0x00000004U) //!< Bit mask for AIPS_PACRN_SP7.
bogdanm 82:6473597d706e 11551 #define BS_AIPS_PACRN_SP7 (1U) //!< Bit field size in bits for AIPS_PACRN_SP7.
bogdanm 82:6473597d706e 11552
bogdanm 82:6473597d706e 11553 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11554 //! @brief Read current value of the AIPS_PACRN_SP7 field.
bogdanm 82:6473597d706e 11555 #define BR_AIPS_PACRN_SP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP7))
bogdanm 82:6473597d706e 11556 #endif
bogdanm 82:6473597d706e 11557
bogdanm 82:6473597d706e 11558 //! @brief Format value for bitfield AIPS_PACRN_SP7.
bogdanm 82:6473597d706e 11559 #define BF_AIPS_PACRN_SP7(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRN_SP7), uint32_t) & BM_AIPS_PACRN_SP7)
bogdanm 82:6473597d706e 11560
bogdanm 82:6473597d706e 11561 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11562 //! @brief Set the SP7 field to a new value.
bogdanm 82:6473597d706e 11563 #define BW_AIPS_PACRN_SP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP7) = (v))
bogdanm 82:6473597d706e 11564 #endif
bogdanm 82:6473597d706e 11565 //@}
bogdanm 82:6473597d706e 11566
bogdanm 82:6473597d706e 11567 /*!
bogdanm 82:6473597d706e 11568 * @name Register AIPS_PACRN, field TP6[4] (RW)
bogdanm 82:6473597d706e 11569 *
bogdanm 82:6473597d706e 11570 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 11571 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 11572 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 11573 *
bogdanm 82:6473597d706e 11574 * Values:
bogdanm 82:6473597d706e 11575 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 11576 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 11577 */
bogdanm 82:6473597d706e 11578 //@{
bogdanm 82:6473597d706e 11579 #define BP_AIPS_PACRN_TP6 (4U) //!< Bit position for AIPS_PACRN_TP6.
bogdanm 82:6473597d706e 11580 #define BM_AIPS_PACRN_TP6 (0x00000010U) //!< Bit mask for AIPS_PACRN_TP6.
bogdanm 82:6473597d706e 11581 #define BS_AIPS_PACRN_TP6 (1U) //!< Bit field size in bits for AIPS_PACRN_TP6.
bogdanm 82:6473597d706e 11582
bogdanm 82:6473597d706e 11583 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11584 //! @brief Read current value of the AIPS_PACRN_TP6 field.
bogdanm 82:6473597d706e 11585 #define BR_AIPS_PACRN_TP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP6))
bogdanm 82:6473597d706e 11586 #endif
bogdanm 82:6473597d706e 11587
bogdanm 82:6473597d706e 11588 //! @brief Format value for bitfield AIPS_PACRN_TP6.
bogdanm 82:6473597d706e 11589 #define BF_AIPS_PACRN_TP6(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRN_TP6), uint32_t) & BM_AIPS_PACRN_TP6)
bogdanm 82:6473597d706e 11590
bogdanm 82:6473597d706e 11591 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11592 //! @brief Set the TP6 field to a new value.
bogdanm 82:6473597d706e 11593 #define BW_AIPS_PACRN_TP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP6) = (v))
bogdanm 82:6473597d706e 11594 #endif
bogdanm 82:6473597d706e 11595 //@}
bogdanm 82:6473597d706e 11596
bogdanm 82:6473597d706e 11597 /*!
bogdanm 82:6473597d706e 11598 * @name Register AIPS_PACRN, field WP6[5] (RW)
bogdanm 82:6473597d706e 11599 *
bogdanm 82:6473597d706e 11600 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 11601 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 11602 * and no peripheral access initiates.
bogdanm 82:6473597d706e 11603 *
bogdanm 82:6473597d706e 11604 * Values:
bogdanm 82:6473597d706e 11605 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 11606 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 11607 */
bogdanm 82:6473597d706e 11608 //@{
bogdanm 82:6473597d706e 11609 #define BP_AIPS_PACRN_WP6 (5U) //!< Bit position for AIPS_PACRN_WP6.
bogdanm 82:6473597d706e 11610 #define BM_AIPS_PACRN_WP6 (0x00000020U) //!< Bit mask for AIPS_PACRN_WP6.
bogdanm 82:6473597d706e 11611 #define BS_AIPS_PACRN_WP6 (1U) //!< Bit field size in bits for AIPS_PACRN_WP6.
bogdanm 82:6473597d706e 11612
bogdanm 82:6473597d706e 11613 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11614 //! @brief Read current value of the AIPS_PACRN_WP6 field.
bogdanm 82:6473597d706e 11615 #define BR_AIPS_PACRN_WP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP6))
bogdanm 82:6473597d706e 11616 #endif
bogdanm 82:6473597d706e 11617
bogdanm 82:6473597d706e 11618 //! @brief Format value for bitfield AIPS_PACRN_WP6.
bogdanm 82:6473597d706e 11619 #define BF_AIPS_PACRN_WP6(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRN_WP6), uint32_t) & BM_AIPS_PACRN_WP6)
bogdanm 82:6473597d706e 11620
bogdanm 82:6473597d706e 11621 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11622 //! @brief Set the WP6 field to a new value.
bogdanm 82:6473597d706e 11623 #define BW_AIPS_PACRN_WP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP6) = (v))
bogdanm 82:6473597d706e 11624 #endif
bogdanm 82:6473597d706e 11625 //@}
bogdanm 82:6473597d706e 11626
bogdanm 82:6473597d706e 11627 /*!
bogdanm 82:6473597d706e 11628 * @name Register AIPS_PACRN, field SP6[6] (RW)
bogdanm 82:6473597d706e 11629 *
bogdanm 82:6473597d706e 11630 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 11631 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 11632 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 11633 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 11634 * access initiates.
bogdanm 82:6473597d706e 11635 *
bogdanm 82:6473597d706e 11636 * Values:
bogdanm 82:6473597d706e 11637 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 11638 * accesses.
bogdanm 82:6473597d706e 11639 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 11640 */
bogdanm 82:6473597d706e 11641 //@{
bogdanm 82:6473597d706e 11642 #define BP_AIPS_PACRN_SP6 (6U) //!< Bit position for AIPS_PACRN_SP6.
bogdanm 82:6473597d706e 11643 #define BM_AIPS_PACRN_SP6 (0x00000040U) //!< Bit mask for AIPS_PACRN_SP6.
bogdanm 82:6473597d706e 11644 #define BS_AIPS_PACRN_SP6 (1U) //!< Bit field size in bits for AIPS_PACRN_SP6.
bogdanm 82:6473597d706e 11645
bogdanm 82:6473597d706e 11646 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11647 //! @brief Read current value of the AIPS_PACRN_SP6 field.
bogdanm 82:6473597d706e 11648 #define BR_AIPS_PACRN_SP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP6))
bogdanm 82:6473597d706e 11649 #endif
bogdanm 82:6473597d706e 11650
bogdanm 82:6473597d706e 11651 //! @brief Format value for bitfield AIPS_PACRN_SP6.
bogdanm 82:6473597d706e 11652 #define BF_AIPS_PACRN_SP6(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRN_SP6), uint32_t) & BM_AIPS_PACRN_SP6)
bogdanm 82:6473597d706e 11653
bogdanm 82:6473597d706e 11654 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11655 //! @brief Set the SP6 field to a new value.
bogdanm 82:6473597d706e 11656 #define BW_AIPS_PACRN_SP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP6) = (v))
bogdanm 82:6473597d706e 11657 #endif
bogdanm 82:6473597d706e 11658 //@}
bogdanm 82:6473597d706e 11659
bogdanm 82:6473597d706e 11660 /*!
bogdanm 82:6473597d706e 11661 * @name Register AIPS_PACRN, field TP5[8] (RW)
bogdanm 82:6473597d706e 11662 *
bogdanm 82:6473597d706e 11663 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 11664 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 11665 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 11666 *
bogdanm 82:6473597d706e 11667 * Values:
bogdanm 82:6473597d706e 11668 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 11669 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 11670 */
bogdanm 82:6473597d706e 11671 //@{
bogdanm 82:6473597d706e 11672 #define BP_AIPS_PACRN_TP5 (8U) //!< Bit position for AIPS_PACRN_TP5.
bogdanm 82:6473597d706e 11673 #define BM_AIPS_PACRN_TP5 (0x00000100U) //!< Bit mask for AIPS_PACRN_TP5.
bogdanm 82:6473597d706e 11674 #define BS_AIPS_PACRN_TP5 (1U) //!< Bit field size in bits for AIPS_PACRN_TP5.
bogdanm 82:6473597d706e 11675
bogdanm 82:6473597d706e 11676 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11677 //! @brief Read current value of the AIPS_PACRN_TP5 field.
bogdanm 82:6473597d706e 11678 #define BR_AIPS_PACRN_TP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP5))
bogdanm 82:6473597d706e 11679 #endif
bogdanm 82:6473597d706e 11680
bogdanm 82:6473597d706e 11681 //! @brief Format value for bitfield AIPS_PACRN_TP5.
bogdanm 82:6473597d706e 11682 #define BF_AIPS_PACRN_TP5(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRN_TP5), uint32_t) & BM_AIPS_PACRN_TP5)
bogdanm 82:6473597d706e 11683
bogdanm 82:6473597d706e 11684 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11685 //! @brief Set the TP5 field to a new value.
bogdanm 82:6473597d706e 11686 #define BW_AIPS_PACRN_TP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP5) = (v))
bogdanm 82:6473597d706e 11687 #endif
bogdanm 82:6473597d706e 11688 //@}
bogdanm 82:6473597d706e 11689
bogdanm 82:6473597d706e 11690 /*!
bogdanm 82:6473597d706e 11691 * @name Register AIPS_PACRN, field WP5[9] (RW)
bogdanm 82:6473597d706e 11692 *
bogdanm 82:6473597d706e 11693 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 11694 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 11695 * and no peripheral access initiates.
bogdanm 82:6473597d706e 11696 *
bogdanm 82:6473597d706e 11697 * Values:
bogdanm 82:6473597d706e 11698 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 11699 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 11700 */
bogdanm 82:6473597d706e 11701 //@{
bogdanm 82:6473597d706e 11702 #define BP_AIPS_PACRN_WP5 (9U) //!< Bit position for AIPS_PACRN_WP5.
bogdanm 82:6473597d706e 11703 #define BM_AIPS_PACRN_WP5 (0x00000200U) //!< Bit mask for AIPS_PACRN_WP5.
bogdanm 82:6473597d706e 11704 #define BS_AIPS_PACRN_WP5 (1U) //!< Bit field size in bits for AIPS_PACRN_WP5.
bogdanm 82:6473597d706e 11705
bogdanm 82:6473597d706e 11706 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11707 //! @brief Read current value of the AIPS_PACRN_WP5 field.
bogdanm 82:6473597d706e 11708 #define BR_AIPS_PACRN_WP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP5))
bogdanm 82:6473597d706e 11709 #endif
bogdanm 82:6473597d706e 11710
bogdanm 82:6473597d706e 11711 //! @brief Format value for bitfield AIPS_PACRN_WP5.
bogdanm 82:6473597d706e 11712 #define BF_AIPS_PACRN_WP5(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRN_WP5), uint32_t) & BM_AIPS_PACRN_WP5)
bogdanm 82:6473597d706e 11713
bogdanm 82:6473597d706e 11714 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11715 //! @brief Set the WP5 field to a new value.
bogdanm 82:6473597d706e 11716 #define BW_AIPS_PACRN_WP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP5) = (v))
bogdanm 82:6473597d706e 11717 #endif
bogdanm 82:6473597d706e 11718 //@}
bogdanm 82:6473597d706e 11719
bogdanm 82:6473597d706e 11720 /*!
bogdanm 82:6473597d706e 11721 * @name Register AIPS_PACRN, field SP5[10] (RW)
bogdanm 82:6473597d706e 11722 *
bogdanm 82:6473597d706e 11723 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 11724 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 11725 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 11726 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 11727 * access initiates.
bogdanm 82:6473597d706e 11728 *
bogdanm 82:6473597d706e 11729 * Values:
bogdanm 82:6473597d706e 11730 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 11731 * accesses.
bogdanm 82:6473597d706e 11732 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 11733 */
bogdanm 82:6473597d706e 11734 //@{
bogdanm 82:6473597d706e 11735 #define BP_AIPS_PACRN_SP5 (10U) //!< Bit position for AIPS_PACRN_SP5.
bogdanm 82:6473597d706e 11736 #define BM_AIPS_PACRN_SP5 (0x00000400U) //!< Bit mask for AIPS_PACRN_SP5.
bogdanm 82:6473597d706e 11737 #define BS_AIPS_PACRN_SP5 (1U) //!< Bit field size in bits for AIPS_PACRN_SP5.
bogdanm 82:6473597d706e 11738
bogdanm 82:6473597d706e 11739 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11740 //! @brief Read current value of the AIPS_PACRN_SP5 field.
bogdanm 82:6473597d706e 11741 #define BR_AIPS_PACRN_SP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP5))
bogdanm 82:6473597d706e 11742 #endif
bogdanm 82:6473597d706e 11743
bogdanm 82:6473597d706e 11744 //! @brief Format value for bitfield AIPS_PACRN_SP5.
bogdanm 82:6473597d706e 11745 #define BF_AIPS_PACRN_SP5(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRN_SP5), uint32_t) & BM_AIPS_PACRN_SP5)
bogdanm 82:6473597d706e 11746
bogdanm 82:6473597d706e 11747 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11748 //! @brief Set the SP5 field to a new value.
bogdanm 82:6473597d706e 11749 #define BW_AIPS_PACRN_SP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP5) = (v))
bogdanm 82:6473597d706e 11750 #endif
bogdanm 82:6473597d706e 11751 //@}
bogdanm 82:6473597d706e 11752
bogdanm 82:6473597d706e 11753 /*!
bogdanm 82:6473597d706e 11754 * @name Register AIPS_PACRN, field TP4[12] (RW)
bogdanm 82:6473597d706e 11755 *
bogdanm 82:6473597d706e 11756 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 11757 * When this bit is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 11758 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 11759 *
bogdanm 82:6473597d706e 11760 * Values:
bogdanm 82:6473597d706e 11761 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 11762 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 11763 */
bogdanm 82:6473597d706e 11764 //@{
bogdanm 82:6473597d706e 11765 #define BP_AIPS_PACRN_TP4 (12U) //!< Bit position for AIPS_PACRN_TP4.
bogdanm 82:6473597d706e 11766 #define BM_AIPS_PACRN_TP4 (0x00001000U) //!< Bit mask for AIPS_PACRN_TP4.
bogdanm 82:6473597d706e 11767 #define BS_AIPS_PACRN_TP4 (1U) //!< Bit field size in bits for AIPS_PACRN_TP4.
bogdanm 82:6473597d706e 11768
bogdanm 82:6473597d706e 11769 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11770 //! @brief Read current value of the AIPS_PACRN_TP4 field.
bogdanm 82:6473597d706e 11771 #define BR_AIPS_PACRN_TP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP4))
bogdanm 82:6473597d706e 11772 #endif
bogdanm 82:6473597d706e 11773
bogdanm 82:6473597d706e 11774 //! @brief Format value for bitfield AIPS_PACRN_TP4.
bogdanm 82:6473597d706e 11775 #define BF_AIPS_PACRN_TP4(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRN_TP4), uint32_t) & BM_AIPS_PACRN_TP4)
bogdanm 82:6473597d706e 11776
bogdanm 82:6473597d706e 11777 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11778 //! @brief Set the TP4 field to a new value.
bogdanm 82:6473597d706e 11779 #define BW_AIPS_PACRN_TP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP4) = (v))
bogdanm 82:6473597d706e 11780 #endif
bogdanm 82:6473597d706e 11781 //@}
bogdanm 82:6473597d706e 11782
bogdanm 82:6473597d706e 11783 /*!
bogdanm 82:6473597d706e 11784 * @name Register AIPS_PACRN, field WP4[13] (RW)
bogdanm 82:6473597d706e 11785 *
bogdanm 82:6473597d706e 11786 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 11787 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 11788 * and no peripheral access initiates.
bogdanm 82:6473597d706e 11789 *
bogdanm 82:6473597d706e 11790 * Values:
bogdanm 82:6473597d706e 11791 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 11792 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 11793 */
bogdanm 82:6473597d706e 11794 //@{
bogdanm 82:6473597d706e 11795 #define BP_AIPS_PACRN_WP4 (13U) //!< Bit position for AIPS_PACRN_WP4.
bogdanm 82:6473597d706e 11796 #define BM_AIPS_PACRN_WP4 (0x00002000U) //!< Bit mask for AIPS_PACRN_WP4.
bogdanm 82:6473597d706e 11797 #define BS_AIPS_PACRN_WP4 (1U) //!< Bit field size in bits for AIPS_PACRN_WP4.
bogdanm 82:6473597d706e 11798
bogdanm 82:6473597d706e 11799 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11800 //! @brief Read current value of the AIPS_PACRN_WP4 field.
bogdanm 82:6473597d706e 11801 #define BR_AIPS_PACRN_WP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP4))
bogdanm 82:6473597d706e 11802 #endif
bogdanm 82:6473597d706e 11803
bogdanm 82:6473597d706e 11804 //! @brief Format value for bitfield AIPS_PACRN_WP4.
bogdanm 82:6473597d706e 11805 #define BF_AIPS_PACRN_WP4(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRN_WP4), uint32_t) & BM_AIPS_PACRN_WP4)
bogdanm 82:6473597d706e 11806
bogdanm 82:6473597d706e 11807 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11808 //! @brief Set the WP4 field to a new value.
bogdanm 82:6473597d706e 11809 #define BW_AIPS_PACRN_WP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP4) = (v))
bogdanm 82:6473597d706e 11810 #endif
bogdanm 82:6473597d706e 11811 //@}
bogdanm 82:6473597d706e 11812
bogdanm 82:6473597d706e 11813 /*!
bogdanm 82:6473597d706e 11814 * @name Register AIPS_PACRN, field SP4[14] (RW)
bogdanm 82:6473597d706e 11815 *
bogdanm 82:6473597d706e 11816 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 11817 * access. When this bit is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 11818 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
bogdanm 82:6473597d706e 11819 * set. If not, access terminates with an error response and no peripheral access
bogdanm 82:6473597d706e 11820 * initiates.
bogdanm 82:6473597d706e 11821 *
bogdanm 82:6473597d706e 11822 * Values:
bogdanm 82:6473597d706e 11823 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 11824 * accesses.
bogdanm 82:6473597d706e 11825 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 11826 */
bogdanm 82:6473597d706e 11827 //@{
bogdanm 82:6473597d706e 11828 #define BP_AIPS_PACRN_SP4 (14U) //!< Bit position for AIPS_PACRN_SP4.
bogdanm 82:6473597d706e 11829 #define BM_AIPS_PACRN_SP4 (0x00004000U) //!< Bit mask for AIPS_PACRN_SP4.
bogdanm 82:6473597d706e 11830 #define BS_AIPS_PACRN_SP4 (1U) //!< Bit field size in bits for AIPS_PACRN_SP4.
bogdanm 82:6473597d706e 11831
bogdanm 82:6473597d706e 11832 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11833 //! @brief Read current value of the AIPS_PACRN_SP4 field.
bogdanm 82:6473597d706e 11834 #define BR_AIPS_PACRN_SP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP4))
bogdanm 82:6473597d706e 11835 #endif
bogdanm 82:6473597d706e 11836
bogdanm 82:6473597d706e 11837 //! @brief Format value for bitfield AIPS_PACRN_SP4.
bogdanm 82:6473597d706e 11838 #define BF_AIPS_PACRN_SP4(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRN_SP4), uint32_t) & BM_AIPS_PACRN_SP4)
bogdanm 82:6473597d706e 11839
bogdanm 82:6473597d706e 11840 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11841 //! @brief Set the SP4 field to a new value.
bogdanm 82:6473597d706e 11842 #define BW_AIPS_PACRN_SP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP4) = (v))
bogdanm 82:6473597d706e 11843 #endif
bogdanm 82:6473597d706e 11844 //@}
bogdanm 82:6473597d706e 11845
bogdanm 82:6473597d706e 11846 /*!
bogdanm 82:6473597d706e 11847 * @name Register AIPS_PACRN, field TP3[16] (RW)
bogdanm 82:6473597d706e 11848 *
bogdanm 82:6473597d706e 11849 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 11850 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 11851 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 11852 *
bogdanm 82:6473597d706e 11853 * Values:
bogdanm 82:6473597d706e 11854 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 11855 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 11856 */
bogdanm 82:6473597d706e 11857 //@{
bogdanm 82:6473597d706e 11858 #define BP_AIPS_PACRN_TP3 (16U) //!< Bit position for AIPS_PACRN_TP3.
bogdanm 82:6473597d706e 11859 #define BM_AIPS_PACRN_TP3 (0x00010000U) //!< Bit mask for AIPS_PACRN_TP3.
bogdanm 82:6473597d706e 11860 #define BS_AIPS_PACRN_TP3 (1U) //!< Bit field size in bits for AIPS_PACRN_TP3.
bogdanm 82:6473597d706e 11861
bogdanm 82:6473597d706e 11862 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11863 //! @brief Read current value of the AIPS_PACRN_TP3 field.
bogdanm 82:6473597d706e 11864 #define BR_AIPS_PACRN_TP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP3))
bogdanm 82:6473597d706e 11865 #endif
bogdanm 82:6473597d706e 11866
bogdanm 82:6473597d706e 11867 //! @brief Format value for bitfield AIPS_PACRN_TP3.
bogdanm 82:6473597d706e 11868 #define BF_AIPS_PACRN_TP3(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRN_TP3), uint32_t) & BM_AIPS_PACRN_TP3)
bogdanm 82:6473597d706e 11869
bogdanm 82:6473597d706e 11870 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11871 //! @brief Set the TP3 field to a new value.
bogdanm 82:6473597d706e 11872 #define BW_AIPS_PACRN_TP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP3) = (v))
bogdanm 82:6473597d706e 11873 #endif
bogdanm 82:6473597d706e 11874 //@}
bogdanm 82:6473597d706e 11875
bogdanm 82:6473597d706e 11876 /*!
bogdanm 82:6473597d706e 11877 * @name Register AIPS_PACRN, field WP3[17] (RW)
bogdanm 82:6473597d706e 11878 *
bogdanm 82:6473597d706e 11879 * Determines whether the peripheral allows write accesss. When this bit is set
bogdanm 82:6473597d706e 11880 * and a write access is attempted, access terminates with an error response and
bogdanm 82:6473597d706e 11881 * no peripheral access initiates.
bogdanm 82:6473597d706e 11882 *
bogdanm 82:6473597d706e 11883 * Values:
bogdanm 82:6473597d706e 11884 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 11885 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 11886 */
bogdanm 82:6473597d706e 11887 //@{
bogdanm 82:6473597d706e 11888 #define BP_AIPS_PACRN_WP3 (17U) //!< Bit position for AIPS_PACRN_WP3.
bogdanm 82:6473597d706e 11889 #define BM_AIPS_PACRN_WP3 (0x00020000U) //!< Bit mask for AIPS_PACRN_WP3.
bogdanm 82:6473597d706e 11890 #define BS_AIPS_PACRN_WP3 (1U) //!< Bit field size in bits for AIPS_PACRN_WP3.
bogdanm 82:6473597d706e 11891
bogdanm 82:6473597d706e 11892 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11893 //! @brief Read current value of the AIPS_PACRN_WP3 field.
bogdanm 82:6473597d706e 11894 #define BR_AIPS_PACRN_WP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP3))
bogdanm 82:6473597d706e 11895 #endif
bogdanm 82:6473597d706e 11896
bogdanm 82:6473597d706e 11897 //! @brief Format value for bitfield AIPS_PACRN_WP3.
bogdanm 82:6473597d706e 11898 #define BF_AIPS_PACRN_WP3(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRN_WP3), uint32_t) & BM_AIPS_PACRN_WP3)
bogdanm 82:6473597d706e 11899
bogdanm 82:6473597d706e 11900 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11901 //! @brief Set the WP3 field to a new value.
bogdanm 82:6473597d706e 11902 #define BW_AIPS_PACRN_WP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP3) = (v))
bogdanm 82:6473597d706e 11903 #endif
bogdanm 82:6473597d706e 11904 //@}
bogdanm 82:6473597d706e 11905
bogdanm 82:6473597d706e 11906 /*!
bogdanm 82:6473597d706e 11907 * @name Register AIPS_PACRN, field SP3[18] (RW)
bogdanm 82:6473597d706e 11908 *
bogdanm 82:6473597d706e 11909 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 11910 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 11911 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 11912 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 11913 * access initiates.
bogdanm 82:6473597d706e 11914 *
bogdanm 82:6473597d706e 11915 * Values:
bogdanm 82:6473597d706e 11916 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 11917 * accesses.
bogdanm 82:6473597d706e 11918 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 11919 */
bogdanm 82:6473597d706e 11920 //@{
bogdanm 82:6473597d706e 11921 #define BP_AIPS_PACRN_SP3 (18U) //!< Bit position for AIPS_PACRN_SP3.
bogdanm 82:6473597d706e 11922 #define BM_AIPS_PACRN_SP3 (0x00040000U) //!< Bit mask for AIPS_PACRN_SP3.
bogdanm 82:6473597d706e 11923 #define BS_AIPS_PACRN_SP3 (1U) //!< Bit field size in bits for AIPS_PACRN_SP3.
bogdanm 82:6473597d706e 11924
bogdanm 82:6473597d706e 11925 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11926 //! @brief Read current value of the AIPS_PACRN_SP3 field.
bogdanm 82:6473597d706e 11927 #define BR_AIPS_PACRN_SP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP3))
bogdanm 82:6473597d706e 11928 #endif
bogdanm 82:6473597d706e 11929
bogdanm 82:6473597d706e 11930 //! @brief Format value for bitfield AIPS_PACRN_SP3.
bogdanm 82:6473597d706e 11931 #define BF_AIPS_PACRN_SP3(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRN_SP3), uint32_t) & BM_AIPS_PACRN_SP3)
bogdanm 82:6473597d706e 11932
bogdanm 82:6473597d706e 11933 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11934 //! @brief Set the SP3 field to a new value.
bogdanm 82:6473597d706e 11935 #define BW_AIPS_PACRN_SP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP3) = (v))
bogdanm 82:6473597d706e 11936 #endif
bogdanm 82:6473597d706e 11937 //@}
bogdanm 82:6473597d706e 11938
bogdanm 82:6473597d706e 11939 /*!
bogdanm 82:6473597d706e 11940 * @name Register AIPS_PACRN, field TP2[20] (RW)
bogdanm 82:6473597d706e 11941 *
bogdanm 82:6473597d706e 11942 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 11943 * When this bit is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 11944 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 11945 *
bogdanm 82:6473597d706e 11946 * Values:
bogdanm 82:6473597d706e 11947 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 11948 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 11949 */
bogdanm 82:6473597d706e 11950 //@{
bogdanm 82:6473597d706e 11951 #define BP_AIPS_PACRN_TP2 (20U) //!< Bit position for AIPS_PACRN_TP2.
bogdanm 82:6473597d706e 11952 #define BM_AIPS_PACRN_TP2 (0x00100000U) //!< Bit mask for AIPS_PACRN_TP2.
bogdanm 82:6473597d706e 11953 #define BS_AIPS_PACRN_TP2 (1U) //!< Bit field size in bits for AIPS_PACRN_TP2.
bogdanm 82:6473597d706e 11954
bogdanm 82:6473597d706e 11955 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11956 //! @brief Read current value of the AIPS_PACRN_TP2 field.
bogdanm 82:6473597d706e 11957 #define BR_AIPS_PACRN_TP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP2))
bogdanm 82:6473597d706e 11958 #endif
bogdanm 82:6473597d706e 11959
bogdanm 82:6473597d706e 11960 //! @brief Format value for bitfield AIPS_PACRN_TP2.
bogdanm 82:6473597d706e 11961 #define BF_AIPS_PACRN_TP2(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRN_TP2), uint32_t) & BM_AIPS_PACRN_TP2)
bogdanm 82:6473597d706e 11962
bogdanm 82:6473597d706e 11963 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11964 //! @brief Set the TP2 field to a new value.
bogdanm 82:6473597d706e 11965 #define BW_AIPS_PACRN_TP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP2) = (v))
bogdanm 82:6473597d706e 11966 #endif
bogdanm 82:6473597d706e 11967 //@}
bogdanm 82:6473597d706e 11968
bogdanm 82:6473597d706e 11969 /*!
bogdanm 82:6473597d706e 11970 * @name Register AIPS_PACRN, field WP2[21] (RW)
bogdanm 82:6473597d706e 11971 *
bogdanm 82:6473597d706e 11972 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 11973 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 11974 * and no peripheral access initiates.
bogdanm 82:6473597d706e 11975 *
bogdanm 82:6473597d706e 11976 * Values:
bogdanm 82:6473597d706e 11977 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 11978 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 11979 */
bogdanm 82:6473597d706e 11980 //@{
bogdanm 82:6473597d706e 11981 #define BP_AIPS_PACRN_WP2 (21U) //!< Bit position for AIPS_PACRN_WP2.
bogdanm 82:6473597d706e 11982 #define BM_AIPS_PACRN_WP2 (0x00200000U) //!< Bit mask for AIPS_PACRN_WP2.
bogdanm 82:6473597d706e 11983 #define BS_AIPS_PACRN_WP2 (1U) //!< Bit field size in bits for AIPS_PACRN_WP2.
bogdanm 82:6473597d706e 11984
bogdanm 82:6473597d706e 11985 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11986 //! @brief Read current value of the AIPS_PACRN_WP2 field.
bogdanm 82:6473597d706e 11987 #define BR_AIPS_PACRN_WP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP2))
bogdanm 82:6473597d706e 11988 #endif
bogdanm 82:6473597d706e 11989
bogdanm 82:6473597d706e 11990 //! @brief Format value for bitfield AIPS_PACRN_WP2.
bogdanm 82:6473597d706e 11991 #define BF_AIPS_PACRN_WP2(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRN_WP2), uint32_t) & BM_AIPS_PACRN_WP2)
bogdanm 82:6473597d706e 11992
bogdanm 82:6473597d706e 11993 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 11994 //! @brief Set the WP2 field to a new value.
bogdanm 82:6473597d706e 11995 #define BW_AIPS_PACRN_WP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP2) = (v))
bogdanm 82:6473597d706e 11996 #endif
bogdanm 82:6473597d706e 11997 //@}
bogdanm 82:6473597d706e 11998
bogdanm 82:6473597d706e 11999 /*!
bogdanm 82:6473597d706e 12000 * @name Register AIPS_PACRN, field SP2[22] (RW)
bogdanm 82:6473597d706e 12001 *
bogdanm 82:6473597d706e 12002 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 12003 * access. When this bit is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 12004 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
bogdanm 82:6473597d706e 12005 * set. If not, access terminates with an error response and no peripheral access
bogdanm 82:6473597d706e 12006 * initiates.
bogdanm 82:6473597d706e 12007 *
bogdanm 82:6473597d706e 12008 * Values:
bogdanm 82:6473597d706e 12009 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 12010 * accesses.
bogdanm 82:6473597d706e 12011 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 12012 */
bogdanm 82:6473597d706e 12013 //@{
bogdanm 82:6473597d706e 12014 #define BP_AIPS_PACRN_SP2 (22U) //!< Bit position for AIPS_PACRN_SP2.
bogdanm 82:6473597d706e 12015 #define BM_AIPS_PACRN_SP2 (0x00400000U) //!< Bit mask for AIPS_PACRN_SP2.
bogdanm 82:6473597d706e 12016 #define BS_AIPS_PACRN_SP2 (1U) //!< Bit field size in bits for AIPS_PACRN_SP2.
bogdanm 82:6473597d706e 12017
bogdanm 82:6473597d706e 12018 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12019 //! @brief Read current value of the AIPS_PACRN_SP2 field.
bogdanm 82:6473597d706e 12020 #define BR_AIPS_PACRN_SP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP2))
bogdanm 82:6473597d706e 12021 #endif
bogdanm 82:6473597d706e 12022
bogdanm 82:6473597d706e 12023 //! @brief Format value for bitfield AIPS_PACRN_SP2.
bogdanm 82:6473597d706e 12024 #define BF_AIPS_PACRN_SP2(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRN_SP2), uint32_t) & BM_AIPS_PACRN_SP2)
bogdanm 82:6473597d706e 12025
bogdanm 82:6473597d706e 12026 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12027 //! @brief Set the SP2 field to a new value.
bogdanm 82:6473597d706e 12028 #define BW_AIPS_PACRN_SP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP2) = (v))
bogdanm 82:6473597d706e 12029 #endif
bogdanm 82:6473597d706e 12030 //@}
bogdanm 82:6473597d706e 12031
bogdanm 82:6473597d706e 12032 /*!
bogdanm 82:6473597d706e 12033 * @name Register AIPS_PACRN, field TP1[24] (RW)
bogdanm 82:6473597d706e 12034 *
bogdanm 82:6473597d706e 12035 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 12036 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 12037 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 12038 *
bogdanm 82:6473597d706e 12039 * Values:
bogdanm 82:6473597d706e 12040 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 12041 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 12042 */
bogdanm 82:6473597d706e 12043 //@{
bogdanm 82:6473597d706e 12044 #define BP_AIPS_PACRN_TP1 (24U) //!< Bit position for AIPS_PACRN_TP1.
bogdanm 82:6473597d706e 12045 #define BM_AIPS_PACRN_TP1 (0x01000000U) //!< Bit mask for AIPS_PACRN_TP1.
bogdanm 82:6473597d706e 12046 #define BS_AIPS_PACRN_TP1 (1U) //!< Bit field size in bits for AIPS_PACRN_TP1.
bogdanm 82:6473597d706e 12047
bogdanm 82:6473597d706e 12048 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12049 //! @brief Read current value of the AIPS_PACRN_TP1 field.
bogdanm 82:6473597d706e 12050 #define BR_AIPS_PACRN_TP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP1))
bogdanm 82:6473597d706e 12051 #endif
bogdanm 82:6473597d706e 12052
bogdanm 82:6473597d706e 12053 //! @brief Format value for bitfield AIPS_PACRN_TP1.
bogdanm 82:6473597d706e 12054 #define BF_AIPS_PACRN_TP1(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRN_TP1), uint32_t) & BM_AIPS_PACRN_TP1)
bogdanm 82:6473597d706e 12055
bogdanm 82:6473597d706e 12056 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12057 //! @brief Set the TP1 field to a new value.
bogdanm 82:6473597d706e 12058 #define BW_AIPS_PACRN_TP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP1) = (v))
bogdanm 82:6473597d706e 12059 #endif
bogdanm 82:6473597d706e 12060 //@}
bogdanm 82:6473597d706e 12061
bogdanm 82:6473597d706e 12062 /*!
bogdanm 82:6473597d706e 12063 * @name Register AIPS_PACRN, field WP1[25] (RW)
bogdanm 82:6473597d706e 12064 *
bogdanm 82:6473597d706e 12065 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 12066 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 12067 * and no peripheral access initiates.
bogdanm 82:6473597d706e 12068 *
bogdanm 82:6473597d706e 12069 * Values:
bogdanm 82:6473597d706e 12070 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 12071 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 12072 */
bogdanm 82:6473597d706e 12073 //@{
bogdanm 82:6473597d706e 12074 #define BP_AIPS_PACRN_WP1 (25U) //!< Bit position for AIPS_PACRN_WP1.
bogdanm 82:6473597d706e 12075 #define BM_AIPS_PACRN_WP1 (0x02000000U) //!< Bit mask for AIPS_PACRN_WP1.
bogdanm 82:6473597d706e 12076 #define BS_AIPS_PACRN_WP1 (1U) //!< Bit field size in bits for AIPS_PACRN_WP1.
bogdanm 82:6473597d706e 12077
bogdanm 82:6473597d706e 12078 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12079 //! @brief Read current value of the AIPS_PACRN_WP1 field.
bogdanm 82:6473597d706e 12080 #define BR_AIPS_PACRN_WP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP1))
bogdanm 82:6473597d706e 12081 #endif
bogdanm 82:6473597d706e 12082
bogdanm 82:6473597d706e 12083 //! @brief Format value for bitfield AIPS_PACRN_WP1.
bogdanm 82:6473597d706e 12084 #define BF_AIPS_PACRN_WP1(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRN_WP1), uint32_t) & BM_AIPS_PACRN_WP1)
bogdanm 82:6473597d706e 12085
bogdanm 82:6473597d706e 12086 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12087 //! @brief Set the WP1 field to a new value.
bogdanm 82:6473597d706e 12088 #define BW_AIPS_PACRN_WP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP1) = (v))
bogdanm 82:6473597d706e 12089 #endif
bogdanm 82:6473597d706e 12090 //@}
bogdanm 82:6473597d706e 12091
bogdanm 82:6473597d706e 12092 /*!
bogdanm 82:6473597d706e 12093 * @name Register AIPS_PACRN, field SP1[26] (RW)
bogdanm 82:6473597d706e 12094 *
bogdanm 82:6473597d706e 12095 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 12096 * access. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 12097 * supervisor access attribute, and the MPRx[MPLn] control field for the master must
bogdanm 82:6473597d706e 12098 * be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 12099 * access initiates.
bogdanm 82:6473597d706e 12100 *
bogdanm 82:6473597d706e 12101 * Values:
bogdanm 82:6473597d706e 12102 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 12103 * accesses.
bogdanm 82:6473597d706e 12104 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 12105 */
bogdanm 82:6473597d706e 12106 //@{
bogdanm 82:6473597d706e 12107 #define BP_AIPS_PACRN_SP1 (26U) //!< Bit position for AIPS_PACRN_SP1.
bogdanm 82:6473597d706e 12108 #define BM_AIPS_PACRN_SP1 (0x04000000U) //!< Bit mask for AIPS_PACRN_SP1.
bogdanm 82:6473597d706e 12109 #define BS_AIPS_PACRN_SP1 (1U) //!< Bit field size in bits for AIPS_PACRN_SP1.
bogdanm 82:6473597d706e 12110
bogdanm 82:6473597d706e 12111 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12112 //! @brief Read current value of the AIPS_PACRN_SP1 field.
bogdanm 82:6473597d706e 12113 #define BR_AIPS_PACRN_SP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP1))
bogdanm 82:6473597d706e 12114 #endif
bogdanm 82:6473597d706e 12115
bogdanm 82:6473597d706e 12116 //! @brief Format value for bitfield AIPS_PACRN_SP1.
bogdanm 82:6473597d706e 12117 #define BF_AIPS_PACRN_SP1(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRN_SP1), uint32_t) & BM_AIPS_PACRN_SP1)
bogdanm 82:6473597d706e 12118
bogdanm 82:6473597d706e 12119 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12120 //! @brief Set the SP1 field to a new value.
bogdanm 82:6473597d706e 12121 #define BW_AIPS_PACRN_SP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP1) = (v))
bogdanm 82:6473597d706e 12122 #endif
bogdanm 82:6473597d706e 12123 //@}
bogdanm 82:6473597d706e 12124
bogdanm 82:6473597d706e 12125 /*!
bogdanm 82:6473597d706e 12126 * @name Register AIPS_PACRN, field TP0[28] (RW)
bogdanm 82:6473597d706e 12127 *
bogdanm 82:6473597d706e 12128 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 12129 * When this bit is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 12130 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 12131 *
bogdanm 82:6473597d706e 12132 * Values:
bogdanm 82:6473597d706e 12133 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 12134 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 12135 */
bogdanm 82:6473597d706e 12136 //@{
bogdanm 82:6473597d706e 12137 #define BP_AIPS_PACRN_TP0 (28U) //!< Bit position for AIPS_PACRN_TP0.
bogdanm 82:6473597d706e 12138 #define BM_AIPS_PACRN_TP0 (0x10000000U) //!< Bit mask for AIPS_PACRN_TP0.
bogdanm 82:6473597d706e 12139 #define BS_AIPS_PACRN_TP0 (1U) //!< Bit field size in bits for AIPS_PACRN_TP0.
bogdanm 82:6473597d706e 12140
bogdanm 82:6473597d706e 12141 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12142 //! @brief Read current value of the AIPS_PACRN_TP0 field.
bogdanm 82:6473597d706e 12143 #define BR_AIPS_PACRN_TP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP0))
bogdanm 82:6473597d706e 12144 #endif
bogdanm 82:6473597d706e 12145
bogdanm 82:6473597d706e 12146 //! @brief Format value for bitfield AIPS_PACRN_TP0.
bogdanm 82:6473597d706e 12147 #define BF_AIPS_PACRN_TP0(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRN_TP0), uint32_t) & BM_AIPS_PACRN_TP0)
bogdanm 82:6473597d706e 12148
bogdanm 82:6473597d706e 12149 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12150 //! @brief Set the TP0 field to a new value.
bogdanm 82:6473597d706e 12151 #define BW_AIPS_PACRN_TP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_TP0) = (v))
bogdanm 82:6473597d706e 12152 #endif
bogdanm 82:6473597d706e 12153 //@}
bogdanm 82:6473597d706e 12154
bogdanm 82:6473597d706e 12155 /*!
bogdanm 82:6473597d706e 12156 * @name Register AIPS_PACRN, field WP0[29] (RW)
bogdanm 82:6473597d706e 12157 *
bogdanm 82:6473597d706e 12158 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 12159 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 12160 * and no peripheral access initiates.
bogdanm 82:6473597d706e 12161 *
bogdanm 82:6473597d706e 12162 * Values:
bogdanm 82:6473597d706e 12163 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 12164 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 12165 */
bogdanm 82:6473597d706e 12166 //@{
bogdanm 82:6473597d706e 12167 #define BP_AIPS_PACRN_WP0 (29U) //!< Bit position for AIPS_PACRN_WP0.
bogdanm 82:6473597d706e 12168 #define BM_AIPS_PACRN_WP0 (0x20000000U) //!< Bit mask for AIPS_PACRN_WP0.
bogdanm 82:6473597d706e 12169 #define BS_AIPS_PACRN_WP0 (1U) //!< Bit field size in bits for AIPS_PACRN_WP0.
bogdanm 82:6473597d706e 12170
bogdanm 82:6473597d706e 12171 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12172 //! @brief Read current value of the AIPS_PACRN_WP0 field.
bogdanm 82:6473597d706e 12173 #define BR_AIPS_PACRN_WP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP0))
bogdanm 82:6473597d706e 12174 #endif
bogdanm 82:6473597d706e 12175
bogdanm 82:6473597d706e 12176 //! @brief Format value for bitfield AIPS_PACRN_WP0.
bogdanm 82:6473597d706e 12177 #define BF_AIPS_PACRN_WP0(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRN_WP0), uint32_t) & BM_AIPS_PACRN_WP0)
bogdanm 82:6473597d706e 12178
bogdanm 82:6473597d706e 12179 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12180 //! @brief Set the WP0 field to a new value.
bogdanm 82:6473597d706e 12181 #define BW_AIPS_PACRN_WP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_WP0) = (v))
bogdanm 82:6473597d706e 12182 #endif
bogdanm 82:6473597d706e 12183 //@}
bogdanm 82:6473597d706e 12184
bogdanm 82:6473597d706e 12185 /*!
bogdanm 82:6473597d706e 12186 * @name Register AIPS_PACRN, field SP0[30] (RW)
bogdanm 82:6473597d706e 12187 *
bogdanm 82:6473597d706e 12188 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 12189 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 12190 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 12191 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 12192 * access initiates.
bogdanm 82:6473597d706e 12193 *
bogdanm 82:6473597d706e 12194 * Values:
bogdanm 82:6473597d706e 12195 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 12196 * accesses.
bogdanm 82:6473597d706e 12197 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 12198 */
bogdanm 82:6473597d706e 12199 //@{
bogdanm 82:6473597d706e 12200 #define BP_AIPS_PACRN_SP0 (30U) //!< Bit position for AIPS_PACRN_SP0.
bogdanm 82:6473597d706e 12201 #define BM_AIPS_PACRN_SP0 (0x40000000U) //!< Bit mask for AIPS_PACRN_SP0.
bogdanm 82:6473597d706e 12202 #define BS_AIPS_PACRN_SP0 (1U) //!< Bit field size in bits for AIPS_PACRN_SP0.
bogdanm 82:6473597d706e 12203
bogdanm 82:6473597d706e 12204 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12205 //! @brief Read current value of the AIPS_PACRN_SP0 field.
bogdanm 82:6473597d706e 12206 #define BR_AIPS_PACRN_SP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP0))
bogdanm 82:6473597d706e 12207 #endif
bogdanm 82:6473597d706e 12208
bogdanm 82:6473597d706e 12209 //! @brief Format value for bitfield AIPS_PACRN_SP0.
bogdanm 82:6473597d706e 12210 #define BF_AIPS_PACRN_SP0(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRN_SP0), uint32_t) & BM_AIPS_PACRN_SP0)
bogdanm 82:6473597d706e 12211
bogdanm 82:6473597d706e 12212 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12213 //! @brief Set the SP0 field to a new value.
bogdanm 82:6473597d706e 12214 #define BW_AIPS_PACRN_SP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRN_ADDR(x), BP_AIPS_PACRN_SP0) = (v))
bogdanm 82:6473597d706e 12215 #endif
bogdanm 82:6473597d706e 12216 //@}
bogdanm 82:6473597d706e 12217
bogdanm 82:6473597d706e 12218 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 12219 // HW_AIPS_PACRO - Peripheral Access Control Register
bogdanm 82:6473597d706e 12220 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 12221
bogdanm 82:6473597d706e 12222 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12223 /*!
bogdanm 82:6473597d706e 12224 * @brief HW_AIPS_PACRO - Peripheral Access Control Register (RW)
bogdanm 82:6473597d706e 12225 *
bogdanm 82:6473597d706e 12226 * Reset value: 0x44444444U
bogdanm 82:6473597d706e 12227 *
bogdanm 82:6473597d706e 12228 * This section describes PACR registers E-P, which control peripheral slots
bogdanm 82:6473597d706e 12229 * 32-127. See PACRPeripheral Access Control Register for the description of these
bogdanm 82:6473597d706e 12230 * registers.
bogdanm 82:6473597d706e 12231 */
bogdanm 82:6473597d706e 12232 typedef union _hw_aips_pacro
bogdanm 82:6473597d706e 12233 {
bogdanm 82:6473597d706e 12234 uint32_t U;
bogdanm 82:6473597d706e 12235 struct _hw_aips_pacro_bitfields
bogdanm 82:6473597d706e 12236 {
bogdanm 82:6473597d706e 12237 uint32_t TP7 : 1; //!< [0] Trusted Protect
bogdanm 82:6473597d706e 12238 uint32_t WP7 : 1; //!< [1] Write Protect
bogdanm 82:6473597d706e 12239 uint32_t SP7 : 1; //!< [2] Supervisor Protect
bogdanm 82:6473597d706e 12240 uint32_t RESERVED0 : 1; //!< [3]
bogdanm 82:6473597d706e 12241 uint32_t TP6 : 1; //!< [4] Trusted Protect
bogdanm 82:6473597d706e 12242 uint32_t WP6 : 1; //!< [5] Write Protect
bogdanm 82:6473597d706e 12243 uint32_t SP6 : 1; //!< [6] Supervisor Protect
bogdanm 82:6473597d706e 12244 uint32_t RESERVED1 : 1; //!< [7]
bogdanm 82:6473597d706e 12245 uint32_t TP5 : 1; //!< [8] Trusted Protect
bogdanm 82:6473597d706e 12246 uint32_t WP5 : 1; //!< [9] Write Protect
bogdanm 82:6473597d706e 12247 uint32_t SP5 : 1; //!< [10] Supervisor Protect
bogdanm 82:6473597d706e 12248 uint32_t RESERVED2 : 1; //!< [11]
bogdanm 82:6473597d706e 12249 uint32_t TP4 : 1; //!< [12] Trusted Protect
bogdanm 82:6473597d706e 12250 uint32_t WP4 : 1; //!< [13] Write Protect
bogdanm 82:6473597d706e 12251 uint32_t SP4 : 1; //!< [14] Supervisor Protect
bogdanm 82:6473597d706e 12252 uint32_t RESERVED3 : 1; //!< [15]
bogdanm 82:6473597d706e 12253 uint32_t TP3 : 1; //!< [16] Trusted Protect
bogdanm 82:6473597d706e 12254 uint32_t WP3 : 1; //!< [17] Write Protect
bogdanm 82:6473597d706e 12255 uint32_t SP3 : 1; //!< [18] Supervisor Protect
bogdanm 82:6473597d706e 12256 uint32_t RESERVED4 : 1; //!< [19]
bogdanm 82:6473597d706e 12257 uint32_t TP2 : 1; //!< [20] Trusted Protect
bogdanm 82:6473597d706e 12258 uint32_t WP2 : 1; //!< [21] Write Protect
bogdanm 82:6473597d706e 12259 uint32_t SP2 : 1; //!< [22] Supervisor Protect
bogdanm 82:6473597d706e 12260 uint32_t RESERVED5 : 1; //!< [23]
bogdanm 82:6473597d706e 12261 uint32_t TP1 : 1; //!< [24] Trusted Protect
bogdanm 82:6473597d706e 12262 uint32_t WP1 : 1; //!< [25] Write Protect
bogdanm 82:6473597d706e 12263 uint32_t SP1 : 1; //!< [26] Supervisor Protect
bogdanm 82:6473597d706e 12264 uint32_t RESERVED6 : 1; //!< [27]
bogdanm 82:6473597d706e 12265 uint32_t TP0 : 1; //!< [28] Trusted Protect
bogdanm 82:6473597d706e 12266 uint32_t WP0 : 1; //!< [29] Write Protect
bogdanm 82:6473597d706e 12267 uint32_t SP0 : 1; //!< [30] Supervisor Protect
bogdanm 82:6473597d706e 12268 uint32_t RESERVED7 : 1; //!< [31]
bogdanm 82:6473597d706e 12269 } B;
bogdanm 82:6473597d706e 12270 } hw_aips_pacro_t;
bogdanm 82:6473597d706e 12271 #endif
bogdanm 82:6473597d706e 12272
bogdanm 82:6473597d706e 12273 /*!
bogdanm 82:6473597d706e 12274 * @name Constants and macros for entire AIPS_PACRO register
bogdanm 82:6473597d706e 12275 */
bogdanm 82:6473597d706e 12276 //@{
bogdanm 82:6473597d706e 12277 #define HW_AIPS_PACRO_ADDR(x) (REGS_AIPS_BASE(x) + 0x68U)
bogdanm 82:6473597d706e 12278
bogdanm 82:6473597d706e 12279 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12280 #define HW_AIPS_PACRO(x) (*(__IO hw_aips_pacro_t *) HW_AIPS_PACRO_ADDR(x))
bogdanm 82:6473597d706e 12281 #define HW_AIPS_PACRO_RD(x) (HW_AIPS_PACRO(x).U)
bogdanm 82:6473597d706e 12282 #define HW_AIPS_PACRO_WR(x, v) (HW_AIPS_PACRO(x).U = (v))
bogdanm 82:6473597d706e 12283 #define HW_AIPS_PACRO_SET(x, v) (HW_AIPS_PACRO_WR(x, HW_AIPS_PACRO_RD(x) | (v)))
bogdanm 82:6473597d706e 12284 #define HW_AIPS_PACRO_CLR(x, v) (HW_AIPS_PACRO_WR(x, HW_AIPS_PACRO_RD(x) & ~(v)))
bogdanm 82:6473597d706e 12285 #define HW_AIPS_PACRO_TOG(x, v) (HW_AIPS_PACRO_WR(x, HW_AIPS_PACRO_RD(x) ^ (v)))
bogdanm 82:6473597d706e 12286 #endif
bogdanm 82:6473597d706e 12287 //@}
bogdanm 82:6473597d706e 12288
bogdanm 82:6473597d706e 12289 /*
bogdanm 82:6473597d706e 12290 * Constants & macros for individual AIPS_PACRO bitfields
bogdanm 82:6473597d706e 12291 */
bogdanm 82:6473597d706e 12292
bogdanm 82:6473597d706e 12293 /*!
bogdanm 82:6473597d706e 12294 * @name Register AIPS_PACRO, field TP7[0] (RW)
bogdanm 82:6473597d706e 12295 *
bogdanm 82:6473597d706e 12296 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 12297 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 12298 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 12299 *
bogdanm 82:6473597d706e 12300 * Values:
bogdanm 82:6473597d706e 12301 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 12302 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 12303 */
bogdanm 82:6473597d706e 12304 //@{
bogdanm 82:6473597d706e 12305 #define BP_AIPS_PACRO_TP7 (0U) //!< Bit position for AIPS_PACRO_TP7.
bogdanm 82:6473597d706e 12306 #define BM_AIPS_PACRO_TP7 (0x00000001U) //!< Bit mask for AIPS_PACRO_TP7.
bogdanm 82:6473597d706e 12307 #define BS_AIPS_PACRO_TP7 (1U) //!< Bit field size in bits for AIPS_PACRO_TP7.
bogdanm 82:6473597d706e 12308
bogdanm 82:6473597d706e 12309 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12310 //! @brief Read current value of the AIPS_PACRO_TP7 field.
bogdanm 82:6473597d706e 12311 #define BR_AIPS_PACRO_TP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP7))
bogdanm 82:6473597d706e 12312 #endif
bogdanm 82:6473597d706e 12313
bogdanm 82:6473597d706e 12314 //! @brief Format value for bitfield AIPS_PACRO_TP7.
bogdanm 82:6473597d706e 12315 #define BF_AIPS_PACRO_TP7(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRO_TP7), uint32_t) & BM_AIPS_PACRO_TP7)
bogdanm 82:6473597d706e 12316
bogdanm 82:6473597d706e 12317 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12318 //! @brief Set the TP7 field to a new value.
bogdanm 82:6473597d706e 12319 #define BW_AIPS_PACRO_TP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP7) = (v))
bogdanm 82:6473597d706e 12320 #endif
bogdanm 82:6473597d706e 12321 //@}
bogdanm 82:6473597d706e 12322
bogdanm 82:6473597d706e 12323 /*!
bogdanm 82:6473597d706e 12324 * @name Register AIPS_PACRO, field WP7[1] (RW)
bogdanm 82:6473597d706e 12325 *
bogdanm 82:6473597d706e 12326 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 12327 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 12328 * and no peripheral access initiates.
bogdanm 82:6473597d706e 12329 *
bogdanm 82:6473597d706e 12330 * Values:
bogdanm 82:6473597d706e 12331 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 12332 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 12333 */
bogdanm 82:6473597d706e 12334 //@{
bogdanm 82:6473597d706e 12335 #define BP_AIPS_PACRO_WP7 (1U) //!< Bit position for AIPS_PACRO_WP7.
bogdanm 82:6473597d706e 12336 #define BM_AIPS_PACRO_WP7 (0x00000002U) //!< Bit mask for AIPS_PACRO_WP7.
bogdanm 82:6473597d706e 12337 #define BS_AIPS_PACRO_WP7 (1U) //!< Bit field size in bits for AIPS_PACRO_WP7.
bogdanm 82:6473597d706e 12338
bogdanm 82:6473597d706e 12339 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12340 //! @brief Read current value of the AIPS_PACRO_WP7 field.
bogdanm 82:6473597d706e 12341 #define BR_AIPS_PACRO_WP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP7))
bogdanm 82:6473597d706e 12342 #endif
bogdanm 82:6473597d706e 12343
bogdanm 82:6473597d706e 12344 //! @brief Format value for bitfield AIPS_PACRO_WP7.
bogdanm 82:6473597d706e 12345 #define BF_AIPS_PACRO_WP7(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRO_WP7), uint32_t) & BM_AIPS_PACRO_WP7)
bogdanm 82:6473597d706e 12346
bogdanm 82:6473597d706e 12347 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12348 //! @brief Set the WP7 field to a new value.
bogdanm 82:6473597d706e 12349 #define BW_AIPS_PACRO_WP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP7) = (v))
bogdanm 82:6473597d706e 12350 #endif
bogdanm 82:6473597d706e 12351 //@}
bogdanm 82:6473597d706e 12352
bogdanm 82:6473597d706e 12353 /*!
bogdanm 82:6473597d706e 12354 * @name Register AIPS_PACRO, field SP7[2] (RW)
bogdanm 82:6473597d706e 12355 *
bogdanm 82:6473597d706e 12356 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 12357 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 12358 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 12359 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 12360 * access initiates.
bogdanm 82:6473597d706e 12361 *
bogdanm 82:6473597d706e 12362 * Values:
bogdanm 82:6473597d706e 12363 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 12364 * accesses.
bogdanm 82:6473597d706e 12365 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 12366 */
bogdanm 82:6473597d706e 12367 //@{
bogdanm 82:6473597d706e 12368 #define BP_AIPS_PACRO_SP7 (2U) //!< Bit position for AIPS_PACRO_SP7.
bogdanm 82:6473597d706e 12369 #define BM_AIPS_PACRO_SP7 (0x00000004U) //!< Bit mask for AIPS_PACRO_SP7.
bogdanm 82:6473597d706e 12370 #define BS_AIPS_PACRO_SP7 (1U) //!< Bit field size in bits for AIPS_PACRO_SP7.
bogdanm 82:6473597d706e 12371
bogdanm 82:6473597d706e 12372 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12373 //! @brief Read current value of the AIPS_PACRO_SP7 field.
bogdanm 82:6473597d706e 12374 #define BR_AIPS_PACRO_SP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP7))
bogdanm 82:6473597d706e 12375 #endif
bogdanm 82:6473597d706e 12376
bogdanm 82:6473597d706e 12377 //! @brief Format value for bitfield AIPS_PACRO_SP7.
bogdanm 82:6473597d706e 12378 #define BF_AIPS_PACRO_SP7(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRO_SP7), uint32_t) & BM_AIPS_PACRO_SP7)
bogdanm 82:6473597d706e 12379
bogdanm 82:6473597d706e 12380 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12381 //! @brief Set the SP7 field to a new value.
bogdanm 82:6473597d706e 12382 #define BW_AIPS_PACRO_SP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP7) = (v))
bogdanm 82:6473597d706e 12383 #endif
bogdanm 82:6473597d706e 12384 //@}
bogdanm 82:6473597d706e 12385
bogdanm 82:6473597d706e 12386 /*!
bogdanm 82:6473597d706e 12387 * @name Register AIPS_PACRO, field TP6[4] (RW)
bogdanm 82:6473597d706e 12388 *
bogdanm 82:6473597d706e 12389 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 12390 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 12391 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 12392 *
bogdanm 82:6473597d706e 12393 * Values:
bogdanm 82:6473597d706e 12394 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 12395 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 12396 */
bogdanm 82:6473597d706e 12397 //@{
bogdanm 82:6473597d706e 12398 #define BP_AIPS_PACRO_TP6 (4U) //!< Bit position for AIPS_PACRO_TP6.
bogdanm 82:6473597d706e 12399 #define BM_AIPS_PACRO_TP6 (0x00000010U) //!< Bit mask for AIPS_PACRO_TP6.
bogdanm 82:6473597d706e 12400 #define BS_AIPS_PACRO_TP6 (1U) //!< Bit field size in bits for AIPS_PACRO_TP6.
bogdanm 82:6473597d706e 12401
bogdanm 82:6473597d706e 12402 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12403 //! @brief Read current value of the AIPS_PACRO_TP6 field.
bogdanm 82:6473597d706e 12404 #define BR_AIPS_PACRO_TP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP6))
bogdanm 82:6473597d706e 12405 #endif
bogdanm 82:6473597d706e 12406
bogdanm 82:6473597d706e 12407 //! @brief Format value for bitfield AIPS_PACRO_TP6.
bogdanm 82:6473597d706e 12408 #define BF_AIPS_PACRO_TP6(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRO_TP6), uint32_t) & BM_AIPS_PACRO_TP6)
bogdanm 82:6473597d706e 12409
bogdanm 82:6473597d706e 12410 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12411 //! @brief Set the TP6 field to a new value.
bogdanm 82:6473597d706e 12412 #define BW_AIPS_PACRO_TP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP6) = (v))
bogdanm 82:6473597d706e 12413 #endif
bogdanm 82:6473597d706e 12414 //@}
bogdanm 82:6473597d706e 12415
bogdanm 82:6473597d706e 12416 /*!
bogdanm 82:6473597d706e 12417 * @name Register AIPS_PACRO, field WP6[5] (RW)
bogdanm 82:6473597d706e 12418 *
bogdanm 82:6473597d706e 12419 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 12420 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 12421 * and no peripheral access initiates.
bogdanm 82:6473597d706e 12422 *
bogdanm 82:6473597d706e 12423 * Values:
bogdanm 82:6473597d706e 12424 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 12425 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 12426 */
bogdanm 82:6473597d706e 12427 //@{
bogdanm 82:6473597d706e 12428 #define BP_AIPS_PACRO_WP6 (5U) //!< Bit position for AIPS_PACRO_WP6.
bogdanm 82:6473597d706e 12429 #define BM_AIPS_PACRO_WP6 (0x00000020U) //!< Bit mask for AIPS_PACRO_WP6.
bogdanm 82:6473597d706e 12430 #define BS_AIPS_PACRO_WP6 (1U) //!< Bit field size in bits for AIPS_PACRO_WP6.
bogdanm 82:6473597d706e 12431
bogdanm 82:6473597d706e 12432 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12433 //! @brief Read current value of the AIPS_PACRO_WP6 field.
bogdanm 82:6473597d706e 12434 #define BR_AIPS_PACRO_WP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP6))
bogdanm 82:6473597d706e 12435 #endif
bogdanm 82:6473597d706e 12436
bogdanm 82:6473597d706e 12437 //! @brief Format value for bitfield AIPS_PACRO_WP6.
bogdanm 82:6473597d706e 12438 #define BF_AIPS_PACRO_WP6(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRO_WP6), uint32_t) & BM_AIPS_PACRO_WP6)
bogdanm 82:6473597d706e 12439
bogdanm 82:6473597d706e 12440 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12441 //! @brief Set the WP6 field to a new value.
bogdanm 82:6473597d706e 12442 #define BW_AIPS_PACRO_WP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP6) = (v))
bogdanm 82:6473597d706e 12443 #endif
bogdanm 82:6473597d706e 12444 //@}
bogdanm 82:6473597d706e 12445
bogdanm 82:6473597d706e 12446 /*!
bogdanm 82:6473597d706e 12447 * @name Register AIPS_PACRO, field SP6[6] (RW)
bogdanm 82:6473597d706e 12448 *
bogdanm 82:6473597d706e 12449 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 12450 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 12451 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 12452 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 12453 * access initiates.
bogdanm 82:6473597d706e 12454 *
bogdanm 82:6473597d706e 12455 * Values:
bogdanm 82:6473597d706e 12456 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 12457 * accesses.
bogdanm 82:6473597d706e 12458 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 12459 */
bogdanm 82:6473597d706e 12460 //@{
bogdanm 82:6473597d706e 12461 #define BP_AIPS_PACRO_SP6 (6U) //!< Bit position for AIPS_PACRO_SP6.
bogdanm 82:6473597d706e 12462 #define BM_AIPS_PACRO_SP6 (0x00000040U) //!< Bit mask for AIPS_PACRO_SP6.
bogdanm 82:6473597d706e 12463 #define BS_AIPS_PACRO_SP6 (1U) //!< Bit field size in bits for AIPS_PACRO_SP6.
bogdanm 82:6473597d706e 12464
bogdanm 82:6473597d706e 12465 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12466 //! @brief Read current value of the AIPS_PACRO_SP6 field.
bogdanm 82:6473597d706e 12467 #define BR_AIPS_PACRO_SP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP6))
bogdanm 82:6473597d706e 12468 #endif
bogdanm 82:6473597d706e 12469
bogdanm 82:6473597d706e 12470 //! @brief Format value for bitfield AIPS_PACRO_SP6.
bogdanm 82:6473597d706e 12471 #define BF_AIPS_PACRO_SP6(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRO_SP6), uint32_t) & BM_AIPS_PACRO_SP6)
bogdanm 82:6473597d706e 12472
bogdanm 82:6473597d706e 12473 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12474 //! @brief Set the SP6 field to a new value.
bogdanm 82:6473597d706e 12475 #define BW_AIPS_PACRO_SP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP6) = (v))
bogdanm 82:6473597d706e 12476 #endif
bogdanm 82:6473597d706e 12477 //@}
bogdanm 82:6473597d706e 12478
bogdanm 82:6473597d706e 12479 /*!
bogdanm 82:6473597d706e 12480 * @name Register AIPS_PACRO, field TP5[8] (RW)
bogdanm 82:6473597d706e 12481 *
bogdanm 82:6473597d706e 12482 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 12483 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 12484 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 12485 *
bogdanm 82:6473597d706e 12486 * Values:
bogdanm 82:6473597d706e 12487 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 12488 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 12489 */
bogdanm 82:6473597d706e 12490 //@{
bogdanm 82:6473597d706e 12491 #define BP_AIPS_PACRO_TP5 (8U) //!< Bit position for AIPS_PACRO_TP5.
bogdanm 82:6473597d706e 12492 #define BM_AIPS_PACRO_TP5 (0x00000100U) //!< Bit mask for AIPS_PACRO_TP5.
bogdanm 82:6473597d706e 12493 #define BS_AIPS_PACRO_TP5 (1U) //!< Bit field size in bits for AIPS_PACRO_TP5.
bogdanm 82:6473597d706e 12494
bogdanm 82:6473597d706e 12495 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12496 //! @brief Read current value of the AIPS_PACRO_TP5 field.
bogdanm 82:6473597d706e 12497 #define BR_AIPS_PACRO_TP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP5))
bogdanm 82:6473597d706e 12498 #endif
bogdanm 82:6473597d706e 12499
bogdanm 82:6473597d706e 12500 //! @brief Format value for bitfield AIPS_PACRO_TP5.
bogdanm 82:6473597d706e 12501 #define BF_AIPS_PACRO_TP5(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRO_TP5), uint32_t) & BM_AIPS_PACRO_TP5)
bogdanm 82:6473597d706e 12502
bogdanm 82:6473597d706e 12503 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12504 //! @brief Set the TP5 field to a new value.
bogdanm 82:6473597d706e 12505 #define BW_AIPS_PACRO_TP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP5) = (v))
bogdanm 82:6473597d706e 12506 #endif
bogdanm 82:6473597d706e 12507 //@}
bogdanm 82:6473597d706e 12508
bogdanm 82:6473597d706e 12509 /*!
bogdanm 82:6473597d706e 12510 * @name Register AIPS_PACRO, field WP5[9] (RW)
bogdanm 82:6473597d706e 12511 *
bogdanm 82:6473597d706e 12512 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 12513 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 12514 * and no peripheral access initiates.
bogdanm 82:6473597d706e 12515 *
bogdanm 82:6473597d706e 12516 * Values:
bogdanm 82:6473597d706e 12517 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 12518 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 12519 */
bogdanm 82:6473597d706e 12520 //@{
bogdanm 82:6473597d706e 12521 #define BP_AIPS_PACRO_WP5 (9U) //!< Bit position for AIPS_PACRO_WP5.
bogdanm 82:6473597d706e 12522 #define BM_AIPS_PACRO_WP5 (0x00000200U) //!< Bit mask for AIPS_PACRO_WP5.
bogdanm 82:6473597d706e 12523 #define BS_AIPS_PACRO_WP5 (1U) //!< Bit field size in bits for AIPS_PACRO_WP5.
bogdanm 82:6473597d706e 12524
bogdanm 82:6473597d706e 12525 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12526 //! @brief Read current value of the AIPS_PACRO_WP5 field.
bogdanm 82:6473597d706e 12527 #define BR_AIPS_PACRO_WP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP5))
bogdanm 82:6473597d706e 12528 #endif
bogdanm 82:6473597d706e 12529
bogdanm 82:6473597d706e 12530 //! @brief Format value for bitfield AIPS_PACRO_WP5.
bogdanm 82:6473597d706e 12531 #define BF_AIPS_PACRO_WP5(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRO_WP5), uint32_t) & BM_AIPS_PACRO_WP5)
bogdanm 82:6473597d706e 12532
bogdanm 82:6473597d706e 12533 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12534 //! @brief Set the WP5 field to a new value.
bogdanm 82:6473597d706e 12535 #define BW_AIPS_PACRO_WP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP5) = (v))
bogdanm 82:6473597d706e 12536 #endif
bogdanm 82:6473597d706e 12537 //@}
bogdanm 82:6473597d706e 12538
bogdanm 82:6473597d706e 12539 /*!
bogdanm 82:6473597d706e 12540 * @name Register AIPS_PACRO, field SP5[10] (RW)
bogdanm 82:6473597d706e 12541 *
bogdanm 82:6473597d706e 12542 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 12543 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 12544 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 12545 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 12546 * access initiates.
bogdanm 82:6473597d706e 12547 *
bogdanm 82:6473597d706e 12548 * Values:
bogdanm 82:6473597d706e 12549 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 12550 * accesses.
bogdanm 82:6473597d706e 12551 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 12552 */
bogdanm 82:6473597d706e 12553 //@{
bogdanm 82:6473597d706e 12554 #define BP_AIPS_PACRO_SP5 (10U) //!< Bit position for AIPS_PACRO_SP5.
bogdanm 82:6473597d706e 12555 #define BM_AIPS_PACRO_SP5 (0x00000400U) //!< Bit mask for AIPS_PACRO_SP5.
bogdanm 82:6473597d706e 12556 #define BS_AIPS_PACRO_SP5 (1U) //!< Bit field size in bits for AIPS_PACRO_SP5.
bogdanm 82:6473597d706e 12557
bogdanm 82:6473597d706e 12558 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12559 //! @brief Read current value of the AIPS_PACRO_SP5 field.
bogdanm 82:6473597d706e 12560 #define BR_AIPS_PACRO_SP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP5))
bogdanm 82:6473597d706e 12561 #endif
bogdanm 82:6473597d706e 12562
bogdanm 82:6473597d706e 12563 //! @brief Format value for bitfield AIPS_PACRO_SP5.
bogdanm 82:6473597d706e 12564 #define BF_AIPS_PACRO_SP5(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRO_SP5), uint32_t) & BM_AIPS_PACRO_SP5)
bogdanm 82:6473597d706e 12565
bogdanm 82:6473597d706e 12566 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12567 //! @brief Set the SP5 field to a new value.
bogdanm 82:6473597d706e 12568 #define BW_AIPS_PACRO_SP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP5) = (v))
bogdanm 82:6473597d706e 12569 #endif
bogdanm 82:6473597d706e 12570 //@}
bogdanm 82:6473597d706e 12571
bogdanm 82:6473597d706e 12572 /*!
bogdanm 82:6473597d706e 12573 * @name Register AIPS_PACRO, field TP4[12] (RW)
bogdanm 82:6473597d706e 12574 *
bogdanm 82:6473597d706e 12575 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 12576 * When this bit is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 12577 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 12578 *
bogdanm 82:6473597d706e 12579 * Values:
bogdanm 82:6473597d706e 12580 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 12581 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 12582 */
bogdanm 82:6473597d706e 12583 //@{
bogdanm 82:6473597d706e 12584 #define BP_AIPS_PACRO_TP4 (12U) //!< Bit position for AIPS_PACRO_TP4.
bogdanm 82:6473597d706e 12585 #define BM_AIPS_PACRO_TP4 (0x00001000U) //!< Bit mask for AIPS_PACRO_TP4.
bogdanm 82:6473597d706e 12586 #define BS_AIPS_PACRO_TP4 (1U) //!< Bit field size in bits for AIPS_PACRO_TP4.
bogdanm 82:6473597d706e 12587
bogdanm 82:6473597d706e 12588 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12589 //! @brief Read current value of the AIPS_PACRO_TP4 field.
bogdanm 82:6473597d706e 12590 #define BR_AIPS_PACRO_TP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP4))
bogdanm 82:6473597d706e 12591 #endif
bogdanm 82:6473597d706e 12592
bogdanm 82:6473597d706e 12593 //! @brief Format value for bitfield AIPS_PACRO_TP4.
bogdanm 82:6473597d706e 12594 #define BF_AIPS_PACRO_TP4(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRO_TP4), uint32_t) & BM_AIPS_PACRO_TP4)
bogdanm 82:6473597d706e 12595
bogdanm 82:6473597d706e 12596 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12597 //! @brief Set the TP4 field to a new value.
bogdanm 82:6473597d706e 12598 #define BW_AIPS_PACRO_TP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP4) = (v))
bogdanm 82:6473597d706e 12599 #endif
bogdanm 82:6473597d706e 12600 //@}
bogdanm 82:6473597d706e 12601
bogdanm 82:6473597d706e 12602 /*!
bogdanm 82:6473597d706e 12603 * @name Register AIPS_PACRO, field WP4[13] (RW)
bogdanm 82:6473597d706e 12604 *
bogdanm 82:6473597d706e 12605 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 12606 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 12607 * and no peripheral access initiates.
bogdanm 82:6473597d706e 12608 *
bogdanm 82:6473597d706e 12609 * Values:
bogdanm 82:6473597d706e 12610 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 12611 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 12612 */
bogdanm 82:6473597d706e 12613 //@{
bogdanm 82:6473597d706e 12614 #define BP_AIPS_PACRO_WP4 (13U) //!< Bit position for AIPS_PACRO_WP4.
bogdanm 82:6473597d706e 12615 #define BM_AIPS_PACRO_WP4 (0x00002000U) //!< Bit mask for AIPS_PACRO_WP4.
bogdanm 82:6473597d706e 12616 #define BS_AIPS_PACRO_WP4 (1U) //!< Bit field size in bits for AIPS_PACRO_WP4.
bogdanm 82:6473597d706e 12617
bogdanm 82:6473597d706e 12618 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12619 //! @brief Read current value of the AIPS_PACRO_WP4 field.
bogdanm 82:6473597d706e 12620 #define BR_AIPS_PACRO_WP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP4))
bogdanm 82:6473597d706e 12621 #endif
bogdanm 82:6473597d706e 12622
bogdanm 82:6473597d706e 12623 //! @brief Format value for bitfield AIPS_PACRO_WP4.
bogdanm 82:6473597d706e 12624 #define BF_AIPS_PACRO_WP4(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRO_WP4), uint32_t) & BM_AIPS_PACRO_WP4)
bogdanm 82:6473597d706e 12625
bogdanm 82:6473597d706e 12626 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12627 //! @brief Set the WP4 field to a new value.
bogdanm 82:6473597d706e 12628 #define BW_AIPS_PACRO_WP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP4) = (v))
bogdanm 82:6473597d706e 12629 #endif
bogdanm 82:6473597d706e 12630 //@}
bogdanm 82:6473597d706e 12631
bogdanm 82:6473597d706e 12632 /*!
bogdanm 82:6473597d706e 12633 * @name Register AIPS_PACRO, field SP4[14] (RW)
bogdanm 82:6473597d706e 12634 *
bogdanm 82:6473597d706e 12635 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 12636 * access. When this bit is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 12637 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
bogdanm 82:6473597d706e 12638 * set. If not, access terminates with an error response and no peripheral access
bogdanm 82:6473597d706e 12639 * initiates.
bogdanm 82:6473597d706e 12640 *
bogdanm 82:6473597d706e 12641 * Values:
bogdanm 82:6473597d706e 12642 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 12643 * accesses.
bogdanm 82:6473597d706e 12644 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 12645 */
bogdanm 82:6473597d706e 12646 //@{
bogdanm 82:6473597d706e 12647 #define BP_AIPS_PACRO_SP4 (14U) //!< Bit position for AIPS_PACRO_SP4.
bogdanm 82:6473597d706e 12648 #define BM_AIPS_PACRO_SP4 (0x00004000U) //!< Bit mask for AIPS_PACRO_SP4.
bogdanm 82:6473597d706e 12649 #define BS_AIPS_PACRO_SP4 (1U) //!< Bit field size in bits for AIPS_PACRO_SP4.
bogdanm 82:6473597d706e 12650
bogdanm 82:6473597d706e 12651 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12652 //! @brief Read current value of the AIPS_PACRO_SP4 field.
bogdanm 82:6473597d706e 12653 #define BR_AIPS_PACRO_SP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP4))
bogdanm 82:6473597d706e 12654 #endif
bogdanm 82:6473597d706e 12655
bogdanm 82:6473597d706e 12656 //! @brief Format value for bitfield AIPS_PACRO_SP4.
bogdanm 82:6473597d706e 12657 #define BF_AIPS_PACRO_SP4(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRO_SP4), uint32_t) & BM_AIPS_PACRO_SP4)
bogdanm 82:6473597d706e 12658
bogdanm 82:6473597d706e 12659 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12660 //! @brief Set the SP4 field to a new value.
bogdanm 82:6473597d706e 12661 #define BW_AIPS_PACRO_SP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP4) = (v))
bogdanm 82:6473597d706e 12662 #endif
bogdanm 82:6473597d706e 12663 //@}
bogdanm 82:6473597d706e 12664
bogdanm 82:6473597d706e 12665 /*!
bogdanm 82:6473597d706e 12666 * @name Register AIPS_PACRO, field TP3[16] (RW)
bogdanm 82:6473597d706e 12667 *
bogdanm 82:6473597d706e 12668 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 12669 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 12670 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 12671 *
bogdanm 82:6473597d706e 12672 * Values:
bogdanm 82:6473597d706e 12673 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 12674 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 12675 */
bogdanm 82:6473597d706e 12676 //@{
bogdanm 82:6473597d706e 12677 #define BP_AIPS_PACRO_TP3 (16U) //!< Bit position for AIPS_PACRO_TP3.
bogdanm 82:6473597d706e 12678 #define BM_AIPS_PACRO_TP3 (0x00010000U) //!< Bit mask for AIPS_PACRO_TP3.
bogdanm 82:6473597d706e 12679 #define BS_AIPS_PACRO_TP3 (1U) //!< Bit field size in bits for AIPS_PACRO_TP3.
bogdanm 82:6473597d706e 12680
bogdanm 82:6473597d706e 12681 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12682 //! @brief Read current value of the AIPS_PACRO_TP3 field.
bogdanm 82:6473597d706e 12683 #define BR_AIPS_PACRO_TP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP3))
bogdanm 82:6473597d706e 12684 #endif
bogdanm 82:6473597d706e 12685
bogdanm 82:6473597d706e 12686 //! @brief Format value for bitfield AIPS_PACRO_TP3.
bogdanm 82:6473597d706e 12687 #define BF_AIPS_PACRO_TP3(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRO_TP3), uint32_t) & BM_AIPS_PACRO_TP3)
bogdanm 82:6473597d706e 12688
bogdanm 82:6473597d706e 12689 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12690 //! @brief Set the TP3 field to a new value.
bogdanm 82:6473597d706e 12691 #define BW_AIPS_PACRO_TP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP3) = (v))
bogdanm 82:6473597d706e 12692 #endif
bogdanm 82:6473597d706e 12693 //@}
bogdanm 82:6473597d706e 12694
bogdanm 82:6473597d706e 12695 /*!
bogdanm 82:6473597d706e 12696 * @name Register AIPS_PACRO, field WP3[17] (RW)
bogdanm 82:6473597d706e 12697 *
bogdanm 82:6473597d706e 12698 * Determines whether the peripheral allows write accesss. When this bit is set
bogdanm 82:6473597d706e 12699 * and a write access is attempted, access terminates with an error response and
bogdanm 82:6473597d706e 12700 * no peripheral access initiates.
bogdanm 82:6473597d706e 12701 *
bogdanm 82:6473597d706e 12702 * Values:
bogdanm 82:6473597d706e 12703 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 12704 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 12705 */
bogdanm 82:6473597d706e 12706 //@{
bogdanm 82:6473597d706e 12707 #define BP_AIPS_PACRO_WP3 (17U) //!< Bit position for AIPS_PACRO_WP3.
bogdanm 82:6473597d706e 12708 #define BM_AIPS_PACRO_WP3 (0x00020000U) //!< Bit mask for AIPS_PACRO_WP3.
bogdanm 82:6473597d706e 12709 #define BS_AIPS_PACRO_WP3 (1U) //!< Bit field size in bits for AIPS_PACRO_WP3.
bogdanm 82:6473597d706e 12710
bogdanm 82:6473597d706e 12711 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12712 //! @brief Read current value of the AIPS_PACRO_WP3 field.
bogdanm 82:6473597d706e 12713 #define BR_AIPS_PACRO_WP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP3))
bogdanm 82:6473597d706e 12714 #endif
bogdanm 82:6473597d706e 12715
bogdanm 82:6473597d706e 12716 //! @brief Format value for bitfield AIPS_PACRO_WP3.
bogdanm 82:6473597d706e 12717 #define BF_AIPS_PACRO_WP3(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRO_WP3), uint32_t) & BM_AIPS_PACRO_WP3)
bogdanm 82:6473597d706e 12718
bogdanm 82:6473597d706e 12719 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12720 //! @brief Set the WP3 field to a new value.
bogdanm 82:6473597d706e 12721 #define BW_AIPS_PACRO_WP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP3) = (v))
bogdanm 82:6473597d706e 12722 #endif
bogdanm 82:6473597d706e 12723 //@}
bogdanm 82:6473597d706e 12724
bogdanm 82:6473597d706e 12725 /*!
bogdanm 82:6473597d706e 12726 * @name Register AIPS_PACRO, field SP3[18] (RW)
bogdanm 82:6473597d706e 12727 *
bogdanm 82:6473597d706e 12728 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 12729 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 12730 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 12731 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 12732 * access initiates.
bogdanm 82:6473597d706e 12733 *
bogdanm 82:6473597d706e 12734 * Values:
bogdanm 82:6473597d706e 12735 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 12736 * accesses.
bogdanm 82:6473597d706e 12737 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 12738 */
bogdanm 82:6473597d706e 12739 //@{
bogdanm 82:6473597d706e 12740 #define BP_AIPS_PACRO_SP3 (18U) //!< Bit position for AIPS_PACRO_SP3.
bogdanm 82:6473597d706e 12741 #define BM_AIPS_PACRO_SP3 (0x00040000U) //!< Bit mask for AIPS_PACRO_SP3.
bogdanm 82:6473597d706e 12742 #define BS_AIPS_PACRO_SP3 (1U) //!< Bit field size in bits for AIPS_PACRO_SP3.
bogdanm 82:6473597d706e 12743
bogdanm 82:6473597d706e 12744 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12745 //! @brief Read current value of the AIPS_PACRO_SP3 field.
bogdanm 82:6473597d706e 12746 #define BR_AIPS_PACRO_SP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP3))
bogdanm 82:6473597d706e 12747 #endif
bogdanm 82:6473597d706e 12748
bogdanm 82:6473597d706e 12749 //! @brief Format value for bitfield AIPS_PACRO_SP3.
bogdanm 82:6473597d706e 12750 #define BF_AIPS_PACRO_SP3(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRO_SP3), uint32_t) & BM_AIPS_PACRO_SP3)
bogdanm 82:6473597d706e 12751
bogdanm 82:6473597d706e 12752 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12753 //! @brief Set the SP3 field to a new value.
bogdanm 82:6473597d706e 12754 #define BW_AIPS_PACRO_SP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP3) = (v))
bogdanm 82:6473597d706e 12755 #endif
bogdanm 82:6473597d706e 12756 //@}
bogdanm 82:6473597d706e 12757
bogdanm 82:6473597d706e 12758 /*!
bogdanm 82:6473597d706e 12759 * @name Register AIPS_PACRO, field TP2[20] (RW)
bogdanm 82:6473597d706e 12760 *
bogdanm 82:6473597d706e 12761 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 12762 * When this bit is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 12763 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 12764 *
bogdanm 82:6473597d706e 12765 * Values:
bogdanm 82:6473597d706e 12766 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 12767 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 12768 */
bogdanm 82:6473597d706e 12769 //@{
bogdanm 82:6473597d706e 12770 #define BP_AIPS_PACRO_TP2 (20U) //!< Bit position for AIPS_PACRO_TP2.
bogdanm 82:6473597d706e 12771 #define BM_AIPS_PACRO_TP2 (0x00100000U) //!< Bit mask for AIPS_PACRO_TP2.
bogdanm 82:6473597d706e 12772 #define BS_AIPS_PACRO_TP2 (1U) //!< Bit field size in bits for AIPS_PACRO_TP2.
bogdanm 82:6473597d706e 12773
bogdanm 82:6473597d706e 12774 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12775 //! @brief Read current value of the AIPS_PACRO_TP2 field.
bogdanm 82:6473597d706e 12776 #define BR_AIPS_PACRO_TP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP2))
bogdanm 82:6473597d706e 12777 #endif
bogdanm 82:6473597d706e 12778
bogdanm 82:6473597d706e 12779 //! @brief Format value for bitfield AIPS_PACRO_TP2.
bogdanm 82:6473597d706e 12780 #define BF_AIPS_PACRO_TP2(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRO_TP2), uint32_t) & BM_AIPS_PACRO_TP2)
bogdanm 82:6473597d706e 12781
bogdanm 82:6473597d706e 12782 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12783 //! @brief Set the TP2 field to a new value.
bogdanm 82:6473597d706e 12784 #define BW_AIPS_PACRO_TP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP2) = (v))
bogdanm 82:6473597d706e 12785 #endif
bogdanm 82:6473597d706e 12786 //@}
bogdanm 82:6473597d706e 12787
bogdanm 82:6473597d706e 12788 /*!
bogdanm 82:6473597d706e 12789 * @name Register AIPS_PACRO, field WP2[21] (RW)
bogdanm 82:6473597d706e 12790 *
bogdanm 82:6473597d706e 12791 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 12792 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 12793 * and no peripheral access initiates.
bogdanm 82:6473597d706e 12794 *
bogdanm 82:6473597d706e 12795 * Values:
bogdanm 82:6473597d706e 12796 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 12797 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 12798 */
bogdanm 82:6473597d706e 12799 //@{
bogdanm 82:6473597d706e 12800 #define BP_AIPS_PACRO_WP2 (21U) //!< Bit position for AIPS_PACRO_WP2.
bogdanm 82:6473597d706e 12801 #define BM_AIPS_PACRO_WP2 (0x00200000U) //!< Bit mask for AIPS_PACRO_WP2.
bogdanm 82:6473597d706e 12802 #define BS_AIPS_PACRO_WP2 (1U) //!< Bit field size in bits for AIPS_PACRO_WP2.
bogdanm 82:6473597d706e 12803
bogdanm 82:6473597d706e 12804 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12805 //! @brief Read current value of the AIPS_PACRO_WP2 field.
bogdanm 82:6473597d706e 12806 #define BR_AIPS_PACRO_WP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP2))
bogdanm 82:6473597d706e 12807 #endif
bogdanm 82:6473597d706e 12808
bogdanm 82:6473597d706e 12809 //! @brief Format value for bitfield AIPS_PACRO_WP2.
bogdanm 82:6473597d706e 12810 #define BF_AIPS_PACRO_WP2(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRO_WP2), uint32_t) & BM_AIPS_PACRO_WP2)
bogdanm 82:6473597d706e 12811
bogdanm 82:6473597d706e 12812 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12813 //! @brief Set the WP2 field to a new value.
bogdanm 82:6473597d706e 12814 #define BW_AIPS_PACRO_WP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP2) = (v))
bogdanm 82:6473597d706e 12815 #endif
bogdanm 82:6473597d706e 12816 //@}
bogdanm 82:6473597d706e 12817
bogdanm 82:6473597d706e 12818 /*!
bogdanm 82:6473597d706e 12819 * @name Register AIPS_PACRO, field SP2[22] (RW)
bogdanm 82:6473597d706e 12820 *
bogdanm 82:6473597d706e 12821 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 12822 * access. When this bit is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 12823 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
bogdanm 82:6473597d706e 12824 * set. If not, access terminates with an error response and no peripheral access
bogdanm 82:6473597d706e 12825 * initiates.
bogdanm 82:6473597d706e 12826 *
bogdanm 82:6473597d706e 12827 * Values:
bogdanm 82:6473597d706e 12828 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 12829 * accesses.
bogdanm 82:6473597d706e 12830 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 12831 */
bogdanm 82:6473597d706e 12832 //@{
bogdanm 82:6473597d706e 12833 #define BP_AIPS_PACRO_SP2 (22U) //!< Bit position for AIPS_PACRO_SP2.
bogdanm 82:6473597d706e 12834 #define BM_AIPS_PACRO_SP2 (0x00400000U) //!< Bit mask for AIPS_PACRO_SP2.
bogdanm 82:6473597d706e 12835 #define BS_AIPS_PACRO_SP2 (1U) //!< Bit field size in bits for AIPS_PACRO_SP2.
bogdanm 82:6473597d706e 12836
bogdanm 82:6473597d706e 12837 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12838 //! @brief Read current value of the AIPS_PACRO_SP2 field.
bogdanm 82:6473597d706e 12839 #define BR_AIPS_PACRO_SP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP2))
bogdanm 82:6473597d706e 12840 #endif
bogdanm 82:6473597d706e 12841
bogdanm 82:6473597d706e 12842 //! @brief Format value for bitfield AIPS_PACRO_SP2.
bogdanm 82:6473597d706e 12843 #define BF_AIPS_PACRO_SP2(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRO_SP2), uint32_t) & BM_AIPS_PACRO_SP2)
bogdanm 82:6473597d706e 12844
bogdanm 82:6473597d706e 12845 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12846 //! @brief Set the SP2 field to a new value.
bogdanm 82:6473597d706e 12847 #define BW_AIPS_PACRO_SP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP2) = (v))
bogdanm 82:6473597d706e 12848 #endif
bogdanm 82:6473597d706e 12849 //@}
bogdanm 82:6473597d706e 12850
bogdanm 82:6473597d706e 12851 /*!
bogdanm 82:6473597d706e 12852 * @name Register AIPS_PACRO, field TP1[24] (RW)
bogdanm 82:6473597d706e 12853 *
bogdanm 82:6473597d706e 12854 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 12855 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 12856 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 12857 *
bogdanm 82:6473597d706e 12858 * Values:
bogdanm 82:6473597d706e 12859 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 12860 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 12861 */
bogdanm 82:6473597d706e 12862 //@{
bogdanm 82:6473597d706e 12863 #define BP_AIPS_PACRO_TP1 (24U) //!< Bit position for AIPS_PACRO_TP1.
bogdanm 82:6473597d706e 12864 #define BM_AIPS_PACRO_TP1 (0x01000000U) //!< Bit mask for AIPS_PACRO_TP1.
bogdanm 82:6473597d706e 12865 #define BS_AIPS_PACRO_TP1 (1U) //!< Bit field size in bits for AIPS_PACRO_TP1.
bogdanm 82:6473597d706e 12866
bogdanm 82:6473597d706e 12867 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12868 //! @brief Read current value of the AIPS_PACRO_TP1 field.
bogdanm 82:6473597d706e 12869 #define BR_AIPS_PACRO_TP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP1))
bogdanm 82:6473597d706e 12870 #endif
bogdanm 82:6473597d706e 12871
bogdanm 82:6473597d706e 12872 //! @brief Format value for bitfield AIPS_PACRO_TP1.
bogdanm 82:6473597d706e 12873 #define BF_AIPS_PACRO_TP1(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRO_TP1), uint32_t) & BM_AIPS_PACRO_TP1)
bogdanm 82:6473597d706e 12874
bogdanm 82:6473597d706e 12875 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12876 //! @brief Set the TP1 field to a new value.
bogdanm 82:6473597d706e 12877 #define BW_AIPS_PACRO_TP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP1) = (v))
bogdanm 82:6473597d706e 12878 #endif
bogdanm 82:6473597d706e 12879 //@}
bogdanm 82:6473597d706e 12880
bogdanm 82:6473597d706e 12881 /*!
bogdanm 82:6473597d706e 12882 * @name Register AIPS_PACRO, field WP1[25] (RW)
bogdanm 82:6473597d706e 12883 *
bogdanm 82:6473597d706e 12884 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 12885 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 12886 * and no peripheral access initiates.
bogdanm 82:6473597d706e 12887 *
bogdanm 82:6473597d706e 12888 * Values:
bogdanm 82:6473597d706e 12889 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 12890 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 12891 */
bogdanm 82:6473597d706e 12892 //@{
bogdanm 82:6473597d706e 12893 #define BP_AIPS_PACRO_WP1 (25U) //!< Bit position for AIPS_PACRO_WP1.
bogdanm 82:6473597d706e 12894 #define BM_AIPS_PACRO_WP1 (0x02000000U) //!< Bit mask for AIPS_PACRO_WP1.
bogdanm 82:6473597d706e 12895 #define BS_AIPS_PACRO_WP1 (1U) //!< Bit field size in bits for AIPS_PACRO_WP1.
bogdanm 82:6473597d706e 12896
bogdanm 82:6473597d706e 12897 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12898 //! @brief Read current value of the AIPS_PACRO_WP1 field.
bogdanm 82:6473597d706e 12899 #define BR_AIPS_PACRO_WP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP1))
bogdanm 82:6473597d706e 12900 #endif
bogdanm 82:6473597d706e 12901
bogdanm 82:6473597d706e 12902 //! @brief Format value for bitfield AIPS_PACRO_WP1.
bogdanm 82:6473597d706e 12903 #define BF_AIPS_PACRO_WP1(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRO_WP1), uint32_t) & BM_AIPS_PACRO_WP1)
bogdanm 82:6473597d706e 12904
bogdanm 82:6473597d706e 12905 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12906 //! @brief Set the WP1 field to a new value.
bogdanm 82:6473597d706e 12907 #define BW_AIPS_PACRO_WP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP1) = (v))
bogdanm 82:6473597d706e 12908 #endif
bogdanm 82:6473597d706e 12909 //@}
bogdanm 82:6473597d706e 12910
bogdanm 82:6473597d706e 12911 /*!
bogdanm 82:6473597d706e 12912 * @name Register AIPS_PACRO, field SP1[26] (RW)
bogdanm 82:6473597d706e 12913 *
bogdanm 82:6473597d706e 12914 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 12915 * access. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 12916 * supervisor access attribute, and the MPRx[MPLn] control field for the master must
bogdanm 82:6473597d706e 12917 * be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 12918 * access initiates.
bogdanm 82:6473597d706e 12919 *
bogdanm 82:6473597d706e 12920 * Values:
bogdanm 82:6473597d706e 12921 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 12922 * accesses.
bogdanm 82:6473597d706e 12923 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 12924 */
bogdanm 82:6473597d706e 12925 //@{
bogdanm 82:6473597d706e 12926 #define BP_AIPS_PACRO_SP1 (26U) //!< Bit position for AIPS_PACRO_SP1.
bogdanm 82:6473597d706e 12927 #define BM_AIPS_PACRO_SP1 (0x04000000U) //!< Bit mask for AIPS_PACRO_SP1.
bogdanm 82:6473597d706e 12928 #define BS_AIPS_PACRO_SP1 (1U) //!< Bit field size in bits for AIPS_PACRO_SP1.
bogdanm 82:6473597d706e 12929
bogdanm 82:6473597d706e 12930 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12931 //! @brief Read current value of the AIPS_PACRO_SP1 field.
bogdanm 82:6473597d706e 12932 #define BR_AIPS_PACRO_SP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP1))
bogdanm 82:6473597d706e 12933 #endif
bogdanm 82:6473597d706e 12934
bogdanm 82:6473597d706e 12935 //! @brief Format value for bitfield AIPS_PACRO_SP1.
bogdanm 82:6473597d706e 12936 #define BF_AIPS_PACRO_SP1(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRO_SP1), uint32_t) & BM_AIPS_PACRO_SP1)
bogdanm 82:6473597d706e 12937
bogdanm 82:6473597d706e 12938 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12939 //! @brief Set the SP1 field to a new value.
bogdanm 82:6473597d706e 12940 #define BW_AIPS_PACRO_SP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP1) = (v))
bogdanm 82:6473597d706e 12941 #endif
bogdanm 82:6473597d706e 12942 //@}
bogdanm 82:6473597d706e 12943
bogdanm 82:6473597d706e 12944 /*!
bogdanm 82:6473597d706e 12945 * @name Register AIPS_PACRO, field TP0[28] (RW)
bogdanm 82:6473597d706e 12946 *
bogdanm 82:6473597d706e 12947 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 12948 * When this bit is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 12949 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 12950 *
bogdanm 82:6473597d706e 12951 * Values:
bogdanm 82:6473597d706e 12952 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 12953 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 12954 */
bogdanm 82:6473597d706e 12955 //@{
bogdanm 82:6473597d706e 12956 #define BP_AIPS_PACRO_TP0 (28U) //!< Bit position for AIPS_PACRO_TP0.
bogdanm 82:6473597d706e 12957 #define BM_AIPS_PACRO_TP0 (0x10000000U) //!< Bit mask for AIPS_PACRO_TP0.
bogdanm 82:6473597d706e 12958 #define BS_AIPS_PACRO_TP0 (1U) //!< Bit field size in bits for AIPS_PACRO_TP0.
bogdanm 82:6473597d706e 12959
bogdanm 82:6473597d706e 12960 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12961 //! @brief Read current value of the AIPS_PACRO_TP0 field.
bogdanm 82:6473597d706e 12962 #define BR_AIPS_PACRO_TP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP0))
bogdanm 82:6473597d706e 12963 #endif
bogdanm 82:6473597d706e 12964
bogdanm 82:6473597d706e 12965 //! @brief Format value for bitfield AIPS_PACRO_TP0.
bogdanm 82:6473597d706e 12966 #define BF_AIPS_PACRO_TP0(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRO_TP0), uint32_t) & BM_AIPS_PACRO_TP0)
bogdanm 82:6473597d706e 12967
bogdanm 82:6473597d706e 12968 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12969 //! @brief Set the TP0 field to a new value.
bogdanm 82:6473597d706e 12970 #define BW_AIPS_PACRO_TP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_TP0) = (v))
bogdanm 82:6473597d706e 12971 #endif
bogdanm 82:6473597d706e 12972 //@}
bogdanm 82:6473597d706e 12973
bogdanm 82:6473597d706e 12974 /*!
bogdanm 82:6473597d706e 12975 * @name Register AIPS_PACRO, field WP0[29] (RW)
bogdanm 82:6473597d706e 12976 *
bogdanm 82:6473597d706e 12977 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 12978 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 12979 * and no peripheral access initiates.
bogdanm 82:6473597d706e 12980 *
bogdanm 82:6473597d706e 12981 * Values:
bogdanm 82:6473597d706e 12982 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 12983 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 12984 */
bogdanm 82:6473597d706e 12985 //@{
bogdanm 82:6473597d706e 12986 #define BP_AIPS_PACRO_WP0 (29U) //!< Bit position for AIPS_PACRO_WP0.
bogdanm 82:6473597d706e 12987 #define BM_AIPS_PACRO_WP0 (0x20000000U) //!< Bit mask for AIPS_PACRO_WP0.
bogdanm 82:6473597d706e 12988 #define BS_AIPS_PACRO_WP0 (1U) //!< Bit field size in bits for AIPS_PACRO_WP0.
bogdanm 82:6473597d706e 12989
bogdanm 82:6473597d706e 12990 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12991 //! @brief Read current value of the AIPS_PACRO_WP0 field.
bogdanm 82:6473597d706e 12992 #define BR_AIPS_PACRO_WP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP0))
bogdanm 82:6473597d706e 12993 #endif
bogdanm 82:6473597d706e 12994
bogdanm 82:6473597d706e 12995 //! @brief Format value for bitfield AIPS_PACRO_WP0.
bogdanm 82:6473597d706e 12996 #define BF_AIPS_PACRO_WP0(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRO_WP0), uint32_t) & BM_AIPS_PACRO_WP0)
bogdanm 82:6473597d706e 12997
bogdanm 82:6473597d706e 12998 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 12999 //! @brief Set the WP0 field to a new value.
bogdanm 82:6473597d706e 13000 #define BW_AIPS_PACRO_WP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_WP0) = (v))
bogdanm 82:6473597d706e 13001 #endif
bogdanm 82:6473597d706e 13002 //@}
bogdanm 82:6473597d706e 13003
bogdanm 82:6473597d706e 13004 /*!
bogdanm 82:6473597d706e 13005 * @name Register AIPS_PACRO, field SP0[30] (RW)
bogdanm 82:6473597d706e 13006 *
bogdanm 82:6473597d706e 13007 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 13008 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 13009 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 13010 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 13011 * access initiates.
bogdanm 82:6473597d706e 13012 *
bogdanm 82:6473597d706e 13013 * Values:
bogdanm 82:6473597d706e 13014 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 13015 * accesses.
bogdanm 82:6473597d706e 13016 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 13017 */
bogdanm 82:6473597d706e 13018 //@{
bogdanm 82:6473597d706e 13019 #define BP_AIPS_PACRO_SP0 (30U) //!< Bit position for AIPS_PACRO_SP0.
bogdanm 82:6473597d706e 13020 #define BM_AIPS_PACRO_SP0 (0x40000000U) //!< Bit mask for AIPS_PACRO_SP0.
bogdanm 82:6473597d706e 13021 #define BS_AIPS_PACRO_SP0 (1U) //!< Bit field size in bits for AIPS_PACRO_SP0.
bogdanm 82:6473597d706e 13022
bogdanm 82:6473597d706e 13023 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13024 //! @brief Read current value of the AIPS_PACRO_SP0 field.
bogdanm 82:6473597d706e 13025 #define BR_AIPS_PACRO_SP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP0))
bogdanm 82:6473597d706e 13026 #endif
bogdanm 82:6473597d706e 13027
bogdanm 82:6473597d706e 13028 //! @brief Format value for bitfield AIPS_PACRO_SP0.
bogdanm 82:6473597d706e 13029 #define BF_AIPS_PACRO_SP0(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRO_SP0), uint32_t) & BM_AIPS_PACRO_SP0)
bogdanm 82:6473597d706e 13030
bogdanm 82:6473597d706e 13031 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13032 //! @brief Set the SP0 field to a new value.
bogdanm 82:6473597d706e 13033 #define BW_AIPS_PACRO_SP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRO_ADDR(x), BP_AIPS_PACRO_SP0) = (v))
bogdanm 82:6473597d706e 13034 #endif
bogdanm 82:6473597d706e 13035 //@}
bogdanm 82:6473597d706e 13036
bogdanm 82:6473597d706e 13037 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 13038 // HW_AIPS_PACRP - Peripheral Access Control Register
bogdanm 82:6473597d706e 13039 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 13040
bogdanm 82:6473597d706e 13041 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13042 /*!
bogdanm 82:6473597d706e 13043 * @brief HW_AIPS_PACRP - Peripheral Access Control Register (RW)
bogdanm 82:6473597d706e 13044 *
bogdanm 82:6473597d706e 13045 * Reset value: 0x44444444U
bogdanm 82:6473597d706e 13046 *
bogdanm 82:6473597d706e 13047 * This section describes PACR registers E-P, which control peripheral slots
bogdanm 82:6473597d706e 13048 * 32-127. See PACRPeripheral Access Control Register for the description of these
bogdanm 82:6473597d706e 13049 * registers.
bogdanm 82:6473597d706e 13050 */
bogdanm 82:6473597d706e 13051 typedef union _hw_aips_pacrp
bogdanm 82:6473597d706e 13052 {
bogdanm 82:6473597d706e 13053 uint32_t U;
bogdanm 82:6473597d706e 13054 struct _hw_aips_pacrp_bitfields
bogdanm 82:6473597d706e 13055 {
bogdanm 82:6473597d706e 13056 uint32_t TP7 : 1; //!< [0] Trusted Protect
bogdanm 82:6473597d706e 13057 uint32_t WP7 : 1; //!< [1] Write Protect
bogdanm 82:6473597d706e 13058 uint32_t SP7 : 1; //!< [2] Supervisor Protect
bogdanm 82:6473597d706e 13059 uint32_t RESERVED0 : 1; //!< [3]
bogdanm 82:6473597d706e 13060 uint32_t TP6 : 1; //!< [4] Trusted Protect
bogdanm 82:6473597d706e 13061 uint32_t WP6 : 1; //!< [5] Write Protect
bogdanm 82:6473597d706e 13062 uint32_t SP6 : 1; //!< [6] Supervisor Protect
bogdanm 82:6473597d706e 13063 uint32_t RESERVED1 : 1; //!< [7]
bogdanm 82:6473597d706e 13064 uint32_t TP5 : 1; //!< [8] Trusted Protect
bogdanm 82:6473597d706e 13065 uint32_t WP5 : 1; //!< [9] Write Protect
bogdanm 82:6473597d706e 13066 uint32_t SP5 : 1; //!< [10] Supervisor Protect
bogdanm 82:6473597d706e 13067 uint32_t RESERVED2 : 1; //!< [11]
bogdanm 82:6473597d706e 13068 uint32_t TP4 : 1; //!< [12] Trusted Protect
bogdanm 82:6473597d706e 13069 uint32_t WP4 : 1; //!< [13] Write Protect
bogdanm 82:6473597d706e 13070 uint32_t SP4 : 1; //!< [14] Supervisor Protect
bogdanm 82:6473597d706e 13071 uint32_t RESERVED3 : 1; //!< [15]
bogdanm 82:6473597d706e 13072 uint32_t TP3 : 1; //!< [16] Trusted Protect
bogdanm 82:6473597d706e 13073 uint32_t WP3 : 1; //!< [17] Write Protect
bogdanm 82:6473597d706e 13074 uint32_t SP3 : 1; //!< [18] Supervisor Protect
bogdanm 82:6473597d706e 13075 uint32_t RESERVED4 : 1; //!< [19]
bogdanm 82:6473597d706e 13076 uint32_t TP2 : 1; //!< [20] Trusted Protect
bogdanm 82:6473597d706e 13077 uint32_t WP2 : 1; //!< [21] Write Protect
bogdanm 82:6473597d706e 13078 uint32_t SP2 : 1; //!< [22] Supervisor Protect
bogdanm 82:6473597d706e 13079 uint32_t RESERVED5 : 1; //!< [23]
bogdanm 82:6473597d706e 13080 uint32_t TP1 : 1; //!< [24] Trusted Protect
bogdanm 82:6473597d706e 13081 uint32_t WP1 : 1; //!< [25] Write Protect
bogdanm 82:6473597d706e 13082 uint32_t SP1 : 1; //!< [26] Supervisor Protect
bogdanm 82:6473597d706e 13083 uint32_t RESERVED6 : 1; //!< [27]
bogdanm 82:6473597d706e 13084 uint32_t TP0 : 1; //!< [28] Trusted Protect
bogdanm 82:6473597d706e 13085 uint32_t WP0 : 1; //!< [29] Write Protect
bogdanm 82:6473597d706e 13086 uint32_t SP0 : 1; //!< [30] Supervisor Protect
bogdanm 82:6473597d706e 13087 uint32_t RESERVED7 : 1; //!< [31]
bogdanm 82:6473597d706e 13088 } B;
bogdanm 82:6473597d706e 13089 } hw_aips_pacrp_t;
bogdanm 82:6473597d706e 13090 #endif
bogdanm 82:6473597d706e 13091
bogdanm 82:6473597d706e 13092 /*!
bogdanm 82:6473597d706e 13093 * @name Constants and macros for entire AIPS_PACRP register
bogdanm 82:6473597d706e 13094 */
bogdanm 82:6473597d706e 13095 //@{
bogdanm 82:6473597d706e 13096 #define HW_AIPS_PACRP_ADDR(x) (REGS_AIPS_BASE(x) + 0x6CU)
bogdanm 82:6473597d706e 13097
bogdanm 82:6473597d706e 13098 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13099 #define HW_AIPS_PACRP(x) (*(__IO hw_aips_pacrp_t *) HW_AIPS_PACRP_ADDR(x))
bogdanm 82:6473597d706e 13100 #define HW_AIPS_PACRP_RD(x) (HW_AIPS_PACRP(x).U)
bogdanm 82:6473597d706e 13101 #define HW_AIPS_PACRP_WR(x, v) (HW_AIPS_PACRP(x).U = (v))
bogdanm 82:6473597d706e 13102 #define HW_AIPS_PACRP_SET(x, v) (HW_AIPS_PACRP_WR(x, HW_AIPS_PACRP_RD(x) | (v)))
bogdanm 82:6473597d706e 13103 #define HW_AIPS_PACRP_CLR(x, v) (HW_AIPS_PACRP_WR(x, HW_AIPS_PACRP_RD(x) & ~(v)))
bogdanm 82:6473597d706e 13104 #define HW_AIPS_PACRP_TOG(x, v) (HW_AIPS_PACRP_WR(x, HW_AIPS_PACRP_RD(x) ^ (v)))
bogdanm 82:6473597d706e 13105 #endif
bogdanm 82:6473597d706e 13106 //@}
bogdanm 82:6473597d706e 13107
bogdanm 82:6473597d706e 13108 /*
bogdanm 82:6473597d706e 13109 * Constants & macros for individual AIPS_PACRP bitfields
bogdanm 82:6473597d706e 13110 */
bogdanm 82:6473597d706e 13111
bogdanm 82:6473597d706e 13112 /*!
bogdanm 82:6473597d706e 13113 * @name Register AIPS_PACRP, field TP7[0] (RW)
bogdanm 82:6473597d706e 13114 *
bogdanm 82:6473597d706e 13115 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 13116 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 13117 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 13118 *
bogdanm 82:6473597d706e 13119 * Values:
bogdanm 82:6473597d706e 13120 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 13121 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 13122 */
bogdanm 82:6473597d706e 13123 //@{
bogdanm 82:6473597d706e 13124 #define BP_AIPS_PACRP_TP7 (0U) //!< Bit position for AIPS_PACRP_TP7.
bogdanm 82:6473597d706e 13125 #define BM_AIPS_PACRP_TP7 (0x00000001U) //!< Bit mask for AIPS_PACRP_TP7.
bogdanm 82:6473597d706e 13126 #define BS_AIPS_PACRP_TP7 (1U) //!< Bit field size in bits for AIPS_PACRP_TP7.
bogdanm 82:6473597d706e 13127
bogdanm 82:6473597d706e 13128 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13129 //! @brief Read current value of the AIPS_PACRP_TP7 field.
bogdanm 82:6473597d706e 13130 #define BR_AIPS_PACRP_TP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP7))
bogdanm 82:6473597d706e 13131 #endif
bogdanm 82:6473597d706e 13132
bogdanm 82:6473597d706e 13133 //! @brief Format value for bitfield AIPS_PACRP_TP7.
bogdanm 82:6473597d706e 13134 #define BF_AIPS_PACRP_TP7(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRP_TP7), uint32_t) & BM_AIPS_PACRP_TP7)
bogdanm 82:6473597d706e 13135
bogdanm 82:6473597d706e 13136 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13137 //! @brief Set the TP7 field to a new value.
bogdanm 82:6473597d706e 13138 #define BW_AIPS_PACRP_TP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP7) = (v))
bogdanm 82:6473597d706e 13139 #endif
bogdanm 82:6473597d706e 13140 //@}
bogdanm 82:6473597d706e 13141
bogdanm 82:6473597d706e 13142 /*!
bogdanm 82:6473597d706e 13143 * @name Register AIPS_PACRP, field WP7[1] (RW)
bogdanm 82:6473597d706e 13144 *
bogdanm 82:6473597d706e 13145 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 13146 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 13147 * and no peripheral access initiates.
bogdanm 82:6473597d706e 13148 *
bogdanm 82:6473597d706e 13149 * Values:
bogdanm 82:6473597d706e 13150 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 13151 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 13152 */
bogdanm 82:6473597d706e 13153 //@{
bogdanm 82:6473597d706e 13154 #define BP_AIPS_PACRP_WP7 (1U) //!< Bit position for AIPS_PACRP_WP7.
bogdanm 82:6473597d706e 13155 #define BM_AIPS_PACRP_WP7 (0x00000002U) //!< Bit mask for AIPS_PACRP_WP7.
bogdanm 82:6473597d706e 13156 #define BS_AIPS_PACRP_WP7 (1U) //!< Bit field size in bits for AIPS_PACRP_WP7.
bogdanm 82:6473597d706e 13157
bogdanm 82:6473597d706e 13158 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13159 //! @brief Read current value of the AIPS_PACRP_WP7 field.
bogdanm 82:6473597d706e 13160 #define BR_AIPS_PACRP_WP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP7))
bogdanm 82:6473597d706e 13161 #endif
bogdanm 82:6473597d706e 13162
bogdanm 82:6473597d706e 13163 //! @brief Format value for bitfield AIPS_PACRP_WP7.
bogdanm 82:6473597d706e 13164 #define BF_AIPS_PACRP_WP7(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRP_WP7), uint32_t) & BM_AIPS_PACRP_WP7)
bogdanm 82:6473597d706e 13165
bogdanm 82:6473597d706e 13166 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13167 //! @brief Set the WP7 field to a new value.
bogdanm 82:6473597d706e 13168 #define BW_AIPS_PACRP_WP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP7) = (v))
bogdanm 82:6473597d706e 13169 #endif
bogdanm 82:6473597d706e 13170 //@}
bogdanm 82:6473597d706e 13171
bogdanm 82:6473597d706e 13172 /*!
bogdanm 82:6473597d706e 13173 * @name Register AIPS_PACRP, field SP7[2] (RW)
bogdanm 82:6473597d706e 13174 *
bogdanm 82:6473597d706e 13175 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 13176 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 13177 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 13178 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 13179 * access initiates.
bogdanm 82:6473597d706e 13180 *
bogdanm 82:6473597d706e 13181 * Values:
bogdanm 82:6473597d706e 13182 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 13183 * accesses.
bogdanm 82:6473597d706e 13184 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 13185 */
bogdanm 82:6473597d706e 13186 //@{
bogdanm 82:6473597d706e 13187 #define BP_AIPS_PACRP_SP7 (2U) //!< Bit position for AIPS_PACRP_SP7.
bogdanm 82:6473597d706e 13188 #define BM_AIPS_PACRP_SP7 (0x00000004U) //!< Bit mask for AIPS_PACRP_SP7.
bogdanm 82:6473597d706e 13189 #define BS_AIPS_PACRP_SP7 (1U) //!< Bit field size in bits for AIPS_PACRP_SP7.
bogdanm 82:6473597d706e 13190
bogdanm 82:6473597d706e 13191 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13192 //! @brief Read current value of the AIPS_PACRP_SP7 field.
bogdanm 82:6473597d706e 13193 #define BR_AIPS_PACRP_SP7(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP7))
bogdanm 82:6473597d706e 13194 #endif
bogdanm 82:6473597d706e 13195
bogdanm 82:6473597d706e 13196 //! @brief Format value for bitfield AIPS_PACRP_SP7.
bogdanm 82:6473597d706e 13197 #define BF_AIPS_PACRP_SP7(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRP_SP7), uint32_t) & BM_AIPS_PACRP_SP7)
bogdanm 82:6473597d706e 13198
bogdanm 82:6473597d706e 13199 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13200 //! @brief Set the SP7 field to a new value.
bogdanm 82:6473597d706e 13201 #define BW_AIPS_PACRP_SP7(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP7) = (v))
bogdanm 82:6473597d706e 13202 #endif
bogdanm 82:6473597d706e 13203 //@}
bogdanm 82:6473597d706e 13204
bogdanm 82:6473597d706e 13205 /*!
bogdanm 82:6473597d706e 13206 * @name Register AIPS_PACRP, field TP6[4] (RW)
bogdanm 82:6473597d706e 13207 *
bogdanm 82:6473597d706e 13208 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 13209 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 13210 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 13211 *
bogdanm 82:6473597d706e 13212 * Values:
bogdanm 82:6473597d706e 13213 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 13214 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 13215 */
bogdanm 82:6473597d706e 13216 //@{
bogdanm 82:6473597d706e 13217 #define BP_AIPS_PACRP_TP6 (4U) //!< Bit position for AIPS_PACRP_TP6.
bogdanm 82:6473597d706e 13218 #define BM_AIPS_PACRP_TP6 (0x00000010U) //!< Bit mask for AIPS_PACRP_TP6.
bogdanm 82:6473597d706e 13219 #define BS_AIPS_PACRP_TP6 (1U) //!< Bit field size in bits for AIPS_PACRP_TP6.
bogdanm 82:6473597d706e 13220
bogdanm 82:6473597d706e 13221 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13222 //! @brief Read current value of the AIPS_PACRP_TP6 field.
bogdanm 82:6473597d706e 13223 #define BR_AIPS_PACRP_TP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP6))
bogdanm 82:6473597d706e 13224 #endif
bogdanm 82:6473597d706e 13225
bogdanm 82:6473597d706e 13226 //! @brief Format value for bitfield AIPS_PACRP_TP6.
bogdanm 82:6473597d706e 13227 #define BF_AIPS_PACRP_TP6(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRP_TP6), uint32_t) & BM_AIPS_PACRP_TP6)
bogdanm 82:6473597d706e 13228
bogdanm 82:6473597d706e 13229 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13230 //! @brief Set the TP6 field to a new value.
bogdanm 82:6473597d706e 13231 #define BW_AIPS_PACRP_TP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP6) = (v))
bogdanm 82:6473597d706e 13232 #endif
bogdanm 82:6473597d706e 13233 //@}
bogdanm 82:6473597d706e 13234
bogdanm 82:6473597d706e 13235 /*!
bogdanm 82:6473597d706e 13236 * @name Register AIPS_PACRP, field WP6[5] (RW)
bogdanm 82:6473597d706e 13237 *
bogdanm 82:6473597d706e 13238 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 13239 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 13240 * and no peripheral access initiates.
bogdanm 82:6473597d706e 13241 *
bogdanm 82:6473597d706e 13242 * Values:
bogdanm 82:6473597d706e 13243 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 13244 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 13245 */
bogdanm 82:6473597d706e 13246 //@{
bogdanm 82:6473597d706e 13247 #define BP_AIPS_PACRP_WP6 (5U) //!< Bit position for AIPS_PACRP_WP6.
bogdanm 82:6473597d706e 13248 #define BM_AIPS_PACRP_WP6 (0x00000020U) //!< Bit mask for AIPS_PACRP_WP6.
bogdanm 82:6473597d706e 13249 #define BS_AIPS_PACRP_WP6 (1U) //!< Bit field size in bits for AIPS_PACRP_WP6.
bogdanm 82:6473597d706e 13250
bogdanm 82:6473597d706e 13251 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13252 //! @brief Read current value of the AIPS_PACRP_WP6 field.
bogdanm 82:6473597d706e 13253 #define BR_AIPS_PACRP_WP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP6))
bogdanm 82:6473597d706e 13254 #endif
bogdanm 82:6473597d706e 13255
bogdanm 82:6473597d706e 13256 //! @brief Format value for bitfield AIPS_PACRP_WP6.
bogdanm 82:6473597d706e 13257 #define BF_AIPS_PACRP_WP6(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRP_WP6), uint32_t) & BM_AIPS_PACRP_WP6)
bogdanm 82:6473597d706e 13258
bogdanm 82:6473597d706e 13259 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13260 //! @brief Set the WP6 field to a new value.
bogdanm 82:6473597d706e 13261 #define BW_AIPS_PACRP_WP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP6) = (v))
bogdanm 82:6473597d706e 13262 #endif
bogdanm 82:6473597d706e 13263 //@}
bogdanm 82:6473597d706e 13264
bogdanm 82:6473597d706e 13265 /*!
bogdanm 82:6473597d706e 13266 * @name Register AIPS_PACRP, field SP6[6] (RW)
bogdanm 82:6473597d706e 13267 *
bogdanm 82:6473597d706e 13268 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 13269 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 13270 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 13271 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 13272 * access initiates.
bogdanm 82:6473597d706e 13273 *
bogdanm 82:6473597d706e 13274 * Values:
bogdanm 82:6473597d706e 13275 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 13276 * accesses.
bogdanm 82:6473597d706e 13277 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 13278 */
bogdanm 82:6473597d706e 13279 //@{
bogdanm 82:6473597d706e 13280 #define BP_AIPS_PACRP_SP6 (6U) //!< Bit position for AIPS_PACRP_SP6.
bogdanm 82:6473597d706e 13281 #define BM_AIPS_PACRP_SP6 (0x00000040U) //!< Bit mask for AIPS_PACRP_SP6.
bogdanm 82:6473597d706e 13282 #define BS_AIPS_PACRP_SP6 (1U) //!< Bit field size in bits for AIPS_PACRP_SP6.
bogdanm 82:6473597d706e 13283
bogdanm 82:6473597d706e 13284 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13285 //! @brief Read current value of the AIPS_PACRP_SP6 field.
bogdanm 82:6473597d706e 13286 #define BR_AIPS_PACRP_SP6(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP6))
bogdanm 82:6473597d706e 13287 #endif
bogdanm 82:6473597d706e 13288
bogdanm 82:6473597d706e 13289 //! @brief Format value for bitfield AIPS_PACRP_SP6.
bogdanm 82:6473597d706e 13290 #define BF_AIPS_PACRP_SP6(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRP_SP6), uint32_t) & BM_AIPS_PACRP_SP6)
bogdanm 82:6473597d706e 13291
bogdanm 82:6473597d706e 13292 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13293 //! @brief Set the SP6 field to a new value.
bogdanm 82:6473597d706e 13294 #define BW_AIPS_PACRP_SP6(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP6) = (v))
bogdanm 82:6473597d706e 13295 #endif
bogdanm 82:6473597d706e 13296 //@}
bogdanm 82:6473597d706e 13297
bogdanm 82:6473597d706e 13298 /*!
bogdanm 82:6473597d706e 13299 * @name Register AIPS_PACRP, field TP5[8] (RW)
bogdanm 82:6473597d706e 13300 *
bogdanm 82:6473597d706e 13301 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 13302 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 13303 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 13304 *
bogdanm 82:6473597d706e 13305 * Values:
bogdanm 82:6473597d706e 13306 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 13307 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 13308 */
bogdanm 82:6473597d706e 13309 //@{
bogdanm 82:6473597d706e 13310 #define BP_AIPS_PACRP_TP5 (8U) //!< Bit position for AIPS_PACRP_TP5.
bogdanm 82:6473597d706e 13311 #define BM_AIPS_PACRP_TP5 (0x00000100U) //!< Bit mask for AIPS_PACRP_TP5.
bogdanm 82:6473597d706e 13312 #define BS_AIPS_PACRP_TP5 (1U) //!< Bit field size in bits for AIPS_PACRP_TP5.
bogdanm 82:6473597d706e 13313
bogdanm 82:6473597d706e 13314 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13315 //! @brief Read current value of the AIPS_PACRP_TP5 field.
bogdanm 82:6473597d706e 13316 #define BR_AIPS_PACRP_TP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP5))
bogdanm 82:6473597d706e 13317 #endif
bogdanm 82:6473597d706e 13318
bogdanm 82:6473597d706e 13319 //! @brief Format value for bitfield AIPS_PACRP_TP5.
bogdanm 82:6473597d706e 13320 #define BF_AIPS_PACRP_TP5(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRP_TP5), uint32_t) & BM_AIPS_PACRP_TP5)
bogdanm 82:6473597d706e 13321
bogdanm 82:6473597d706e 13322 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13323 //! @brief Set the TP5 field to a new value.
bogdanm 82:6473597d706e 13324 #define BW_AIPS_PACRP_TP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP5) = (v))
bogdanm 82:6473597d706e 13325 #endif
bogdanm 82:6473597d706e 13326 //@}
bogdanm 82:6473597d706e 13327
bogdanm 82:6473597d706e 13328 /*!
bogdanm 82:6473597d706e 13329 * @name Register AIPS_PACRP, field WP5[9] (RW)
bogdanm 82:6473597d706e 13330 *
bogdanm 82:6473597d706e 13331 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 13332 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 13333 * and no peripheral access initiates.
bogdanm 82:6473597d706e 13334 *
bogdanm 82:6473597d706e 13335 * Values:
bogdanm 82:6473597d706e 13336 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 13337 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 13338 */
bogdanm 82:6473597d706e 13339 //@{
bogdanm 82:6473597d706e 13340 #define BP_AIPS_PACRP_WP5 (9U) //!< Bit position for AIPS_PACRP_WP5.
bogdanm 82:6473597d706e 13341 #define BM_AIPS_PACRP_WP5 (0x00000200U) //!< Bit mask for AIPS_PACRP_WP5.
bogdanm 82:6473597d706e 13342 #define BS_AIPS_PACRP_WP5 (1U) //!< Bit field size in bits for AIPS_PACRP_WP5.
bogdanm 82:6473597d706e 13343
bogdanm 82:6473597d706e 13344 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13345 //! @brief Read current value of the AIPS_PACRP_WP5 field.
bogdanm 82:6473597d706e 13346 #define BR_AIPS_PACRP_WP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP5))
bogdanm 82:6473597d706e 13347 #endif
bogdanm 82:6473597d706e 13348
bogdanm 82:6473597d706e 13349 //! @brief Format value for bitfield AIPS_PACRP_WP5.
bogdanm 82:6473597d706e 13350 #define BF_AIPS_PACRP_WP5(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRP_WP5), uint32_t) & BM_AIPS_PACRP_WP5)
bogdanm 82:6473597d706e 13351
bogdanm 82:6473597d706e 13352 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13353 //! @brief Set the WP5 field to a new value.
bogdanm 82:6473597d706e 13354 #define BW_AIPS_PACRP_WP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP5) = (v))
bogdanm 82:6473597d706e 13355 #endif
bogdanm 82:6473597d706e 13356 //@}
bogdanm 82:6473597d706e 13357
bogdanm 82:6473597d706e 13358 /*!
bogdanm 82:6473597d706e 13359 * @name Register AIPS_PACRP, field SP5[10] (RW)
bogdanm 82:6473597d706e 13360 *
bogdanm 82:6473597d706e 13361 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 13362 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 13363 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 13364 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 13365 * access initiates.
bogdanm 82:6473597d706e 13366 *
bogdanm 82:6473597d706e 13367 * Values:
bogdanm 82:6473597d706e 13368 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 13369 * accesses.
bogdanm 82:6473597d706e 13370 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 13371 */
bogdanm 82:6473597d706e 13372 //@{
bogdanm 82:6473597d706e 13373 #define BP_AIPS_PACRP_SP5 (10U) //!< Bit position for AIPS_PACRP_SP5.
bogdanm 82:6473597d706e 13374 #define BM_AIPS_PACRP_SP5 (0x00000400U) //!< Bit mask for AIPS_PACRP_SP5.
bogdanm 82:6473597d706e 13375 #define BS_AIPS_PACRP_SP5 (1U) //!< Bit field size in bits for AIPS_PACRP_SP5.
bogdanm 82:6473597d706e 13376
bogdanm 82:6473597d706e 13377 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13378 //! @brief Read current value of the AIPS_PACRP_SP5 field.
bogdanm 82:6473597d706e 13379 #define BR_AIPS_PACRP_SP5(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP5))
bogdanm 82:6473597d706e 13380 #endif
bogdanm 82:6473597d706e 13381
bogdanm 82:6473597d706e 13382 //! @brief Format value for bitfield AIPS_PACRP_SP5.
bogdanm 82:6473597d706e 13383 #define BF_AIPS_PACRP_SP5(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRP_SP5), uint32_t) & BM_AIPS_PACRP_SP5)
bogdanm 82:6473597d706e 13384
bogdanm 82:6473597d706e 13385 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13386 //! @brief Set the SP5 field to a new value.
bogdanm 82:6473597d706e 13387 #define BW_AIPS_PACRP_SP5(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP5) = (v))
bogdanm 82:6473597d706e 13388 #endif
bogdanm 82:6473597d706e 13389 //@}
bogdanm 82:6473597d706e 13390
bogdanm 82:6473597d706e 13391 /*!
bogdanm 82:6473597d706e 13392 * @name Register AIPS_PACRP, field TP4[12] (RW)
bogdanm 82:6473597d706e 13393 *
bogdanm 82:6473597d706e 13394 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 13395 * When this bit is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 13396 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 13397 *
bogdanm 82:6473597d706e 13398 * Values:
bogdanm 82:6473597d706e 13399 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 13400 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 13401 */
bogdanm 82:6473597d706e 13402 //@{
bogdanm 82:6473597d706e 13403 #define BP_AIPS_PACRP_TP4 (12U) //!< Bit position for AIPS_PACRP_TP4.
bogdanm 82:6473597d706e 13404 #define BM_AIPS_PACRP_TP4 (0x00001000U) //!< Bit mask for AIPS_PACRP_TP4.
bogdanm 82:6473597d706e 13405 #define BS_AIPS_PACRP_TP4 (1U) //!< Bit field size in bits for AIPS_PACRP_TP4.
bogdanm 82:6473597d706e 13406
bogdanm 82:6473597d706e 13407 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13408 //! @brief Read current value of the AIPS_PACRP_TP4 field.
bogdanm 82:6473597d706e 13409 #define BR_AIPS_PACRP_TP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP4))
bogdanm 82:6473597d706e 13410 #endif
bogdanm 82:6473597d706e 13411
bogdanm 82:6473597d706e 13412 //! @brief Format value for bitfield AIPS_PACRP_TP4.
bogdanm 82:6473597d706e 13413 #define BF_AIPS_PACRP_TP4(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRP_TP4), uint32_t) & BM_AIPS_PACRP_TP4)
bogdanm 82:6473597d706e 13414
bogdanm 82:6473597d706e 13415 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13416 //! @brief Set the TP4 field to a new value.
bogdanm 82:6473597d706e 13417 #define BW_AIPS_PACRP_TP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP4) = (v))
bogdanm 82:6473597d706e 13418 #endif
bogdanm 82:6473597d706e 13419 //@}
bogdanm 82:6473597d706e 13420
bogdanm 82:6473597d706e 13421 /*!
bogdanm 82:6473597d706e 13422 * @name Register AIPS_PACRP, field WP4[13] (RW)
bogdanm 82:6473597d706e 13423 *
bogdanm 82:6473597d706e 13424 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 13425 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 13426 * and no peripheral access initiates.
bogdanm 82:6473597d706e 13427 *
bogdanm 82:6473597d706e 13428 * Values:
bogdanm 82:6473597d706e 13429 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 13430 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 13431 */
bogdanm 82:6473597d706e 13432 //@{
bogdanm 82:6473597d706e 13433 #define BP_AIPS_PACRP_WP4 (13U) //!< Bit position for AIPS_PACRP_WP4.
bogdanm 82:6473597d706e 13434 #define BM_AIPS_PACRP_WP4 (0x00002000U) //!< Bit mask for AIPS_PACRP_WP4.
bogdanm 82:6473597d706e 13435 #define BS_AIPS_PACRP_WP4 (1U) //!< Bit field size in bits for AIPS_PACRP_WP4.
bogdanm 82:6473597d706e 13436
bogdanm 82:6473597d706e 13437 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13438 //! @brief Read current value of the AIPS_PACRP_WP4 field.
bogdanm 82:6473597d706e 13439 #define BR_AIPS_PACRP_WP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP4))
bogdanm 82:6473597d706e 13440 #endif
bogdanm 82:6473597d706e 13441
bogdanm 82:6473597d706e 13442 //! @brief Format value for bitfield AIPS_PACRP_WP4.
bogdanm 82:6473597d706e 13443 #define BF_AIPS_PACRP_WP4(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRP_WP4), uint32_t) & BM_AIPS_PACRP_WP4)
bogdanm 82:6473597d706e 13444
bogdanm 82:6473597d706e 13445 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13446 //! @brief Set the WP4 field to a new value.
bogdanm 82:6473597d706e 13447 #define BW_AIPS_PACRP_WP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP4) = (v))
bogdanm 82:6473597d706e 13448 #endif
bogdanm 82:6473597d706e 13449 //@}
bogdanm 82:6473597d706e 13450
bogdanm 82:6473597d706e 13451 /*!
bogdanm 82:6473597d706e 13452 * @name Register AIPS_PACRP, field SP4[14] (RW)
bogdanm 82:6473597d706e 13453 *
bogdanm 82:6473597d706e 13454 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 13455 * access. When this bit is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 13456 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
bogdanm 82:6473597d706e 13457 * set. If not, access terminates with an error response and no peripheral access
bogdanm 82:6473597d706e 13458 * initiates.
bogdanm 82:6473597d706e 13459 *
bogdanm 82:6473597d706e 13460 * Values:
bogdanm 82:6473597d706e 13461 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 13462 * accesses.
bogdanm 82:6473597d706e 13463 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 13464 */
bogdanm 82:6473597d706e 13465 //@{
bogdanm 82:6473597d706e 13466 #define BP_AIPS_PACRP_SP4 (14U) //!< Bit position for AIPS_PACRP_SP4.
bogdanm 82:6473597d706e 13467 #define BM_AIPS_PACRP_SP4 (0x00004000U) //!< Bit mask for AIPS_PACRP_SP4.
bogdanm 82:6473597d706e 13468 #define BS_AIPS_PACRP_SP4 (1U) //!< Bit field size in bits for AIPS_PACRP_SP4.
bogdanm 82:6473597d706e 13469
bogdanm 82:6473597d706e 13470 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13471 //! @brief Read current value of the AIPS_PACRP_SP4 field.
bogdanm 82:6473597d706e 13472 #define BR_AIPS_PACRP_SP4(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP4))
bogdanm 82:6473597d706e 13473 #endif
bogdanm 82:6473597d706e 13474
bogdanm 82:6473597d706e 13475 //! @brief Format value for bitfield AIPS_PACRP_SP4.
bogdanm 82:6473597d706e 13476 #define BF_AIPS_PACRP_SP4(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRP_SP4), uint32_t) & BM_AIPS_PACRP_SP4)
bogdanm 82:6473597d706e 13477
bogdanm 82:6473597d706e 13478 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13479 //! @brief Set the SP4 field to a new value.
bogdanm 82:6473597d706e 13480 #define BW_AIPS_PACRP_SP4(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP4) = (v))
bogdanm 82:6473597d706e 13481 #endif
bogdanm 82:6473597d706e 13482 //@}
bogdanm 82:6473597d706e 13483
bogdanm 82:6473597d706e 13484 /*!
bogdanm 82:6473597d706e 13485 * @name Register AIPS_PACRP, field TP3[16] (RW)
bogdanm 82:6473597d706e 13486 *
bogdanm 82:6473597d706e 13487 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 13488 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 13489 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 13490 *
bogdanm 82:6473597d706e 13491 * Values:
bogdanm 82:6473597d706e 13492 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 13493 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 13494 */
bogdanm 82:6473597d706e 13495 //@{
bogdanm 82:6473597d706e 13496 #define BP_AIPS_PACRP_TP3 (16U) //!< Bit position for AIPS_PACRP_TP3.
bogdanm 82:6473597d706e 13497 #define BM_AIPS_PACRP_TP3 (0x00010000U) //!< Bit mask for AIPS_PACRP_TP3.
bogdanm 82:6473597d706e 13498 #define BS_AIPS_PACRP_TP3 (1U) //!< Bit field size in bits for AIPS_PACRP_TP3.
bogdanm 82:6473597d706e 13499
bogdanm 82:6473597d706e 13500 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13501 //! @brief Read current value of the AIPS_PACRP_TP3 field.
bogdanm 82:6473597d706e 13502 #define BR_AIPS_PACRP_TP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP3))
bogdanm 82:6473597d706e 13503 #endif
bogdanm 82:6473597d706e 13504
bogdanm 82:6473597d706e 13505 //! @brief Format value for bitfield AIPS_PACRP_TP3.
bogdanm 82:6473597d706e 13506 #define BF_AIPS_PACRP_TP3(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRP_TP3), uint32_t) & BM_AIPS_PACRP_TP3)
bogdanm 82:6473597d706e 13507
bogdanm 82:6473597d706e 13508 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13509 //! @brief Set the TP3 field to a new value.
bogdanm 82:6473597d706e 13510 #define BW_AIPS_PACRP_TP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP3) = (v))
bogdanm 82:6473597d706e 13511 #endif
bogdanm 82:6473597d706e 13512 //@}
bogdanm 82:6473597d706e 13513
bogdanm 82:6473597d706e 13514 /*!
bogdanm 82:6473597d706e 13515 * @name Register AIPS_PACRP, field WP3[17] (RW)
bogdanm 82:6473597d706e 13516 *
bogdanm 82:6473597d706e 13517 * Determines whether the peripheral allows write accesss. When this bit is set
bogdanm 82:6473597d706e 13518 * and a write access is attempted, access terminates with an error response and
bogdanm 82:6473597d706e 13519 * no peripheral access initiates.
bogdanm 82:6473597d706e 13520 *
bogdanm 82:6473597d706e 13521 * Values:
bogdanm 82:6473597d706e 13522 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 13523 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 13524 */
bogdanm 82:6473597d706e 13525 //@{
bogdanm 82:6473597d706e 13526 #define BP_AIPS_PACRP_WP3 (17U) //!< Bit position for AIPS_PACRP_WP3.
bogdanm 82:6473597d706e 13527 #define BM_AIPS_PACRP_WP3 (0x00020000U) //!< Bit mask for AIPS_PACRP_WP3.
bogdanm 82:6473597d706e 13528 #define BS_AIPS_PACRP_WP3 (1U) //!< Bit field size in bits for AIPS_PACRP_WP3.
bogdanm 82:6473597d706e 13529
bogdanm 82:6473597d706e 13530 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13531 //! @brief Read current value of the AIPS_PACRP_WP3 field.
bogdanm 82:6473597d706e 13532 #define BR_AIPS_PACRP_WP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP3))
bogdanm 82:6473597d706e 13533 #endif
bogdanm 82:6473597d706e 13534
bogdanm 82:6473597d706e 13535 //! @brief Format value for bitfield AIPS_PACRP_WP3.
bogdanm 82:6473597d706e 13536 #define BF_AIPS_PACRP_WP3(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRP_WP3), uint32_t) & BM_AIPS_PACRP_WP3)
bogdanm 82:6473597d706e 13537
bogdanm 82:6473597d706e 13538 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13539 //! @brief Set the WP3 field to a new value.
bogdanm 82:6473597d706e 13540 #define BW_AIPS_PACRP_WP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP3) = (v))
bogdanm 82:6473597d706e 13541 #endif
bogdanm 82:6473597d706e 13542 //@}
bogdanm 82:6473597d706e 13543
bogdanm 82:6473597d706e 13544 /*!
bogdanm 82:6473597d706e 13545 * @name Register AIPS_PACRP, field SP3[18] (RW)
bogdanm 82:6473597d706e 13546 *
bogdanm 82:6473597d706e 13547 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 13548 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 13549 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 13550 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 13551 * access initiates.
bogdanm 82:6473597d706e 13552 *
bogdanm 82:6473597d706e 13553 * Values:
bogdanm 82:6473597d706e 13554 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 13555 * accesses.
bogdanm 82:6473597d706e 13556 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 13557 */
bogdanm 82:6473597d706e 13558 //@{
bogdanm 82:6473597d706e 13559 #define BP_AIPS_PACRP_SP3 (18U) //!< Bit position for AIPS_PACRP_SP3.
bogdanm 82:6473597d706e 13560 #define BM_AIPS_PACRP_SP3 (0x00040000U) //!< Bit mask for AIPS_PACRP_SP3.
bogdanm 82:6473597d706e 13561 #define BS_AIPS_PACRP_SP3 (1U) //!< Bit field size in bits for AIPS_PACRP_SP3.
bogdanm 82:6473597d706e 13562
bogdanm 82:6473597d706e 13563 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13564 //! @brief Read current value of the AIPS_PACRP_SP3 field.
bogdanm 82:6473597d706e 13565 #define BR_AIPS_PACRP_SP3(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP3))
bogdanm 82:6473597d706e 13566 #endif
bogdanm 82:6473597d706e 13567
bogdanm 82:6473597d706e 13568 //! @brief Format value for bitfield AIPS_PACRP_SP3.
bogdanm 82:6473597d706e 13569 #define BF_AIPS_PACRP_SP3(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRP_SP3), uint32_t) & BM_AIPS_PACRP_SP3)
bogdanm 82:6473597d706e 13570
bogdanm 82:6473597d706e 13571 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13572 //! @brief Set the SP3 field to a new value.
bogdanm 82:6473597d706e 13573 #define BW_AIPS_PACRP_SP3(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP3) = (v))
bogdanm 82:6473597d706e 13574 #endif
bogdanm 82:6473597d706e 13575 //@}
bogdanm 82:6473597d706e 13576
bogdanm 82:6473597d706e 13577 /*!
bogdanm 82:6473597d706e 13578 * @name Register AIPS_PACRP, field TP2[20] (RW)
bogdanm 82:6473597d706e 13579 *
bogdanm 82:6473597d706e 13580 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 13581 * When this bit is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 13582 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 13583 *
bogdanm 82:6473597d706e 13584 * Values:
bogdanm 82:6473597d706e 13585 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 13586 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 13587 */
bogdanm 82:6473597d706e 13588 //@{
bogdanm 82:6473597d706e 13589 #define BP_AIPS_PACRP_TP2 (20U) //!< Bit position for AIPS_PACRP_TP2.
bogdanm 82:6473597d706e 13590 #define BM_AIPS_PACRP_TP2 (0x00100000U) //!< Bit mask for AIPS_PACRP_TP2.
bogdanm 82:6473597d706e 13591 #define BS_AIPS_PACRP_TP2 (1U) //!< Bit field size in bits for AIPS_PACRP_TP2.
bogdanm 82:6473597d706e 13592
bogdanm 82:6473597d706e 13593 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13594 //! @brief Read current value of the AIPS_PACRP_TP2 field.
bogdanm 82:6473597d706e 13595 #define BR_AIPS_PACRP_TP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP2))
bogdanm 82:6473597d706e 13596 #endif
bogdanm 82:6473597d706e 13597
bogdanm 82:6473597d706e 13598 //! @brief Format value for bitfield AIPS_PACRP_TP2.
bogdanm 82:6473597d706e 13599 #define BF_AIPS_PACRP_TP2(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRP_TP2), uint32_t) & BM_AIPS_PACRP_TP2)
bogdanm 82:6473597d706e 13600
bogdanm 82:6473597d706e 13601 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13602 //! @brief Set the TP2 field to a new value.
bogdanm 82:6473597d706e 13603 #define BW_AIPS_PACRP_TP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP2) = (v))
bogdanm 82:6473597d706e 13604 #endif
bogdanm 82:6473597d706e 13605 //@}
bogdanm 82:6473597d706e 13606
bogdanm 82:6473597d706e 13607 /*!
bogdanm 82:6473597d706e 13608 * @name Register AIPS_PACRP, field WP2[21] (RW)
bogdanm 82:6473597d706e 13609 *
bogdanm 82:6473597d706e 13610 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 13611 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 13612 * and no peripheral access initiates.
bogdanm 82:6473597d706e 13613 *
bogdanm 82:6473597d706e 13614 * Values:
bogdanm 82:6473597d706e 13615 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 13616 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 13617 */
bogdanm 82:6473597d706e 13618 //@{
bogdanm 82:6473597d706e 13619 #define BP_AIPS_PACRP_WP2 (21U) //!< Bit position for AIPS_PACRP_WP2.
bogdanm 82:6473597d706e 13620 #define BM_AIPS_PACRP_WP2 (0x00200000U) //!< Bit mask for AIPS_PACRP_WP2.
bogdanm 82:6473597d706e 13621 #define BS_AIPS_PACRP_WP2 (1U) //!< Bit field size in bits for AIPS_PACRP_WP2.
bogdanm 82:6473597d706e 13622
bogdanm 82:6473597d706e 13623 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13624 //! @brief Read current value of the AIPS_PACRP_WP2 field.
bogdanm 82:6473597d706e 13625 #define BR_AIPS_PACRP_WP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP2))
bogdanm 82:6473597d706e 13626 #endif
bogdanm 82:6473597d706e 13627
bogdanm 82:6473597d706e 13628 //! @brief Format value for bitfield AIPS_PACRP_WP2.
bogdanm 82:6473597d706e 13629 #define BF_AIPS_PACRP_WP2(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRP_WP2), uint32_t) & BM_AIPS_PACRP_WP2)
bogdanm 82:6473597d706e 13630
bogdanm 82:6473597d706e 13631 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13632 //! @brief Set the WP2 field to a new value.
bogdanm 82:6473597d706e 13633 #define BW_AIPS_PACRP_WP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP2) = (v))
bogdanm 82:6473597d706e 13634 #endif
bogdanm 82:6473597d706e 13635 //@}
bogdanm 82:6473597d706e 13636
bogdanm 82:6473597d706e 13637 /*!
bogdanm 82:6473597d706e 13638 * @name Register AIPS_PACRP, field SP2[22] (RW)
bogdanm 82:6473597d706e 13639 *
bogdanm 82:6473597d706e 13640 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 13641 * access. When this bit is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 13642 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
bogdanm 82:6473597d706e 13643 * set. If not, access terminates with an error response and no peripheral access
bogdanm 82:6473597d706e 13644 * initiates.
bogdanm 82:6473597d706e 13645 *
bogdanm 82:6473597d706e 13646 * Values:
bogdanm 82:6473597d706e 13647 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 13648 * accesses.
bogdanm 82:6473597d706e 13649 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 13650 */
bogdanm 82:6473597d706e 13651 //@{
bogdanm 82:6473597d706e 13652 #define BP_AIPS_PACRP_SP2 (22U) //!< Bit position for AIPS_PACRP_SP2.
bogdanm 82:6473597d706e 13653 #define BM_AIPS_PACRP_SP2 (0x00400000U) //!< Bit mask for AIPS_PACRP_SP2.
bogdanm 82:6473597d706e 13654 #define BS_AIPS_PACRP_SP2 (1U) //!< Bit field size in bits for AIPS_PACRP_SP2.
bogdanm 82:6473597d706e 13655
bogdanm 82:6473597d706e 13656 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13657 //! @brief Read current value of the AIPS_PACRP_SP2 field.
bogdanm 82:6473597d706e 13658 #define BR_AIPS_PACRP_SP2(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP2))
bogdanm 82:6473597d706e 13659 #endif
bogdanm 82:6473597d706e 13660
bogdanm 82:6473597d706e 13661 //! @brief Format value for bitfield AIPS_PACRP_SP2.
bogdanm 82:6473597d706e 13662 #define BF_AIPS_PACRP_SP2(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRP_SP2), uint32_t) & BM_AIPS_PACRP_SP2)
bogdanm 82:6473597d706e 13663
bogdanm 82:6473597d706e 13664 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13665 //! @brief Set the SP2 field to a new value.
bogdanm 82:6473597d706e 13666 #define BW_AIPS_PACRP_SP2(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP2) = (v))
bogdanm 82:6473597d706e 13667 #endif
bogdanm 82:6473597d706e 13668 //@}
bogdanm 82:6473597d706e 13669
bogdanm 82:6473597d706e 13670 /*!
bogdanm 82:6473597d706e 13671 * @name Register AIPS_PACRP, field TP1[24] (RW)
bogdanm 82:6473597d706e 13672 *
bogdanm 82:6473597d706e 13673 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 13674 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 13675 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 13676 *
bogdanm 82:6473597d706e 13677 * Values:
bogdanm 82:6473597d706e 13678 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 13679 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 13680 */
bogdanm 82:6473597d706e 13681 //@{
bogdanm 82:6473597d706e 13682 #define BP_AIPS_PACRP_TP1 (24U) //!< Bit position for AIPS_PACRP_TP1.
bogdanm 82:6473597d706e 13683 #define BM_AIPS_PACRP_TP1 (0x01000000U) //!< Bit mask for AIPS_PACRP_TP1.
bogdanm 82:6473597d706e 13684 #define BS_AIPS_PACRP_TP1 (1U) //!< Bit field size in bits for AIPS_PACRP_TP1.
bogdanm 82:6473597d706e 13685
bogdanm 82:6473597d706e 13686 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13687 //! @brief Read current value of the AIPS_PACRP_TP1 field.
bogdanm 82:6473597d706e 13688 #define BR_AIPS_PACRP_TP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP1))
bogdanm 82:6473597d706e 13689 #endif
bogdanm 82:6473597d706e 13690
bogdanm 82:6473597d706e 13691 //! @brief Format value for bitfield AIPS_PACRP_TP1.
bogdanm 82:6473597d706e 13692 #define BF_AIPS_PACRP_TP1(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRP_TP1), uint32_t) & BM_AIPS_PACRP_TP1)
bogdanm 82:6473597d706e 13693
bogdanm 82:6473597d706e 13694 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13695 //! @brief Set the TP1 field to a new value.
bogdanm 82:6473597d706e 13696 #define BW_AIPS_PACRP_TP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP1) = (v))
bogdanm 82:6473597d706e 13697 #endif
bogdanm 82:6473597d706e 13698 //@}
bogdanm 82:6473597d706e 13699
bogdanm 82:6473597d706e 13700 /*!
bogdanm 82:6473597d706e 13701 * @name Register AIPS_PACRP, field WP1[25] (RW)
bogdanm 82:6473597d706e 13702 *
bogdanm 82:6473597d706e 13703 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 13704 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 13705 * and no peripheral access initiates.
bogdanm 82:6473597d706e 13706 *
bogdanm 82:6473597d706e 13707 * Values:
bogdanm 82:6473597d706e 13708 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 13709 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 13710 */
bogdanm 82:6473597d706e 13711 //@{
bogdanm 82:6473597d706e 13712 #define BP_AIPS_PACRP_WP1 (25U) //!< Bit position for AIPS_PACRP_WP1.
bogdanm 82:6473597d706e 13713 #define BM_AIPS_PACRP_WP1 (0x02000000U) //!< Bit mask for AIPS_PACRP_WP1.
bogdanm 82:6473597d706e 13714 #define BS_AIPS_PACRP_WP1 (1U) //!< Bit field size in bits for AIPS_PACRP_WP1.
bogdanm 82:6473597d706e 13715
bogdanm 82:6473597d706e 13716 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13717 //! @brief Read current value of the AIPS_PACRP_WP1 field.
bogdanm 82:6473597d706e 13718 #define BR_AIPS_PACRP_WP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP1))
bogdanm 82:6473597d706e 13719 #endif
bogdanm 82:6473597d706e 13720
bogdanm 82:6473597d706e 13721 //! @brief Format value for bitfield AIPS_PACRP_WP1.
bogdanm 82:6473597d706e 13722 #define BF_AIPS_PACRP_WP1(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRP_WP1), uint32_t) & BM_AIPS_PACRP_WP1)
bogdanm 82:6473597d706e 13723
bogdanm 82:6473597d706e 13724 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13725 //! @brief Set the WP1 field to a new value.
bogdanm 82:6473597d706e 13726 #define BW_AIPS_PACRP_WP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP1) = (v))
bogdanm 82:6473597d706e 13727 #endif
bogdanm 82:6473597d706e 13728 //@}
bogdanm 82:6473597d706e 13729
bogdanm 82:6473597d706e 13730 /*!
bogdanm 82:6473597d706e 13731 * @name Register AIPS_PACRP, field SP1[26] (RW)
bogdanm 82:6473597d706e 13732 *
bogdanm 82:6473597d706e 13733 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 13734 * access. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 13735 * supervisor access attribute, and the MPRx[MPLn] control field for the master must
bogdanm 82:6473597d706e 13736 * be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 13737 * access initiates.
bogdanm 82:6473597d706e 13738 *
bogdanm 82:6473597d706e 13739 * Values:
bogdanm 82:6473597d706e 13740 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 13741 * accesses.
bogdanm 82:6473597d706e 13742 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 13743 */
bogdanm 82:6473597d706e 13744 //@{
bogdanm 82:6473597d706e 13745 #define BP_AIPS_PACRP_SP1 (26U) //!< Bit position for AIPS_PACRP_SP1.
bogdanm 82:6473597d706e 13746 #define BM_AIPS_PACRP_SP1 (0x04000000U) //!< Bit mask for AIPS_PACRP_SP1.
bogdanm 82:6473597d706e 13747 #define BS_AIPS_PACRP_SP1 (1U) //!< Bit field size in bits for AIPS_PACRP_SP1.
bogdanm 82:6473597d706e 13748
bogdanm 82:6473597d706e 13749 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13750 //! @brief Read current value of the AIPS_PACRP_SP1 field.
bogdanm 82:6473597d706e 13751 #define BR_AIPS_PACRP_SP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP1))
bogdanm 82:6473597d706e 13752 #endif
bogdanm 82:6473597d706e 13753
bogdanm 82:6473597d706e 13754 //! @brief Format value for bitfield AIPS_PACRP_SP1.
bogdanm 82:6473597d706e 13755 #define BF_AIPS_PACRP_SP1(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRP_SP1), uint32_t) & BM_AIPS_PACRP_SP1)
bogdanm 82:6473597d706e 13756
bogdanm 82:6473597d706e 13757 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13758 //! @brief Set the SP1 field to a new value.
bogdanm 82:6473597d706e 13759 #define BW_AIPS_PACRP_SP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP1) = (v))
bogdanm 82:6473597d706e 13760 #endif
bogdanm 82:6473597d706e 13761 //@}
bogdanm 82:6473597d706e 13762
bogdanm 82:6473597d706e 13763 /*!
bogdanm 82:6473597d706e 13764 * @name Register AIPS_PACRP, field TP0[28] (RW)
bogdanm 82:6473597d706e 13765 *
bogdanm 82:6473597d706e 13766 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 13767 * When this bit is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 13768 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 13769 *
bogdanm 82:6473597d706e 13770 * Values:
bogdanm 82:6473597d706e 13771 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 13772 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 13773 */
bogdanm 82:6473597d706e 13774 //@{
bogdanm 82:6473597d706e 13775 #define BP_AIPS_PACRP_TP0 (28U) //!< Bit position for AIPS_PACRP_TP0.
bogdanm 82:6473597d706e 13776 #define BM_AIPS_PACRP_TP0 (0x10000000U) //!< Bit mask for AIPS_PACRP_TP0.
bogdanm 82:6473597d706e 13777 #define BS_AIPS_PACRP_TP0 (1U) //!< Bit field size in bits for AIPS_PACRP_TP0.
bogdanm 82:6473597d706e 13778
bogdanm 82:6473597d706e 13779 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13780 //! @brief Read current value of the AIPS_PACRP_TP0 field.
bogdanm 82:6473597d706e 13781 #define BR_AIPS_PACRP_TP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP0))
bogdanm 82:6473597d706e 13782 #endif
bogdanm 82:6473597d706e 13783
bogdanm 82:6473597d706e 13784 //! @brief Format value for bitfield AIPS_PACRP_TP0.
bogdanm 82:6473597d706e 13785 #define BF_AIPS_PACRP_TP0(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRP_TP0), uint32_t) & BM_AIPS_PACRP_TP0)
bogdanm 82:6473597d706e 13786
bogdanm 82:6473597d706e 13787 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13788 //! @brief Set the TP0 field to a new value.
bogdanm 82:6473597d706e 13789 #define BW_AIPS_PACRP_TP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_TP0) = (v))
bogdanm 82:6473597d706e 13790 #endif
bogdanm 82:6473597d706e 13791 //@}
bogdanm 82:6473597d706e 13792
bogdanm 82:6473597d706e 13793 /*!
bogdanm 82:6473597d706e 13794 * @name Register AIPS_PACRP, field WP0[29] (RW)
bogdanm 82:6473597d706e 13795 *
bogdanm 82:6473597d706e 13796 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 13797 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 13798 * and no peripheral access initiates.
bogdanm 82:6473597d706e 13799 *
bogdanm 82:6473597d706e 13800 * Values:
bogdanm 82:6473597d706e 13801 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 13802 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 13803 */
bogdanm 82:6473597d706e 13804 //@{
bogdanm 82:6473597d706e 13805 #define BP_AIPS_PACRP_WP0 (29U) //!< Bit position for AIPS_PACRP_WP0.
bogdanm 82:6473597d706e 13806 #define BM_AIPS_PACRP_WP0 (0x20000000U) //!< Bit mask for AIPS_PACRP_WP0.
bogdanm 82:6473597d706e 13807 #define BS_AIPS_PACRP_WP0 (1U) //!< Bit field size in bits for AIPS_PACRP_WP0.
bogdanm 82:6473597d706e 13808
bogdanm 82:6473597d706e 13809 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13810 //! @brief Read current value of the AIPS_PACRP_WP0 field.
bogdanm 82:6473597d706e 13811 #define BR_AIPS_PACRP_WP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP0))
bogdanm 82:6473597d706e 13812 #endif
bogdanm 82:6473597d706e 13813
bogdanm 82:6473597d706e 13814 //! @brief Format value for bitfield AIPS_PACRP_WP0.
bogdanm 82:6473597d706e 13815 #define BF_AIPS_PACRP_WP0(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRP_WP0), uint32_t) & BM_AIPS_PACRP_WP0)
bogdanm 82:6473597d706e 13816
bogdanm 82:6473597d706e 13817 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13818 //! @brief Set the WP0 field to a new value.
bogdanm 82:6473597d706e 13819 #define BW_AIPS_PACRP_WP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_WP0) = (v))
bogdanm 82:6473597d706e 13820 #endif
bogdanm 82:6473597d706e 13821 //@}
bogdanm 82:6473597d706e 13822
bogdanm 82:6473597d706e 13823 /*!
bogdanm 82:6473597d706e 13824 * @name Register AIPS_PACRP, field SP0[30] (RW)
bogdanm 82:6473597d706e 13825 *
bogdanm 82:6473597d706e 13826 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 13827 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 13828 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 13829 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 13830 * access initiates.
bogdanm 82:6473597d706e 13831 *
bogdanm 82:6473597d706e 13832 * Values:
bogdanm 82:6473597d706e 13833 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 13834 * accesses.
bogdanm 82:6473597d706e 13835 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 13836 */
bogdanm 82:6473597d706e 13837 //@{
bogdanm 82:6473597d706e 13838 #define BP_AIPS_PACRP_SP0 (30U) //!< Bit position for AIPS_PACRP_SP0.
bogdanm 82:6473597d706e 13839 #define BM_AIPS_PACRP_SP0 (0x40000000U) //!< Bit mask for AIPS_PACRP_SP0.
bogdanm 82:6473597d706e 13840 #define BS_AIPS_PACRP_SP0 (1U) //!< Bit field size in bits for AIPS_PACRP_SP0.
bogdanm 82:6473597d706e 13841
bogdanm 82:6473597d706e 13842 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13843 //! @brief Read current value of the AIPS_PACRP_SP0 field.
bogdanm 82:6473597d706e 13844 #define BR_AIPS_PACRP_SP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP0))
bogdanm 82:6473597d706e 13845 #endif
bogdanm 82:6473597d706e 13846
bogdanm 82:6473597d706e 13847 //! @brief Format value for bitfield AIPS_PACRP_SP0.
bogdanm 82:6473597d706e 13848 #define BF_AIPS_PACRP_SP0(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRP_SP0), uint32_t) & BM_AIPS_PACRP_SP0)
bogdanm 82:6473597d706e 13849
bogdanm 82:6473597d706e 13850 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13851 //! @brief Set the SP0 field to a new value.
bogdanm 82:6473597d706e 13852 #define BW_AIPS_PACRP_SP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRP_ADDR(x), BP_AIPS_PACRP_SP0) = (v))
bogdanm 82:6473597d706e 13853 #endif
bogdanm 82:6473597d706e 13854 //@}
bogdanm 82:6473597d706e 13855
bogdanm 82:6473597d706e 13856 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 13857 // HW_AIPS_PACRU - Peripheral Access Control Register
bogdanm 82:6473597d706e 13858 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 13859
bogdanm 82:6473597d706e 13860 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13861 /*!
bogdanm 82:6473597d706e 13862 * @brief HW_AIPS_PACRU - Peripheral Access Control Register (RW)
bogdanm 82:6473597d706e 13863 *
bogdanm 82:6473597d706e 13864 * Reset value: 0x44000000U
bogdanm 82:6473597d706e 13865 *
bogdanm 82:6473597d706e 13866 * PACRU defines the access levels for the two global spaces.
bogdanm 82:6473597d706e 13867 */
bogdanm 82:6473597d706e 13868 typedef union _hw_aips_pacru
bogdanm 82:6473597d706e 13869 {
bogdanm 82:6473597d706e 13870 uint32_t U;
bogdanm 82:6473597d706e 13871 struct _hw_aips_pacru_bitfields
bogdanm 82:6473597d706e 13872 {
bogdanm 82:6473597d706e 13873 uint32_t RESERVED0 : 24; //!< [23:0]
bogdanm 82:6473597d706e 13874 uint32_t TP1 : 1; //!< [24] Trusted Protect
bogdanm 82:6473597d706e 13875 uint32_t WP1 : 1; //!< [25] Write Protect
bogdanm 82:6473597d706e 13876 uint32_t SP1 : 1; //!< [26] Supervisor Protect
bogdanm 82:6473597d706e 13877 uint32_t RESERVED1 : 1; //!< [27]
bogdanm 82:6473597d706e 13878 uint32_t TP0 : 1; //!< [28] Trusted Protect
bogdanm 82:6473597d706e 13879 uint32_t WP0 : 1; //!< [29] Write Protect
bogdanm 82:6473597d706e 13880 uint32_t SP0 : 1; //!< [30] Supervisor Protect
bogdanm 82:6473597d706e 13881 uint32_t RESERVED2 : 1; //!< [31]
bogdanm 82:6473597d706e 13882 } B;
bogdanm 82:6473597d706e 13883 } hw_aips_pacru_t;
bogdanm 82:6473597d706e 13884 #endif
bogdanm 82:6473597d706e 13885
bogdanm 82:6473597d706e 13886 /*!
bogdanm 82:6473597d706e 13887 * @name Constants and macros for entire AIPS_PACRU register
bogdanm 82:6473597d706e 13888 */
bogdanm 82:6473597d706e 13889 //@{
bogdanm 82:6473597d706e 13890 #define HW_AIPS_PACRU_ADDR(x) (REGS_AIPS_BASE(x) + 0x80U)
bogdanm 82:6473597d706e 13891
bogdanm 82:6473597d706e 13892 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13893 #define HW_AIPS_PACRU(x) (*(__IO hw_aips_pacru_t *) HW_AIPS_PACRU_ADDR(x))
bogdanm 82:6473597d706e 13894 #define HW_AIPS_PACRU_RD(x) (HW_AIPS_PACRU(x).U)
bogdanm 82:6473597d706e 13895 #define HW_AIPS_PACRU_WR(x, v) (HW_AIPS_PACRU(x).U = (v))
bogdanm 82:6473597d706e 13896 #define HW_AIPS_PACRU_SET(x, v) (HW_AIPS_PACRU_WR(x, HW_AIPS_PACRU_RD(x) | (v)))
bogdanm 82:6473597d706e 13897 #define HW_AIPS_PACRU_CLR(x, v) (HW_AIPS_PACRU_WR(x, HW_AIPS_PACRU_RD(x) & ~(v)))
bogdanm 82:6473597d706e 13898 #define HW_AIPS_PACRU_TOG(x, v) (HW_AIPS_PACRU_WR(x, HW_AIPS_PACRU_RD(x) ^ (v)))
bogdanm 82:6473597d706e 13899 #endif
bogdanm 82:6473597d706e 13900 //@}
bogdanm 82:6473597d706e 13901
bogdanm 82:6473597d706e 13902 /*
bogdanm 82:6473597d706e 13903 * Constants & macros for individual AIPS_PACRU bitfields
bogdanm 82:6473597d706e 13904 */
bogdanm 82:6473597d706e 13905
bogdanm 82:6473597d706e 13906 /*!
bogdanm 82:6473597d706e 13907 * @name Register AIPS_PACRU, field TP1[24] (RW)
bogdanm 82:6473597d706e 13908 *
bogdanm 82:6473597d706e 13909 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 13910 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 13911 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 13912 *
bogdanm 82:6473597d706e 13913 * Values:
bogdanm 82:6473597d706e 13914 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 13915 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 13916 */
bogdanm 82:6473597d706e 13917 //@{
bogdanm 82:6473597d706e 13918 #define BP_AIPS_PACRU_TP1 (24U) //!< Bit position for AIPS_PACRU_TP1.
bogdanm 82:6473597d706e 13919 #define BM_AIPS_PACRU_TP1 (0x01000000U) //!< Bit mask for AIPS_PACRU_TP1.
bogdanm 82:6473597d706e 13920 #define BS_AIPS_PACRU_TP1 (1U) //!< Bit field size in bits for AIPS_PACRU_TP1.
bogdanm 82:6473597d706e 13921
bogdanm 82:6473597d706e 13922 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13923 //! @brief Read current value of the AIPS_PACRU_TP1 field.
bogdanm 82:6473597d706e 13924 #define BR_AIPS_PACRU_TP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRU_ADDR(x), BP_AIPS_PACRU_TP1))
bogdanm 82:6473597d706e 13925 #endif
bogdanm 82:6473597d706e 13926
bogdanm 82:6473597d706e 13927 //! @brief Format value for bitfield AIPS_PACRU_TP1.
bogdanm 82:6473597d706e 13928 #define BF_AIPS_PACRU_TP1(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRU_TP1), uint32_t) & BM_AIPS_PACRU_TP1)
bogdanm 82:6473597d706e 13929
bogdanm 82:6473597d706e 13930 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13931 //! @brief Set the TP1 field to a new value.
bogdanm 82:6473597d706e 13932 #define BW_AIPS_PACRU_TP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRU_ADDR(x), BP_AIPS_PACRU_TP1) = (v))
bogdanm 82:6473597d706e 13933 #endif
bogdanm 82:6473597d706e 13934 //@}
bogdanm 82:6473597d706e 13935
bogdanm 82:6473597d706e 13936 /*!
bogdanm 82:6473597d706e 13937 * @name Register AIPS_PACRU, field WP1[25] (RW)
bogdanm 82:6473597d706e 13938 *
bogdanm 82:6473597d706e 13939 * Determines whether the peripheral allows write accesss. When this bit is set
bogdanm 82:6473597d706e 13940 * and a write access is attempted, access terminates with an error response and
bogdanm 82:6473597d706e 13941 * no peripheral access initiates.
bogdanm 82:6473597d706e 13942 *
bogdanm 82:6473597d706e 13943 * Values:
bogdanm 82:6473597d706e 13944 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 13945 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 13946 */
bogdanm 82:6473597d706e 13947 //@{
bogdanm 82:6473597d706e 13948 #define BP_AIPS_PACRU_WP1 (25U) //!< Bit position for AIPS_PACRU_WP1.
bogdanm 82:6473597d706e 13949 #define BM_AIPS_PACRU_WP1 (0x02000000U) //!< Bit mask for AIPS_PACRU_WP1.
bogdanm 82:6473597d706e 13950 #define BS_AIPS_PACRU_WP1 (1U) //!< Bit field size in bits for AIPS_PACRU_WP1.
bogdanm 82:6473597d706e 13951
bogdanm 82:6473597d706e 13952 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13953 //! @brief Read current value of the AIPS_PACRU_WP1 field.
bogdanm 82:6473597d706e 13954 #define BR_AIPS_PACRU_WP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRU_ADDR(x), BP_AIPS_PACRU_WP1))
bogdanm 82:6473597d706e 13955 #endif
bogdanm 82:6473597d706e 13956
bogdanm 82:6473597d706e 13957 //! @brief Format value for bitfield AIPS_PACRU_WP1.
bogdanm 82:6473597d706e 13958 #define BF_AIPS_PACRU_WP1(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRU_WP1), uint32_t) & BM_AIPS_PACRU_WP1)
bogdanm 82:6473597d706e 13959
bogdanm 82:6473597d706e 13960 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13961 //! @brief Set the WP1 field to a new value.
bogdanm 82:6473597d706e 13962 #define BW_AIPS_PACRU_WP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRU_ADDR(x), BP_AIPS_PACRU_WP1) = (v))
bogdanm 82:6473597d706e 13963 #endif
bogdanm 82:6473597d706e 13964 //@}
bogdanm 82:6473597d706e 13965
bogdanm 82:6473597d706e 13966 /*!
bogdanm 82:6473597d706e 13967 * @name Register AIPS_PACRU, field SP1[26] (RW)
bogdanm 82:6473597d706e 13968 *
bogdanm 82:6473597d706e 13969 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 13970 * accesses. When this field is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 13971 * supervisor access attribute, and the MPRx[MPLn] control field for the master
bogdanm 82:6473597d706e 13972 * must be set. If not, access terminates with an error response and no peripheral
bogdanm 82:6473597d706e 13973 * access initiates.
bogdanm 82:6473597d706e 13974 *
bogdanm 82:6473597d706e 13975 * Values:
bogdanm 82:6473597d706e 13976 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 13977 * accesses.
bogdanm 82:6473597d706e 13978 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 13979 */
bogdanm 82:6473597d706e 13980 //@{
bogdanm 82:6473597d706e 13981 #define BP_AIPS_PACRU_SP1 (26U) //!< Bit position for AIPS_PACRU_SP1.
bogdanm 82:6473597d706e 13982 #define BM_AIPS_PACRU_SP1 (0x04000000U) //!< Bit mask for AIPS_PACRU_SP1.
bogdanm 82:6473597d706e 13983 #define BS_AIPS_PACRU_SP1 (1U) //!< Bit field size in bits for AIPS_PACRU_SP1.
bogdanm 82:6473597d706e 13984
bogdanm 82:6473597d706e 13985 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13986 //! @brief Read current value of the AIPS_PACRU_SP1 field.
bogdanm 82:6473597d706e 13987 #define BR_AIPS_PACRU_SP1(x) (BITBAND_ACCESS32(HW_AIPS_PACRU_ADDR(x), BP_AIPS_PACRU_SP1))
bogdanm 82:6473597d706e 13988 #endif
bogdanm 82:6473597d706e 13989
bogdanm 82:6473597d706e 13990 //! @brief Format value for bitfield AIPS_PACRU_SP1.
bogdanm 82:6473597d706e 13991 #define BF_AIPS_PACRU_SP1(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRU_SP1), uint32_t) & BM_AIPS_PACRU_SP1)
bogdanm 82:6473597d706e 13992
bogdanm 82:6473597d706e 13993 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 13994 //! @brief Set the SP1 field to a new value.
bogdanm 82:6473597d706e 13995 #define BW_AIPS_PACRU_SP1(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRU_ADDR(x), BP_AIPS_PACRU_SP1) = (v))
bogdanm 82:6473597d706e 13996 #endif
bogdanm 82:6473597d706e 13997 //@}
bogdanm 82:6473597d706e 13998
bogdanm 82:6473597d706e 13999 /*!
bogdanm 82:6473597d706e 14000 * @name Register AIPS_PACRU, field TP0[28] (RW)
bogdanm 82:6473597d706e 14001 *
bogdanm 82:6473597d706e 14002 * Determines whether the peripheral allows accesses from an untrusted master.
bogdanm 82:6473597d706e 14003 * When this field is set and an access is attempted by an untrusted master, the
bogdanm 82:6473597d706e 14004 * access terminates with an error response and no peripheral access initiates.
bogdanm 82:6473597d706e 14005 *
bogdanm 82:6473597d706e 14006 * Values:
bogdanm 82:6473597d706e 14007 * - 0 - Accesses from an untrusted master are allowed.
bogdanm 82:6473597d706e 14008 * - 1 - Accesses from an untrusted master are not allowed.
bogdanm 82:6473597d706e 14009 */
bogdanm 82:6473597d706e 14010 //@{
bogdanm 82:6473597d706e 14011 #define BP_AIPS_PACRU_TP0 (28U) //!< Bit position for AIPS_PACRU_TP0.
bogdanm 82:6473597d706e 14012 #define BM_AIPS_PACRU_TP0 (0x10000000U) //!< Bit mask for AIPS_PACRU_TP0.
bogdanm 82:6473597d706e 14013 #define BS_AIPS_PACRU_TP0 (1U) //!< Bit field size in bits for AIPS_PACRU_TP0.
bogdanm 82:6473597d706e 14014
bogdanm 82:6473597d706e 14015 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 14016 //! @brief Read current value of the AIPS_PACRU_TP0 field.
bogdanm 82:6473597d706e 14017 #define BR_AIPS_PACRU_TP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRU_ADDR(x), BP_AIPS_PACRU_TP0))
bogdanm 82:6473597d706e 14018 #endif
bogdanm 82:6473597d706e 14019
bogdanm 82:6473597d706e 14020 //! @brief Format value for bitfield AIPS_PACRU_TP0.
bogdanm 82:6473597d706e 14021 #define BF_AIPS_PACRU_TP0(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRU_TP0), uint32_t) & BM_AIPS_PACRU_TP0)
bogdanm 82:6473597d706e 14022
bogdanm 82:6473597d706e 14023 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 14024 //! @brief Set the TP0 field to a new value.
bogdanm 82:6473597d706e 14025 #define BW_AIPS_PACRU_TP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRU_ADDR(x), BP_AIPS_PACRU_TP0) = (v))
bogdanm 82:6473597d706e 14026 #endif
bogdanm 82:6473597d706e 14027 //@}
bogdanm 82:6473597d706e 14028
bogdanm 82:6473597d706e 14029 /*!
bogdanm 82:6473597d706e 14030 * @name Register AIPS_PACRU, field WP0[29] (RW)
bogdanm 82:6473597d706e 14031 *
bogdanm 82:6473597d706e 14032 * Determines whether the peripheral allows write accesses. When this field is
bogdanm 82:6473597d706e 14033 * set and a write access is attempted, access terminates with an error response
bogdanm 82:6473597d706e 14034 * and no peripheral access initiates.
bogdanm 82:6473597d706e 14035 *
bogdanm 82:6473597d706e 14036 * Values:
bogdanm 82:6473597d706e 14037 * - 0 - This peripheral allows write accesses.
bogdanm 82:6473597d706e 14038 * - 1 - This peripheral is write protected.
bogdanm 82:6473597d706e 14039 */
bogdanm 82:6473597d706e 14040 //@{
bogdanm 82:6473597d706e 14041 #define BP_AIPS_PACRU_WP0 (29U) //!< Bit position for AIPS_PACRU_WP0.
bogdanm 82:6473597d706e 14042 #define BM_AIPS_PACRU_WP0 (0x20000000U) //!< Bit mask for AIPS_PACRU_WP0.
bogdanm 82:6473597d706e 14043 #define BS_AIPS_PACRU_WP0 (1U) //!< Bit field size in bits for AIPS_PACRU_WP0.
bogdanm 82:6473597d706e 14044
bogdanm 82:6473597d706e 14045 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 14046 //! @brief Read current value of the AIPS_PACRU_WP0 field.
bogdanm 82:6473597d706e 14047 #define BR_AIPS_PACRU_WP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRU_ADDR(x), BP_AIPS_PACRU_WP0))
bogdanm 82:6473597d706e 14048 #endif
bogdanm 82:6473597d706e 14049
bogdanm 82:6473597d706e 14050 //! @brief Format value for bitfield AIPS_PACRU_WP0.
bogdanm 82:6473597d706e 14051 #define BF_AIPS_PACRU_WP0(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRU_WP0), uint32_t) & BM_AIPS_PACRU_WP0)
bogdanm 82:6473597d706e 14052
bogdanm 82:6473597d706e 14053 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 14054 //! @brief Set the WP0 field to a new value.
bogdanm 82:6473597d706e 14055 #define BW_AIPS_PACRU_WP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRU_ADDR(x), BP_AIPS_PACRU_WP0) = (v))
bogdanm 82:6473597d706e 14056 #endif
bogdanm 82:6473597d706e 14057 //@}
bogdanm 82:6473597d706e 14058
bogdanm 82:6473597d706e 14059 /*!
bogdanm 82:6473597d706e 14060 * @name Register AIPS_PACRU, field SP0[30] (RW)
bogdanm 82:6473597d706e 14061 *
bogdanm 82:6473597d706e 14062 * Determines whether the peripheral requires supervisor privilege level for
bogdanm 82:6473597d706e 14063 * access. When this bit is set, the master privilege level must indicate the
bogdanm 82:6473597d706e 14064 * supervisor access attribute, and the MPRx[MPLn] control bit for the master must be
bogdanm 82:6473597d706e 14065 * set. If not, access terminates with an error response and no peripheral access
bogdanm 82:6473597d706e 14066 * initiates.
bogdanm 82:6473597d706e 14067 *
bogdanm 82:6473597d706e 14068 * Values:
bogdanm 82:6473597d706e 14069 * - 0 - This peripheral does not require supervisor privilege level for
bogdanm 82:6473597d706e 14070 * accesses.
bogdanm 82:6473597d706e 14071 * - 1 - This peripheral requires supervisor privilege level for accesses.
bogdanm 82:6473597d706e 14072 */
bogdanm 82:6473597d706e 14073 //@{
bogdanm 82:6473597d706e 14074 #define BP_AIPS_PACRU_SP0 (30U) //!< Bit position for AIPS_PACRU_SP0.
bogdanm 82:6473597d706e 14075 #define BM_AIPS_PACRU_SP0 (0x40000000U) //!< Bit mask for AIPS_PACRU_SP0.
bogdanm 82:6473597d706e 14076 #define BS_AIPS_PACRU_SP0 (1U) //!< Bit field size in bits for AIPS_PACRU_SP0.
bogdanm 82:6473597d706e 14077
bogdanm 82:6473597d706e 14078 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 14079 //! @brief Read current value of the AIPS_PACRU_SP0 field.
bogdanm 82:6473597d706e 14080 #define BR_AIPS_PACRU_SP0(x) (BITBAND_ACCESS32(HW_AIPS_PACRU_ADDR(x), BP_AIPS_PACRU_SP0))
bogdanm 82:6473597d706e 14081 #endif
bogdanm 82:6473597d706e 14082
bogdanm 82:6473597d706e 14083 //! @brief Format value for bitfield AIPS_PACRU_SP0.
bogdanm 82:6473597d706e 14084 #define BF_AIPS_PACRU_SP0(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_AIPS_PACRU_SP0), uint32_t) & BM_AIPS_PACRU_SP0)
bogdanm 82:6473597d706e 14085
bogdanm 82:6473597d706e 14086 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 14087 //! @brief Set the SP0 field to a new value.
bogdanm 82:6473597d706e 14088 #define BW_AIPS_PACRU_SP0(x, v) (BITBAND_ACCESS32(HW_AIPS_PACRU_ADDR(x), BP_AIPS_PACRU_SP0) = (v))
bogdanm 82:6473597d706e 14089 #endif
bogdanm 82:6473597d706e 14090 //@}
bogdanm 82:6473597d706e 14091
bogdanm 82:6473597d706e 14092 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 14093 // hw_aips_t - module struct
bogdanm 82:6473597d706e 14094 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 14095 /*!
bogdanm 82:6473597d706e 14096 * @brief All AIPS module registers.
bogdanm 82:6473597d706e 14097 */
bogdanm 82:6473597d706e 14098 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 14099 #pragma pack(1)
bogdanm 82:6473597d706e 14100 typedef struct _hw_aips
bogdanm 82:6473597d706e 14101 {
bogdanm 82:6473597d706e 14102 __IO hw_aips_mpra_t MPRA; //!< [0x0] Master Privilege Register A
bogdanm 82:6473597d706e 14103 uint8_t _reserved0[28];
bogdanm 82:6473597d706e 14104 __IO hw_aips_pacra_t PACRA; //!< [0x20] Peripheral Access Control Register
bogdanm 82:6473597d706e 14105 __IO hw_aips_pacrb_t PACRB; //!< [0x24] Peripheral Access Control Register
bogdanm 82:6473597d706e 14106 __IO hw_aips_pacrc_t PACRC; //!< [0x28] Peripheral Access Control Register
bogdanm 82:6473597d706e 14107 __IO hw_aips_pacrd_t PACRD; //!< [0x2C] Peripheral Access Control Register
bogdanm 82:6473597d706e 14108 uint8_t _reserved1[16];
bogdanm 82:6473597d706e 14109 __IO hw_aips_pacre_t PACRE; //!< [0x40] Peripheral Access Control Register
bogdanm 82:6473597d706e 14110 __IO hw_aips_pacrf_t PACRF; //!< [0x44] Peripheral Access Control Register
bogdanm 82:6473597d706e 14111 __IO hw_aips_pacrg_t PACRG; //!< [0x48] Peripheral Access Control Register
bogdanm 82:6473597d706e 14112 __IO hw_aips_pacrh_t PACRH; //!< [0x4C] Peripheral Access Control Register
bogdanm 82:6473597d706e 14113 __IO hw_aips_pacri_t PACRI; //!< [0x50] Peripheral Access Control Register
bogdanm 82:6473597d706e 14114 __IO hw_aips_pacrj_t PACRJ; //!< [0x54] Peripheral Access Control Register
bogdanm 82:6473597d706e 14115 __IO hw_aips_pacrk_t PACRK; //!< [0x58] Peripheral Access Control Register
bogdanm 82:6473597d706e 14116 __IO hw_aips_pacrl_t PACRL; //!< [0x5C] Peripheral Access Control Register
bogdanm 82:6473597d706e 14117 __IO hw_aips_pacrm_t PACRM; //!< [0x60] Peripheral Access Control Register
bogdanm 82:6473597d706e 14118 __IO hw_aips_pacrn_t PACRN; //!< [0x64] Peripheral Access Control Register
bogdanm 82:6473597d706e 14119 __IO hw_aips_pacro_t PACRO; //!< [0x68] Peripheral Access Control Register
bogdanm 82:6473597d706e 14120 __IO hw_aips_pacrp_t PACRP; //!< [0x6C] Peripheral Access Control Register
bogdanm 82:6473597d706e 14121 uint8_t _reserved2[16];
bogdanm 82:6473597d706e 14122 __IO hw_aips_pacru_t PACRU; //!< [0x80] Peripheral Access Control Register
bogdanm 82:6473597d706e 14123 } hw_aips_t;
bogdanm 82:6473597d706e 14124 #pragma pack()
bogdanm 82:6473597d706e 14125
bogdanm 82:6473597d706e 14126 //! @brief Macro to access all AIPS registers.
bogdanm 82:6473597d706e 14127 //! @param x AIPS instance number.
bogdanm 82:6473597d706e 14128 //! @return Reference (not a pointer) to the registers struct. To get a pointer to the struct,
bogdanm 82:6473597d706e 14129 //! use the '&' operator, like <code>&HW_AIPS(0)</code>.
bogdanm 82:6473597d706e 14130 #define HW_AIPS(x) (*(hw_aips_t *) REGS_AIPS_BASE(x))
bogdanm 82:6473597d706e 14131 #endif
bogdanm 82:6473597d706e 14132
bogdanm 82:6473597d706e 14133 #endif // __HW_AIPS_REGISTERS_H__
bogdanm 82:6473597d706e 14134 // v22/130726/0.9
bogdanm 82:6473597d706e 14135 // EOF