version_2.0

Dependents:   cc3000_ping_demo_try_2

Fork of mbed by mbed official

Committer:
erezi
Date:
Wed Jun 25 06:08:49 2014 +0000
Revision:
86:4f9a848d74c7
Parent:
81:7d30d6019079
version_2.0

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emilmont 77:869cf507173a 1 /**
emilmont 77:869cf507173a 2 ******************************************************************************
emilmont 77:869cf507173a 3 * @file stm32l1xx_spi.h
emilmont 77:869cf507173a 4 * @author MCD Application Team
emilmont 77:869cf507173a 5 * @version V1.3.0
emilmont 77:869cf507173a 6 * @date 31-January-2014
emilmont 77:869cf507173a 7 * @brief This file contains all the functions prototypes for the SPI
emilmont 77:869cf507173a 8 * firmware library.
emilmont 77:869cf507173a 9 ******************************************************************************
emilmont 77:869cf507173a 10 * @attention
emilmont 77:869cf507173a 11 *
bogdanm 81:7d30d6019079 12 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
emilmont 77:869cf507173a 13 *
bogdanm 81:7d30d6019079 14 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 81:7d30d6019079 15 * are permitted provided that the following conditions are met:
bogdanm 81:7d30d6019079 16 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 81:7d30d6019079 17 * this list of conditions and the following disclaimer.
bogdanm 81:7d30d6019079 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 81:7d30d6019079 19 * this list of conditions and the following disclaimer in the documentation
bogdanm 81:7d30d6019079 20 * and/or other materials provided with the distribution.
bogdanm 81:7d30d6019079 21 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 81:7d30d6019079 22 * may be used to endorse or promote products derived from this software
bogdanm 81:7d30d6019079 23 * without specific prior written permission.
emilmont 77:869cf507173a 24 *
bogdanm 81:7d30d6019079 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 81:7d30d6019079 26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 81:7d30d6019079 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 81:7d30d6019079 28 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 81:7d30d6019079 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 81:7d30d6019079 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 81:7d30d6019079 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 81:7d30d6019079 32 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 81:7d30d6019079 33 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 81:7d30d6019079 34 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
emilmont 77:869cf507173a 35 *
emilmont 77:869cf507173a 36 ******************************************************************************
emilmont 77:869cf507173a 37 */
emilmont 77:869cf507173a 38
emilmont 77:869cf507173a 39 /* Define to prevent recursive inclusion -------------------------------------*/
emilmont 77:869cf507173a 40 #ifndef __STM32L1xx_SPI_H
emilmont 77:869cf507173a 41 #define __STM32L1xx_SPI_H
emilmont 77:869cf507173a 42
emilmont 77:869cf507173a 43 #ifdef __cplusplus
emilmont 77:869cf507173a 44 extern "C" {
emilmont 77:869cf507173a 45 #endif
emilmont 77:869cf507173a 46
emilmont 77:869cf507173a 47 /* Includes ------------------------------------------------------------------*/
emilmont 77:869cf507173a 48 #include "stm32l1xx.h"
emilmont 77:869cf507173a 49
emilmont 77:869cf507173a 50 /** @addtogroup STM32L1xx_StdPeriph_Driver
emilmont 77:869cf507173a 51 * @{
emilmont 77:869cf507173a 52 */
emilmont 77:869cf507173a 53
emilmont 77:869cf507173a 54 /** @addtogroup SPI
emilmont 77:869cf507173a 55 * @{
emilmont 77:869cf507173a 56 */
emilmont 77:869cf507173a 57
emilmont 77:869cf507173a 58 /* Exported types ------------------------------------------------------------*/
emilmont 77:869cf507173a 59
emilmont 77:869cf507173a 60 /**
emilmont 77:869cf507173a 61 * @brief SPI Init structure definition
emilmont 77:869cf507173a 62 */
emilmont 77:869cf507173a 63
emilmont 77:869cf507173a 64 typedef struct
emilmont 77:869cf507173a 65 {
emilmont 77:869cf507173a 66 uint16_t SPI_Direction; /*!< Specifies the SPI unidirectional or bidirectional data mode.
emilmont 77:869cf507173a 67 This parameter can be a value of @ref SPI_data_direction */
emilmont 77:869cf507173a 68
emilmont 77:869cf507173a 69 uint16_t SPI_Mode; /*!< Specifies the SPI operating mode.
emilmont 77:869cf507173a 70 This parameter can be a value of @ref SPI_mode */
emilmont 77:869cf507173a 71
emilmont 77:869cf507173a 72 uint16_t SPI_DataSize; /*!< Specifies the SPI data size.
emilmont 77:869cf507173a 73 This parameter can be a value of @ref SPI_data_size */
emilmont 77:869cf507173a 74
emilmont 77:869cf507173a 75 uint16_t SPI_CPOL; /*!< Specifies the serial clock steady state.
emilmont 77:869cf507173a 76 This parameter can be a value of @ref SPI_Clock_Polarity */
emilmont 77:869cf507173a 77
emilmont 77:869cf507173a 78 uint16_t SPI_CPHA; /*!< Specifies the clock active edge for the bit capture.
emilmont 77:869cf507173a 79 This parameter can be a value of @ref SPI_Clock_Phase */
emilmont 77:869cf507173a 80
emilmont 77:869cf507173a 81 uint16_t SPI_NSS; /*!< Specifies whether the NSS signal is managed by
emilmont 77:869cf507173a 82 hardware (NSS pin) or by software using the SSI bit.
emilmont 77:869cf507173a 83 This parameter can be a value of @ref SPI_Slave_Select_management */
emilmont 77:869cf507173a 84
emilmont 77:869cf507173a 85 uint16_t SPI_BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be
emilmont 77:869cf507173a 86 used to configure the transmit and receive SCK clock.
emilmont 77:869cf507173a 87 This parameter can be a value of @ref SPI_BaudRate_Prescaler
emilmont 77:869cf507173a 88 @note The communication clock is derived from the master
emilmont 77:869cf507173a 89 clock. The slave clock does not need to be set. */
emilmont 77:869cf507173a 90
emilmont 77:869cf507173a 91 uint16_t SPI_FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit.
emilmont 77:869cf507173a 92 This parameter can be a value of @ref SPI_MSB_LSB_transmission */
emilmont 77:869cf507173a 93
emilmont 77:869cf507173a 94 uint16_t SPI_CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation. */
emilmont 77:869cf507173a 95 }SPI_InitTypeDef;
emilmont 77:869cf507173a 96
emilmont 77:869cf507173a 97 /**
emilmont 77:869cf507173a 98 * @brief I2S Init structure definition
emilmont 77:869cf507173a 99 */
emilmont 77:869cf507173a 100
emilmont 77:869cf507173a 101 typedef struct
emilmont 77:869cf507173a 102 {
emilmont 77:869cf507173a 103
emilmont 77:869cf507173a 104 uint16_t I2S_Mode; /*!< Specifies the I2S operating mode.
emilmont 77:869cf507173a 105 This parameter can be a value of @ref SPI_I2S_Mode */
emilmont 77:869cf507173a 106
emilmont 77:869cf507173a 107 uint16_t I2S_Standard; /*!< Specifies the standard used for the I2S communication.
emilmont 77:869cf507173a 108 This parameter can be a value of @ref SPI_I2S_Standard */
emilmont 77:869cf507173a 109
emilmont 77:869cf507173a 110 uint16_t I2S_DataFormat; /*!< Specifies the data format for the I2S communication.
emilmont 77:869cf507173a 111 This parameter can be a value of @ref SPI_I2S_Data_Format */
emilmont 77:869cf507173a 112
emilmont 77:869cf507173a 113 uint16_t I2S_MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not.
emilmont 77:869cf507173a 114 This parameter can be a value of @ref SPI_I2S_MCLK_Output */
emilmont 77:869cf507173a 115
emilmont 77:869cf507173a 116 uint32_t I2S_AudioFreq; /*!< Specifies the frequency selected for the I2S communication.
emilmont 77:869cf507173a 117 This parameter can be a value of @ref SPI_I2S_Audio_Frequency */
emilmont 77:869cf507173a 118
emilmont 77:869cf507173a 119 uint16_t I2S_CPOL; /*!< Specifies the idle state of the I2S clock.
emilmont 77:869cf507173a 120 This parameter can be a value of @ref SPI_I2S_Clock_Polarity */
emilmont 77:869cf507173a 121 }I2S_InitTypeDef;
emilmont 77:869cf507173a 122
emilmont 77:869cf507173a 123 /* Exported constants --------------------------------------------------------*/
emilmont 77:869cf507173a 124
emilmont 77:869cf507173a 125 /** @defgroup SPI_Exported_Constants
emilmont 77:869cf507173a 126 * @{
emilmont 77:869cf507173a 127 */
emilmont 77:869cf507173a 128
emilmont 77:869cf507173a 129 #define IS_SPI_ALL_PERIPH(PERIPH) (((PERIPH) == SPI1) || \
emilmont 77:869cf507173a 130 ((PERIPH) == SPI2) || \
emilmont 77:869cf507173a 131 ((PERIPH) == SPI3))
emilmont 77:869cf507173a 132 #define IS_SPI_23_PERIPH(PERIPH) (((PERIPH) == SPI2) || \
emilmont 77:869cf507173a 133 ((PERIPH) == SPI3))
emilmont 77:869cf507173a 134
emilmont 77:869cf507173a 135 /** @defgroup SPI_data_direction
emilmont 77:869cf507173a 136 * @{
emilmont 77:869cf507173a 137 */
emilmont 77:869cf507173a 138
emilmont 77:869cf507173a 139 #define SPI_Direction_2Lines_FullDuplex ((uint16_t)0x0000)
emilmont 77:869cf507173a 140 #define SPI_Direction_2Lines_RxOnly ((uint16_t)0x0400)
emilmont 77:869cf507173a 141 #define SPI_Direction_1Line_Rx ((uint16_t)0x8000)
emilmont 77:869cf507173a 142 #define SPI_Direction_1Line_Tx ((uint16_t)0xC000)
emilmont 77:869cf507173a 143 #define IS_SPI_DIRECTION_MODE(MODE) (((MODE) == SPI_Direction_2Lines_FullDuplex) || \
emilmont 77:869cf507173a 144 ((MODE) == SPI_Direction_2Lines_RxOnly) || \
emilmont 77:869cf507173a 145 ((MODE) == SPI_Direction_1Line_Rx) || \
emilmont 77:869cf507173a 146 ((MODE) == SPI_Direction_1Line_Tx))
emilmont 77:869cf507173a 147 /**
emilmont 77:869cf507173a 148 * @}
emilmont 77:869cf507173a 149 */
emilmont 77:869cf507173a 150
emilmont 77:869cf507173a 151 /** @defgroup SPI_mode
emilmont 77:869cf507173a 152 * @{
emilmont 77:869cf507173a 153 */
emilmont 77:869cf507173a 154
emilmont 77:869cf507173a 155 #define SPI_Mode_Master ((uint16_t)0x0104)
emilmont 77:869cf507173a 156 #define SPI_Mode_Slave ((uint16_t)0x0000)
emilmont 77:869cf507173a 157 #define IS_SPI_MODE(MODE) (((MODE) == SPI_Mode_Master) || \
emilmont 77:869cf507173a 158 ((MODE) == SPI_Mode_Slave))
emilmont 77:869cf507173a 159 /**
emilmont 77:869cf507173a 160 * @}
emilmont 77:869cf507173a 161 */
emilmont 77:869cf507173a 162
emilmont 77:869cf507173a 163 /** @defgroup SPI_data_size
emilmont 77:869cf507173a 164 * @{
emilmont 77:869cf507173a 165 */
emilmont 77:869cf507173a 166
emilmont 77:869cf507173a 167 #define SPI_DataSize_16b ((uint16_t)0x0800)
emilmont 77:869cf507173a 168 #define SPI_DataSize_8b ((uint16_t)0x0000)
emilmont 77:869cf507173a 169 #define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DataSize_16b) || \
emilmont 77:869cf507173a 170 ((DATASIZE) == SPI_DataSize_8b))
emilmont 77:869cf507173a 171 /**
emilmont 77:869cf507173a 172 * @}
emilmont 77:869cf507173a 173 */
emilmont 77:869cf507173a 174
emilmont 77:869cf507173a 175 /** @defgroup SPI_Clock_Polarity
emilmont 77:869cf507173a 176 * @{
emilmont 77:869cf507173a 177 */
emilmont 77:869cf507173a 178
emilmont 77:869cf507173a 179 #define SPI_CPOL_Low ((uint16_t)0x0000)
emilmont 77:869cf507173a 180 #define SPI_CPOL_High ((uint16_t)0x0002)
emilmont 77:869cf507173a 181 #define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_CPOL_Low) || \
emilmont 77:869cf507173a 182 ((CPOL) == SPI_CPOL_High))
emilmont 77:869cf507173a 183 /**
emilmont 77:869cf507173a 184 * @}
emilmont 77:869cf507173a 185 */
emilmont 77:869cf507173a 186
emilmont 77:869cf507173a 187 /** @defgroup SPI_Clock_Phase
emilmont 77:869cf507173a 188 * @{
emilmont 77:869cf507173a 189 */
emilmont 77:869cf507173a 190
emilmont 77:869cf507173a 191 #define SPI_CPHA_1Edge ((uint16_t)0x0000)
emilmont 77:869cf507173a 192 #define SPI_CPHA_2Edge ((uint16_t)0x0001)
emilmont 77:869cf507173a 193 #define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_CPHA_1Edge) || \
emilmont 77:869cf507173a 194 ((CPHA) == SPI_CPHA_2Edge))
emilmont 77:869cf507173a 195 /**
emilmont 77:869cf507173a 196 * @}
emilmont 77:869cf507173a 197 */
emilmont 77:869cf507173a 198
emilmont 77:869cf507173a 199 /** @defgroup SPI_Slave_Select_management
emilmont 77:869cf507173a 200 * @{
emilmont 77:869cf507173a 201 */
emilmont 77:869cf507173a 202
emilmont 77:869cf507173a 203 #define SPI_NSS_Soft ((uint16_t)0x0200)
emilmont 77:869cf507173a 204 #define SPI_NSS_Hard ((uint16_t)0x0000)
emilmont 77:869cf507173a 205 #define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_Soft) || \
emilmont 77:869cf507173a 206 ((NSS) == SPI_NSS_Hard))
emilmont 77:869cf507173a 207 /**
emilmont 77:869cf507173a 208 * @}
emilmont 77:869cf507173a 209 */
emilmont 77:869cf507173a 210
emilmont 77:869cf507173a 211 /** @defgroup SPI_BaudRate_Prescaler
emilmont 77:869cf507173a 212 * @{
emilmont 77:869cf507173a 213 */
emilmont 77:869cf507173a 214
emilmont 77:869cf507173a 215 #define SPI_BaudRatePrescaler_2 ((uint16_t)0x0000)
emilmont 77:869cf507173a 216 #define SPI_BaudRatePrescaler_4 ((uint16_t)0x0008)
emilmont 77:869cf507173a 217 #define SPI_BaudRatePrescaler_8 ((uint16_t)0x0010)
emilmont 77:869cf507173a 218 #define SPI_BaudRatePrescaler_16 ((uint16_t)0x0018)
emilmont 77:869cf507173a 219 #define SPI_BaudRatePrescaler_32 ((uint16_t)0x0020)
emilmont 77:869cf507173a 220 #define SPI_BaudRatePrescaler_64 ((uint16_t)0x0028)
emilmont 77:869cf507173a 221 #define SPI_BaudRatePrescaler_128 ((uint16_t)0x0030)
emilmont 77:869cf507173a 222 #define SPI_BaudRatePrescaler_256 ((uint16_t)0x0038)
emilmont 77:869cf507173a 223 #define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BaudRatePrescaler_2) || \
emilmont 77:869cf507173a 224 ((PRESCALER) == SPI_BaudRatePrescaler_4) || \
emilmont 77:869cf507173a 225 ((PRESCALER) == SPI_BaudRatePrescaler_8) || \
emilmont 77:869cf507173a 226 ((PRESCALER) == SPI_BaudRatePrescaler_16) || \
emilmont 77:869cf507173a 227 ((PRESCALER) == SPI_BaudRatePrescaler_32) || \
emilmont 77:869cf507173a 228 ((PRESCALER) == SPI_BaudRatePrescaler_64) || \
emilmont 77:869cf507173a 229 ((PRESCALER) == SPI_BaudRatePrescaler_128) || \
emilmont 77:869cf507173a 230 ((PRESCALER) == SPI_BaudRatePrescaler_256))
emilmont 77:869cf507173a 231 /**
emilmont 77:869cf507173a 232 * @}
emilmont 77:869cf507173a 233 */
emilmont 77:869cf507173a 234
emilmont 77:869cf507173a 235 /** @defgroup SPI_MSB_LSB_transmission
emilmont 77:869cf507173a 236 * @{
emilmont 77:869cf507173a 237 */
emilmont 77:869cf507173a 238
emilmont 77:869cf507173a 239 #define SPI_FirstBit_MSB ((uint16_t)0x0000)
emilmont 77:869cf507173a 240 #define SPI_FirstBit_LSB ((uint16_t)0x0080)
emilmont 77:869cf507173a 241 #define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FirstBit_MSB) || \
emilmont 77:869cf507173a 242 ((BIT) == SPI_FirstBit_LSB))
emilmont 77:869cf507173a 243 /**
emilmont 77:869cf507173a 244 * @}
emilmont 77:869cf507173a 245 */
emilmont 77:869cf507173a 246
emilmont 77:869cf507173a 247 /** @defgroup SPI_I2S_Mode
emilmont 77:869cf507173a 248 * @{
emilmont 77:869cf507173a 249 */
emilmont 77:869cf507173a 250
emilmont 77:869cf507173a 251 #define I2S_Mode_SlaveTx ((uint16_t)0x0000)
emilmont 77:869cf507173a 252 #define I2S_Mode_SlaveRx ((uint16_t)0x0100)
emilmont 77:869cf507173a 253 #define I2S_Mode_MasterTx ((uint16_t)0x0200)
emilmont 77:869cf507173a 254 #define I2S_Mode_MasterRx ((uint16_t)0x0300)
emilmont 77:869cf507173a 255 #define IS_I2S_MODE(MODE) (((MODE) == I2S_Mode_SlaveTx) || \
emilmont 77:869cf507173a 256 ((MODE) == I2S_Mode_SlaveRx) || \
emilmont 77:869cf507173a 257 ((MODE) == I2S_Mode_MasterTx)|| \
emilmont 77:869cf507173a 258 ((MODE) == I2S_Mode_MasterRx))
emilmont 77:869cf507173a 259 /**
emilmont 77:869cf507173a 260 * @}
emilmont 77:869cf507173a 261 */
emilmont 77:869cf507173a 262
emilmont 77:869cf507173a 263
emilmont 77:869cf507173a 264 /** @defgroup SPI_I2S_Standard
emilmont 77:869cf507173a 265 * @{
emilmont 77:869cf507173a 266 */
emilmont 77:869cf507173a 267
emilmont 77:869cf507173a 268 #define I2S_Standard_Phillips ((uint16_t)0x0000)
emilmont 77:869cf507173a 269 #define I2S_Standard_MSB ((uint16_t)0x0010)
emilmont 77:869cf507173a 270 #define I2S_Standard_LSB ((uint16_t)0x0020)
emilmont 77:869cf507173a 271 #define I2S_Standard_PCMShort ((uint16_t)0x0030)
emilmont 77:869cf507173a 272 #define I2S_Standard_PCMLong ((uint16_t)0x00B0)
emilmont 77:869cf507173a 273 #define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_Standard_Phillips) || \
emilmont 77:869cf507173a 274 ((STANDARD) == I2S_Standard_MSB) || \
emilmont 77:869cf507173a 275 ((STANDARD) == I2S_Standard_LSB) || \
emilmont 77:869cf507173a 276 ((STANDARD) == I2S_Standard_PCMShort) || \
emilmont 77:869cf507173a 277 ((STANDARD) == I2S_Standard_PCMLong))
emilmont 77:869cf507173a 278 /**
emilmont 77:869cf507173a 279 * @}
emilmont 77:869cf507173a 280 */
emilmont 77:869cf507173a 281
emilmont 77:869cf507173a 282 /** @defgroup SPI_I2S_Data_Format
emilmont 77:869cf507173a 283 * @{
emilmont 77:869cf507173a 284 */
emilmont 77:869cf507173a 285
emilmont 77:869cf507173a 286 #define I2S_DataFormat_16b ((uint16_t)0x0000)
emilmont 77:869cf507173a 287 #define I2S_DataFormat_16bextended ((uint16_t)0x0001)
emilmont 77:869cf507173a 288 #define I2S_DataFormat_24b ((uint16_t)0x0003)
emilmont 77:869cf507173a 289 #define I2S_DataFormat_32b ((uint16_t)0x0005)
emilmont 77:869cf507173a 290 #define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DataFormat_16b) || \
emilmont 77:869cf507173a 291 ((FORMAT) == I2S_DataFormat_16bextended) || \
emilmont 77:869cf507173a 292 ((FORMAT) == I2S_DataFormat_24b) || \
emilmont 77:869cf507173a 293 ((FORMAT) == I2S_DataFormat_32b))
emilmont 77:869cf507173a 294 /**
emilmont 77:869cf507173a 295 * @}
emilmont 77:869cf507173a 296 */
emilmont 77:869cf507173a 297
emilmont 77:869cf507173a 298 /** @defgroup SPI_I2S_MCLK_Output
emilmont 77:869cf507173a 299 * @{
emilmont 77:869cf507173a 300 */
emilmont 77:869cf507173a 301
emilmont 77:869cf507173a 302 #define I2S_MCLKOutput_Enable ((uint16_t)0x0200)
emilmont 77:869cf507173a 303 #define I2S_MCLKOutput_Disable ((uint16_t)0x0000)
emilmont 77:869cf507173a 304 #define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOutput_Enable) || \
emilmont 77:869cf507173a 305 ((OUTPUT) == I2S_MCLKOutput_Disable))
emilmont 77:869cf507173a 306 /**
emilmont 77:869cf507173a 307 * @}
emilmont 77:869cf507173a 308 */
emilmont 77:869cf507173a 309
emilmont 77:869cf507173a 310 /** @defgroup SPI_I2S_Audio_Frequency
emilmont 77:869cf507173a 311 * @{
emilmont 77:869cf507173a 312 */
emilmont 77:869cf507173a 313
emilmont 77:869cf507173a 314 #define I2S_AudioFreq_192k ((uint32_t)192000)
emilmont 77:869cf507173a 315 #define I2S_AudioFreq_96k ((uint32_t)96000)
emilmont 77:869cf507173a 316 #define I2S_AudioFreq_48k ((uint32_t)48000)
emilmont 77:869cf507173a 317 #define I2S_AudioFreq_44k ((uint32_t)44100)
emilmont 77:869cf507173a 318 #define I2S_AudioFreq_32k ((uint32_t)32000)
emilmont 77:869cf507173a 319 #define I2S_AudioFreq_22k ((uint32_t)22050)
emilmont 77:869cf507173a 320 #define I2S_AudioFreq_16k ((uint32_t)16000)
emilmont 77:869cf507173a 321 #define I2S_AudioFreq_11k ((uint32_t)11025)
emilmont 77:869cf507173a 322 #define I2S_AudioFreq_8k ((uint32_t)8000)
emilmont 77:869cf507173a 323 #define I2S_AudioFreq_Default ((uint32_t)2)
emilmont 77:869cf507173a 324
emilmont 77:869cf507173a 325 #define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AudioFreq_8k) && \
emilmont 77:869cf507173a 326 ((FREQ) <= I2S_AudioFreq_192k)) || \
emilmont 77:869cf507173a 327 ((FREQ) == I2S_AudioFreq_Default))
emilmont 77:869cf507173a 328 /**
emilmont 77:869cf507173a 329 * @}
emilmont 77:869cf507173a 330 */
emilmont 77:869cf507173a 331
emilmont 77:869cf507173a 332 /** @defgroup SPI_I2S_Clock_Polarity
emilmont 77:869cf507173a 333 * @{
emilmont 77:869cf507173a 334 */
emilmont 77:869cf507173a 335
emilmont 77:869cf507173a 336 #define I2S_CPOL_Low ((uint16_t)0x0000)
emilmont 77:869cf507173a 337 #define I2S_CPOL_High ((uint16_t)0x0008)
emilmont 77:869cf507173a 338 #define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_Low) || \
emilmont 77:869cf507173a 339 ((CPOL) == I2S_CPOL_High))
emilmont 77:869cf507173a 340 /**
emilmont 77:869cf507173a 341 * @}
emilmont 77:869cf507173a 342 */
emilmont 77:869cf507173a 343
emilmont 77:869cf507173a 344 /** @defgroup SPI_I2S_DMA_transfer_requests
emilmont 77:869cf507173a 345 * @{
emilmont 77:869cf507173a 346 */
emilmont 77:869cf507173a 347
emilmont 77:869cf507173a 348 #define SPI_I2S_DMAReq_Tx ((uint16_t)0x0002)
emilmont 77:869cf507173a 349 #define SPI_I2S_DMAReq_Rx ((uint16_t)0x0001)
emilmont 77:869cf507173a 350 #define IS_SPI_I2S_DMAREQ(DMAREQ) ((((DMAREQ) & (uint16_t)0xFFFC) == 0x00) && ((DMAREQ) != 0x00))
emilmont 77:869cf507173a 351 /**
emilmont 77:869cf507173a 352 * @}
emilmont 77:869cf507173a 353 */
emilmont 77:869cf507173a 354
emilmont 77:869cf507173a 355 /** @defgroup SPI_NSS_internal_software_management
emilmont 77:869cf507173a 356 * @{
emilmont 77:869cf507173a 357 */
emilmont 77:869cf507173a 358
emilmont 77:869cf507173a 359 #define SPI_NSSInternalSoft_Set ((uint16_t)0x0100)
emilmont 77:869cf507173a 360 #define SPI_NSSInternalSoft_Reset ((uint16_t)0xFEFF)
emilmont 77:869cf507173a 361 #define IS_SPI_NSS_INTERNAL(INTERNAL) (((INTERNAL) == SPI_NSSInternalSoft_Set) || \
emilmont 77:869cf507173a 362 ((INTERNAL) == SPI_NSSInternalSoft_Reset))
emilmont 77:869cf507173a 363 /**
emilmont 77:869cf507173a 364 * @}
emilmont 77:869cf507173a 365 */
emilmont 77:869cf507173a 366
emilmont 77:869cf507173a 367 /** @defgroup SPI_CRC_Transmit_Receive
emilmont 77:869cf507173a 368 * @{
emilmont 77:869cf507173a 369 */
emilmont 77:869cf507173a 370
emilmont 77:869cf507173a 371 #define SPI_CRC_Tx ((uint8_t)0x00)
emilmont 77:869cf507173a 372 #define SPI_CRC_Rx ((uint8_t)0x01)
emilmont 77:869cf507173a 373 #define IS_SPI_CRC(CRC) (((CRC) == SPI_CRC_Tx) || ((CRC) == SPI_CRC_Rx))
emilmont 77:869cf507173a 374 /**
emilmont 77:869cf507173a 375 * @}
emilmont 77:869cf507173a 376 */
emilmont 77:869cf507173a 377
emilmont 77:869cf507173a 378 /** @defgroup SPI_direction_transmit_receive
emilmont 77:869cf507173a 379 * @{
emilmont 77:869cf507173a 380 */
emilmont 77:869cf507173a 381
emilmont 77:869cf507173a 382 #define SPI_Direction_Rx ((uint16_t)0xBFFF)
emilmont 77:869cf507173a 383 #define SPI_Direction_Tx ((uint16_t)0x4000)
emilmont 77:869cf507173a 384 #define IS_SPI_DIRECTION(DIRECTION) (((DIRECTION) == SPI_Direction_Rx) || \
emilmont 77:869cf507173a 385 ((DIRECTION) == SPI_Direction_Tx))
emilmont 77:869cf507173a 386 /**
emilmont 77:869cf507173a 387 * @}
emilmont 77:869cf507173a 388 */
emilmont 77:869cf507173a 389
emilmont 77:869cf507173a 390 /** @defgroup SPI_I2S_interrupts_definition
emilmont 77:869cf507173a 391 * @{
emilmont 77:869cf507173a 392 */
emilmont 77:869cf507173a 393
emilmont 77:869cf507173a 394 #define SPI_I2S_IT_TXE ((uint8_t)0x71)
emilmont 77:869cf507173a 395 #define SPI_I2S_IT_RXNE ((uint8_t)0x60)
emilmont 77:869cf507173a 396 #define SPI_I2S_IT_ERR ((uint8_t)0x50)
emilmont 77:869cf507173a 397 #define I2S_IT_UDR ((uint8_t)0x53)
emilmont 77:869cf507173a 398 #define SPI_I2S_IT_FRE ((uint8_t)0x58)
emilmont 77:869cf507173a 399
emilmont 77:869cf507173a 400 #define IS_SPI_I2S_CONFIG_IT(IT) (((IT) == SPI_I2S_IT_TXE) || \
emilmont 77:869cf507173a 401 ((IT) == SPI_I2S_IT_RXNE) || \
emilmont 77:869cf507173a 402 ((IT) == SPI_I2S_IT_ERR))
emilmont 77:869cf507173a 403
emilmont 77:869cf507173a 404 #define SPI_I2S_IT_OVR ((uint8_t)0x56)
emilmont 77:869cf507173a 405 #define SPI_IT_MODF ((uint8_t)0x55)
emilmont 77:869cf507173a 406 #define SPI_IT_CRCERR ((uint8_t)0x54)
emilmont 77:869cf507173a 407
emilmont 77:869cf507173a 408 #define IS_SPI_I2S_CLEAR_IT(IT) (((IT) == SPI_IT_CRCERR))
emilmont 77:869cf507173a 409
emilmont 77:869cf507173a 410 #define IS_SPI_I2S_GET_IT(IT) (((IT) == SPI_I2S_IT_RXNE) || ((IT) == SPI_I2S_IT_TXE) || \
emilmont 77:869cf507173a 411 ((IT) == SPI_IT_CRCERR) || ((IT) == SPI_IT_MODF) || \
emilmont 77:869cf507173a 412 ((IT) == SPI_I2S_IT_OVR) || ((IT) == I2S_IT_UDR) ||\
emilmont 77:869cf507173a 413 ((IT) == SPI_I2S_IT_FRE))
emilmont 77:869cf507173a 414 /**
emilmont 77:869cf507173a 415 * @}
emilmont 77:869cf507173a 416 */
emilmont 77:869cf507173a 417
emilmont 77:869cf507173a 418 /** @defgroup SPI_I2S_flags_definition
emilmont 77:869cf507173a 419 * @{
emilmont 77:869cf507173a 420 */
emilmont 77:869cf507173a 421
emilmont 77:869cf507173a 422 #define SPI_I2S_FLAG_RXNE ((uint16_t)0x0001)
emilmont 77:869cf507173a 423 #define SPI_I2S_FLAG_TXE ((uint16_t)0x0002)
emilmont 77:869cf507173a 424 #define I2S_FLAG_CHSIDE ((uint16_t)0x0004)
emilmont 77:869cf507173a 425 #define I2S_FLAG_UDR ((uint16_t)0x0008)
emilmont 77:869cf507173a 426 #define SPI_FLAG_CRCERR ((uint16_t)0x0010)
emilmont 77:869cf507173a 427 #define SPI_FLAG_MODF ((uint16_t)0x0020)
emilmont 77:869cf507173a 428 #define SPI_I2S_FLAG_OVR ((uint16_t)0x0040)
emilmont 77:869cf507173a 429 #define SPI_I2S_FLAG_BSY ((uint16_t)0x0080)
emilmont 77:869cf507173a 430 #define SPI_I2S_FLAG_FRE ((uint16_t)0x0100)
emilmont 77:869cf507173a 431
emilmont 77:869cf507173a 432 #define IS_SPI_I2S_CLEAR_FLAG(FLAG) (((FLAG) == SPI_FLAG_CRCERR))
emilmont 77:869cf507173a 433 #define IS_SPI_I2S_GET_FLAG(FLAG) (((FLAG) == SPI_I2S_FLAG_BSY) || ((FLAG) == SPI_I2S_FLAG_OVR) || \
emilmont 77:869cf507173a 434 ((FLAG) == SPI_FLAG_MODF) || ((FLAG) == SPI_FLAG_CRCERR) || \
emilmont 77:869cf507173a 435 ((FLAG) == I2S_FLAG_UDR) || ((FLAG) == I2S_FLAG_CHSIDE) || \
emilmont 77:869cf507173a 436 ((FLAG) == SPI_I2S_FLAG_TXE) || ((FLAG) == SPI_I2S_FLAG_RXNE)|| \
emilmont 77:869cf507173a 437 ((FLAG) == SPI_I2S_FLAG_FRE))
emilmont 77:869cf507173a 438 /**
emilmont 77:869cf507173a 439 * @}
emilmont 77:869cf507173a 440 */
emilmont 77:869cf507173a 441
emilmont 77:869cf507173a 442 /** @defgroup SPI_CRC_polynomial
emilmont 77:869cf507173a 443 * @{
emilmont 77:869cf507173a 444 */
emilmont 77:869cf507173a 445
emilmont 77:869cf507173a 446 #define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) ((POLYNOMIAL) >= 0x1)
emilmont 77:869cf507173a 447 /**
emilmont 77:869cf507173a 448 * @}
emilmont 77:869cf507173a 449 */
emilmont 77:869cf507173a 450
emilmont 77:869cf507173a 451 /** @defgroup SPI_I2S_Legacy
emilmont 77:869cf507173a 452 * @{
emilmont 77:869cf507173a 453 */
emilmont 77:869cf507173a 454
emilmont 77:869cf507173a 455 #define SPI_DMAReq_Tx SPI_I2S_DMAReq_Tx
emilmont 77:869cf507173a 456 #define SPI_DMAReq_Rx SPI_I2S_DMAReq_Rx
emilmont 77:869cf507173a 457 #define SPI_IT_TXE SPI_I2S_IT_TXE
emilmont 77:869cf507173a 458 #define SPI_IT_RXNE SPI_I2S_IT_RXNE
emilmont 77:869cf507173a 459 #define SPI_IT_ERR SPI_I2S_IT_ERR
emilmont 77:869cf507173a 460 #define SPI_IT_OVR SPI_I2S_IT_OVR
emilmont 77:869cf507173a 461 #define SPI_FLAG_RXNE SPI_I2S_FLAG_RXNE
emilmont 77:869cf507173a 462 #define SPI_FLAG_TXE SPI_I2S_FLAG_TXE
emilmont 77:869cf507173a 463 #define SPI_FLAG_OVR SPI_I2S_FLAG_OVR
emilmont 77:869cf507173a 464 #define SPI_FLAG_BSY SPI_I2S_FLAG_BSY
emilmont 77:869cf507173a 465 #define SPI_DeInit SPI_I2S_DeInit
emilmont 77:869cf507173a 466 #define SPI_ITConfig SPI_I2S_ITConfig
emilmont 77:869cf507173a 467 #define SPI_DMACmd SPI_I2S_DMACmd
emilmont 77:869cf507173a 468 #define SPI_SendData SPI_I2S_SendData
emilmont 77:869cf507173a 469 #define SPI_ReceiveData SPI_I2S_ReceiveData
emilmont 77:869cf507173a 470 #define SPI_GetFlagStatus SPI_I2S_GetFlagStatus
emilmont 77:869cf507173a 471 #define SPI_ClearFlag SPI_I2S_ClearFlag
emilmont 77:869cf507173a 472 #define SPI_GetITStatus SPI_I2S_GetITStatus
emilmont 77:869cf507173a 473 #define SPI_ClearITPendingBit SPI_I2S_ClearITPendingBit
emilmont 77:869cf507173a 474 /**
emilmont 77:869cf507173a 475 * @}
emilmont 77:869cf507173a 476 */
emilmont 77:869cf507173a 477
emilmont 77:869cf507173a 478 /**
emilmont 77:869cf507173a 479 * @}
emilmont 77:869cf507173a 480 */
emilmont 77:869cf507173a 481
emilmont 77:869cf507173a 482 /* Exported macro ------------------------------------------------------------*/
emilmont 77:869cf507173a 483 /* Exported functions ------------------------------------------------------- */
emilmont 77:869cf507173a 484
emilmont 77:869cf507173a 485 /* Function used to set the SPI configuration to the default reset state *****/
emilmont 77:869cf507173a 486 void SPI_I2S_DeInit(SPI_TypeDef* SPIx);
emilmont 77:869cf507173a 487
emilmont 77:869cf507173a 488 /* Initialization and Configuration functions *********************************/
emilmont 77:869cf507173a 489 void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct);
emilmont 77:869cf507173a 490 void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct);
emilmont 77:869cf507173a 491 void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct);
emilmont 77:869cf507173a 492 void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct);
emilmont 77:869cf507173a 493 void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
emilmont 77:869cf507173a 494 void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
emilmont 77:869cf507173a 495 void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize);
emilmont 77:869cf507173a 496 void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction);
emilmont 77:869cf507173a 497 void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft);
emilmont 77:869cf507173a 498 void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState);
emilmont 77:869cf507173a 499
emilmont 77:869cf507173a 500 /* Data transfers functions ***************************************************/
emilmont 77:869cf507173a 501 void SPI_I2S_SendData(SPI_TypeDef* SPIx, uint16_t Data);
emilmont 77:869cf507173a 502 uint16_t SPI_I2S_ReceiveData(SPI_TypeDef* SPIx);
emilmont 77:869cf507173a 503
emilmont 77:869cf507173a 504 /* Hardware CRC Calculation functions *****************************************/
emilmont 77:869cf507173a 505 void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState);
emilmont 77:869cf507173a 506 void SPI_TransmitCRC(SPI_TypeDef* SPIx);
emilmont 77:869cf507173a 507 uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC);
emilmont 77:869cf507173a 508 uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx);
emilmont 77:869cf507173a 509
emilmont 77:869cf507173a 510 /* DMA transfers management functions *****************************************/
emilmont 77:869cf507173a 511 void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState);
emilmont 77:869cf507173a 512
emilmont 77:869cf507173a 513 /* Interrupts and flags management functions **********************************/
emilmont 77:869cf507173a 514 void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState);
emilmont 77:869cf507173a 515 FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
emilmont 77:869cf507173a 516 void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
emilmont 77:869cf507173a 517 ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);
emilmont 77:869cf507173a 518 void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);
emilmont 77:869cf507173a 519
emilmont 77:869cf507173a 520 #ifdef __cplusplus
emilmont 77:869cf507173a 521 }
emilmont 77:869cf507173a 522 #endif
emilmont 77:869cf507173a 523
emilmont 77:869cf507173a 524 #endif /*__STM32L1xx_SPI_H */
emilmont 77:869cf507173a 525
emilmont 77:869cf507173a 526 /**
emilmont 77:869cf507173a 527 * @}
emilmont 77:869cf507173a 528 */
emilmont 77:869cf507173a 529
emilmont 77:869cf507173a 530 /**
emilmont 77:869cf507173a 531 * @}
emilmont 77:869cf507173a 532 */
emilmont 77:869cf507173a 533
emilmont 77:869cf507173a 534 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/