version_2.0

Dependents:   cc3000_ping_demo_try_2

Fork of mbed by mbed official

Committer:
erezi
Date:
Wed Jun 25 06:08:49 2014 +0000
Revision:
86:4f9a848d74c7
Parent:
81:7d30d6019079
version_2.0

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emilmont 77:869cf507173a 1 /**
emilmont 77:869cf507173a 2 ******************************************************************************
emilmont 77:869cf507173a 3 * @file stm32l1xx_rtc.h
emilmont 77:869cf507173a 4 * @author MCD Application Team
emilmont 77:869cf507173a 5 * @version V1.3.0
emilmont 77:869cf507173a 6 * @date 31-January-2014
emilmont 77:869cf507173a 7 * @brief This file contains all the functions prototypes for the RTC firmware
emilmont 77:869cf507173a 8 * library.
emilmont 77:869cf507173a 9 ******************************************************************************
emilmont 77:869cf507173a 10 * @attention
emilmont 77:869cf507173a 11 *
bogdanm 81:7d30d6019079 12 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
emilmont 77:869cf507173a 13 *
bogdanm 81:7d30d6019079 14 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 81:7d30d6019079 15 * are permitted provided that the following conditions are met:
bogdanm 81:7d30d6019079 16 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 81:7d30d6019079 17 * this list of conditions and the following disclaimer.
bogdanm 81:7d30d6019079 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 81:7d30d6019079 19 * this list of conditions and the following disclaimer in the documentation
bogdanm 81:7d30d6019079 20 * and/or other materials provided with the distribution.
bogdanm 81:7d30d6019079 21 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 81:7d30d6019079 22 * may be used to endorse or promote products derived from this software
bogdanm 81:7d30d6019079 23 * without specific prior written permission.
emilmont 77:869cf507173a 24 *
bogdanm 81:7d30d6019079 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 81:7d30d6019079 26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 81:7d30d6019079 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 81:7d30d6019079 28 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 81:7d30d6019079 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 81:7d30d6019079 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 81:7d30d6019079 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 81:7d30d6019079 32 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 81:7d30d6019079 33 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 81:7d30d6019079 34 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
emilmont 77:869cf507173a 35 *
emilmont 77:869cf507173a 36 ******************************************************************************
emilmont 77:869cf507173a 37 */
emilmont 77:869cf507173a 38
emilmont 77:869cf507173a 39 /* Define to prevent recursive inclusion -------------------------------------*/
emilmont 77:869cf507173a 40 #ifndef __STM32L1xx_RTC_H
emilmont 77:869cf507173a 41 #define __STM32L1xx_RTC_H
emilmont 77:869cf507173a 42
emilmont 77:869cf507173a 43 #ifdef __cplusplus
emilmont 77:869cf507173a 44 extern "C" {
emilmont 77:869cf507173a 45 #endif
emilmont 77:869cf507173a 46
emilmont 77:869cf507173a 47 /* Includes ------------------------------------------------------------------*/
emilmont 77:869cf507173a 48 #include "stm32l1xx.h"
emilmont 77:869cf507173a 49
emilmont 77:869cf507173a 50 /** @addtogroup STM32L1xx_StdPeriph_Driver
emilmont 77:869cf507173a 51 * @{
emilmont 77:869cf507173a 52 */
emilmont 77:869cf507173a 53
emilmont 77:869cf507173a 54 /** @addtogroup RTC
emilmont 77:869cf507173a 55 * @{
emilmont 77:869cf507173a 56 */
emilmont 77:869cf507173a 57
emilmont 77:869cf507173a 58 /* Exported types ------------------------------------------------------------*/
emilmont 77:869cf507173a 59
emilmont 77:869cf507173a 60 /**
emilmont 77:869cf507173a 61 * @brief RTC Init structures definition
emilmont 77:869cf507173a 62 */
emilmont 77:869cf507173a 63 typedef struct
emilmont 77:869cf507173a 64 {
emilmont 77:869cf507173a 65 uint32_t RTC_HourFormat; /*!< Specifies the RTC Hour Format.
emilmont 77:869cf507173a 66 This parameter can be a value of @ref RTC_Hour_Formats */
emilmont 77:869cf507173a 67
emilmont 77:869cf507173a 68 uint32_t RTC_AsynchPrediv; /*!< Specifies the RTC Asynchronous Predivider value.
emilmont 77:869cf507173a 69 This parameter must be set to a value lower than 0x7F */
emilmont 77:869cf507173a 70
emilmont 77:869cf507173a 71 uint32_t RTC_SynchPrediv; /*!< Specifies the RTC Synchronous Predivider value.
emilmont 77:869cf507173a 72 This parameter must be set to a value lower than 0x7FFF */
emilmont 77:869cf507173a 73 }RTC_InitTypeDef;
emilmont 77:869cf507173a 74
emilmont 77:869cf507173a 75 /**
emilmont 77:869cf507173a 76 * @brief RTC Time structure definition
emilmont 77:869cf507173a 77 */
emilmont 77:869cf507173a 78 typedef struct
emilmont 77:869cf507173a 79 {
emilmont 77:869cf507173a 80 uint8_t RTC_Hours; /*!< Specifies the RTC Time Hour.
emilmont 77:869cf507173a 81 This parameter must be set to a value in the 0-12 range
emilmont 77:869cf507173a 82 if the RTC_HourFormat_12 is selected or 0-23 range if
emilmont 77:869cf507173a 83 the RTC_HourFormat_24 is selected. */
emilmont 77:869cf507173a 84
emilmont 77:869cf507173a 85 uint8_t RTC_Minutes; /*!< Specifies the RTC Time Minutes.
emilmont 77:869cf507173a 86 This parameter must be set to a value in the 0-59 range. */
emilmont 77:869cf507173a 87
emilmont 77:869cf507173a 88 uint8_t RTC_Seconds; /*!< Specifies the RTC Time Seconds.
emilmont 77:869cf507173a 89 This parameter must be set to a value in the 0-59 range. */
emilmont 77:869cf507173a 90
emilmont 77:869cf507173a 91 uint8_t RTC_H12; /*!< Specifies the RTC AM/PM Time.
emilmont 77:869cf507173a 92 This parameter can be a value of @ref RTC_AM_PM_Definitions */
emilmont 77:869cf507173a 93 }RTC_TimeTypeDef;
emilmont 77:869cf507173a 94
emilmont 77:869cf507173a 95 /**
emilmont 77:869cf507173a 96 * @brief RTC Date structure definition
emilmont 77:869cf507173a 97 */
emilmont 77:869cf507173a 98 typedef struct
emilmont 77:869cf507173a 99 {
emilmont 77:869cf507173a 100 uint8_t RTC_WeekDay; /*!< Specifies the RTC Date WeekDay.
emilmont 77:869cf507173a 101 This parameter can be a value of @ref RTC_WeekDay_Definitions */
emilmont 77:869cf507173a 102
emilmont 77:869cf507173a 103 uint8_t RTC_Month; /*!< Specifies the RTC Date Month (in BCD format).
emilmont 77:869cf507173a 104 This parameter can be a value of @ref RTC_Month_Date_Definitions */
emilmont 77:869cf507173a 105
emilmont 77:869cf507173a 106 uint8_t RTC_Date; /*!< Specifies the RTC Date.
emilmont 77:869cf507173a 107 This parameter must be set to a value in the 1-31 range. */
emilmont 77:869cf507173a 108
emilmont 77:869cf507173a 109 uint8_t RTC_Year; /*!< Specifies the RTC Date Year.
emilmont 77:869cf507173a 110 This parameter must be set to a value in the 0-99 range. */
emilmont 77:869cf507173a 111 }RTC_DateTypeDef;
emilmont 77:869cf507173a 112
emilmont 77:869cf507173a 113 /**
emilmont 77:869cf507173a 114 * @brief RTC Alarm structure definition
emilmont 77:869cf507173a 115 */
emilmont 77:869cf507173a 116 typedef struct
emilmont 77:869cf507173a 117 {
emilmont 77:869cf507173a 118 RTC_TimeTypeDef RTC_AlarmTime; /*!< Specifies the RTC Alarm Time members. */
emilmont 77:869cf507173a 119
emilmont 77:869cf507173a 120 uint32_t RTC_AlarmMask; /*!< Specifies the RTC Alarm Masks.
emilmont 77:869cf507173a 121 This parameter can be a value of @ref RTC_AlarmMask_Definitions */
emilmont 77:869cf507173a 122
emilmont 77:869cf507173a 123 uint32_t RTC_AlarmDateWeekDaySel; /*!< Specifies the RTC Alarm is on Date or WeekDay.
emilmont 77:869cf507173a 124 This parameter can be a value of @ref RTC_AlarmDateWeekDay_Definitions */
emilmont 77:869cf507173a 125
emilmont 77:869cf507173a 126 uint8_t RTC_AlarmDateWeekDay; /*!< Specifies the RTC Alarm Date/WeekDay.
emilmont 77:869cf507173a 127 If the Alarm Date is selected, this parameter
emilmont 77:869cf507173a 128 must be set to a value in the 1-31 range.
emilmont 77:869cf507173a 129 If the Alarm WeekDay is selected, this
emilmont 77:869cf507173a 130 parameter can be a value of @ref RTC_WeekDay_Definitions */
emilmont 77:869cf507173a 131 }RTC_AlarmTypeDef;
emilmont 77:869cf507173a 132
emilmont 77:869cf507173a 133 /* Exported constants --------------------------------------------------------*/
emilmont 77:869cf507173a 134
emilmont 77:869cf507173a 135 /** @defgroup RTC_Exported_Constants
emilmont 77:869cf507173a 136 * @{
emilmont 77:869cf507173a 137 */
emilmont 77:869cf507173a 138
emilmont 77:869cf507173a 139
emilmont 77:869cf507173a 140 /** @defgroup RTC_Hour_Formats
emilmont 77:869cf507173a 141 * @{
emilmont 77:869cf507173a 142 */
emilmont 77:869cf507173a 143 #define RTC_HourFormat_24 ((uint32_t)0x00000000)
emilmont 77:869cf507173a 144 #define RTC_HourFormat_12 ((uint32_t)0x00000040)
emilmont 77:869cf507173a 145 #define IS_RTC_HOUR_FORMAT(FORMAT) (((FORMAT) == RTC_HourFormat_12) || \
emilmont 77:869cf507173a 146 ((FORMAT) == RTC_HourFormat_24))
emilmont 77:869cf507173a 147 /**
emilmont 77:869cf507173a 148 * @}
emilmont 77:869cf507173a 149 */
emilmont 77:869cf507173a 150
emilmont 77:869cf507173a 151 /** @defgroup RTC_Asynchronous_Predivider
emilmont 77:869cf507173a 152 * @{
emilmont 77:869cf507173a 153 */
emilmont 77:869cf507173a 154 #define IS_RTC_ASYNCH_PREDIV(PREDIV) ((PREDIV) <= 0x7F)
emilmont 77:869cf507173a 155
emilmont 77:869cf507173a 156 /**
emilmont 77:869cf507173a 157 * @}
emilmont 77:869cf507173a 158 */
emilmont 77:869cf507173a 159
emilmont 77:869cf507173a 160
emilmont 77:869cf507173a 161 /** @defgroup RTC_Synchronous_Predivider
emilmont 77:869cf507173a 162 * @{
emilmont 77:869cf507173a 163 */
emilmont 77:869cf507173a 164 #define IS_RTC_SYNCH_PREDIV(PREDIV) ((PREDIV) <= 0x7FFF)
emilmont 77:869cf507173a 165
emilmont 77:869cf507173a 166 /**
emilmont 77:869cf507173a 167 * @}
emilmont 77:869cf507173a 168 */
emilmont 77:869cf507173a 169
emilmont 77:869cf507173a 170 /** @defgroup RTC_Time_Definitions
emilmont 77:869cf507173a 171 * @{
emilmont 77:869cf507173a 172 */
emilmont 77:869cf507173a 173 #define IS_RTC_HOUR12(HOUR) (((HOUR) > 0) && ((HOUR) <= 12))
emilmont 77:869cf507173a 174 #define IS_RTC_HOUR24(HOUR) ((HOUR) <= 23)
emilmont 77:869cf507173a 175 #define IS_RTC_MINUTES(MINUTES) ((MINUTES) <= 59)
emilmont 77:869cf507173a 176 #define IS_RTC_SECONDS(SECONDS) ((SECONDS) <= 59)
emilmont 77:869cf507173a 177
emilmont 77:869cf507173a 178 /**
emilmont 77:869cf507173a 179 * @}
emilmont 77:869cf507173a 180 */
emilmont 77:869cf507173a 181
emilmont 77:869cf507173a 182 /** @defgroup RTC_AM_PM_Definitions
emilmont 77:869cf507173a 183 * @{
emilmont 77:869cf507173a 184 */
emilmont 77:869cf507173a 185 #define RTC_H12_AM ((uint8_t)0x00)
emilmont 77:869cf507173a 186 #define RTC_H12_PM ((uint8_t)0x40)
emilmont 77:869cf507173a 187 #define IS_RTC_H12(PM) (((PM) == RTC_H12_AM) || ((PM) == RTC_H12_PM))
emilmont 77:869cf507173a 188
emilmont 77:869cf507173a 189 /**
emilmont 77:869cf507173a 190 * @}
emilmont 77:869cf507173a 191 */
emilmont 77:869cf507173a 192
emilmont 77:869cf507173a 193 /** @defgroup RTC_Year_Date_Definitions
emilmont 77:869cf507173a 194 * @{
emilmont 77:869cf507173a 195 */
emilmont 77:869cf507173a 196 #define IS_RTC_YEAR(YEAR) ((YEAR) <= 99)
emilmont 77:869cf507173a 197
emilmont 77:869cf507173a 198 /**
emilmont 77:869cf507173a 199 * @}
emilmont 77:869cf507173a 200 */
emilmont 77:869cf507173a 201
emilmont 77:869cf507173a 202 /** @defgroup RTC_Month_Date_Definitions
emilmont 77:869cf507173a 203 * @{
emilmont 77:869cf507173a 204 */
emilmont 77:869cf507173a 205
emilmont 77:869cf507173a 206 /* Coded in BCD format */
emilmont 77:869cf507173a 207 #define RTC_Month_January ((uint8_t)0x01)
emilmont 77:869cf507173a 208 #define RTC_Month_February ((uint8_t)0x02)
emilmont 77:869cf507173a 209 #define RTC_Month_March ((uint8_t)0x03)
emilmont 77:869cf507173a 210 #define RTC_Month_April ((uint8_t)0x04)
emilmont 77:869cf507173a 211 #define RTC_Month_May ((uint8_t)0x05)
emilmont 77:869cf507173a 212 #define RTC_Month_June ((uint8_t)0x06)
emilmont 77:869cf507173a 213 #define RTC_Month_July ((uint8_t)0x07)
emilmont 77:869cf507173a 214 #define RTC_Month_August ((uint8_t)0x08)
emilmont 77:869cf507173a 215 #define RTC_Month_September ((uint8_t)0x09)
emilmont 77:869cf507173a 216 #define RTC_Month_October ((uint8_t)0x10)
emilmont 77:869cf507173a 217 #define RTC_Month_November ((uint8_t)0x11)
emilmont 77:869cf507173a 218 #define RTC_Month_December ((uint8_t)0x12)
emilmont 77:869cf507173a 219 #define IS_RTC_MONTH(MONTH) (((MONTH) >= 1) && ((MONTH) <= 12))
emilmont 77:869cf507173a 220 #define IS_RTC_DATE(DATE) (((DATE) >= 1) && ((DATE) <= 31))
emilmont 77:869cf507173a 221
emilmont 77:869cf507173a 222 /**
emilmont 77:869cf507173a 223 * @}
emilmont 77:869cf507173a 224 */
emilmont 77:869cf507173a 225
emilmont 77:869cf507173a 226 /** @defgroup RTC_WeekDay_Definitions
emilmont 77:869cf507173a 227 * @{
emilmont 77:869cf507173a 228 */
emilmont 77:869cf507173a 229
emilmont 77:869cf507173a 230 #define RTC_Weekday_Monday ((uint8_t)0x01)
emilmont 77:869cf507173a 231 #define RTC_Weekday_Tuesday ((uint8_t)0x02)
emilmont 77:869cf507173a 232 #define RTC_Weekday_Wednesday ((uint8_t)0x03)
emilmont 77:869cf507173a 233 #define RTC_Weekday_Thursday ((uint8_t)0x04)
emilmont 77:869cf507173a 234 #define RTC_Weekday_Friday ((uint8_t)0x05)
emilmont 77:869cf507173a 235 #define RTC_Weekday_Saturday ((uint8_t)0x06)
emilmont 77:869cf507173a 236 #define RTC_Weekday_Sunday ((uint8_t)0x07)
emilmont 77:869cf507173a 237 #define IS_RTC_WEEKDAY(WEEKDAY) (((WEEKDAY) == RTC_Weekday_Monday) || \
emilmont 77:869cf507173a 238 ((WEEKDAY) == RTC_Weekday_Tuesday) || \
emilmont 77:869cf507173a 239 ((WEEKDAY) == RTC_Weekday_Wednesday) || \
emilmont 77:869cf507173a 240 ((WEEKDAY) == RTC_Weekday_Thursday) || \
emilmont 77:869cf507173a 241 ((WEEKDAY) == RTC_Weekday_Friday) || \
emilmont 77:869cf507173a 242 ((WEEKDAY) == RTC_Weekday_Saturday) || \
emilmont 77:869cf507173a 243 ((WEEKDAY) == RTC_Weekday_Sunday))
emilmont 77:869cf507173a 244 /**
emilmont 77:869cf507173a 245 * @}
emilmont 77:869cf507173a 246 */
emilmont 77:869cf507173a 247
emilmont 77:869cf507173a 248
emilmont 77:869cf507173a 249 /** @defgroup RTC_Alarm_Definitions
emilmont 77:869cf507173a 250 * @{
emilmont 77:869cf507173a 251 */
emilmont 77:869cf507173a 252 #define IS_RTC_ALARM_DATE_WEEKDAY_DATE(DATE) (((DATE) > 0) && ((DATE) <= 31))
emilmont 77:869cf507173a 253 #define IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(WEEKDAY) (((WEEKDAY) == RTC_Weekday_Monday) || \
emilmont 77:869cf507173a 254 ((WEEKDAY) == RTC_Weekday_Tuesday) || \
emilmont 77:869cf507173a 255 ((WEEKDAY) == RTC_Weekday_Wednesday) || \
emilmont 77:869cf507173a 256 ((WEEKDAY) == RTC_Weekday_Thursday) || \
emilmont 77:869cf507173a 257 ((WEEKDAY) == RTC_Weekday_Friday) || \
emilmont 77:869cf507173a 258 ((WEEKDAY) == RTC_Weekday_Saturday) || \
emilmont 77:869cf507173a 259 ((WEEKDAY) == RTC_Weekday_Sunday))
emilmont 77:869cf507173a 260
emilmont 77:869cf507173a 261 /**
emilmont 77:869cf507173a 262 * @}
emilmont 77:869cf507173a 263 */
emilmont 77:869cf507173a 264
emilmont 77:869cf507173a 265
emilmont 77:869cf507173a 266 /** @defgroup RTC_AlarmDateWeekDay_Definitions
emilmont 77:869cf507173a 267 * @{
emilmont 77:869cf507173a 268 */
emilmont 77:869cf507173a 269 #define RTC_AlarmDateWeekDaySel_Date ((uint32_t)0x00000000)
emilmont 77:869cf507173a 270 #define RTC_AlarmDateWeekDaySel_WeekDay ((uint32_t)0x40000000)
emilmont 77:869cf507173a 271
emilmont 77:869cf507173a 272 #define IS_RTC_ALARM_DATE_WEEKDAY_SEL(SEL) (((SEL) == RTC_AlarmDateWeekDaySel_Date) || \
emilmont 77:869cf507173a 273 ((SEL) == RTC_AlarmDateWeekDaySel_WeekDay))
emilmont 77:869cf507173a 274
emilmont 77:869cf507173a 275 /**
emilmont 77:869cf507173a 276 * @}
emilmont 77:869cf507173a 277 */
emilmont 77:869cf507173a 278
emilmont 77:869cf507173a 279
emilmont 77:869cf507173a 280 /** @defgroup RTC_AlarmMask_Definitions
emilmont 77:869cf507173a 281 * @{
emilmont 77:869cf507173a 282 */
emilmont 77:869cf507173a 283 #define RTC_AlarmMask_None ((uint32_t)0x00000000)
emilmont 77:869cf507173a 284 #define RTC_AlarmMask_DateWeekDay ((uint32_t)0x80000000)
emilmont 77:869cf507173a 285 #define RTC_AlarmMask_Hours ((uint32_t)0x00800000)
emilmont 77:869cf507173a 286 #define RTC_AlarmMask_Minutes ((uint32_t)0x00008000)
emilmont 77:869cf507173a 287 #define RTC_AlarmMask_Seconds ((uint32_t)0x00000080)
emilmont 77:869cf507173a 288 #define RTC_AlarmMask_All ((uint32_t)0x80808080)
emilmont 77:869cf507173a 289 #define IS_ALARM_MASK(MASK) (((MASK) & 0x7F7F7F7F) == (uint32_t)RESET)
emilmont 77:869cf507173a 290
emilmont 77:869cf507173a 291 /**
emilmont 77:869cf507173a 292 * @}
emilmont 77:869cf507173a 293 */
emilmont 77:869cf507173a 294
emilmont 77:869cf507173a 295 /** @defgroup RTC_Alarms_Definitions
emilmont 77:869cf507173a 296 * @{
emilmont 77:869cf507173a 297 */
emilmont 77:869cf507173a 298 #define RTC_Alarm_A ((uint32_t)0x00000100)
emilmont 77:869cf507173a 299 #define RTC_Alarm_B ((uint32_t)0x00000200)
emilmont 77:869cf507173a 300 #define IS_RTC_ALARM(ALARM) (((ALARM) == RTC_Alarm_A) || ((ALARM) == RTC_Alarm_B))
emilmont 77:869cf507173a 301 #define IS_RTC_CMD_ALARM(ALARM) (((ALARM) & (RTC_Alarm_A | RTC_Alarm_B)) != (uint32_t)RESET)
emilmont 77:869cf507173a 302
emilmont 77:869cf507173a 303 /**
emilmont 77:869cf507173a 304 * @}
emilmont 77:869cf507173a 305 */
emilmont 77:869cf507173a 306
emilmont 77:869cf507173a 307 /** @defgroup RTC_Alarm_Sub_Seconds_Masks_Definitions
emilmont 77:869cf507173a 308 * @{
emilmont 77:869cf507173a 309 */
emilmont 77:869cf507173a 310 #define RTC_AlarmSubSecondMask_All ((uint32_t)0x00000000) /*!< All Alarm SS fields are masked.
emilmont 77:869cf507173a 311 There is no comparison on sub seconds
emilmont 77:869cf507173a 312 for Alarm */
emilmont 77:869cf507173a 313 #define RTC_AlarmSubSecondMask_SS14_1 ((uint32_t)0x01000000) /*!< SS[14:1] are don't care in Alarm
emilmont 77:869cf507173a 314 comparison. Only SS[0] is compared. */
emilmont 77:869cf507173a 315 #define RTC_AlarmSubSecondMask_SS14_2 ((uint32_t)0x02000000) /*!< SS[14:2] are don't care in Alarm
emilmont 77:869cf507173a 316 comparison. Only SS[1:0] are compared */
emilmont 77:869cf507173a 317 #define RTC_AlarmSubSecondMask_SS14_3 ((uint32_t)0x03000000) /*!< SS[14:3] are don't care in Alarm
emilmont 77:869cf507173a 318 comparison. Only SS[2:0] are compared */
emilmont 77:869cf507173a 319 #define RTC_AlarmSubSecondMask_SS14_4 ((uint32_t)0x04000000) /*!< SS[14:4] are don't care in Alarm
emilmont 77:869cf507173a 320 comparison. Only SS[3:0] are compared */
emilmont 77:869cf507173a 321 #define RTC_AlarmSubSecondMask_SS14_5 ((uint32_t)0x05000000) /*!< SS[14:5] are don't care in Alarm
emilmont 77:869cf507173a 322 comparison. Only SS[4:0] are compared */
emilmont 77:869cf507173a 323 #define RTC_AlarmSubSecondMask_SS14_6 ((uint32_t)0x06000000) /*!< SS[14:6] are don't care in Alarm
emilmont 77:869cf507173a 324 comparison. Only SS[5:0] are compared */
emilmont 77:869cf507173a 325 #define RTC_AlarmSubSecondMask_SS14_7 ((uint32_t)0x07000000) /*!< SS[14:7] are don't care in Alarm
emilmont 77:869cf507173a 326 comparison. Only SS[6:0] are compared */
emilmont 77:869cf507173a 327 #define RTC_AlarmSubSecondMask_SS14_8 ((uint32_t)0x08000000) /*!< SS[14:8] are don't care in Alarm
emilmont 77:869cf507173a 328 comparison. Only SS[7:0] are compared */
emilmont 77:869cf507173a 329 #define RTC_AlarmSubSecondMask_SS14_9 ((uint32_t)0x09000000) /*!< SS[14:9] are don't care in Alarm
emilmont 77:869cf507173a 330 comparison. Only SS[8:0] are compared */
emilmont 77:869cf507173a 331 #define RTC_AlarmSubSecondMask_SS14_10 ((uint32_t)0x0A000000) /*!< SS[14:10] are don't care in Alarm
emilmont 77:869cf507173a 332 comparison. Only SS[9:0] are compared */
emilmont 77:869cf507173a 333 #define RTC_AlarmSubSecondMask_SS14_11 ((uint32_t)0x0B000000) /*!< SS[14:11] are don't care in Alarm
emilmont 77:869cf507173a 334 comparison. Only SS[10:0] are compared */
emilmont 77:869cf507173a 335 #define RTC_AlarmSubSecondMask_SS14_12 ((uint32_t)0x0C000000) /*!< SS[14:12] are don't care in Alarm
emilmont 77:869cf507173a 336 comparison.Only SS[11:0] are compared */
emilmont 77:869cf507173a 337 #define RTC_AlarmSubSecondMask_SS14_13 ((uint32_t)0x0D000000) /*!< SS[14:13] are don't care in Alarm
emilmont 77:869cf507173a 338 comparison. Only SS[12:0] are compared */
emilmont 77:869cf507173a 339 #define RTC_AlarmSubSecondMask_SS14 ((uint32_t)0x0E000000) /*!< SS[14] is don't care in Alarm
emilmont 77:869cf507173a 340 comparison.Only SS[13:0] are compared */
emilmont 77:869cf507173a 341 #define RTC_AlarmSubSecondMask_None ((uint32_t)0x0F000000) /*!< SS[14:0] are compared and must match
emilmont 77:869cf507173a 342 to activate alarm. */
emilmont 77:869cf507173a 343 #define IS_RTC_ALARM_SUB_SECOND_MASK(MASK) (((MASK) == RTC_AlarmSubSecondMask_All) || \
emilmont 77:869cf507173a 344 ((MASK) == RTC_AlarmSubSecondMask_SS14_1) || \
emilmont 77:869cf507173a 345 ((MASK) == RTC_AlarmSubSecondMask_SS14_2) || \
emilmont 77:869cf507173a 346 ((MASK) == RTC_AlarmSubSecondMask_SS14_3) || \
emilmont 77:869cf507173a 347 ((MASK) == RTC_AlarmSubSecondMask_SS14_4) || \
emilmont 77:869cf507173a 348 ((MASK) == RTC_AlarmSubSecondMask_SS14_5) || \
emilmont 77:869cf507173a 349 ((MASK) == RTC_AlarmSubSecondMask_SS14_6) || \
emilmont 77:869cf507173a 350 ((MASK) == RTC_AlarmSubSecondMask_SS14_7) || \
emilmont 77:869cf507173a 351 ((MASK) == RTC_AlarmSubSecondMask_SS14_8) || \
emilmont 77:869cf507173a 352 ((MASK) == RTC_AlarmSubSecondMask_SS14_9) || \
emilmont 77:869cf507173a 353 ((MASK) == RTC_AlarmSubSecondMask_SS14_10) || \
emilmont 77:869cf507173a 354 ((MASK) == RTC_AlarmSubSecondMask_SS14_11) || \
emilmont 77:869cf507173a 355 ((MASK) == RTC_AlarmSubSecondMask_SS14_12) || \
emilmont 77:869cf507173a 356 ((MASK) == RTC_AlarmSubSecondMask_SS14_13) || \
emilmont 77:869cf507173a 357 ((MASK) == RTC_AlarmSubSecondMask_SS14) || \
emilmont 77:869cf507173a 358 ((MASK) == RTC_AlarmSubSecondMask_None))
emilmont 77:869cf507173a 359 /**
emilmont 77:869cf507173a 360 * @}
emilmont 77:869cf507173a 361 */
emilmont 77:869cf507173a 362
emilmont 77:869cf507173a 363 /** @defgroup RTC_Alarm_Sub_Seconds_Value
emilmont 77:869cf507173a 364 * @{
emilmont 77:869cf507173a 365 */
emilmont 77:869cf507173a 366
emilmont 77:869cf507173a 367 #define IS_RTC_ALARM_SUB_SECOND_VALUE(VALUE) ((VALUE) <= 0x00007FFF)
emilmont 77:869cf507173a 368
emilmont 77:869cf507173a 369 /**
emilmont 77:869cf507173a 370 * @}
emilmont 77:869cf507173a 371 */
emilmont 77:869cf507173a 372
emilmont 77:869cf507173a 373 /** @defgroup RTC_Wakeup_Timer_Definitions
emilmont 77:869cf507173a 374 * @{
emilmont 77:869cf507173a 375 */
emilmont 77:869cf507173a 376 #define RTC_WakeUpClock_RTCCLK_Div16 ((uint32_t)0x00000000)
emilmont 77:869cf507173a 377 #define RTC_WakeUpClock_RTCCLK_Div8 ((uint32_t)0x00000001)
emilmont 77:869cf507173a 378 #define RTC_WakeUpClock_RTCCLK_Div4 ((uint32_t)0x00000002)
emilmont 77:869cf507173a 379 #define RTC_WakeUpClock_RTCCLK_Div2 ((uint32_t)0x00000003)
emilmont 77:869cf507173a 380 #define RTC_WakeUpClock_CK_SPRE_16bits ((uint32_t)0x00000004)
emilmont 77:869cf507173a 381 #define RTC_WakeUpClock_CK_SPRE_17bits ((uint32_t)0x00000006)
emilmont 77:869cf507173a 382 #define IS_RTC_WAKEUP_CLOCK(CLOCK) (((CLOCK) == RTC_WakeUpClock_RTCCLK_Div16) || \
emilmont 77:869cf507173a 383 ((CLOCK) == RTC_WakeUpClock_RTCCLK_Div8) || \
emilmont 77:869cf507173a 384 ((CLOCK) == RTC_WakeUpClock_RTCCLK_Div4) || \
emilmont 77:869cf507173a 385 ((CLOCK) == RTC_WakeUpClock_RTCCLK_Div2) || \
emilmont 77:869cf507173a 386 ((CLOCK) == RTC_WakeUpClock_CK_SPRE_16bits) || \
emilmont 77:869cf507173a 387 ((CLOCK) == RTC_WakeUpClock_CK_SPRE_17bits))
emilmont 77:869cf507173a 388 #define IS_RTC_WAKEUP_COUNTER(COUNTER) ((COUNTER) <= 0xFFFF)
emilmont 77:869cf507173a 389 /**
emilmont 77:869cf507173a 390 * @}
emilmont 77:869cf507173a 391 */
emilmont 77:869cf507173a 392
emilmont 77:869cf507173a 393 /** @defgroup RTC_Time_Stamp_Edges_definitions
emilmont 77:869cf507173a 394 * @{
emilmont 77:869cf507173a 395 */
emilmont 77:869cf507173a 396 #define RTC_TimeStampEdge_Rising ((uint32_t)0x00000000)
emilmont 77:869cf507173a 397 #define RTC_TimeStampEdge_Falling ((uint32_t)0x00000008)
emilmont 77:869cf507173a 398 #define IS_RTC_TIMESTAMP_EDGE(EDGE) (((EDGE) == RTC_TimeStampEdge_Rising) || \
emilmont 77:869cf507173a 399 ((EDGE) == RTC_TimeStampEdge_Falling))
emilmont 77:869cf507173a 400 /**
emilmont 77:869cf507173a 401 * @}
emilmont 77:869cf507173a 402 */
emilmont 77:869cf507173a 403
emilmont 77:869cf507173a 404 /** @defgroup RTC_Output_selection_Definitions
emilmont 77:869cf507173a 405 * @{
emilmont 77:869cf507173a 406 */
emilmont 77:869cf507173a 407 #define RTC_Output_Disable ((uint32_t)0x00000000)
emilmont 77:869cf507173a 408 #define RTC_Output_AlarmA ((uint32_t)0x00200000)
emilmont 77:869cf507173a 409 #define RTC_Output_AlarmB ((uint32_t)0x00400000)
emilmont 77:869cf507173a 410 #define RTC_Output_WakeUp ((uint32_t)0x00600000)
emilmont 77:869cf507173a 411
emilmont 77:869cf507173a 412 #define IS_RTC_OUTPUT(OUTPUT) (((OUTPUT) == RTC_Output_Disable) || \
emilmont 77:869cf507173a 413 ((OUTPUT) == RTC_Output_AlarmA) || \
emilmont 77:869cf507173a 414 ((OUTPUT) == RTC_Output_AlarmB) || \
emilmont 77:869cf507173a 415 ((OUTPUT) == RTC_Output_WakeUp))
emilmont 77:869cf507173a 416
emilmont 77:869cf507173a 417 /**
emilmont 77:869cf507173a 418 * @}
emilmont 77:869cf507173a 419 */
emilmont 77:869cf507173a 420
emilmont 77:869cf507173a 421 /** @defgroup RTC_Output_Polarity_Definitions
emilmont 77:869cf507173a 422 * @{
emilmont 77:869cf507173a 423 */
emilmont 77:869cf507173a 424 #define RTC_OutputPolarity_High ((uint32_t)0x00000000)
emilmont 77:869cf507173a 425 #define RTC_OutputPolarity_Low ((uint32_t)0x00100000)
emilmont 77:869cf507173a 426 #define IS_RTC_OUTPUT_POL(POL) (((POL) == RTC_OutputPolarity_High) || \
emilmont 77:869cf507173a 427 ((POL) == RTC_OutputPolarity_Low))
emilmont 77:869cf507173a 428 /**
emilmont 77:869cf507173a 429 * @}
emilmont 77:869cf507173a 430 */
emilmont 77:869cf507173a 431
emilmont 77:869cf507173a 432 /** @defgroup RTC_Coarse_Calibration_Definitions
emilmont 77:869cf507173a 433 * @{
emilmont 77:869cf507173a 434 */
emilmont 77:869cf507173a 435 #define RTC_CalibSign_Positive ((uint32_t)0x00000000)
emilmont 77:869cf507173a 436 #define RTC_CalibSign_Negative ((uint32_t)0x00000080)
emilmont 77:869cf507173a 437 #define IS_RTC_CALIB_SIGN(SIGN) (((SIGN) == RTC_CalibSign_Positive) || \
emilmont 77:869cf507173a 438 ((SIGN) == RTC_CalibSign_Negative))
emilmont 77:869cf507173a 439 #define IS_RTC_CALIB_VALUE(VALUE) ((VALUE) < 0x20)
emilmont 77:869cf507173a 440
emilmont 77:869cf507173a 441 /**
emilmont 77:869cf507173a 442 * @}
emilmont 77:869cf507173a 443 */
emilmont 77:869cf507173a 444
emilmont 77:869cf507173a 445 /** @defgroup RTC_Calib_Output_selection_Definitions
emilmont 77:869cf507173a 446 * @{
emilmont 77:869cf507173a 447 */
emilmont 77:869cf507173a 448 #define RTC_CalibOutput_512Hz ((uint32_t)0x00000000)
emilmont 77:869cf507173a 449 #define RTC_CalibOutput_1Hz ((uint32_t)0x00080000)
emilmont 77:869cf507173a 450 #define IS_RTC_CALIB_OUTPUT(OUTPUT) (((OUTPUT) == RTC_CalibOutput_512Hz) || \
emilmont 77:869cf507173a 451 ((OUTPUT) == RTC_CalibOutput_1Hz))
emilmont 77:869cf507173a 452 /**
emilmont 77:869cf507173a 453 * @}
emilmont 77:869cf507173a 454 */
emilmont 77:869cf507173a 455
emilmont 77:869cf507173a 456 /** @defgroup RTC_Smooth_calib_period_Definitions
emilmont 77:869cf507173a 457 * @{
emilmont 77:869cf507173a 458 */
emilmont 77:869cf507173a 459 #define RTC_SmoothCalibPeriod_32sec ((uint32_t)0x00000000) /*!< if RTCCLK = 32768 Hz, Smooth calibation
emilmont 77:869cf507173a 460 period is 32s, else 2exp20 RTCCLK seconds */
emilmont 77:869cf507173a 461 #define RTC_SmoothCalibPeriod_16sec ((uint32_t)0x00002000) /*!< if RTCCLK = 32768 Hz, Smooth calibation
emilmont 77:869cf507173a 462 period is 16s, else 2exp19 RTCCLK seconds */
emilmont 77:869cf507173a 463 #define RTC_SmoothCalibPeriod_8sec ((uint32_t)0x00004000) /*!< if RTCCLK = 32768 Hz, Smooth calibation
emilmont 77:869cf507173a 464 period is 8s, else 2exp18 RTCCLK seconds */
emilmont 77:869cf507173a 465 #define IS_RTC_SMOOTH_CALIB_PERIOD(PERIOD) (((PERIOD) == RTC_SmoothCalibPeriod_32sec) || \
emilmont 77:869cf507173a 466 ((PERIOD) == RTC_SmoothCalibPeriod_16sec) || \
emilmont 77:869cf507173a 467 ((PERIOD) == RTC_SmoothCalibPeriod_8sec))
emilmont 77:869cf507173a 468
emilmont 77:869cf507173a 469 /**
emilmont 77:869cf507173a 470 * @}
emilmont 77:869cf507173a 471 */
emilmont 77:869cf507173a 472
emilmont 77:869cf507173a 473 /** @defgroup RTC_Smooth_calib_Plus_pulses_Definitions
emilmont 77:869cf507173a 474 * @{
emilmont 77:869cf507173a 475 */
emilmont 77:869cf507173a 476 #define RTC_SmoothCalibPlusPulses_Set ((uint32_t)0x00008000) /*!< The number of RTCCLK pulses added
emilmont 77:869cf507173a 477 during a X -second window = Y - CALM[8:0].
emilmont 77:869cf507173a 478 with Y = 512, 256, 128 when X = 32, 16, 8 */
emilmont 77:869cf507173a 479 #define RTC_SmoothCalibPlusPulses_Reset ((uint32_t)0x00000000) /*!< The number of RTCCLK pulses subbstited
emilmont 77:869cf507173a 480 during a 32-second window = CALM[8:0]. */
emilmont 77:869cf507173a 481 #define IS_RTC_SMOOTH_CALIB_PLUS(PLUS) (((PLUS) == RTC_SmoothCalibPlusPulses_Set) || \
emilmont 77:869cf507173a 482 ((PLUS) == RTC_SmoothCalibPlusPulses_Reset))
emilmont 77:869cf507173a 483
emilmont 77:869cf507173a 484 /**
emilmont 77:869cf507173a 485 * @}
emilmont 77:869cf507173a 486 */
emilmont 77:869cf507173a 487
emilmont 77:869cf507173a 488 /** @defgroup RTC_Smooth_calib_Minus_pulses_Definitions
emilmont 77:869cf507173a 489 * @{
emilmont 77:869cf507173a 490 */
emilmont 77:869cf507173a 491 #define IS_RTC_SMOOTH_CALIB_MINUS(VALUE) ((VALUE) <= 0x000001FF)
emilmont 77:869cf507173a 492
emilmont 77:869cf507173a 493 /**
emilmont 77:869cf507173a 494 * @}
emilmont 77:869cf507173a 495 */
emilmont 77:869cf507173a 496
emilmont 77:869cf507173a 497 /** @defgroup RTC_DayLightSaving_Definitions
emilmont 77:869cf507173a 498 * @{
emilmont 77:869cf507173a 499 */
emilmont 77:869cf507173a 500 #define RTC_DayLightSaving_SUB1H ((uint32_t)0x00020000)
emilmont 77:869cf507173a 501 #define RTC_DayLightSaving_ADD1H ((uint32_t)0x00010000)
emilmont 77:869cf507173a 502 #define IS_RTC_DAYLIGHT_SAVING(SAVE) (((SAVE) == RTC_DayLightSaving_SUB1H) || \
emilmont 77:869cf507173a 503 ((SAVE) == RTC_DayLightSaving_ADD1H))
emilmont 77:869cf507173a 504
emilmont 77:869cf507173a 505 #define RTC_StoreOperation_Reset ((uint32_t)0x00000000)
emilmont 77:869cf507173a 506 #define RTC_StoreOperation_Set ((uint32_t)0x00040000)
emilmont 77:869cf507173a 507 #define IS_RTC_STORE_OPERATION(OPERATION) (((OPERATION) == RTC_StoreOperation_Reset) || \
emilmont 77:869cf507173a 508 ((OPERATION) == RTC_StoreOperation_Set))
emilmont 77:869cf507173a 509 /**
emilmont 77:869cf507173a 510 * @}
emilmont 77:869cf507173a 511 */
emilmont 77:869cf507173a 512
emilmont 77:869cf507173a 513 /** @defgroup RTC_Tamper_Trigger_Definitions
emilmont 77:869cf507173a 514 * @{
emilmont 77:869cf507173a 515 */
emilmont 77:869cf507173a 516 #define RTC_TamperTrigger_RisingEdge ((uint32_t)0x00000000)
emilmont 77:869cf507173a 517 #define RTC_TamperTrigger_FallingEdge ((uint32_t)0x00000001)
emilmont 77:869cf507173a 518 #define RTC_TamperTrigger_LowLevel ((uint32_t)0x00000000)
emilmont 77:869cf507173a 519 #define RTC_TamperTrigger_HighLevel ((uint32_t)0x00000001)
emilmont 77:869cf507173a 520 #define IS_RTC_TAMPER_TRIGGER(TRIGGER) (((TRIGGER) == RTC_TamperTrigger_RisingEdge) || \
emilmont 77:869cf507173a 521 ((TRIGGER) == RTC_TamperTrigger_FallingEdge) || \
emilmont 77:869cf507173a 522 ((TRIGGER) == RTC_TamperTrigger_LowLevel) || \
emilmont 77:869cf507173a 523 ((TRIGGER) == RTC_TamperTrigger_HighLevel))
emilmont 77:869cf507173a 524
emilmont 77:869cf507173a 525 /**
emilmont 77:869cf507173a 526 * @}
emilmont 77:869cf507173a 527 */
emilmont 77:869cf507173a 528
emilmont 77:869cf507173a 529 /** @defgroup RTC_Tamper_Filter_Definitions
emilmont 77:869cf507173a 530 * @{
emilmont 77:869cf507173a 531 */
emilmont 77:869cf507173a 532 #define RTC_TamperFilter_Disable ((uint32_t)0x00000000) /*!< Tamper filter is disabled */
emilmont 77:869cf507173a 533
emilmont 77:869cf507173a 534 #define RTC_TamperFilter_2Sample ((uint32_t)0x00000800) /*!< Tamper is activated after 2
emilmont 77:869cf507173a 535 consecutive samples at the active level */
emilmont 77:869cf507173a 536 #define RTC_TamperFilter_4Sample ((uint32_t)0x00001000) /*!< Tamper is activated after 4
emilmont 77:869cf507173a 537 consecutive samples at the active level */
emilmont 77:869cf507173a 538 #define RTC_TamperFilter_8Sample ((uint32_t)0x00001800) /*!< Tamper is activated after 8
emilmont 77:869cf507173a 539 consecutive samples at the active leve. */
emilmont 77:869cf507173a 540 #define IS_RTC_TAMPER_FILTER(FILTER) (((FILTER) == RTC_TamperFilter_Disable) || \
emilmont 77:869cf507173a 541 ((FILTER) == RTC_TamperFilter_2Sample) || \
emilmont 77:869cf507173a 542 ((FILTER) == RTC_TamperFilter_4Sample) || \
emilmont 77:869cf507173a 543 ((FILTER) == RTC_TamperFilter_8Sample))
emilmont 77:869cf507173a 544 /**
emilmont 77:869cf507173a 545 * @}
emilmont 77:869cf507173a 546 */
emilmont 77:869cf507173a 547
emilmont 77:869cf507173a 548 /** @defgroup RTC_Tamper_Sampling_Frequencies_Definitions
emilmont 77:869cf507173a 549 * @{
emilmont 77:869cf507173a 550 */
emilmont 77:869cf507173a 551 #define RTC_TamperSamplingFreq_RTCCLK_Div32768 ((uint32_t)0x00000000) /*!< Each of the tamper inputs are sampled
emilmont 77:869cf507173a 552 with a frequency = RTCCLK / 32768 */
emilmont 77:869cf507173a 553 #define RTC_TamperSamplingFreq_RTCCLK_Div16384 ((uint32_t)0x000000100) /*!< Each of the tamper inputs are sampled
emilmont 77:869cf507173a 554 with a frequency = RTCCLK / 16384 */
emilmont 77:869cf507173a 555 #define RTC_TamperSamplingFreq_RTCCLK_Div8192 ((uint32_t)0x00000200) /*!< Each of the tamper inputs are sampled
emilmont 77:869cf507173a 556 with a frequency = RTCCLK / 8192 */
emilmont 77:869cf507173a 557 #define RTC_TamperSamplingFreq_RTCCLK_Div4096 ((uint32_t)0x00000300) /*!< Each of the tamper inputs are sampled
emilmont 77:869cf507173a 558 with a frequency = RTCCLK / 4096 */
emilmont 77:869cf507173a 559 #define RTC_TamperSamplingFreq_RTCCLK_Div2048 ((uint32_t)0x00000400) /*!< Each of the tamper inputs are sampled
emilmont 77:869cf507173a 560 with a frequency = RTCCLK / 2048 */
emilmont 77:869cf507173a 561 #define RTC_TamperSamplingFreq_RTCCLK_Div1024 ((uint32_t)0x00000500) /*!< Each of the tamper inputs are sampled
emilmont 77:869cf507173a 562 with a frequency = RTCCLK / 1024 */
emilmont 77:869cf507173a 563 #define RTC_TamperSamplingFreq_RTCCLK_Div512 ((uint32_t)0x00000600) /*!< Each of the tamper inputs are sampled
emilmont 77:869cf507173a 564 with a frequency = RTCCLK / 512 */
emilmont 77:869cf507173a 565 #define RTC_TamperSamplingFreq_RTCCLK_Div256 ((uint32_t)0x00000700) /*!< Each of the tamper inputs are sampled
emilmont 77:869cf507173a 566 with a frequency = RTCCLK / 256 */
emilmont 77:869cf507173a 567 #define IS_RTC_TAMPER_SAMPLING_FREQ(FREQ) (((FREQ) ==RTC_TamperSamplingFreq_RTCCLK_Div32768) || \
emilmont 77:869cf507173a 568 ((FREQ) ==RTC_TamperSamplingFreq_RTCCLK_Div16384) || \
emilmont 77:869cf507173a 569 ((FREQ) ==RTC_TamperSamplingFreq_RTCCLK_Div8192) || \
emilmont 77:869cf507173a 570 ((FREQ) ==RTC_TamperSamplingFreq_RTCCLK_Div4096) || \
emilmont 77:869cf507173a 571 ((FREQ) ==RTC_TamperSamplingFreq_RTCCLK_Div2048) || \
emilmont 77:869cf507173a 572 ((FREQ) ==RTC_TamperSamplingFreq_RTCCLK_Div1024) || \
emilmont 77:869cf507173a 573 ((FREQ) ==RTC_TamperSamplingFreq_RTCCLK_Div512) || \
emilmont 77:869cf507173a 574 ((FREQ) ==RTC_TamperSamplingFreq_RTCCLK_Div256))
emilmont 77:869cf507173a 575
emilmont 77:869cf507173a 576 /**
emilmont 77:869cf507173a 577 * @}
emilmont 77:869cf507173a 578 */
emilmont 77:869cf507173a 579
emilmont 77:869cf507173a 580 /** @defgroup RTC_Tamper_Pin_Precharge_Duration_Definitions
emilmont 77:869cf507173a 581 * @{
emilmont 77:869cf507173a 582 */
emilmont 77:869cf507173a 583 #define RTC_TamperPrechargeDuration_1RTCCLK ((uint32_t)0x00000000) /*!< Tamper pins are pre-charged before
emilmont 77:869cf507173a 584 sampling during 1 RTCCLK cycle */
emilmont 77:869cf507173a 585 #define RTC_TamperPrechargeDuration_2RTCCLK ((uint32_t)0x00002000) /*!< Tamper pins are pre-charged before
emilmont 77:869cf507173a 586 sampling during 2 RTCCLK cycles */
emilmont 77:869cf507173a 587 #define RTC_TamperPrechargeDuration_4RTCCLK ((uint32_t)0x00004000) /*!< Tamper pins are pre-charged before
emilmont 77:869cf507173a 588 sampling during 4 RTCCLK cycles */
emilmont 77:869cf507173a 589 #define RTC_TamperPrechargeDuration_8RTCCLK ((uint32_t)0x00006000) /*!< Tamper pins are pre-charged before
emilmont 77:869cf507173a 590 sampling during 8 RTCCLK cycles */
emilmont 77:869cf507173a 591
emilmont 77:869cf507173a 592 #define IS_RTC_TAMPER_PRECHARGE_DURATION(DURATION) (((DURATION) == RTC_TamperPrechargeDuration_1RTCCLK) || \
emilmont 77:869cf507173a 593 ((DURATION) == RTC_TamperPrechargeDuration_2RTCCLK) || \
emilmont 77:869cf507173a 594 ((DURATION) == RTC_TamperPrechargeDuration_4RTCCLK) || \
emilmont 77:869cf507173a 595 ((DURATION) == RTC_TamperPrechargeDuration_8RTCCLK))
emilmont 77:869cf507173a 596 /**
emilmont 77:869cf507173a 597 * @}
emilmont 77:869cf507173a 598 */
emilmont 77:869cf507173a 599
emilmont 77:869cf507173a 600 /** @defgroup RTC_Tamper_Pins_Definitions
emilmont 77:869cf507173a 601 * @{
emilmont 77:869cf507173a 602 */
emilmont 77:869cf507173a 603 #define RTC_Tamper_1 RTC_TAFCR_TAMP1E /*!< Tamper detection enable for
emilmont 77:869cf507173a 604 input tamper 1 */
emilmont 77:869cf507173a 605 #define RTC_Tamper_2 RTC_TAFCR_TAMP2E /*!< Tamper detection enable for
emilmont 77:869cf507173a 606 input tamper 2 */
emilmont 77:869cf507173a 607 #define RTC_Tamper_3 RTC_TAFCR_TAMP3E /*!< Tamper detection enable for
emilmont 77:869cf507173a 608 input tamper 3 */
emilmont 77:869cf507173a 609
emilmont 77:869cf507173a 610 #define IS_RTC_TAMPER(TAMPER) ((((TAMPER) & (uint32_t)0xFFFFFFD6) == 0x00) && ((TAMPER) != (uint32_t)RESET))
emilmont 77:869cf507173a 611
emilmont 77:869cf507173a 612
emilmont 77:869cf507173a 613 /**
emilmont 77:869cf507173a 614 * @}
emilmont 77:869cf507173a 615 */
emilmont 77:869cf507173a 616
emilmont 77:869cf507173a 617 /** @defgroup RTC_Output_Type_ALARM_OUT
emilmont 77:869cf507173a 618 * @{
emilmont 77:869cf507173a 619 */
emilmont 77:869cf507173a 620 #define RTC_OutputType_OpenDrain ((uint32_t)0x00000000)
emilmont 77:869cf507173a 621 #define RTC_OutputType_PushPull ((uint32_t)0x00040000)
emilmont 77:869cf507173a 622 #define IS_RTC_OUTPUT_TYPE(TYPE) (((TYPE) == RTC_OutputType_OpenDrain) || \
emilmont 77:869cf507173a 623 ((TYPE) == RTC_OutputType_PushPull))
emilmont 77:869cf507173a 624
emilmont 77:869cf507173a 625 /**
emilmont 77:869cf507173a 626 * @}
emilmont 77:869cf507173a 627 */
emilmont 77:869cf507173a 628
emilmont 77:869cf507173a 629 /** @defgroup RTC_Add_1_Second_Parameter_Definitions
emilmont 77:869cf507173a 630 * @{
emilmont 77:869cf507173a 631 */
emilmont 77:869cf507173a 632 #define RTC_ShiftAdd1S_Reset ((uint32_t)0x00000000)
emilmont 77:869cf507173a 633 #define RTC_ShiftAdd1S_Set ((uint32_t)0x80000000)
emilmont 77:869cf507173a 634 #define IS_RTC_SHIFT_ADD1S(SEL) (((SEL) == RTC_ShiftAdd1S_Reset) || \
emilmont 77:869cf507173a 635 ((SEL) == RTC_ShiftAdd1S_Set))
emilmont 77:869cf507173a 636 /**
emilmont 77:869cf507173a 637 * @}
emilmont 77:869cf507173a 638 */
emilmont 77:869cf507173a 639
emilmont 77:869cf507173a 640 /** @defgroup RTC_Substract_Fraction_Of_Second_Value
emilmont 77:869cf507173a 641 * @{
emilmont 77:869cf507173a 642 */
emilmont 77:869cf507173a 643 #define IS_RTC_SHIFT_SUBFS(FS) ((FS) <= 0x00007FFF)
emilmont 77:869cf507173a 644
emilmont 77:869cf507173a 645 /**
emilmont 77:869cf507173a 646 * @}
emilmont 77:869cf507173a 647 */
emilmont 77:869cf507173a 648
emilmont 77:869cf507173a 649 /** @defgroup RTC_Backup_Registers_Definitions
emilmont 77:869cf507173a 650 * @{
emilmont 77:869cf507173a 651 */
emilmont 77:869cf507173a 652
emilmont 77:869cf507173a 653 #define RTC_BKP_DR0 ((uint32_t)0x00000000)
emilmont 77:869cf507173a 654 #define RTC_BKP_DR1 ((uint32_t)0x00000001)
emilmont 77:869cf507173a 655 #define RTC_BKP_DR2 ((uint32_t)0x00000002)
emilmont 77:869cf507173a 656 #define RTC_BKP_DR3 ((uint32_t)0x00000003)
emilmont 77:869cf507173a 657 #define RTC_BKP_DR4 ((uint32_t)0x00000004)
emilmont 77:869cf507173a 658 #define RTC_BKP_DR5 ((uint32_t)0x00000005)
emilmont 77:869cf507173a 659 #define RTC_BKP_DR6 ((uint32_t)0x00000006)
emilmont 77:869cf507173a 660 #define RTC_BKP_DR7 ((uint32_t)0x00000007)
emilmont 77:869cf507173a 661 #define RTC_BKP_DR8 ((uint32_t)0x00000008)
emilmont 77:869cf507173a 662 #define RTC_BKP_DR9 ((uint32_t)0x00000009)
emilmont 77:869cf507173a 663 #define RTC_BKP_DR10 ((uint32_t)0x0000000A)
emilmont 77:869cf507173a 664 #define RTC_BKP_DR11 ((uint32_t)0x0000000B)
emilmont 77:869cf507173a 665 #define RTC_BKP_DR12 ((uint32_t)0x0000000C)
emilmont 77:869cf507173a 666 #define RTC_BKP_DR13 ((uint32_t)0x0000000D)
emilmont 77:869cf507173a 667 #define RTC_BKP_DR14 ((uint32_t)0x0000000E)
emilmont 77:869cf507173a 668 #define RTC_BKP_DR15 ((uint32_t)0x0000000F)
emilmont 77:869cf507173a 669 #define RTC_BKP_DR16 ((uint32_t)0x00000010)
emilmont 77:869cf507173a 670 #define RTC_BKP_DR17 ((uint32_t)0x00000011)
emilmont 77:869cf507173a 671 #define RTC_BKP_DR18 ((uint32_t)0x00000012)
emilmont 77:869cf507173a 672 #define RTC_BKP_DR19 ((uint32_t)0x00000013)
emilmont 77:869cf507173a 673 #define RTC_BKP_DR20 ((uint32_t)0x00000014)
emilmont 77:869cf507173a 674 #define RTC_BKP_DR21 ((uint32_t)0x00000015)
emilmont 77:869cf507173a 675 #define RTC_BKP_DR22 ((uint32_t)0x00000016)
emilmont 77:869cf507173a 676 #define RTC_BKP_DR23 ((uint32_t)0x00000017)
emilmont 77:869cf507173a 677 #define RTC_BKP_DR24 ((uint32_t)0x00000018)
emilmont 77:869cf507173a 678 #define RTC_BKP_DR25 ((uint32_t)0x00000019)
emilmont 77:869cf507173a 679 #define RTC_BKP_DR26 ((uint32_t)0x0000001A)
emilmont 77:869cf507173a 680 #define RTC_BKP_DR27 ((uint32_t)0x0000001B)
emilmont 77:869cf507173a 681 #define RTC_BKP_DR28 ((uint32_t)0x0000001C)
emilmont 77:869cf507173a 682 #define RTC_BKP_DR29 ((uint32_t)0x0000001D)
emilmont 77:869cf507173a 683 #define RTC_BKP_DR30 ((uint32_t)0x0000001E)
emilmont 77:869cf507173a 684 #define RTC_BKP_DR31 ((uint32_t)0x0000001F)
emilmont 77:869cf507173a 685 #define IS_RTC_BKP(BKP) (((BKP) == RTC_BKP_DR0) || \
emilmont 77:869cf507173a 686 ((BKP) == RTC_BKP_DR1) || \
emilmont 77:869cf507173a 687 ((BKP) == RTC_BKP_DR2) || \
emilmont 77:869cf507173a 688 ((BKP) == RTC_BKP_DR3) || \
emilmont 77:869cf507173a 689 ((BKP) == RTC_BKP_DR4) || \
emilmont 77:869cf507173a 690 ((BKP) == RTC_BKP_DR5) || \
emilmont 77:869cf507173a 691 ((BKP) == RTC_BKP_DR6) || \
emilmont 77:869cf507173a 692 ((BKP) == RTC_BKP_DR7) || \
emilmont 77:869cf507173a 693 ((BKP) == RTC_BKP_DR8) || \
emilmont 77:869cf507173a 694 ((BKP) == RTC_BKP_DR9) || \
emilmont 77:869cf507173a 695 ((BKP) == RTC_BKP_DR10) || \
emilmont 77:869cf507173a 696 ((BKP) == RTC_BKP_DR11) || \
emilmont 77:869cf507173a 697 ((BKP) == RTC_BKP_DR12) || \
emilmont 77:869cf507173a 698 ((BKP) == RTC_BKP_DR13) || \
emilmont 77:869cf507173a 699 ((BKP) == RTC_BKP_DR14) || \
emilmont 77:869cf507173a 700 ((BKP) == RTC_BKP_DR15) || \
emilmont 77:869cf507173a 701 ((BKP) == RTC_BKP_DR16) || \
emilmont 77:869cf507173a 702 ((BKP) == RTC_BKP_DR17) || \
emilmont 77:869cf507173a 703 ((BKP) == RTC_BKP_DR18) || \
emilmont 77:869cf507173a 704 ((BKP) == RTC_BKP_DR19) || \
emilmont 77:869cf507173a 705 ((BKP) == RTC_BKP_DR20) || \
emilmont 77:869cf507173a 706 ((BKP) == RTC_BKP_DR21) || \
emilmont 77:869cf507173a 707 ((BKP) == RTC_BKP_DR22) || \
emilmont 77:869cf507173a 708 ((BKP) == RTC_BKP_DR23) || \
emilmont 77:869cf507173a 709 ((BKP) == RTC_BKP_DR24) || \
emilmont 77:869cf507173a 710 ((BKP) == RTC_BKP_DR25) || \
emilmont 77:869cf507173a 711 ((BKP) == RTC_BKP_DR26) || \
emilmont 77:869cf507173a 712 ((BKP) == RTC_BKP_DR27) || \
emilmont 77:869cf507173a 713 ((BKP) == RTC_BKP_DR28) || \
emilmont 77:869cf507173a 714 ((BKP) == RTC_BKP_DR29) || \
emilmont 77:869cf507173a 715 ((BKP) == RTC_BKP_DR30) || \
emilmont 77:869cf507173a 716 ((BKP) == RTC_BKP_DR31))
emilmont 77:869cf507173a 717 /**
emilmont 77:869cf507173a 718 * @}
emilmont 77:869cf507173a 719 */
emilmont 77:869cf507173a 720
emilmont 77:869cf507173a 721 /** @defgroup RTC_Input_parameter_format_definitions
emilmont 77:869cf507173a 722 * @{
emilmont 77:869cf507173a 723 */
emilmont 77:869cf507173a 724 #define RTC_Format_BIN ((uint32_t)0x000000000)
emilmont 77:869cf507173a 725 #define RTC_Format_BCD ((uint32_t)0x000000001)
emilmont 77:869cf507173a 726 #define IS_RTC_FORMAT(FORMAT) (((FORMAT) == RTC_Format_BIN) || ((FORMAT) == RTC_Format_BCD))
emilmont 77:869cf507173a 727
emilmont 77:869cf507173a 728 /**
emilmont 77:869cf507173a 729 * @}
emilmont 77:869cf507173a 730 */
emilmont 77:869cf507173a 731
emilmont 77:869cf507173a 732 /** @defgroup RTC_Flags_Definitions
emilmont 77:869cf507173a 733 * @{
emilmont 77:869cf507173a 734 */
emilmont 77:869cf507173a 735 #define RTC_FLAG_RECALPF ((uint32_t)0x00010000)
emilmont 77:869cf507173a 736 #define RTC_FLAG_TAMP3F ((uint32_t)0x00008000)
emilmont 77:869cf507173a 737 #define RTC_FLAG_TAMP2F ((uint32_t)0x00004000)
emilmont 77:869cf507173a 738 #define RTC_FLAG_TAMP1F ((uint32_t)0x00002000)
emilmont 77:869cf507173a 739 #define RTC_FLAG_TSOVF ((uint32_t)0x00001000)
emilmont 77:869cf507173a 740 #define RTC_FLAG_TSF ((uint32_t)0x00000800)
emilmont 77:869cf507173a 741 #define RTC_FLAG_WUTF ((uint32_t)0x00000400)
emilmont 77:869cf507173a 742 #define RTC_FLAG_ALRBF ((uint32_t)0x00000200)
emilmont 77:869cf507173a 743 #define RTC_FLAG_ALRAF ((uint32_t)0x00000100)
emilmont 77:869cf507173a 744 #define RTC_FLAG_INITF ((uint32_t)0x00000040)
emilmont 77:869cf507173a 745 #define RTC_FLAG_RSF ((uint32_t)0x00000020)
emilmont 77:869cf507173a 746 #define RTC_FLAG_INITS ((uint32_t)0x00000010)
emilmont 77:869cf507173a 747 #define RTC_FLAG_SHPF ((uint32_t)0x00000008)
emilmont 77:869cf507173a 748 #define RTC_FLAG_WUTWF ((uint32_t)0x00000004)
emilmont 77:869cf507173a 749 #define RTC_FLAG_ALRBWF ((uint32_t)0x00000002)
emilmont 77:869cf507173a 750 #define RTC_FLAG_ALRAWF ((uint32_t)0x00000001)
emilmont 77:869cf507173a 751 #define IS_RTC_GET_FLAG(FLAG) (((FLAG) == RTC_FLAG_TSOVF) || ((FLAG) == RTC_FLAG_TSF) || \
emilmont 77:869cf507173a 752 ((FLAG) == RTC_FLAG_WUTF) || ((FLAG) == RTC_FLAG_ALRBF) || \
emilmont 77:869cf507173a 753 ((FLAG) == RTC_FLAG_ALRAF) || ((FLAG) == RTC_FLAG_INITF) || \
emilmont 77:869cf507173a 754 ((FLAG) == RTC_FLAG_RSF) || ((FLAG) == RTC_FLAG_WUTWF) || \
emilmont 77:869cf507173a 755 ((FLAG) == RTC_FLAG_ALRBWF) || ((FLAG) == RTC_FLAG_ALRAWF) || \
emilmont 77:869cf507173a 756 ((FLAG) == RTC_FLAG_TAMP1F) || ((FLAG) == RTC_FLAG_TAMP2F) || \
emilmont 77:869cf507173a 757 ((FLAG) == RTC_FLAG_TAMP3F) || ((FLAG) == RTC_FLAG_RECALPF) || \
emilmont 77:869cf507173a 758 ((FLAG) == RTC_FLAG_SHPF)|| ((FLAG) == RTC_FLAG_INITS))
emilmont 77:869cf507173a 759 #define IS_RTC_CLEAR_FLAG(FLAG) (((FLAG) != (uint32_t)RESET) && (((FLAG) & 0xFFFF00DF) == (uint32_t)RESET))
emilmont 77:869cf507173a 760
emilmont 77:869cf507173a 761 /**
emilmont 77:869cf507173a 762 * @}
emilmont 77:869cf507173a 763 */
emilmont 77:869cf507173a 764
emilmont 77:869cf507173a 765 /** @defgroup RTC_Interrupts_Definitions
emilmont 77:869cf507173a 766 * @{
emilmont 77:869cf507173a 767 */
emilmont 77:869cf507173a 768 #define RTC_IT_TS ((uint32_t)0x00008000)
emilmont 77:869cf507173a 769 #define RTC_IT_WUT ((uint32_t)0x00004000)
emilmont 77:869cf507173a 770 #define RTC_IT_ALRB ((uint32_t)0x00002000)
emilmont 77:869cf507173a 771 #define RTC_IT_ALRA ((uint32_t)0x00001000)
emilmont 77:869cf507173a 772 #define RTC_IT_TAMP ((uint32_t)0x00000004) /* Used only to Enable the Tamper Interrupt */
emilmont 77:869cf507173a 773 #define RTC_IT_TAMP1 ((uint32_t)0x00020000)
emilmont 77:869cf507173a 774 #define RTC_IT_TAMP2 ((uint32_t)0x00040000)
emilmont 77:869cf507173a 775 #define RTC_IT_TAMP3 ((uint32_t)0x00080000)
emilmont 77:869cf507173a 776
emilmont 77:869cf507173a 777
emilmont 77:869cf507173a 778 #define IS_RTC_CONFIG_IT(IT) (((IT) != (uint32_t)RESET) && (((IT) & 0xFFFF0FFB) == (uint32_t)RESET))
emilmont 77:869cf507173a 779 #define IS_RTC_GET_IT(IT) (((IT) == RTC_IT_TS) || ((IT) == RTC_IT_WUT) || \
emilmont 77:869cf507173a 780 ((IT) == RTC_IT_ALRB) || ((IT) == RTC_IT_ALRA) || \
emilmont 77:869cf507173a 781 ((IT) == RTC_IT_TAMP1) || ((IT) == RTC_IT_TAMP2) || \
emilmont 77:869cf507173a 782 ((IT) == RTC_IT_TAMP3))
emilmont 77:869cf507173a 783 #define IS_RTC_CLEAR_IT(IT) (((IT) != (uint32_t)RESET) && (((IT) & 0xFFF10FFF) == (uint32_t)RESET))
emilmont 77:869cf507173a 784
emilmont 77:869cf507173a 785 /**
emilmont 77:869cf507173a 786 * @}
emilmont 77:869cf507173a 787 */
emilmont 77:869cf507173a 788
emilmont 77:869cf507173a 789 /** @defgroup RTC_Legacy
emilmont 77:869cf507173a 790 * @{
emilmont 77:869cf507173a 791 */
emilmont 77:869cf507173a 792 #define RTC_DigitalCalibConfig RTC_CoarseCalibConfig
emilmont 77:869cf507173a 793 #define RTC_DigitalCalibCmd RTC_CoarseCalibCmd
emilmont 77:869cf507173a 794
emilmont 77:869cf507173a 795 /**
emilmont 77:869cf507173a 796 * @}
emilmont 77:869cf507173a 797 */
emilmont 77:869cf507173a 798
emilmont 77:869cf507173a 799 /**
emilmont 77:869cf507173a 800 * @}
emilmont 77:869cf507173a 801 */
emilmont 77:869cf507173a 802
emilmont 77:869cf507173a 803
emilmont 77:869cf507173a 804 /* Exported macro ------------------------------------------------------------*/
emilmont 77:869cf507173a 805 /* Exported functions ------------------------------------------------------- */
emilmont 77:869cf507173a 806
emilmont 77:869cf507173a 807 /* Function used to set the RTC configuration to the default reset state *****/
emilmont 77:869cf507173a 808 ErrorStatus RTC_DeInit(void);
emilmont 77:869cf507173a 809
emilmont 77:869cf507173a 810
emilmont 77:869cf507173a 811 /* Initialization and Configuration functions *********************************/
emilmont 77:869cf507173a 812 ErrorStatus RTC_Init(RTC_InitTypeDef* RTC_InitStruct);
emilmont 77:869cf507173a 813 void RTC_StructInit(RTC_InitTypeDef* RTC_InitStruct);
emilmont 77:869cf507173a 814 void RTC_WriteProtectionCmd(FunctionalState NewState);
emilmont 77:869cf507173a 815 ErrorStatus RTC_EnterInitMode(void);
emilmont 77:869cf507173a 816 void RTC_ExitInitMode(void);
emilmont 77:869cf507173a 817 ErrorStatus RTC_WaitForSynchro(void);
emilmont 77:869cf507173a 818 ErrorStatus RTC_RefClockCmd(FunctionalState NewState);
emilmont 77:869cf507173a 819 void RTC_BypassShadowCmd(FunctionalState NewState);
emilmont 77:869cf507173a 820
emilmont 77:869cf507173a 821 /* Time and Date configuration functions **************************************/
emilmont 77:869cf507173a 822 ErrorStatus RTC_SetTime(uint32_t RTC_Format, RTC_TimeTypeDef* RTC_TimeStruct);
emilmont 77:869cf507173a 823 void RTC_TimeStructInit(RTC_TimeTypeDef* RTC_TimeStruct);
emilmont 77:869cf507173a 824 void RTC_GetTime(uint32_t RTC_Format, RTC_TimeTypeDef* RTC_TimeStruct);
emilmont 77:869cf507173a 825 uint32_t RTC_GetSubSecond(void);
emilmont 77:869cf507173a 826 ErrorStatus RTC_SetDate(uint32_t RTC_Format, RTC_DateTypeDef* RTC_DateStruct);
emilmont 77:869cf507173a 827 void RTC_DateStructInit(RTC_DateTypeDef* RTC_DateStruct);
emilmont 77:869cf507173a 828 void RTC_GetDate(uint32_t RTC_Format, RTC_DateTypeDef* RTC_DateStruct);
emilmont 77:869cf507173a 829
emilmont 77:869cf507173a 830 /* Alarms (Alarm A and Alarm B) configuration functions **********************/
emilmont 77:869cf507173a 831 void RTC_SetAlarm(uint32_t RTC_Format, uint32_t RTC_Alarm, RTC_AlarmTypeDef* RTC_AlarmStruct);
emilmont 77:869cf507173a 832 void RTC_AlarmStructInit(RTC_AlarmTypeDef* RTC_AlarmStruct);
emilmont 77:869cf507173a 833 void RTC_GetAlarm(uint32_t RTC_Format, uint32_t RTC_Alarm, RTC_AlarmTypeDef* RTC_AlarmStruct);
emilmont 77:869cf507173a 834 ErrorStatus RTC_AlarmCmd(uint32_t RTC_Alarm, FunctionalState NewState);
emilmont 77:869cf507173a 835 void RTC_AlarmSubSecondConfig(uint32_t RTC_Alarm, uint32_t RTC_AlarmSubSecondValue, uint32_t RTC_AlarmSubSecondMask);
emilmont 77:869cf507173a 836 uint32_t RTC_GetAlarmSubSecond(uint32_t RTC_Alarm);
emilmont 77:869cf507173a 837
emilmont 77:869cf507173a 838 /* WakeUp Timer configuration functions ***************************************/
emilmont 77:869cf507173a 839 void RTC_WakeUpClockConfig(uint32_t RTC_WakeUpClock);
emilmont 77:869cf507173a 840 void RTC_SetWakeUpCounter(uint32_t RTC_WakeUpCounter);
emilmont 77:869cf507173a 841 uint32_t RTC_GetWakeUpCounter(void);
emilmont 77:869cf507173a 842 ErrorStatus RTC_WakeUpCmd(FunctionalState NewState);
emilmont 77:869cf507173a 843
emilmont 77:869cf507173a 844 /* Daylight Saving configuration functions ************************************/
emilmont 77:869cf507173a 845 void RTC_DayLightSavingConfig(uint32_t RTC_DayLightSaving, uint32_t RTC_StoreOperation);
emilmont 77:869cf507173a 846 uint32_t RTC_GetStoreOperation(void);
emilmont 77:869cf507173a 847
emilmont 77:869cf507173a 848 /* Output pin Configuration function ******************************************/
emilmont 77:869cf507173a 849 void RTC_OutputConfig(uint32_t RTC_Output, uint32_t RTC_OutputPolarity);
emilmont 77:869cf507173a 850
emilmont 77:869cf507173a 851 /* Coarse and Smooth Calibration configuration functions **********************/
emilmont 77:869cf507173a 852 ErrorStatus RTC_CoarseCalibConfig(uint32_t RTC_CalibSign, uint32_t Value);
emilmont 77:869cf507173a 853 ErrorStatus RTC_CoarseCalibCmd(FunctionalState NewState);
emilmont 77:869cf507173a 854 void RTC_CalibOutputCmd(FunctionalState NewState);
emilmont 77:869cf507173a 855 void RTC_CalibOutputConfig(uint32_t RTC_CalibOutput);
emilmont 77:869cf507173a 856 ErrorStatus RTC_SmoothCalibConfig(uint32_t RTC_SmoothCalibPeriod,
emilmont 77:869cf507173a 857 uint32_t RTC_SmoothCalibPlusPulses,
emilmont 77:869cf507173a 858 uint32_t RTC_SmouthCalibMinusPulsesValue);
emilmont 77:869cf507173a 859
emilmont 77:869cf507173a 860 /* TimeStamp configuration functions ******************************************/
emilmont 77:869cf507173a 861 void RTC_TimeStampCmd(uint32_t RTC_TimeStampEdge, FunctionalState NewState);
emilmont 77:869cf507173a 862 void RTC_GetTimeStamp(uint32_t RTC_Format, RTC_TimeTypeDef* RTC_StampTimeStruct,
emilmont 77:869cf507173a 863 RTC_DateTypeDef* RTC_StampDateStruct);
emilmont 77:869cf507173a 864 uint32_t RTC_GetTimeStampSubSecond(void);
emilmont 77:869cf507173a 865
emilmont 77:869cf507173a 866 /* Tampers configuration functions ********************************************/
emilmont 77:869cf507173a 867 void RTC_TamperTriggerConfig(uint32_t RTC_Tamper, uint32_t RTC_TamperTrigger);
emilmont 77:869cf507173a 868 void RTC_TamperCmd(uint32_t RTC_Tamper, FunctionalState NewState);
emilmont 77:869cf507173a 869 void RTC_TamperFilterConfig(uint32_t RTC_TamperFilter);
emilmont 77:869cf507173a 870 void RTC_TamperSamplingFreqConfig(uint32_t RTC_TamperSamplingFreq);
emilmont 77:869cf507173a 871 void RTC_TamperPinsPrechargeDuration(uint32_t RTC_TamperPrechargeDuration);
emilmont 77:869cf507173a 872 void RTC_TimeStampOnTamperDetectionCmd(FunctionalState NewState);
emilmont 77:869cf507173a 873 void RTC_TamperPullUpCmd(FunctionalState NewState);
emilmont 77:869cf507173a 874
emilmont 77:869cf507173a 875 /* Backup Data Registers configuration functions ******************************/
emilmont 77:869cf507173a 876 void RTC_WriteBackupRegister(uint32_t RTC_BKP_DR, uint32_t Data);
emilmont 77:869cf507173a 877 uint32_t RTC_ReadBackupRegister(uint32_t RTC_BKP_DR);
emilmont 77:869cf507173a 878
emilmont 77:869cf507173a 879 /* Output Type Config configuration functions *********************************/
emilmont 77:869cf507173a 880 void RTC_OutputTypeConfig(uint32_t RTC_OutputType);
emilmont 77:869cf507173a 881
emilmont 77:869cf507173a 882 /* RTC_Shift_control_synchonisation_functions *********************************/
emilmont 77:869cf507173a 883 ErrorStatus RTC_SynchroShiftConfig(uint32_t RTC_ShiftAdd1S, uint32_t RTC_ShiftSubFS);
emilmont 77:869cf507173a 884
emilmont 77:869cf507173a 885 /* Interrupts and flags management functions **********************************/
emilmont 77:869cf507173a 886 void RTC_ITConfig(uint32_t RTC_IT, FunctionalState NewState);
emilmont 77:869cf507173a 887 FlagStatus RTC_GetFlagStatus(uint32_t RTC_FLAG);
emilmont 77:869cf507173a 888 void RTC_ClearFlag(uint32_t RTC_FLAG);
emilmont 77:869cf507173a 889 ITStatus RTC_GetITStatus(uint32_t RTC_IT);
emilmont 77:869cf507173a 890 void RTC_ClearITPendingBit(uint32_t RTC_IT);
emilmont 77:869cf507173a 891
emilmont 77:869cf507173a 892 #ifdef __cplusplus
emilmont 77:869cf507173a 893 }
emilmont 77:869cf507173a 894 #endif
emilmont 77:869cf507173a 895
emilmont 77:869cf507173a 896 #endif /*__STM32L1xx_RTC_H */
emilmont 77:869cf507173a 897
emilmont 77:869cf507173a 898 /**
emilmont 77:869cf507173a 899 * @}
emilmont 77:869cf507173a 900 */
emilmont 77:869cf507173a 901
emilmont 77:869cf507173a 902 /**
emilmont 77:869cf507173a 903 * @}
emilmont 77:869cf507173a 904 */
emilmont 77:869cf507173a 905
emilmont 77:869cf507173a 906 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/