version_2.0

Dependents:   cc3000_ping_demo_try_2

Fork of mbed by mbed official

Committer:
erezi
Date:
Wed Jun 25 06:08:49 2014 +0000
Revision:
86:4f9a848d74c7
Parent:
81:7d30d6019079
version_2.0

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 77:869cf507173a 1 /**
emilmont 77:869cf507173a 2 ******************************************************************************
emilmont 77:869cf507173a 3 * @file stm32f0xx_i2c.h
emilmont 77:869cf507173a 4 * @author MCD Application Team
emilmont 77:869cf507173a 5 * @version V1.3.0
emilmont 77:869cf507173a 6 * @date 16-January-2014
emilmont 77:869cf507173a 7 * @brief This file contains all the functions prototypes for the I2C firmware
emilmont 77:869cf507173a 8 * library
emilmont 77:869cf507173a 9 ******************************************************************************
emilmont 77:869cf507173a 10 * @attention
emilmont 77:869cf507173a 11 *
bogdanm 81:7d30d6019079 12 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
emilmont 77:869cf507173a 13 *
bogdanm 81:7d30d6019079 14 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 81:7d30d6019079 15 * are permitted provided that the following conditions are met:
bogdanm 81:7d30d6019079 16 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 81:7d30d6019079 17 * this list of conditions and the following disclaimer.
bogdanm 81:7d30d6019079 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 81:7d30d6019079 19 * this list of conditions and the following disclaimer in the documentation
bogdanm 81:7d30d6019079 20 * and/or other materials provided with the distribution.
bogdanm 81:7d30d6019079 21 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 81:7d30d6019079 22 * may be used to endorse or promote products derived from this software
bogdanm 81:7d30d6019079 23 * without specific prior written permission.
emilmont 77:869cf507173a 24 *
bogdanm 81:7d30d6019079 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 81:7d30d6019079 26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 81:7d30d6019079 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 81:7d30d6019079 28 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 81:7d30d6019079 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 81:7d30d6019079 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 81:7d30d6019079 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 81:7d30d6019079 32 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 81:7d30d6019079 33 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 81:7d30d6019079 34 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
emilmont 77:869cf507173a 35 *
emilmont 77:869cf507173a 36 ******************************************************************************
emilmont 77:869cf507173a 37 */
emilmont 77:869cf507173a 38
emilmont 77:869cf507173a 39 /* Define to prevent recursive inclusion -------------------------------------*/
emilmont 77:869cf507173a 40 #ifndef __STM32F0XX_I2C_H
emilmont 77:869cf507173a 41 #define __STM32F0XX_I2C_H
emilmont 77:869cf507173a 42
emilmont 77:869cf507173a 43 #ifdef __cplusplus
emilmont 77:869cf507173a 44 extern "C" {
emilmont 77:869cf507173a 45 #endif
emilmont 77:869cf507173a 46
emilmont 77:869cf507173a 47 /* Includes ------------------------------------------------------------------*/
emilmont 77:869cf507173a 48 #include "stm32f0xx.h"
emilmont 77:869cf507173a 49
emilmont 77:869cf507173a 50 /** @addtogroup STM32F0xx_StdPeriph_Driver
emilmont 77:869cf507173a 51 * @{
emilmont 77:869cf507173a 52 */
emilmont 77:869cf507173a 53
emilmont 77:869cf507173a 54 /** @addtogroup I2C
emilmont 77:869cf507173a 55 * @{
emilmont 77:869cf507173a 56 */
emilmont 77:869cf507173a 57
emilmont 77:869cf507173a 58 /* Exported types ------------------------------------------------------------*/
emilmont 77:869cf507173a 59
emilmont 77:869cf507173a 60 /**
emilmont 77:869cf507173a 61 * @brief I2C Init structure definition
emilmont 77:869cf507173a 62 */
emilmont 77:869cf507173a 63
emilmont 77:869cf507173a 64 typedef struct
emilmont 77:869cf507173a 65 {
emilmont 77:869cf507173a 66 uint32_t I2C_Timing; /*!< Specifies the I2C_TIMINGR_register value.
emilmont 77:869cf507173a 67 This parameter must be set by referring to I2C_Timing_Config_Tool*/
emilmont 77:869cf507173a 68
emilmont 77:869cf507173a 69 uint32_t I2C_AnalogFilter; /*!< Enables or disables analog noise filter.
emilmont 77:869cf507173a 70 This parameter can be a value of @ref I2C_Analog_Filter*/
emilmont 77:869cf507173a 71
emilmont 77:869cf507173a 72 uint32_t I2C_DigitalFilter; /*!< Configures the digital noise filter.
emilmont 77:869cf507173a 73 This parameter can be a number between 0x00 and 0x0F*/
emilmont 77:869cf507173a 74
emilmont 77:869cf507173a 75 uint32_t I2C_Mode; /*!< Specifies the I2C mode.
emilmont 77:869cf507173a 76 This parameter can be a value of @ref I2C_mode*/
emilmont 77:869cf507173a 77
emilmont 77:869cf507173a 78 uint32_t I2C_OwnAddress1; /*!< Specifies the device own address 1.
emilmont 77:869cf507173a 79 This parameter can be a 7-bit or 10-bit address*/
emilmont 77:869cf507173a 80
emilmont 77:869cf507173a 81 uint32_t I2C_Ack; /*!< Enables or disables the acknowledgement.
emilmont 77:869cf507173a 82 This parameter can be a value of @ref I2C_acknowledgement*/
emilmont 77:869cf507173a 83
emilmont 77:869cf507173a 84 uint32_t I2C_AcknowledgedAddress; /*!< Specifies if 7-bit or 10-bit address is acknowledged.
emilmont 77:869cf507173a 85 This parameter can be a value of @ref I2C_acknowledged_address*/
emilmont 77:869cf507173a 86 }I2C_InitTypeDef;
emilmont 77:869cf507173a 87
emilmont 77:869cf507173a 88 /* Exported constants --------------------------------------------------------*/
emilmont 77:869cf507173a 89
emilmont 77:869cf507173a 90
emilmont 77:869cf507173a 91 /** @defgroup I2C_Exported_Constants
emilmont 77:869cf507173a 92 * @{
emilmont 77:869cf507173a 93 */
emilmont 77:869cf507173a 94
emilmont 77:869cf507173a 95 #define IS_I2C_ALL_PERIPH(PERIPH) (((PERIPH) == I2C1) || \
emilmont 77:869cf507173a 96 ((PERIPH) == I2C2))
emilmont 77:869cf507173a 97
emilmont 77:869cf507173a 98 #define IS_I2C_1_PERIPH(PERIPH) ((PERIPH) == I2C1)
emilmont 77:869cf507173a 99
emilmont 77:869cf507173a 100 /** @defgroup I2C_Analog_Filter
emilmont 77:869cf507173a 101 * @{
emilmont 77:869cf507173a 102 */
emilmont 77:869cf507173a 103
emilmont 77:869cf507173a 104 #define I2C_AnalogFilter_Enable ((uint32_t)0x00000000)
emilmont 77:869cf507173a 105 #define I2C_AnalogFilter_Disable I2C_CR1_ANFOFF
emilmont 77:869cf507173a 106
emilmont 77:869cf507173a 107 #define IS_I2C_ANALOG_FILTER(FILTER) (((FILTER) == I2C_AnalogFilter_Enable) || \
emilmont 77:869cf507173a 108 ((FILTER) == I2C_AnalogFilter_Disable))
emilmont 77:869cf507173a 109 /**
emilmont 77:869cf507173a 110 * @}
emilmont 77:869cf507173a 111 */
emilmont 77:869cf507173a 112
emilmont 77:869cf507173a 113 /** @defgroup I2C_Digital_Filter
emilmont 77:869cf507173a 114 * @{
emilmont 77:869cf507173a 115 */
emilmont 77:869cf507173a 116
emilmont 77:869cf507173a 117 #define IS_I2C_DIGITAL_FILTER(FILTER) ((FILTER) <= 0x0000000F)
emilmont 77:869cf507173a 118 /**
emilmont 77:869cf507173a 119 * @}
emilmont 77:869cf507173a 120 */
emilmont 77:869cf507173a 121
emilmont 77:869cf507173a 122 /** @defgroup I2C_mode
emilmont 77:869cf507173a 123 * @{
emilmont 77:869cf507173a 124 */
emilmont 77:869cf507173a 125
emilmont 77:869cf507173a 126 #define I2C_Mode_I2C ((uint32_t)0x00000000)
emilmont 77:869cf507173a 127 #define I2C_Mode_SMBusDevice I2C_CR1_SMBDEN
emilmont 77:869cf507173a 128 #define I2C_Mode_SMBusHost I2C_CR1_SMBHEN
emilmont 77:869cf507173a 129
emilmont 77:869cf507173a 130 #define IS_I2C_MODE(MODE) (((MODE) == I2C_Mode_I2C) || \
emilmont 77:869cf507173a 131 ((MODE) == I2C_Mode_SMBusDevice) || \
emilmont 77:869cf507173a 132 ((MODE) == I2C_Mode_SMBusHost))
emilmont 77:869cf507173a 133 /**
emilmont 77:869cf507173a 134 * @}
emilmont 77:869cf507173a 135 */
emilmont 77:869cf507173a 136
emilmont 77:869cf507173a 137 /** @defgroup I2C_acknowledgement
emilmont 77:869cf507173a 138 * @{
emilmont 77:869cf507173a 139 */
emilmont 77:869cf507173a 140
emilmont 77:869cf507173a 141 #define I2C_Ack_Enable ((uint32_t)0x00000000)
emilmont 77:869cf507173a 142 #define I2C_Ack_Disable I2C_CR2_NACK
emilmont 77:869cf507173a 143
emilmont 77:869cf507173a 144 #define IS_I2C_ACK(ACK) (((ACK) == I2C_Ack_Enable) || \
emilmont 77:869cf507173a 145 ((ACK) == I2C_Ack_Disable))
emilmont 77:869cf507173a 146 /**
emilmont 77:869cf507173a 147 * @}
emilmont 77:869cf507173a 148 */
emilmont 77:869cf507173a 149
emilmont 77:869cf507173a 150 /** @defgroup I2C_acknowledged_address
emilmont 77:869cf507173a 151 * @{
emilmont 77:869cf507173a 152 */
emilmont 77:869cf507173a 153
emilmont 77:869cf507173a 154 #define I2C_AcknowledgedAddress_7bit ((uint32_t)0x00000000)
emilmont 77:869cf507173a 155 #define I2C_AcknowledgedAddress_10bit I2C_OAR1_OA1MODE
emilmont 77:869cf507173a 156
emilmont 77:869cf507173a 157 #define IS_I2C_ACKNOWLEDGE_ADDRESS(ADDRESS) (((ADDRESS) == I2C_AcknowledgedAddress_7bit) || \
emilmont 77:869cf507173a 158 ((ADDRESS) == I2C_AcknowledgedAddress_10bit))
emilmont 77:869cf507173a 159 /**
emilmont 77:869cf507173a 160 * @}
emilmont 77:869cf507173a 161 */
emilmont 77:869cf507173a 162
emilmont 77:869cf507173a 163 /** @defgroup I2C_own_address1
emilmont 77:869cf507173a 164 * @{
emilmont 77:869cf507173a 165 */
emilmont 77:869cf507173a 166
emilmont 77:869cf507173a 167 #define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= (uint32_t)0x000003FF)
emilmont 77:869cf507173a 168 /**
emilmont 77:869cf507173a 169 * @}
emilmont 77:869cf507173a 170 */
emilmont 77:869cf507173a 171
emilmont 77:869cf507173a 172 /** @defgroup I2C_transfer_direction
emilmont 77:869cf507173a 173 * @{
emilmont 77:869cf507173a 174 */
emilmont 77:869cf507173a 175
emilmont 77:869cf507173a 176 #define I2C_Direction_Transmitter ((uint16_t)0x0000)
emilmont 77:869cf507173a 177 #define I2C_Direction_Receiver ((uint16_t)0x0400)
emilmont 77:869cf507173a 178
emilmont 77:869cf507173a 179 #define IS_I2C_DIRECTION(DIRECTION) (((DIRECTION) == I2C_Direction_Transmitter) || \
emilmont 77:869cf507173a 180 ((DIRECTION) == I2C_Direction_Receiver))
emilmont 77:869cf507173a 181 /**
emilmont 77:869cf507173a 182 * @}
emilmont 77:869cf507173a 183 */
emilmont 77:869cf507173a 184
emilmont 77:869cf507173a 185 /** @defgroup I2C_DMA_transfer_requests
emilmont 77:869cf507173a 186 * @{
emilmont 77:869cf507173a 187 */
emilmont 77:869cf507173a 188
emilmont 77:869cf507173a 189 #define I2C_DMAReq_Tx I2C_CR1_TXDMAEN
emilmont 77:869cf507173a 190 #define I2C_DMAReq_Rx I2C_CR1_RXDMAEN
emilmont 77:869cf507173a 191
emilmont 77:869cf507173a 192 #define IS_I2C_DMA_REQ(REQ) ((((REQ) & (uint32_t)0xFFFF3FFF) == 0x00) && ((REQ) != 0x00))
emilmont 77:869cf507173a 193 /**
emilmont 77:869cf507173a 194 * @}
emilmont 77:869cf507173a 195 */
emilmont 77:869cf507173a 196
emilmont 77:869cf507173a 197 /** @defgroup I2C_slave_address
emilmont 77:869cf507173a 198 * @{
emilmont 77:869cf507173a 199 */
emilmont 77:869cf507173a 200
emilmont 77:869cf507173a 201 #define IS_I2C_SLAVE_ADDRESS(ADDRESS) ((ADDRESS) <= (uint16_t)0x03FF)
emilmont 77:869cf507173a 202 /**
emilmont 77:869cf507173a 203 * @}
emilmont 77:869cf507173a 204 */
emilmont 77:869cf507173a 205
emilmont 77:869cf507173a 206
emilmont 77:869cf507173a 207 /** @defgroup I2C_own_address2
emilmont 77:869cf507173a 208 * @{
emilmont 77:869cf507173a 209 */
emilmont 77:869cf507173a 210
emilmont 77:869cf507173a 211 #define IS_I2C_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FF)
emilmont 77:869cf507173a 212
emilmont 77:869cf507173a 213 /**
emilmont 77:869cf507173a 214 * @}
emilmont 77:869cf507173a 215 */
emilmont 77:869cf507173a 216
emilmont 77:869cf507173a 217 /** @defgroup I2C_own_address2_mask
emilmont 77:869cf507173a 218 * @{
emilmont 77:869cf507173a 219 */
emilmont 77:869cf507173a 220
emilmont 77:869cf507173a 221 #define I2C_OA2_NoMask ((uint8_t)0x00)
emilmont 77:869cf507173a 222 #define I2C_OA2_Mask01 ((uint8_t)0x01)
emilmont 77:869cf507173a 223 #define I2C_OA2_Mask02 ((uint8_t)0x02)
emilmont 77:869cf507173a 224 #define I2C_OA2_Mask03 ((uint8_t)0x03)
emilmont 77:869cf507173a 225 #define I2C_OA2_Mask04 ((uint8_t)0x04)
emilmont 77:869cf507173a 226 #define I2C_OA2_Mask05 ((uint8_t)0x05)
emilmont 77:869cf507173a 227 #define I2C_OA2_Mask06 ((uint8_t)0x06)
emilmont 77:869cf507173a 228 #define I2C_OA2_Mask07 ((uint8_t)0x07)
emilmont 77:869cf507173a 229
emilmont 77:869cf507173a 230 #define IS_I2C_OWN_ADDRESS2_MASK(MASK) (((MASK) == I2C_OA2_NoMask) || \
emilmont 77:869cf507173a 231 ((MASK) == I2C_OA2_Mask01) || \
emilmont 77:869cf507173a 232 ((MASK) == I2C_OA2_Mask02) || \
emilmont 77:869cf507173a 233 ((MASK) == I2C_OA2_Mask03) || \
emilmont 77:869cf507173a 234 ((MASK) == I2C_OA2_Mask04) || \
emilmont 77:869cf507173a 235 ((MASK) == I2C_OA2_Mask05) || \
emilmont 77:869cf507173a 236 ((MASK) == I2C_OA2_Mask06) || \
emilmont 77:869cf507173a 237 ((MASK) == I2C_OA2_Mask07))
emilmont 77:869cf507173a 238
emilmont 77:869cf507173a 239 /**
emilmont 77:869cf507173a 240 * @}
emilmont 77:869cf507173a 241 */
emilmont 77:869cf507173a 242
emilmont 77:869cf507173a 243 /** @defgroup I2C_timeout
emilmont 77:869cf507173a 244 * @{
emilmont 77:869cf507173a 245 */
emilmont 77:869cf507173a 246
emilmont 77:869cf507173a 247 #define IS_I2C_TIMEOUT(TIMEOUT) ((TIMEOUT) <= (uint16_t)0x0FFF)
emilmont 77:869cf507173a 248
emilmont 77:869cf507173a 249 /**
emilmont 77:869cf507173a 250 * @}
emilmont 77:869cf507173a 251 */
emilmont 77:869cf507173a 252
emilmont 77:869cf507173a 253 /** @defgroup I2C_registers
emilmont 77:869cf507173a 254 * @{
emilmont 77:869cf507173a 255 */
emilmont 77:869cf507173a 256
emilmont 77:869cf507173a 257 #define I2C_Register_CR1 ((uint8_t)0x00)
emilmont 77:869cf507173a 258 #define I2C_Register_CR2 ((uint8_t)0x04)
emilmont 77:869cf507173a 259 #define I2C_Register_OAR1 ((uint8_t)0x08)
emilmont 77:869cf507173a 260 #define I2C_Register_OAR2 ((uint8_t)0x0C)
emilmont 77:869cf507173a 261 #define I2C_Register_TIMINGR ((uint8_t)0x10)
emilmont 77:869cf507173a 262 #define I2C_Register_TIMEOUTR ((uint8_t)0x14)
emilmont 77:869cf507173a 263 #define I2C_Register_ISR ((uint8_t)0x18)
emilmont 77:869cf507173a 264 #define I2C_Register_ICR ((uint8_t)0x1C)
emilmont 77:869cf507173a 265 #define I2C_Register_PECR ((uint8_t)0x20)
emilmont 77:869cf507173a 266 #define I2C_Register_RXDR ((uint8_t)0x24)
emilmont 77:869cf507173a 267 #define I2C_Register_TXDR ((uint8_t)0x28)
emilmont 77:869cf507173a 268
emilmont 77:869cf507173a 269 #define IS_I2C_REGISTER(REGISTER) (((REGISTER) == I2C_Register_CR1) || \
emilmont 77:869cf507173a 270 ((REGISTER) == I2C_Register_CR2) || \
emilmont 77:869cf507173a 271 ((REGISTER) == I2C_Register_OAR1) || \
emilmont 77:869cf507173a 272 ((REGISTER) == I2C_Register_OAR2) || \
emilmont 77:869cf507173a 273 ((REGISTER) == I2C_Register_TIMINGR) || \
emilmont 77:869cf507173a 274 ((REGISTER) == I2C_Register_TIMEOUTR) || \
emilmont 77:869cf507173a 275 ((REGISTER) == I2C_Register_ISR) || \
emilmont 77:869cf507173a 276 ((REGISTER) == I2C_Register_ICR) || \
emilmont 77:869cf507173a 277 ((REGISTER) == I2C_Register_PECR) || \
emilmont 77:869cf507173a 278 ((REGISTER) == I2C_Register_RXDR) || \
emilmont 77:869cf507173a 279 ((REGISTER) == I2C_Register_TXDR))
emilmont 77:869cf507173a 280 /**
emilmont 77:869cf507173a 281 * @}
emilmont 77:869cf507173a 282 */
emilmont 77:869cf507173a 283
emilmont 77:869cf507173a 284 /** @defgroup I2C_interrupts_definition
emilmont 77:869cf507173a 285 * @{
emilmont 77:869cf507173a 286 */
emilmont 77:869cf507173a 287
emilmont 77:869cf507173a 288 #define I2C_IT_ERRI I2C_CR1_ERRIE
emilmont 77:869cf507173a 289 #define I2C_IT_TCI I2C_CR1_TCIE
emilmont 77:869cf507173a 290 #define I2C_IT_STOPI I2C_CR1_STOPIE
emilmont 77:869cf507173a 291 #define I2C_IT_NACKI I2C_CR1_NACKIE
emilmont 77:869cf507173a 292 #define I2C_IT_ADDRI I2C_CR1_ADDRIE
emilmont 77:869cf507173a 293 #define I2C_IT_RXI I2C_CR1_RXIE
emilmont 77:869cf507173a 294 #define I2C_IT_TXI I2C_CR1_TXIE
emilmont 77:869cf507173a 295
emilmont 77:869cf507173a 296 #define IS_I2C_CONFIG_IT(IT) ((((IT) & (uint32_t)0xFFFFFF01) == 0x00) && ((IT) != 0x00))
emilmont 77:869cf507173a 297
emilmont 77:869cf507173a 298 /**
emilmont 77:869cf507173a 299 * @}
emilmont 77:869cf507173a 300 */
emilmont 77:869cf507173a 301
emilmont 77:869cf507173a 302 /** @defgroup I2C_flags_definition
emilmont 77:869cf507173a 303 * @{
emilmont 77:869cf507173a 304 */
emilmont 77:869cf507173a 305
emilmont 77:869cf507173a 306 #define I2C_FLAG_TXE I2C_ISR_TXE
emilmont 77:869cf507173a 307 #define I2C_FLAG_TXIS I2C_ISR_TXIS
emilmont 77:869cf507173a 308 #define I2C_FLAG_RXNE I2C_ISR_RXNE
emilmont 77:869cf507173a 309 #define I2C_FLAG_ADDR I2C_ISR_ADDR
emilmont 77:869cf507173a 310 #define I2C_FLAG_NACKF I2C_ISR_NACKF
emilmont 77:869cf507173a 311 #define I2C_FLAG_STOPF I2C_ISR_STOPF
emilmont 77:869cf507173a 312 #define I2C_FLAG_TC I2C_ISR_TC
emilmont 77:869cf507173a 313 #define I2C_FLAG_TCR I2C_ISR_TCR
emilmont 77:869cf507173a 314 #define I2C_FLAG_BERR I2C_ISR_BERR
emilmont 77:869cf507173a 315 #define I2C_FLAG_ARLO I2C_ISR_ARLO
emilmont 77:869cf507173a 316 #define I2C_FLAG_OVR I2C_ISR_OVR
emilmont 77:869cf507173a 317 #define I2C_FLAG_PECERR I2C_ISR_PECERR
emilmont 77:869cf507173a 318 #define I2C_FLAG_TIMEOUT I2C_ISR_TIMEOUT
emilmont 77:869cf507173a 319 #define I2C_FLAG_ALERT I2C_ISR_ALERT
emilmont 77:869cf507173a 320 #define I2C_FLAG_BUSY I2C_ISR_BUSY
emilmont 77:869cf507173a 321
emilmont 77:869cf507173a 322 #define IS_I2C_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFF4000) == 0x00) && ((FLAG) != 0x00))
emilmont 77:869cf507173a 323
emilmont 77:869cf507173a 324 #define IS_I2C_GET_FLAG(FLAG) (((FLAG) == I2C_FLAG_TXE) || ((FLAG) == I2C_FLAG_TXIS) || \
emilmont 77:869cf507173a 325 ((FLAG) == I2C_FLAG_RXNE) || ((FLAG) == I2C_FLAG_ADDR) || \
emilmont 77:869cf507173a 326 ((FLAG) == I2C_FLAG_NACKF) || ((FLAG) == I2C_FLAG_STOPF) || \
emilmont 77:869cf507173a 327 ((FLAG) == I2C_FLAG_TC) || ((FLAG) == I2C_FLAG_TCR) || \
emilmont 77:869cf507173a 328 ((FLAG) == I2C_FLAG_BERR) || ((FLAG) == I2C_FLAG_ARLO) || \
emilmont 77:869cf507173a 329 ((FLAG) == I2C_FLAG_OVR) || ((FLAG) == I2C_FLAG_PECERR) || \
emilmont 77:869cf507173a 330 ((FLAG) == I2C_FLAG_TIMEOUT) || ((FLAG) == I2C_FLAG_ALERT) || \
emilmont 77:869cf507173a 331 ((FLAG) == I2C_FLAG_BUSY))
emilmont 77:869cf507173a 332
emilmont 77:869cf507173a 333 /**
emilmont 77:869cf507173a 334 * @}
emilmont 77:869cf507173a 335 */
emilmont 77:869cf507173a 336
emilmont 77:869cf507173a 337
emilmont 77:869cf507173a 338 /** @defgroup I2C_interrupts_definition
emilmont 77:869cf507173a 339 * @{
emilmont 77:869cf507173a 340 */
emilmont 77:869cf507173a 341
emilmont 77:869cf507173a 342 #define I2C_IT_TXIS I2C_ISR_TXIS
emilmont 77:869cf507173a 343 #define I2C_IT_RXNE I2C_ISR_RXNE
emilmont 77:869cf507173a 344 #define I2C_IT_ADDR I2C_ISR_ADDR
emilmont 77:869cf507173a 345 #define I2C_IT_NACKF I2C_ISR_NACKF
emilmont 77:869cf507173a 346 #define I2C_IT_STOPF I2C_ISR_STOPF
emilmont 77:869cf507173a 347 #define I2C_IT_TC I2C_ISR_TC
emilmont 77:869cf507173a 348 #define I2C_IT_TCR I2C_ISR_TCR
emilmont 77:869cf507173a 349 #define I2C_IT_BERR I2C_ISR_BERR
emilmont 77:869cf507173a 350 #define I2C_IT_ARLO I2C_ISR_ARLO
emilmont 77:869cf507173a 351 #define I2C_IT_OVR I2C_ISR_OVR
emilmont 77:869cf507173a 352 #define I2C_IT_PECERR I2C_ISR_PECERR
emilmont 77:869cf507173a 353 #define I2C_IT_TIMEOUT I2C_ISR_TIMEOUT
emilmont 77:869cf507173a 354 #define I2C_IT_ALERT I2C_ISR_ALERT
emilmont 77:869cf507173a 355
emilmont 77:869cf507173a 356 #define IS_I2C_CLEAR_IT(IT) ((((IT) & (uint32_t)0xFFFFC001) == 0x00) && ((IT) != 0x00))
emilmont 77:869cf507173a 357
emilmont 77:869cf507173a 358 #define IS_I2C_GET_IT(IT) (((IT) == I2C_IT_TXIS) || ((IT) == I2C_IT_RXNE) || \
emilmont 77:869cf507173a 359 ((IT) == I2C_IT_ADDR) || ((IT) == I2C_IT_NACKF) || \
emilmont 77:869cf507173a 360 ((IT) == I2C_IT_STOPF) || ((IT) == I2C_IT_TC) || \
emilmont 77:869cf507173a 361 ((IT) == I2C_IT_TCR) || ((IT) == I2C_IT_BERR) || \
emilmont 77:869cf507173a 362 ((IT) == I2C_IT_ARLO) || ((IT) == I2C_IT_OVR) || \
emilmont 77:869cf507173a 363 ((IT) == I2C_IT_PECERR) || ((IT) == I2C_IT_TIMEOUT) || \
emilmont 77:869cf507173a 364 ((IT) == I2C_IT_ALERT))
emilmont 77:869cf507173a 365
emilmont 77:869cf507173a 366
emilmont 77:869cf507173a 367 /**
emilmont 77:869cf507173a 368 * @}
emilmont 77:869cf507173a 369 */
emilmont 77:869cf507173a 370
emilmont 77:869cf507173a 371 /** @defgroup I2C_ReloadEndMode_definition
emilmont 77:869cf507173a 372 * @{
emilmont 77:869cf507173a 373 */
emilmont 77:869cf507173a 374
emilmont 77:869cf507173a 375 #define I2C_Reload_Mode I2C_CR2_RELOAD
emilmont 77:869cf507173a 376 #define I2C_AutoEnd_Mode I2C_CR2_AUTOEND
emilmont 77:869cf507173a 377 #define I2C_SoftEnd_Mode ((uint32_t)0x00000000)
emilmont 77:869cf507173a 378
emilmont 77:869cf507173a 379
emilmont 77:869cf507173a 380 #define IS_RELOAD_END_MODE(MODE) (((MODE) == I2C_Reload_Mode) || \
emilmont 77:869cf507173a 381 ((MODE) == I2C_AutoEnd_Mode) || \
emilmont 77:869cf507173a 382 ((MODE) == I2C_SoftEnd_Mode))
emilmont 77:869cf507173a 383
emilmont 77:869cf507173a 384
emilmont 77:869cf507173a 385 /**
emilmont 77:869cf507173a 386 * @}
emilmont 77:869cf507173a 387 */
emilmont 77:869cf507173a 388
emilmont 77:869cf507173a 389 /** @defgroup I2C_StartStopMode_definition
emilmont 77:869cf507173a 390 * @{
emilmont 77:869cf507173a 391 */
emilmont 77:869cf507173a 392
emilmont 77:869cf507173a 393 #define I2C_No_StartStop ((uint32_t)0x00000000)
emilmont 77:869cf507173a 394 #define I2C_Generate_Stop I2C_CR2_STOP
emilmont 77:869cf507173a 395 #define I2C_Generate_Start_Read (uint32_t)(I2C_CR2_START | I2C_CR2_RD_WRN)
emilmont 77:869cf507173a 396 #define I2C_Generate_Start_Write I2C_CR2_START
emilmont 77:869cf507173a 397
emilmont 77:869cf507173a 398
emilmont 77:869cf507173a 399 #define IS_START_STOP_MODE(MODE) (((MODE) == I2C_Generate_Stop) || \
emilmont 77:869cf507173a 400 ((MODE) == I2C_Generate_Start_Read) || \
emilmont 77:869cf507173a 401 ((MODE) == I2C_Generate_Start_Write) || \
emilmont 77:869cf507173a 402 ((MODE) == I2C_No_StartStop))
emilmont 77:869cf507173a 403
emilmont 77:869cf507173a 404
emilmont 77:869cf507173a 405 /**
emilmont 77:869cf507173a 406 * @}
emilmont 77:869cf507173a 407 */
emilmont 77:869cf507173a 408
emilmont 77:869cf507173a 409 /**
emilmont 77:869cf507173a 410 * @}
emilmont 77:869cf507173a 411 */
emilmont 77:869cf507173a 412
emilmont 77:869cf507173a 413 /* Exported macro ------------------------------------------------------------*/
emilmont 77:869cf507173a 414 /* Exported functions ------------------------------------------------------- */
emilmont 77:869cf507173a 415
emilmont 77:869cf507173a 416
emilmont 77:869cf507173a 417 /* Initialization and Configuration functions *********************************/
emilmont 77:869cf507173a 418 void I2C_DeInit(I2C_TypeDef* I2Cx);
emilmont 77:869cf507173a 419 void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct);
emilmont 77:869cf507173a 420 void I2C_StructInit(I2C_InitTypeDef* I2C_InitStruct);
emilmont 77:869cf507173a 421 void I2C_Cmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
emilmont 77:869cf507173a 422 void I2C_SoftwareResetCmd(I2C_TypeDef* I2Cx);
emilmont 77:869cf507173a 423 void I2C_ITConfig(I2C_TypeDef* I2Cx, uint32_t I2C_IT, FunctionalState NewState);
emilmont 77:869cf507173a 424 void I2C_StretchClockCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
emilmont 77:869cf507173a 425 void I2C_StopModeCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); /*!< not applicable for STM32F030 devices */
emilmont 77:869cf507173a 426 void I2C_DualAddressCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
emilmont 77:869cf507173a 427 void I2C_OwnAddress2Config(I2C_TypeDef* I2Cx, uint16_t Address, uint8_t Mask);
emilmont 77:869cf507173a 428 void I2C_GeneralCallCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
emilmont 77:869cf507173a 429 void I2C_SlaveByteControlCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
emilmont 77:869cf507173a 430 void I2C_SlaveAddressConfig(I2C_TypeDef* I2Cx, uint16_t Address);
emilmont 77:869cf507173a 431 void I2C_10BitAddressingModeCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
emilmont 77:869cf507173a 432
emilmont 77:869cf507173a 433 /* Communications handling functions ******************************************/
emilmont 77:869cf507173a 434 void I2C_AutoEndCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
emilmont 77:869cf507173a 435 void I2C_ReloadCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
emilmont 77:869cf507173a 436 void I2C_NumberOfBytesConfig(I2C_TypeDef* I2Cx, uint8_t Number_Bytes);
emilmont 77:869cf507173a 437 void I2C_MasterRequestConfig(I2C_TypeDef* I2Cx, uint16_t I2C_Direction);
emilmont 77:869cf507173a 438 void I2C_GenerateSTART(I2C_TypeDef* I2Cx, FunctionalState NewState);
emilmont 77:869cf507173a 439 void I2C_GenerateSTOP(I2C_TypeDef* I2Cx, FunctionalState NewState);
emilmont 77:869cf507173a 440 void I2C_10BitAddressHeaderCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
emilmont 77:869cf507173a 441 void I2C_AcknowledgeConfig(I2C_TypeDef* I2Cx, FunctionalState NewState);
emilmont 77:869cf507173a 442 uint8_t I2C_GetAddressMatched(I2C_TypeDef* I2Cx);
emilmont 77:869cf507173a 443 uint16_t I2C_GetTransferDirection(I2C_TypeDef* I2Cx);
emilmont 77:869cf507173a 444 void I2C_TransferHandling(I2C_TypeDef* I2Cx, uint16_t Address, uint8_t Number_Bytes, uint32_t ReloadEndMode, uint32_t StartStopMode);
emilmont 77:869cf507173a 445
emilmont 77:869cf507173a 446 /* SMBUS management functions ************************************************/
emilmont 77:869cf507173a 447 void I2C_SMBusAlertCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
emilmont 77:869cf507173a 448 void I2C_ClockTimeoutCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
emilmont 77:869cf507173a 449 void I2C_ExtendedClockTimeoutCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
emilmont 77:869cf507173a 450 void I2C_IdleClockTimeoutCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
emilmont 77:869cf507173a 451 void I2C_TimeoutAConfig(I2C_TypeDef* I2Cx, uint16_t Timeout);
emilmont 77:869cf507173a 452 void I2C_TimeoutBConfig(I2C_TypeDef* I2Cx, uint16_t Timeout);
emilmont 77:869cf507173a 453 void I2C_CalculatePEC(I2C_TypeDef* I2Cx, FunctionalState NewState);
emilmont 77:869cf507173a 454 void I2C_PECRequestCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
emilmont 77:869cf507173a 455 uint8_t I2C_GetPEC(I2C_TypeDef* I2Cx);
emilmont 77:869cf507173a 456
emilmont 77:869cf507173a 457 /* I2C registers management functions *****************************************/
emilmont 77:869cf507173a 458 uint32_t I2C_ReadRegister(I2C_TypeDef* I2Cx, uint8_t I2C_Register);
emilmont 77:869cf507173a 459
emilmont 77:869cf507173a 460 /* Data transfers management functions ****************************************/
emilmont 77:869cf507173a 461 void I2C_SendData(I2C_TypeDef* I2Cx, uint8_t Data);
emilmont 77:869cf507173a 462 uint8_t I2C_ReceiveData(I2C_TypeDef* I2Cx);
emilmont 77:869cf507173a 463
emilmont 77:869cf507173a 464 /* DMA transfers management functions *****************************************/
emilmont 77:869cf507173a 465 void I2C_DMACmd(I2C_TypeDef* I2Cx, uint32_t I2C_DMAReq, FunctionalState NewState);
emilmont 77:869cf507173a 466
emilmont 77:869cf507173a 467 /* Interrupts and flags management functions **********************************/
emilmont 77:869cf507173a 468 FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG);
emilmont 77:869cf507173a 469 void I2C_ClearFlag(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG);
emilmont 77:869cf507173a 470 ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT);
emilmont 77:869cf507173a 471 void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, uint32_t I2C_IT);
emilmont 77:869cf507173a 472
emilmont 77:869cf507173a 473
emilmont 77:869cf507173a 474 #ifdef __cplusplus
emilmont 77:869cf507173a 475 }
emilmont 77:869cf507173a 476 #endif
emilmont 77:869cf507173a 477
emilmont 77:869cf507173a 478 #endif /*__STM32F0XX_I2C_H */
emilmont 77:869cf507173a 479
emilmont 77:869cf507173a 480 /**
emilmont 77:869cf507173a 481 * @}
emilmont 77:869cf507173a 482 */
emilmont 77:869cf507173a 483
emilmont 77:869cf507173a 484 /**
emilmont 77:869cf507173a 485 * @}
emilmont 77:869cf507173a 486 */
emilmont 77:869cf507173a 487
emilmont 77:869cf507173a 488 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/