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TARGET_NUCLEO_F072RB/stm32f0xx_hal_adc.h@121:672067c3ada4, 2016-04-14 (annotated)
- Committer:
- elijahorr
- Date:
- Thu Apr 14 07:28:54 2016 +0000
- Revision:
- 121:672067c3ada4
- Parent:
- 108:34e6b704fe68
.
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| bogdanm | 85:024bf7f99721 | 1 | /** |
| bogdanm | 85:024bf7f99721 | 2 | ****************************************************************************** |
| bogdanm | 85:024bf7f99721 | 3 | * @file stm32f0xx_hal_adc.h |
| bogdanm | 85:024bf7f99721 | 4 | * @author MCD Application Team |
| Kojto | 108:34e6b704fe68 | 5 | * @version V1.3.0 |
| Kojto | 108:34e6b704fe68 | 6 | * @date 26-June-2015 |
| bogdanm | 85:024bf7f99721 | 7 | * @brief Header file containing functions prototypes of ADC HAL library. |
| bogdanm | 85:024bf7f99721 | 8 | ****************************************************************************** |
| bogdanm | 85:024bf7f99721 | 9 | * @attention |
| bogdanm | 85:024bf7f99721 | 10 | * |
| Kojto | 108:34e6b704fe68 | 11 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> |
| bogdanm | 85:024bf7f99721 | 12 | * |
| bogdanm | 85:024bf7f99721 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
| bogdanm | 85:024bf7f99721 | 14 | * are permitted provided that the following conditions are met: |
| bogdanm | 85:024bf7f99721 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| bogdanm | 85:024bf7f99721 | 16 | * this list of conditions and the following disclaimer. |
| bogdanm | 85:024bf7f99721 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| bogdanm | 85:024bf7f99721 | 18 | * this list of conditions and the following disclaimer in the documentation |
| bogdanm | 85:024bf7f99721 | 19 | * and/or other materials provided with the distribution. |
| bogdanm | 85:024bf7f99721 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| bogdanm | 85:024bf7f99721 | 21 | * may be used to endorse or promote products derived from this software |
| bogdanm | 85:024bf7f99721 | 22 | * without specific prior written permission. |
| bogdanm | 85:024bf7f99721 | 23 | * |
| bogdanm | 85:024bf7f99721 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| bogdanm | 85:024bf7f99721 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| bogdanm | 85:024bf7f99721 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| bogdanm | 85:024bf7f99721 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| bogdanm | 85:024bf7f99721 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| bogdanm | 85:024bf7f99721 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| bogdanm | 85:024bf7f99721 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| bogdanm | 85:024bf7f99721 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| bogdanm | 85:024bf7f99721 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| bogdanm | 85:024bf7f99721 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| bogdanm | 85:024bf7f99721 | 34 | * |
| bogdanm | 85:024bf7f99721 | 35 | ****************************************************************************** |
| bogdanm | 85:024bf7f99721 | 36 | */ |
| bogdanm | 85:024bf7f99721 | 37 | |
| bogdanm | 85:024bf7f99721 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| bogdanm | 85:024bf7f99721 | 39 | #ifndef __STM32F0xx_HAL_ADC_H |
| bogdanm | 85:024bf7f99721 | 40 | #define __STM32F0xx_HAL_ADC_H |
| bogdanm | 85:024bf7f99721 | 41 | |
| bogdanm | 85:024bf7f99721 | 42 | #ifdef __cplusplus |
| bogdanm | 85:024bf7f99721 | 43 | extern "C" { |
| bogdanm | 85:024bf7f99721 | 44 | #endif |
| bogdanm | 85:024bf7f99721 | 45 | |
| bogdanm | 85:024bf7f99721 | 46 | /* Includes ------------------------------------------------------------------*/ |
| bogdanm | 85:024bf7f99721 | 47 | #include "stm32f0xx_hal_def.h" |
| bogdanm | 85:024bf7f99721 | 48 | |
| bogdanm | 85:024bf7f99721 | 49 | /** @addtogroup STM32F0xx_HAL_Driver |
| bogdanm | 85:024bf7f99721 | 50 | * @{ |
| bogdanm | 85:024bf7f99721 | 51 | */ |
| bogdanm | 85:024bf7f99721 | 52 | |
| bogdanm | 85:024bf7f99721 | 53 | /** @addtogroup ADC |
| bogdanm | 85:024bf7f99721 | 54 | * @{ |
| bogdanm | 85:024bf7f99721 | 55 | */ |
| bogdanm | 85:024bf7f99721 | 56 | |
| bogdanm | 85:024bf7f99721 | 57 | /* Exported types ------------------------------------------------------------*/ |
| bogdanm | 92:4fc01daae5a5 | 58 | /** @defgroup ADC_Exported_Types ADC Exported Types |
| bogdanm | 92:4fc01daae5a5 | 59 | * @{ |
| bogdanm | 92:4fc01daae5a5 | 60 | */ |
| bogdanm | 85:024bf7f99721 | 61 | |
| bogdanm | 85:024bf7f99721 | 62 | /** |
| bogdanm | 85:024bf7f99721 | 63 | * @brief Structure definition of ADC initialization and regular group |
| bogdanm | 85:024bf7f99721 | 64 | * @note The setting of these parameters with function HAL_ADC_Init() is conditioned to ADC state. |
| bogdanm | 85:024bf7f99721 | 65 | * ADC state can be either: |
| bogdanm | 85:024bf7f99721 | 66 | * - For all parameters: ADC disabled (this is the only possible ADC state to modify parameter 'ClockPrescaler') |
| Kojto | 108:34e6b704fe68 | 67 | * - For all parameters except 'ClockPrescaler' and 'resolution': ADC enabled without conversion on going on regular group. |
| bogdanm | 85:024bf7f99721 | 68 | * If ADC is not in the appropriate state to modify some parameters, these parameters setting is bypassed |
| Kojto | 93:e188a91d3eaa | 69 | * without error reporting (as it can be the expected behaviour in case of intended action to update another parameter (which fulfills the ADC state condition) on the fly). |
| bogdanm | 85:024bf7f99721 | 70 | */ |
| bogdanm | 85:024bf7f99721 | 71 | typedef struct |
| bogdanm | 85:024bf7f99721 | 72 | { |
| bogdanm | 92:4fc01daae5a5 | 73 | uint32_t ClockPrescaler; /*!< Select ADC clock source (synchronous clock derived from APB clock or asynchronous clock derived from ADC dedicated HSI RC oscillator 14MHz) and clock prescaler. |
| bogdanm | 85:024bf7f99721 | 74 | This parameter can be a value of @ref ADC_ClockPrescaler |
| bogdanm | 85:024bf7f99721 | 75 | Note: In case of usage of the ADC dedicated HSI RC oscillator, it must be preliminarily enabled at RCC top level. |
| bogdanm | 85:024bf7f99721 | 76 | Note: This parameter can be modified only if the ADC is disabled */ |
| bogdanm | 85:024bf7f99721 | 77 | uint32_t Resolution; /*!< Configures the ADC resolution. |
| bogdanm | 85:024bf7f99721 | 78 | This parameter can be a value of @ref ADC_Resolution */ |
| bogdanm | 85:024bf7f99721 | 79 | uint32_t DataAlign; /*!< Specifies whether the ADC data alignment is left or right. |
| bogdanm | 92:4fc01daae5a5 | 80 | This parameter can be a value of @ref ADC_Data_align */ |
| bogdanm | 85:024bf7f99721 | 81 | uint32_t ScanConvMode; /*!< Configures the sequencer of regular group. |
| bogdanm | 85:024bf7f99721 | 82 | This parameter can be associated to parameter 'DiscontinuousConvMode' to have main sequence subdivided in successive parts. |
| bogdanm | 85:024bf7f99721 | 83 | Sequencer is automatically enabled if several channels are set (sequencer cannot be disabled, as it can be the case on other STM32 devices): |
| bogdanm | 85:024bf7f99721 | 84 | If only 1 channel is set: Conversion is performed in single mode. |
| bogdanm | 85:024bf7f99721 | 85 | If several channels are set: Conversions are performed in sequence mode (ranks defined by each channel number: channel 0 fixed on rank 0, channel 1 fixed on rank1, ...). |
| bogdanm | 85:024bf7f99721 | 86 | Scan direction can be set to forward (from channel 0 to channel 18) or backward (from channel 18 to channel 0). |
| bogdanm | 85:024bf7f99721 | 87 | This parameter can be a value of @ref ADC_Scan_mode */ |
| bogdanm | 85:024bf7f99721 | 88 | uint32_t EOCSelection; /*!< Specifies what EOC (End Of Conversion) flag is used for conversion by polling and interruption: end of conversion of each rank or complete sequence. |
| bogdanm | 85:024bf7f99721 | 89 | This parameter can be a value of @ref ADC_EOCSelection. */ |
| bogdanm | 85:024bf7f99721 | 90 | uint32_t LowPowerAutoWait; /*!< Selects the dynamic low power Auto Delay: new conversion start only when the previous |
| Kojto | 108:34e6b704fe68 | 91 | conversion (for regular group) has been treated by user software, using function HAL_ADC_GetValue(). |
| Kojto | 108:34e6b704fe68 | 92 | This feature automatically adapts the ADC conversions trigs to the speed of the system that reads the data. Moreover, this avoids risk of overrun for low frequency applications. |
| bogdanm | 92:4fc01daae5a5 | 93 | This parameter can be set to ENABLE or DISABLE. |
| bogdanm | 92:4fc01daae5a5 | 94 | Note: Do not use with interruption or DMA (HAL_ADC_Start_IT(), HAL_ADC_Start_DMA()) since they have to clear immediately the EOC flag to free the IRQ vector sequencer. |
| bogdanm | 92:4fc01daae5a5 | 95 | Do use with polling: 1. Start conversion with HAL_ADC_Start(), 2. Later on, when conversion data is needed: use HAL_ADC_PollForConversion() to ensure that conversion is completed |
| bogdanm | 92:4fc01daae5a5 | 96 | and use HAL_ADC_GetValue() to retrieve conversion result and trig another conversion. */ |
| bogdanm | 85:024bf7f99721 | 97 | uint32_t LowPowerAutoPowerOff; /*!< Selects the auto-off mode: the ADC automatically powers-off after a conversion and automatically wakes-up when a new conversion is triggered (with startup time between trigger and start of sampling). |
| bogdanm | 85:024bf7f99721 | 98 | This feature can be combined with automatic wait mode (parameter 'LowPowerAutoWait'). |
| bogdanm | 85:024bf7f99721 | 99 | This parameter can be set to ENABLE or DISABLE. |
| bogdanm | 85:024bf7f99721 | 100 | Note: If enabled, this feature also turns off the ADC dedicated 14 MHz RC oscillator (HSI14) */ |
| bogdanm | 85:024bf7f99721 | 101 | uint32_t ContinuousConvMode; /*!< Specifies whether the conversion is performed in single mode (one conversion) or continuous mode for regular group, |
| bogdanm | 85:024bf7f99721 | 102 | after the selected trigger occurred (software start or external trigger). |
| bogdanm | 85:024bf7f99721 | 103 | This parameter can be set to ENABLE or DISABLE. */ |
| bogdanm | 85:024bf7f99721 | 104 | uint32_t DiscontinuousConvMode; /*!< Specifies whether the conversions sequence of regular group is performed in Complete-sequence/Discontinuous-sequence (main sequence subdivided in successive parts). |
| bogdanm | 85:024bf7f99721 | 105 | Discontinuous mode is used only if sequencer is enabled (parameter 'ScanConvMode'). If sequencer is disabled, this parameter is discarded. |
| bogdanm | 85:024bf7f99721 | 106 | Discontinuous mode can be enabled only if continuous mode is disabled. If continuous mode is enabled, this parameter setting is discarded. |
| bogdanm | 85:024bf7f99721 | 107 | This parameter can be set to ENABLE or DISABLE |
| bogdanm | 85:024bf7f99721 | 108 | Note: Number of discontinuous ranks increment is fixed to one-by-one. */ |
| bogdanm | 85:024bf7f99721 | 109 | uint32_t ExternalTrigConv; /*!< Selects the external event used to trigger the conversion start of regular group. |
| bogdanm | 85:024bf7f99721 | 110 | If set to ADC_SOFTWARE_START, external triggers are disabled. |
| bogdanm | 85:024bf7f99721 | 111 | This parameter can be a value of @ref ADC_External_trigger_source_Regular */ |
| bogdanm | 85:024bf7f99721 | 112 | uint32_t ExternalTrigConvEdge; /*!< Selects the external trigger edge of regular group. |
| bogdanm | 85:024bf7f99721 | 113 | If trigger is set to ADC_SOFTWARE_START, this parameter is discarded. |
| bogdanm | 85:024bf7f99721 | 114 | This parameter can be a value of @ref ADC_External_trigger_edge_Regular */ |
| bogdanm | 85:024bf7f99721 | 115 | uint32_t DMAContinuousRequests; /*!< Specifies whether the DMA requests are performed in one shot mode (DMA transfer stop when number of conversions is reached) |
| bogdanm | 85:024bf7f99721 | 116 | or in Continuous mode (DMA transfer unlimited, whatever number of conversions). |
| bogdanm | 85:024bf7f99721 | 117 | Note: In continuous mode, DMA must be configured in circular mode. Otherwise an overrun will be triggered when DMA buffer maximum pointer is reached. |
| bogdanm | 85:024bf7f99721 | 118 | This parameter can be set to ENABLE or DISABLE. */ |
| bogdanm | 85:024bf7f99721 | 119 | uint32_t Overrun; /*!< Select the behaviour in case of overrun: data preserved or overwritten |
| bogdanm | 85:024bf7f99721 | 120 | This parameter has an effect on regular group only, including in DMA mode. |
| bogdanm | 85:024bf7f99721 | 121 | This parameter can be a value of @ref ADC_Overrun */ |
| Kojto | 108:34e6b704fe68 | 122 | uint32_t SamplingTimeCommon; /*!< Sampling time value to be set for the selected channel. |
| Kojto | 108:34e6b704fe68 | 123 | Unit: ADC clock cycles |
| Kojto | 108:34e6b704fe68 | 124 | Conversion time is the addition of sampling time and processing time (12.5 ADC clock cycles at ADC resolution 12 bits, 10.5 cycles at 10 bits, 8.5 cycles at 8 bits, 6.5 cycles at 6 bits). |
| Kojto | 108:34e6b704fe68 | 125 | Note: On STM32F0 devices, the sampling time setting is common to all channels. On some other STM32 devices, this parameter in channel wise and is located into ADC channel initialization structure. |
| Kojto | 108:34e6b704fe68 | 126 | This parameter can be a value of @ref ADC_sampling_times |
| Kojto | 108:34e6b704fe68 | 127 | Note: In case of usage of internal measurement channels (VrefInt/Vbat/TempSensor), |
| Kojto | 108:34e6b704fe68 | 128 | sampling time constraints must be respected (sampling time can be adjusted in function of ADC clock frequency and sampling time setting) |
| Kojto | 108:34e6b704fe68 | 129 | Refer to device datasheet for timings values, parameters TS_vrefint, TS_vbat, TS_temp (values rough order: 5us to 17us). */ |
| bogdanm | 85:024bf7f99721 | 130 | }ADC_InitTypeDef; |
| bogdanm | 85:024bf7f99721 | 131 | |
| bogdanm | 85:024bf7f99721 | 132 | /** |
| bogdanm | 85:024bf7f99721 | 133 | * @brief Structure definition of ADC channel for regular group |
| bogdanm | 85:024bf7f99721 | 134 | * @note The setting of these parameters with function HAL_ADC_ConfigChannel() is conditioned to ADC state. |
| bogdanm | 85:024bf7f99721 | 135 | * ADC state can be either: |
| bogdanm | 85:024bf7f99721 | 136 | * - For all parameters: ADC disabled or enabled without conversion on going on regular group. |
| bogdanm | 85:024bf7f99721 | 137 | * If ADC is not in the appropriate state to modify some parameters, these parameters setting is bypassed |
| bogdanm | 85:024bf7f99721 | 138 | * without error reporting (as it can be the expected behaviour in case of intended action to update another parameter (which fulfills the ADC state condition) on the fly). |
| bogdanm | 85:024bf7f99721 | 139 | */ |
| bogdanm | 85:024bf7f99721 | 140 | typedef struct |
| bogdanm | 85:024bf7f99721 | 141 | { |
| bogdanm | 85:024bf7f99721 | 142 | uint32_t Channel; /*!< Specifies the channel to configure into ADC regular group. |
| bogdanm | 85:024bf7f99721 | 143 | This parameter can be a value of @ref ADC_channels |
| bogdanm | 85:024bf7f99721 | 144 | Note: Depending on devices, some channels may not be available on package pins. Refer to device datasheet for channels availability. */ |
| bogdanm | 85:024bf7f99721 | 145 | uint32_t Rank; /*!< Add or remove the channel from ADC regular group sequencer. |
| Kojto | 108:34e6b704fe68 | 146 | On STM32F0 devices, number of ranks in the sequence is defined by number of channels enabled, rank of each channel is defined by channel number (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...).. |
| bogdanm | 85:024bf7f99721 | 147 | Despite the channel rank is fixed, this parameter allow an additional possibility: to remove the selected rank (selected channel) from sequencer. |
| bogdanm | 85:024bf7f99721 | 148 | This parameter can be a value of @ref ADC_rank */ |
| bogdanm | 92:4fc01daae5a5 | 149 | uint32_t SamplingTime; /*!< Sampling time value to be set for the selected channel. |
| bogdanm | 85:024bf7f99721 | 150 | Unit: ADC clock cycles |
| bogdanm | 85:024bf7f99721 | 151 | Conversion time is the addition of sampling time and processing time (12.5 ADC clock cycles at ADC resolution 12 bits, 10.5 cycles at 10 bits, 8.5 cycles at 8 bits, 6.5 cycles at 6 bits). |
| bogdanm | 85:024bf7f99721 | 152 | This parameter can be a value of @ref ADC_sampling_times |
| bogdanm | 92:4fc01daae5a5 | 153 | Caution: this setting impacts the entire regular group. Therefore, call of HAL_ADC_ConfigChannel() to configure a channel can impact the configuration of other channels previously set. |
| Kojto | 108:34e6b704fe68 | 154 | Caution: Obsolete parameter. Use parameter "SamplingTimeCommon" in ADC initialization structure. |
| Kojto | 108:34e6b704fe68 | 155 | If parameter "SamplingTimeCommon" is set to a valid sampling time, parameter "SamplingTime" is discarded. |
| bogdanm | 85:024bf7f99721 | 156 | Note: In case of usage of internal measurement channels (VrefInt/Vbat/TempSensor), |
| bogdanm | 85:024bf7f99721 | 157 | sampling time constraints must be respected (sampling time can be adjusted in function of ADC clock frequency and sampling time setting) |
| bogdanm | 85:024bf7f99721 | 158 | Refer to device datasheet for timings values, parameters TS_vrefint, TS_vbat, TS_temp (values rough order: 5us to 17us). */ |
| bogdanm | 85:024bf7f99721 | 159 | }ADC_ChannelConfTypeDef; |
| bogdanm | 85:024bf7f99721 | 160 | |
| bogdanm | 85:024bf7f99721 | 161 | /** |
| bogdanm | 85:024bf7f99721 | 162 | * @brief Structure definition of ADC analog watchdog |
| bogdanm | 85:024bf7f99721 | 163 | * @note The setting of these parameters with function HAL_ADC_AnalogWDGConfig() is conditioned to ADC state. |
| bogdanm | 85:024bf7f99721 | 164 | * ADC state can be either: ADC disabled or ADC enabled without conversion on going on regular group. |
| bogdanm | 85:024bf7f99721 | 165 | */ |
| bogdanm | 85:024bf7f99721 | 166 | typedef struct |
| bogdanm | 85:024bf7f99721 | 167 | { |
| bogdanm | 85:024bf7f99721 | 168 | uint32_t WatchdogMode; /*!< Configures the ADC analog watchdog mode: single/all/none channels. |
| bogdanm | 85:024bf7f99721 | 169 | This parameter can be a value of @ref ADC_analog_watchdog_mode. */ |
| bogdanm | 85:024bf7f99721 | 170 | uint32_t Channel; /*!< Selects which ADC channel to monitor by analog watchdog. |
| bogdanm | 85:024bf7f99721 | 171 | This parameter has an effect only if parameter 'WatchdogMode' is configured on single channel. Only 1 channel can be monitored. |
| bogdanm | 85:024bf7f99721 | 172 | This parameter can be a value of @ref ADC_channels. */ |
| bogdanm | 85:024bf7f99721 | 173 | uint32_t ITMode; /*!< Specifies whether the analog watchdog is configured in interrupt or polling mode. |
| bogdanm | 85:024bf7f99721 | 174 | This parameter can be set to ENABLE or DISABLE */ |
| bogdanm | 85:024bf7f99721 | 175 | uint32_t HighThreshold; /*!< Configures the ADC analog watchdog High threshold value. |
| bogdanm | 85:024bf7f99721 | 176 | Depending of ADC resolution selected (12, 10, 8 or 6 bits), this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF, 0x3FF, 0xFF or 0x3F respectively. */ |
| bogdanm | 85:024bf7f99721 | 177 | uint32_t LowThreshold; /*!< Configures the ADC analog watchdog High threshold value. |
| bogdanm | 85:024bf7f99721 | 178 | Depending of ADC resolution selected (12, 10, 8 or 6 bits), this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF, 0x3FF, 0xFF or 0x3F respectively. */ |
| bogdanm | 85:024bf7f99721 | 179 | }ADC_AnalogWDGConfTypeDef; |
| bogdanm | 85:024bf7f99721 | 180 | |
| bogdanm | 85:024bf7f99721 | 181 | /** |
| Kojto | 108:34e6b704fe68 | 182 | * @brief HAL ADC state machine: ADC states definition (bitfields) |
| bogdanm | 85:024bf7f99721 | 183 | */ |
| Kojto | 108:34e6b704fe68 | 184 | /* States of ADC global scope */ |
| Kojto | 108:34e6b704fe68 | 185 | #define HAL_ADC_STATE_RESET ((uint32_t)0x00000000) /*!< ADC not yet initialized or disabled */ |
| Kojto | 108:34e6b704fe68 | 186 | #define HAL_ADC_STATE_READY ((uint32_t)0x00000001) /*!< ADC peripheral ready for use */ |
| Kojto | 108:34e6b704fe68 | 187 | #define HAL_ADC_STATE_BUSY_INTERNAL ((uint32_t)0x00000002) /*!< ADC is busy to internal process (initialization, calibration) */ |
| Kojto | 108:34e6b704fe68 | 188 | #define HAL_ADC_STATE_TIMEOUT ((uint32_t)0x00000004) /*!< TimeOut occurrence */ |
| Kojto | 108:34e6b704fe68 | 189 | |
| Kojto | 108:34e6b704fe68 | 190 | /* States of ADC errors */ |
| Kojto | 108:34e6b704fe68 | 191 | #define HAL_ADC_STATE_ERROR_INTERNAL ((uint32_t)0x00000010) /*!< Internal error occurrence */ |
| Kojto | 108:34e6b704fe68 | 192 | #define HAL_ADC_STATE_ERROR_CONFIG ((uint32_t)0x00000020) /*!< Configuration error occurrence */ |
| Kojto | 108:34e6b704fe68 | 193 | #define HAL_ADC_STATE_ERROR_DMA ((uint32_t)0x00000040) /*!< DMA error occurrence */ |
| Kojto | 108:34e6b704fe68 | 194 | |
| Kojto | 108:34e6b704fe68 | 195 | /* States of ADC group regular */ |
| Kojto | 108:34e6b704fe68 | 196 | #define HAL_ADC_STATE_REG_BUSY ((uint32_t)0x00000100) /*!< A conversion on group regular is ongoing or can occur (either by continuous mode, |
| Kojto | 108:34e6b704fe68 | 197 | external trigger, low power auto power-on, multimode ADC master control) */ |
| Kojto | 108:34e6b704fe68 | 198 | #define HAL_ADC_STATE_REG_EOC ((uint32_t)0x00000200) /*!< Conversion data available on group regular */ |
| Kojto | 108:34e6b704fe68 | 199 | #define HAL_ADC_STATE_REG_OVR ((uint32_t)0x00000400) /*!< Overrun occurrence */ |
| Kojto | 108:34e6b704fe68 | 200 | #define HAL_ADC_STATE_REG_EOSMP ((uint32_t)0x00000800) /*!< Not available on STM32F0 device: End Of Sampling flag raised */ |
| Kojto | 108:34e6b704fe68 | 201 | |
| Kojto | 108:34e6b704fe68 | 202 | /* States of ADC group injected */ |
| Kojto | 108:34e6b704fe68 | 203 | #define HAL_ADC_STATE_INJ_BUSY ((uint32_t)0x00001000) /*!< Not available on STM32F0 device: A conversion on group injected is ongoing or can occur (either by auto-injection mode, |
| Kojto | 108:34e6b704fe68 | 204 | external trigger, low power auto power-on, multimode ADC master control) */ |
| Kojto | 108:34e6b704fe68 | 205 | #define HAL_ADC_STATE_INJ_EOC ((uint32_t)0x00002000) /*!< Not available on STM32F0 device: Conversion data available on group injected */ |
| Kojto | 108:34e6b704fe68 | 206 | #define HAL_ADC_STATE_INJ_JQOVF ((uint32_t)0x00004000) /*!< Not available on STM32F0 device: Not available on STM32F0 device: Injected queue overflow occurrence */ |
| Kojto | 108:34e6b704fe68 | 207 | |
| Kojto | 108:34e6b704fe68 | 208 | /* States of ADC analog watchdogs */ |
| Kojto | 108:34e6b704fe68 | 209 | #define HAL_ADC_STATE_AWD1 ((uint32_t)0x00010000) /*!< Out-of-window occurrence of analog watchdog 1 */ |
| Kojto | 108:34e6b704fe68 | 210 | #define HAL_ADC_STATE_AWD2 ((uint32_t)0x00020000) /*!< Not available on STM32F0 device: Out-of-window occurrence of analog watchdog 2 */ |
| Kojto | 108:34e6b704fe68 | 211 | #define HAL_ADC_STATE_AWD3 ((uint32_t)0x00040000) /*!< Not available on STM32F0 device: Out-of-window occurrence of analog watchdog 3 */ |
| Kojto | 108:34e6b704fe68 | 212 | |
| Kojto | 108:34e6b704fe68 | 213 | /* States of ADC multi-mode */ |
| Kojto | 108:34e6b704fe68 | 214 | #define HAL_ADC_STATE_MULTIMODE_SLAVE ((uint32_t)0x00100000) /*!< Not available on STM32F0 device: ADC in multimode slave state, controlled by another ADC master ( */ |
| Kojto | 108:34e6b704fe68 | 215 | |
| bogdanm | 85:024bf7f99721 | 216 | |
| bogdanm | 85:024bf7f99721 | 217 | /** |
| bogdanm | 85:024bf7f99721 | 218 | * @brief ADC handle Structure definition |
| bogdanm | 85:024bf7f99721 | 219 | */ |
| bogdanm | 85:024bf7f99721 | 220 | typedef struct |
| bogdanm | 85:024bf7f99721 | 221 | { |
| bogdanm | 85:024bf7f99721 | 222 | ADC_TypeDef *Instance; /*!< Register base address */ |
| bogdanm | 85:024bf7f99721 | 223 | |
| bogdanm | 85:024bf7f99721 | 224 | ADC_InitTypeDef Init; /*!< ADC required parameters */ |
| bogdanm | 85:024bf7f99721 | 225 | |
| bogdanm | 85:024bf7f99721 | 226 | DMA_HandleTypeDef *DMA_Handle; /*!< Pointer DMA Handler */ |
| bogdanm | 85:024bf7f99721 | 227 | |
| bogdanm | 85:024bf7f99721 | 228 | HAL_LockTypeDef Lock; /*!< ADC locking object */ |
| bogdanm | 85:024bf7f99721 | 229 | |
| Kojto | 108:34e6b704fe68 | 230 | __IO uint32_t State; /*!< ADC communication state (bitmap of ADC states) */ |
| bogdanm | 85:024bf7f99721 | 231 | |
| bogdanm | 85:024bf7f99721 | 232 | __IO uint32_t ErrorCode; /*!< ADC Error code */ |
| bogdanm | 85:024bf7f99721 | 233 | }ADC_HandleTypeDef; |
| bogdanm | 92:4fc01daae5a5 | 234 | /** |
| bogdanm | 92:4fc01daae5a5 | 235 | * @} |
| bogdanm | 92:4fc01daae5a5 | 236 | */ |
| bogdanm | 92:4fc01daae5a5 | 237 | |
| bogdanm | 92:4fc01daae5a5 | 238 | |
| bogdanm | 85:024bf7f99721 | 239 | |
| bogdanm | 85:024bf7f99721 | 240 | /* Exported constants --------------------------------------------------------*/ |
| bogdanm | 85:024bf7f99721 | 241 | |
| bogdanm | 92:4fc01daae5a5 | 242 | /** @defgroup ADC_Exported_Constants ADC Exported Constants |
| bogdanm | 85:024bf7f99721 | 243 | * @{ |
| bogdanm | 85:024bf7f99721 | 244 | */ |
| bogdanm | 85:024bf7f99721 | 245 | |
| bogdanm | 92:4fc01daae5a5 | 246 | /** @defgroup ADC_Error_Code ADC Error Code |
| bogdanm | 85:024bf7f99721 | 247 | * @{ |
| bogdanm | 85:024bf7f99721 | 248 | */ |
| bogdanm | 85:024bf7f99721 | 249 | #define HAL_ADC_ERROR_NONE ((uint32_t)0x00) /*!< No error */ |
| bogdanm | 85:024bf7f99721 | 250 | #define HAL_ADC_ERROR_INTERNAL ((uint32_t)0x01) /*!< ADC IP internal error: if problem of clocking, |
| bogdanm | 85:024bf7f99721 | 251 | enable/disable, erroneous state */ |
| bogdanm | 85:024bf7f99721 | 252 | #define HAL_ADC_ERROR_OVR ((uint32_t)0x02) /*!< Overrun error */ |
| bogdanm | 92:4fc01daae5a5 | 253 | #define HAL_ADC_ERROR_DMA ((uint32_t)0x04) /*!< DMA transfer error */ |
| bogdanm | 85:024bf7f99721 | 254 | |
| bogdanm | 85:024bf7f99721 | 255 | /** |
| bogdanm | 85:024bf7f99721 | 256 | * @} |
| bogdanm | 85:024bf7f99721 | 257 | */ |
| bogdanm | 85:024bf7f99721 | 258 | |
| bogdanm | 92:4fc01daae5a5 | 259 | /** @defgroup ADC_ClockPrescaler ADC ClockPrescaler |
| bogdanm | 85:024bf7f99721 | 260 | * @{ |
| bogdanm | 85:024bf7f99721 | 261 | */ |
| Kojto | 108:34e6b704fe68 | 262 | #define ADC_CLOCK_ASYNC_DIV1 ((uint32_t)0x00000000) /*!< ADC asynchronous clock derived from ADC dedicated HSI */ |
| bogdanm | 85:024bf7f99721 | 263 | |
| bogdanm | 85:024bf7f99721 | 264 | #define ADC_CLOCK_SYNC_PCLK_DIV2 ((uint32_t)ADC_CFGR2_CKMODE_0) /*!< ADC synchronous clock derived from AHB clock divided by a prescaler of 2 */ |
| bogdanm | 85:024bf7f99721 | 265 | #define ADC_CLOCK_SYNC_PCLK_DIV4 ((uint32_t)ADC_CFGR2_CKMODE_1) /*!< ADC synchronous clock derived from AHB clock divided by a prescaler of 4 */ |
| bogdanm | 85:024bf7f99721 | 266 | |
| bogdanm | 85:024bf7f99721 | 267 | /** |
| bogdanm | 85:024bf7f99721 | 268 | * @} |
| bogdanm | 85:024bf7f99721 | 269 | */ |
| bogdanm | 85:024bf7f99721 | 270 | |
| bogdanm | 92:4fc01daae5a5 | 271 | /** @defgroup ADC_Resolution ADC Resolution |
| bogdanm | 85:024bf7f99721 | 272 | * @{ |
| bogdanm | 85:024bf7f99721 | 273 | */ |
| Kojto | 108:34e6b704fe68 | 274 | #define ADC_RESOLUTION_12B ((uint32_t)0x00000000) /*!< ADC 12-bit resolution */ |
| Kojto | 108:34e6b704fe68 | 275 | #define ADC_RESOLUTION_10B ((uint32_t)ADC_CFGR1_RES_0) /*!< ADC 10-bit resolution */ |
| Kojto | 108:34e6b704fe68 | 276 | #define ADC_RESOLUTION_8B ((uint32_t)ADC_CFGR1_RES_1) /*!< ADC 8-bit resolution */ |
| Kojto | 108:34e6b704fe68 | 277 | #define ADC_RESOLUTION_6B ((uint32_t)ADC_CFGR1_RES) /*!< ADC 6-bit resolution */ |
| bogdanm | 85:024bf7f99721 | 278 | /** |
| bogdanm | 85:024bf7f99721 | 279 | * @} |
| bogdanm | 85:024bf7f99721 | 280 | */ |
| bogdanm | 85:024bf7f99721 | 281 | |
| bogdanm | 92:4fc01daae5a5 | 282 | /** @defgroup ADC_Data_align ADC Data_align |
| bogdanm | 85:024bf7f99721 | 283 | * @{ |
| bogdanm | 85:024bf7f99721 | 284 | */ |
| bogdanm | 85:024bf7f99721 | 285 | #define ADC_DATAALIGN_RIGHT ((uint32_t)0x00000000) |
| bogdanm | 85:024bf7f99721 | 286 | #define ADC_DATAALIGN_LEFT ((uint32_t)ADC_CFGR1_ALIGN) |
| bogdanm | 85:024bf7f99721 | 287 | /** |
| bogdanm | 85:024bf7f99721 | 288 | * @} |
| bogdanm | 85:024bf7f99721 | 289 | */ |
| bogdanm | 85:024bf7f99721 | 290 | |
| bogdanm | 92:4fc01daae5a5 | 291 | /** @defgroup ADC_Scan_mode ADC Scan mode |
| bogdanm | 85:024bf7f99721 | 292 | * @{ |
| bogdanm | 85:024bf7f99721 | 293 | */ |
| bogdanm | 85:024bf7f99721 | 294 | /* Note: Scan mode values must be compatible with other STM32 devices having */ |
| bogdanm | 85:024bf7f99721 | 295 | /* a configurable sequencer. */ |
| bogdanm | 85:024bf7f99721 | 296 | /* Scan direction setting values are defined by taking in account */ |
| bogdanm | 85:024bf7f99721 | 297 | /* already defined values for other STM32 devices: */ |
| bogdanm | 85:024bf7f99721 | 298 | /* ADC_SCAN_DISABLE ((uint32_t)0x00000000) */ |
| bogdanm | 85:024bf7f99721 | 299 | /* ADC_SCAN_ENABLE ((uint32_t)0x00000001) */ |
| bogdanm | 85:024bf7f99721 | 300 | /* Scan direction forward is considered as default setting equivalent */ |
| bogdanm | 85:024bf7f99721 | 301 | /* to scan enable. */ |
| bogdanm | 85:024bf7f99721 | 302 | /* Scan direction backward is considered as additional setting. */ |
| bogdanm | 85:024bf7f99721 | 303 | /* In case of migration from another STM32 device, the user will be */ |
| bogdanm | 85:024bf7f99721 | 304 | /* warned of change of setting choices with assert check. */ |
| bogdanm | 85:024bf7f99721 | 305 | #define ADC_SCAN_DIRECTION_FORWARD ((uint32_t)0x00000001) /*!< Scan direction forward: from channel 0 to channel 18 */ |
| bogdanm | 85:024bf7f99721 | 306 | #define ADC_SCAN_DIRECTION_BACKWARD ((uint32_t)0x00000002) /*!< Scan direction backward: from channel 18 to channel 0 */ |
| bogdanm | 85:024bf7f99721 | 307 | |
| bogdanm | 85:024bf7f99721 | 308 | #define ADC_SCAN_ENABLE ADC_SCAN_DIRECTION_FORWARD /* For compatibility with other STM32 devices */ |
| bogdanm | 85:024bf7f99721 | 309 | |
| bogdanm | 85:024bf7f99721 | 310 | /** |
| bogdanm | 85:024bf7f99721 | 311 | * @} |
| bogdanm | 85:024bf7f99721 | 312 | */ |
| bogdanm | 85:024bf7f99721 | 313 | |
| bogdanm | 92:4fc01daae5a5 | 314 | /** @defgroup ADC_External_trigger_edge_Regular ADC External trigger edge Regular |
| bogdanm | 85:024bf7f99721 | 315 | * @{ |
| bogdanm | 85:024bf7f99721 | 316 | */ |
| bogdanm | 85:024bf7f99721 | 317 | #define ADC_EXTERNALTRIGCONVEDGE_NONE ((uint32_t)0x00000000) |
| bogdanm | 85:024bf7f99721 | 318 | #define ADC_EXTERNALTRIGCONVEDGE_RISING ((uint32_t)ADC_CFGR1_EXTEN_0) |
| bogdanm | 85:024bf7f99721 | 319 | #define ADC_EXTERNALTRIGCONVEDGE_FALLING ((uint32_t)ADC_CFGR1_EXTEN_1) |
| bogdanm | 85:024bf7f99721 | 320 | #define ADC_EXTERNALTRIGCONVEDGE_RISINGFALLING ((uint32_t)ADC_CFGR1_EXTEN) |
| bogdanm | 85:024bf7f99721 | 321 | /** |
| bogdanm | 85:024bf7f99721 | 322 | * @} |
| bogdanm | 85:024bf7f99721 | 323 | */ |
| bogdanm | 85:024bf7f99721 | 324 | |
| bogdanm | 92:4fc01daae5a5 | 325 | /** @defgroup ADC_EOCSelection ADC EOCSelection |
| bogdanm | 85:024bf7f99721 | 326 | * @{ |
| bogdanm | 85:024bf7f99721 | 327 | */ |
| Kojto | 108:34e6b704fe68 | 328 | #define ADC_EOC_SINGLE_CONV ((uint32_t) ADC_ISR_EOC) |
| Kojto | 108:34e6b704fe68 | 329 | #define ADC_EOC_SEQ_CONV ((uint32_t) ADC_ISR_EOS) |
| Kojto | 108:34e6b704fe68 | 330 | #define ADC_EOC_SINGLE_SEQ_CONV ((uint32_t)(ADC_ISR_EOC | ADC_ISR_EOS)) /*!< reserved for future use */ |
| bogdanm | 85:024bf7f99721 | 331 | /** |
| bogdanm | 85:024bf7f99721 | 332 | * @} |
| bogdanm | 85:024bf7f99721 | 333 | */ |
| bogdanm | 85:024bf7f99721 | 334 | |
| bogdanm | 92:4fc01daae5a5 | 335 | /** @defgroup ADC_Overrun ADC Overrun |
| bogdanm | 85:024bf7f99721 | 336 | * @{ |
| bogdanm | 85:024bf7f99721 | 337 | */ |
| Kojto | 108:34e6b704fe68 | 338 | #define ADC_OVR_DATA_OVERWRITTEN ((uint32_t)0x00000000) |
| Kojto | 108:34e6b704fe68 | 339 | #define ADC_OVR_DATA_PRESERVED ((uint32_t)0x00000001) |
| bogdanm | 85:024bf7f99721 | 340 | /** |
| bogdanm | 85:024bf7f99721 | 341 | * @} |
| bogdanm | 85:024bf7f99721 | 342 | */ |
| bogdanm | 85:024bf7f99721 | 343 | |
| bogdanm | 92:4fc01daae5a5 | 344 | /** @defgroup ADC_rank ADC rank |
| bogdanm | 85:024bf7f99721 | 345 | * @{ |
| bogdanm | 85:024bf7f99721 | 346 | */ |
| Kojto | 108:34e6b704fe68 | 347 | #define ADC_RANK_CHANNEL_NUMBER ((uint32_t)0x00001000) /*!< Enable the rank of the selected channels. Number of ranks in the sequence is defined by number of channels enabled, rank of each channel is defined by channel number (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...) */ |
| bogdanm | 85:024bf7f99721 | 348 | #define ADC_RANK_NONE ((uint32_t)0x00001001) /*!< Disable the selected rank (selected channel) from sequencer */ |
| bogdanm | 85:024bf7f99721 | 349 | /** |
| bogdanm | 85:024bf7f99721 | 350 | * @} |
| bogdanm | 85:024bf7f99721 | 351 | */ |
| bogdanm | 85:024bf7f99721 | 352 | |
| bogdanm | 92:4fc01daae5a5 | 353 | /** @defgroup ADC_sampling_times ADC sampling times |
| bogdanm | 85:024bf7f99721 | 354 | * @{ |
| Kojto | 108:34e6b704fe68 | 355 | */ |
| Kojto | 108:34e6b704fe68 | 356 | /* Note: Parameter "ADC_SAMPLETIME_1CYCLE_5" defined with a dummy bit */ |
| Kojto | 108:34e6b704fe68 | 357 | /* to distinguish this parameter versus reset value 0x00000000, */ |
| Kojto | 108:34e6b704fe68 | 358 | /* in the context of management of parameters "SamplingTimeCommon" */ |
| Kojto | 108:34e6b704fe68 | 359 | /* and "SamplingTime" (obsolete)). */ |
| Kojto | 108:34e6b704fe68 | 360 | #define ADC_SAMPLETIME_1CYCLE_5 ((uint32_t)0x10000000) /*!< Sampling time 1.5 ADC clock cycle */ |
| bogdanm | 85:024bf7f99721 | 361 | #define ADC_SAMPLETIME_7CYCLES_5 ((uint32_t) ADC_SMPR_SMP_0) /*!< Sampling time 7.5 ADC clock cycles */ |
| bogdanm | 85:024bf7f99721 | 362 | #define ADC_SAMPLETIME_13CYCLES_5 ((uint32_t) ADC_SMPR_SMP_1) /*!< Sampling time 13.5 ADC clock cycles */ |
| bogdanm | 85:024bf7f99721 | 363 | #define ADC_SAMPLETIME_28CYCLES_5 ((uint32_t)(ADC_SMPR_SMP_1 | ADC_SMPR_SMP_0)) /*!< Sampling time 28.5 ADC clock cycles */ |
| bogdanm | 85:024bf7f99721 | 364 | #define ADC_SAMPLETIME_41CYCLES_5 ((uint32_t) ADC_SMPR_SMP_2) /*!< Sampling time 41.5 ADC clock cycles */ |
| bogdanm | 85:024bf7f99721 | 365 | #define ADC_SAMPLETIME_55CYCLES_5 ((uint32_t)(ADC_SMPR_SMP_2 | ADC_SMPR_SMP_0)) /*!< Sampling time 55.5 ADC clock cycles */ |
| bogdanm | 85:024bf7f99721 | 366 | #define ADC_SAMPLETIME_71CYCLES_5 ((uint32_t)(ADC_SMPR_SMP_2 | ADC_SMPR_SMP_1)) /*!< Sampling time 71.5 ADC clock cycles */ |
| bogdanm | 85:024bf7f99721 | 367 | #define ADC_SAMPLETIME_239CYCLES_5 ((uint32_t) ADC_SMPR_SMP) /*!< Sampling time 239.5 ADC clock cycles */ |
| bogdanm | 85:024bf7f99721 | 368 | /** |
| bogdanm | 85:024bf7f99721 | 369 | * @} |
| bogdanm | 85:024bf7f99721 | 370 | */ |
| bogdanm | 85:024bf7f99721 | 371 | |
| bogdanm | 92:4fc01daae5a5 | 372 | /** @defgroup ADC_analog_watchdog_mode ADC analog watchdog mode |
| bogdanm | 85:024bf7f99721 | 373 | * @{ |
| bogdanm | 85:024bf7f99721 | 374 | */ |
| bogdanm | 85:024bf7f99721 | 375 | #define ADC_ANALOGWATCHDOG_NONE ((uint32_t) 0x00000000) |
| bogdanm | 85:024bf7f99721 | 376 | #define ADC_ANALOGWATCHDOG_SINGLE_REG ((uint32_t)(ADC_CFGR1_AWDSGL | ADC_CFGR1_AWDEN)) |
| bogdanm | 85:024bf7f99721 | 377 | #define ADC_ANALOGWATCHDOG_ALL_REG ((uint32_t) ADC_CFGR1_AWDEN) |
| bogdanm | 85:024bf7f99721 | 378 | /** |
| bogdanm | 85:024bf7f99721 | 379 | * @} |
| bogdanm | 85:024bf7f99721 | 380 | */ |
| bogdanm | 85:024bf7f99721 | 381 | |
| bogdanm | 92:4fc01daae5a5 | 382 | /** @defgroup ADC_Event_type ADC Event type |
| bogdanm | 85:024bf7f99721 | 383 | * @{ |
| bogdanm | 85:024bf7f99721 | 384 | */ |
| Kojto | 108:34e6b704fe68 | 385 | #define ADC_AWD_EVENT ((uint32_t)ADC_FLAG_AWD) /*!< ADC Analog watchdog 1 event */ |
| Kojto | 108:34e6b704fe68 | 386 | #define ADC_OVR_EVENT ((uint32_t)ADC_FLAG_OVR) /*!< ADC overrun event */ |
| bogdanm | 85:024bf7f99721 | 387 | /** |
| bogdanm | 85:024bf7f99721 | 388 | * @} |
| bogdanm | 85:024bf7f99721 | 389 | */ |
| bogdanm | 85:024bf7f99721 | 390 | |
| bogdanm | 92:4fc01daae5a5 | 391 | /** @defgroup ADC_interrupts_definition ADC interrupts definition |
| bogdanm | 85:024bf7f99721 | 392 | * @{ |
| bogdanm | 85:024bf7f99721 | 393 | */ |
| bogdanm | 85:024bf7f99721 | 394 | #define ADC_IT_AWD ADC_IER_AWDIE /*!< ADC Analog watchdog interrupt source */ |
| bogdanm | 85:024bf7f99721 | 395 | #define ADC_IT_OVR ADC_IER_OVRIE /*!< ADC overrun interrupt source */ |
| bogdanm | 85:024bf7f99721 | 396 | #define ADC_IT_EOS ADC_IER_EOSEQIE /*!< ADC End of Regular sequence of Conversions interrupt source */ |
| bogdanm | 85:024bf7f99721 | 397 | #define ADC_IT_EOC ADC_IER_EOCIE /*!< ADC End of Regular Conversion interrupt source */ |
| bogdanm | 85:024bf7f99721 | 398 | #define ADC_IT_EOSMP ADC_IER_EOSMPIE /*!< ADC End of Sampling interrupt source */ |
| bogdanm | 85:024bf7f99721 | 399 | #define ADC_IT_RDY ADC_IER_ADRDYIE /*!< ADC Ready interrupt source */ |
| bogdanm | 85:024bf7f99721 | 400 | /** |
| bogdanm | 85:024bf7f99721 | 401 | * @} |
| bogdanm | 85:024bf7f99721 | 402 | */ |
| bogdanm | 85:024bf7f99721 | 403 | |
| bogdanm | 92:4fc01daae5a5 | 404 | /** @defgroup ADC_flags_definition ADC flags definition |
| bogdanm | 85:024bf7f99721 | 405 | * @{ |
| bogdanm | 85:024bf7f99721 | 406 | */ |
| bogdanm | 85:024bf7f99721 | 407 | #define ADC_FLAG_AWD ADC_ISR_AWD /*!< ADC Analog watchdog flag */ |
| bogdanm | 85:024bf7f99721 | 408 | #define ADC_FLAG_OVR ADC_ISR_OVR /*!< ADC overrun flag */ |
| bogdanm | 85:024bf7f99721 | 409 | #define ADC_FLAG_EOS ADC_ISR_EOSEQ /*!< ADC End of Regular sequence of Conversions flag */ |
| bogdanm | 85:024bf7f99721 | 410 | #define ADC_FLAG_EOC ADC_ISR_EOC /*!< ADC End of Regular Conversion flag */ |
| bogdanm | 85:024bf7f99721 | 411 | #define ADC_FLAG_EOSMP ADC_ISR_EOSMP /*!< ADC End of Sampling flag */ |
| bogdanm | 85:024bf7f99721 | 412 | #define ADC_FLAG_RDY ADC_ISR_ADRDY /*!< ADC Ready flag */ |
| bogdanm | 85:024bf7f99721 | 413 | /** |
| bogdanm | 85:024bf7f99721 | 414 | * @} |
| bogdanm | 85:024bf7f99721 | 415 | */ |
| bogdanm | 85:024bf7f99721 | 416 | |
| Kojto | 108:34e6b704fe68 | 417 | /** |
| Kojto | 108:34e6b704fe68 | 418 | * @} |
| bogdanm | 85:024bf7f99721 | 419 | */ |
| Kojto | 108:34e6b704fe68 | 420 | |
| Kojto | 108:34e6b704fe68 | 421 | |
| Kojto | 108:34e6b704fe68 | 422 | /* Private constants ---------------------------------------------------------*/ |
| Kojto | 108:34e6b704fe68 | 423 | |
| Kojto | 108:34e6b704fe68 | 424 | /** @addtogroup ADC_Private_Constants ADC Private Constants |
| Kojto | 108:34e6b704fe68 | 425 | * @{ |
| Kojto | 108:34e6b704fe68 | 426 | */ |
| Kojto | 108:34e6b704fe68 | 427 | |
| Kojto | 108:34e6b704fe68 | 428 | /** @defgroup ADC_Internal_HAL_driver_Ext_trig_src_Regular ADC Internal HAL driver Ext trig src Regular |
| Kojto | 108:34e6b704fe68 | 429 | * @{ |
| Kojto | 108:34e6b704fe68 | 430 | */ |
| Kojto | 108:34e6b704fe68 | 431 | |
| Kojto | 108:34e6b704fe68 | 432 | /* List of external triggers of regular group for ADC1: */ |
| Kojto | 108:34e6b704fe68 | 433 | /* (used internally by HAL driver. To not use into HAL structure parameters) */ |
| Kojto | 108:34e6b704fe68 | 434 | #define ADC1_2_EXTERNALTRIG_T1_TRGO ((uint32_t)0x00000000) |
| Kojto | 108:34e6b704fe68 | 435 | #define ADC1_2_EXTERNALTRIG_T1_CC4 ((uint32_t)ADC_CFGR1_EXTSEL_0) |
| Kojto | 108:34e6b704fe68 | 436 | #define ADC1_2_EXTERNALTRIG_T2_TRGO ((uint32_t)ADC_CFGR1_EXTSEL_1) |
| Kojto | 108:34e6b704fe68 | 437 | #define ADC1_2_EXTERNALTRIG_T3_TRGO ((uint32_t)(ADC_CFGR1_EXTSEL_1 | ADC_CFGR1_EXTSEL_0)) |
| Kojto | 108:34e6b704fe68 | 438 | #define ADC1_2_EXTERNALTRIG_T15_TRGO ((uint32_t)ADC_CFGR1_EXTSEL_2) |
| bogdanm | 85:024bf7f99721 | 439 | /** |
| bogdanm | 85:024bf7f99721 | 440 | * @} |
| bogdanm | 85:024bf7f99721 | 441 | */ |
| bogdanm | 85:024bf7f99721 | 442 | |
| Kojto | 108:34e6b704fe68 | 443 | /* Combination of all post-conversion flags bits: EOC/EOS, OVR, AWD */ |
| Kojto | 108:34e6b704fe68 | 444 | #define ADC_FLAG_POSTCONV_ALL (ADC_FLAG_AWD | ADC_FLAG_OVR | ADC_FLAG_EOS | ADC_FLAG_EOC) |
| bogdanm | 85:024bf7f99721 | 445 | |
| bogdanm | 85:024bf7f99721 | 446 | /** |
| bogdanm | 85:024bf7f99721 | 447 | * @} |
| Kojto | 108:34e6b704fe68 | 448 | */ |
| Kojto | 108:34e6b704fe68 | 449 | |
| Kojto | 108:34e6b704fe68 | 450 | |
| Kojto | 108:34e6b704fe68 | 451 | /* Exported macro ------------------------------------------------------------*/ |
| bogdanm | 85:024bf7f99721 | 452 | |
| bogdanm | 92:4fc01daae5a5 | 453 | /** @defgroup ADC_Exported_Macros ADC Exported Macros |
| bogdanm | 85:024bf7f99721 | 454 | * @{ |
| bogdanm | 85:024bf7f99721 | 455 | */ |
| Kojto | 108:34e6b704fe68 | 456 | /* Macro for internal HAL driver usage, and possibly can be used into code of */ |
| Kojto | 108:34e6b704fe68 | 457 | /* final user. */ |
| Kojto | 108:34e6b704fe68 | 458 | |
| Kojto | 108:34e6b704fe68 | 459 | /** |
| Kojto | 108:34e6b704fe68 | 460 | * @brief Enable the ADC peripheral |
| Kojto | 108:34e6b704fe68 | 461 | * @param __HANDLE__: ADC handle |
| Kojto | 108:34e6b704fe68 | 462 | * @retval None |
| Kojto | 108:34e6b704fe68 | 463 | */ |
| Kojto | 108:34e6b704fe68 | 464 | #define __HAL_ADC_ENABLE(__HANDLE__) \ |
| Kojto | 108:34e6b704fe68 | 465 | ((__HANDLE__)->Instance->CR |= ADC_CR_ADEN) |
| Kojto | 108:34e6b704fe68 | 466 | |
| Kojto | 108:34e6b704fe68 | 467 | /** |
| Kojto | 108:34e6b704fe68 | 468 | * @brief Disable the ADC peripheral |
| Kojto | 108:34e6b704fe68 | 469 | * @param __HANDLE__: ADC handle |
| Kojto | 108:34e6b704fe68 | 470 | * @retval None |
| Kojto | 108:34e6b704fe68 | 471 | */ |
| Kojto | 108:34e6b704fe68 | 472 | #define __HAL_ADC_DISABLE(__HANDLE__) \ |
| Kojto | 108:34e6b704fe68 | 473 | do{ \ |
| Kojto | 108:34e6b704fe68 | 474 | (__HANDLE__)->Instance->CR |= ADC_CR_ADDIS; \ |
| Kojto | 108:34e6b704fe68 | 475 | __HAL_ADC_CLEAR_FLAG((__HANDLE__), (ADC_FLAG_EOSMP | ADC_FLAG_RDY)); \ |
| Kojto | 108:34e6b704fe68 | 476 | } while(0) |
| Kojto | 108:34e6b704fe68 | 477 | |
| Kojto | 108:34e6b704fe68 | 478 | /** |
| Kojto | 108:34e6b704fe68 | 479 | * @brief Enable the ADC end of conversion interrupt. |
| Kojto | 108:34e6b704fe68 | 480 | * @param __HANDLE__: ADC handle |
| Kojto | 108:34e6b704fe68 | 481 | * @param __INTERRUPT__: ADC Interrupt |
| Kojto | 108:34e6b704fe68 | 482 | * This parameter can be any combination of the following values: |
| Kojto | 108:34e6b704fe68 | 483 | * @arg ADC_IT_EOC: ADC End of Regular Conversion interrupt source |
| Kojto | 108:34e6b704fe68 | 484 | * @arg ADC_IT_EOS: ADC End of Regular sequence of Conversions interrupt source |
| Kojto | 108:34e6b704fe68 | 485 | * @arg ADC_IT_AWD: ADC Analog watchdog interrupt source |
| Kojto | 108:34e6b704fe68 | 486 | * @arg ADC_IT_OVR: ADC overrun interrupt source |
| Kojto | 108:34e6b704fe68 | 487 | * @arg ADC_IT_EOSMP: ADC End of Sampling interrupt source |
| Kojto | 108:34e6b704fe68 | 488 | * @arg ADC_IT_RDY: ADC Ready interrupt source |
| Kojto | 108:34e6b704fe68 | 489 | * @retval None |
| Kojto | 108:34e6b704fe68 | 490 | */ |
| Kojto | 108:34e6b704fe68 | 491 | #define __HAL_ADC_ENABLE_IT(__HANDLE__, __INTERRUPT__) \ |
| Kojto | 108:34e6b704fe68 | 492 | (((__HANDLE__)->Instance->IER) |= (__INTERRUPT__)) |
| Kojto | 108:34e6b704fe68 | 493 | |
| Kojto | 108:34e6b704fe68 | 494 | /** |
| Kojto | 108:34e6b704fe68 | 495 | * @brief Disable the ADC end of conversion interrupt. |
| Kojto | 108:34e6b704fe68 | 496 | * @param __HANDLE__: ADC handle |
| Kojto | 108:34e6b704fe68 | 497 | * @param __INTERRUPT__: ADC Interrupt |
| Kojto | 108:34e6b704fe68 | 498 | * This parameter can be any combination of the following values: |
| Kojto | 108:34e6b704fe68 | 499 | * @arg ADC_IT_EOC: ADC End of Regular Conversion interrupt source |
| Kojto | 108:34e6b704fe68 | 500 | * @arg ADC_IT_EOS: ADC End of Regular sequence of Conversions interrupt source |
| Kojto | 108:34e6b704fe68 | 501 | * @arg ADC_IT_AWD: ADC Analog watchdog interrupt source |
| Kojto | 108:34e6b704fe68 | 502 | * @arg ADC_IT_OVR: ADC overrun interrupt source |
| Kojto | 108:34e6b704fe68 | 503 | * @arg ADC_IT_EOSMP: ADC End of Sampling interrupt source |
| Kojto | 108:34e6b704fe68 | 504 | * @arg ADC_IT_RDY: ADC Ready interrupt source |
| Kojto | 108:34e6b704fe68 | 505 | * @retval None |
| Kojto | 108:34e6b704fe68 | 506 | */ |
| Kojto | 108:34e6b704fe68 | 507 | #define __HAL_ADC_DISABLE_IT(__HANDLE__, __INTERRUPT__) \ |
| Kojto | 108:34e6b704fe68 | 508 | (((__HANDLE__)->Instance->IER) &= ~(__INTERRUPT__)) |
| Kojto | 108:34e6b704fe68 | 509 | |
| Kojto | 108:34e6b704fe68 | 510 | /** @brief Checks if the specified ADC interrupt source is enabled or disabled. |
| Kojto | 108:34e6b704fe68 | 511 | * @param __HANDLE__: ADC handle |
| Kojto | 108:34e6b704fe68 | 512 | * @param __INTERRUPT__: ADC interrupt source to check |
| Kojto | 108:34e6b704fe68 | 513 | * This parameter can be any combination of the following values: |
| Kojto | 108:34e6b704fe68 | 514 | * @arg ADC_IT_EOC: ADC End of Regular Conversion interrupt source |
| Kojto | 108:34e6b704fe68 | 515 | * @arg ADC_IT_EOS: ADC End of Regular sequence of Conversions interrupt source |
| Kojto | 108:34e6b704fe68 | 516 | * @arg ADC_IT_AWD: ADC Analog watchdog interrupt source |
| Kojto | 108:34e6b704fe68 | 517 | * @arg ADC_IT_OVR: ADC overrun interrupt source |
| Kojto | 108:34e6b704fe68 | 518 | * @arg ADC_IT_EOSMP: ADC End of Sampling interrupt source |
| Kojto | 108:34e6b704fe68 | 519 | * @arg ADC_IT_RDY: ADC Ready interrupt source |
| Kojto | 108:34e6b704fe68 | 520 | * @retval State ofinterruption (SET or RESET) |
| Kojto | 108:34e6b704fe68 | 521 | */ |
| Kojto | 108:34e6b704fe68 | 522 | #define __HAL_ADC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) \ |
| Kojto | 108:34e6b704fe68 | 523 | (((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) |
| Kojto | 108:34e6b704fe68 | 524 | |
| Kojto | 108:34e6b704fe68 | 525 | /** |
| Kojto | 108:34e6b704fe68 | 526 | * @brief Get the selected ADC's flag status. |
| Kojto | 108:34e6b704fe68 | 527 | * @param __HANDLE__: ADC handle |
| Kojto | 108:34e6b704fe68 | 528 | * @param __FLAG__: ADC flag |
| Kojto | 108:34e6b704fe68 | 529 | * This parameter can be any combination of the following values: |
| Kojto | 108:34e6b704fe68 | 530 | * @arg ADC_FLAG_EOC: ADC End of Regular conversion flag |
| Kojto | 108:34e6b704fe68 | 531 | * @arg ADC_FLAG_EOS: ADC End of Regular sequence of Conversions flag |
| Kojto | 108:34e6b704fe68 | 532 | * @arg ADC_FLAG_AWD: ADC Analog watchdog flag |
| Kojto | 108:34e6b704fe68 | 533 | * @arg ADC_FLAG_OVR: ADC overrun flag |
| Kojto | 108:34e6b704fe68 | 534 | * @arg ADC_FLAG_EOSMP: ADC End of Sampling flag |
| Kojto | 108:34e6b704fe68 | 535 | * @arg ADC_FLAG_RDY: ADC Ready flag |
| Kojto | 108:34e6b704fe68 | 536 | * @retval None |
| Kojto | 108:34e6b704fe68 | 537 | */ |
| Kojto | 108:34e6b704fe68 | 538 | #define __HAL_ADC_GET_FLAG(__HANDLE__, __FLAG__) \ |
| Kojto | 108:34e6b704fe68 | 539 | ((((__HANDLE__)->Instance->ISR) & (__FLAG__)) == (__FLAG__)) |
| Kojto | 108:34e6b704fe68 | 540 | |
| Kojto | 108:34e6b704fe68 | 541 | /** |
| Kojto | 108:34e6b704fe68 | 542 | * @brief Clear the ADC's pending flags |
| Kojto | 108:34e6b704fe68 | 543 | * @param __HANDLE__: ADC handle |
| Kojto | 108:34e6b704fe68 | 544 | * @param __FLAG__: ADC flag |
| Kojto | 108:34e6b704fe68 | 545 | * This parameter can be any combination of the following values: |
| Kojto | 108:34e6b704fe68 | 546 | * @arg ADC_FLAG_EOC: ADC End of Regular conversion flag |
| Kojto | 108:34e6b704fe68 | 547 | * @arg ADC_FLAG_EOS: ADC End of Regular sequence of Conversions flag |
| Kojto | 108:34e6b704fe68 | 548 | * @arg ADC_FLAG_AWD: ADC Analog watchdog flag |
| Kojto | 108:34e6b704fe68 | 549 | * @arg ADC_FLAG_OVR: ADC overrun flag |
| Kojto | 108:34e6b704fe68 | 550 | * @arg ADC_FLAG_EOSMP: ADC End of Sampling flag |
| Kojto | 108:34e6b704fe68 | 551 | * @arg ADC_FLAG_RDY: ADC Ready flag |
| Kojto | 108:34e6b704fe68 | 552 | * @retval None |
| Kojto | 108:34e6b704fe68 | 553 | */ |
| Kojto | 108:34e6b704fe68 | 554 | /* Note: bit cleared bit by writing 1 (writing 0 has no effect on any bit of register ISR) */ |
| Kojto | 108:34e6b704fe68 | 555 | #define __HAL_ADC_CLEAR_FLAG(__HANDLE__, __FLAG__) \ |
| Kojto | 108:34e6b704fe68 | 556 | (((__HANDLE__)->Instance->ISR) = (__FLAG__)) |
| Kojto | 108:34e6b704fe68 | 557 | |
| bogdanm | 85:024bf7f99721 | 558 | /** @brief Reset ADC handle state |
| bogdanm | 85:024bf7f99721 | 559 | * @param __HANDLE__: ADC handle |
| bogdanm | 85:024bf7f99721 | 560 | * @retval None |
| bogdanm | 85:024bf7f99721 | 561 | */ |
| Kojto | 108:34e6b704fe68 | 562 | #define __HAL_ADC_RESET_HANDLE_STATE(__HANDLE__) \ |
| Kojto | 108:34e6b704fe68 | 563 | ((__HANDLE__)->State = HAL_ADC_STATE_RESET) |
| Kojto | 108:34e6b704fe68 | 564 | |
| Kojto | 108:34e6b704fe68 | 565 | /** |
| Kojto | 108:34e6b704fe68 | 566 | * @} |
| Kojto | 108:34e6b704fe68 | 567 | */ |
| Kojto | 108:34e6b704fe68 | 568 | |
| Kojto | 108:34e6b704fe68 | 569 | |
| Kojto | 108:34e6b704fe68 | 570 | /* Private macro -------------------------------------------------------------*/ |
| Kojto | 108:34e6b704fe68 | 571 | |
| Kojto | 108:34e6b704fe68 | 572 | /** @defgroup ADC_Private_Macros ADC Private Macros |
| Kojto | 108:34e6b704fe68 | 573 | * @{ |
| Kojto | 108:34e6b704fe68 | 574 | */ |
| Kojto | 108:34e6b704fe68 | 575 | /* Macro reserved for internal HAL driver usage, not intended to be used in */ |
| Kojto | 108:34e6b704fe68 | 576 | /* code of final user. */ |
| Kojto | 108:34e6b704fe68 | 577 | |
| bogdanm | 85:024bf7f99721 | 578 | |
| Kojto | 108:34e6b704fe68 | 579 | /** |
| Kojto | 108:34e6b704fe68 | 580 | * @brief Verification of hardware constraints before ADC can be enabled |
| Kojto | 108:34e6b704fe68 | 581 | * @param __HANDLE__: ADC handle |
| Kojto | 108:34e6b704fe68 | 582 | * @retval SET (ADC can be enabled) or RESET (ADC cannot be enabled) |
| Kojto | 108:34e6b704fe68 | 583 | */ |
| Kojto | 108:34e6b704fe68 | 584 | #define ADC_ENABLING_CONDITIONS(__HANDLE__) \ |
| Kojto | 108:34e6b704fe68 | 585 | (( ( ((__HANDLE__)->Instance->CR) & \ |
| Kojto | 108:34e6b704fe68 | 586 | (ADC_CR_ADCAL | ADC_CR_ADSTP | ADC_CR_ADSTART | ADC_CR_ADDIS | ADC_CR_ADEN) \ |
| Kojto | 108:34e6b704fe68 | 587 | ) == RESET \ |
| Kojto | 108:34e6b704fe68 | 588 | ) ? SET : RESET) |
| Kojto | 108:34e6b704fe68 | 589 | |
| Kojto | 108:34e6b704fe68 | 590 | /** |
| Kojto | 108:34e6b704fe68 | 591 | * @brief Verification of hardware constraints before ADC can be disabled |
| Kojto | 108:34e6b704fe68 | 592 | * @param __HANDLE__: ADC handle |
| Kojto | 108:34e6b704fe68 | 593 | * @retval SET (ADC can be disabled) or RESET (ADC cannot be disabled) |
| Kojto | 108:34e6b704fe68 | 594 | */ |
| Kojto | 108:34e6b704fe68 | 595 | #define ADC_DISABLING_CONDITIONS(__HANDLE__) \ |
| Kojto | 108:34e6b704fe68 | 596 | (( ( ((__HANDLE__)->Instance->CR) & \ |
| Kojto | 108:34e6b704fe68 | 597 | (ADC_CR_ADSTART | ADC_CR_ADEN)) == ADC_CR_ADEN \ |
| Kojto | 108:34e6b704fe68 | 598 | ) ? SET : RESET) |
| bogdanm | 85:024bf7f99721 | 599 | |
| bogdanm | 85:024bf7f99721 | 600 | /** |
| bogdanm | 85:024bf7f99721 | 601 | * @brief Verification of ADC state: enabled or disabled |
| bogdanm | 85:024bf7f99721 | 602 | * @param __HANDLE__: ADC handle |
| bogdanm | 85:024bf7f99721 | 603 | * @retval SET (ADC enabled) or RESET (ADC disabled) |
| bogdanm | 85:024bf7f99721 | 604 | */ |
| bogdanm | 85:024bf7f99721 | 605 | /* Note: If low power mode AutoPowerOff is enabled, power-on/off phases are */ |
| bogdanm | 85:024bf7f99721 | 606 | /* performed automatically by hardware and flag ADC_FLAG_RDY is not */ |
| bogdanm | 85:024bf7f99721 | 607 | /* set. */ |
| Kojto | 108:34e6b704fe68 | 608 | #define ADC_IS_ENABLE(__HANDLE__) \ |
| Kojto | 108:34e6b704fe68 | 609 | (( ((((__HANDLE__)->Instance->CR) & (ADC_CR_ADEN | ADC_CR_ADDIS)) == ADC_CR_ADEN) && \ |
| Kojto | 108:34e6b704fe68 | 610 | (((((__HANDLE__)->Instance->ISR) & ADC_FLAG_RDY) == ADC_FLAG_RDY) || \ |
| Kojto | 108:34e6b704fe68 | 611 | ((((__HANDLE__)->Instance->CFGR1) & ADC_CFGR1_AUTOFF) == ADC_CFGR1_AUTOFF) ) \ |
| Kojto | 108:34e6b704fe68 | 612 | ) ? SET : RESET) |
| bogdanm | 85:024bf7f99721 | 613 | |
| bogdanm | 85:024bf7f99721 | 614 | /** |
| bogdanm | 85:024bf7f99721 | 615 | * @brief Test if conversion trigger of regular group is software start |
| bogdanm | 85:024bf7f99721 | 616 | * or external trigger. |
| bogdanm | 85:024bf7f99721 | 617 | * @param __HANDLE__: ADC handle |
| bogdanm | 85:024bf7f99721 | 618 | * @retval SET (software start) or RESET (external trigger) |
| bogdanm | 85:024bf7f99721 | 619 | */ |
| Kojto | 108:34e6b704fe68 | 620 | #define ADC_IS_SOFTWARE_START_REGULAR(__HANDLE__) \ |
| Kojto | 108:34e6b704fe68 | 621 | (((__HANDLE__)->Instance->CFGR1 & ADC_CFGR1_EXTEN) == RESET) |
| bogdanm | 85:024bf7f99721 | 622 | |
| bogdanm | 85:024bf7f99721 | 623 | /** |
| bogdanm | 85:024bf7f99721 | 624 | * @brief Check if no conversion on going on regular group |
| bogdanm | 85:024bf7f99721 | 625 | * @param __HANDLE__: ADC handle |
| bogdanm | 85:024bf7f99721 | 626 | * @retval SET (conversion is on going) or RESET (no conversion is on going) |
| bogdanm | 85:024bf7f99721 | 627 | */ |
| Kojto | 108:34e6b704fe68 | 628 | #define ADC_IS_CONVERSION_ONGOING_REGULAR(__HANDLE__) \ |
| Kojto | 108:34e6b704fe68 | 629 | (( (((__HANDLE__)->Instance->CR) & ADC_CR_ADSTART) == RESET \ |
| Kojto | 108:34e6b704fe68 | 630 | ) ? RESET : SET) |
| bogdanm | 85:024bf7f99721 | 631 | |
| bogdanm | 85:024bf7f99721 | 632 | /** |
| bogdanm | 85:024bf7f99721 | 633 | * @brief Returns resolution bits in CFGR1 register: RES[1:0]. |
| bogdanm | 85:024bf7f99721 | 634 | * Returned value is among parameters to @ref ADC_Resolution. |
| bogdanm | 85:024bf7f99721 | 635 | * @param __HANDLE__: ADC handle |
| bogdanm | 85:024bf7f99721 | 636 | * @retval None |
| bogdanm | 85:024bf7f99721 | 637 | */ |
| Kojto | 108:34e6b704fe68 | 638 | #define ADC_GET_RESOLUTION(__HANDLE__) \ |
| Kojto | 108:34e6b704fe68 | 639 | (((__HANDLE__)->Instance->CFGR1) & ADC_CFGR1_RES) |
| bogdanm | 85:024bf7f99721 | 640 | |
| bogdanm | 85:024bf7f99721 | 641 | /** |
| bogdanm | 85:024bf7f99721 | 642 | * @brief Returns ADC sample time bits in SMPR register: SMP[2:0]. |
| bogdanm | 85:024bf7f99721 | 643 | * Returned value is among parameters to @ref ADC_Resolution. |
| bogdanm | 85:024bf7f99721 | 644 | * @param __HANDLE__: ADC handle |
| bogdanm | 85:024bf7f99721 | 645 | * @retval None |
| bogdanm | 85:024bf7f99721 | 646 | */ |
| Kojto | 108:34e6b704fe68 | 647 | #define ADC_GET_SAMPLINGTIME(__HANDLE__) \ |
| Kojto | 108:34e6b704fe68 | 648 | (((__HANDLE__)->Instance->SMPR) & ADC_SMPR_SMP) |
| bogdanm | 85:024bf7f99721 | 649 | |
| bogdanm | 85:024bf7f99721 | 650 | /** |
| Kojto | 108:34e6b704fe68 | 651 | * @brief Simultaneously clears and sets specific bits of the handle State |
| Kojto | 108:34e6b704fe68 | 652 | * @note: ADC_STATE_CLR_SET() macro is merely aliased to generic macro MODIFY_REG(), |
| Kojto | 108:34e6b704fe68 | 653 | * the first parameter is the ADC handle State, the second parameter is the |
| Kojto | 108:34e6b704fe68 | 654 | * bit field to clear, the third and last parameter is the bit field to set. |
| bogdanm | 85:024bf7f99721 | 655 | * @retval None |
| bogdanm | 85:024bf7f99721 | 656 | */ |
| Kojto | 108:34e6b704fe68 | 657 | #define ADC_STATE_CLR_SET MODIFY_REG |
| bogdanm | 85:024bf7f99721 | 658 | |
| bogdanm | 85:024bf7f99721 | 659 | /** |
| bogdanm | 85:024bf7f99721 | 660 | * @brief Clear ADC error code (set it to error code: "no error") |
| bogdanm | 85:024bf7f99721 | 661 | * @param __HANDLE__: ADC handle |
| bogdanm | 85:024bf7f99721 | 662 | * @retval None |
| bogdanm | 85:024bf7f99721 | 663 | */ |
| Kojto | 108:34e6b704fe68 | 664 | #define ADC_CLEAR_ERRORCODE(__HANDLE__) \ |
| Kojto | 108:34e6b704fe68 | 665 | ((__HANDLE__)->ErrorCode = HAL_ADC_ERROR_NONE) |
| bogdanm | 85:024bf7f99721 | 666 | |
| bogdanm | 85:024bf7f99721 | 667 | |
| bogdanm | 85:024bf7f99721 | 668 | /** |
| bogdanm | 85:024bf7f99721 | 669 | * @brief Configure the channel number into channel selection register |
| bogdanm | 85:024bf7f99721 | 670 | * @param _CHANNEL_: ADC Channel |
| bogdanm | 85:024bf7f99721 | 671 | * @retval None |
| bogdanm | 85:024bf7f99721 | 672 | */ |
| bogdanm | 85:024bf7f99721 | 673 | /* This function converts ADC channels from numbers (see defgroup ADC_channels) |
| bogdanm | 85:024bf7f99721 | 674 | to bitfields, to get the equivalence of CMSIS channels: |
| bogdanm | 85:024bf7f99721 | 675 | ADC_CHANNEL_0 ((uint32_t) ADC_CHSELR_CHSEL0) |
| bogdanm | 85:024bf7f99721 | 676 | ADC_CHANNEL_1 ((uint32_t) ADC_CHSELR_CHSEL1) |
| bogdanm | 85:024bf7f99721 | 677 | ADC_CHANNEL_2 ((uint32_t) ADC_CHSELR_CHSEL2) |
| bogdanm | 85:024bf7f99721 | 678 | ADC_CHANNEL_3 ((uint32_t) ADC_CHSELR_CHSEL3) |
| bogdanm | 85:024bf7f99721 | 679 | ADC_CHANNEL_4 ((uint32_t) ADC_CHSELR_CHSEL4) |
| bogdanm | 85:024bf7f99721 | 680 | ADC_CHANNEL_5 ((uint32_t) ADC_CHSELR_CHSEL5) |
| bogdanm | 85:024bf7f99721 | 681 | ADC_CHANNEL_6 ((uint32_t) ADC_CHSELR_CHSEL6) |
| bogdanm | 85:024bf7f99721 | 682 | ADC_CHANNEL_7 ((uint32_t) ADC_CHSELR_CHSEL7) |
| bogdanm | 85:024bf7f99721 | 683 | ADC_CHANNEL_8 ((uint32_t) ADC_CHSELR_CHSEL8) |
| bogdanm | 85:024bf7f99721 | 684 | ADC_CHANNEL_9 ((uint32_t) ADC_CHSELR_CHSEL9) |
| bogdanm | 85:024bf7f99721 | 685 | ADC_CHANNEL_10 ((uint32_t) ADC_CHSELR_CHSEL10) |
| bogdanm | 85:024bf7f99721 | 686 | ADC_CHANNEL_11 ((uint32_t) ADC_CHSELR_CHSEL11) |
| bogdanm | 85:024bf7f99721 | 687 | ADC_CHANNEL_12 ((uint32_t) ADC_CHSELR_CHSEL12) |
| bogdanm | 85:024bf7f99721 | 688 | ADC_CHANNEL_13 ((uint32_t) ADC_CHSELR_CHSEL13) |
| bogdanm | 85:024bf7f99721 | 689 | ADC_CHANNEL_14 ((uint32_t) ADC_CHSELR_CHSEL14) |
| bogdanm | 85:024bf7f99721 | 690 | ADC_CHANNEL_15 ((uint32_t) ADC_CHSELR_CHSEL15) |
| bogdanm | 85:024bf7f99721 | 691 | ADC_CHANNEL_16 ((uint32_t) ADC_CHSELR_CHSEL16) |
| bogdanm | 85:024bf7f99721 | 692 | ADC_CHANNEL_17 ((uint32_t) ADC_CHSELR_CHSEL17) |
| bogdanm | 85:024bf7f99721 | 693 | ADC_CHANNEL_18 ((uint32_t) ADC_CHSELR_CHSEL18) |
| bogdanm | 85:024bf7f99721 | 694 | */ |
| Kojto | 108:34e6b704fe68 | 695 | #define ADC_CHSELR_CHANNEL(_CHANNEL_) \ |
| Kojto | 108:34e6b704fe68 | 696 | ( 1U << (_CHANNEL_)) |
| bogdanm | 85:024bf7f99721 | 697 | |
| Kojto | 108:34e6b704fe68 | 698 | /** |
| Kojto | 108:34e6b704fe68 | 699 | * @brief Set the ADC's sample time |
| Kojto | 108:34e6b704fe68 | 700 | * @param _SAMPLETIME_: Sample time parameter. |
| Kojto | 108:34e6b704fe68 | 701 | * @retval None |
| bogdanm | 85:024bf7f99721 | 702 | */ |
| Kojto | 108:34e6b704fe68 | 703 | /* Note: ADC sampling time set using mask ADC_SMPR_SMP due to parameter */ |
| Kojto | 108:34e6b704fe68 | 704 | /* "ADC_SAMPLETIME_1CYCLE_5" defined with a dummy bit (bit used to */ |
| Kojto | 108:34e6b704fe68 | 705 | /* distinguish this parameter versus reset value 0x00000000, */ |
| Kojto | 108:34e6b704fe68 | 706 | /* in the context of management of parameters "SamplingTimeCommon" */ |
| Kojto | 108:34e6b704fe68 | 707 | /* and "SamplingTime" (obsolete)). */ |
| Kojto | 108:34e6b704fe68 | 708 | #define ADC_SMPR_SET(_SAMPLETIME_) \ |
| Kojto | 108:34e6b704fe68 | 709 | ((_SAMPLETIME_) & (ADC_SMPR_SMP)) |
| bogdanm | 85:024bf7f99721 | 710 | |
| bogdanm | 85:024bf7f99721 | 711 | /** |
| bogdanm | 85:024bf7f99721 | 712 | * @brief Set the Analog Watchdog 1 channel. |
| bogdanm | 85:024bf7f99721 | 713 | * @param _CHANNEL_: channel to be monitored by Analog Watchdog 1. |
| bogdanm | 85:024bf7f99721 | 714 | * @retval None |
| bogdanm | 85:024bf7f99721 | 715 | */ |
| Kojto | 108:34e6b704fe68 | 716 | #define ADC_CFGR_AWDCH(_CHANNEL_) \ |
| Kojto | 108:34e6b704fe68 | 717 | ((_CHANNEL_) << 26) |
| bogdanm | 85:024bf7f99721 | 718 | |
| bogdanm | 85:024bf7f99721 | 719 | /** |
| bogdanm | 85:024bf7f99721 | 720 | * @brief Enable ADC discontinuous conversion mode for regular group |
| Kojto | 93:e188a91d3eaa | 721 | * @param _REG_DISCONTINUOUS_MODE_: Regular discontinuous mode. |
| bogdanm | 85:024bf7f99721 | 722 | * @retval None |
| bogdanm | 85:024bf7f99721 | 723 | */ |
| Kojto | 108:34e6b704fe68 | 724 | #define ADC_CFGR1_REG_DISCCONTINUOUS(_REG_DISCONTINUOUS_MODE_) \ |
| Kojto | 108:34e6b704fe68 | 725 | ((_REG_DISCONTINUOUS_MODE_) << 16) |
| bogdanm | 85:024bf7f99721 | 726 | |
| bogdanm | 85:024bf7f99721 | 727 | /** |
| bogdanm | 85:024bf7f99721 | 728 | * @brief Enable the ADC auto off mode. |
| bogdanm | 85:024bf7f99721 | 729 | * @param _AUTOOFF_: Auto off bit enable or disable. |
| bogdanm | 85:024bf7f99721 | 730 | * @retval None |
| bogdanm | 85:024bf7f99721 | 731 | */ |
| Kojto | 108:34e6b704fe68 | 732 | #define ADC_CFGR1_AUTOOFF(_AUTOOFF_) \ |
| Kojto | 108:34e6b704fe68 | 733 | ((_AUTOOFF_) << 15) |
| bogdanm | 85:024bf7f99721 | 734 | |
| bogdanm | 85:024bf7f99721 | 735 | /** |
| bogdanm | 85:024bf7f99721 | 736 | * @brief Enable the ADC auto delay mode. |
| bogdanm | 85:024bf7f99721 | 737 | * @param _AUTOWAIT_: Auto delay bit enable or disable. |
| bogdanm | 85:024bf7f99721 | 738 | * @retval None |
| bogdanm | 85:024bf7f99721 | 739 | */ |
| Kojto | 108:34e6b704fe68 | 740 | #define ADC_CFGR1_AUTOWAIT(_AUTOWAIT_) \ |
| Kojto | 108:34e6b704fe68 | 741 | ((_AUTOWAIT_) << 14) |
| bogdanm | 85:024bf7f99721 | 742 | |
| bogdanm | 85:024bf7f99721 | 743 | /** |
| bogdanm | 85:024bf7f99721 | 744 | * @brief Enable ADC continuous conversion mode. |
| bogdanm | 85:024bf7f99721 | 745 | * @param _CONTINUOUS_MODE_: Continuous mode. |
| bogdanm | 85:024bf7f99721 | 746 | * @retval None |
| bogdanm | 85:024bf7f99721 | 747 | */ |
| Kojto | 108:34e6b704fe68 | 748 | #define ADC_CFGR1_CONTINUOUS(_CONTINUOUS_MODE_) \ |
| Kojto | 108:34e6b704fe68 | 749 | ((_CONTINUOUS_MODE_) << 13) |
| bogdanm | 85:024bf7f99721 | 750 | |
| bogdanm | 85:024bf7f99721 | 751 | /** |
| bogdanm | 85:024bf7f99721 | 752 | * @brief Enable ADC overrun mode. |
| bogdanm | 85:024bf7f99721 | 753 | * @param _OVERRUN_MODE_: Overrun mode. |
| bogdanm | 85:024bf7f99721 | 754 | * @retval Overun bit setting to be programmed into CFGR register |
| bogdanm | 85:024bf7f99721 | 755 | */ |
| bogdanm | 85:024bf7f99721 | 756 | /* Note: Bit ADC_CFGR1_OVRMOD not used directly in constant */ |
| Kojto | 108:34e6b704fe68 | 757 | /* "ADC_OVR_DATA_OVERWRITTEN" to have this case defined to 0x00, to set it */ |
| Kojto | 108:34e6b704fe68 | 758 | /* as the default case to be compliant with other STM32 devices. */ |
| Kojto | 108:34e6b704fe68 | 759 | #define ADC_CFGR1_OVERRUN(_OVERRUN_MODE_) \ |
| Kojto | 108:34e6b704fe68 | 760 | ( ( (_OVERRUN_MODE_) != (ADC_OVR_DATA_PRESERVED) \ |
| bogdanm | 85:024bf7f99721 | 761 | )? (ADC_CFGR1_OVRMOD) : (0x00000000) \ |
| bogdanm | 85:024bf7f99721 | 762 | ) |
| bogdanm | 85:024bf7f99721 | 763 | |
| bogdanm | 85:024bf7f99721 | 764 | /** |
| bogdanm | 85:024bf7f99721 | 765 | * @brief Enable ADC scan mode to convert multiple ranks with sequencer. |
| bogdanm | 85:024bf7f99721 | 766 | * @param _SCAN_MODE_: Scan conversion mode. |
| bogdanm | 85:024bf7f99721 | 767 | * @retval None |
| bogdanm | 85:024bf7f99721 | 768 | */ |
| Kojto | 108:34e6b704fe68 | 769 | /* Note: Scan mode set using this macro (instead of parameter direct set) */ |
| Kojto | 108:34e6b704fe68 | 770 | /* due to different modes on other STM32 devices: to avoid any */ |
| Kojto | 108:34e6b704fe68 | 771 | /* unwanted setting, the exact parameter corresponding to the device */ |
| Kojto | 108:34e6b704fe68 | 772 | /* must be passed to this macro. */ |
| Kojto | 108:34e6b704fe68 | 773 | #define ADC_SCANDIR(_SCAN_MODE_) \ |
| bogdanm | 85:024bf7f99721 | 774 | ( ( (_SCAN_MODE_) == (ADC_SCAN_DIRECTION_BACKWARD) \ |
| bogdanm | 85:024bf7f99721 | 775 | )? (ADC_CFGR1_SCANDIR) : (0x00000000) \ |
| bogdanm | 85:024bf7f99721 | 776 | ) |
| Kojto | 108:34e6b704fe68 | 777 | |
| bogdanm | 85:024bf7f99721 | 778 | /** |
| bogdanm | 85:024bf7f99721 | 779 | * @brief Enable the ADC DMA continuous request. |
| bogdanm | 85:024bf7f99721 | 780 | * @param _DMACONTREQ_MODE_: DMA continuous request mode. |
| bogdanm | 85:024bf7f99721 | 781 | * @retval None |
| bogdanm | 85:024bf7f99721 | 782 | */ |
| Kojto | 108:34e6b704fe68 | 783 | #define ADC_CFGR1_DMACONTREQ(_DMACONTREQ_MODE_) \ |
| Kojto | 108:34e6b704fe68 | 784 | ((_DMACONTREQ_MODE_) << 1) |
| Kojto | 93:e188a91d3eaa | 785 | |
| bogdanm | 85:024bf7f99721 | 786 | /** |
| bogdanm | 85:024bf7f99721 | 787 | * @brief Configure the analog watchdog high threshold into register TR. |
| bogdanm | 85:024bf7f99721 | 788 | * @param _Threshold_: Threshold value |
| bogdanm | 85:024bf7f99721 | 789 | * @retval None |
| bogdanm | 85:024bf7f99721 | 790 | */ |
| Kojto | 108:34e6b704fe68 | 791 | #define ADC_TRX_HIGHTHRESHOLD(_Threshold_) \ |
| Kojto | 108:34e6b704fe68 | 792 | ((_Threshold_) << 16) |
| Kojto | 108:34e6b704fe68 | 793 | |
| bogdanm | 85:024bf7f99721 | 794 | /** |
| bogdanm | 85:024bf7f99721 | 795 | * @brief Shift the AWD threshold in function of the selected ADC resolution. |
| bogdanm | 85:024bf7f99721 | 796 | * Thresholds have to be left-aligned on bit 11, the LSB (right bits) are set to 0. |
| bogdanm | 85:024bf7f99721 | 797 | * If resolution 12 bits, no shift. |
| bogdanm | 85:024bf7f99721 | 798 | * If resolution 10 bits, shift of 2 ranks on the left. |
| bogdanm | 85:024bf7f99721 | 799 | * If resolution 8 bits, shift of 4 ranks on the left. |
| bogdanm | 85:024bf7f99721 | 800 | * If resolution 6 bits, shift of 6 ranks on the left. |
| bogdanm | 85:024bf7f99721 | 801 | * therefore, shift = (12 - resolution) = 12 - (12- (((RES[1:0]) >> 3)*2)) |
| bogdanm | 85:024bf7f99721 | 802 | * @param __HANDLE__: ADC handle |
| bogdanm | 85:024bf7f99721 | 803 | * @param _Threshold_: Value to be shifted |
| bogdanm | 85:024bf7f99721 | 804 | * @retval None |
| bogdanm | 85:024bf7f99721 | 805 | */ |
| Kojto | 108:34e6b704fe68 | 806 | #define ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(__HANDLE__, _Threshold_) \ |
| Kojto | 108:34e6b704fe68 | 807 | ((_Threshold_) << ((((__HANDLE__)->Instance->CFGR1 & ADC_CFGR1_RES) >> 3)*2)) |
| Kojto | 108:34e6b704fe68 | 808 | |
| Kojto | 108:34e6b704fe68 | 809 | |
| Kojto | 108:34e6b704fe68 | 810 | #define IS_ADC_CLOCKPRESCALER(ADC_CLOCK) (((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV1) || \ |
| Kojto | 108:34e6b704fe68 | 811 | ((ADC_CLOCK) == ADC_CLOCK_SYNC_PCLK_DIV2) || \ |
| Kojto | 108:34e6b704fe68 | 812 | ((ADC_CLOCK) == ADC_CLOCK_SYNC_PCLK_DIV4) ) |
| Kojto | 108:34e6b704fe68 | 813 | |
| Kojto | 108:34e6b704fe68 | 814 | #define IS_ADC_RESOLUTION(RESOLUTION) (((RESOLUTION) == ADC_RESOLUTION_12B) || \ |
| Kojto | 108:34e6b704fe68 | 815 | ((RESOLUTION) == ADC_RESOLUTION_10B) || \ |
| Kojto | 108:34e6b704fe68 | 816 | ((RESOLUTION) == ADC_RESOLUTION_8B) || \ |
| Kojto | 108:34e6b704fe68 | 817 | ((RESOLUTION) == ADC_RESOLUTION_6B) ) |
| Kojto | 108:34e6b704fe68 | 818 | |
| Kojto | 108:34e6b704fe68 | 819 | #define IS_ADC_DATA_ALIGN(ALIGN) (((ALIGN) == ADC_DATAALIGN_RIGHT) || \ |
| Kojto | 108:34e6b704fe68 | 820 | ((ALIGN) == ADC_DATAALIGN_LEFT) ) |
| Kojto | 108:34e6b704fe68 | 821 | |
| Kojto | 108:34e6b704fe68 | 822 | #define IS_ADC_SCAN_MODE(SCAN_MODE) (((SCAN_MODE) == ADC_SCAN_DIRECTION_FORWARD) || \ |
| Kojto | 108:34e6b704fe68 | 823 | ((SCAN_MODE) == ADC_SCAN_DIRECTION_BACKWARD) ) |
| Kojto | 108:34e6b704fe68 | 824 | |
| Kojto | 108:34e6b704fe68 | 825 | #define IS_ADC_EXTTRIG_EDGE(EDGE) (((EDGE) == ADC_EXTERNALTRIGCONVEDGE_NONE) || \ |
| Kojto | 108:34e6b704fe68 | 826 | ((EDGE) == ADC_EXTERNALTRIGCONVEDGE_RISING) || \ |
| Kojto | 108:34e6b704fe68 | 827 | ((EDGE) == ADC_EXTERNALTRIGCONVEDGE_FALLING) || \ |
| Kojto | 108:34e6b704fe68 | 828 | ((EDGE) == ADC_EXTERNALTRIGCONVEDGE_RISINGFALLING) ) |
| Kojto | 108:34e6b704fe68 | 829 | |
| Kojto | 108:34e6b704fe68 | 830 | #define IS_ADC_EOC_SELECTION(EOC_SELECTION) (((EOC_SELECTION) == ADC_EOC_SINGLE_CONV) || \ |
| Kojto | 108:34e6b704fe68 | 831 | ((EOC_SELECTION) == ADC_EOC_SEQ_CONV) || \ |
| Kojto | 108:34e6b704fe68 | 832 | ((EOC_SELECTION) == ADC_EOC_SINGLE_SEQ_CONV) ) |
| Kojto | 108:34e6b704fe68 | 833 | |
| Kojto | 108:34e6b704fe68 | 834 | #define IS_ADC_OVERRUN(OVR) (((OVR) == ADC_OVR_DATA_PRESERVED) || \ |
| Kojto | 108:34e6b704fe68 | 835 | ((OVR) == ADC_OVR_DATA_OVERWRITTEN) ) |
| Kojto | 108:34e6b704fe68 | 836 | |
| Kojto | 108:34e6b704fe68 | 837 | #define IS_ADC_RANK(WATCHDOG) (((WATCHDOG) == ADC_RANK_CHANNEL_NUMBER) || \ |
| Kojto | 108:34e6b704fe68 | 838 | ((WATCHDOG) == ADC_RANK_NONE) ) |
| Kojto | 108:34e6b704fe68 | 839 | |
| Kojto | 108:34e6b704fe68 | 840 | #define IS_ADC_SAMPLE_TIME(TIME) (((TIME) == ADC_SAMPLETIME_1CYCLE_5) || \ |
| Kojto | 108:34e6b704fe68 | 841 | ((TIME) == ADC_SAMPLETIME_7CYCLES_5) || \ |
| Kojto | 108:34e6b704fe68 | 842 | ((TIME) == ADC_SAMPLETIME_13CYCLES_5) || \ |
| Kojto | 108:34e6b704fe68 | 843 | ((TIME) == ADC_SAMPLETIME_28CYCLES_5) || \ |
| Kojto | 108:34e6b704fe68 | 844 | ((TIME) == ADC_SAMPLETIME_41CYCLES_5) || \ |
| Kojto | 108:34e6b704fe68 | 845 | ((TIME) == ADC_SAMPLETIME_55CYCLES_5) || \ |
| Kojto | 108:34e6b704fe68 | 846 | ((TIME) == ADC_SAMPLETIME_71CYCLES_5) || \ |
| Kojto | 108:34e6b704fe68 | 847 | ((TIME) == ADC_SAMPLETIME_239CYCLES_5) ) |
| Kojto | 108:34e6b704fe68 | 848 | |
| Kojto | 108:34e6b704fe68 | 849 | #define IS_ADC_ANALOG_WATCHDOG_MODE(WATCHDOG) (((WATCHDOG) == ADC_ANALOGWATCHDOG_NONE) || \ |
| Kojto | 108:34e6b704fe68 | 850 | ((WATCHDOG) == ADC_ANALOGWATCHDOG_SINGLE_REG) || \ |
| Kojto | 108:34e6b704fe68 | 851 | ((WATCHDOG) == ADC_ANALOGWATCHDOG_ALL_REG) ) |
| Kojto | 108:34e6b704fe68 | 852 | |
| Kojto | 108:34e6b704fe68 | 853 | #define IS_ADC_EVENT_TYPE(EVENT) (((EVENT) == ADC_AWD_EVENT) || \ |
| Kojto | 108:34e6b704fe68 | 854 | ((EVENT) == ADC_OVR_EVENT) ) |
| Kojto | 108:34e6b704fe68 | 855 | |
| Kojto | 108:34e6b704fe68 | 856 | /** @defgroup ADC_range_verification ADC range verification |
| Kojto | 108:34e6b704fe68 | 857 | * in function of ADC resolution selected (12, 10, 8 or 6 bits) |
| Kojto | 108:34e6b704fe68 | 858 | * @{ |
| Kojto | 108:34e6b704fe68 | 859 | */ |
| Kojto | 108:34e6b704fe68 | 860 | #define IS_ADC_RANGE(RESOLUTION, ADC_VALUE) \ |
| Kojto | 108:34e6b704fe68 | 861 | ((((RESOLUTION) == ADC_RESOLUTION_12B) && ((ADC_VALUE) <= ((uint32_t)0x0FFF))) || \ |
| Kojto | 108:34e6b704fe68 | 862 | (((RESOLUTION) == ADC_RESOLUTION_10B) && ((ADC_VALUE) <= ((uint32_t)0x03FF))) || \ |
| Kojto | 108:34e6b704fe68 | 863 | (((RESOLUTION) == ADC_RESOLUTION_8B) && ((ADC_VALUE) <= ((uint32_t)0x00FF))) || \ |
| Kojto | 108:34e6b704fe68 | 864 | (((RESOLUTION) == ADC_RESOLUTION_6B) && ((ADC_VALUE) <= ((uint32_t)0x003F))) ) |
| Kojto | 108:34e6b704fe68 | 865 | /** |
| Kojto | 108:34e6b704fe68 | 866 | * @} |
| Kojto | 108:34e6b704fe68 | 867 | */ |
| Kojto | 108:34e6b704fe68 | 868 | |
| Kojto | 108:34e6b704fe68 | 869 | /** @defgroup ADC_regular_rank_verification ADC regular rank verification |
| Kojto | 108:34e6b704fe68 | 870 | * @{ |
| Kojto | 108:34e6b704fe68 | 871 | */ |
| Kojto | 108:34e6b704fe68 | 872 | #define IS_ADC_REGULAR_RANK(RANK) (((RANK) >= ((uint32_t)1)) && ((RANK) <= ((uint32_t)16))) |
| Kojto | 108:34e6b704fe68 | 873 | /** |
| Kojto | 108:34e6b704fe68 | 874 | * @} |
| Kojto | 108:34e6b704fe68 | 875 | */ |
| bogdanm | 85:024bf7f99721 | 876 | |
| bogdanm | 85:024bf7f99721 | 877 | /** |
| bogdanm | 85:024bf7f99721 | 878 | * @} |
| bogdanm | 85:024bf7f99721 | 879 | */ |
| bogdanm | 85:024bf7f99721 | 880 | |
| bogdanm | 85:024bf7f99721 | 881 | /* Include ADC HAL Extension module */ |
| bogdanm | 85:024bf7f99721 | 882 | #include "stm32f0xx_hal_adc_ex.h" |
| bogdanm | 85:024bf7f99721 | 883 | |
| bogdanm | 85:024bf7f99721 | 884 | /* Exported functions --------------------------------------------------------*/ |
| bogdanm | 92:4fc01daae5a5 | 885 | /** @addtogroup ADC_Exported_Functions |
| bogdanm | 92:4fc01daae5a5 | 886 | * @{ |
| bogdanm | 92:4fc01daae5a5 | 887 | */ |
| bogdanm | 92:4fc01daae5a5 | 888 | |
| bogdanm | 92:4fc01daae5a5 | 889 | /** @addtogroup ADC_Exported_Functions_Group1 |
| bogdanm | 92:4fc01daae5a5 | 890 | * @{ |
| bogdanm | 92:4fc01daae5a5 | 891 | */ |
| bogdanm | 92:4fc01daae5a5 | 892 | |
| bogdanm | 92:4fc01daae5a5 | 893 | |
| bogdanm | 85:024bf7f99721 | 894 | /* Initialization and de-initialization functions **********************************/ |
| bogdanm | 85:024bf7f99721 | 895 | HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc); |
| bogdanm | 85:024bf7f99721 | 896 | HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef *hadc); |
| bogdanm | 85:024bf7f99721 | 897 | void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc); |
| bogdanm | 85:024bf7f99721 | 898 | void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc); |
| bogdanm | 92:4fc01daae5a5 | 899 | /** |
| bogdanm | 92:4fc01daae5a5 | 900 | * @} |
| bogdanm | 92:4fc01daae5a5 | 901 | */ |
| bogdanm | 85:024bf7f99721 | 902 | |
| bogdanm | 85:024bf7f99721 | 903 | /* IO operation functions *****************************************************/ |
| bogdanm | 92:4fc01daae5a5 | 904 | |
| bogdanm | 92:4fc01daae5a5 | 905 | /** @addtogroup ADC_Exported_Functions_Group2 |
| bogdanm | 92:4fc01daae5a5 | 906 | * @{ |
| bogdanm | 92:4fc01daae5a5 | 907 | */ |
| bogdanm | 92:4fc01daae5a5 | 908 | |
| bogdanm | 92:4fc01daae5a5 | 909 | |
| bogdanm | 85:024bf7f99721 | 910 | /* Blocking mode: Polling */ |
| bogdanm | 85:024bf7f99721 | 911 | HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc); |
| bogdanm | 85:024bf7f99721 | 912 | HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc); |
| bogdanm | 85:024bf7f99721 | 913 | HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout); |
| bogdanm | 85:024bf7f99721 | 914 | HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef* hadc, uint32_t EventType, uint32_t Timeout); |
| bogdanm | 85:024bf7f99721 | 915 | |
| bogdanm | 85:024bf7f99721 | 916 | /* Non-blocking mode: Interruption */ |
| bogdanm | 85:024bf7f99721 | 917 | HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc); |
| bogdanm | 85:024bf7f99721 | 918 | HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc); |
| bogdanm | 85:024bf7f99721 | 919 | |
| bogdanm | 85:024bf7f99721 | 920 | /* Non-blocking mode: DMA */ |
| bogdanm | 85:024bf7f99721 | 921 | HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length); |
| bogdanm | 85:024bf7f99721 | 922 | HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc); |
| bogdanm | 85:024bf7f99721 | 923 | |
| bogdanm | 85:024bf7f99721 | 924 | /* ADC retrieve conversion value intended to be used with polling or interruption */ |
| bogdanm | 85:024bf7f99721 | 925 | uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc); |
| bogdanm | 85:024bf7f99721 | 926 | |
| bogdanm | 85:024bf7f99721 | 927 | /* ADC IRQHandler and Callbacks used in non-blocking modes (Interruption and DMA) */ |
| bogdanm | 85:024bf7f99721 | 928 | void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc); |
| bogdanm | 85:024bf7f99721 | 929 | void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc); |
| bogdanm | 85:024bf7f99721 | 930 | void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc); |
| bogdanm | 85:024bf7f99721 | 931 | void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc); |
| bogdanm | 85:024bf7f99721 | 932 | void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc); |
| bogdanm | 92:4fc01daae5a5 | 933 | /** |
| bogdanm | 92:4fc01daae5a5 | 934 | * @} |
| bogdanm | 92:4fc01daae5a5 | 935 | */ |
| bogdanm | 92:4fc01daae5a5 | 936 | |
| bogdanm | 85:024bf7f99721 | 937 | |
| bogdanm | 85:024bf7f99721 | 938 | /* Peripheral Control functions ***********************************************/ |
| bogdanm | 92:4fc01daae5a5 | 939 | /** @addtogroup ADC_Exported_Functions_Group3 |
| bogdanm | 92:4fc01daae5a5 | 940 | * @{ |
| bogdanm | 92:4fc01daae5a5 | 941 | */ |
| bogdanm | 85:024bf7f99721 | 942 | HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig); |
| bogdanm | 85:024bf7f99721 | 943 | HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* AnalogWDGConfig); |
| bogdanm | 92:4fc01daae5a5 | 944 | /** |
| bogdanm | 92:4fc01daae5a5 | 945 | * @} |
| bogdanm | 92:4fc01daae5a5 | 946 | */ |
| bogdanm | 92:4fc01daae5a5 | 947 | |
| bogdanm | 85:024bf7f99721 | 948 | |
| bogdanm | 85:024bf7f99721 | 949 | /* Peripheral State functions *************************************************/ |
| bogdanm | 92:4fc01daae5a5 | 950 | /** @addtogroup ADC_Exported_Functions_Group4 |
| bogdanm | 92:4fc01daae5a5 | 951 | * @{ |
| bogdanm | 92:4fc01daae5a5 | 952 | */ |
| Kojto | 108:34e6b704fe68 | 953 | uint32_t HAL_ADC_GetState(ADC_HandleTypeDef* hadc); |
| bogdanm | 85:024bf7f99721 | 954 | uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc); |
| bogdanm | 92:4fc01daae5a5 | 955 | /** |
| bogdanm | 92:4fc01daae5a5 | 956 | * @} |
| bogdanm | 92:4fc01daae5a5 | 957 | */ |
| bogdanm | 92:4fc01daae5a5 | 958 | |
| bogdanm | 92:4fc01daae5a5 | 959 | |
| bogdanm | 92:4fc01daae5a5 | 960 | /** |
| bogdanm | 92:4fc01daae5a5 | 961 | * @} |
| bogdanm | 92:4fc01daae5a5 | 962 | */ |
| bogdanm | 92:4fc01daae5a5 | 963 | |
| bogdanm | 85:024bf7f99721 | 964 | |
| bogdanm | 85:024bf7f99721 | 965 | /** |
| bogdanm | 85:024bf7f99721 | 966 | * @} |
| bogdanm | 85:024bf7f99721 | 967 | */ |
| bogdanm | 85:024bf7f99721 | 968 | |
| bogdanm | 85:024bf7f99721 | 969 | /** |
| bogdanm | 85:024bf7f99721 | 970 | * @} |
| bogdanm | 85:024bf7f99721 | 971 | */ |
| bogdanm | 85:024bf7f99721 | 972 | |
| bogdanm | 85:024bf7f99721 | 973 | #ifdef __cplusplus |
| bogdanm | 85:024bf7f99721 | 974 | } |
| bogdanm | 85:024bf7f99721 | 975 | #endif |
| bogdanm | 85:024bf7f99721 | 976 | |
| bogdanm | 85:024bf7f99721 | 977 | |
| bogdanm | 85:024bf7f99721 | 978 | #endif /* __STM32F0xx_HAL_ADC_H */ |
| bogdanm | 85:024bf7f99721 | 979 | |
| bogdanm | 85:024bf7f99721 | 980 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
| bogdanm | 92:4fc01daae5a5 | 981 |