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Committer:
elijahorr
Date:
Thu Apr 14 07:28:54 2016 +0000
Revision:
121:672067c3ada4
Parent:
109:9296ab0bfc11
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Kojto 109:9296ab0bfc11 1 /**
Kojto 109:9296ab0bfc11 2 ******************************************************************************
Kojto 109:9296ab0bfc11 3 * @file stm32f0xx_hal_spi.h
Kojto 109:9296ab0bfc11 4 * @author MCD Application Team
Kojto 109:9296ab0bfc11 5 * @version V1.3.0
Kojto 109:9296ab0bfc11 6 * @date 26-June-2015
Kojto 109:9296ab0bfc11 7 * @brief Header file of SPI HAL module.
Kojto 109:9296ab0bfc11 8 ******************************************************************************
Kojto 109:9296ab0bfc11 9 * @attention
Kojto 109:9296ab0bfc11 10 *
Kojto 109:9296ab0bfc11 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
Kojto 109:9296ab0bfc11 12 *
Kojto 109:9296ab0bfc11 13 * Redistribution and use in source and binary forms, with or without modification,
Kojto 109:9296ab0bfc11 14 * are permitted provided that the following conditions are met:
Kojto 109:9296ab0bfc11 15 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 109:9296ab0bfc11 16 * this list of conditions and the following disclaimer.
Kojto 109:9296ab0bfc11 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 109:9296ab0bfc11 18 * this list of conditions and the following disclaimer in the documentation
Kojto 109:9296ab0bfc11 19 * and/or other materials provided with the distribution.
Kojto 109:9296ab0bfc11 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto 109:9296ab0bfc11 21 * may be used to endorse or promote products derived from this software
Kojto 109:9296ab0bfc11 22 * without specific prior written permission.
Kojto 109:9296ab0bfc11 23 *
Kojto 109:9296ab0bfc11 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 109:9296ab0bfc11 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 109:9296ab0bfc11 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 109:9296ab0bfc11 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 109:9296ab0bfc11 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 109:9296ab0bfc11 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 109:9296ab0bfc11 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 109:9296ab0bfc11 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 109:9296ab0bfc11 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 109:9296ab0bfc11 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 109:9296ab0bfc11 34 *
Kojto 109:9296ab0bfc11 35 ******************************************************************************
Kojto 109:9296ab0bfc11 36 */
Kojto 109:9296ab0bfc11 37
Kojto 109:9296ab0bfc11 38 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 109:9296ab0bfc11 39 #ifndef __STM32F0xx_HAL_SPI_H
Kojto 109:9296ab0bfc11 40 #define __STM32F0xx_HAL_SPI_H
Kojto 109:9296ab0bfc11 41
Kojto 109:9296ab0bfc11 42 #ifdef __cplusplus
Kojto 109:9296ab0bfc11 43 extern "C" {
Kojto 109:9296ab0bfc11 44 #endif
Kojto 109:9296ab0bfc11 45
Kojto 109:9296ab0bfc11 46 /* Includes ------------------------------------------------------------------*/
Kojto 109:9296ab0bfc11 47 #include "stm32f0xx_hal_def.h"
Kojto 109:9296ab0bfc11 48
Kojto 109:9296ab0bfc11 49 /** @addtogroup STM32F0xx_HAL_Driver
Kojto 109:9296ab0bfc11 50 * @{
Kojto 109:9296ab0bfc11 51 */
Kojto 109:9296ab0bfc11 52
Kojto 109:9296ab0bfc11 53 /** @addtogroup SPI
Kojto 109:9296ab0bfc11 54 * @{
Kojto 109:9296ab0bfc11 55 */
Kojto 109:9296ab0bfc11 56
Kojto 109:9296ab0bfc11 57 /* Exported types ------------------------------------------------------------*/
Kojto 109:9296ab0bfc11 58 /** @defgroup SPI_Exported_Types SPI Exported Types
Kojto 109:9296ab0bfc11 59 * @{
Kojto 109:9296ab0bfc11 60 */
Kojto 109:9296ab0bfc11 61
Kojto 109:9296ab0bfc11 62 /**
Kojto 109:9296ab0bfc11 63 * @brief SPI Configuration Structure definition
Kojto 109:9296ab0bfc11 64 */
Kojto 109:9296ab0bfc11 65 typedef struct
Kojto 109:9296ab0bfc11 66 {
Kojto 109:9296ab0bfc11 67 uint32_t Mode; /*!< Specifies the SPI operating mode.
Kojto 109:9296ab0bfc11 68 This parameter can be a value of @ref SPI_Mode */
Kojto 109:9296ab0bfc11 69
Kojto 109:9296ab0bfc11 70 uint32_t Direction; /*!< Specifies the SPI bidirectional mode state.
Kojto 109:9296ab0bfc11 71 This parameter can be a value of @ref SPI_Direction */
Kojto 109:9296ab0bfc11 72
Kojto 109:9296ab0bfc11 73 uint32_t DataSize; /*!< Specifies the SPI data size.
Kojto 109:9296ab0bfc11 74 This parameter can be a value of @ref SPI_Data_Size */
Kojto 109:9296ab0bfc11 75
Kojto 109:9296ab0bfc11 76 uint32_t CLKPolarity; /*!< Specifies the serial clock steady state.
Kojto 109:9296ab0bfc11 77 This parameter can be a value of @ref SPI_Clock_Polarity */
Kojto 109:9296ab0bfc11 78
Kojto 109:9296ab0bfc11 79 uint32_t CLKPhase; /*!< Specifies the clock active edge for the bit capture.
Kojto 109:9296ab0bfc11 80 This parameter can be a value of @ref SPI_Clock_Phase */
Kojto 109:9296ab0bfc11 81
Kojto 109:9296ab0bfc11 82 uint32_t NSS; /*!< Specifies whether the NSS signal is managed by
Kojto 109:9296ab0bfc11 83 hardware (NSS pin) or by software using the SSI bit.
Kojto 109:9296ab0bfc11 84 This parameter can be a value of @ref SPI_Slave_Select_management */
Kojto 109:9296ab0bfc11 85
Kojto 109:9296ab0bfc11 86 uint32_t BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be
Kojto 109:9296ab0bfc11 87 used to configure the transmit and receive SCK clock.
Kojto 109:9296ab0bfc11 88 This parameter can be a value of @ref SPI_BaudRate_Prescaler
Kojto 109:9296ab0bfc11 89 @note The communication clock is derived from the master
Kojto 109:9296ab0bfc11 90 clock. The slave clock does not need to be set. */
Kojto 109:9296ab0bfc11 91
Kojto 109:9296ab0bfc11 92 uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit.
Kojto 109:9296ab0bfc11 93 This parameter can be a value of @ref SPI_MSB_LSB_transmission */
Kojto 109:9296ab0bfc11 94
Kojto 109:9296ab0bfc11 95 uint32_t TIMode; /*!< Specifies if the TI mode is enabled or not .
Kojto 109:9296ab0bfc11 96 This parameter can be a value of @ref SPI_TI_mode */
Kojto 109:9296ab0bfc11 97
Kojto 109:9296ab0bfc11 98 uint32_t CRCCalculation; /*!< Specifies if the CRC calculation is enabled or not.
Kojto 109:9296ab0bfc11 99 This parameter can be a value of @ref SPI_CRC_Calculation */
Kojto 109:9296ab0bfc11 100
Kojto 109:9296ab0bfc11 101 uint32_t CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation.
Kojto 109:9296ab0bfc11 102 This parameter must be a number between Min_Data = 0 and Max_Data = 65535 */
Kojto 109:9296ab0bfc11 103
Kojto 109:9296ab0bfc11 104 uint32_t CRCLength; /*!< Specifies the CRC Length used for the CRC calculation.
Kojto 109:9296ab0bfc11 105 CRC Length is only used with Data8 and Data16, not other data size
Kojto 109:9296ab0bfc11 106 This parameter can be a value of @ref SPI_CRC_length */
Kojto 109:9296ab0bfc11 107
Kojto 109:9296ab0bfc11 108 uint32_t NSSPMode; /*!< Specifies whether the NSSP signal is enabled or not .
Kojto 109:9296ab0bfc11 109 This parameter can be a value of @ref SPI_NSSP_Mode
Kojto 109:9296ab0bfc11 110 This mode is activated by the NSSP bit in the SPIx_CR2 register and
Kojto 109:9296ab0bfc11 111 it takes effect only if the SPI interface is configured as Motorola SPI
Kojto 109:9296ab0bfc11 112 master (FRF=0) with capture on the first edge (SPIx_CR1 CPHA = 0,
Kojto 109:9296ab0bfc11 113 CPOL setting is ignored).. */
Kojto 109:9296ab0bfc11 114 } SPI_InitTypeDef;
Kojto 109:9296ab0bfc11 115
Kojto 109:9296ab0bfc11 116 /**
Kojto 109:9296ab0bfc11 117 * @brief HAL State structures definition
Kojto 109:9296ab0bfc11 118 */
Kojto 109:9296ab0bfc11 119 typedef enum
Kojto 109:9296ab0bfc11 120 {
Kojto 109:9296ab0bfc11 121 HAL_SPI_STATE_RESET = 0x00, /*!< Peripheral not Initialized */
Kojto 109:9296ab0bfc11 122 HAL_SPI_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */
Kojto 109:9296ab0bfc11 123 HAL_SPI_STATE_BUSY = 0x02, /*!< an internal process is ongoing */
Kojto 109:9296ab0bfc11 124 HAL_SPI_STATE_BUSY_TX = 0x03, /*!< Data Transmission process is ongoing */
Kojto 109:9296ab0bfc11 125 HAL_SPI_STATE_BUSY_RX = 0x04, /*!< Data Reception process is ongoing */
Kojto 109:9296ab0bfc11 126 HAL_SPI_STATE_BUSY_TX_RX = 0x05, /*!< Data Transmission and Reception process is ongoing */
Kojto 109:9296ab0bfc11 127 HAL_SPI_STATE_ERROR = 0x06 /*!< SPI error state */
Kojto 109:9296ab0bfc11 128 }HAL_SPI_StateTypeDef;
Kojto 109:9296ab0bfc11 129
Kojto 109:9296ab0bfc11 130 /**
Kojto 109:9296ab0bfc11 131 * @brief SPI handle Structure definition
Kojto 109:9296ab0bfc11 132 */
Kojto 109:9296ab0bfc11 133 typedef struct __SPI_HandleTypeDef
Kojto 109:9296ab0bfc11 134 {
Kojto 109:9296ab0bfc11 135 SPI_TypeDef *Instance; /* SPI registers base address */
Kojto 109:9296ab0bfc11 136
Kojto 109:9296ab0bfc11 137 SPI_InitTypeDef Init; /* SPI communication parameters */
Kojto 109:9296ab0bfc11 138
Kojto 109:9296ab0bfc11 139 uint8_t *pTxBuffPtr; /* Pointer to SPI Tx transfer Buffer */
Kojto 109:9296ab0bfc11 140
Kojto 109:9296ab0bfc11 141 uint16_t TxXferSize; /* SPI Tx Transfer size */
Kojto 109:9296ab0bfc11 142
Kojto 109:9296ab0bfc11 143 uint16_t TxXferCount; /* SPI Tx Transfer Counter */
Kojto 109:9296ab0bfc11 144
Kojto 109:9296ab0bfc11 145 uint8_t *pRxBuffPtr; /* Pointer to SPI Rx transfer Buffer */
Kojto 109:9296ab0bfc11 146
Kojto 109:9296ab0bfc11 147 uint16_t RxXferSize; /* SPI Rx Transfer size */
Kojto 109:9296ab0bfc11 148
Kojto 109:9296ab0bfc11 149 uint16_t RxXferCount; /* SPI Rx Transfer Counter */
Kojto 109:9296ab0bfc11 150
Kojto 109:9296ab0bfc11 151 uint32_t CRCSize; /* SPI CRC size used for the transfer */
Kojto 109:9296ab0bfc11 152
Kojto 109:9296ab0bfc11 153 void (*RxISR)(struct __SPI_HandleTypeDef *hspi); /* function pointer on Rx IRQ handler */
Kojto 109:9296ab0bfc11 154
Kojto 109:9296ab0bfc11 155 void (*TxISR)(struct __SPI_HandleTypeDef *hspi); /* function pointer on Tx IRQ handler */
Kojto 109:9296ab0bfc11 156
Kojto 109:9296ab0bfc11 157 DMA_HandleTypeDef *hdmatx; /* SPI Tx DMA Handle parameters */
Kojto 109:9296ab0bfc11 158
Kojto 109:9296ab0bfc11 159 DMA_HandleTypeDef *hdmarx; /* SPI Rx DMA Handle parameters */
Kojto 109:9296ab0bfc11 160
Kojto 109:9296ab0bfc11 161 HAL_LockTypeDef Lock; /* Locking object */
Kojto 109:9296ab0bfc11 162
Kojto 109:9296ab0bfc11 163 __IO HAL_SPI_StateTypeDef State; /* SPI communication state */
Kojto 109:9296ab0bfc11 164
Kojto 109:9296ab0bfc11 165 uint32_t ErrorCode; /* SPI Error code */
Kojto 109:9296ab0bfc11 166
Kojto 109:9296ab0bfc11 167 }SPI_HandleTypeDef;
Kojto 109:9296ab0bfc11 168
Kojto 109:9296ab0bfc11 169 /**
Kojto 109:9296ab0bfc11 170 * @}
Kojto 109:9296ab0bfc11 171 */
Kojto 109:9296ab0bfc11 172
Kojto 109:9296ab0bfc11 173 /* Exported constants --------------------------------------------------------*/
Kojto 109:9296ab0bfc11 174
Kojto 109:9296ab0bfc11 175 /** @defgroup SPI_Exported_Constants SPI Exported Constants
Kojto 109:9296ab0bfc11 176 * @{
Kojto 109:9296ab0bfc11 177 */
Kojto 109:9296ab0bfc11 178
Kojto 109:9296ab0bfc11 179 /** @defgroup SPI_Error_Code SPI Error Code
Kojto 109:9296ab0bfc11 180 * @{
Kojto 109:9296ab0bfc11 181 */
Kojto 109:9296ab0bfc11 182 #define HAL_SPI_ERROR_NONE (uint32_t)0x00000000 /*!< No error */
Kojto 109:9296ab0bfc11 183 #define HAL_SPI_ERROR_MODF (uint32_t)0x00000001 /*!< MODF error */
Kojto 109:9296ab0bfc11 184 #define HAL_SPI_ERROR_CRC (uint32_t)0x00000002 /*!< CRC error */
Kojto 109:9296ab0bfc11 185 #define HAL_SPI_ERROR_OVR (uint32_t)0x00000004 /*!< OVR error */
Kojto 109:9296ab0bfc11 186 #define HAL_SPI_ERROR_FRE (uint32_t)0x00000008 /*!< FRE error */
Kojto 109:9296ab0bfc11 187 #define HAL_SPI_ERROR_DMA (uint32_t)0x00000010 /*!< DMA transfer error */
Kojto 109:9296ab0bfc11 188 #define HAL_SPI_ERROR_FLAG (uint32_t)0x00000020 /*!< Error on BSY/TXE/FTLVL/FRLVL Flag */
Kojto 109:9296ab0bfc11 189 #define HAL_SPI_ERROR_UNKNOW (uint32_t)0x00000040 /*!< Unknown error */
Kojto 109:9296ab0bfc11 190 /**
Kojto 109:9296ab0bfc11 191 * @}
Kojto 109:9296ab0bfc11 192 */
Kojto 109:9296ab0bfc11 193
Kojto 109:9296ab0bfc11 194
Kojto 109:9296ab0bfc11 195 /** @defgroup SPI_Mode SPI Mode
Kojto 109:9296ab0bfc11 196 * @{
Kojto 109:9296ab0bfc11 197 */
Kojto 109:9296ab0bfc11 198 #define SPI_MODE_SLAVE ((uint32_t)0x00000000)
Kojto 109:9296ab0bfc11 199 #define SPI_MODE_MASTER (SPI_CR1_MSTR | SPI_CR1_SSI)
Kojto 109:9296ab0bfc11 200 #define IS_SPI_MODE(MODE) (((MODE) == SPI_MODE_SLAVE) || \
Kojto 109:9296ab0bfc11 201 ((MODE) == SPI_MODE_MASTER))
Kojto 109:9296ab0bfc11 202 /**
Kojto 109:9296ab0bfc11 203 * @}
Kojto 109:9296ab0bfc11 204 */
Kojto 109:9296ab0bfc11 205
Kojto 109:9296ab0bfc11 206 /** @defgroup SPI_Direction SPI Direction Mode
Kojto 109:9296ab0bfc11 207 * @{
Kojto 109:9296ab0bfc11 208 */
Kojto 109:9296ab0bfc11 209 #define SPI_DIRECTION_2LINES ((uint32_t)0x00000000)
Kojto 109:9296ab0bfc11 210 #define SPI_DIRECTION_2LINES_RXONLY SPI_CR1_RXONLY
Kojto 109:9296ab0bfc11 211 #define SPI_DIRECTION_1LINE SPI_CR1_BIDIMODE
Kojto 109:9296ab0bfc11 212
Kojto 109:9296ab0bfc11 213 #define IS_SPI_DIRECTION(MODE) (((MODE) == SPI_DIRECTION_2LINES) || \
Kojto 109:9296ab0bfc11 214 ((MODE) == SPI_DIRECTION_2LINES_RXONLY) ||\
Kojto 109:9296ab0bfc11 215 ((MODE) == SPI_DIRECTION_1LINE))
Kojto 109:9296ab0bfc11 216
Kojto 109:9296ab0bfc11 217 #define IS_SPI_DIRECTION_2LINES(MODE) ((MODE) == SPI_DIRECTION_2LINES)
Kojto 109:9296ab0bfc11 218
Kojto 109:9296ab0bfc11 219 #define IS_SPI_DIRECTION_2LINES_OR_1LINE(MODE) (((MODE) == SPI_DIRECTION_2LINES)|| \
Kojto 109:9296ab0bfc11 220 ((MODE) == SPI_DIRECTION_1LINE))
Kojto 109:9296ab0bfc11 221 /**
Kojto 109:9296ab0bfc11 222 * @}
Kojto 109:9296ab0bfc11 223 */
Kojto 109:9296ab0bfc11 224
Kojto 109:9296ab0bfc11 225 /** @defgroup SPI_Data_Size SPI Data Size
Kojto 109:9296ab0bfc11 226 * @{
Kojto 109:9296ab0bfc11 227 */
Kojto 109:9296ab0bfc11 228 #define SPI_DATASIZE_4BIT ((uint32_t)0x0300) /*!< SPI Datasize = 4bits */
Kojto 109:9296ab0bfc11 229 #define SPI_DATASIZE_5BIT ((uint32_t)0x0400) /*!< SPI Datasize = 5bits */
Kojto 109:9296ab0bfc11 230 #define SPI_DATASIZE_6BIT ((uint32_t)0x0500) /*!< SPI Datasize = 6bits */
Kojto 109:9296ab0bfc11 231 #define SPI_DATASIZE_7BIT ((uint32_t)0x0600) /*!< SPI Datasize = 7bits */
Kojto 109:9296ab0bfc11 232 #define SPI_DATASIZE_8BIT ((uint32_t)0x0700) /*!< SPI Datasize = 8bits */
Kojto 109:9296ab0bfc11 233 #define SPI_DATASIZE_9BIT ((uint32_t)0x0800) /*!< SPI Datasize = 9bits */
Kojto 109:9296ab0bfc11 234 #define SPI_DATASIZE_10BIT ((uint32_t)0x0900) /*!< SPI Datasize = 10bits */
Kojto 109:9296ab0bfc11 235 #define SPI_DATASIZE_11BIT ((uint32_t)0x0A00) /*!< SPI Datasize = 11bits */
Kojto 109:9296ab0bfc11 236 #define SPI_DATASIZE_12BIT ((uint32_t)0x0B00) /*!< SPI Datasize = 12bits */
Kojto 109:9296ab0bfc11 237 #define SPI_DATASIZE_13BIT ((uint32_t)0x0C00) /*!< SPI Datasize = 13bits */
Kojto 109:9296ab0bfc11 238 #define SPI_DATASIZE_14BIT ((uint32_t)0x0D00) /*!< SPI Datasize = 14bits */
Kojto 109:9296ab0bfc11 239 #define SPI_DATASIZE_15BIT ((uint32_t)0x0E00) /*!< SPI Datasize = 15bits */
Kojto 109:9296ab0bfc11 240 #define SPI_DATASIZE_16BIT ((uint32_t)0x0F00) /*!< SPI Datasize = 16bits */
Kojto 109:9296ab0bfc11 241 #define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DATASIZE_16BIT) || \
Kojto 109:9296ab0bfc11 242 ((DATASIZE) == SPI_DATASIZE_15BIT) || \
Kojto 109:9296ab0bfc11 243 ((DATASIZE) == SPI_DATASIZE_14BIT) || \
Kojto 109:9296ab0bfc11 244 ((DATASIZE) == SPI_DATASIZE_13BIT) || \
Kojto 109:9296ab0bfc11 245 ((DATASIZE) == SPI_DATASIZE_12BIT) || \
Kojto 109:9296ab0bfc11 246 ((DATASIZE) == SPI_DATASIZE_11BIT) || \
Kojto 109:9296ab0bfc11 247 ((DATASIZE) == SPI_DATASIZE_10BIT) || \
Kojto 109:9296ab0bfc11 248 ((DATASIZE) == SPI_DATASIZE_9BIT) || \
Kojto 109:9296ab0bfc11 249 ((DATASIZE) == SPI_DATASIZE_8BIT) || \
Kojto 109:9296ab0bfc11 250 ((DATASIZE) == SPI_DATASIZE_7BIT) || \
Kojto 109:9296ab0bfc11 251 ((DATASIZE) == SPI_DATASIZE_6BIT) || \
Kojto 109:9296ab0bfc11 252 ((DATASIZE) == SPI_DATASIZE_5BIT) || \
Kojto 109:9296ab0bfc11 253 ((DATASIZE) == SPI_DATASIZE_4BIT))
Kojto 109:9296ab0bfc11 254 /**
Kojto 109:9296ab0bfc11 255 * @}
Kojto 109:9296ab0bfc11 256 */
Kojto 109:9296ab0bfc11 257
Kojto 109:9296ab0bfc11 258 /** @defgroup SPI_Clock_Polarity SPI Clock Polarity
Kojto 109:9296ab0bfc11 259 * @{
Kojto 109:9296ab0bfc11 260 */
Kojto 109:9296ab0bfc11 261 #define SPI_POLARITY_LOW ((uint32_t)0x00000000) /*!< SPI polarity Low */
Kojto 109:9296ab0bfc11 262 #define SPI_POLARITY_HIGH SPI_CR1_CPOL /*!< SPI polarity High */
Kojto 109:9296ab0bfc11 263 #define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_POLARITY_LOW) || \
Kojto 109:9296ab0bfc11 264 ((CPOL) == SPI_POLARITY_HIGH))
Kojto 109:9296ab0bfc11 265 /**
Kojto 109:9296ab0bfc11 266 * @}
Kojto 109:9296ab0bfc11 267 */
Kojto 109:9296ab0bfc11 268
Kojto 109:9296ab0bfc11 269 /** @defgroup SPI_Clock_Phase SPI Clock Phase
Kojto 109:9296ab0bfc11 270 * @{
Kojto 109:9296ab0bfc11 271 */
Kojto 109:9296ab0bfc11 272 #define SPI_PHASE_1EDGE ((uint32_t)0x00000000) /*!< SPI Phase 1EDGE */
Kojto 109:9296ab0bfc11 273 #define SPI_PHASE_2EDGE SPI_CR1_CPHA /*!< SPI Phase 2EDGE */
Kojto 109:9296ab0bfc11 274 #define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_PHASE_1EDGE) || \
Kojto 109:9296ab0bfc11 275 ((CPHA) == SPI_PHASE_2EDGE))
Kojto 109:9296ab0bfc11 276 /**
Kojto 109:9296ab0bfc11 277 * @}
Kojto 109:9296ab0bfc11 278 */
Kojto 109:9296ab0bfc11 279
Kojto 109:9296ab0bfc11 280 /** @defgroup SPI_Slave_Select_management SPI Slave Select management
Kojto 109:9296ab0bfc11 281 * @{
Kojto 109:9296ab0bfc11 282 */
Kojto 109:9296ab0bfc11 283 #define SPI_NSS_SOFT SPI_CR1_SSM
Kojto 109:9296ab0bfc11 284 #define SPI_NSS_HARD_INPUT ((uint32_t)0x00000000)
Kojto 109:9296ab0bfc11 285 #define SPI_NSS_HARD_OUTPUT ((uint32_t)0x00040000)
Kojto 109:9296ab0bfc11 286 #define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_SOFT) || \
Kojto 109:9296ab0bfc11 287 ((NSS) == SPI_NSS_HARD_INPUT) || \
Kojto 109:9296ab0bfc11 288 ((NSS) == SPI_NSS_HARD_OUTPUT))
Kojto 109:9296ab0bfc11 289 /**
Kojto 109:9296ab0bfc11 290 * @}
Kojto 109:9296ab0bfc11 291 */
Kojto 109:9296ab0bfc11 292
Kojto 109:9296ab0bfc11 293 /** @defgroup SPI_NSSP_Mode SPI NSS Pulse Mode
Kojto 109:9296ab0bfc11 294 * @{
Kojto 109:9296ab0bfc11 295 */
Kojto 109:9296ab0bfc11 296 #define SPI_NSS_PULSE_ENABLE SPI_CR2_NSSP
Kojto 109:9296ab0bfc11 297 #define SPI_NSS_PULSE_DISABLE ((uint32_t)0x00000000)
Kojto 109:9296ab0bfc11 298
Kojto 109:9296ab0bfc11 299 #define IS_SPI_NSSP(NSSP) (((NSSP) == SPI_NSS_PULSE_ENABLE) || \
Kojto 109:9296ab0bfc11 300 ((NSSP) == SPI_NSS_PULSE_DISABLE))
Kojto 109:9296ab0bfc11 301 /**
Kojto 109:9296ab0bfc11 302 * @}
Kojto 109:9296ab0bfc11 303 */
Kojto 109:9296ab0bfc11 304
Kojto 109:9296ab0bfc11 305 /** @defgroup SPI_BaudRate_Prescaler SPI BaudRate Prescaler
Kojto 109:9296ab0bfc11 306 * @{
Kojto 109:9296ab0bfc11 307 */
Kojto 109:9296ab0bfc11 308 #define SPI_BAUDRATEPRESCALER_2 ((uint32_t)0x00000000)
Kojto 109:9296ab0bfc11 309 #define SPI_BAUDRATEPRESCALER_4 ((uint32_t)0x00000008)
Kojto 109:9296ab0bfc11 310 #define SPI_BAUDRATEPRESCALER_8 ((uint32_t)0x00000010)
Kojto 109:9296ab0bfc11 311 #define SPI_BAUDRATEPRESCALER_16 ((uint32_t)0x00000018)
Kojto 109:9296ab0bfc11 312 #define SPI_BAUDRATEPRESCALER_32 ((uint32_t)0x00000020)
Kojto 109:9296ab0bfc11 313 #define SPI_BAUDRATEPRESCALER_64 ((uint32_t)0x00000028)
Kojto 109:9296ab0bfc11 314 #define SPI_BAUDRATEPRESCALER_128 ((uint32_t)0x00000030)
Kojto 109:9296ab0bfc11 315 #define SPI_BAUDRATEPRESCALER_256 ((uint32_t)0x00000038)
Kojto 109:9296ab0bfc11 316 #define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BAUDRATEPRESCALER_2) || \
Kojto 109:9296ab0bfc11 317 ((PRESCALER) == SPI_BAUDRATEPRESCALER_4) || \
Kojto 109:9296ab0bfc11 318 ((PRESCALER) == SPI_BAUDRATEPRESCALER_8) || \
Kojto 109:9296ab0bfc11 319 ((PRESCALER) == SPI_BAUDRATEPRESCALER_16) || \
Kojto 109:9296ab0bfc11 320 ((PRESCALER) == SPI_BAUDRATEPRESCALER_32) || \
Kojto 109:9296ab0bfc11 321 ((PRESCALER) == SPI_BAUDRATEPRESCALER_64) || \
Kojto 109:9296ab0bfc11 322 ((PRESCALER) == SPI_BAUDRATEPRESCALER_128) || \
Kojto 109:9296ab0bfc11 323 ((PRESCALER) == SPI_BAUDRATEPRESCALER_256))
Kojto 109:9296ab0bfc11 324 /**
Kojto 109:9296ab0bfc11 325 * @}
Kojto 109:9296ab0bfc11 326 */
Kojto 109:9296ab0bfc11 327
Kojto 109:9296ab0bfc11 328 /** @defgroup SPI_MSB_LSB_transmission SPI MSB LSB transmission
Kojto 109:9296ab0bfc11 329 * @{
Kojto 109:9296ab0bfc11 330 */
Kojto 109:9296ab0bfc11 331 #define SPI_FIRSTBIT_MSB ((uint32_t)0x00000000)
Kojto 109:9296ab0bfc11 332 #define SPI_FIRSTBIT_LSB SPI_CR1_LSBFIRST
Kojto 109:9296ab0bfc11 333 #define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FIRSTBIT_MSB) || \
Kojto 109:9296ab0bfc11 334 ((BIT) == SPI_FIRSTBIT_LSB))
Kojto 109:9296ab0bfc11 335 /**
Kojto 109:9296ab0bfc11 336 * @}
Kojto 109:9296ab0bfc11 337 */
Kojto 109:9296ab0bfc11 338
Kojto 109:9296ab0bfc11 339 /** @defgroup SPI_TI_mode SPI TI mode
Kojto 109:9296ab0bfc11 340 * @{
Kojto 109:9296ab0bfc11 341 */
Kojto 109:9296ab0bfc11 342 #define SPI_TIMODE_DISABLE ((uint32_t)0x00000000)
Kojto 109:9296ab0bfc11 343 #define SPI_TIMODE_ENABLE SPI_CR2_FRF
Kojto 109:9296ab0bfc11 344 #define IS_SPI_TIMODE(MODE) (((MODE) == SPI_TIMODE_DISABLE) || \
Kojto 109:9296ab0bfc11 345 ((MODE) == SPI_TIMODE_ENABLE))
Kojto 109:9296ab0bfc11 346 /**
Kojto 109:9296ab0bfc11 347 * @}
Kojto 109:9296ab0bfc11 348 */
Kojto 109:9296ab0bfc11 349
Kojto 109:9296ab0bfc11 350 /** @defgroup SPI_CRC_Calculation SPI CRC Calculation
Kojto 109:9296ab0bfc11 351 * @{
Kojto 109:9296ab0bfc11 352 */
Kojto 109:9296ab0bfc11 353 #define SPI_CRCCALCULATION_DISABLE ((uint32_t)0x00000000)
Kojto 109:9296ab0bfc11 354 #define SPI_CRCCALCULATION_ENABLE SPI_CR1_CRCEN
Kojto 109:9296ab0bfc11 355 #define IS_SPI_CRC_CALCULATION(CALCULATION) (((CALCULATION) == SPI_CRCCALCULATION_DISABLE) || \
Kojto 109:9296ab0bfc11 356 ((CALCULATION) == SPI_CRCCALCULATION_ENABLE))
Kojto 109:9296ab0bfc11 357 /**
Kojto 109:9296ab0bfc11 358 * @}
Kojto 109:9296ab0bfc11 359 */
Kojto 109:9296ab0bfc11 360
Kojto 109:9296ab0bfc11 361 /** @defgroup SPI_CRC_length SPI CRC Length
Kojto 109:9296ab0bfc11 362 * @{
Kojto 109:9296ab0bfc11 363 * This parameter can be one of the following values:
Kojto 109:9296ab0bfc11 364 * SPI_CRC_LENGTH_DATASIZE: aligned with the data size
Kojto 109:9296ab0bfc11 365 * SPI_CRC_LENGTH_8BIT : CRC 8bit
Kojto 109:9296ab0bfc11 366 * SPI_CRC_LENGTH_16BIT : CRC 16bit
Kojto 109:9296ab0bfc11 367 */
Kojto 109:9296ab0bfc11 368 #define SPI_CRC_LENGTH_DATASIZE ((uint32_t)0x00000000)
Kojto 109:9296ab0bfc11 369 #define SPI_CRC_LENGTH_8BIT ((uint32_t)0x00000001)
Kojto 109:9296ab0bfc11 370 #define SPI_CRC_LENGTH_16BIT ((uint32_t)0x00000002)
Kojto 109:9296ab0bfc11 371 #define IS_SPI_CRC_LENGTH(LENGTH) (((LENGTH) == SPI_CRC_LENGTH_DATASIZE) ||\
Kojto 109:9296ab0bfc11 372 ((LENGTH) == SPI_CRC_LENGTH_8BIT) || \
Kojto 109:9296ab0bfc11 373 ((LENGTH) == SPI_CRC_LENGTH_16BIT))
Kojto 109:9296ab0bfc11 374 /**
Kojto 109:9296ab0bfc11 375 * @}
Kojto 109:9296ab0bfc11 376 */
Kojto 109:9296ab0bfc11 377
Kojto 109:9296ab0bfc11 378 /** @defgroup SPI_FIFO_reception_threshold SPI FIFO Reception Threshold
Kojto 109:9296ab0bfc11 379 * @{
Kojto 109:9296ab0bfc11 380 * This parameter can be one of the following values:
Kojto 109:9296ab0bfc11 381 * SPI_RXFIFO_THRESHOLD or SPI_RXFIFO_THRESHOLD_QF :
Kojto 109:9296ab0bfc11 382 * RXNE event is generated if the FIFO
Kojto 109:9296ab0bfc11 383 * level is greater or equal to 1/2(16-bits).
Kojto 109:9296ab0bfc11 384 * SPI_RXFIFO_THRESHOLD_HF: RXNE event is generated if the FIFO
Kojto 109:9296ab0bfc11 385 * level is greater or equal to 1/4(8 bits). */
Kojto 109:9296ab0bfc11 386 #define SPI_RXFIFO_THRESHOLD SPI_CR2_FRXTH
Kojto 109:9296ab0bfc11 387 #define SPI_RXFIFO_THRESHOLD_QF SPI_CR2_FRXTH
Kojto 109:9296ab0bfc11 388 #define SPI_RXFIFO_THRESHOLD_HF ((uint32_t)0x00000000)
Kojto 109:9296ab0bfc11 389
Kojto 109:9296ab0bfc11 390 /**
Kojto 109:9296ab0bfc11 391 * @}
Kojto 109:9296ab0bfc11 392 */
Kojto 109:9296ab0bfc11 393
Kojto 109:9296ab0bfc11 394 /** @defgroup SPI_Interrupt_configuration_definition SPI Interrupt configuration definition
Kojto 109:9296ab0bfc11 395 * @brief SPI Interrupt definition
Kojto 109:9296ab0bfc11 396 * Elements values convention: 0xXXXXXXXX
Kojto 109:9296ab0bfc11 397 * - XXXXXXXX : Interrupt control mask
Kojto 109:9296ab0bfc11 398 * @{
Kojto 109:9296ab0bfc11 399 */
Kojto 109:9296ab0bfc11 400 #define SPI_IT_TXE SPI_CR2_TXEIE
Kojto 109:9296ab0bfc11 401 #define SPI_IT_RXNE SPI_CR2_RXNEIE
Kojto 109:9296ab0bfc11 402 #define SPI_IT_ERR SPI_CR2_ERRIE
Kojto 109:9296ab0bfc11 403 /**
Kojto 109:9296ab0bfc11 404 * @}
Kojto 109:9296ab0bfc11 405 */
Kojto 109:9296ab0bfc11 406
Kojto 109:9296ab0bfc11 407
Kojto 109:9296ab0bfc11 408 /** @defgroup SPI_Flag_definition SPI Flag definition
Kojto 109:9296ab0bfc11 409 * @brief Flag definition
Kojto 109:9296ab0bfc11 410 * Elements values convention: 0xXXXXYYYY
Kojto 109:9296ab0bfc11 411 * - XXXX : Flag register Index
Kojto 109:9296ab0bfc11 412 * - YYYY : Flag mask
Kojto 109:9296ab0bfc11 413 * @{
Kojto 109:9296ab0bfc11 414 */
Kojto 109:9296ab0bfc11 415 #define SPI_FLAG_RXNE SPI_SR_RXNE /* SPI status flag: Rx buffer not empty flag */
Kojto 109:9296ab0bfc11 416 #define SPI_FLAG_TXE SPI_SR_TXE /* SPI status flag: Tx buffer empty flag */
Kojto 109:9296ab0bfc11 417 #define SPI_FLAG_BSY SPI_SR_BSY /* SPI status flag: Busy flag */
Kojto 109:9296ab0bfc11 418 #define SPI_FLAG_CRCERR SPI_SR_CRCERR /* SPI Error flag: CRC error flag */
Kojto 109:9296ab0bfc11 419 #define SPI_FLAG_MODF SPI_SR_MODF /* SPI Error flag: Mode fault flag */
Kojto 109:9296ab0bfc11 420 #define SPI_FLAG_OVR SPI_SR_OVR /* SPI Error flag: Overrun flag */
Kojto 109:9296ab0bfc11 421 #define SPI_FLAG_FRE SPI_SR_FRE /* SPI Error flag: TI mode frame format error flag */
Kojto 109:9296ab0bfc11 422 #define SPI_FLAG_FTLVL SPI_SR_FTLVL /* SPI fifo transmission level */
Kojto 109:9296ab0bfc11 423 #define SPI_FLAG_FRLVL SPI_SR_FRLVL /* SPI fifo reception level */
Kojto 109:9296ab0bfc11 424 /**
Kojto 109:9296ab0bfc11 425 * @}
Kojto 109:9296ab0bfc11 426 */
Kojto 109:9296ab0bfc11 427
Kojto 109:9296ab0bfc11 428 /** @defgroup SPI_transmission_fifo_status_level SPI Transmission FIFO Status Level
Kojto 109:9296ab0bfc11 429 * @{
Kojto 109:9296ab0bfc11 430 */
Kojto 109:9296ab0bfc11 431 #define SPI_FTLVL_EMPTY ((uint32_t)0x0000)
Kojto 109:9296ab0bfc11 432 #define SPI_FTLVL_QUARTER_FULL ((uint32_t)0x0800)
Kojto 109:9296ab0bfc11 433 #define SPI_FTLVL_HALF_FULL ((uint32_t)0x1000)
Kojto 109:9296ab0bfc11 434 #define SPI_FTLVL_FULL ((uint32_t)0x1800)
Kojto 109:9296ab0bfc11 435
Kojto 109:9296ab0bfc11 436 /**
Kojto 109:9296ab0bfc11 437 * @}
Kojto 109:9296ab0bfc11 438 */
Kojto 109:9296ab0bfc11 439
Kojto 109:9296ab0bfc11 440 /** @defgroup SPI_reception_fifo_status_level SPI Reception FIFO Status Level
Kojto 109:9296ab0bfc11 441 * @{
Kojto 109:9296ab0bfc11 442 */
Kojto 109:9296ab0bfc11 443 #define SPI_FRLVL_EMPTY ((uint32_t)0x0000)
Kojto 109:9296ab0bfc11 444 #define SPI_FRLVL_QUARTER_FULL ((uint32_t)0x0200)
Kojto 109:9296ab0bfc11 445 #define SPI_FRLVL_HALF_FULL ((uint32_t)0x0400)
Kojto 109:9296ab0bfc11 446 #define SPI_FRLVL_FULL ((uint32_t)0x0600)
Kojto 109:9296ab0bfc11 447 /**
Kojto 109:9296ab0bfc11 448 * @}
Kojto 109:9296ab0bfc11 449 */
Kojto 109:9296ab0bfc11 450
Kojto 109:9296ab0bfc11 451 /**
Kojto 109:9296ab0bfc11 452 * @}
Kojto 109:9296ab0bfc11 453 */
Kojto 109:9296ab0bfc11 454
Kojto 109:9296ab0bfc11 455 /* Exported macros ------------------------------------------------------------*/
Kojto 109:9296ab0bfc11 456 /** @defgroup SPI_Exported_Macros SPI Exported Macros
Kojto 109:9296ab0bfc11 457 * @{
Kojto 109:9296ab0bfc11 458 */
Kojto 109:9296ab0bfc11 459
Kojto 109:9296ab0bfc11 460 /** @brief Reset SPI handle state.
Kojto 109:9296ab0bfc11 461 * @param __HANDLE__: SPI handle.
Kojto 109:9296ab0bfc11 462 * @retval None
Kojto 109:9296ab0bfc11 463 */
Kojto 109:9296ab0bfc11 464 #define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPI_STATE_RESET)
Kojto 109:9296ab0bfc11 465
Kojto 109:9296ab0bfc11 466 /** @brief Enable or disable the specified SPI interrupts.
Kojto 109:9296ab0bfc11 467 * @param __HANDLE__: specifies the SPI Handle.
Kojto 109:9296ab0bfc11 468 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
Kojto 109:9296ab0bfc11 469 * @param __INTERRUPT__: specifies the interrupt source to enable or disable.
Kojto 109:9296ab0bfc11 470 * This parameter can be one of the following values:
Kojto 109:9296ab0bfc11 471 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable
Kojto 109:9296ab0bfc11 472 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
Kojto 109:9296ab0bfc11 473 * @arg SPI_IT_ERR: Error interrupt enable
Kojto 109:9296ab0bfc11 474 * @retval None
Kojto 109:9296ab0bfc11 475 */
Kojto 109:9296ab0bfc11 476 #define __HAL_SPI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__))
Kojto 109:9296ab0bfc11 477 #define __HAL_SPI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &= (~(__INTERRUPT__)))
Kojto 109:9296ab0bfc11 478
Kojto 109:9296ab0bfc11 479 /** @brief Check whether the specified SPI interrupt source is enabled or not.
Kojto 109:9296ab0bfc11 480 * @param __HANDLE__: specifies the SPI Handle.
Kojto 109:9296ab0bfc11 481 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
Kojto 109:9296ab0bfc11 482 * @param __INTERRUPT__: specifies the SPI interrupt source to check.
Kojto 109:9296ab0bfc11 483 * This parameter can be one of the following values:
Kojto 109:9296ab0bfc11 484 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable
Kojto 109:9296ab0bfc11 485 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
Kojto 109:9296ab0bfc11 486 * @arg SPI_IT_ERR: Error interrupt enable
Kojto 109:9296ab0bfc11 487 * @retval The new state of __IT__ (TRUE or FALSE).
Kojto 109:9296ab0bfc11 488 */
Kojto 109:9296ab0bfc11 489 #define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
Kojto 109:9296ab0bfc11 490
Kojto 109:9296ab0bfc11 491 /** @brief Check whether the specified SPI flag is set or not.
Kojto 109:9296ab0bfc11 492 * @param __HANDLE__: specifies the SPI Handle.
Kojto 109:9296ab0bfc11 493 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
Kojto 109:9296ab0bfc11 494 * @param __FLAG__: specifies the flag to check.
Kojto 109:9296ab0bfc11 495 * This parameter can be one of the following values:
Kojto 109:9296ab0bfc11 496 * @arg SPI_FLAG_RXNE: Receive buffer not empty flag
Kojto 109:9296ab0bfc11 497 * @arg SPI_FLAG_TXE: Transmit buffer empty flag
Kojto 109:9296ab0bfc11 498 * @arg SPI_FLAG_CRCERR: CRC error flag
Kojto 109:9296ab0bfc11 499 * @arg SPI_FLAG_MODF: Mode fault flag
Kojto 109:9296ab0bfc11 500 * @arg SPI_FLAG_OVR: Overrun flag
Kojto 109:9296ab0bfc11 501 * @arg SPI_FLAG_BSY: Busy flag
Kojto 109:9296ab0bfc11 502 * @arg SPI_FLAG_FRE: Frame format error flag
Kojto 109:9296ab0bfc11 503 * @arg SPI_FLAG_FTLVL: SPI fifo transmission level
Kojto 109:9296ab0bfc11 504 * @arg SPI_FLAG_FRLVL: SPI fifo reception level
Kojto 109:9296ab0bfc11 505 * @retval The new state of __FLAG__ (TRUE or FALSE).
Kojto 109:9296ab0bfc11 506 */
Kojto 109:9296ab0bfc11 507 #define __HAL_SPI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
Kojto 109:9296ab0bfc11 508
Kojto 109:9296ab0bfc11 509 /** @brief Clear the SPI CRCERR pending flag.
Kojto 109:9296ab0bfc11 510 * @param __HANDLE__: specifies the SPI Handle.
Kojto 109:9296ab0bfc11 511 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
Kojto 109:9296ab0bfc11 512 * @retval None
Kojto 109:9296ab0bfc11 513 */
Kojto 109:9296ab0bfc11 514 #define __HAL_SPI_CLEAR_CRCERRFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR = (uint16_t)(~SPI_FLAG_CRCERR))
Kojto 109:9296ab0bfc11 515
Kojto 109:9296ab0bfc11 516 /** @brief Clear the SPI MODF pending flag.
Kojto 109:9296ab0bfc11 517 * @param __HANDLE__: specifies the SPI Handle.
Kojto 109:9296ab0bfc11 518 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
Kojto 109:9296ab0bfc11 519 *
Kojto 109:9296ab0bfc11 520 * @retval None
Kojto 109:9296ab0bfc11 521 */
Kojto 109:9296ab0bfc11 522 #define __HAL_SPI_CLEAR_MODFFLAG(__HANDLE__) \
Kojto 109:9296ab0bfc11 523 do{ \
Kojto 109:9296ab0bfc11 524 __IO uint32_t tmpreg; \
Kojto 109:9296ab0bfc11 525 tmpreg = (__HANDLE__)->Instance->SR; \
Kojto 109:9296ab0bfc11 526 (__HANDLE__)->Instance->CR1 &= (~SPI_CR1_SPE); \
Kojto 109:9296ab0bfc11 527 UNUSED(tmpreg); \
Kojto 109:9296ab0bfc11 528 } while(0)
Kojto 109:9296ab0bfc11 529
Kojto 109:9296ab0bfc11 530 /** @brief Clear the SPI OVR pending flag.
Kojto 109:9296ab0bfc11 531 * @param __HANDLE__: specifies the SPI Handle.
Kojto 109:9296ab0bfc11 532 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
Kojto 109:9296ab0bfc11 533 *
Kojto 109:9296ab0bfc11 534 * @retval None
Kojto 109:9296ab0bfc11 535 */
Kojto 109:9296ab0bfc11 536 #define __HAL_SPI_CLEAR_OVRFLAG(__HANDLE__) \
Kojto 109:9296ab0bfc11 537 do{ \
Kojto 109:9296ab0bfc11 538 __IO uint32_t tmpreg; \
Kojto 109:9296ab0bfc11 539 tmpreg = (__HANDLE__)->Instance->DR; \
Kojto 109:9296ab0bfc11 540 tmpreg = (__HANDLE__)->Instance->SR; \
Kojto 109:9296ab0bfc11 541 UNUSED(tmpreg); \
Kojto 109:9296ab0bfc11 542 } while(0)
Kojto 109:9296ab0bfc11 543
Kojto 109:9296ab0bfc11 544 /** @brief Clear the SPI FRE pending flag.
Kojto 109:9296ab0bfc11 545 * @param __HANDLE__: specifies the SPI Handle.
Kojto 109:9296ab0bfc11 546 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
Kojto 109:9296ab0bfc11 547 *
Kojto 109:9296ab0bfc11 548 * @retval None
Kojto 109:9296ab0bfc11 549 */
Kojto 109:9296ab0bfc11 550 #define __HAL_SPI_CLEAR_FREFLAG(__HANDLE__) \
Kojto 109:9296ab0bfc11 551 do{ \
Kojto 109:9296ab0bfc11 552 __IO uint32_t tmpreg; \
Kojto 109:9296ab0bfc11 553 tmpreg = (__HANDLE__)->Instance->SR; \
Kojto 109:9296ab0bfc11 554 UNUSED(tmpreg); \
Kojto 109:9296ab0bfc11 555 } while(0)
Kojto 109:9296ab0bfc11 556
Kojto 109:9296ab0bfc11 557 /** @brief Enable the SPI peripheral.
Kojto 109:9296ab0bfc11 558 * @param __HANDLE__: specifies the SPI Handle.
Kojto 109:9296ab0bfc11 559 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
Kojto 109:9296ab0bfc11 560 * @retval None
Kojto 109:9296ab0bfc11 561 */
Kojto 109:9296ab0bfc11 562 #define __HAL_SPI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SPI_CR1_SPE)
Kojto 109:9296ab0bfc11 563
Kojto 109:9296ab0bfc11 564 /** @brief Disable the SPI peripheral.
Kojto 109:9296ab0bfc11 565 * @param __HANDLE__: specifies the SPI Handle.
Kojto 109:9296ab0bfc11 566 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
Kojto 109:9296ab0bfc11 567 * @retval None
Kojto 109:9296ab0bfc11 568 */
Kojto 109:9296ab0bfc11 569 #define __HAL_SPI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= (~SPI_CR1_SPE))
Kojto 109:9296ab0bfc11 570
Kojto 109:9296ab0bfc11 571 /**
Kojto 109:9296ab0bfc11 572 * @}
Kojto 109:9296ab0bfc11 573 */
Kojto 109:9296ab0bfc11 574
Kojto 109:9296ab0bfc11 575 /* Private macros --------------------------------------------------------*/
Kojto 109:9296ab0bfc11 576 /** @defgroup SPI_Private_Macros SPI Private Macros
Kojto 109:9296ab0bfc11 577 * @{
Kojto 109:9296ab0bfc11 578 */
Kojto 109:9296ab0bfc11 579
Kojto 109:9296ab0bfc11 580 /** @brief Set the SPI transmit-only mode.
Kojto 109:9296ab0bfc11 581 * @param __HANDLE__: specifies the SPI Handle.
Kojto 109:9296ab0bfc11 582 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
Kojto 109:9296ab0bfc11 583 * @retval None
Kojto 109:9296ab0bfc11 584 */
Kojto 109:9296ab0bfc11 585 #define SPI_1LINE_TX(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SPI_CR1_BIDIOE)
Kojto 109:9296ab0bfc11 586
Kojto 109:9296ab0bfc11 587 /** @brief Set the SPI receive-only mode.
Kojto 109:9296ab0bfc11 588 * @param __HANDLE__: specifies the SPI Handle.
Kojto 109:9296ab0bfc11 589 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
Kojto 109:9296ab0bfc11 590 * @retval None
Kojto 109:9296ab0bfc11 591 */
Kojto 109:9296ab0bfc11 592 #define SPI_1LINE_RX(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= (~SPI_CR1_BIDIOE))
Kojto 109:9296ab0bfc11 593
Kojto 109:9296ab0bfc11 594 /** @brief Reset the CRC calculation of the SPI.
Kojto 109:9296ab0bfc11 595 * @param __HANDLE__: specifies the SPI Handle.
Kojto 109:9296ab0bfc11 596 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
Kojto 109:9296ab0bfc11 597 * @retval None
Kojto 109:9296ab0bfc11 598 */
Kojto 109:9296ab0bfc11 599 #define SPI_RESET_CRC(__HANDLE__) do{(__HANDLE__)->Instance->CR1 &= (uint16_t)(~SPI_CR1_CRCEN);\
Kojto 109:9296ab0bfc11 600 (__HANDLE__)->Instance->CR1 |= SPI_CR1_CRCEN;}while(0)
Kojto 109:9296ab0bfc11 601
Kojto 109:9296ab0bfc11 602
Kojto 109:9296ab0bfc11 603 #define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) (((POLYNOMIAL) >= 0x1) && ((POLYNOMIAL) <= 0xFFFF))
Kojto 109:9296ab0bfc11 604
Kojto 109:9296ab0bfc11 605
Kojto 109:9296ab0bfc11 606 /**
Kojto 109:9296ab0bfc11 607 * @}
Kojto 109:9296ab0bfc11 608 */
Kojto 109:9296ab0bfc11 609
Kojto 109:9296ab0bfc11 610 /* Include SPI HAL Extended module */
Kojto 109:9296ab0bfc11 611 #include "stm32f0xx_hal_spi_ex.h"
Kojto 109:9296ab0bfc11 612
Kojto 109:9296ab0bfc11 613 /* Exported functions --------------------------------------------------------*/
Kojto 109:9296ab0bfc11 614 /** @addtogroup SPI_Exported_Functions
Kojto 109:9296ab0bfc11 615 * @{
Kojto 109:9296ab0bfc11 616 */
Kojto 109:9296ab0bfc11 617
Kojto 109:9296ab0bfc11 618 /* Initialization and de-initialization functions ****************************/
Kojto 109:9296ab0bfc11 619 /** @addtogroup SPI_Exported_Functions_Group1
Kojto 109:9296ab0bfc11 620 * @{
Kojto 109:9296ab0bfc11 621 */
Kojto 109:9296ab0bfc11 622 HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi);
Kojto 109:9296ab0bfc11 623 HAL_StatusTypeDef HAL_SPI_DeInit (SPI_HandleTypeDef *hspi);
Kojto 109:9296ab0bfc11 624 void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi);
Kojto 109:9296ab0bfc11 625 void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi);
Kojto 109:9296ab0bfc11 626 /**
Kojto 109:9296ab0bfc11 627 * @}
Kojto 109:9296ab0bfc11 628 */
Kojto 109:9296ab0bfc11 629
Kojto 109:9296ab0bfc11 630 /* IO operation functions *****************************************************/
Kojto 109:9296ab0bfc11 631 /** @addtogroup SPI_Exported_Functions_Group2
Kojto 109:9296ab0bfc11 632 * @{
Kojto 109:9296ab0bfc11 633 */
Kojto 109:9296ab0bfc11 634 HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
Kojto 109:9296ab0bfc11 635 HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
Kojto 109:9296ab0bfc11 636 HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
Kojto 109:9296ab0bfc11 637 HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
Kojto 109:9296ab0bfc11 638 HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
Kojto 109:9296ab0bfc11 639 HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
Kojto 109:9296ab0bfc11 640 HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
Kojto 109:9296ab0bfc11 641 HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
Kojto 109:9296ab0bfc11 642 HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
Kojto 109:9296ab0bfc11 643 HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi);
Kojto 109:9296ab0bfc11 644 HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi);
Kojto 109:9296ab0bfc11 645 HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi);
Kojto 109:9296ab0bfc11 646
Kojto 109:9296ab0bfc11 647 void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi);
Kojto 109:9296ab0bfc11 648 void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi);
Kojto 109:9296ab0bfc11 649 void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi);
Kojto 109:9296ab0bfc11 650 void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi);
Kojto 109:9296ab0bfc11 651 void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi);
Kojto 109:9296ab0bfc11 652 void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi);
Kojto 109:9296ab0bfc11 653 void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi);
Kojto 109:9296ab0bfc11 654 void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi);
Kojto 109:9296ab0bfc11 655 /**
Kojto 109:9296ab0bfc11 656 * @}
Kojto 109:9296ab0bfc11 657 */
Kojto 109:9296ab0bfc11 658
Kojto 109:9296ab0bfc11 659 /* Peripheral State and Error functions ***************************************/
Kojto 109:9296ab0bfc11 660 /** @addtogroup SPI_Exported_Functions_Group3
Kojto 109:9296ab0bfc11 661 * @{
Kojto 109:9296ab0bfc11 662 */
Kojto 109:9296ab0bfc11 663 HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi);
Kojto 109:9296ab0bfc11 664 uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi);
Kojto 109:9296ab0bfc11 665 /**
Kojto 109:9296ab0bfc11 666 * @}
Kojto 109:9296ab0bfc11 667 */
Kojto 109:9296ab0bfc11 668
Kojto 109:9296ab0bfc11 669 /**
Kojto 109:9296ab0bfc11 670 * @}
Kojto 109:9296ab0bfc11 671 */
Kojto 109:9296ab0bfc11 672
Kojto 109:9296ab0bfc11 673 /**
Kojto 109:9296ab0bfc11 674 * @}
Kojto 109:9296ab0bfc11 675 */
Kojto 109:9296ab0bfc11 676
Kojto 109:9296ab0bfc11 677 /**
Kojto 109:9296ab0bfc11 678 * @}
Kojto 109:9296ab0bfc11 679 */
Kojto 109:9296ab0bfc11 680
Kojto 109:9296ab0bfc11 681 #ifdef __cplusplus
Kojto 109:9296ab0bfc11 682 }
Kojto 109:9296ab0bfc11 683 #endif
Kojto 109:9296ab0bfc11 684
Kojto 109:9296ab0bfc11 685 #endif /* __STM32F0xx_HAL_SPI_H */
Kojto 109:9296ab0bfc11 686
Kojto 109:9296ab0bfc11 687 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/