Elijah Orr
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TARGET_DISCO_L476VG/stm32l4xx_hal_cortex.h@121:672067c3ada4, 2016-04-14 (annotated)
- Committer:
- elijahorr
- Date:
- Thu Apr 14 07:28:54 2016 +0000
- Revision:
- 121:672067c3ada4
- Parent:
- 107:4f6c30876dfa
.
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| Kojto | 107:4f6c30876dfa | 1 | /** |
| Kojto | 107:4f6c30876dfa | 2 | ****************************************************************************** |
| Kojto | 107:4f6c30876dfa | 3 | * @file stm32l4xx_hal_cortex.h |
| Kojto | 107:4f6c30876dfa | 4 | * @author MCD Application Team |
| Kojto | 107:4f6c30876dfa | 5 | * @version V1.0.0 |
| Kojto | 107:4f6c30876dfa | 6 | * @date 26-June-2015 |
| Kojto | 107:4f6c30876dfa | 7 | * @brief Header file of CORTEX HAL module. |
| Kojto | 107:4f6c30876dfa | 8 | ****************************************************************************** |
| Kojto | 107:4f6c30876dfa | 9 | * @attention |
| Kojto | 107:4f6c30876dfa | 10 | * |
| Kojto | 107:4f6c30876dfa | 11 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> |
| Kojto | 107:4f6c30876dfa | 12 | * |
| Kojto | 107:4f6c30876dfa | 13 | * Redistribution and use in source and binary forms, with or without modification, |
| Kojto | 107:4f6c30876dfa | 14 | * are permitted provided that the following conditions are met: |
| Kojto | 107:4f6c30876dfa | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| Kojto | 107:4f6c30876dfa | 16 | * this list of conditions and the following disclaimer. |
| Kojto | 107:4f6c30876dfa | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| Kojto | 107:4f6c30876dfa | 18 | * this list of conditions and the following disclaimer in the documentation |
| Kojto | 107:4f6c30876dfa | 19 | * and/or other materials provided with the distribution. |
| Kojto | 107:4f6c30876dfa | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| Kojto | 107:4f6c30876dfa | 21 | * may be used to endorse or promote products derived from this software |
| Kojto | 107:4f6c30876dfa | 22 | * without specific prior written permission. |
| Kojto | 107:4f6c30876dfa | 23 | * |
| Kojto | 107:4f6c30876dfa | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| Kojto | 107:4f6c30876dfa | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| Kojto | 107:4f6c30876dfa | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| Kojto | 107:4f6c30876dfa | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| Kojto | 107:4f6c30876dfa | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| Kojto | 107:4f6c30876dfa | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| Kojto | 107:4f6c30876dfa | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| Kojto | 107:4f6c30876dfa | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| Kojto | 107:4f6c30876dfa | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| Kojto | 107:4f6c30876dfa | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| Kojto | 107:4f6c30876dfa | 34 | * |
| Kojto | 107:4f6c30876dfa | 35 | ****************************************************************************** |
| Kojto | 107:4f6c30876dfa | 36 | */ |
| Kojto | 107:4f6c30876dfa | 37 | |
| Kojto | 107:4f6c30876dfa | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| Kojto | 107:4f6c30876dfa | 39 | #ifndef __STM32L4xx_HAL_CORTEX_H |
| Kojto | 107:4f6c30876dfa | 40 | #define __STM32L4xx_HAL_CORTEX_H |
| Kojto | 107:4f6c30876dfa | 41 | |
| Kojto | 107:4f6c30876dfa | 42 | #ifdef __cplusplus |
| Kojto | 107:4f6c30876dfa | 43 | extern "C" { |
| Kojto | 107:4f6c30876dfa | 44 | #endif |
| Kojto | 107:4f6c30876dfa | 45 | |
| Kojto | 107:4f6c30876dfa | 46 | /* Includes ------------------------------------------------------------------*/ |
| Kojto | 107:4f6c30876dfa | 47 | #include "stm32l4xx_hal_def.h" |
| Kojto | 107:4f6c30876dfa | 48 | |
| Kojto | 107:4f6c30876dfa | 49 | /** @addtogroup STM32L4xx_HAL_Driver |
| Kojto | 107:4f6c30876dfa | 50 | * @{ |
| Kojto | 107:4f6c30876dfa | 51 | */ |
| Kojto | 107:4f6c30876dfa | 52 | |
| Kojto | 107:4f6c30876dfa | 53 | /** @defgroup CORTEX CORTEX |
| Kojto | 107:4f6c30876dfa | 54 | * @{ |
| Kojto | 107:4f6c30876dfa | 55 | */ |
| Kojto | 107:4f6c30876dfa | 56 | |
| Kojto | 107:4f6c30876dfa | 57 | /* Exported types ------------------------------------------------------------*/ |
| Kojto | 107:4f6c30876dfa | 58 | /** @defgroup CORTEX_Exported_Types CORTEX Exported Types |
| Kojto | 107:4f6c30876dfa | 59 | * @{ |
| Kojto | 107:4f6c30876dfa | 60 | */ |
| Kojto | 107:4f6c30876dfa | 61 | |
| Kojto | 107:4f6c30876dfa | 62 | #if (__MPU_PRESENT == 1) |
| Kojto | 107:4f6c30876dfa | 63 | /** @defgroup CORTEX_MPU_Region_Initialization_Structure_definition MPU Region Initialization Structure Definition |
| Kojto | 107:4f6c30876dfa | 64 | * @{ |
| Kojto | 107:4f6c30876dfa | 65 | */ |
| Kojto | 107:4f6c30876dfa | 66 | typedef struct |
| Kojto | 107:4f6c30876dfa | 67 | { |
| Kojto | 107:4f6c30876dfa | 68 | uint8_t Enable; /*!< Specifies the status of the region. |
| Kojto | 107:4f6c30876dfa | 69 | This parameter can be a value of @ref CORTEX_MPU_Region_Enable */ |
| Kojto | 107:4f6c30876dfa | 70 | uint8_t Number; /*!< Specifies the number of the region to protect. |
| Kojto | 107:4f6c30876dfa | 71 | This parameter can be a value of @ref CORTEX_MPU_Region_Number */ |
| Kojto | 107:4f6c30876dfa | 72 | uint32_t BaseAddress; /*!< Specifies the base address of the region to protect. */ |
| Kojto | 107:4f6c30876dfa | 73 | uint8_t Size; /*!< Specifies the size of the region to protect. |
| Kojto | 107:4f6c30876dfa | 74 | This parameter can be a value of @ref CORTEX_MPU_Region_Size */ |
| Kojto | 107:4f6c30876dfa | 75 | uint8_t SubRegionDisable; /*!< Specifies the number of the subregion protection to disable. |
| Kojto | 107:4f6c30876dfa | 76 | This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF */ |
| Kojto | 107:4f6c30876dfa | 77 | uint8_t TypeExtField; /*!< Specifies the TEX field level. |
| Kojto | 107:4f6c30876dfa | 78 | This parameter can be a value of @ref CORTEX_MPU_TEX_Levels */ |
| Kojto | 107:4f6c30876dfa | 79 | uint8_t AccessPermission; /*!< Specifies the region access permission type. |
| Kojto | 107:4f6c30876dfa | 80 | This parameter can be a value of @ref CORTEX_MPU_Region_Permission_Attributes */ |
| Kojto | 107:4f6c30876dfa | 81 | uint8_t DisableExec; /*!< Specifies the instruction access status. |
| Kojto | 107:4f6c30876dfa | 82 | This parameter can be a value of @ref CORTEX_MPU_Instruction_Access */ |
| Kojto | 107:4f6c30876dfa | 83 | uint8_t IsShareable; /*!< Specifies the shareability status of the protected region. |
| Kojto | 107:4f6c30876dfa | 84 | This parameter can be a value of @ref CORTEX_MPU_Access_Shareable */ |
| Kojto | 107:4f6c30876dfa | 85 | uint8_t IsCacheable; /*!< Specifies the cacheable status of the region protected. |
| Kojto | 107:4f6c30876dfa | 86 | This parameter can be a value of @ref CORTEX_MPU_Access_Cacheable */ |
| Kojto | 107:4f6c30876dfa | 87 | uint8_t IsBufferable; /*!< Specifies the bufferable status of the protected region. |
| Kojto | 107:4f6c30876dfa | 88 | This parameter can be a value of @ref CORTEX_MPU_Access_Bufferable */ |
| Kojto | 107:4f6c30876dfa | 89 | }MPU_Region_InitTypeDef; |
| Kojto | 107:4f6c30876dfa | 90 | /** |
| Kojto | 107:4f6c30876dfa | 91 | * @} |
| Kojto | 107:4f6c30876dfa | 92 | */ |
| Kojto | 107:4f6c30876dfa | 93 | #endif /* __MPU_PRESENT */ |
| Kojto | 107:4f6c30876dfa | 94 | |
| Kojto | 107:4f6c30876dfa | 95 | /** |
| Kojto | 107:4f6c30876dfa | 96 | * @} |
| Kojto | 107:4f6c30876dfa | 97 | */ |
| Kojto | 107:4f6c30876dfa | 98 | |
| Kojto | 107:4f6c30876dfa | 99 | /* Exported constants --------------------------------------------------------*/ |
| Kojto | 107:4f6c30876dfa | 100 | |
| Kojto | 107:4f6c30876dfa | 101 | /** @defgroup CORTEX_Exported_Constants CORTEX Exported Constants |
| Kojto | 107:4f6c30876dfa | 102 | * @{ |
| Kojto | 107:4f6c30876dfa | 103 | */ |
| Kojto | 107:4f6c30876dfa | 104 | |
| Kojto | 107:4f6c30876dfa | 105 | /** @defgroup CORTEX_Preemption_Priority_Group CORTEX Preemption Priority Group |
| Kojto | 107:4f6c30876dfa | 106 | * @{ |
| Kojto | 107:4f6c30876dfa | 107 | */ |
| Kojto | 107:4f6c30876dfa | 108 | #define NVIC_PRIORITYGROUP_0 ((uint32_t)0x00000007) /*!< 0 bit for pre-emption priority, |
| Kojto | 107:4f6c30876dfa | 109 | 4 bits for subpriority */ |
| Kojto | 107:4f6c30876dfa | 110 | #define NVIC_PRIORITYGROUP_1 ((uint32_t)0x00000006) /*!< 1 bit for pre-emption priority, |
| Kojto | 107:4f6c30876dfa | 111 | 3 bits for subpriority */ |
| Kojto | 107:4f6c30876dfa | 112 | #define NVIC_PRIORITYGROUP_2 ((uint32_t)0x00000005) /*!< 2 bits for pre-emption priority, |
| Kojto | 107:4f6c30876dfa | 113 | 2 bits for subpriority */ |
| Kojto | 107:4f6c30876dfa | 114 | #define NVIC_PRIORITYGROUP_3 ((uint32_t)0x00000004) /*!< 3 bits for pre-emption priority, |
| Kojto | 107:4f6c30876dfa | 115 | 1 bit for subpriority */ |
| Kojto | 107:4f6c30876dfa | 116 | #define NVIC_PRIORITYGROUP_4 ((uint32_t)0x00000003) /*!< 4 bits for pre-emption priority, |
| Kojto | 107:4f6c30876dfa | 117 | 0 bit for subpriority */ |
| Kojto | 107:4f6c30876dfa | 118 | /** |
| Kojto | 107:4f6c30876dfa | 119 | * @} |
| Kojto | 107:4f6c30876dfa | 120 | */ |
| Kojto | 107:4f6c30876dfa | 121 | |
| Kojto | 107:4f6c30876dfa | 122 | /** @defgroup CORTEX_SysTick_clock_source CORTEX SysTick clock source |
| Kojto | 107:4f6c30876dfa | 123 | * @{ |
| Kojto | 107:4f6c30876dfa | 124 | */ |
| Kojto | 107:4f6c30876dfa | 125 | #define SYSTICK_CLKSOURCE_HCLK_DIV8 ((uint32_t)0x00000000) |
| Kojto | 107:4f6c30876dfa | 126 | #define SYSTICK_CLKSOURCE_HCLK ((uint32_t)0x00000004) |
| Kojto | 107:4f6c30876dfa | 127 | /** |
| Kojto | 107:4f6c30876dfa | 128 | * @} |
| Kojto | 107:4f6c30876dfa | 129 | */ |
| Kojto | 107:4f6c30876dfa | 130 | |
| Kojto | 107:4f6c30876dfa | 131 | #if (__MPU_PRESENT == 1) |
| Kojto | 107:4f6c30876dfa | 132 | /** @defgroup CORTEX_MPU_HFNMI_PRIVDEF_Control CORTEX MPU HFNMI and PRIVILEGED Access control |
| Kojto | 107:4f6c30876dfa | 133 | * @{ |
| Kojto | 107:4f6c30876dfa | 134 | */ |
| Kojto | 107:4f6c30876dfa | 135 | #define MPU_HFNMI_PRIVDEF_NONE ((uint32_t)0x00000000) |
| Kojto | 107:4f6c30876dfa | 136 | #define MPU_HARDFAULT_NMI ((uint32_t)0x00000002) |
| Kojto | 107:4f6c30876dfa | 137 | #define MPU_PRIVILEGED_DEFAULT ((uint32_t)0x00000004) |
| Kojto | 107:4f6c30876dfa | 138 | #define MPU_HFNMI_PRIVDEF ((uint32_t)0x00000006) |
| Kojto | 107:4f6c30876dfa | 139 | /** |
| Kojto | 107:4f6c30876dfa | 140 | * @} |
| Kojto | 107:4f6c30876dfa | 141 | */ |
| Kojto | 107:4f6c30876dfa | 142 | |
| Kojto | 107:4f6c30876dfa | 143 | /** @defgroup CORTEX_MPU_Region_Enable CORTEX MPU Region Enable |
| Kojto | 107:4f6c30876dfa | 144 | * @{ |
| Kojto | 107:4f6c30876dfa | 145 | */ |
| Kojto | 107:4f6c30876dfa | 146 | #define MPU_REGION_ENABLE ((uint8_t)0x01) |
| Kojto | 107:4f6c30876dfa | 147 | #define MPU_REGION_DISABLE ((uint8_t)0x00) |
| Kojto | 107:4f6c30876dfa | 148 | /** |
| Kojto | 107:4f6c30876dfa | 149 | * @} |
| Kojto | 107:4f6c30876dfa | 150 | */ |
| Kojto | 107:4f6c30876dfa | 151 | |
| Kojto | 107:4f6c30876dfa | 152 | /** @defgroup CORTEX_MPU_Instruction_Access CORTEX MPU Instruction Access |
| Kojto | 107:4f6c30876dfa | 153 | * @{ |
| Kojto | 107:4f6c30876dfa | 154 | */ |
| Kojto | 107:4f6c30876dfa | 155 | #define MPU_INSTRUCTION_ACCESS_ENABLE ((uint8_t)0x00) |
| Kojto | 107:4f6c30876dfa | 156 | #define MPU_INSTRUCTION_ACCESS_DISABLE ((uint8_t)0x01) |
| Kojto | 107:4f6c30876dfa | 157 | /** |
| Kojto | 107:4f6c30876dfa | 158 | * @} |
| Kojto | 107:4f6c30876dfa | 159 | */ |
| Kojto | 107:4f6c30876dfa | 160 | |
| Kojto | 107:4f6c30876dfa | 161 | /** @defgroup CORTEX_MPU_Access_Shareable CORTEX MPU Instruction Access Shareable |
| Kojto | 107:4f6c30876dfa | 162 | * @{ |
| Kojto | 107:4f6c30876dfa | 163 | */ |
| Kojto | 107:4f6c30876dfa | 164 | #define MPU_ACCESS_SHAREABLE ((uint8_t)0x01) |
| Kojto | 107:4f6c30876dfa | 165 | #define MPU_ACCESS_NOT_SHAREABLE ((uint8_t)0x00) |
| Kojto | 107:4f6c30876dfa | 166 | /** |
| Kojto | 107:4f6c30876dfa | 167 | * @} |
| Kojto | 107:4f6c30876dfa | 168 | */ |
| Kojto | 107:4f6c30876dfa | 169 | |
| Kojto | 107:4f6c30876dfa | 170 | /** @defgroup CORTEX_MPU_Access_Cacheable CORTEX MPU Instruction Access Cacheable |
| Kojto | 107:4f6c30876dfa | 171 | * @{ |
| Kojto | 107:4f6c30876dfa | 172 | */ |
| Kojto | 107:4f6c30876dfa | 173 | #define MPU_ACCESS_CACHEABLE ((uint8_t)0x01) |
| Kojto | 107:4f6c30876dfa | 174 | #define MPU_ACCESS_NOT_CACHEABLE ((uint8_t)0x00) |
| Kojto | 107:4f6c30876dfa | 175 | /** |
| Kojto | 107:4f6c30876dfa | 176 | * @} |
| Kojto | 107:4f6c30876dfa | 177 | */ |
| Kojto | 107:4f6c30876dfa | 178 | |
| Kojto | 107:4f6c30876dfa | 179 | /** @defgroup CORTEX_MPU_Access_Bufferable CORTEX MPU Instruction Access Bufferable |
| Kojto | 107:4f6c30876dfa | 180 | * @{ |
| Kojto | 107:4f6c30876dfa | 181 | */ |
| Kojto | 107:4f6c30876dfa | 182 | #define MPU_ACCESS_BUFFERABLE ((uint8_t)0x01) |
| Kojto | 107:4f6c30876dfa | 183 | #define MPU_ACCESS_NOT_BUFFERABLE ((uint8_t)0x00) |
| Kojto | 107:4f6c30876dfa | 184 | /** |
| Kojto | 107:4f6c30876dfa | 185 | * @} |
| Kojto | 107:4f6c30876dfa | 186 | */ |
| Kojto | 107:4f6c30876dfa | 187 | |
| Kojto | 107:4f6c30876dfa | 188 | /** @defgroup CORTEX_MPU_TEX_Levels CORTEX MPU TEX Levels |
| Kojto | 107:4f6c30876dfa | 189 | * @{ |
| Kojto | 107:4f6c30876dfa | 190 | */ |
| Kojto | 107:4f6c30876dfa | 191 | #define MPU_TEX_LEVEL0 ((uint8_t)0x00) |
| Kojto | 107:4f6c30876dfa | 192 | #define MPU_TEX_LEVEL1 ((uint8_t)0x01) |
| Kojto | 107:4f6c30876dfa | 193 | #define MPU_TEX_LEVEL2 ((uint8_t)0x02) |
| Kojto | 107:4f6c30876dfa | 194 | /** |
| Kojto | 107:4f6c30876dfa | 195 | * @} |
| Kojto | 107:4f6c30876dfa | 196 | */ |
| Kojto | 107:4f6c30876dfa | 197 | |
| Kojto | 107:4f6c30876dfa | 198 | /** @defgroup CORTEX_MPU_Region_Size CORTEX MPU Region Size |
| Kojto | 107:4f6c30876dfa | 199 | * @{ |
| Kojto | 107:4f6c30876dfa | 200 | */ |
| Kojto | 107:4f6c30876dfa | 201 | #define MPU_REGION_SIZE_32B ((uint8_t)0x04) |
| Kojto | 107:4f6c30876dfa | 202 | #define MPU_REGION_SIZE_64B ((uint8_t)0x05) |
| Kojto | 107:4f6c30876dfa | 203 | #define MPU_REGION_SIZE_128B ((uint8_t)0x06) |
| Kojto | 107:4f6c30876dfa | 204 | #define MPU_REGION_SIZE_256B ((uint8_t)0x07) |
| Kojto | 107:4f6c30876dfa | 205 | #define MPU_REGION_SIZE_512B ((uint8_t)0x08) |
| Kojto | 107:4f6c30876dfa | 206 | #define MPU_REGION_SIZE_1KB ((uint8_t)0x09) |
| Kojto | 107:4f6c30876dfa | 207 | #define MPU_REGION_SIZE_2KB ((uint8_t)0x0A) |
| Kojto | 107:4f6c30876dfa | 208 | #define MPU_REGION_SIZE_4KB ((uint8_t)0x0B) |
| Kojto | 107:4f6c30876dfa | 209 | #define MPU_REGION_SIZE_8KB ((uint8_t)0x0C) |
| Kojto | 107:4f6c30876dfa | 210 | #define MPU_REGION_SIZE_16KB ((uint8_t)0x0D) |
| Kojto | 107:4f6c30876dfa | 211 | #define MPU_REGION_SIZE_32KB ((uint8_t)0x0E) |
| Kojto | 107:4f6c30876dfa | 212 | #define MPU_REGION_SIZE_64KB ((uint8_t)0x0F) |
| Kojto | 107:4f6c30876dfa | 213 | #define MPU_REGION_SIZE_128KB ((uint8_t)0x10) |
| Kojto | 107:4f6c30876dfa | 214 | #define MPU_REGION_SIZE_256KB ((uint8_t)0x11) |
| Kojto | 107:4f6c30876dfa | 215 | #define MPU_REGION_SIZE_512KB ((uint8_t)0x12) |
| Kojto | 107:4f6c30876dfa | 216 | #define MPU_REGION_SIZE_1MB ((uint8_t)0x13) |
| Kojto | 107:4f6c30876dfa | 217 | #define MPU_REGION_SIZE_2MB ((uint8_t)0x14) |
| Kojto | 107:4f6c30876dfa | 218 | #define MPU_REGION_SIZE_4MB ((uint8_t)0x15) |
| Kojto | 107:4f6c30876dfa | 219 | #define MPU_REGION_SIZE_8MB ((uint8_t)0x16) |
| Kojto | 107:4f6c30876dfa | 220 | #define MPU_REGION_SIZE_16MB ((uint8_t)0x17) |
| Kojto | 107:4f6c30876dfa | 221 | #define MPU_REGION_SIZE_32MB ((uint8_t)0x18) |
| Kojto | 107:4f6c30876dfa | 222 | #define MPU_REGION_SIZE_64MB ((uint8_t)0x19) |
| Kojto | 107:4f6c30876dfa | 223 | #define MPU_REGION_SIZE_128MB ((uint8_t)0x1A) |
| Kojto | 107:4f6c30876dfa | 224 | #define MPU_REGION_SIZE_256MB ((uint8_t)0x1B) |
| Kojto | 107:4f6c30876dfa | 225 | #define MPU_REGION_SIZE_512MB ((uint8_t)0x1C) |
| Kojto | 107:4f6c30876dfa | 226 | #define MPU_REGION_SIZE_1GB ((uint8_t)0x1D) |
| Kojto | 107:4f6c30876dfa | 227 | #define MPU_REGION_SIZE_2GB ((uint8_t)0x1E) |
| Kojto | 107:4f6c30876dfa | 228 | #define MPU_REGION_SIZE_4GB ((uint8_t)0x1F) |
| Kojto | 107:4f6c30876dfa | 229 | /** |
| Kojto | 107:4f6c30876dfa | 230 | * @} |
| Kojto | 107:4f6c30876dfa | 231 | */ |
| Kojto | 107:4f6c30876dfa | 232 | |
| Kojto | 107:4f6c30876dfa | 233 | /** @defgroup CORTEX_MPU_Region_Permission_Attributes CORTEX MPU Region Permission Attributes |
| Kojto | 107:4f6c30876dfa | 234 | * @{ |
| Kojto | 107:4f6c30876dfa | 235 | */ |
| Kojto | 107:4f6c30876dfa | 236 | #define MPU_REGION_NO_ACCESS ((uint8_t)0x00) |
| Kojto | 107:4f6c30876dfa | 237 | #define MPU_REGION_PRIV_RW ((uint8_t)0x01) |
| Kojto | 107:4f6c30876dfa | 238 | #define MPU_REGION_PRIV_RW_URO ((uint8_t)0x02) |
| Kojto | 107:4f6c30876dfa | 239 | #define MPU_REGION_FULL_ACCESS ((uint8_t)0x03) |
| Kojto | 107:4f6c30876dfa | 240 | #define MPU_REGION_PRIV_RO ((uint8_t)0x05) |
| Kojto | 107:4f6c30876dfa | 241 | #define MPU_REGION_PRIV_RO_URO ((uint8_t)0x06) |
| Kojto | 107:4f6c30876dfa | 242 | /** |
| Kojto | 107:4f6c30876dfa | 243 | * @} |
| Kojto | 107:4f6c30876dfa | 244 | */ |
| Kojto | 107:4f6c30876dfa | 245 | |
| Kojto | 107:4f6c30876dfa | 246 | /** @defgroup CORTEX_MPU_Region_Number CORTEX MPU Region Number |
| Kojto | 107:4f6c30876dfa | 247 | * @{ |
| Kojto | 107:4f6c30876dfa | 248 | */ |
| Kojto | 107:4f6c30876dfa | 249 | #define MPU_REGION_NUMBER0 ((uint8_t)0x00) |
| Kojto | 107:4f6c30876dfa | 250 | #define MPU_REGION_NUMBER1 ((uint8_t)0x01) |
| Kojto | 107:4f6c30876dfa | 251 | #define MPU_REGION_NUMBER2 ((uint8_t)0x02) |
| Kojto | 107:4f6c30876dfa | 252 | #define MPU_REGION_NUMBER3 ((uint8_t)0x03) |
| Kojto | 107:4f6c30876dfa | 253 | #define MPU_REGION_NUMBER4 ((uint8_t)0x04) |
| Kojto | 107:4f6c30876dfa | 254 | #define MPU_REGION_NUMBER5 ((uint8_t)0x05) |
| Kojto | 107:4f6c30876dfa | 255 | #define MPU_REGION_NUMBER6 ((uint8_t)0x06) |
| Kojto | 107:4f6c30876dfa | 256 | #define MPU_REGION_NUMBER7 ((uint8_t)0x07) |
| Kojto | 107:4f6c30876dfa | 257 | /** |
| Kojto | 107:4f6c30876dfa | 258 | * @} |
| Kojto | 107:4f6c30876dfa | 259 | */ |
| Kojto | 107:4f6c30876dfa | 260 | #endif /* __MPU_PRESENT */ |
| Kojto | 107:4f6c30876dfa | 261 | |
| Kojto | 107:4f6c30876dfa | 262 | /** |
| Kojto | 107:4f6c30876dfa | 263 | * @} |
| Kojto | 107:4f6c30876dfa | 264 | */ |
| Kojto | 107:4f6c30876dfa | 265 | |
| Kojto | 107:4f6c30876dfa | 266 | /* Exported macros -----------------------------------------------------------*/ |
| Kojto | 107:4f6c30876dfa | 267 | /** @defgroup CORTEX_Exported_Macros CORTEX Exported Macros |
| Kojto | 107:4f6c30876dfa | 268 | * @{ |
| Kojto | 107:4f6c30876dfa | 269 | */ |
| Kojto | 107:4f6c30876dfa | 270 | |
| Kojto | 107:4f6c30876dfa | 271 | /** @defgroup CORTEX_SysTick_clock_source_Macro_Exported CORTEX SysTick clock source |
| Kojto | 107:4f6c30876dfa | 272 | * @{ |
| Kojto | 107:4f6c30876dfa | 273 | */ |
| Kojto | 107:4f6c30876dfa | 274 | |
| Kojto | 107:4f6c30876dfa | 275 | /** @brief Configure the SysTick clock source. |
| Kojto | 107:4f6c30876dfa | 276 | * @param __CLKSRC__: specifies the SysTick clock source. |
| Kojto | 107:4f6c30876dfa | 277 | * This parameter can be one of the following values: |
| Kojto | 107:4f6c30876dfa | 278 | * @arg SYSTICK_CLKSOURCE_HCLK_DIV8: AHB clock divided by 8 selected as SysTick clock source. |
| Kojto | 107:4f6c30876dfa | 279 | * @arg SYSTICK_CLKSOURCE_HCLK: AHB clock selected as SysTick clock source. |
| Kojto | 107:4f6c30876dfa | 280 | * @retval None |
| Kojto | 107:4f6c30876dfa | 281 | */ |
| Kojto | 107:4f6c30876dfa | 282 | #define __HAL_CORTEX_SYSTICKCLK_CONFIG(__CLKSRC__) \ |
| Kojto | 107:4f6c30876dfa | 283 | do { \ |
| Kojto | 107:4f6c30876dfa | 284 | if ((__CLKSRC__) == SYSTICK_CLKSOURCE_HCLK) \ |
| Kojto | 107:4f6c30876dfa | 285 | { \ |
| Kojto | 107:4f6c30876dfa | 286 | SysTick->CTRL |= SYSTICK_CLKSOURCE_HCLK; \ |
| Kojto | 107:4f6c30876dfa | 287 | } \ |
| Kojto | 107:4f6c30876dfa | 288 | else \ |
| Kojto | 107:4f6c30876dfa | 289 | SysTick->CTRL &= ~SYSTICK_CLKSOURCE_HCLK; \ |
| Kojto | 107:4f6c30876dfa | 290 | } while(0) |
| Kojto | 107:4f6c30876dfa | 291 | |
| Kojto | 107:4f6c30876dfa | 292 | /** |
| Kojto | 107:4f6c30876dfa | 293 | * @} |
| Kojto | 107:4f6c30876dfa | 294 | */ |
| Kojto | 107:4f6c30876dfa | 295 | |
| Kojto | 107:4f6c30876dfa | 296 | /** |
| Kojto | 107:4f6c30876dfa | 297 | * @} |
| Kojto | 107:4f6c30876dfa | 298 | */ |
| Kojto | 107:4f6c30876dfa | 299 | |
| Kojto | 107:4f6c30876dfa | 300 | /* Exported functions --------------------------------------------------------*/ |
| Kojto | 107:4f6c30876dfa | 301 | /** @defgroup CORTEX_Exported_Functions CORTEX Exported Functions |
| Kojto | 107:4f6c30876dfa | 302 | * @{ |
| Kojto | 107:4f6c30876dfa | 303 | */ |
| Kojto | 107:4f6c30876dfa | 304 | |
| Kojto | 107:4f6c30876dfa | 305 | /** @defgroup CORTEX_Exported_Functions_Group1 Initialization and Configuration functions |
| Kojto | 107:4f6c30876dfa | 306 | * @brief Initialization and Configuration functions |
| Kojto | 107:4f6c30876dfa | 307 | * @{ |
| Kojto | 107:4f6c30876dfa | 308 | */ |
| Kojto | 107:4f6c30876dfa | 309 | /* Initialization and Configuration functions *****************************/ |
| Kojto | 107:4f6c30876dfa | 310 | void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup); |
| Kojto | 107:4f6c30876dfa | 311 | void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority); |
| Kojto | 107:4f6c30876dfa | 312 | void HAL_NVIC_EnableIRQ(IRQn_Type IRQn); |
| Kojto | 107:4f6c30876dfa | 313 | void HAL_NVIC_DisableIRQ(IRQn_Type IRQn); |
| Kojto | 107:4f6c30876dfa | 314 | void HAL_NVIC_SystemReset(void); |
| Kojto | 107:4f6c30876dfa | 315 | uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb); |
| Kojto | 107:4f6c30876dfa | 316 | |
| Kojto | 107:4f6c30876dfa | 317 | #if (__MPU_PRESENT == 1) |
| Kojto | 107:4f6c30876dfa | 318 | /** |
| Kojto | 107:4f6c30876dfa | 319 | * @brief Disable the MPU. |
| Kojto | 107:4f6c30876dfa | 320 | * @retval None |
| Kojto | 107:4f6c30876dfa | 321 | */ |
| Kojto | 107:4f6c30876dfa | 322 | __STATIC_INLINE void HAL_MPU_Disable(void) |
| Kojto | 107:4f6c30876dfa | 323 | { |
| Kojto | 107:4f6c30876dfa | 324 | /* Disable fault exceptions */ |
| Kojto | 107:4f6c30876dfa | 325 | SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk; |
| Kojto | 107:4f6c30876dfa | 326 | |
| Kojto | 107:4f6c30876dfa | 327 | /* Disable the MPU */ |
| Kojto | 107:4f6c30876dfa | 328 | MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk; |
| Kojto | 107:4f6c30876dfa | 329 | } |
| Kojto | 107:4f6c30876dfa | 330 | |
| Kojto | 107:4f6c30876dfa | 331 | /** |
| Kojto | 107:4f6c30876dfa | 332 | * @brief Enable the MPU. |
| Kojto | 107:4f6c30876dfa | 333 | * @param MPU_Control: Specifies the control mode of the MPU during hard fault, |
| Kojto | 107:4f6c30876dfa | 334 | * NMI, FAULTMASK and privileged accessto the default memory |
| Kojto | 107:4f6c30876dfa | 335 | * This parameter can be one of the following values: |
| Kojto | 107:4f6c30876dfa | 336 | * @arg MPU_HFNMI_PRIVDEF_NONE |
| Kojto | 107:4f6c30876dfa | 337 | * @arg MPU_HARDFAULT_NMI |
| Kojto | 107:4f6c30876dfa | 338 | * @arg MPU_PRIVILEGED_DEFAULT |
| Kojto | 107:4f6c30876dfa | 339 | * @arg MPU_HFNMI_PRIVDEF |
| Kojto | 107:4f6c30876dfa | 340 | * @retval None |
| Kojto | 107:4f6c30876dfa | 341 | */ |
| Kojto | 107:4f6c30876dfa | 342 | __STATIC_INLINE void HAL_MPU_Enable(uint32_t MPU_Control) |
| Kojto | 107:4f6c30876dfa | 343 | { |
| Kojto | 107:4f6c30876dfa | 344 | /* Enable the MPU */ |
| Kojto | 107:4f6c30876dfa | 345 | MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk; |
| Kojto | 107:4f6c30876dfa | 346 | |
| Kojto | 107:4f6c30876dfa | 347 | /* Enable fault exceptions */ |
| Kojto | 107:4f6c30876dfa | 348 | SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk; |
| Kojto | 107:4f6c30876dfa | 349 | } |
| Kojto | 107:4f6c30876dfa | 350 | #endif /* __MPU_PRESENT */ |
| Kojto | 107:4f6c30876dfa | 351 | /** |
| Kojto | 107:4f6c30876dfa | 352 | * @} |
| Kojto | 107:4f6c30876dfa | 353 | */ |
| Kojto | 107:4f6c30876dfa | 354 | |
| Kojto | 107:4f6c30876dfa | 355 | /** @defgroup CORTEX_Exported_Functions_Group2 Peripheral Control functions |
| Kojto | 107:4f6c30876dfa | 356 | * @brief Cortex control functions |
| Kojto | 107:4f6c30876dfa | 357 | * @{ |
| Kojto | 107:4f6c30876dfa | 358 | */ |
| Kojto | 107:4f6c30876dfa | 359 | /* Peripheral Control functions ***********************************************/ |
| Kojto | 107:4f6c30876dfa | 360 | uint32_t HAL_NVIC_GetPriorityGrouping(void); |
| Kojto | 107:4f6c30876dfa | 361 | void HAL_NVIC_GetPriority(IRQn_Type IRQn, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority); |
| Kojto | 107:4f6c30876dfa | 362 | uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn); |
| Kojto | 107:4f6c30876dfa | 363 | void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn); |
| Kojto | 107:4f6c30876dfa | 364 | void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn); |
| Kojto | 107:4f6c30876dfa | 365 | uint32_t HAL_NVIC_GetActive(IRQn_Type IRQn); |
| Kojto | 107:4f6c30876dfa | 366 | void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource); |
| Kojto | 107:4f6c30876dfa | 367 | void HAL_SYSTICK_IRQHandler(void); |
| Kojto | 107:4f6c30876dfa | 368 | void HAL_SYSTICK_Callback(void); |
| Kojto | 107:4f6c30876dfa | 369 | |
| Kojto | 107:4f6c30876dfa | 370 | #if (__MPU_PRESENT == 1) |
| Kojto | 107:4f6c30876dfa | 371 | void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init); |
| Kojto | 107:4f6c30876dfa | 372 | #endif /* __MPU_PRESENT */ |
| Kojto | 107:4f6c30876dfa | 373 | /** |
| Kojto | 107:4f6c30876dfa | 374 | * @} |
| Kojto | 107:4f6c30876dfa | 375 | */ |
| Kojto | 107:4f6c30876dfa | 376 | |
| Kojto | 107:4f6c30876dfa | 377 | /** |
| Kojto | 107:4f6c30876dfa | 378 | * @} |
| Kojto | 107:4f6c30876dfa | 379 | */ |
| Kojto | 107:4f6c30876dfa | 380 | |
| Kojto | 107:4f6c30876dfa | 381 | /* Private types -------------------------------------------------------------*/ |
| Kojto | 107:4f6c30876dfa | 382 | /* Private variables ---------------------------------------------------------*/ |
| Kojto | 107:4f6c30876dfa | 383 | /* Private constants ---------------------------------------------------------*/ |
| Kojto | 107:4f6c30876dfa | 384 | /* Private macros ------------------------------------------------------------*/ |
| Kojto | 107:4f6c30876dfa | 385 | /** @defgroup CORTEX_Private_Macros CORTEX Private Macros |
| Kojto | 107:4f6c30876dfa | 386 | * @{ |
| Kojto | 107:4f6c30876dfa | 387 | */ |
| Kojto | 107:4f6c30876dfa | 388 | #define IS_NVIC_PRIORITY_GROUP(GROUP) (((GROUP) == NVIC_PRIORITYGROUP_0) || \ |
| Kojto | 107:4f6c30876dfa | 389 | ((GROUP) == NVIC_PRIORITYGROUP_1) || \ |
| Kojto | 107:4f6c30876dfa | 390 | ((GROUP) == NVIC_PRIORITYGROUP_2) || \ |
| Kojto | 107:4f6c30876dfa | 391 | ((GROUP) == NVIC_PRIORITYGROUP_3) || \ |
| Kojto | 107:4f6c30876dfa | 392 | ((GROUP) == NVIC_PRIORITYGROUP_4)) |
| Kojto | 107:4f6c30876dfa | 393 | |
| Kojto | 107:4f6c30876dfa | 394 | #define IS_NVIC_PREEMPTION_PRIORITY(PRIORITY) ((PRIORITY) < 0x10) |
| Kojto | 107:4f6c30876dfa | 395 | |
| Kojto | 107:4f6c30876dfa | 396 | #define IS_NVIC_SUB_PRIORITY(PRIORITY) ((PRIORITY) < 0x10) |
| Kojto | 107:4f6c30876dfa | 397 | |
| Kojto | 107:4f6c30876dfa | 398 | #define IS_NVIC_DEVICE_IRQ(IRQ) ((IRQ) >= 0x00) |
| Kojto | 107:4f6c30876dfa | 399 | |
| Kojto | 107:4f6c30876dfa | 400 | #define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SYSTICK_CLKSOURCE_HCLK) || \ |
| Kojto | 107:4f6c30876dfa | 401 | ((SOURCE) == SYSTICK_CLKSOURCE_HCLK_DIV8)) |
| Kojto | 107:4f6c30876dfa | 402 | |
| Kojto | 107:4f6c30876dfa | 403 | #if (__MPU_PRESENT == 1) |
| Kojto | 107:4f6c30876dfa | 404 | #define IS_MPU_REGION_ENABLE(STATE) (((STATE) == MPU_REGION_ENABLE) || \ |
| Kojto | 107:4f6c30876dfa | 405 | ((STATE) == MPU_REGION_DISABLE)) |
| Kojto | 107:4f6c30876dfa | 406 | |
| Kojto | 107:4f6c30876dfa | 407 | #define IS_MPU_INSTRUCTION_ACCESS(STATE) (((STATE) == MPU_INSTRUCTION_ACCESS_ENABLE) || \ |
| Kojto | 107:4f6c30876dfa | 408 | ((STATE) == MPU_INSTRUCTION_ACCESS_DISABLE)) |
| Kojto | 107:4f6c30876dfa | 409 | |
| Kojto | 107:4f6c30876dfa | 410 | #define IS_MPU_ACCESS_SHAREABLE(STATE) (((STATE) == MPU_ACCESS_SHAREABLE) || \ |
| Kojto | 107:4f6c30876dfa | 411 | ((STATE) == MPU_ACCESS_NOT_SHAREABLE)) |
| Kojto | 107:4f6c30876dfa | 412 | |
| Kojto | 107:4f6c30876dfa | 413 | #define IS_MPU_ACCESS_CACHEABLE(STATE) (((STATE) == MPU_ACCESS_CACHEABLE) || \ |
| Kojto | 107:4f6c30876dfa | 414 | ((STATE) == MPU_ACCESS_NOT_CACHEABLE)) |
| Kojto | 107:4f6c30876dfa | 415 | |
| Kojto | 107:4f6c30876dfa | 416 | #define IS_MPU_ACCESS_BUFFERABLE(STATE) (((STATE) == MPU_ACCESS_BUFFERABLE) || \ |
| Kojto | 107:4f6c30876dfa | 417 | ((STATE) == MPU_ACCESS_NOT_BUFFERABLE)) |
| Kojto | 107:4f6c30876dfa | 418 | |
| Kojto | 107:4f6c30876dfa | 419 | #define IS_MPU_TEX_LEVEL(TYPE) (((TYPE) == MPU_TEX_LEVEL0) || \ |
| Kojto | 107:4f6c30876dfa | 420 | ((TYPE) == MPU_TEX_LEVEL1) || \ |
| Kojto | 107:4f6c30876dfa | 421 | ((TYPE) == MPU_TEX_LEVEL2)) |
| Kojto | 107:4f6c30876dfa | 422 | |
| Kojto | 107:4f6c30876dfa | 423 | #define IS_MPU_REGION_PERMISSION_ATTRIBUTE(TYPE) (((TYPE) == MPU_REGION_NO_ACCESS) || \ |
| Kojto | 107:4f6c30876dfa | 424 | ((TYPE) == MPU_REGION_PRIV_RW) || \ |
| Kojto | 107:4f6c30876dfa | 425 | ((TYPE) == MPU_REGION_PRIV_RW_URO) || \ |
| Kojto | 107:4f6c30876dfa | 426 | ((TYPE) == MPU_REGION_FULL_ACCESS) || \ |
| Kojto | 107:4f6c30876dfa | 427 | ((TYPE) == MPU_REGION_PRIV_RO) || \ |
| Kojto | 107:4f6c30876dfa | 428 | ((TYPE) == MPU_REGION_PRIV_RO_URO)) |
| Kojto | 107:4f6c30876dfa | 429 | |
| Kojto | 107:4f6c30876dfa | 430 | #define IS_MPU_REGION_NUMBER(NUMBER) (((NUMBER) == MPU_REGION_NUMBER0) || \ |
| Kojto | 107:4f6c30876dfa | 431 | ((NUMBER) == MPU_REGION_NUMBER1) || \ |
| Kojto | 107:4f6c30876dfa | 432 | ((NUMBER) == MPU_REGION_NUMBER2) || \ |
| Kojto | 107:4f6c30876dfa | 433 | ((NUMBER) == MPU_REGION_NUMBER3) || \ |
| Kojto | 107:4f6c30876dfa | 434 | ((NUMBER) == MPU_REGION_NUMBER4) || \ |
| Kojto | 107:4f6c30876dfa | 435 | ((NUMBER) == MPU_REGION_NUMBER5) || \ |
| Kojto | 107:4f6c30876dfa | 436 | ((NUMBER) == MPU_REGION_NUMBER6) || \ |
| Kojto | 107:4f6c30876dfa | 437 | ((NUMBER) == MPU_REGION_NUMBER7)) |
| Kojto | 107:4f6c30876dfa | 438 | |
| Kojto | 107:4f6c30876dfa | 439 | #define IS_MPU_REGION_SIZE(SIZE) (((SIZE) == MPU_REGION_SIZE_32B) || \ |
| Kojto | 107:4f6c30876dfa | 440 | ((SIZE) == MPU_REGION_SIZE_64B) || \ |
| Kojto | 107:4f6c30876dfa | 441 | ((SIZE) == MPU_REGION_SIZE_128B) || \ |
| Kojto | 107:4f6c30876dfa | 442 | ((SIZE) == MPU_REGION_SIZE_256B) || \ |
| Kojto | 107:4f6c30876dfa | 443 | ((SIZE) == MPU_REGION_SIZE_512B) || \ |
| Kojto | 107:4f6c30876dfa | 444 | ((SIZE) == MPU_REGION_SIZE_1KB) || \ |
| Kojto | 107:4f6c30876dfa | 445 | ((SIZE) == MPU_REGION_SIZE_2KB) || \ |
| Kojto | 107:4f6c30876dfa | 446 | ((SIZE) == MPU_REGION_SIZE_4KB) || \ |
| Kojto | 107:4f6c30876dfa | 447 | ((SIZE) == MPU_REGION_SIZE_8KB) || \ |
| Kojto | 107:4f6c30876dfa | 448 | ((SIZE) == MPU_REGION_SIZE_16KB) || \ |
| Kojto | 107:4f6c30876dfa | 449 | ((SIZE) == MPU_REGION_SIZE_32KB) || \ |
| Kojto | 107:4f6c30876dfa | 450 | ((SIZE) == MPU_REGION_SIZE_64KB) || \ |
| Kojto | 107:4f6c30876dfa | 451 | ((SIZE) == MPU_REGION_SIZE_128KB) || \ |
| Kojto | 107:4f6c30876dfa | 452 | ((SIZE) == MPU_REGION_SIZE_256KB) || \ |
| Kojto | 107:4f6c30876dfa | 453 | ((SIZE) == MPU_REGION_SIZE_512KB) || \ |
| Kojto | 107:4f6c30876dfa | 454 | ((SIZE) == MPU_REGION_SIZE_1MB) || \ |
| Kojto | 107:4f6c30876dfa | 455 | ((SIZE) == MPU_REGION_SIZE_2MB) || \ |
| Kojto | 107:4f6c30876dfa | 456 | ((SIZE) == MPU_REGION_SIZE_4MB) || \ |
| Kojto | 107:4f6c30876dfa | 457 | ((SIZE) == MPU_REGION_SIZE_8MB) || \ |
| Kojto | 107:4f6c30876dfa | 458 | ((SIZE) == MPU_REGION_SIZE_16MB) || \ |
| Kojto | 107:4f6c30876dfa | 459 | ((SIZE) == MPU_REGION_SIZE_32MB) || \ |
| Kojto | 107:4f6c30876dfa | 460 | ((SIZE) == MPU_REGION_SIZE_64MB) || \ |
| Kojto | 107:4f6c30876dfa | 461 | ((SIZE) == MPU_REGION_SIZE_128MB) || \ |
| Kojto | 107:4f6c30876dfa | 462 | ((SIZE) == MPU_REGION_SIZE_256MB) || \ |
| Kojto | 107:4f6c30876dfa | 463 | ((SIZE) == MPU_REGION_SIZE_512MB) || \ |
| Kojto | 107:4f6c30876dfa | 464 | ((SIZE) == MPU_REGION_SIZE_1GB) || \ |
| Kojto | 107:4f6c30876dfa | 465 | ((SIZE) == MPU_REGION_SIZE_2GB) || \ |
| Kojto | 107:4f6c30876dfa | 466 | ((SIZE) == MPU_REGION_SIZE_4GB)) |
| Kojto | 107:4f6c30876dfa | 467 | |
| Kojto | 107:4f6c30876dfa | 468 | #define IS_MPU_SUB_REGION_DISABLE(SUBREGION) ((SUBREGION) < (uint16_t)0x00FF) |
| Kojto | 107:4f6c30876dfa | 469 | #endif /* __MPU_PRESENT */ |
| Kojto | 107:4f6c30876dfa | 470 | |
| Kojto | 107:4f6c30876dfa | 471 | /** |
| Kojto | 107:4f6c30876dfa | 472 | * @} |
| Kojto | 107:4f6c30876dfa | 473 | */ |
| Kojto | 107:4f6c30876dfa | 474 | |
| Kojto | 107:4f6c30876dfa | 475 | /* Private functions ---------------------------------------------------------*/ |
| Kojto | 107:4f6c30876dfa | 476 | |
| Kojto | 107:4f6c30876dfa | 477 | /** |
| Kojto | 107:4f6c30876dfa | 478 | * @} |
| Kojto | 107:4f6c30876dfa | 479 | */ |
| Kojto | 107:4f6c30876dfa | 480 | |
| Kojto | 107:4f6c30876dfa | 481 | /** |
| Kojto | 107:4f6c30876dfa | 482 | * @} |
| Kojto | 107:4f6c30876dfa | 483 | */ |
| Kojto | 107:4f6c30876dfa | 484 | |
| Kojto | 107:4f6c30876dfa | 485 | #ifdef __cplusplus |
| Kojto | 107:4f6c30876dfa | 486 | } |
| Kojto | 107:4f6c30876dfa | 487 | #endif |
| Kojto | 107:4f6c30876dfa | 488 | |
| Kojto | 107:4f6c30876dfa | 489 | #endif /* __STM32L4xx_HAL_CORTEX_H */ |
| Kojto | 107:4f6c30876dfa | 490 | |
| Kojto | 107:4f6c30876dfa | 491 | |
| Kojto | 107:4f6c30876dfa | 492 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |