Peter Drescher / mbed-F401

mbed library with additional peripherals for ST F401 board

Fork of mbed-src by mbed official

This mbed LIB has additional peripherals for ST F401 board

  • UART2 : PA_3 rx, PA_2 tx
  • UART3 : PC_7 rx, PC_6 tx
  • I2C2 : PB_3 SDA, PB_10 SCL
  • I2C3 : PB_4 SDA, PA_8 SCL

targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_fsmc.h@76:aeb1df146756, 2014-01-27 (annotated)

Committer:
mbed_official
Date:
Mon Jan 27 14:30:07 2014 +0000
Revision:
76:aeb1df146756
Child:
80:66393a7b209d
Synchronized with git revision a31ec9c5f7bcb5c8a1b2eced103f6a1dfa921abd



Full URL: https://github.com/mbedmicro/mbed/commit/a31ec9c5f7bcb5c8a1b2eced103f6a1dfa921abd/



Add NUCLEO_L152RE

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 76:aeb1df146756 1 /**
mbed_official 76:aeb1df146756 2 ******************************************************************************
mbed_official 76:aeb1df146756 3 * @file stm32l1xx_fsmc.h
mbed_official 76:aeb1df146756 4 * @author MCD Application Team
mbed_official 76:aeb1df146756 5 * @version V1.2.0
mbed_official 76:aeb1df146756 6 * @date 22-February-2013
mbed_official 76:aeb1df146756 7 * @brief This file contains all the functions prototypes for the FSMC firmware
mbed_official 76:aeb1df146756 8 * library.
mbed_official 76:aeb1df146756 9 ******************************************************************************
mbed_official 76:aeb1df146756 10 * @attention
mbed_official 76:aeb1df146756 11 *
mbed_official 76:aeb1df146756 12 * <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
mbed_official 76:aeb1df146756 13 *
mbed_official 76:aeb1df146756 14 * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
mbed_official 76:aeb1df146756 15 * You may not use this file except in compliance with the License.
mbed_official 76:aeb1df146756 16 * You may obtain a copy of the License at:
mbed_official 76:aeb1df146756 17 *
mbed_official 76:aeb1df146756 18 * http://www.st.com/software_license_agreement_liberty_v2
mbed_official 76:aeb1df146756 19 *
mbed_official 76:aeb1df146756 20 * Unless required by applicable law or agreed to in writing, software
mbed_official 76:aeb1df146756 21 * distributed under the License is distributed on an "AS IS" BASIS,
mbed_official 76:aeb1df146756 22 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
mbed_official 76:aeb1df146756 23 * See the License for the specific language governing permissions and
mbed_official 76:aeb1df146756 24 * limitations under the License.
mbed_official 76:aeb1df146756 25 *
mbed_official 76:aeb1df146756 26 ******************************************************************************
mbed_official 76:aeb1df146756 27 */
mbed_official 76:aeb1df146756 28
mbed_official 76:aeb1df146756 29 /* Define to prevent recursive inclusion -------------------------------------*/
mbed_official 76:aeb1df146756 30 #ifndef __STM32L1xx_FSMC_H
mbed_official 76:aeb1df146756 31 #define __STM32L1xx_FSMC_H
mbed_official 76:aeb1df146756 32
mbed_official 76:aeb1df146756 33 #ifdef __cplusplus
mbed_official 76:aeb1df146756 34 extern "C" {
mbed_official 76:aeb1df146756 35 #endif
mbed_official 76:aeb1df146756 36
mbed_official 76:aeb1df146756 37 /* Includes ------------------------------------------------------------------*/
mbed_official 76:aeb1df146756 38 #include "stm32l1xx.h"
mbed_official 76:aeb1df146756 39
mbed_official 76:aeb1df146756 40 /** @addtogroup STM32L1xx_StdPeriph_Driver
mbed_official 76:aeb1df146756 41 * @{
mbed_official 76:aeb1df146756 42 */
mbed_official 76:aeb1df146756 43
mbed_official 76:aeb1df146756 44 /** @addtogroup FSMC
mbed_official 76:aeb1df146756 45 * @{
mbed_official 76:aeb1df146756 46 */
mbed_official 76:aeb1df146756 47
mbed_official 76:aeb1df146756 48 /* Exported types ------------------------------------------------------------*/
mbed_official 76:aeb1df146756 49
mbed_official 76:aeb1df146756 50 /**
mbed_official 76:aeb1df146756 51 * @brief Timing parameters For NOR/SRAM Banks
mbed_official 76:aeb1df146756 52 */
mbed_official 76:aeb1df146756 53
mbed_official 76:aeb1df146756 54 typedef struct
mbed_official 76:aeb1df146756 55 {
mbed_official 76:aeb1df146756 56 uint32_t FSMC_AddressSetupTime; /*!< Defines the number of HCLK cycles to configure
mbed_official 76:aeb1df146756 57 the duration of the address setup time.
mbed_official 76:aeb1df146756 58 This parameter can be a value between 0 and 0xF.
mbed_official 76:aeb1df146756 59 @note It is not used with synchronous NOR Flash memories. */
mbed_official 76:aeb1df146756 60
mbed_official 76:aeb1df146756 61 uint32_t FSMC_AddressHoldTime; /*!< Defines the number of HCLK cycles to configure
mbed_official 76:aeb1df146756 62 the duration of the address hold time.
mbed_official 76:aeb1df146756 63 This parameter can be a value between 0 and 0xF.
mbed_official 76:aeb1df146756 64 @note It is not used with synchronous NOR Flash memories.*/
mbed_official 76:aeb1df146756 65
mbed_official 76:aeb1df146756 66 uint32_t FSMC_DataSetupTime; /*!< Defines the number of HCLK cycles to configure
mbed_official 76:aeb1df146756 67 the duration of the data setup time.
mbed_official 76:aeb1df146756 68 This parameter can be a value between 0 and 0xFF.
mbed_official 76:aeb1df146756 69 @note It is used for SRAMs, ROMs and asynchronous multiplexed NOR Flash memories. */
mbed_official 76:aeb1df146756 70
mbed_official 76:aeb1df146756 71 uint32_t FSMC_BusTurnAroundDuration; /*!< Defines the number of HCLK cycles to configure
mbed_official 76:aeb1df146756 72 the duration of the bus turnaround.
mbed_official 76:aeb1df146756 73 This parameter can be a value between 0 and 0xF.
mbed_official 76:aeb1df146756 74 @note It is only used for multiplexed NOR Flash memories. */
mbed_official 76:aeb1df146756 75
mbed_official 76:aeb1df146756 76 uint32_t FSMC_CLKDivision; /*!< Defines the period of CLK clock output signal, expressed in number of HCLK cycles.
mbed_official 76:aeb1df146756 77 This parameter can be a value between 1 and 0xF.
mbed_official 76:aeb1df146756 78 @note This parameter is not used for asynchronous NOR Flash, SRAM or ROM accesses. */
mbed_official 76:aeb1df146756 79
mbed_official 76:aeb1df146756 80 uint32_t FSMC_DataLatency; /*!< Defines the number of memory clock cycles to issue
mbed_official 76:aeb1df146756 81 to the memory before getting the first data.
mbed_official 76:aeb1df146756 82 The parameter value depends on the memory type as shown below:
mbed_official 76:aeb1df146756 83 - It must be set to 0 in case of a CRAM
mbed_official 76:aeb1df146756 84 - It is don't care in asynchronous NOR, SRAM or ROM accesses
mbed_official 76:aeb1df146756 85 - It may assume a value between 0 and 0xF in NOR Flash memories
mbed_official 76:aeb1df146756 86 with synchronous burst mode enable */
mbed_official 76:aeb1df146756 87
mbed_official 76:aeb1df146756 88 uint32_t FSMC_AccessMode; /*!< Specifies the asynchronous access mode.
mbed_official 76:aeb1df146756 89 This parameter can be a value of @ref FSMC_Access_Mode */
mbed_official 76:aeb1df146756 90 }FSMC_NORSRAMTimingInitTypeDef;
mbed_official 76:aeb1df146756 91
mbed_official 76:aeb1df146756 92 /**
mbed_official 76:aeb1df146756 93 * @brief FSMC NOR/SRAM Init structure definition
mbed_official 76:aeb1df146756 94 */
mbed_official 76:aeb1df146756 95
mbed_official 76:aeb1df146756 96 typedef struct
mbed_official 76:aeb1df146756 97 {
mbed_official 76:aeb1df146756 98 uint32_t FSMC_Bank; /*!< Specifies the NOR/SRAM memory bank that will be used.
mbed_official 76:aeb1df146756 99 This parameter can be a value of @ref FSMC_NORSRAM_Bank */
mbed_official 76:aeb1df146756 100
mbed_official 76:aeb1df146756 101 uint32_t FSMC_DataAddressMux; /*!< Specifies whether the address and data values are
mbed_official 76:aeb1df146756 102 multiplexed on the databus or not.
mbed_official 76:aeb1df146756 103 This parameter can be a value of @ref FSMC_Data_Address_Bus_Multiplexing */
mbed_official 76:aeb1df146756 104
mbed_official 76:aeb1df146756 105 uint32_t FSMC_MemoryType; /*!< Specifies the type of external memory attached to
mbed_official 76:aeb1df146756 106 the corresponding memory bank.
mbed_official 76:aeb1df146756 107 This parameter can be a value of @ref FSMC_Memory_Type */
mbed_official 76:aeb1df146756 108
mbed_official 76:aeb1df146756 109 uint32_t FSMC_MemoryDataWidth; /*!< Specifies the external memory device width.
mbed_official 76:aeb1df146756 110 This parameter can be a value of @ref FSMC_Data_Width */
mbed_official 76:aeb1df146756 111
mbed_official 76:aeb1df146756 112 uint32_t FSMC_BurstAccessMode; /*!< Enables or disables the burst access mode for Flash memory,
mbed_official 76:aeb1df146756 113 valid only with synchronous burst Flash memories.
mbed_official 76:aeb1df146756 114 This parameter can be a value of @ref FSMC_Burst_Access_Mode */
mbed_official 76:aeb1df146756 115
mbed_official 76:aeb1df146756 116 uint32_t FSMC_AsynchronousWait; /*!< Enables or disables wait signal during asynchronous transfers,
mbed_official 76:aeb1df146756 117 valid only with asynchronous Flash memories.
mbed_official 76:aeb1df146756 118 This parameter can be a value of @ref FSMC_AsynchronousWait */
mbed_official 76:aeb1df146756 119
mbed_official 76:aeb1df146756 120 uint32_t FSMC_WaitSignalPolarity; /*!< Specifies the wait signal polarity, valid only when accessing
mbed_official 76:aeb1df146756 121 the Flash memory in burst mode.
mbed_official 76:aeb1df146756 122 This parameter can be a value of @ref FSMC_Wait_Signal_Polarity */
mbed_official 76:aeb1df146756 123
mbed_official 76:aeb1df146756 124 uint32_t FSMC_WrapMode; /*!< Enables or disables the Wrapped burst access mode for Flash
mbed_official 76:aeb1df146756 125 memory, valid only when accessing Flash memories in burst mode.
mbed_official 76:aeb1df146756 126 This parameter can be a value of @ref FSMC_Wrap_Mode */
mbed_official 76:aeb1df146756 127
mbed_official 76:aeb1df146756 128 uint32_t FSMC_WaitSignalActive; /*!< Specifies if the wait signal is asserted by the memory one
mbed_official 76:aeb1df146756 129 clock cycle before the wait state or during the wait state,
mbed_official 76:aeb1df146756 130 valid only when accessing memories in burst mode.
mbed_official 76:aeb1df146756 131 This parameter can be a value of @ref FSMC_Wait_Timing */
mbed_official 76:aeb1df146756 132
mbed_official 76:aeb1df146756 133 uint32_t FSMC_WriteOperation; /*!< Enables or disables the write operation in the selected bank by the FSMC.
mbed_official 76:aeb1df146756 134 This parameter can be a value of @ref FSMC_Write_Operation */
mbed_official 76:aeb1df146756 135
mbed_official 76:aeb1df146756 136 uint32_t FSMC_WaitSignal; /*!< Enables or disables the wait-state insertion via wait
mbed_official 76:aeb1df146756 137 signal, valid for Flash memory access in burst mode.
mbed_official 76:aeb1df146756 138 This parameter can be a value of @ref FSMC_Wait_Signal */
mbed_official 76:aeb1df146756 139
mbed_official 76:aeb1df146756 140 uint32_t FSMC_ExtendedMode; /*!< Enables or disables the extended mode.
mbed_official 76:aeb1df146756 141 This parameter can be a value of @ref FSMC_Extended_Mode */
mbed_official 76:aeb1df146756 142
mbed_official 76:aeb1df146756 143 uint32_t FSMC_WriteBurst; /*!< Enables or disables the write burst operation.
mbed_official 76:aeb1df146756 144 This parameter can be a value of @ref FSMC_Write_Burst */
mbed_official 76:aeb1df146756 145
mbed_official 76:aeb1df146756 146 FSMC_NORSRAMTimingInitTypeDef* FSMC_ReadWriteTimingStruct; /*!< Timing Parameters for write and read access if the ExtendedMode is not used*/
mbed_official 76:aeb1df146756 147
mbed_official 76:aeb1df146756 148 FSMC_NORSRAMTimingInitTypeDef* FSMC_WriteTimingStruct; /*!< Timing Parameters for write access if the ExtendedMode is used*/
mbed_official 76:aeb1df146756 149 }FSMC_NORSRAMInitTypeDef;
mbed_official 76:aeb1df146756 150
mbed_official 76:aeb1df146756 151 /* Exported constants --------------------------------------------------------*/
mbed_official 76:aeb1df146756 152
mbed_official 76:aeb1df146756 153 /** @defgroup FSMC_Exported_Constants
mbed_official 76:aeb1df146756 154 * @{
mbed_official 76:aeb1df146756 155 */
mbed_official 76:aeb1df146756 156
mbed_official 76:aeb1df146756 157 /** @defgroup FSMC_NORSRAM_Bank
mbed_official 76:aeb1df146756 158 * @{
mbed_official 76:aeb1df146756 159 */
mbed_official 76:aeb1df146756 160 #define FSMC_Bank1_NORSRAM1 ((uint32_t)0x00000000)
mbed_official 76:aeb1df146756 161 #define FSMC_Bank1_NORSRAM2 ((uint32_t)0x00000002)
mbed_official 76:aeb1df146756 162 #define FSMC_Bank1_NORSRAM3 ((uint32_t)0x00000004)
mbed_official 76:aeb1df146756 163 #define FSMC_Bank1_NORSRAM4 ((uint32_t)0x00000006)
mbed_official 76:aeb1df146756 164
mbed_official 76:aeb1df146756 165 #define IS_FSMC_NORSRAM_BANK(BANK) (((BANK) == FSMC_Bank1_NORSRAM1) || \
mbed_official 76:aeb1df146756 166 ((BANK) == FSMC_Bank1_NORSRAM2) || \
mbed_official 76:aeb1df146756 167 ((BANK) == FSMC_Bank1_NORSRAM3) || \
mbed_official 76:aeb1df146756 168 ((BANK) == FSMC_Bank1_NORSRAM4))
mbed_official 76:aeb1df146756 169 /**
mbed_official 76:aeb1df146756 170 * @}
mbed_official 76:aeb1df146756 171 */
mbed_official 76:aeb1df146756 172
mbed_official 76:aeb1df146756 173 /** @defgroup NOR_SRAM_Controller
mbed_official 76:aeb1df146756 174 * @{
mbed_official 76:aeb1df146756 175 */
mbed_official 76:aeb1df146756 176
mbed_official 76:aeb1df146756 177 /** @defgroup FSMC_Data_Address_Bus_Multiplexing
mbed_official 76:aeb1df146756 178 * @{
mbed_official 76:aeb1df146756 179 */
mbed_official 76:aeb1df146756 180
mbed_official 76:aeb1df146756 181 #define FSMC_DataAddressMux_Disable ((uint32_t)0x00000000)
mbed_official 76:aeb1df146756 182 #define FSMC_DataAddressMux_Enable ((uint32_t)0x00000002)
mbed_official 76:aeb1df146756 183 #define IS_FSMC_MUX(MUX) (((MUX) == FSMC_DataAddressMux_Disable) || \
mbed_official 76:aeb1df146756 184 ((MUX) == FSMC_DataAddressMux_Enable))
mbed_official 76:aeb1df146756 185
mbed_official 76:aeb1df146756 186 /**
mbed_official 76:aeb1df146756 187 * @}
mbed_official 76:aeb1df146756 188 */
mbed_official 76:aeb1df146756 189
mbed_official 76:aeb1df146756 190 /** @defgroup FSMC_Memory_Type
mbed_official 76:aeb1df146756 191 * @{
mbed_official 76:aeb1df146756 192 */
mbed_official 76:aeb1df146756 193
mbed_official 76:aeb1df146756 194 #define FSMC_MemoryType_SRAM ((uint32_t)0x00000000)
mbed_official 76:aeb1df146756 195 #define FSMC_MemoryType_PSRAM ((uint32_t)0x00000004)
mbed_official 76:aeb1df146756 196 #define FSMC_MemoryType_NOR ((uint32_t)0x00000008)
mbed_official 76:aeb1df146756 197 #define IS_FSMC_MEMORY(MEMORY) (((MEMORY) == FSMC_MemoryType_SRAM) || \
mbed_official 76:aeb1df146756 198 ((MEMORY) == FSMC_MemoryType_PSRAM)|| \
mbed_official 76:aeb1df146756 199 ((MEMORY) == FSMC_MemoryType_NOR))
mbed_official 76:aeb1df146756 200
mbed_official 76:aeb1df146756 201 /**
mbed_official 76:aeb1df146756 202 * @}
mbed_official 76:aeb1df146756 203 */
mbed_official 76:aeb1df146756 204
mbed_official 76:aeb1df146756 205 /** @defgroup FSMC_Data_Width
mbed_official 76:aeb1df146756 206 * @{
mbed_official 76:aeb1df146756 207 */
mbed_official 76:aeb1df146756 208
mbed_official 76:aeb1df146756 209 #define FSMC_MemoryDataWidth_8b ((uint32_t)0x00000000)
mbed_official 76:aeb1df146756 210 #define FSMC_MemoryDataWidth_16b ((uint32_t)0x00000010)
mbed_official 76:aeb1df146756 211 #define IS_FSMC_MEMORY_WIDTH(WIDTH) (((WIDTH) == FSMC_MemoryDataWidth_8b) || \
mbed_official 76:aeb1df146756 212 ((WIDTH) == FSMC_MemoryDataWidth_16b))
mbed_official 76:aeb1df146756 213
mbed_official 76:aeb1df146756 214 /**
mbed_official 76:aeb1df146756 215 * @}
mbed_official 76:aeb1df146756 216 */
mbed_official 76:aeb1df146756 217
mbed_official 76:aeb1df146756 218 /** @defgroup FSMC_Burst_Access_Mode
mbed_official 76:aeb1df146756 219 * @{
mbed_official 76:aeb1df146756 220 */
mbed_official 76:aeb1df146756 221
mbed_official 76:aeb1df146756 222 #define FSMC_BurstAccessMode_Disable ((uint32_t)0x00000000)
mbed_official 76:aeb1df146756 223 #define FSMC_BurstAccessMode_Enable ((uint32_t)0x00000100)
mbed_official 76:aeb1df146756 224 #define IS_FSMC_BURSTMODE(STATE) (((STATE) == FSMC_BurstAccessMode_Disable) || \
mbed_official 76:aeb1df146756 225 ((STATE) == FSMC_BurstAccessMode_Enable))
mbed_official 76:aeb1df146756 226 /**
mbed_official 76:aeb1df146756 227 * @}
mbed_official 76:aeb1df146756 228 */
mbed_official 76:aeb1df146756 229
mbed_official 76:aeb1df146756 230 /** @defgroup FSMC_AsynchronousWait
mbed_official 76:aeb1df146756 231 * @{
mbed_official 76:aeb1df146756 232 */
mbed_official 76:aeb1df146756 233 #define FSMC_AsynchronousWait_Disable ((uint32_t)0x00000000)
mbed_official 76:aeb1df146756 234 #define FSMC_AsynchronousWait_Enable ((uint32_t)0x00008000)
mbed_official 76:aeb1df146756 235 #define IS_FSMC_ASYNWAIT(STATE) (((STATE) == FSMC_AsynchronousWait_Disable) || \
mbed_official 76:aeb1df146756 236 ((STATE) == FSMC_AsynchronousWait_Enable))
mbed_official 76:aeb1df146756 237
mbed_official 76:aeb1df146756 238 /**
mbed_official 76:aeb1df146756 239 * @}
mbed_official 76:aeb1df146756 240 */
mbed_official 76:aeb1df146756 241
mbed_official 76:aeb1df146756 242 /** @defgroup FSMC_Wait_Signal_Polarity
mbed_official 76:aeb1df146756 243 * @{
mbed_official 76:aeb1df146756 244 */
mbed_official 76:aeb1df146756 245
mbed_official 76:aeb1df146756 246 #define FSMC_WaitSignalPolarity_Low ((uint32_t)0x00000000)
mbed_official 76:aeb1df146756 247 #define FSMC_WaitSignalPolarity_High ((uint32_t)0x00000200)
mbed_official 76:aeb1df146756 248 #define IS_FSMC_WAIT_POLARITY(POLARITY) (((POLARITY) == FSMC_WaitSignalPolarity_Low) || \
mbed_official 76:aeb1df146756 249 ((POLARITY) == FSMC_WaitSignalPolarity_High))
mbed_official 76:aeb1df146756 250
mbed_official 76:aeb1df146756 251 /**
mbed_official 76:aeb1df146756 252 * @}
mbed_official 76:aeb1df146756 253 */
mbed_official 76:aeb1df146756 254
mbed_official 76:aeb1df146756 255 /** @defgroup FSMC_Wrap_Mode
mbed_official 76:aeb1df146756 256 * @{
mbed_official 76:aeb1df146756 257 */
mbed_official 76:aeb1df146756 258
mbed_official 76:aeb1df146756 259 #define FSMC_WrapMode_Disable ((uint32_t)0x00000000)
mbed_official 76:aeb1df146756 260 #define FSMC_WrapMode_Enable ((uint32_t)0x00000400)
mbed_official 76:aeb1df146756 261 #define IS_FSMC_WRAP_MODE(MODE) (((MODE) == FSMC_WrapMode_Disable) || \
mbed_official 76:aeb1df146756 262 ((MODE) == FSMC_WrapMode_Enable))
mbed_official 76:aeb1df146756 263
mbed_official 76:aeb1df146756 264 /**
mbed_official 76:aeb1df146756 265 * @}
mbed_official 76:aeb1df146756 266 */
mbed_official 76:aeb1df146756 267
mbed_official 76:aeb1df146756 268 /** @defgroup FSMC_Wait_Timing
mbed_official 76:aeb1df146756 269 * @{
mbed_official 76:aeb1df146756 270 */
mbed_official 76:aeb1df146756 271
mbed_official 76:aeb1df146756 272 #define FSMC_WaitSignalActive_BeforeWaitState ((uint32_t)0x00000000)
mbed_official 76:aeb1df146756 273 #define FSMC_WaitSignalActive_DuringWaitState ((uint32_t)0x00000800)
mbed_official 76:aeb1df146756 274 #define IS_FSMC_WAIT_SIGNAL_ACTIVE(ACTIVE) (((ACTIVE) == FSMC_WaitSignalActive_BeforeWaitState) || \
mbed_official 76:aeb1df146756 275 ((ACTIVE) == FSMC_WaitSignalActive_DuringWaitState))
mbed_official 76:aeb1df146756 276
mbed_official 76:aeb1df146756 277 /**
mbed_official 76:aeb1df146756 278 * @}
mbed_official 76:aeb1df146756 279 */
mbed_official 76:aeb1df146756 280
mbed_official 76:aeb1df146756 281 /** @defgroup FSMC_Write_Operation
mbed_official 76:aeb1df146756 282 * @{
mbed_official 76:aeb1df146756 283 */
mbed_official 76:aeb1df146756 284
mbed_official 76:aeb1df146756 285 #define FSMC_WriteOperation_Disable ((uint32_t)0x00000000)
mbed_official 76:aeb1df146756 286 #define FSMC_WriteOperation_Enable ((uint32_t)0x00001000)
mbed_official 76:aeb1df146756 287 #define IS_FSMC_WRITE_OPERATION(OPERATION) (((OPERATION) == FSMC_WriteOperation_Disable) || \
mbed_official 76:aeb1df146756 288 ((OPERATION) == FSMC_WriteOperation_Enable))
mbed_official 76:aeb1df146756 289
mbed_official 76:aeb1df146756 290 /**
mbed_official 76:aeb1df146756 291 * @}
mbed_official 76:aeb1df146756 292 */
mbed_official 76:aeb1df146756 293
mbed_official 76:aeb1df146756 294 /** @defgroup FSMC_Wait_Signal
mbed_official 76:aeb1df146756 295 * @{
mbed_official 76:aeb1df146756 296 */
mbed_official 76:aeb1df146756 297
mbed_official 76:aeb1df146756 298 #define FSMC_WaitSignal_Disable ((uint32_t)0x00000000)
mbed_official 76:aeb1df146756 299 #define FSMC_WaitSignal_Enable ((uint32_t)0x00002000)
mbed_official 76:aeb1df146756 300 #define IS_FSMC_WAITE_SIGNAL(SIGNAL) (((SIGNAL) == FSMC_WaitSignal_Disable) || \
mbed_official 76:aeb1df146756 301 ((SIGNAL) == FSMC_WaitSignal_Enable))
mbed_official 76:aeb1df146756 302 /**
mbed_official 76:aeb1df146756 303 * @}
mbed_official 76:aeb1df146756 304 */
mbed_official 76:aeb1df146756 305
mbed_official 76:aeb1df146756 306 /** @defgroup FSMC_Extended_Mode
mbed_official 76:aeb1df146756 307 * @{
mbed_official 76:aeb1df146756 308 */
mbed_official 76:aeb1df146756 309
mbed_official 76:aeb1df146756 310 #define FSMC_ExtendedMode_Disable ((uint32_t)0x00000000)
mbed_official 76:aeb1df146756 311 #define FSMC_ExtendedMode_Enable ((uint32_t)0x00004000)
mbed_official 76:aeb1df146756 312
mbed_official 76:aeb1df146756 313 #define IS_FSMC_EXTENDED_MODE(MODE) (((MODE) == FSMC_ExtendedMode_Disable) || \
mbed_official 76:aeb1df146756 314 ((MODE) == FSMC_ExtendedMode_Enable))
mbed_official 76:aeb1df146756 315
mbed_official 76:aeb1df146756 316 /**
mbed_official 76:aeb1df146756 317 * @}
mbed_official 76:aeb1df146756 318 */
mbed_official 76:aeb1df146756 319
mbed_official 76:aeb1df146756 320 /** @defgroup FSMC_Write_Burst
mbed_official 76:aeb1df146756 321 * @{
mbed_official 76:aeb1df146756 322 */
mbed_official 76:aeb1df146756 323
mbed_official 76:aeb1df146756 324 #define FSMC_WriteBurst_Disable ((uint32_t)0x00000000)
mbed_official 76:aeb1df146756 325 #define FSMC_WriteBurst_Enable ((uint32_t)0x00080000)
mbed_official 76:aeb1df146756 326 #define IS_FSMC_WRITE_BURST(BURST) (((BURST) == FSMC_WriteBurst_Disable) || \
mbed_official 76:aeb1df146756 327 ((BURST) == FSMC_WriteBurst_Enable))
mbed_official 76:aeb1df146756 328 /**
mbed_official 76:aeb1df146756 329 * @}
mbed_official 76:aeb1df146756 330 */
mbed_official 76:aeb1df146756 331
mbed_official 76:aeb1df146756 332 /** @defgroup FSMC_Address_Setup_Time
mbed_official 76:aeb1df146756 333 * @{
mbed_official 76:aeb1df146756 334 */
mbed_official 76:aeb1df146756 335
mbed_official 76:aeb1df146756 336 #define IS_FSMC_ADDRESS_SETUP_TIME(TIME) ((TIME) <= 0xF)
mbed_official 76:aeb1df146756 337
mbed_official 76:aeb1df146756 338 /**
mbed_official 76:aeb1df146756 339 * @}
mbed_official 76:aeb1df146756 340 */
mbed_official 76:aeb1df146756 341
mbed_official 76:aeb1df146756 342 /** @defgroup FSMC_Address_Hold_Time
mbed_official 76:aeb1df146756 343 * @{
mbed_official 76:aeb1df146756 344 */
mbed_official 76:aeb1df146756 345
mbed_official 76:aeb1df146756 346 #define IS_FSMC_ADDRESS_HOLD_TIME(TIME) ((TIME) <= 0xF)
mbed_official 76:aeb1df146756 347
mbed_official 76:aeb1df146756 348 /**
mbed_official 76:aeb1df146756 349 * @}
mbed_official 76:aeb1df146756 350 */
mbed_official 76:aeb1df146756 351
mbed_official 76:aeb1df146756 352 /** @defgroup FSMC_Data_Setup_Time
mbed_official 76:aeb1df146756 353 * @{
mbed_official 76:aeb1df146756 354 */
mbed_official 76:aeb1df146756 355
mbed_official 76:aeb1df146756 356 #define IS_FSMC_DATASETUP_TIME(TIME) (((TIME) > 0) && ((TIME) <= 0xFF))
mbed_official 76:aeb1df146756 357
mbed_official 76:aeb1df146756 358 /**
mbed_official 76:aeb1df146756 359 * @}
mbed_official 76:aeb1df146756 360 */
mbed_official 76:aeb1df146756 361
mbed_official 76:aeb1df146756 362 /** @defgroup FSMC_Bus_Turn_around_Duration
mbed_official 76:aeb1df146756 363 * @{
mbed_official 76:aeb1df146756 364 */
mbed_official 76:aeb1df146756 365
mbed_official 76:aeb1df146756 366 #define IS_FSMC_TURNAROUND_TIME(TIME) ((TIME) <= 0xF)
mbed_official 76:aeb1df146756 367
mbed_official 76:aeb1df146756 368 /**
mbed_official 76:aeb1df146756 369 * @}
mbed_official 76:aeb1df146756 370 */
mbed_official 76:aeb1df146756 371
mbed_official 76:aeb1df146756 372 /** @defgroup FSMC_CLK_Division
mbed_official 76:aeb1df146756 373 * @{
mbed_official 76:aeb1df146756 374 */
mbed_official 76:aeb1df146756 375
mbed_official 76:aeb1df146756 376 #define IS_FSMC_CLK_DIV(DIV) ((DIV) <= 0xF)
mbed_official 76:aeb1df146756 377
mbed_official 76:aeb1df146756 378 /**
mbed_official 76:aeb1df146756 379 * @}
mbed_official 76:aeb1df146756 380 */
mbed_official 76:aeb1df146756 381
mbed_official 76:aeb1df146756 382 /** @defgroup FSMC_Data_Latency
mbed_official 76:aeb1df146756 383 * @{
mbed_official 76:aeb1df146756 384 */
mbed_official 76:aeb1df146756 385
mbed_official 76:aeb1df146756 386 #define IS_FSMC_DATA_LATENCY(LATENCY) ((LATENCY) <= 0xF)
mbed_official 76:aeb1df146756 387
mbed_official 76:aeb1df146756 388 /**
mbed_official 76:aeb1df146756 389 * @}
mbed_official 76:aeb1df146756 390 */
mbed_official 76:aeb1df146756 391
mbed_official 76:aeb1df146756 392 /** @defgroup FSMC_Access_Mode
mbed_official 76:aeb1df146756 393 * @{
mbed_official 76:aeb1df146756 394 */
mbed_official 76:aeb1df146756 395
mbed_official 76:aeb1df146756 396 #define FSMC_AccessMode_A ((uint32_t)0x00000000)
mbed_official 76:aeb1df146756 397 #define FSMC_AccessMode_B ((uint32_t)0x10000000)
mbed_official 76:aeb1df146756 398 #define FSMC_AccessMode_C ((uint32_t)0x20000000)
mbed_official 76:aeb1df146756 399 #define FSMC_AccessMode_D ((uint32_t)0x30000000)
mbed_official 76:aeb1df146756 400 #define IS_FSMC_ACCESS_MODE(MODE) (((MODE) == FSMC_AccessMode_A) || \
mbed_official 76:aeb1df146756 401 ((MODE) == FSMC_AccessMode_B) || \
mbed_official 76:aeb1df146756 402 ((MODE) == FSMC_AccessMode_C) || \
mbed_official 76:aeb1df146756 403 ((MODE) == FSMC_AccessMode_D))
mbed_official 76:aeb1df146756 404
mbed_official 76:aeb1df146756 405 /**
mbed_official 76:aeb1df146756 406 * @}
mbed_official 76:aeb1df146756 407 */
mbed_official 76:aeb1df146756 408
mbed_official 76:aeb1df146756 409 /**
mbed_official 76:aeb1df146756 410 * @}
mbed_official 76:aeb1df146756 411 */
mbed_official 76:aeb1df146756 412
mbed_official 76:aeb1df146756 413 /**
mbed_official 76:aeb1df146756 414 * @}
mbed_official 76:aeb1df146756 415 */
mbed_official 76:aeb1df146756 416
mbed_official 76:aeb1df146756 417 /* Exported macro ------------------------------------------------------------*/
mbed_official 76:aeb1df146756 418 /* Exported functions ------------------------------------------------------- */
mbed_official 76:aeb1df146756 419 /* NOR/SRAM Controller functions **********************************************/
mbed_official 76:aeb1df146756 420 void FSMC_NORSRAMDeInit(uint32_t FSMC_Bank);
mbed_official 76:aeb1df146756 421 void FSMC_NORSRAMInit(FSMC_NORSRAMInitTypeDef* FSMC_NORSRAMInitStruct);
mbed_official 76:aeb1df146756 422 void FSMC_NORSRAMStructInit(FSMC_NORSRAMInitTypeDef* FSMC_NORSRAMInitStruct);
mbed_official 76:aeb1df146756 423 void FSMC_NORSRAMCmd(uint32_t FSMC_Bank, FunctionalState NewState);
mbed_official 76:aeb1df146756 424
mbed_official 76:aeb1df146756 425 #ifdef __cplusplus
mbed_official 76:aeb1df146756 426 }
mbed_official 76:aeb1df146756 427 #endif
mbed_official 76:aeb1df146756 428
mbed_official 76:aeb1df146756 429 #endif /*__STM32L1xx_FSMC_H */
mbed_official 76:aeb1df146756 430 /**
mbed_official 76:aeb1df146756 431 * @}
mbed_official 76:aeb1df146756 432 */
mbed_official 76:aeb1df146756 433
mbed_official 76:aeb1df146756 434 /**
mbed_official 76:aeb1df146756 435 * @}
mbed_official 76:aeb1df146756 436 */
mbed_official 76:aeb1df146756 437
mbed_official 76:aeb1df146756 438 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/