mbed-F401 - mbed library with additional peripherals for ST F…

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Peter Drescher / mbed-F401

mbed library with additional peripherals for ST F401 board

Fork of mbed-src by mbed official

This mbed LIB has additional peripherals for ST F401 board

UART2 : PA_3 rx, PA_2 tx
UART3 : PC_7 rx, PC_6 tx
I2C2 : PB_3 SDA, PB_10 SCL
I2C3 : PB_4 SDA, PA_8 SCL

targets/cmsis/TARGET_STM/TARGET_NUCLEO_F030R8/stm32f0xx_spi.c@76:aeb1df146756, 2014-01-27 (annotated)

Committer:: mbed_official
Date:: Mon Jan 27 14:30:07 2014 +0000
Revision:: 76:aeb1df146756
Child:: 106:ced8cbb51063

Synchronized with git revision a31ec9c5f7bcb5c8a1b2eced103f6a1dfa921abd



Full URL: https://github.com/mbedmicro/mbed/commit/a31ec9c5f7bcb5c8a1b2eced103f6a1dfa921abd/



Add NUCLEO_L152RE

Who changed what in which revision?

User	Revision	Line number	New contents of line
mbed_official	76:aeb1df146756	1	/**
mbed_official	76:aeb1df146756	2	******************************************************************************
mbed_official	76:aeb1df146756	3	* @file stm32f0xx_spi.c
mbed_official	76:aeb1df146756	4	* @author MCD Application Team
mbed_official	76:aeb1df146756	5	* @version V1.3.0
mbed_official	76:aeb1df146756	6	* @date 16-January-2014
mbed_official	76:aeb1df146756	7	* @brief This file provides firmware functions to manage the following
mbed_official	76:aeb1df146756	8	* functionalities of the Serial peripheral interface (SPI):
mbed_official	76:aeb1df146756	9	* + Initialization and Configuration
mbed_official	76:aeb1df146756	10	* + Data transfers functions
mbed_official	76:aeb1df146756	11	* + Hardware CRC Calculation
mbed_official	76:aeb1df146756	12	* + DMA transfers management
mbed_official	76:aeb1df146756	13	* + Interrupts and flags management
mbed_official	76:aeb1df146756	14	*
mbed_official	76:aeb1df146756	15	* @verbatim
mbed_official	76:aeb1df146756	16
mbed_official	76:aeb1df146756	17	===============================================================================
mbed_official	76:aeb1df146756	18	##### How to use this driver #####
mbed_official	76:aeb1df146756	19	===============================================================================
mbed_official	76:aeb1df146756	20	[..]
mbed_official	76:aeb1df146756	21	(#) Enable peripheral clock using RCC_APB2PeriphClockCmd(RCC_APB2Periph_SPI1, ENABLE)
mbed_official	76:aeb1df146756	22	function for SPI1 or using RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2, ENABLE)
mbed_official	76:aeb1df146756	23	function for SPI2.
mbed_official	76:aeb1df146756	24
mbed_official	76:aeb1df146756	25	(#) Enable SCK, MOSI, MISO and NSS GPIO clocks using
mbed_official	76:aeb1df146756	26	RCC_AHBPeriphClockCmd() function.
mbed_official	76:aeb1df146756	27
mbed_official	76:aeb1df146756	28	(#) Peripherals alternate function:
mbed_official	76:aeb1df146756	29	(++) Connect the pin to the desired peripherals' Alternate
mbed_official	76:aeb1df146756	30	Function (AF) using GPIO_PinAFConfig() function.
mbed_official	76:aeb1df146756	31	(++) Configure the desired pin in alternate function by:
mbed_official	76:aeb1df146756	32	GPIO_InitStruct->GPIO_Mode = GPIO_Mode_AF.
mbed_official	76:aeb1df146756	33	(++) Select the type, pull-up/pull-down and output speed via
mbed_official	76:aeb1df146756	34	GPIO_PuPd, GPIO_OType and GPIO_Speed members.
mbed_official	76:aeb1df146756	35	(++) Call GPIO_Init() function.
mbed_official	76:aeb1df146756	36
mbed_official	76:aeb1df146756	37	(#) Program the Polarity, Phase, First Data, Baud Rate Prescaler, Slave
mbed_official	76:aeb1df146756	38	Management, Peripheral Mode and CRC Polynomial values using the SPI_Init()
mbed_official	76:aeb1df146756	39	function.In I2S mode, program the Mode, Standard, Data Format, MCLK
mbed_official	76:aeb1df146756	40	Output, Audio frequency and Polarity using I2S_Init() function.
mbed_official	76:aeb1df146756	41
mbed_official	76:aeb1df146756	42	(#) Configure the FIFO threshold using SPI_RxFIFOThresholdConfig() to select
mbed_official	76:aeb1df146756	43	at which threshold the RXNE event is generated.
mbed_official	76:aeb1df146756	44
mbed_official	76:aeb1df146756	45	(#) Enable the NVIC and the corresponding interrupt using the function
mbed_official	76:aeb1df146756	46	SPI_ITConfig() if you need to use interrupt mode.
mbed_official	76:aeb1df146756	47
mbed_official	76:aeb1df146756	48	(#) When using the DMA mode
mbed_official	76:aeb1df146756	49	(++) Configure the DMA using DMA_Init() function.
mbed_official	76:aeb1df146756	50	(++) Active the needed channel Request using SPI_I2S_DMACmd() function.
mbed_official	76:aeb1df146756	51
mbed_official	76:aeb1df146756	52	(#) Enable the SPI using the SPI_Cmd() function or enable the I2S using
mbed_official	76:aeb1df146756	53	I2S_Cmd().
mbed_official	76:aeb1df146756	54
mbed_official	76:aeb1df146756	55	(#) Enable the DMA using the DMA_Cmd() function when using DMA mode.
mbed_official	76:aeb1df146756	56
mbed_official	76:aeb1df146756	57	(#) Optionally, you can enable/configure the following parameters without
mbed_official	76:aeb1df146756	58	re-initialization (i.e there is no need to call again SPI_Init() function):
mbed_official	76:aeb1df146756	59	(++) When bidirectional mode (SPI_Direction_1Line_Rx or SPI_Direction_1Line_Tx)
mbed_official	76:aeb1df146756	60	is programmed as Data direction parameter using the SPI_Init()
mbed_official	76:aeb1df146756	61	function it can be possible to switch between SPI_Direction_Tx
mbed_official	76:aeb1df146756	62	or SPI_Direction_Rx using the SPI_BiDirectionalLineConfig() function.
mbed_official	76:aeb1df146756	63	(++) When SPI_NSS_Soft is selected as Slave Select Management parameter
mbed_official	76:aeb1df146756	64	using the SPI_Init() function it can be possible to manage the
mbed_official	76:aeb1df146756	65	NSS internal signal using the SPI_NSSInternalSoftwareConfig() function.
mbed_official	76:aeb1df146756	66	(++) Reconfigure the data size using the SPI_DataSizeConfig() function.
mbed_official	76:aeb1df146756	67	(++) Enable or disable the SS output using the SPI_SSOutputCmd() function.
mbed_official	76:aeb1df146756	68
mbed_official	76:aeb1df146756	69	(#) To use the CRC Hardware calculation feature refer to the Peripheral
mbed_official	76:aeb1df146756	70	CRC hardware Calculation subsection.
mbed_official	76:aeb1df146756	71
mbed_official	76:aeb1df146756	72	@endverbatim
mbed_official	76:aeb1df146756	73	******************************************************************************
mbed_official	76:aeb1df146756	74	* @attention
mbed_official	76:aeb1df146756	75	*
mbed_official	76:aeb1df146756	76	* <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
mbed_official	76:aeb1df146756	77	*
mbed_official	76:aeb1df146756	78	* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
mbed_official	76:aeb1df146756	79	* You may not use this file except in compliance with the License.
mbed_official	76:aeb1df146756	80	* You may obtain a copy of the License at:
mbed_official	76:aeb1df146756	81	*
mbed_official	76:aeb1df146756	82	* http://www.st.com/software_license_agreement_liberty_v2
mbed_official	76:aeb1df146756	83	*
mbed_official	76:aeb1df146756	84	* Unless required by applicable law or agreed to in writing, software
mbed_official	76:aeb1df146756	85	* distributed under the License is distributed on an "AS IS" BASIS,
mbed_official	76:aeb1df146756	86	* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
mbed_official	76:aeb1df146756	87	* See the License for the specific language governing permissions and
mbed_official	76:aeb1df146756	88	* limitations under the License.
mbed_official	76:aeb1df146756	89	*
mbed_official	76:aeb1df146756	90	******************************************************************************
mbed_official	76:aeb1df146756	91	*/
mbed_official	76:aeb1df146756	92
mbed_official	76:aeb1df146756	93	/* Includes ------------------------------------------------------------------*/
mbed_official	76:aeb1df146756	94	#include "stm32f0xx_spi.h"
mbed_official	76:aeb1df146756	95	#include "stm32f0xx_rcc.h"
mbed_official	76:aeb1df146756	96
mbed_official	76:aeb1df146756	97	/** @addtogroup STM32F0xx_StdPeriph_Driver
mbed_official	76:aeb1df146756	98	* @{
mbed_official	76:aeb1df146756	99	*/
mbed_official	76:aeb1df146756	100
mbed_official	76:aeb1df146756	101	/** @defgroup SPI
mbed_official	76:aeb1df146756	102	* @brief SPI driver modules
mbed_official	76:aeb1df146756	103	* @{
mbed_official	76:aeb1df146756	104	*/
mbed_official	76:aeb1df146756	105
mbed_official	76:aeb1df146756	106	/* Private typedef -----------------------------------------------------------*/
mbed_official	76:aeb1df146756	107	/* Private define ------------------------------------------------------------*/
mbed_official	76:aeb1df146756	108	/* SPI registers Masks */
mbed_official	76:aeb1df146756	109	#define CR1_CLEAR_MASK ((uint16_t)0x3040)
mbed_official	76:aeb1df146756	110	#define CR1_CLEAR_MASK2 ((uint16_t)0xFFFB)
mbed_official	76:aeb1df146756	111	#define CR2_LDMA_MASK ((uint16_t)0x9FFF)
mbed_official	76:aeb1df146756	112
mbed_official	76:aeb1df146756	113	#define I2SCFGR_CLEAR_Mask ((uint16_t)0xF040)
mbed_official	76:aeb1df146756	114
mbed_official	76:aeb1df146756	115	/* Private macro -------------------------------------------------------------*/
mbed_official	76:aeb1df146756	116	/* Private variables ---------------------------------------------------------*/
mbed_official	76:aeb1df146756	117	/* Private function prototypes -----------------------------------------------*/
mbed_official	76:aeb1df146756	118	/* Private functions ---------------------------------------------------------*/
mbed_official	76:aeb1df146756	119
mbed_official	76:aeb1df146756	120	/** @defgroup SPI_Private_Functions
mbed_official	76:aeb1df146756	121	* @{
mbed_official	76:aeb1df146756	122	*/
mbed_official	76:aeb1df146756	123
mbed_official	76:aeb1df146756	124	/** @defgroup SPI_Group1 Initialization and Configuration functions
mbed_official	76:aeb1df146756	125	* @brief Initialization and Configuration functions
mbed_official	76:aeb1df146756	126	*
mbed_official	76:aeb1df146756	127	@verbatim
mbed_official	76:aeb1df146756	128	===============================================================================
mbed_official	76:aeb1df146756	129	##### Initialization and Configuration functions #####
mbed_official	76:aeb1df146756	130	===============================================================================
mbed_official	76:aeb1df146756	131	[..] This section provides a set of functions allowing to initialize the SPI Direction,
mbed_official	76:aeb1df146756	132	SPI Mode, SPI Data Size, SPI Polarity, SPI Phase, SPI NSS Management, SPI Baud
mbed_official	76:aeb1df146756	133	Rate Prescaler, SPI First Bit and SPI CRC Polynomial.
mbed_official	76:aeb1df146756	134
mbed_official	76:aeb1df146756	135	[..] The SPI_Init() function follows the SPI configuration procedures for Master mode
mbed_official	76:aeb1df146756	136	and Slave mode (details for these procedures are available in reference manual).
mbed_official	76:aeb1df146756	137
mbed_official	76:aeb1df146756	138	[..] When the Software NSS management (SPI_InitStruct->SPI_NSS = SPI_NSS_Soft) is selected,
mbed_official	76:aeb1df146756	139	use the following function to manage the NSS bit:
mbed_official	76:aeb1df146756	140	void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft);
mbed_official	76:aeb1df146756	141
mbed_official	76:aeb1df146756	142	[..] In Master mode, when the Hardware NSS management (SPI_InitStruct->SPI_NSS = SPI_NSS_Hard)
mbed_official	76:aeb1df146756	143	is selected, use the follwoing function to enable the NSS output feature.
mbed_official	76:aeb1df146756	144	void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState);
mbed_official	76:aeb1df146756	145
mbed_official	76:aeb1df146756	146	[..] The NSS pulse mode can be managed by the SPI TI mode when enabling it using the following function:
mbed_official	76:aeb1df146756	147	void SPI_TIModeCmd(SPI_TypeDef* SPIx, FunctionalState NewState);
mbed_official	76:aeb1df146756	148	And it can be managed by software in the SPI Motorola mode using this function:
mbed_official	76:aeb1df146756	149	void SPI_NSSPulseModeCmd(SPI_TypeDef* SPIx, FunctionalState NewState);
mbed_official	76:aeb1df146756	150
mbed_official	76:aeb1df146756	151	[..] This section provides also functions to initialize the I2S Mode, Standard,
mbed_official	76:aeb1df146756	152	Data Format, MCLK Output, Audio frequency and Polarity.
mbed_official	76:aeb1df146756	153
mbed_official	76:aeb1df146756	154	[..] The I2S_Init() function follows the I2S configuration procedures for Master mode
mbed_official	76:aeb1df146756	155	and Slave mode.
mbed_official	76:aeb1df146756	156
mbed_official	76:aeb1df146756	157	@endverbatim
mbed_official	76:aeb1df146756	158	* @{
mbed_official	76:aeb1df146756	159	*/
mbed_official	76:aeb1df146756	160
mbed_official	76:aeb1df146756	161	/**
mbed_official	76:aeb1df146756	162	* @brief Deinitializes the SPIx peripheral registers to their default
mbed_official	76:aeb1df146756	163	* reset values.
mbed_official	76:aeb1df146756	164	* @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
mbed_official	76:aeb1df146756	165	* @note SPI2 is not available for STM32F031 devices.
mbed_official	76:aeb1df146756	166	* I2S mode is not supported for STM32F030 devices.
mbed_official	76:aeb1df146756	167	* @retval None
mbed_official	76:aeb1df146756	168	*/
mbed_official	76:aeb1df146756	169	void SPI_I2S_DeInit(SPI_TypeDef* SPIx)
mbed_official	76:aeb1df146756	170	{
mbed_official	76:aeb1df146756	171	/* Check the parameters */
mbed_official	76:aeb1df146756	172	assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official	76:aeb1df146756	173
mbed_official	76:aeb1df146756	174	if (SPIx == SPI1)
mbed_official	76:aeb1df146756	175	{
mbed_official	76:aeb1df146756	176	/* Enable SPI1 reset state */
mbed_official	76:aeb1df146756	177	RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, ENABLE);
mbed_official	76:aeb1df146756	178	/* Release SPI1 from reset state */
mbed_official	76:aeb1df146756	179	RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, DISABLE);
mbed_official	76:aeb1df146756	180	}
mbed_official	76:aeb1df146756	181	else
mbed_official	76:aeb1df146756	182	{
mbed_official	76:aeb1df146756	183	if (SPIx == SPI2)
mbed_official	76:aeb1df146756	184	{
mbed_official	76:aeb1df146756	185	/* Enable SPI2 reset state */
mbed_official	76:aeb1df146756	186	RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, ENABLE);
mbed_official	76:aeb1df146756	187	/* Release SPI2 from reset state */
mbed_official	76:aeb1df146756	188	RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, DISABLE);
mbed_official	76:aeb1df146756	189	}
mbed_official	76:aeb1df146756	190	}
mbed_official	76:aeb1df146756	191	}
mbed_official	76:aeb1df146756	192
mbed_official	76:aeb1df146756	193	/**
mbed_official	76:aeb1df146756	194	* @brief Fills each SPI_InitStruct member with its default value.
mbed_official	76:aeb1df146756	195	* @param SPI_InitStruct: pointer to a SPI_InitTypeDef structure which will be initialized.
mbed_official	76:aeb1df146756	196	* @retval None
mbed_official	76:aeb1df146756	197	*/
mbed_official	76:aeb1df146756	198	void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct)
mbed_official	76:aeb1df146756	199	{
mbed_official	76:aeb1df146756	200	/--------------- Reset SPI init structure parameters values -----------------/
mbed_official	76:aeb1df146756	201	/* Initialize the SPI_Direction member */
mbed_official	76:aeb1df146756	202	SPI_InitStruct->SPI_Direction = SPI_Direction_2Lines_FullDuplex;
mbed_official	76:aeb1df146756	203	/* Initialize the SPI_Mode member */
mbed_official	76:aeb1df146756	204	SPI_InitStruct->SPI_Mode = SPI_Mode_Slave;
mbed_official	76:aeb1df146756	205	/* Initialize the SPI_DataSize member */
mbed_official	76:aeb1df146756	206	SPI_InitStruct->SPI_DataSize = SPI_DataSize_8b;
mbed_official	76:aeb1df146756	207	/* Initialize the SPI_CPOL member */
mbed_official	76:aeb1df146756	208	SPI_InitStruct->SPI_CPOL = SPI_CPOL_Low;
mbed_official	76:aeb1df146756	209	/* Initialize the SPI_CPHA member */
mbed_official	76:aeb1df146756	210	SPI_InitStruct->SPI_CPHA = SPI_CPHA_1Edge;
mbed_official	76:aeb1df146756	211	/* Initialize the SPI_NSS member */
mbed_official	76:aeb1df146756	212	SPI_InitStruct->SPI_NSS = SPI_NSS_Hard;
mbed_official	76:aeb1df146756	213	/* Initialize the SPI_BaudRatePrescaler member */
mbed_official	76:aeb1df146756	214	SPI_InitStruct->SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_2;
mbed_official	76:aeb1df146756	215	/* Initialize the SPI_FirstBit member */
mbed_official	76:aeb1df146756	216	SPI_InitStruct->SPI_FirstBit = SPI_FirstBit_MSB;
mbed_official	76:aeb1df146756	217	/* Initialize the SPI_CRCPolynomial member */
mbed_official	76:aeb1df146756	218	SPI_InitStruct->SPI_CRCPolynomial = 7;
mbed_official	76:aeb1df146756	219	}
mbed_official	76:aeb1df146756	220
mbed_official	76:aeb1df146756	221	/**
mbed_official	76:aeb1df146756	222	* @brief Initializes the SPIx peripheral according to the specified
mbed_official	76:aeb1df146756	223	* parameters in the SPI_InitStruct.
mbed_official	76:aeb1df146756	224	* @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
mbed_official	76:aeb1df146756	225	* @note SPI2 is not available for STM32F031 devices.
mbed_official	76:aeb1df146756	226	* @param SPI_InitStruct: pointer to a SPI_InitTypeDef structure that
mbed_official	76:aeb1df146756	227	* contains the configuration information for the specified SPI peripheral.
mbed_official	76:aeb1df146756	228	* @retval None
mbed_official	76:aeb1df146756	229	*/
mbed_official	76:aeb1df146756	230	void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct)
mbed_official	76:aeb1df146756	231	{
mbed_official	76:aeb1df146756	232	uint16_t tmpreg = 0;
mbed_official	76:aeb1df146756	233
mbed_official	76:aeb1df146756	234	/* check the parameters */
mbed_official	76:aeb1df146756	235	assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official	76:aeb1df146756	236
mbed_official	76:aeb1df146756	237	/* Check the SPI parameters */
mbed_official	76:aeb1df146756	238	assert_param(IS_SPI_DIRECTION_MODE(SPI_InitStruct->SPI_Direction));
mbed_official	76:aeb1df146756	239	assert_param(IS_SPI_MODE(SPI_InitStruct->SPI_Mode));
mbed_official	76:aeb1df146756	240	assert_param(IS_SPI_DATA_SIZE(SPI_InitStruct->SPI_DataSize));
mbed_official	76:aeb1df146756	241	assert_param(IS_SPI_CPOL(SPI_InitStruct->SPI_CPOL));
mbed_official	76:aeb1df146756	242	assert_param(IS_SPI_CPHA(SPI_InitStruct->SPI_CPHA));
mbed_official	76:aeb1df146756	243	assert_param(IS_SPI_NSS(SPI_InitStruct->SPI_NSS));
mbed_official	76:aeb1df146756	244	assert_param(IS_SPI_BAUDRATE_PRESCALER(SPI_InitStruct->SPI_BaudRatePrescaler));
mbed_official	76:aeb1df146756	245	assert_param(IS_SPI_FIRST_BIT(SPI_InitStruct->SPI_FirstBit));
mbed_official	76:aeb1df146756	246	assert_param(IS_SPI_CRC_POLYNOMIAL(SPI_InitStruct->SPI_CRCPolynomial));
mbed_official	76:aeb1df146756	247
mbed_official	76:aeb1df146756	248	/---------------------------- SPIx CR1 Configuration ------------------------/
mbed_official	76:aeb1df146756	249	/* Get the SPIx CR1 value */
mbed_official	76:aeb1df146756	250	tmpreg = SPIx->CR1;
mbed_official	76:aeb1df146756	251	/* Clear BIDIMode, BIDIOE, RxONLY, SSM, SSI, LSBFirst, BR, CPOL and CPHA bits */
mbed_official	76:aeb1df146756	252	tmpreg &= CR1_CLEAR_MASK;
mbed_official	76:aeb1df146756	253	/* Configure SPIx: direction, NSS management, first transmitted bit, BaudRate prescaler
mbed_official	76:aeb1df146756	254	master/slave mode, CPOL and CPHA */
mbed_official	76:aeb1df146756	255	/* Set BIDImode, BIDIOE and RxONLY bits according to SPI_Direction value */
mbed_official	76:aeb1df146756	256	/* Set SSM, SSI bit according to SPI_NSS values */
mbed_official	76:aeb1df146756	257	/* Set LSBFirst bit according to SPI_FirstBit value */
mbed_official	76:aeb1df146756	258	/* Set BR bits according to SPI_BaudRatePrescaler value */
mbed_official	76:aeb1df146756	259	/* Set CPOL bit according to SPI_CPOL value */
mbed_official	76:aeb1df146756	260	/* Set CPHA bit according to SPI_CPHA value */
mbed_official	76:aeb1df146756	261	tmpreg \|= (uint16_t)((uint32_t)SPI_InitStruct->SPI_Direction \| SPI_InitStruct->SPI_FirstBit \|
mbed_official	76:aeb1df146756	262	SPI_InitStruct->SPI_CPOL \| SPI_InitStruct->SPI_CPHA \|
mbed_official	76:aeb1df146756	263	SPI_InitStruct->SPI_NSS \| SPI_InitStruct->SPI_BaudRatePrescaler);
mbed_official	76:aeb1df146756	264	/* Write to SPIx CR1 */
mbed_official	76:aeb1df146756	265	SPIx->CR1 = tmpreg;
mbed_official	76:aeb1df146756	266	/-------------------------Data Size Configuration -----------------------/
mbed_official	76:aeb1df146756	267	/* Get the SPIx CR2 value */
mbed_official	76:aeb1df146756	268	tmpreg = SPIx->CR2;
mbed_official	76:aeb1df146756	269	/* Clear DS[3:0] bits */
mbed_official	76:aeb1df146756	270	tmpreg &=(uint16_t)~SPI_CR2_DS;
mbed_official	76:aeb1df146756	271	/* Configure SPIx: Data Size */
mbed_official	76:aeb1df146756	272	tmpreg \|= (uint16_t)(SPI_InitStruct->SPI_DataSize);
mbed_official	76:aeb1df146756	273	/* Write to SPIx CR2 */
mbed_official	76:aeb1df146756	274	SPIx->CR2 = tmpreg;
mbed_official	76:aeb1df146756	275
mbed_official	76:aeb1df146756	276	/---------------------------- SPIx CRCPOLY Configuration --------------------/
mbed_official	76:aeb1df146756	277	/* Write to SPIx CRCPOLY */
mbed_official	76:aeb1df146756	278	SPIx->CRCPR = SPI_InitStruct->SPI_CRCPolynomial;
mbed_official	76:aeb1df146756	279
mbed_official	76:aeb1df146756	280	/---------------------------- SPIx CR1 Configuration ------------------------/
mbed_official	76:aeb1df146756	281	/* Get the SPIx CR1 value */
mbed_official	76:aeb1df146756	282	tmpreg = SPIx->CR1;
mbed_official	76:aeb1df146756	283	/* Clear MSTR bit */
mbed_official	76:aeb1df146756	284	tmpreg &= CR1_CLEAR_MASK2;
mbed_official	76:aeb1df146756	285	/* Configure SPIx: master/slave mode */
mbed_official	76:aeb1df146756	286	/* Set MSTR bit according to SPI_Mode */
mbed_official	76:aeb1df146756	287	tmpreg \|= (uint16_t)((uint32_t)SPI_InitStruct->SPI_Mode);
mbed_official	76:aeb1df146756	288	/* Write to SPIx CR1 */
mbed_official	76:aeb1df146756	289	SPIx->CR1 = tmpreg;
mbed_official	76:aeb1df146756	290
mbed_official	76:aeb1df146756	291	/* Activate the SPI mode (Reset I2SMOD bit in I2SCFGR register) */
mbed_official	76:aeb1df146756	292	SPIx->I2SCFGR &= (uint16_t)~((uint16_t)SPI_I2SCFGR_I2SMOD);
mbed_official	76:aeb1df146756	293	}
mbed_official	76:aeb1df146756	294
mbed_official	76:aeb1df146756	295	/**
mbed_official	76:aeb1df146756	296	* @brief Fills each I2S_InitStruct member with its default value.
mbed_official	76:aeb1df146756	297	* @note This mode is not supported for STM32F030 devices.
mbed_official	76:aeb1df146756	298	* @param I2S_InitStruct: pointer to a I2S_InitTypeDef structure which will be initialized.
mbed_official	76:aeb1df146756	299	* @retval None
mbed_official	76:aeb1df146756	300	*/
mbed_official	76:aeb1df146756	301	void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct)
mbed_official	76:aeb1df146756	302	{
mbed_official	76:aeb1df146756	303	/--------------- Reset I2S init structure parameters values -----------------/
mbed_official	76:aeb1df146756	304	/* Initialize the I2S_Mode member */
mbed_official	76:aeb1df146756	305	I2S_InitStruct->I2S_Mode = I2S_Mode_SlaveTx;
mbed_official	76:aeb1df146756	306
mbed_official	76:aeb1df146756	307	/* Initialize the I2S_Standard member */
mbed_official	76:aeb1df146756	308	I2S_InitStruct->I2S_Standard = I2S_Standard_Phillips;
mbed_official	76:aeb1df146756	309
mbed_official	76:aeb1df146756	310	/* Initialize the I2S_DataFormat member */
mbed_official	76:aeb1df146756	311	I2S_InitStruct->I2S_DataFormat = I2S_DataFormat_16b;
mbed_official	76:aeb1df146756	312
mbed_official	76:aeb1df146756	313	/* Initialize the I2S_MCLKOutput member */
mbed_official	76:aeb1df146756	314	I2S_InitStruct->I2S_MCLKOutput = I2S_MCLKOutput_Disable;
mbed_official	76:aeb1df146756	315
mbed_official	76:aeb1df146756	316	/* Initialize the I2S_AudioFreq member */
mbed_official	76:aeb1df146756	317	I2S_InitStruct->I2S_AudioFreq = I2S_AudioFreq_Default;
mbed_official	76:aeb1df146756	318
mbed_official	76:aeb1df146756	319	/* Initialize the I2S_CPOL member */
mbed_official	76:aeb1df146756	320	I2S_InitStruct->I2S_CPOL = I2S_CPOL_Low;
mbed_official	76:aeb1df146756	321	}
mbed_official	76:aeb1df146756	322
mbed_official	76:aeb1df146756	323	/**
mbed_official	76:aeb1df146756	324	* @brief Initializes the SPIx peripheral according to the specified
mbed_official	76:aeb1df146756	325	* parameters in the I2S_InitStruct.
mbed_official	76:aeb1df146756	326	* @note This mode is not supported for STM32F030 devices.
mbed_official	76:aeb1df146756	327	* @param SPIx: where x can be 1 to select the SPI peripheral (configured in I2S mode).
mbed_official	76:aeb1df146756	328	* @param I2S_InitStruct: pointer to an I2S_InitTypeDef structure that
mbed_official	76:aeb1df146756	329	* contains the configuration information for the specified SPI peripheral
mbed_official	76:aeb1df146756	330	* configured in I2S mode.
mbed_official	76:aeb1df146756	331	* @note This function calculates the optimal prescaler needed to obtain the most
mbed_official	76:aeb1df146756	332	* accurate audio frequency (depending on the I2S clock source, the PLL values
mbed_official	76:aeb1df146756	333	* and the product configuration). But in case the prescaler value is greater
mbed_official	76:aeb1df146756	334	* than 511, the default value (0x02) will be configured instead.
mbed_official	76:aeb1df146756	335	* @retval None
mbed_official	76:aeb1df146756	336	*/
mbed_official	76:aeb1df146756	337	void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct)
mbed_official	76:aeb1df146756	338	{
mbed_official	76:aeb1df146756	339	uint16_t tmpreg = 0, i2sdiv = 2, i2sodd = 0, packetlength = 1;
mbed_official	76:aeb1df146756	340	uint32_t tmp = 0;
mbed_official	76:aeb1df146756	341	RCC_ClocksTypeDef RCC_Clocks;
mbed_official	76:aeb1df146756	342	uint32_t sourceclock = 0;
mbed_official	76:aeb1df146756	343
mbed_official	76:aeb1df146756	344	/* Check the I2S parameters */
mbed_official	76:aeb1df146756	345	assert_param(IS_SPI_1_PERIPH(SPIx));
mbed_official	76:aeb1df146756	346	assert_param(IS_I2S_MODE(I2S_InitStruct->I2S_Mode));
mbed_official	76:aeb1df146756	347	assert_param(IS_I2S_STANDARD(I2S_InitStruct->I2S_Standard));
mbed_official	76:aeb1df146756	348	assert_param(IS_I2S_DATA_FORMAT(I2S_InitStruct->I2S_DataFormat));
mbed_official	76:aeb1df146756	349	assert_param(IS_I2S_MCLK_OUTPUT(I2S_InitStruct->I2S_MCLKOutput));
mbed_official	76:aeb1df146756	350	assert_param(IS_I2S_AUDIO_FREQ(I2S_InitStruct->I2S_AudioFreq));
mbed_official	76:aeb1df146756	351	assert_param(IS_I2S_CPOL(I2S_InitStruct->I2S_CPOL));
mbed_official	76:aeb1df146756	352
mbed_official	76:aeb1df146756	353	/----------------------- SPIx I2SCFGR & I2SPR Configuration -----------------/
mbed_official	76:aeb1df146756	354	/* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */
mbed_official	76:aeb1df146756	355	SPIx->I2SCFGR &= I2SCFGR_CLEAR_Mask;
mbed_official	76:aeb1df146756	356	SPIx->I2SPR = 0x0002;
mbed_official	76:aeb1df146756	357
mbed_official	76:aeb1df146756	358	/* Get the I2SCFGR register value */
mbed_official	76:aeb1df146756	359	tmpreg = SPIx->I2SCFGR;
mbed_official	76:aeb1df146756	360
mbed_official	76:aeb1df146756	361	/* If the default value has to be written, reinitialize i2sdiv and i2sodd*/
mbed_official	76:aeb1df146756	362	if(I2S_InitStruct->I2S_AudioFreq == I2S_AudioFreq_Default)
mbed_official	76:aeb1df146756	363	{
mbed_official	76:aeb1df146756	364	i2sodd = (uint16_t)0;
mbed_official	76:aeb1df146756	365	i2sdiv = (uint16_t)2;
mbed_official	76:aeb1df146756	366	}
mbed_official	76:aeb1df146756	367	/* If the requested audio frequency is not the default, compute the prescaler */
mbed_official	76:aeb1df146756	368	else
mbed_official	76:aeb1df146756	369	{
mbed_official	76:aeb1df146756	370	/* Check the frame length (For the Prescaler computing) */
mbed_official	76:aeb1df146756	371	if(I2S_InitStruct->I2S_DataFormat == I2S_DataFormat_16b)
mbed_official	76:aeb1df146756	372	{
mbed_official	76:aeb1df146756	373	/* Packet length is 16 bits */
mbed_official	76:aeb1df146756	374	packetlength = 1;
mbed_official	76:aeb1df146756	375	}
mbed_official	76:aeb1df146756	376	else
mbed_official	76:aeb1df146756	377	{
mbed_official	76:aeb1df146756	378	/* Packet length is 32 bits */
mbed_official	76:aeb1df146756	379	packetlength = 2;
mbed_official	76:aeb1df146756	380	}
mbed_official	76:aeb1df146756	381
mbed_official	76:aeb1df146756	382	/* I2S Clock source is System clock: Get System Clock frequency */
mbed_official	76:aeb1df146756	383	RCC_GetClocksFreq(&RCC_Clocks);
mbed_official	76:aeb1df146756	384
mbed_official	76:aeb1df146756	385	/* Get the source clock value: based on System Clock value */
mbed_official	76:aeb1df146756	386	sourceclock = RCC_Clocks.SYSCLK_Frequency;
mbed_official	76:aeb1df146756	387
mbed_official	76:aeb1df146756	388	/* Compute the Real divider depending on the MCLK output state with a floating point */
mbed_official	76:aeb1df146756	389	if(I2S_InitStruct->I2S_MCLKOutput == I2S_MCLKOutput_Enable)
mbed_official	76:aeb1df146756	390	{
mbed_official	76:aeb1df146756	391	/* MCLK output is enabled */
mbed_official	76:aeb1df146756	392	tmp = (uint16_t)(((((sourceclock / 256) * 10) / I2S_InitStruct->I2S_AudioFreq)) + 5);
mbed_official	76:aeb1df146756	393	}
mbed_official	76:aeb1df146756	394	else
mbed_official	76:aeb1df146756	395	{
mbed_official	76:aeb1df146756	396	/* MCLK output is disabled */
mbed_official	76:aeb1df146756	397	tmp = (uint16_t)(((((sourceclock / (32 * packetlength)) *10 ) / I2S_InitStruct->I2S_AudioFreq)) + 5);
mbed_official	76:aeb1df146756	398	}
mbed_official	76:aeb1df146756	399
mbed_official	76:aeb1df146756	400	/* Remove the floating point */
mbed_official	76:aeb1df146756	401	tmp = tmp / 10;
mbed_official	76:aeb1df146756	402
mbed_official	76:aeb1df146756	403	/* Check the parity of the divider */
mbed_official	76:aeb1df146756	404	i2sodd = (uint16_t)(tmp & (uint16_t)0x0001);
mbed_official	76:aeb1df146756	405
mbed_official	76:aeb1df146756	406	/* Compute the i2sdiv prescaler */
mbed_official	76:aeb1df146756	407	i2sdiv = (uint16_t)((tmp - i2sodd) / 2);
mbed_official	76:aeb1df146756	408
mbed_official	76:aeb1df146756	409	/* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */
mbed_official	76:aeb1df146756	410	i2sodd = (uint16_t) (i2sodd << 8);
mbed_official	76:aeb1df146756	411	}
mbed_official	76:aeb1df146756	412
mbed_official	76:aeb1df146756	413	/* Test if the divider is 1 or 0 or greater than 0xFF */
mbed_official	76:aeb1df146756	414	if ((i2sdiv < 2) \|\| (i2sdiv > 0xFF))
mbed_official	76:aeb1df146756	415	{
mbed_official	76:aeb1df146756	416	/* Set the default values */
mbed_official	76:aeb1df146756	417	i2sdiv = 2;
mbed_official	76:aeb1df146756	418	i2sodd = 0;
mbed_official	76:aeb1df146756	419	}
mbed_official	76:aeb1df146756	420
mbed_official	76:aeb1df146756	421	/* Write to SPIx I2SPR register the computed value */
mbed_official	76:aeb1df146756	422	SPIx->I2SPR = (uint16_t)(i2sdiv \| (uint16_t)(i2sodd \| (uint16_t)I2S_InitStruct->I2S_MCLKOutput));
mbed_official	76:aeb1df146756	423
mbed_official	76:aeb1df146756	424	/* Configure the I2S with the SPI_InitStruct values */
mbed_official	76:aeb1df146756	425	tmpreg \|= (uint16_t)(SPI_I2SCFGR_I2SMOD \| (uint16_t)(I2S_InitStruct->I2S_Mode \| \
mbed_official	76:aeb1df146756	426	(uint16_t)(I2S_InitStruct->I2S_Standard \| (uint16_t)(I2S_InitStruct->I2S_DataFormat \| \
mbed_official	76:aeb1df146756	427	(uint16_t)I2S_InitStruct->I2S_CPOL))));
mbed_official	76:aeb1df146756	428
mbed_official	76:aeb1df146756	429	/* Write to SPIx I2SCFGR */
mbed_official	76:aeb1df146756	430	SPIx->I2SCFGR = tmpreg;
mbed_official	76:aeb1df146756	431	}
mbed_official	76:aeb1df146756	432
mbed_official	76:aeb1df146756	433	/**
mbed_official	76:aeb1df146756	434	* @brief Enables or disables the specified SPI peripheral.
mbed_official	76:aeb1df146756	435	* @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
mbed_official	76:aeb1df146756	436	* @note SPI2 is not available for STM32F031 devices.
mbed_official	76:aeb1df146756	437	* @param NewState: new state of the SPIx peripheral.
mbed_official	76:aeb1df146756	438	* This parameter can be: ENABLE or DISABLE.
mbed_official	76:aeb1df146756	439	* @retval None
mbed_official	76:aeb1df146756	440	*/
mbed_official	76:aeb1df146756	441	void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState)
mbed_official	76:aeb1df146756	442	{
mbed_official	76:aeb1df146756	443	/* Check the parameters */
mbed_official	76:aeb1df146756	444	assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official	76:aeb1df146756	445	assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official	76:aeb1df146756	446
mbed_official	76:aeb1df146756	447	if (NewState != DISABLE)
mbed_official	76:aeb1df146756	448	{
mbed_official	76:aeb1df146756	449	/* Enable the selected SPI peripheral */
mbed_official	76:aeb1df146756	450	SPIx->CR1 \|= SPI_CR1_SPE;
mbed_official	76:aeb1df146756	451	}
mbed_official	76:aeb1df146756	452	else
mbed_official	76:aeb1df146756	453	{
mbed_official	76:aeb1df146756	454	/* Disable the selected SPI peripheral */
mbed_official	76:aeb1df146756	455	SPIx->CR1 &= (uint16_t)~((uint16_t)SPI_CR1_SPE);
mbed_official	76:aeb1df146756	456	}
mbed_official	76:aeb1df146756	457	}
mbed_official	76:aeb1df146756	458
mbed_official	76:aeb1df146756	459	/**
mbed_official	76:aeb1df146756	460	* @brief Enables or disables the TI Mode.
mbed_official	76:aeb1df146756	461	*
mbed_official	76:aeb1df146756	462	* @note This function can be called only after the SPI_Init() function has
mbed_official	76:aeb1df146756	463	* been called.
mbed_official	76:aeb1df146756	464	* @note When TI mode is selected, the control bits SSM, SSI, CPOL and CPHA
mbed_official	76:aeb1df146756	465	* are not taken into consideration and are configured by hardware
mbed_official	76:aeb1df146756	466	* respectively to the TI mode requirements.
mbed_official	76:aeb1df146756	467	*
mbed_official	76:aeb1df146756	468	* @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
mbed_official	76:aeb1df146756	469	* @note SPI2 is not available for STM32F031 devices.
mbed_official	76:aeb1df146756	470	* @param NewState: new state of the selected SPI TI communication mode.
mbed_official	76:aeb1df146756	471	* This parameter can be: ENABLE or DISABLE.
mbed_official	76:aeb1df146756	472	* @retval None
mbed_official	76:aeb1df146756	473	*/
mbed_official	76:aeb1df146756	474	void SPI_TIModeCmd(SPI_TypeDef* SPIx, FunctionalState NewState)
mbed_official	76:aeb1df146756	475	{
mbed_official	76:aeb1df146756	476	/* Check the parameters */
mbed_official	76:aeb1df146756	477	assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official	76:aeb1df146756	478	assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official	76:aeb1df146756	479
mbed_official	76:aeb1df146756	480	if (NewState != DISABLE)
mbed_official	76:aeb1df146756	481	{
mbed_official	76:aeb1df146756	482	/* Enable the TI mode for the selected SPI peripheral */
mbed_official	76:aeb1df146756	483	SPIx->CR2 \|= SPI_CR2_FRF;
mbed_official	76:aeb1df146756	484	}
mbed_official	76:aeb1df146756	485	else
mbed_official	76:aeb1df146756	486	{
mbed_official	76:aeb1df146756	487	/* Disable the TI mode for the selected SPI peripheral */
mbed_official	76:aeb1df146756	488	SPIx->CR2 &= (uint16_t)~((uint16_t)SPI_CR2_FRF);
mbed_official	76:aeb1df146756	489	}
mbed_official	76:aeb1df146756	490	}
mbed_official	76:aeb1df146756	491
mbed_official	76:aeb1df146756	492	/**
mbed_official	76:aeb1df146756	493	* @brief Enables or disables the specified SPI peripheral (in I2S mode).
mbed_official	76:aeb1df146756	494	* @note This mode is not supported for STM32F030 devices.
mbed_official	76:aeb1df146756	495	* @param SPIx: where x can be 1 to select the SPI peripheral.
mbed_official	76:aeb1df146756	496	* @param NewState: new state of the SPIx peripheral.
mbed_official	76:aeb1df146756	497	* This parameter can be: ENABLE or DISABLE.
mbed_official	76:aeb1df146756	498	* @retval None
mbed_official	76:aeb1df146756	499	*/
mbed_official	76:aeb1df146756	500	void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState)
mbed_official	76:aeb1df146756	501	{
mbed_official	76:aeb1df146756	502	/* Check the parameters */
mbed_official	76:aeb1df146756	503	assert_param(IS_SPI_1_PERIPH(SPIx));
mbed_official	76:aeb1df146756	504	assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official	76:aeb1df146756	505	if (NewState != DISABLE)
mbed_official	76:aeb1df146756	506	{
mbed_official	76:aeb1df146756	507	/* Enable the selected SPI peripheral in I2S mode */
mbed_official	76:aeb1df146756	508	SPIx->I2SCFGR \|= SPI_I2SCFGR_I2SE;
mbed_official	76:aeb1df146756	509	}
mbed_official	76:aeb1df146756	510	else
mbed_official	76:aeb1df146756	511	{
mbed_official	76:aeb1df146756	512	/* Disable the selected SPI peripheral in I2S mode */
mbed_official	76:aeb1df146756	513	SPIx->I2SCFGR &= (uint16_t)~((uint16_t)SPI_I2SCFGR_I2SE);
mbed_official	76:aeb1df146756	514	}
mbed_official	76:aeb1df146756	515	}
mbed_official	76:aeb1df146756	516
mbed_official	76:aeb1df146756	517	/**
mbed_official	76:aeb1df146756	518	* @brief Configures the data size for the selected SPI.
mbed_official	76:aeb1df146756	519	* @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
mbed_official	76:aeb1df146756	520	* @note SPI2 is not available for STM32F031 devices.
mbed_official	76:aeb1df146756	521	* @param SPI_DataSize: specifies the SPI data size.
mbed_official	76:aeb1df146756	522	* For the SPIx peripheral this parameter can be one of the following values:
mbed_official	76:aeb1df146756	523	* @arg SPI_DataSize_4b: Set data size to 4 bits
mbed_official	76:aeb1df146756	524	* @arg SPI_DataSize_5b: Set data size to 5 bits
mbed_official	76:aeb1df146756	525	* @arg SPI_DataSize_6b: Set data size to 6 bits
mbed_official	76:aeb1df146756	526	* @arg SPI_DataSize_7b: Set data size to 7 bits
mbed_official	76:aeb1df146756	527	* @arg SPI_DataSize_8b: Set data size to 8 bits
mbed_official	76:aeb1df146756	528	* @arg SPI_DataSize_9b: Set data size to 9 bits
mbed_official	76:aeb1df146756	529	* @arg SPI_DataSize_10b: Set data size to 10 bits
mbed_official	76:aeb1df146756	530	* @arg SPI_DataSize_11b: Set data size to 11 bits
mbed_official	76:aeb1df146756	531	* @arg SPI_DataSize_12b: Set data size to 12 bits
mbed_official	76:aeb1df146756	532	* @arg SPI_DataSize_13b: Set data size to 13 bits
mbed_official	76:aeb1df146756	533	* @arg SPI_DataSize_14b: Set data size to 14 bits
mbed_official	76:aeb1df146756	534	* @arg SPI_DataSize_15b: Set data size to 15 bits
mbed_official	76:aeb1df146756	535	* @arg SPI_DataSize_16b: Set data size to 16 bits
mbed_official	76:aeb1df146756	536	* @retval None
mbed_official	76:aeb1df146756	537	*/
mbed_official	76:aeb1df146756	538	void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize)
mbed_official	76:aeb1df146756	539	{
mbed_official	76:aeb1df146756	540	uint16_t tmpreg = 0;
mbed_official	76:aeb1df146756	541
mbed_official	76:aeb1df146756	542	/* Check the parameters */
mbed_official	76:aeb1df146756	543	assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official	76:aeb1df146756	544	assert_param(IS_SPI_DATA_SIZE(SPI_DataSize));
mbed_official	76:aeb1df146756	545	/* Read the CR2 register */
mbed_official	76:aeb1df146756	546	tmpreg = SPIx->CR2;
mbed_official	76:aeb1df146756	547	/* Clear DS[3:0] bits */
mbed_official	76:aeb1df146756	548	tmpreg &= (uint16_t)~SPI_CR2_DS;
mbed_official	76:aeb1df146756	549	/* Set new DS[3:0] bits value */
mbed_official	76:aeb1df146756	550	tmpreg \|= SPI_DataSize;
mbed_official	76:aeb1df146756	551	SPIx->CR2 = tmpreg;
mbed_official	76:aeb1df146756	552	}
mbed_official	76:aeb1df146756	553
mbed_official	76:aeb1df146756	554	/**
mbed_official	76:aeb1df146756	555	* @brief Configures the FIFO reception threshold for the selected SPI.
mbed_official	76:aeb1df146756	556	* @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
mbed_official	76:aeb1df146756	557	* @note SPI2 is not available for STM32F031 devices.
mbed_official	76:aeb1df146756	558	* @param SPI_RxFIFOThreshold: specifies the FIFO reception threshold.
mbed_official	76:aeb1df146756	559	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	560	* @arg SPI_RxFIFOThreshold_HF: RXNE event is generated if the FIFO
mbed_official	76:aeb1df146756	561	* level is greater or equal to 1/2.
mbed_official	76:aeb1df146756	562	* @arg SPI_RxFIFOThreshold_QF: RXNE event is generated if the FIFO
mbed_official	76:aeb1df146756	563	* level is greater or equal to 1/4.
mbed_official	76:aeb1df146756	564	* @retval None
mbed_official	76:aeb1df146756	565	*/
mbed_official	76:aeb1df146756	566	void SPI_RxFIFOThresholdConfig(SPI_TypeDef* SPIx, uint16_t SPI_RxFIFOThreshold)
mbed_official	76:aeb1df146756	567	{
mbed_official	76:aeb1df146756	568	/* Check the parameters */
mbed_official	76:aeb1df146756	569	assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official	76:aeb1df146756	570	assert_param(IS_SPI_RX_FIFO_THRESHOLD(SPI_RxFIFOThreshold));
mbed_official	76:aeb1df146756	571
mbed_official	76:aeb1df146756	572	/* Clear FRXTH bit */
mbed_official	76:aeb1df146756	573	SPIx->CR2 &= (uint16_t)~((uint16_t)SPI_CR2_FRXTH);
mbed_official	76:aeb1df146756	574
mbed_official	76:aeb1df146756	575	/* Set new FRXTH bit value */
mbed_official	76:aeb1df146756	576	SPIx->CR2 \|= SPI_RxFIFOThreshold;
mbed_official	76:aeb1df146756	577	}
mbed_official	76:aeb1df146756	578
mbed_official	76:aeb1df146756	579	/**
mbed_official	76:aeb1df146756	580	* @brief Selects the data transfer direction in bidirectional mode for the specified SPI.
mbed_official	76:aeb1df146756	581	* @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
mbed_official	76:aeb1df146756	582	* @note SPI2 is not available for STM32F031 devices.
mbed_official	76:aeb1df146756	583	* @param SPI_Direction: specifies the data transfer direction in bidirectional mode.
mbed_official	76:aeb1df146756	584	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	585	* @arg SPI_Direction_Tx: Selects Tx transmission direction
mbed_official	76:aeb1df146756	586	* @arg SPI_Direction_Rx: Selects Rx receive direction
mbed_official	76:aeb1df146756	587	* @retval None
mbed_official	76:aeb1df146756	588	*/
mbed_official	76:aeb1df146756	589	void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction)
mbed_official	76:aeb1df146756	590	{
mbed_official	76:aeb1df146756	591	/* Check the parameters */
mbed_official	76:aeb1df146756	592	assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official	76:aeb1df146756	593	assert_param(IS_SPI_DIRECTION(SPI_Direction));
mbed_official	76:aeb1df146756	594	if (SPI_Direction == SPI_Direction_Tx)
mbed_official	76:aeb1df146756	595	{
mbed_official	76:aeb1df146756	596	/* Set the Tx only mode */
mbed_official	76:aeb1df146756	597	SPIx->CR1 \|= SPI_Direction_Tx;
mbed_official	76:aeb1df146756	598	}
mbed_official	76:aeb1df146756	599	else
mbed_official	76:aeb1df146756	600	{
mbed_official	76:aeb1df146756	601	/* Set the Rx only mode */
mbed_official	76:aeb1df146756	602	SPIx->CR1 &= SPI_Direction_Rx;
mbed_official	76:aeb1df146756	603	}
mbed_official	76:aeb1df146756	604	}
mbed_official	76:aeb1df146756	605
mbed_official	76:aeb1df146756	606	/**
mbed_official	76:aeb1df146756	607	* @brief Configures internally by software the NSS pin for the selected SPI.
mbed_official	76:aeb1df146756	608	* @note This function can be called only after the SPI_Init() function has
mbed_official	76:aeb1df146756	609	* been called.
mbed_official	76:aeb1df146756	610	* @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
mbed_official	76:aeb1df146756	611	* @note SPI2 is not available for STM32F031 devices.
mbed_official	76:aeb1df146756	612	* @param SPI_NSSInternalSoft: specifies the SPI NSS internal state.
mbed_official	76:aeb1df146756	613	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	614	* @arg SPI_NSSInternalSoft_Set: Set NSS pin internally
mbed_official	76:aeb1df146756	615	* @arg SPI_NSSInternalSoft_Reset: Reset NSS pin internally
mbed_official	76:aeb1df146756	616	* @retval None
mbed_official	76:aeb1df146756	617	*/
mbed_official	76:aeb1df146756	618	void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft)
mbed_official	76:aeb1df146756	619	{
mbed_official	76:aeb1df146756	620	/* Check the parameters */
mbed_official	76:aeb1df146756	621	assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official	76:aeb1df146756	622	assert_param(IS_SPI_NSS_INTERNAL(SPI_NSSInternalSoft));
mbed_official	76:aeb1df146756	623
mbed_official	76:aeb1df146756	624	if (SPI_NSSInternalSoft != SPI_NSSInternalSoft_Reset)
mbed_official	76:aeb1df146756	625	{
mbed_official	76:aeb1df146756	626	/* Set NSS pin internally by software */
mbed_official	76:aeb1df146756	627	SPIx->CR1 \|= SPI_NSSInternalSoft_Set;
mbed_official	76:aeb1df146756	628	}
mbed_official	76:aeb1df146756	629	else
mbed_official	76:aeb1df146756	630	{
mbed_official	76:aeb1df146756	631	/* Reset NSS pin internally by software */
mbed_official	76:aeb1df146756	632	SPIx->CR1 &= SPI_NSSInternalSoft_Reset;
mbed_official	76:aeb1df146756	633	}
mbed_official	76:aeb1df146756	634	}
mbed_official	76:aeb1df146756	635
mbed_official	76:aeb1df146756	636	/**
mbed_official	76:aeb1df146756	637	* @brief Enables or disables the SS output for the selected SPI.
mbed_official	76:aeb1df146756	638	* @note This function can be called only after the SPI_Init() function has
mbed_official	76:aeb1df146756	639	* been called and the NSS hardware management mode is selected.
mbed_official	76:aeb1df146756	640	* @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
mbed_official	76:aeb1df146756	641	* @note SPI2 is not available for STM32F031 devices.
mbed_official	76:aeb1df146756	642	* @param NewState: new state of the SPIx SS output.
mbed_official	76:aeb1df146756	643	* This parameter can be: ENABLE or DISABLE.
mbed_official	76:aeb1df146756	644	* @retval None
mbed_official	76:aeb1df146756	645	*/
mbed_official	76:aeb1df146756	646	void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState)
mbed_official	76:aeb1df146756	647	{
mbed_official	76:aeb1df146756	648	/* Check the parameters */
mbed_official	76:aeb1df146756	649	assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official	76:aeb1df146756	650	assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official	76:aeb1df146756	651	if (NewState != DISABLE)
mbed_official	76:aeb1df146756	652	{
mbed_official	76:aeb1df146756	653	/* Enable the selected SPI SS output */
mbed_official	76:aeb1df146756	654	SPIx->CR2 \|= SPI_CR2_SSOE;
mbed_official	76:aeb1df146756	655	}
mbed_official	76:aeb1df146756	656	else
mbed_official	76:aeb1df146756	657	{
mbed_official	76:aeb1df146756	658	/* Disable the selected SPI SS output */
mbed_official	76:aeb1df146756	659	SPIx->CR2 &= (uint16_t)~((uint16_t)SPI_CR2_SSOE);
mbed_official	76:aeb1df146756	660	}
mbed_official	76:aeb1df146756	661	}
mbed_official	76:aeb1df146756	662
mbed_official	76:aeb1df146756	663	/**
mbed_official	76:aeb1df146756	664	* @brief Enables or disables the NSS pulse management mode.
mbed_official	76:aeb1df146756	665	* @note This function can be called only after the SPI_Init() function has
mbed_official	76:aeb1df146756	666	* been called.
mbed_official	76:aeb1df146756	667	* @note When TI mode is selected, the control bits NSSP is not taken into
mbed_official	76:aeb1df146756	668	* consideration and are configured by hardware respectively to the
mbed_official	76:aeb1df146756	669	* TI mode requirements.
mbed_official	76:aeb1df146756	670	* @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
mbed_official	76:aeb1df146756	671	* @note SPI2 is not available for STM32F031 devices.
mbed_official	76:aeb1df146756	672	* @param NewState: new state of the NSS pulse management mode.
mbed_official	76:aeb1df146756	673	* This parameter can be: ENABLE or DISABLE.
mbed_official	76:aeb1df146756	674	* @retval None
mbed_official	76:aeb1df146756	675	*/
mbed_official	76:aeb1df146756	676	void SPI_NSSPulseModeCmd(SPI_TypeDef* SPIx, FunctionalState NewState)
mbed_official	76:aeb1df146756	677	{
mbed_official	76:aeb1df146756	678	/* Check the parameters */
mbed_official	76:aeb1df146756	679	assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official	76:aeb1df146756	680	assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official	76:aeb1df146756	681
mbed_official	76:aeb1df146756	682	if (NewState != DISABLE)
mbed_official	76:aeb1df146756	683	{
mbed_official	76:aeb1df146756	684	/* Enable the NSS pulse management mode */
mbed_official	76:aeb1df146756	685	SPIx->CR2 \|= SPI_CR2_NSSP;
mbed_official	76:aeb1df146756	686	}
mbed_official	76:aeb1df146756	687	else
mbed_official	76:aeb1df146756	688	{
mbed_official	76:aeb1df146756	689	/* Disable the NSS pulse management mode */
mbed_official	76:aeb1df146756	690	SPIx->CR2 &= (uint16_t)~((uint16_t)SPI_CR2_NSSP);
mbed_official	76:aeb1df146756	691	}
mbed_official	76:aeb1df146756	692	}
mbed_official	76:aeb1df146756	693
mbed_official	76:aeb1df146756	694	/**
mbed_official	76:aeb1df146756	695	* @}
mbed_official	76:aeb1df146756	696	*/
mbed_official	76:aeb1df146756	697
mbed_official	76:aeb1df146756	698	/** @defgroup SPI_Group2 Data transfers functions
mbed_official	76:aeb1df146756	699	* @brief Data transfers functions
mbed_official	76:aeb1df146756	700	*
mbed_official	76:aeb1df146756	701	@verbatim
mbed_official	76:aeb1df146756	702	===============================================================================
mbed_official	76:aeb1df146756	703	##### Data transfers functions #####
mbed_official	76:aeb1df146756	704	===============================================================================
mbed_official	76:aeb1df146756	705	[..] This section provides a set of functions allowing to manage the SPI or I2S
mbed_official	76:aeb1df146756	706	data transfers.
mbed_official	76:aeb1df146756	707
mbed_official	76:aeb1df146756	708	[..] In reception, data are received and then stored into an internal Rx buffer while
mbed_official	76:aeb1df146756	709	In transmission, data are first stored into an internal Tx buffer before being
mbed_official	76:aeb1df146756	710	transmitted.
mbed_official	76:aeb1df146756	711
mbed_official	76:aeb1df146756	712	[..] The read access of the SPI_DR register can be done using
mbed_official	76:aeb1df146756	713	SPI_ReceiveData8() (when data size is equal or inferior than 8bits) and.
mbed_official	76:aeb1df146756	714	SPI_I2S_ReceiveData16() (when data size is superior than 8bits)function
mbed_official	76:aeb1df146756	715	and returns the Rx buffered value. Whereas a write access to the SPI_DR
mbed_official	76:aeb1df146756	716	can be done using SPI_SendData8() (when data size is equal or inferior than 8bits)
mbed_official	76:aeb1df146756	717	and SPI_I2S_SendData16() (when data size is superior than 8bits) function
mbed_official	76:aeb1df146756	718	and stores the written data into Tx buffer.
mbed_official	76:aeb1df146756	719
mbed_official	76:aeb1df146756	720	@endverbatim
mbed_official	76:aeb1df146756	721	* @{
mbed_official	76:aeb1df146756	722	*/
mbed_official	76:aeb1df146756	723
mbed_official	76:aeb1df146756	724	/**
mbed_official	76:aeb1df146756	725	* @brief Transmits a Data through the SPIx/I2Sx peripheral.
mbed_official	76:aeb1df146756	726	* @param SPIx: where x can be 1 or 2 in SPI mode to select the SPI peripheral.
mbed_official	76:aeb1df146756	727	* @note SPI2 is not available for STM32F031 devices.
mbed_official	76:aeb1df146756	728	* @param Data: Data to be transmitted.
mbed_official	76:aeb1df146756	729	* @retval None
mbed_official	76:aeb1df146756	730	*/
mbed_official	76:aeb1df146756	731	void SPI_SendData8(SPI_TypeDef* SPIx, uint8_t Data)
mbed_official	76:aeb1df146756	732	{
mbed_official	76:aeb1df146756	733	uint32_t spixbase = 0x00;
mbed_official	76:aeb1df146756	734
mbed_official	76:aeb1df146756	735	/* Check the parameters */
mbed_official	76:aeb1df146756	736	assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official	76:aeb1df146756	737
mbed_official	76:aeb1df146756	738	spixbase = (uint32_t)SPIx;
mbed_official	76:aeb1df146756	739	spixbase += 0x0C;
mbed_official	76:aeb1df146756	740
mbed_official	76:aeb1df146756	741	(__IO uint8_t ) spixbase = Data;
mbed_official	76:aeb1df146756	742	}
mbed_official	76:aeb1df146756	743
mbed_official	76:aeb1df146756	744	/**
mbed_official	76:aeb1df146756	745	* @brief Transmits a Data through the SPIx/I2Sx peripheral.
mbed_official	76:aeb1df146756	746	* @param SPIx: where x can be 1 or 2 in SPI mode or 1 in I2S mode to select
mbed_official	76:aeb1df146756	747	* the SPI peripheral.
mbed_official	76:aeb1df146756	748	* @note SPI2 is not available for STM32F031 devices.
mbed_official	76:aeb1df146756	749	* @param Data: Data to be transmitted.
mbed_official	76:aeb1df146756	750	* @retval None
mbed_official	76:aeb1df146756	751	*/
mbed_official	76:aeb1df146756	752	void SPI_I2S_SendData16(SPI_TypeDef* SPIx, uint16_t Data)
mbed_official	76:aeb1df146756	753	{
mbed_official	76:aeb1df146756	754	/* Check the parameters */
mbed_official	76:aeb1df146756	755	assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official	76:aeb1df146756	756
mbed_official	76:aeb1df146756	757	SPIx->DR = (uint16_t)Data;
mbed_official	76:aeb1df146756	758	}
mbed_official	76:aeb1df146756	759
mbed_official	76:aeb1df146756	760	/**
mbed_official	76:aeb1df146756	761	* @brief Returns the most recent received data by the SPIx/I2Sx peripheral.
mbed_official	76:aeb1df146756	762	* @param SPIx: where x can be 1 or 2 in SPI mode to select the SPI peripheral.
mbed_official	76:aeb1df146756	763	* @note SPI2 is not available for STM32F031 devices.
mbed_official	76:aeb1df146756	764	* @retval The value of the received data.
mbed_official	76:aeb1df146756	765	*/
mbed_official	76:aeb1df146756	766	uint8_t SPI_ReceiveData8(SPI_TypeDef* SPIx)
mbed_official	76:aeb1df146756	767	{
mbed_official	76:aeb1df146756	768	uint32_t spixbase = 0x00;
mbed_official	76:aeb1df146756	769
mbed_official	76:aeb1df146756	770	spixbase = (uint32_t)SPIx;
mbed_official	76:aeb1df146756	771	spixbase += 0x0C;
mbed_official	76:aeb1df146756	772
mbed_official	76:aeb1df146756	773	return (__IO uint8_t ) spixbase;
mbed_official	76:aeb1df146756	774	}
mbed_official	76:aeb1df146756	775
mbed_official	76:aeb1df146756	776	/**
mbed_official	76:aeb1df146756	777	* @brief Returns the most recent received data by the SPIx peripheral.
mbed_official	76:aeb1df146756	778	* @param SPIx: where x can be 1 or 2 in SPI mode or 1 in I2S mode to select
mbed_official	76:aeb1df146756	779	* @note SPI2 is not available for STM32F031 devices.
mbed_official	76:aeb1df146756	780	* the SPI peripheral.
mbed_official	76:aeb1df146756	781	* @retval The value of the received data.
mbed_official	76:aeb1df146756	782	*/
mbed_official	76:aeb1df146756	783	uint16_t SPI_I2S_ReceiveData16(SPI_TypeDef* SPIx)
mbed_official	76:aeb1df146756	784	{
mbed_official	76:aeb1df146756	785	return SPIx->DR;
mbed_official	76:aeb1df146756	786	}
mbed_official	76:aeb1df146756	787	/**
mbed_official	76:aeb1df146756	788	* @}
mbed_official	76:aeb1df146756	789	*/
mbed_official	76:aeb1df146756	790
mbed_official	76:aeb1df146756	791	/** @defgroup SPI_Group3 Hardware CRC Calculation functions
mbed_official	76:aeb1df146756	792	* @brief Hardware CRC Calculation functions
mbed_official	76:aeb1df146756	793	*
mbed_official	76:aeb1df146756	794	@verbatim
mbed_official	76:aeb1df146756	795	===============================================================================
mbed_official	76:aeb1df146756	796	##### Hardware CRC Calculation functions #####
mbed_official	76:aeb1df146756	797	===============================================================================
mbed_official	76:aeb1df146756	798	[..] This section provides a set of functions allowing to manage the SPI CRC hardware
mbed_official	76:aeb1df146756	799	calculation.SPI communication using CRC is possible through the following procedure:
mbed_official	76:aeb1df146756	800
mbed_official	76:aeb1df146756	801	(#) Program the Data direction, Polarity, Phase, First Data, Baud Rate Prescaler,
mbed_official	76:aeb1df146756	802	Slave Management, Peripheral Mode and CRC Polynomial values using the SPI_Init()
mbed_official	76:aeb1df146756	803	function.
mbed_official	76:aeb1df146756	804	(#) Enable the CRC calculation using the SPI_CalculateCRC() function.
mbed_official	76:aeb1df146756	805	(#) Enable the SPI using the SPI_Cmd() function
mbed_official	76:aeb1df146756	806	(#) Before writing the last data to the TX buffer, set the CRCNext bit using the
mbed_official	76:aeb1df146756	807	SPI_TransmitCRC() function to indicate that after transmission of the last
mbed_official	76:aeb1df146756	808	data, the CRC should be transmitted.
mbed_official	76:aeb1df146756	809	(#) After transmitting the last data, the SPI transmits the CRC. The SPI_CR1_CRCNEXT
mbed_official	76:aeb1df146756	810	bit is reset. The CRC is also received and compared against the SPI_RXCRCR
mbed_official	76:aeb1df146756	811	value.
mbed_official	76:aeb1df146756	812	If the value does not match, the SPI_FLAG_CRCERR flag is set and an interrupt
mbed_official	76:aeb1df146756	813	can be generated when the SPI_I2S_IT_ERR interrupt is enabled.
mbed_official	76:aeb1df146756	814
mbed_official	76:aeb1df146756	815	-@-
mbed_official	76:aeb1df146756	816	(+@) It is advised to don't read the calculate CRC values during the communication.
mbed_official	76:aeb1df146756	817	(+@) When the SPI is in slave mode, be careful to enable CRC calculation only
mbed_official	76:aeb1df146756	818	when the clock is stable, that is, when the clock is in the steady state.
mbed_official	76:aeb1df146756	819	If not, a wrong CRC calculation may be done. In fact, the CRC is sensitive
mbed_official	76:aeb1df146756	820	to the SCK slave input clock as soon as CRCEN is set, and this, whatever
mbed_official	76:aeb1df146756	821	the value of the SPE bit.
mbed_official	76:aeb1df146756	822	(+@) With high bitrate frequencies, be careful when transmitting the CRC.
mbed_official	76:aeb1df146756	823	As the number of used CPU cycles has to be as low as possible in the CRC
mbed_official	76:aeb1df146756	824	transfer phase, it is forbidden to call software functions in the CRC
mbed_official	76:aeb1df146756	825	transmission sequence to avoid errors in the last data and CRC reception.
mbed_official	76:aeb1df146756	826	In fact, CRCNEXT bit has to be written before the end of the transmission/reception
mbed_official	76:aeb1df146756	827	of the last data.
mbed_official	76:aeb1df146756	828	(+@) For high bit rate frequencies, it is advised to use the DMA mode to avoid the
mbed_official	76:aeb1df146756	829	degradation of the SPI speed performance due to CPU accesses impacting the
mbed_official	76:aeb1df146756	830	SPI bandwidth.
mbed_official	76:aeb1df146756	831	(+@) When the STM32F0xx are configured as slaves and the NSS hardware mode is
mbed_official	76:aeb1df146756	832	used, the NSS pin needs to be kept low between the data phase and the CRC
mbed_official	76:aeb1df146756	833	phase.
mbed_official	76:aeb1df146756	834	(+@) When the SPI is configured in slave mode with the CRC feature enabled, CRC
mbed_official	76:aeb1df146756	835	calculation takes place even if a high level is applied on the NSS pin.
mbed_official	76:aeb1df146756	836	This may happen for example in case of a multislave environment where the
mbed_official	76:aeb1df146756	837	communication master addresses slaves alternately.
mbed_official	76:aeb1df146756	838	(+@) Between a slave deselection (high level on NSS) and a new slave selection
mbed_official	76:aeb1df146756	839	(low level on NSS), the CRC value should be cleared on both master and slave
mbed_official	76:aeb1df146756	840	sides in order to resynchronize the master and slave for their respective
mbed_official	76:aeb1df146756	841	CRC calculation.
mbed_official	76:aeb1df146756	842
mbed_official	76:aeb1df146756	843	-@- To clear the CRC, follow the procedure below:
mbed_official	76:aeb1df146756	844	(#@) Disable SPI using the SPI_Cmd() function
mbed_official	76:aeb1df146756	845	(#@) Disable the CRC calculation using the SPI_CalculateCRC() function.
mbed_official	76:aeb1df146756	846	(#@) Enable the CRC calculation using the SPI_CalculateCRC() function.
mbed_official	76:aeb1df146756	847	(#@) Enable SPI using the SPI_Cmd() function.
mbed_official	76:aeb1df146756	848
mbed_official	76:aeb1df146756	849	@endverbatim
mbed_official	76:aeb1df146756	850	* @{
mbed_official	76:aeb1df146756	851	*/
mbed_official	76:aeb1df146756	852
mbed_official	76:aeb1df146756	853	/**
mbed_official	76:aeb1df146756	854	* @brief Configures the CRC calculation length for the selected SPI.
mbed_official	76:aeb1df146756	855	* @note This function can be called only after the SPI_Init() function has
mbed_official	76:aeb1df146756	856	* been called.
mbed_official	76:aeb1df146756	857	* @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
mbed_official	76:aeb1df146756	858	* @note SPI2 is not available for STM32F031 devices.
mbed_official	76:aeb1df146756	859	* @param SPI_CRCLength: specifies the SPI CRC calculation length.
mbed_official	76:aeb1df146756	860	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	861	* @arg SPI_CRCLength_8b: Set CRC Calculation to 8 bits
mbed_official	76:aeb1df146756	862	* @arg SPI_CRCLength_16b: Set CRC Calculation to 16 bits
mbed_official	76:aeb1df146756	863	* @retval None
mbed_official	76:aeb1df146756	864	*/
mbed_official	76:aeb1df146756	865	void SPI_CRCLengthConfig(SPI_TypeDef* SPIx, uint16_t SPI_CRCLength)
mbed_official	76:aeb1df146756	866	{
mbed_official	76:aeb1df146756	867	/* Check the parameters */
mbed_official	76:aeb1df146756	868	assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official	76:aeb1df146756	869	assert_param(IS_SPI_CRC_LENGTH(SPI_CRCLength));
mbed_official	76:aeb1df146756	870
mbed_official	76:aeb1df146756	871	/* Clear CRCL bit */
mbed_official	76:aeb1df146756	872	SPIx->CR1 &= (uint16_t)~((uint16_t)SPI_CR1_CRCL);
mbed_official	76:aeb1df146756	873
mbed_official	76:aeb1df146756	874	/* Set new CRCL bit value */
mbed_official	76:aeb1df146756	875	SPIx->CR1 \|= SPI_CRCLength;
mbed_official	76:aeb1df146756	876	}
mbed_official	76:aeb1df146756	877
mbed_official	76:aeb1df146756	878	/**
mbed_official	76:aeb1df146756	879	* @brief Enables or disables the CRC value calculation of the transferred bytes.
mbed_official	76:aeb1df146756	880	* @note This function can be called only after the SPI_Init() function has
mbed_official	76:aeb1df146756	881	* been called.
mbed_official	76:aeb1df146756	882	* @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
mbed_official	76:aeb1df146756	883	* @note SPI2 is not available for STM32F031 devices.
mbed_official	76:aeb1df146756	884	* @param NewState: new state of the SPIx CRC value calculation.
mbed_official	76:aeb1df146756	885	* This parameter can be: ENABLE or DISABLE.
mbed_official	76:aeb1df146756	886	* @retval None
mbed_official	76:aeb1df146756	887	*/
mbed_official	76:aeb1df146756	888	void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState)
mbed_official	76:aeb1df146756	889	{
mbed_official	76:aeb1df146756	890	/* Check the parameters */
mbed_official	76:aeb1df146756	891	assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official	76:aeb1df146756	892	assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official	76:aeb1df146756	893
mbed_official	76:aeb1df146756	894	if (NewState != DISABLE)
mbed_official	76:aeb1df146756	895	{
mbed_official	76:aeb1df146756	896	/* Enable the selected SPI CRC calculation */
mbed_official	76:aeb1df146756	897	SPIx->CR1 \|= SPI_CR1_CRCEN;
mbed_official	76:aeb1df146756	898	}
mbed_official	76:aeb1df146756	899	else
mbed_official	76:aeb1df146756	900	{
mbed_official	76:aeb1df146756	901	/* Disable the selected SPI CRC calculation */
mbed_official	76:aeb1df146756	902	SPIx->CR1 &= (uint16_t)~((uint16_t)SPI_CR1_CRCEN);
mbed_official	76:aeb1df146756	903	}
mbed_official	76:aeb1df146756	904	}
mbed_official	76:aeb1df146756	905
mbed_official	76:aeb1df146756	906	/**
mbed_official	76:aeb1df146756	907	* @brief Transmit the SPIx CRC value.
mbed_official	76:aeb1df146756	908	* @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
mbed_official	76:aeb1df146756	909	* @note SPI2 is not available for STM32F031 devices.
mbed_official	76:aeb1df146756	910	* @retval None
mbed_official	76:aeb1df146756	911	*/
mbed_official	76:aeb1df146756	912	void SPI_TransmitCRC(SPI_TypeDef* SPIx)
mbed_official	76:aeb1df146756	913	{
mbed_official	76:aeb1df146756	914	/* Check the parameters */
mbed_official	76:aeb1df146756	915	assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official	76:aeb1df146756	916
mbed_official	76:aeb1df146756	917	/* Enable the selected SPI CRC transmission */
mbed_official	76:aeb1df146756	918	SPIx->CR1 \|= SPI_CR1_CRCNEXT;
mbed_official	76:aeb1df146756	919	}
mbed_official	76:aeb1df146756	920
mbed_official	76:aeb1df146756	921	/**
mbed_official	76:aeb1df146756	922	* @brief Returns the transmit or the receive CRC register value for the specified SPI.
mbed_official	76:aeb1df146756	923	* @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
mbed_official	76:aeb1df146756	924	* @note SPI2 is not available for STM32F031 devices.
mbed_official	76:aeb1df146756	925	* @param SPI_CRC: specifies the CRC register to be read.
mbed_official	76:aeb1df146756	926	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	927	* @arg SPI_CRC_Tx: Selects Tx CRC register
mbed_official	76:aeb1df146756	928	* @arg SPI_CRC_Rx: Selects Rx CRC register
mbed_official	76:aeb1df146756	929	* @retval The selected CRC register value..
mbed_official	76:aeb1df146756	930	*/
mbed_official	76:aeb1df146756	931	uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC)
mbed_official	76:aeb1df146756	932	{
mbed_official	76:aeb1df146756	933	uint16_t crcreg = 0;
mbed_official	76:aeb1df146756	934	/* Check the parameters */
mbed_official	76:aeb1df146756	935	assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official	76:aeb1df146756	936	assert_param(IS_SPI_CRC(SPI_CRC));
mbed_official	76:aeb1df146756	937
mbed_official	76:aeb1df146756	938	if (SPI_CRC != SPI_CRC_Rx)
mbed_official	76:aeb1df146756	939	{
mbed_official	76:aeb1df146756	940	/* Get the Tx CRC register */
mbed_official	76:aeb1df146756	941	crcreg = SPIx->TXCRCR;
mbed_official	76:aeb1df146756	942	}
mbed_official	76:aeb1df146756	943	else
mbed_official	76:aeb1df146756	944	{
mbed_official	76:aeb1df146756	945	/* Get the Rx CRC register */
mbed_official	76:aeb1df146756	946	crcreg = SPIx->RXCRCR;
mbed_official	76:aeb1df146756	947	}
mbed_official	76:aeb1df146756	948	/* Return the selected CRC register */
mbed_official	76:aeb1df146756	949	return crcreg;
mbed_official	76:aeb1df146756	950	}
mbed_official	76:aeb1df146756	951
mbed_official	76:aeb1df146756	952	/**
mbed_official	76:aeb1df146756	953	* @brief Returns the CRC Polynomial register value for the specified SPI.
mbed_official	76:aeb1df146756	954	* @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
mbed_official	76:aeb1df146756	955	* @note SPI2 is not available for STM32F031 devices.
mbed_official	76:aeb1df146756	956	* @retval The CRC Polynomial register value.
mbed_official	76:aeb1df146756	957	*/
mbed_official	76:aeb1df146756	958	uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx)
mbed_official	76:aeb1df146756	959	{
mbed_official	76:aeb1df146756	960	/* Check the parameters */
mbed_official	76:aeb1df146756	961	assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official	76:aeb1df146756	962
mbed_official	76:aeb1df146756	963	/* Return the CRC polynomial register */
mbed_official	76:aeb1df146756	964	return SPIx->CRCPR;
mbed_official	76:aeb1df146756	965	}
mbed_official	76:aeb1df146756	966
mbed_official	76:aeb1df146756	967	/**
mbed_official	76:aeb1df146756	968	* @}
mbed_official	76:aeb1df146756	969	*/
mbed_official	76:aeb1df146756	970
mbed_official	76:aeb1df146756	971	/** @defgroup SPI_Group4 DMA transfers management functions
mbed_official	76:aeb1df146756	972	* @brief DMA transfers management functions
mbed_official	76:aeb1df146756	973	*
mbed_official	76:aeb1df146756	974	@verbatim
mbed_official	76:aeb1df146756	975	===============================================================================
mbed_official	76:aeb1df146756	976	##### DMA transfers management functions #####
mbed_official	76:aeb1df146756	977	===============================================================================
mbed_official	76:aeb1df146756	978	[..] This section provides two functions that can be used only in DMA mode.
mbed_official	76:aeb1df146756	979
mbed_official	76:aeb1df146756	980	@endverbatim
mbed_official	76:aeb1df146756	981	* @{
mbed_official	76:aeb1df146756	982	*/
mbed_official	76:aeb1df146756	983
mbed_official	76:aeb1df146756	984	/**
mbed_official	76:aeb1df146756	985	* @brief Enables or disables the SPIx/I2Sx DMA interface.
mbed_official	76:aeb1df146756	986	* @param SPIx: where x can be 1 or 2 in SPI mode or 1 in I2S mode to select
mbed_official	76:aeb1df146756	987	* the SPI peripheral.
mbed_official	76:aeb1df146756	988	* @note SPI2 is not available for STM32F031 devices.
mbed_official	76:aeb1df146756	989	* I2S mode is not supported for STM32F030 devices.
mbed_official	76:aeb1df146756	990	* @param SPI_I2S_DMAReq: specifies the SPI DMA transfer request to be enabled or disabled.
mbed_official	76:aeb1df146756	991	* This parameter can be any combination of the following values:
mbed_official	76:aeb1df146756	992	* @arg SPI_I2S_DMAReq_Tx: Tx buffer DMA transfer request
mbed_official	76:aeb1df146756	993	* @arg SPI_I2S_DMAReq_Rx: Rx buffer DMA transfer request
mbed_official	76:aeb1df146756	994	* @param NewState: new state of the selected SPI DMA transfer request.
mbed_official	76:aeb1df146756	995	* This parameter can be: ENABLE or DISABLE.
mbed_official	76:aeb1df146756	996	* @retval None
mbed_official	76:aeb1df146756	997	*/
mbed_official	76:aeb1df146756	998	void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState)
mbed_official	76:aeb1df146756	999	{
mbed_official	76:aeb1df146756	1000	/* Check the parameters */
mbed_official	76:aeb1df146756	1001	assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official	76:aeb1df146756	1002	assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official	76:aeb1df146756	1003	assert_param(IS_SPI_I2S_DMA_REQ(SPI_I2S_DMAReq));
mbed_official	76:aeb1df146756	1004
mbed_official	76:aeb1df146756	1005	if (NewState != DISABLE)
mbed_official	76:aeb1df146756	1006	{
mbed_official	76:aeb1df146756	1007	/* Enable the selected SPI DMA requests */
mbed_official	76:aeb1df146756	1008	SPIx->CR2 \|= SPI_I2S_DMAReq;
mbed_official	76:aeb1df146756	1009	}
mbed_official	76:aeb1df146756	1010	else
mbed_official	76:aeb1df146756	1011	{
mbed_official	76:aeb1df146756	1012	/* Disable the selected SPI DMA requests */
mbed_official	76:aeb1df146756	1013	SPIx->CR2 &= (uint16_t)~SPI_I2S_DMAReq;
mbed_official	76:aeb1df146756	1014	}
mbed_official	76:aeb1df146756	1015	}
mbed_official	76:aeb1df146756	1016
mbed_official	76:aeb1df146756	1017	/**
mbed_official	76:aeb1df146756	1018	* @brief Configures the number of data to transfer type(Even/Odd) for the DMA
mbed_official	76:aeb1df146756	1019	* last transfers and for the selected SPI.
mbed_official	76:aeb1df146756	1020	* @note This function have a meaning only if DMA mode is selected and if
mbed_official	76:aeb1df146756	1021	* the packing mode is used (data length <= 8 and DMA transfer size halfword)
mbed_official	76:aeb1df146756	1022	* @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
mbed_official	76:aeb1df146756	1023	* @note SPI2 is not available for STM32F031 devices.
mbed_official	76:aeb1df146756	1024	* @param SPI_LastDMATransfer: specifies the SPI last DMA transfers state.
mbed_official	76:aeb1df146756	1025	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1026	* @arg SPI_LastDMATransfer_TxEvenRxEven: Number of data for transmission Even
mbed_official	76:aeb1df146756	1027	* and number of data for reception Even.
mbed_official	76:aeb1df146756	1028	* @arg SPI_LastDMATransfer_TxOddRxEven: Number of data for transmission Odd
mbed_official	76:aeb1df146756	1029	* and number of data for reception Even.
mbed_official	76:aeb1df146756	1030	* @arg SPI_LastDMATransfer_TxEvenRxOdd: Number of data for transmission Even
mbed_official	76:aeb1df146756	1031	* and number of data for reception Odd.
mbed_official	76:aeb1df146756	1032	* @arg SPI_LastDMATransfer_TxOddRxOdd: Number of data for transmission Odd
mbed_official	76:aeb1df146756	1033	* and number of data for reception Odd.
mbed_official	76:aeb1df146756	1034	* @retval None
mbed_official	76:aeb1df146756	1035	*/
mbed_official	76:aeb1df146756	1036	void SPI_LastDMATransferCmd(SPI_TypeDef* SPIx, uint16_t SPI_LastDMATransfer)
mbed_official	76:aeb1df146756	1037	{
mbed_official	76:aeb1df146756	1038	/* Check the parameters */
mbed_official	76:aeb1df146756	1039	assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official	76:aeb1df146756	1040	assert_param(IS_SPI_LAST_DMA_TRANSFER(SPI_LastDMATransfer));
mbed_official	76:aeb1df146756	1041
mbed_official	76:aeb1df146756	1042	/* Clear LDMA_TX and LDMA_RX bits */
mbed_official	76:aeb1df146756	1043	SPIx->CR2 &= CR2_LDMA_MASK;
mbed_official	76:aeb1df146756	1044
mbed_official	76:aeb1df146756	1045	/* Set new LDMA_TX and LDMA_RX bits value */
mbed_official	76:aeb1df146756	1046	SPIx->CR2 \|= SPI_LastDMATransfer;
mbed_official	76:aeb1df146756	1047	}
mbed_official	76:aeb1df146756	1048
mbed_official	76:aeb1df146756	1049	/**
mbed_official	76:aeb1df146756	1050	* @}
mbed_official	76:aeb1df146756	1051	*/
mbed_official	76:aeb1df146756	1052
mbed_official	76:aeb1df146756	1053	/** @defgroup SPI_Group5 Interrupts and flags management functions
mbed_official	76:aeb1df146756	1054	* @brief Interrupts and flags management functions
mbed_official	76:aeb1df146756	1055	*
mbed_official	76:aeb1df146756	1056	@verbatim
mbed_official	76:aeb1df146756	1057	===============================================================================
mbed_official	76:aeb1df146756	1058	##### Interrupts and flags management functions #####
mbed_official	76:aeb1df146756	1059	===============================================================================
mbed_official	76:aeb1df146756	1060	[..] This section provides a set of functions allowing to configure the SPI/I2S Interrupts
mbed_official	76:aeb1df146756	1061	sources and check or clear the flags or pending bits status.
mbed_official	76:aeb1df146756	1062	The user should identify which mode will be used in his application to manage
mbed_official	76:aeb1df146756	1063	the communication: Polling mode, Interrupt mode or DMA mode.
mbed_official	76:aeb1df146756	1064
mbed_official	76:aeb1df146756	1065	* Polling Mode *
mbed_official	76:aeb1df146756	1066	====================
mbed_official	76:aeb1df146756	1067	[..] In Polling Mode, the SPI/I2S communication can be managed by 9 flags:
mbed_official	76:aeb1df146756	1068	(#) SPI_I2S_FLAG_TXE : to indicate the status of the transmit buffer register
mbed_official	76:aeb1df146756	1069	(#) SPI_I2S_FLAG_RXNE : to indicate the status of the receive buffer register
mbed_official	76:aeb1df146756	1070	(#) SPI_I2S_FLAG_BSY : to indicate the state of the communication layer of the SPI.
mbed_official	76:aeb1df146756	1071	(#) SPI_FLAG_CRCERR : to indicate if a CRC Calculation error occur
mbed_official	76:aeb1df146756	1072	(#) SPI_FLAG_MODF : to indicate if a Mode Fault error occur
mbed_official	76:aeb1df146756	1073	(#) SPI_I2S_FLAG_OVR : to indicate if an Overrun error occur
mbed_official	76:aeb1df146756	1074	(#) SPI_I2S_FLAG_FRE: to indicate a Frame Format error occurs.
mbed_official	76:aeb1df146756	1075	(#) I2S_FLAG_UDR: to indicate an Underrun error occurs.
mbed_official	76:aeb1df146756	1076	(#) I2S_FLAG_CHSIDE: to indicate Channel Side.
mbed_official	76:aeb1df146756	1077
mbed_official	76:aeb1df146756	1078	[..]
mbed_official	76:aeb1df146756	1079	(@)Do not use the BSY flag to handle each data transmission or reception. It is better
mbed_official	76:aeb1df146756	1080	to use the TXE and RXNE flags instead.
mbed_official	76:aeb1df146756	1081
mbed_official	76:aeb1df146756	1082	[..] In this Mode it is advised to use the following functions:
mbed_official	76:aeb1df146756	1083	(+) FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
mbed_official	76:aeb1df146756	1084	(+) void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
mbed_official	76:aeb1df146756	1085
mbed_official	76:aeb1df146756	1086	* Interrupt Mode *
mbed_official	76:aeb1df146756	1087	======================
mbed_official	76:aeb1df146756	1088	[..] In Interrupt Mode, the SPI/I2S communication can be managed by 3 interrupt sources
mbed_official	76:aeb1df146756	1089	and 5 pending bits:
mbed_official	76:aeb1df146756	1090	[..] Pending Bits:
mbed_official	76:aeb1df146756	1091	(#) SPI_I2S_IT_TXE : to indicate the status of the transmit buffer register
mbed_official	76:aeb1df146756	1092	(#) SPI_I2S_IT_RXNE : to indicate the status of the receive buffer register
mbed_official	76:aeb1df146756	1093	(#) SPI_I2S_IT_OVR : to indicate if an Overrun error occur
mbed_official	76:aeb1df146756	1094	(#) I2S_IT_UDR : to indicate an Underrun Error occurs.
mbed_official	76:aeb1df146756	1095	(#) SPI_I2S_FLAG_FRE : to indicate a Frame Format error occurs.
mbed_official	76:aeb1df146756	1096
mbed_official	76:aeb1df146756	1097	[..] Interrupt Source:
mbed_official	76:aeb1df146756	1098	(#) SPI_I2S_IT_TXE: specifies the interrupt source for the Tx buffer empty
mbed_official	76:aeb1df146756	1099	interrupt.
mbed_official	76:aeb1df146756	1100	(#) SPI_I2S_IT_RXNE : specifies the interrupt source for the Rx buffer not
mbed_official	76:aeb1df146756	1101	empty interrupt.
mbed_official	76:aeb1df146756	1102	(#) SPI_I2S_IT_ERR : specifies the interrupt source for the errors interrupt.
mbed_official	76:aeb1df146756	1103
mbed_official	76:aeb1df146756	1104	[..] In this Mode it is advised to use the following functions:
mbed_official	76:aeb1df146756	1105	(+) void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState);
mbed_official	76:aeb1df146756	1106	(+) ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);
mbed_official	76:aeb1df146756	1107
mbed_official	76:aeb1df146756	1108	* FIFO Status *
mbed_official	76:aeb1df146756	1109	===================
mbed_official	76:aeb1df146756	1110	[..] It is possible to monitor the FIFO status when a transfer is ongoing using the
mbed_official	76:aeb1df146756	1111	following function:
mbed_official	76:aeb1df146756	1112	(+) uint32_t SPI_GetFIFOStatus(uint8_t SPI_FIFO_Direction);
mbed_official	76:aeb1df146756	1113
mbed_official	76:aeb1df146756	1114	* DMA Mode *
mbed_official	76:aeb1df146756	1115	================
mbed_official	76:aeb1df146756	1116	[..] In DMA Mode, the SPI communication can be managed by 2 DMA Channel
mbed_official	76:aeb1df146756	1117	requests:
mbed_official	76:aeb1df146756	1118	(#) SPI_I2S_DMAReq_Tx: specifies the Tx buffer DMA transfer request.
mbed_official	76:aeb1df146756	1119	(#) SPI_I2S_DMAReq_Rx: specifies the Rx buffer DMA transfer request.
mbed_official	76:aeb1df146756	1120
mbed_official	76:aeb1df146756	1121	[..] In this Mode it is advised to use the following function:
mbed_official	76:aeb1df146756	1122	(+) void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState).
mbed_official	76:aeb1df146756	1123
mbed_official	76:aeb1df146756	1124	@endverbatim
mbed_official	76:aeb1df146756	1125	* @{
mbed_official	76:aeb1df146756	1126	*/
mbed_official	76:aeb1df146756	1127
mbed_official	76:aeb1df146756	1128	/**
mbed_official	76:aeb1df146756	1129	* @brief Enables or disables the specified SPI/I2S interrupts.
mbed_official	76:aeb1df146756	1130	* @param SPIx: where x can be 1 or 2 in SPI mode or 1 in I2S mode to select
mbed_official	76:aeb1df146756	1131	* the SPI peripheral.
mbed_official	76:aeb1df146756	1132	* @note SPI2 is not available for STM32F031 devices.
mbed_official	76:aeb1df146756	1133	* I2S mode is not supported for STM32F030 devices.
mbed_official	76:aeb1df146756	1134	* @param SPI_I2S_IT: specifies the SPI interrupt source to be enabled or disabled.
mbed_official	76:aeb1df146756	1135	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1136	* @arg SPI_I2S_IT_TXE: Tx buffer empty interrupt mask
mbed_official	76:aeb1df146756	1137	* @arg SPI_I2S_IT_RXNE: Rx buffer not empty interrupt mask
mbed_official	76:aeb1df146756	1138	* @arg SPI_I2S_IT_ERR: Error interrupt mask
mbed_official	76:aeb1df146756	1139	* @param NewState: new state of the specified SPI interrupt.
mbed_official	76:aeb1df146756	1140	* This parameter can be: ENABLE or DISABLE.
mbed_official	76:aeb1df146756	1141	* @retval None
mbed_official	76:aeb1df146756	1142	*/
mbed_official	76:aeb1df146756	1143	void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState)
mbed_official	76:aeb1df146756	1144	{
mbed_official	76:aeb1df146756	1145	uint16_t itpos = 0, itmask = 0 ;
mbed_official	76:aeb1df146756	1146
mbed_official	76:aeb1df146756	1147	/* Check the parameters */
mbed_official	76:aeb1df146756	1148	assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official	76:aeb1df146756	1149	assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official	76:aeb1df146756	1150	assert_param(IS_SPI_I2S_CONFIG_IT(SPI_I2S_IT));
mbed_official	76:aeb1df146756	1151
mbed_official	76:aeb1df146756	1152	/* Get the SPI IT index */
mbed_official	76:aeb1df146756	1153	itpos = SPI_I2S_IT >> 4;
mbed_official	76:aeb1df146756	1154
mbed_official	76:aeb1df146756	1155	/* Set the IT mask */
mbed_official	76:aeb1df146756	1156	itmask = (uint16_t)1 << (uint16_t)itpos;
mbed_official	76:aeb1df146756	1157
mbed_official	76:aeb1df146756	1158	if (NewState != DISABLE)
mbed_official	76:aeb1df146756	1159	{
mbed_official	76:aeb1df146756	1160	/* Enable the selected SPI interrupt */
mbed_official	76:aeb1df146756	1161	SPIx->CR2 \|= itmask;
mbed_official	76:aeb1df146756	1162	}
mbed_official	76:aeb1df146756	1163	else
mbed_official	76:aeb1df146756	1164	{
mbed_official	76:aeb1df146756	1165	/* Disable the selected SPI interrupt */
mbed_official	76:aeb1df146756	1166	SPIx->CR2 &= (uint16_t)~itmask;
mbed_official	76:aeb1df146756	1167	}
mbed_official	76:aeb1df146756	1168	}
mbed_official	76:aeb1df146756	1169
mbed_official	76:aeb1df146756	1170	/**
mbed_official	76:aeb1df146756	1171	* @brief Returns the current SPIx Transmission FIFO filled level.
mbed_official	76:aeb1df146756	1172	* @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
mbed_official	76:aeb1df146756	1173	* @note SPI2 is not available for STM32F031 devices.
mbed_official	76:aeb1df146756	1174	* @retval The Transmission FIFO filling state.
mbed_official	76:aeb1df146756	1175	* - SPI_TransmissionFIFOStatus_Empty: when FIFO is empty
mbed_official	76:aeb1df146756	1176	* - SPI_TransmissionFIFOStatus_1QuarterFull: if more than 1 quarter-full.
mbed_official	76:aeb1df146756	1177	* - SPI_TransmissionFIFOStatus_HalfFull: if more than 1 half-full.
mbed_official	76:aeb1df146756	1178	* - SPI_TransmissionFIFOStatus_Full: when FIFO is full.
mbed_official	76:aeb1df146756	1179	*/
mbed_official	76:aeb1df146756	1180	uint16_t SPI_GetTransmissionFIFOStatus(SPI_TypeDef* SPIx)
mbed_official	76:aeb1df146756	1181	{
mbed_official	76:aeb1df146756	1182	/* Get the SPIx Transmission FIFO level bits */
mbed_official	76:aeb1df146756	1183	return (uint16_t)((SPIx->SR & SPI_SR_FTLVL));
mbed_official	76:aeb1df146756	1184	}
mbed_official	76:aeb1df146756	1185
mbed_official	76:aeb1df146756	1186	/**
mbed_official	76:aeb1df146756	1187	* @brief Returns the current SPIx Reception FIFO filled level.
mbed_official	76:aeb1df146756	1188	* @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
mbed_official	76:aeb1df146756	1189	* @note SPI2 is not available for STM32F031 devices.
mbed_official	76:aeb1df146756	1190	* @retval The Reception FIFO filling state.
mbed_official	76:aeb1df146756	1191	* - SPI_ReceptionFIFOStatus_Empty: when FIFO is empty
mbed_official	76:aeb1df146756	1192	* - SPI_ReceptionFIFOStatus_1QuarterFull: if more than 1 quarter-full.
mbed_official	76:aeb1df146756	1193	* - SPI_ReceptionFIFOStatus_HalfFull: if more than 1 half-full.
mbed_official	76:aeb1df146756	1194	* - SPI_ReceptionFIFOStatus_Full: when FIFO is full.
mbed_official	76:aeb1df146756	1195	*/
mbed_official	76:aeb1df146756	1196	uint16_t SPI_GetReceptionFIFOStatus(SPI_TypeDef* SPIx)
mbed_official	76:aeb1df146756	1197	{
mbed_official	76:aeb1df146756	1198	/* Get the SPIx Reception FIFO level bits */
mbed_official	76:aeb1df146756	1199	return (uint16_t)((SPIx->SR & SPI_SR_FRLVL));
mbed_official	76:aeb1df146756	1200	}
mbed_official	76:aeb1df146756	1201
mbed_official	76:aeb1df146756	1202	/**
mbed_official	76:aeb1df146756	1203	* @brief Checks whether the specified SPI flag is set or not.
mbed_official	76:aeb1df146756	1204	* @param SPIx: where x can be 1 or 2 in SPI mode or 1 in I2S mode to select
mbed_official	76:aeb1df146756	1205	* the SPI peripheral.
mbed_official	76:aeb1df146756	1206	* @note SPI2 is not available for STM32F031 devices.
mbed_official	76:aeb1df146756	1207	* I2S mode is not supported for STM32F030 devices.
mbed_official	76:aeb1df146756	1208	* @param SPI_I2S_FLAG: specifies the SPI flag to check.
mbed_official	76:aeb1df146756	1209	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1210	* @arg SPI_I2S_FLAG_TXE: Transmit buffer empty flag.
mbed_official	76:aeb1df146756	1211	* @arg SPI_I2S_FLAG_RXNE: Receive buffer not empty flag.
mbed_official	76:aeb1df146756	1212	* @arg SPI_I2S_FLAG_BSY: Busy flag.
mbed_official	76:aeb1df146756	1213	* @arg SPI_I2S_FLAG_OVR: Overrun flag.
mbed_official	76:aeb1df146756	1214	* @arg SPI_FLAG_MODF: Mode Fault flag.
mbed_official	76:aeb1df146756	1215	* @arg SPI_FLAG_CRCERR: CRC Error flag.
mbed_official	76:aeb1df146756	1216	* @arg SPI_I2S_FLAG_FRE: TI frame format error flag.
mbed_official	76:aeb1df146756	1217	* @arg I2S_FLAG_UDR: Underrun Error flag.
mbed_official	76:aeb1df146756	1218	* @arg I2S_FLAG_CHSIDE: Channel Side flag.
mbed_official	76:aeb1df146756	1219	* @retval The new state of SPI_I2S_FLAG (SET or RESET).
mbed_official	76:aeb1df146756	1220	*/
mbed_official	76:aeb1df146756	1221	FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG)
mbed_official	76:aeb1df146756	1222	{
mbed_official	76:aeb1df146756	1223	FlagStatus bitstatus = RESET;
mbed_official	76:aeb1df146756	1224	/* Check the parameters */
mbed_official	76:aeb1df146756	1225	assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official	76:aeb1df146756	1226	assert_param(IS_SPI_I2S_GET_FLAG(SPI_I2S_FLAG));
mbed_official	76:aeb1df146756	1227
mbed_official	76:aeb1df146756	1228	/* Check the status of the specified SPI flag */
mbed_official	76:aeb1df146756	1229	if ((SPIx->SR & SPI_I2S_FLAG) != (uint16_t)RESET)
mbed_official	76:aeb1df146756	1230	{
mbed_official	76:aeb1df146756	1231	/* SPI_I2S_FLAG is set */
mbed_official	76:aeb1df146756	1232	bitstatus = SET;
mbed_official	76:aeb1df146756	1233	}
mbed_official	76:aeb1df146756	1234	else
mbed_official	76:aeb1df146756	1235	{
mbed_official	76:aeb1df146756	1236	/* SPI_I2S_FLAG is reset */
mbed_official	76:aeb1df146756	1237	bitstatus = RESET;
mbed_official	76:aeb1df146756	1238	}
mbed_official	76:aeb1df146756	1239	/* Return the SPI_I2S_FLAG status */
mbed_official	76:aeb1df146756	1240	return bitstatus;
mbed_official	76:aeb1df146756	1241	}
mbed_official	76:aeb1df146756	1242
mbed_official	76:aeb1df146756	1243	/**
mbed_official	76:aeb1df146756	1244	* @brief Clears the SPIx CRC Error (CRCERR) flag.
mbed_official	76:aeb1df146756	1245	* @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
mbed_official	76:aeb1df146756	1246	* @note SPI2 is not available for STM32F031 devices.
mbed_official	76:aeb1df146756	1247	* I2S mode is not supported for STM32F030 devices.
mbed_official	76:aeb1df146756	1248	* @param SPI_I2S_FLAG: specifies the SPI flag to clear.
mbed_official	76:aeb1df146756	1249	* This function clears only CRCERR flag.
mbed_official	76:aeb1df146756	1250	* @note OVR (OverRun error) flag is cleared by software sequence: a read
mbed_official	76:aeb1df146756	1251	* operation to SPI_DR register (SPI_I2S_ReceiveData()) followed by
mbed_official	76:aeb1df146756	1252	* a read operation to SPI_SR register (SPI_I2S_GetFlagStatus()).
mbed_official	76:aeb1df146756	1253	* @note MODF (Mode Fault) flag is cleared by software sequence: a read/write
mbed_official	76:aeb1df146756	1254	* operation to SPI_SR register (SPI_I2S_GetFlagStatus()) followed by
mbed_official	76:aeb1df146756	1255	* a write operation to SPI_CR1 register (SPI_Cmd() to enable the SPI).
mbed_official	76:aeb1df146756	1256	* @retval None
mbed_official	76:aeb1df146756	1257	*/
mbed_official	76:aeb1df146756	1258	void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG)
mbed_official	76:aeb1df146756	1259	{
mbed_official	76:aeb1df146756	1260	/* Check the parameters */
mbed_official	76:aeb1df146756	1261	assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official	76:aeb1df146756	1262	assert_param(IS_SPI_CLEAR_FLAG(SPI_I2S_FLAG));
mbed_official	76:aeb1df146756	1263
mbed_official	76:aeb1df146756	1264	/* Clear the selected SPI CRC Error (CRCERR) flag */
mbed_official	76:aeb1df146756	1265	SPIx->SR = (uint16_t)~SPI_I2S_FLAG;
mbed_official	76:aeb1df146756	1266	}
mbed_official	76:aeb1df146756	1267
mbed_official	76:aeb1df146756	1268	/**
mbed_official	76:aeb1df146756	1269	* @brief Checks whether the specified SPI/I2S interrupt has occurred or not.
mbed_official	76:aeb1df146756	1270	* @param SPIx: where x can be 1 or 2 in SPI mode or 1 in I2S mode to select
mbed_official	76:aeb1df146756	1271	* the SPI peripheral.
mbed_official	76:aeb1df146756	1272	* @param SPI_I2S_IT: specifies the SPI interrupt source to check.
mbed_official	76:aeb1df146756	1273	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1274	* @arg SPI_I2S_IT_TXE: Transmit buffer empty interrupt.
mbed_official	76:aeb1df146756	1275	* @arg SPI_I2S_IT_RXNE: Receive buffer not empty interrupt.
mbed_official	76:aeb1df146756	1276	* @arg SPI_IT_MODF: Mode Fault interrupt.
mbed_official	76:aeb1df146756	1277	* @arg SPI_I2S_IT_OVR: Overrun interrupt.
mbed_official	76:aeb1df146756	1278	* @arg I2S_IT_UDR: Underrun interrupt.
mbed_official	76:aeb1df146756	1279	* @arg SPI_I2S_IT_FRE: Format Error interrupt.
mbed_official	76:aeb1df146756	1280	* @retval The new state of SPI_I2S_IT (SET or RESET).
mbed_official	76:aeb1df146756	1281	*/
mbed_official	76:aeb1df146756	1282	ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT)
mbed_official	76:aeb1df146756	1283	{
mbed_official	76:aeb1df146756	1284	ITStatus bitstatus = RESET;
mbed_official	76:aeb1df146756	1285	uint16_t itpos = 0, itmask = 0, enablestatus = 0;
mbed_official	76:aeb1df146756	1286
mbed_official	76:aeb1df146756	1287	/* Check the parameters */
mbed_official	76:aeb1df146756	1288	assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official	76:aeb1df146756	1289	assert_param(IS_SPI_I2S_GET_IT(SPI_I2S_IT));
mbed_official	76:aeb1df146756	1290
mbed_official	76:aeb1df146756	1291	/* Get the SPI_I2S_IT index */
mbed_official	76:aeb1df146756	1292	itpos = 0x01 << (SPI_I2S_IT & 0x0F);
mbed_official	76:aeb1df146756	1293
mbed_official	76:aeb1df146756	1294	/* Get the SPI_I2S_IT IT mask */
mbed_official	76:aeb1df146756	1295	itmask = SPI_I2S_IT >> 4;
mbed_official	76:aeb1df146756	1296
mbed_official	76:aeb1df146756	1297	/* Set the IT mask */
mbed_official	76:aeb1df146756	1298	itmask = 0x01 << itmask;
mbed_official	76:aeb1df146756	1299
mbed_official	76:aeb1df146756	1300	/* Get the SPI_I2S_IT enable bit status */
mbed_official	76:aeb1df146756	1301	enablestatus = (SPIx->CR2 & itmask) ;
mbed_official	76:aeb1df146756	1302
mbed_official	76:aeb1df146756	1303	/* Check the status of the specified SPI interrupt */
mbed_official	76:aeb1df146756	1304	if (((SPIx->SR & itpos) != (uint16_t)RESET) && enablestatus)
mbed_official	76:aeb1df146756	1305	{
mbed_official	76:aeb1df146756	1306	/* SPI_I2S_IT is set */
mbed_official	76:aeb1df146756	1307	bitstatus = SET;
mbed_official	76:aeb1df146756	1308	}
mbed_official	76:aeb1df146756	1309	else
mbed_official	76:aeb1df146756	1310	{
mbed_official	76:aeb1df146756	1311	/* SPI_I2S_IT is reset */
mbed_official	76:aeb1df146756	1312	bitstatus = RESET;
mbed_official	76:aeb1df146756	1313	}
mbed_official	76:aeb1df146756	1314	/* Return the SPI_I2S_IT status */
mbed_official	76:aeb1df146756	1315	return bitstatus;
mbed_official	76:aeb1df146756	1316	}
mbed_official	76:aeb1df146756	1317
mbed_official	76:aeb1df146756	1318	/**
mbed_official	76:aeb1df146756	1319	* @}
mbed_official	76:aeb1df146756	1320	*/
mbed_official	76:aeb1df146756	1321
mbed_official	76:aeb1df146756	1322	/**
mbed_official	76:aeb1df146756	1323	* @}
mbed_official	76:aeb1df146756	1324	*/
mbed_official	76:aeb1df146756	1325
mbed_official	76:aeb1df146756	1326	/**
mbed_official	76:aeb1df146756	1327	* @}
mbed_official	76:aeb1df146756	1328	*/
mbed_official	76:aeb1df146756	1329
mbed_official	76:aeb1df146756	1330	/**
mbed_official	76:aeb1df146756	1331	* @}
mbed_official	76:aeb1df146756	1332	*/
mbed_official	76:aeb1df146756	1333
mbed_official	76:aeb1df146756	1334	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Type:	Library
Created:	08 Mar 2014
Imports:	301
Forks:	0
Commits:	115
Dependents:	0
Dependencies:	0
Followers:	15
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targets/cmsis/TARGET_STM/TARGET_NUCLEO_F030R8/stm32f0xx_spi.c@76:aeb1df146756, 2014-01-27 (annotated)

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