mbed library with additional peripherals for ST F401 board

Fork of mbed-src by mbed official

This mbed LIB has additional peripherals for ST F401 board

  • UART2 : PA_3 rx, PA_2 tx
  • UART3 : PC_7 rx, PC_6 tx
  • I2C2 : PB_3 SDA, PB_10 SCL
  • I2C3 : PB_4 SDA, PA_8 SCL
Committer:
mbed_official
Date:
Fri Dec 13 09:30:05 2013 +0000
Revision:
58:3b55b7a41411
Parent:
52:a51c77007319
Child:
70:c1fbde68b492
Synchronized with git revision da605b82a5ca02e18b987f366969d615bec94035

Full URL: https://github.com/mbedmicro/mbed/commit/da605b82a5ca02e18b987f366969d615bec94035/

[NUCLEO_F103RB] Update PWM IOs used + I2C cleanup

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 52:a51c77007319 1 /* mbed Microcontroller Library
mbed_official 52:a51c77007319 2 * Copyright (c) 2006-2013 ARM Limited
mbed_official 52:a51c77007319 3 *
mbed_official 52:a51c77007319 4 * Licensed under the Apache License, Version 2.0 (the "License");
mbed_official 52:a51c77007319 5 * you may not use this file except in compliance with the License.
mbed_official 52:a51c77007319 6 * You may obtain a copy of the License at
mbed_official 52:a51c77007319 7 *
mbed_official 52:a51c77007319 8 * http://www.apache.org/licenses/LICENSE-2.0
mbed_official 52:a51c77007319 9 *
mbed_official 52:a51c77007319 10 * Unless required by applicable law or agreed to in writing, software
mbed_official 52:a51c77007319 11 * distributed under the License is distributed on an "AS IS" BASIS,
mbed_official 52:a51c77007319 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
mbed_official 52:a51c77007319 13 * See the License for the specific language governing permissions and
mbed_official 52:a51c77007319 14 * limitations under the License.
mbed_official 52:a51c77007319 15 */
mbed_official 52:a51c77007319 16 #include "pinmap.h"
mbed_official 52:a51c77007319 17 #include "error.h"
mbed_official 52:a51c77007319 18
mbed_official 52:a51c77007319 19 // Alternate-function mapping
mbed_official 52:a51c77007319 20 static const uint32_t AF_mapping[] = {
mbed_official 58:3b55b7a41411 21 0, // 0 = No AF
mbed_official 58:3b55b7a41411 22 GPIO_Remap_SPI1, // 1
mbed_official 58:3b55b7a41411 23 GPIO_Remap_I2C1, // 2
mbed_official 58:3b55b7a41411 24 GPIO_Remap_USART1, // 3
mbed_official 58:3b55b7a41411 25 GPIO_Remap_USART2, // 4
mbed_official 58:3b55b7a41411 26 GPIO_FullRemap_TIM2, // 5
mbed_official 58:3b55b7a41411 27 GPIO_FullRemap_TIM3, // 6
mbed_official 58:3b55b7a41411 28 GPIO_PartialRemap_TIM3, // 7
mbed_official 58:3b55b7a41411 29 GPIO_Remap_I2C1 // 8
mbed_official 52:a51c77007319 30 };
mbed_official 52:a51c77007319 31
mbed_official 52:a51c77007319 32 /**
mbed_official 52:a51c77007319 33 * Set the pin function (input, output, alternate function or analog) + output speed + AF
mbed_official 52:a51c77007319 34 */
mbed_official 52:a51c77007319 35 void pin_function(PinName pin, int data) {
mbed_official 52:a51c77007319 36 if (pin == NC) return;
mbed_official 52:a51c77007319 37
mbed_official 52:a51c77007319 38 // Get the pin mode and alternate-function number
mbed_official 52:a51c77007319 39 uint32_t mode = STM_PIN_MODE(data);
mbed_official 52:a51c77007319 40 uint32_t afnum = STM_PIN_AFNUM(data);
mbed_official 52:a51c77007319 41
mbed_official 52:a51c77007319 42 // Get GPIO structure base address
mbed_official 52:a51c77007319 43 uint32_t pin_number = (uint32_t)pin;
mbed_official 52:a51c77007319 44 uint32_t pin_index = (pin_number & 0xF);
mbed_official 52:a51c77007319 45 uint32_t port_index = (pin_number >> 4);
mbed_official 52:a51c77007319 46 GPIO_TypeDef *gpio = ((GPIO_TypeDef *)(GPIOA_BASE + (port_index << 10)));
mbed_official 52:a51c77007319 47
mbed_official 52:a51c77007319 48 // Enable GPIO and AFIO clocks
mbed_official 52:a51c77007319 49 RCC_APB2PeriphClockCmd((uint32_t)(RCC_APB2Periph_GPIOA << port_index), ENABLE);
mbed_official 52:a51c77007319 50 RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE);
mbed_official 52:a51c77007319 51
mbed_official 52:a51c77007319 52 // Configure GPIO
mbed_official 52:a51c77007319 53 GPIO_InitTypeDef GPIO_InitStructure;
mbed_official 52:a51c77007319 54 GPIO_InitStructure.GPIO_Pin = (uint16_t)(1 << pin_index);
mbed_official 52:a51c77007319 55 GPIO_InitStructure.GPIO_Mode = (GPIOMode_TypeDef)mode;
mbed_official 52:a51c77007319 56 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
mbed_official 52:a51c77007319 57 GPIO_Init(gpio, &GPIO_InitStructure);
mbed_official 52:a51c77007319 58
mbed_official 52:a51c77007319 59 // Configure Alternate Function
mbed_official 52:a51c77007319 60 if (afnum > 0) {
mbed_official 52:a51c77007319 61 GPIO_PinRemapConfig(AF_mapping[afnum], ENABLE);
mbed_official 52:a51c77007319 62 }
mbed_official 52:a51c77007319 63
mbed_official 52:a51c77007319 64 // Disconnect JTAG-DP + SW-DP signals.
mbed_official 52:a51c77007319 65 // Warning: Need to reconnect under reset
mbed_official 52:a51c77007319 66 if ((pin == PA_13) || (pin == PA_14)) {
mbed_official 52:a51c77007319 67 GPIO_PinRemapConfig(GPIO_Remap_SWJ_Disable, ENABLE);
mbed_official 52:a51c77007319 68 }
mbed_official 52:a51c77007319 69 if ((pin == PA_15) || (pin == PB_3) || (pin == PB_4)) {
mbed_official 52:a51c77007319 70 GPIO_PinRemapConfig(GPIO_Remap_SWJ_JTAGDisable, ENABLE);
mbed_official 52:a51c77007319 71 }
mbed_official 52:a51c77007319 72 }
mbed_official 52:a51c77007319 73
mbed_official 52:a51c77007319 74 /**
mbed_official 52:a51c77007319 75 * Set the pin mode (open-drain/push-pull + pull-up/pull-down)
mbed_official 52:a51c77007319 76 */
mbed_official 52:a51c77007319 77 void pin_mode(PinName pin, PinMode mode) {
mbed_official 52:a51c77007319 78 if (pin == NC) return;
mbed_official 52:a51c77007319 79
mbed_official 52:a51c77007319 80 GPIO_InitTypeDef GPIO_InitStructure;
mbed_official 52:a51c77007319 81
mbed_official 52:a51c77007319 82 // Get GPIO structure base address
mbed_official 52:a51c77007319 83 uint32_t pin_number = (uint32_t)pin;
mbed_official 52:a51c77007319 84 uint32_t pin_index = (pin_number & 0xF);
mbed_official 52:a51c77007319 85 uint32_t port_index = (pin_number >> 4);
mbed_official 52:a51c77007319 86 GPIO_TypeDef *gpio = ((GPIO_TypeDef *)(GPIOA_BASE + (port_index << 10)));
mbed_official 52:a51c77007319 87
mbed_official 52:a51c77007319 88 // Enable GPIO clock
mbed_official 52:a51c77007319 89 RCC_APB2PeriphClockCmd((uint32_t)(RCC_APB2Periph_GPIOA << port_index), ENABLE);
mbed_official 52:a51c77007319 90
mbed_official 52:a51c77007319 91 // Configure open-drain and pull-up/down
mbed_official 52:a51c77007319 92 switch (mode) {
mbed_official 52:a51c77007319 93 case PullNone:
mbed_official 52:a51c77007319 94 return;
mbed_official 52:a51c77007319 95 case PullUp:
mbed_official 52:a51c77007319 96 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU;
mbed_official 52:a51c77007319 97 break;
mbed_official 52:a51c77007319 98 case PullDown:
mbed_official 52:a51c77007319 99 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPD;
mbed_official 52:a51c77007319 100 break;
mbed_official 52:a51c77007319 101 case OpenDrain:
mbed_official 52:a51c77007319 102 if (pin_index < 8) {
mbed_official 52:a51c77007319 103 if ((gpio->CRL & (0x03 << (pin_index * 4))) > 0) { // MODE bits = Output mode
mbed_official 52:a51c77007319 104 gpio->CRL |= (0x04 << (pin_index * 4)); // Set open-drain
mbed_official 52:a51c77007319 105 }
mbed_official 52:a51c77007319 106 }
mbed_official 52:a51c77007319 107 else {
mbed_official 52:a51c77007319 108 if ((gpio->CRH & (0x03 << ((pin_index % 8) * 4))) > 0) { // MODE bits = Output mode
mbed_official 52:a51c77007319 109 gpio->CRH |= (0x04 << ((pin_index % 8) * 4)); // Set open-drain
mbed_official 52:a51c77007319 110 }
mbed_official 52:a51c77007319 111 }
mbed_official 52:a51c77007319 112 return;
mbed_official 52:a51c77007319 113 default:
mbed_official 52:a51c77007319 114 break;
mbed_official 52:a51c77007319 115 }
mbed_official 52:a51c77007319 116
mbed_official 52:a51c77007319 117 // Configure GPIO
mbed_official 52:a51c77007319 118 GPIO_InitStructure.GPIO_Pin = (uint16_t)(1 << pin_index);
mbed_official 52:a51c77007319 119 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
mbed_official 52:a51c77007319 120 GPIO_Init(gpio, &GPIO_InitStructure);
mbed_official 52:a51c77007319 121 }