Matt Lloyd
/
DMA_UART_example
Example of UART-DMA transfers taken form the npx cmsis driver libary
uart_dma_test.c@0:7480abd3b63b, 2010-09-30 (annotated)
- Committer:
- dpslwk
- Date:
- Thu Sep 30 20:13:24 2010 +0000
- Revision:
- 0:7480abd3b63b
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
dpslwk | 0:7480abd3b63b | 1 | /***********************************************************************//** |
dpslwk | 0:7480abd3b63b | 2 | * tweaked by dps.lwk to work with mbed's online complier |
dpslwk | 0:7480abd3b63b | 3 | * 30/09/2010 |
dpslwk | 0:7480abd3b63b | 4 | **********************************************************************/ |
dpslwk | 0:7480abd3b63b | 5 | |
dpslwk | 0:7480abd3b63b | 6 | /***********************************************************************//** |
dpslwk | 0:7480abd3b63b | 7 | * @file uart_dma_test.c |
dpslwk | 0:7480abd3b63b | 8 | * @purpose This example describes how to using UART in DMA mode |
dpslwk | 0:7480abd3b63b | 9 | * @version 2.0 |
dpslwk | 0:7480abd3b63b | 10 | * @date 21. May. 2010 |
dpslwk | 0:7480abd3b63b | 11 | * @author NXP MCU SW Application Team |
dpslwk | 0:7480abd3b63b | 12 | *--------------------------------------------------------------------- |
dpslwk | 0:7480abd3b63b | 13 | * Software that is described herein is for illustrative purposes only |
dpslwk | 0:7480abd3b63b | 14 | * which provides customers with programming information regarding the |
dpslwk | 0:7480abd3b63b | 15 | * products. This software is supplied "AS IS" without any warranties. |
dpslwk | 0:7480abd3b63b | 16 | * NXP Semiconductors assumes no responsibility or liability for the |
dpslwk | 0:7480abd3b63b | 17 | * use of the software, conveys no license or title under any patent, |
dpslwk | 0:7480abd3b63b | 18 | * copyright, or mask work right to the product. NXP Semiconductors |
dpslwk | 0:7480abd3b63b | 19 | * reserves the right to make changes in the software without |
dpslwk | 0:7480abd3b63b | 20 | * notification. NXP Semiconductors also make no representation or |
dpslwk | 0:7480abd3b63b | 21 | * warranty that such application will be suitable for the specified |
dpslwk | 0:7480abd3b63b | 22 | * use without further testing or modification. |
dpslwk | 0:7480abd3b63b | 23 | **********************************************************************/ |
dpslwk | 0:7480abd3b63b | 24 | #include "lpc17xx_uart.h" |
dpslwk | 0:7480abd3b63b | 25 | #include "lpc17xx_libcfg.h" |
dpslwk | 0:7480abd3b63b | 26 | #include "lpc17xx_gpdma.h" |
dpslwk | 0:7480abd3b63b | 27 | #include "lpc17xx_pinsel.h" |
dpslwk | 0:7480abd3b63b | 28 | |
dpslwk | 0:7480abd3b63b | 29 | /* Example group ----------------------------------------------------------- */ |
dpslwk | 0:7480abd3b63b | 30 | /** @defgroup UART_DMA DMA |
dpslwk | 0:7480abd3b63b | 31 | * @ingroup UART_Examples |
dpslwk | 0:7480abd3b63b | 32 | * @{ |
dpslwk | 0:7480abd3b63b | 33 | */ |
dpslwk | 0:7480abd3b63b | 34 | |
dpslwk | 0:7480abd3b63b | 35 | /************************** PRIVATE DEFINITIONS *************************/ |
dpslwk | 0:7480abd3b63b | 36 | /* Receive buffer size */ |
dpslwk | 0:7480abd3b63b | 37 | #define RX_BUF_SIZE 0x80 // ***LWK*** uped buffer to 128bytes |
dpslwk | 0:7480abd3b63b | 38 | |
dpslwk | 0:7480abd3b63b | 39 | /************************** PRIVATE VARIABLES *************************/ |
dpslwk | 0:7480abd3b63b | 40 | uint8_t menu1[] = |
dpslwk | 0:7480abd3b63b | 41 | "Hello NXP Semiconductors \n\r" |
dpslwk | 0:7480abd3b63b | 42 | "UART interrupt mode demo using ring buffer \n\r\t " |
dpslwk | 0:7480abd3b63b | 43 | "MCU LPC17xx - ARM Cortex-M3 \n\r\t " |
dpslwk | 0:7480abd3b63b | 44 | "UART0 - 9600bps \n\r" |
dpslwk | 0:7480abd3b63b | 45 | " This is a long string. It transferred in to DMA memory and transmit through Tx line \n\r" |
dpslwk | 0:7480abd3b63b | 46 | " on UART0 peripheral. To use UART with DMA mode, FIFO function must be enabled \n\r"; |
dpslwk | 0:7480abd3b63b | 47 | |
dpslwk | 0:7480abd3b63b | 48 | uint8_t menu3[] = "UART demo terminated!\n"; |
dpslwk | 0:7480abd3b63b | 49 | |
dpslwk | 0:7480abd3b63b | 50 | // Receive buffer |
dpslwk | 0:7480abd3b63b | 51 | __IO uint8_t rx_buf[RX_BUF_SIZE]; |
dpslwk | 0:7480abd3b63b | 52 | |
dpslwk | 0:7480abd3b63b | 53 | // Terminal Counter flag for Channel 0 |
dpslwk | 0:7480abd3b63b | 54 | __IO uint32_t Channel0_TC; |
dpslwk | 0:7480abd3b63b | 55 | |
dpslwk | 0:7480abd3b63b | 56 | // Error Counter flag for Channel 0 |
dpslwk | 0:7480abd3b63b | 57 | __IO uint32_t Channel0_Err; |
dpslwk | 0:7480abd3b63b | 58 | |
dpslwk | 0:7480abd3b63b | 59 | // Terminal Counter flag for Channel 1 |
dpslwk | 0:7480abd3b63b | 60 | __IO uint32_t Channel1_TC; |
dpslwk | 0:7480abd3b63b | 61 | |
dpslwk | 0:7480abd3b63b | 62 | // Error Counter flag for Channel 1 |
dpslwk | 0:7480abd3b63b | 63 | __IO uint32_t Channel1_Err; |
dpslwk | 0:7480abd3b63b | 64 | |
dpslwk | 0:7480abd3b63b | 65 | |
dpslwk | 0:7480abd3b63b | 66 | /************************** PRIVATE FUNCTIONS *************************/ |
dpslwk | 0:7480abd3b63b | 67 | extern "C" void DMA_IRQHandler (void); // ***LWK*** mbed requires IRQHandeler to be extern "C" |
dpslwk | 0:7480abd3b63b | 68 | |
dpslwk | 0:7480abd3b63b | 69 | void print_menu(void); |
dpslwk | 0:7480abd3b63b | 70 | |
dpslwk | 0:7480abd3b63b | 71 | /*----------------- INTERRUPT SERVICE ROUTINES --------------------------*/ |
dpslwk | 0:7480abd3b63b | 72 | /*********************************************************************//** |
dpslwk | 0:7480abd3b63b | 73 | * @brief GPDMA interrupt handler sub-routine |
dpslwk | 0:7480abd3b63b | 74 | * @param[in] None |
dpslwk | 0:7480abd3b63b | 75 | * @return None |
dpslwk | 0:7480abd3b63b | 76 | **********************************************************************/ |
dpslwk | 0:7480abd3b63b | 77 | void DMA_IRQHandler (void) |
dpslwk | 0:7480abd3b63b | 78 | { |
dpslwk | 0:7480abd3b63b | 79 | |
dpslwk | 0:7480abd3b63b | 80 | |
dpslwk | 0:7480abd3b63b | 81 | uint32_t tmp; |
dpslwk | 0:7480abd3b63b | 82 | // Scan interrupt pending |
dpslwk | 0:7480abd3b63b | 83 | for (tmp = 0; tmp <= 7; tmp++) { |
dpslwk | 0:7480abd3b63b | 84 | if (GPDMA_IntGetStatus(GPDMA_STAT_INT, tmp)){ |
dpslwk | 0:7480abd3b63b | 85 | // Check counter terminal status |
dpslwk | 0:7480abd3b63b | 86 | if(GPDMA_IntGetStatus(GPDMA_STAT_INTTC, tmp)){ |
dpslwk | 0:7480abd3b63b | 87 | // Clear terminate counter Interrupt pending |
dpslwk | 0:7480abd3b63b | 88 | GPDMA_ClearIntPending (GPDMA_STATCLR_INTTC, tmp); |
dpslwk | 0:7480abd3b63b | 89 | |
dpslwk | 0:7480abd3b63b | 90 | switch (tmp){ |
dpslwk | 0:7480abd3b63b | 91 | case 0: |
dpslwk | 0:7480abd3b63b | 92 | Channel0_TC++; |
dpslwk | 0:7480abd3b63b | 93 | GPDMA_ChannelCmd(0, DISABLE); |
dpslwk | 0:7480abd3b63b | 94 | break; |
dpslwk | 0:7480abd3b63b | 95 | case 1: |
dpslwk | 0:7480abd3b63b | 96 | Channel1_TC++; |
dpslwk | 0:7480abd3b63b | 97 | GPDMA_ChannelCmd(1, DISABLE); |
dpslwk | 0:7480abd3b63b | 98 | break; |
dpslwk | 0:7480abd3b63b | 99 | default: |
dpslwk | 0:7480abd3b63b | 100 | break; |
dpslwk | 0:7480abd3b63b | 101 | } |
dpslwk | 0:7480abd3b63b | 102 | |
dpslwk | 0:7480abd3b63b | 103 | } |
dpslwk | 0:7480abd3b63b | 104 | // Check error terminal status |
dpslwk | 0:7480abd3b63b | 105 | if (GPDMA_IntGetStatus(GPDMA_STAT_INTERR, tmp)){ |
dpslwk | 0:7480abd3b63b | 106 | // Clear error counter Interrupt pending |
dpslwk | 0:7480abd3b63b | 107 | GPDMA_ClearIntPending (GPDMA_STATCLR_INTERR, tmp); |
dpslwk | 0:7480abd3b63b | 108 | switch (tmp){ |
dpslwk | 0:7480abd3b63b | 109 | case 0: |
dpslwk | 0:7480abd3b63b | 110 | Channel0_Err++; |
dpslwk | 0:7480abd3b63b | 111 | GPDMA_ChannelCmd(0, DISABLE); |
dpslwk | 0:7480abd3b63b | 112 | break; |
dpslwk | 0:7480abd3b63b | 113 | case 1: |
dpslwk | 0:7480abd3b63b | 114 | Channel1_Err++; |
dpslwk | 0:7480abd3b63b | 115 | GPDMA_ChannelCmd(1, DISABLE); |
dpslwk | 0:7480abd3b63b | 116 | break; |
dpslwk | 0:7480abd3b63b | 117 | default: |
dpslwk | 0:7480abd3b63b | 118 | break; |
dpslwk | 0:7480abd3b63b | 119 | } |
dpslwk | 0:7480abd3b63b | 120 | } |
dpslwk | 0:7480abd3b63b | 121 | } |
dpslwk | 0:7480abd3b63b | 122 | } |
dpslwk | 0:7480abd3b63b | 123 | } |
dpslwk | 0:7480abd3b63b | 124 | |
dpslwk | 0:7480abd3b63b | 125 | /*-------------------------MAIN FUNCTION------------------------------*/ |
dpslwk | 0:7480abd3b63b | 126 | /*********************************************************************//** |
dpslwk | 0:7480abd3b63b | 127 | * @brief c_entry: Main UART program body |
dpslwk | 0:7480abd3b63b | 128 | * @param[in] None |
dpslwk | 0:7480abd3b63b | 129 | * @return int |
dpslwk | 0:7480abd3b63b | 130 | **********************************************************************/ |
dpslwk | 0:7480abd3b63b | 131 | int c_entry(void) |
dpslwk | 0:7480abd3b63b | 132 | { |
dpslwk | 0:7480abd3b63b | 133 | uint8_t *rx_char; |
dpslwk | 0:7480abd3b63b | 134 | uint32_t idx; |
dpslwk | 0:7480abd3b63b | 135 | // UART Configuration structure variable |
dpslwk | 0:7480abd3b63b | 136 | UART_CFG_Type UARTConfigStruct; |
dpslwk | 0:7480abd3b63b | 137 | // UART FIFO configuration Struct variable |
dpslwk | 0:7480abd3b63b | 138 | UART_FIFO_CFG_Type UARTFIFOConfigStruct; |
dpslwk | 0:7480abd3b63b | 139 | GPDMA_Channel_CFG_Type GPDMACfg; |
dpslwk | 0:7480abd3b63b | 140 | // Pin configuration for UART0 |
dpslwk | 0:7480abd3b63b | 141 | PINSEL_CFG_Type PinCfg; |
dpslwk | 0:7480abd3b63b | 142 | |
dpslwk | 0:7480abd3b63b | 143 | // ***LWK*** setup pins for debug leds |
dpslwk | 0:7480abd3b63b | 144 | LPC_GPIO1->FIODIR |= 0xb40000; |
dpslwk | 0:7480abd3b63b | 145 | LPC_GPIO1->FIOMASK = 0xff4bffff; |
dpslwk | 0:7480abd3b63b | 146 | |
dpslwk | 0:7480abd3b63b | 147 | /* |
dpslwk | 0:7480abd3b63b | 148 | * Initialize UART0 pin connect |
dpslwk | 0:7480abd3b63b | 149 | */ |
dpslwk | 0:7480abd3b63b | 150 | PinCfg.Funcnum = 1; |
dpslwk | 0:7480abd3b63b | 151 | PinCfg.OpenDrain = 0; |
dpslwk | 0:7480abd3b63b | 152 | PinCfg.Pinmode = 0; |
dpslwk | 0:7480abd3b63b | 153 | PinCfg.Pinnum = 2; |
dpslwk | 0:7480abd3b63b | 154 | PinCfg.Portnum = 0; |
dpslwk | 0:7480abd3b63b | 155 | PINSEL_ConfigPin(&PinCfg); |
dpslwk | 0:7480abd3b63b | 156 | PinCfg.Pinnum = 3; |
dpslwk | 0:7480abd3b63b | 157 | PINSEL_ConfigPin(&PinCfg); |
dpslwk | 0:7480abd3b63b | 158 | |
dpslwk | 0:7480abd3b63b | 159 | /* Initialize UART Configuration parameter structure to default state: |
dpslwk | 0:7480abd3b63b | 160 | * Baudrate = 9600bps |
dpslwk | 0:7480abd3b63b | 161 | * 8 data bit |
dpslwk | 0:7480abd3b63b | 162 | * 1 Stop bit |
dpslwk | 0:7480abd3b63b | 163 | * None parity |
dpslwk | 0:7480abd3b63b | 164 | */ |
dpslwk | 0:7480abd3b63b | 165 | UART_ConfigStructInit(&UARTConfigStruct); |
dpslwk | 0:7480abd3b63b | 166 | |
dpslwk | 0:7480abd3b63b | 167 | // Initialize UART0 peripheral with given to corresponding parameter |
dpslwk | 0:7480abd3b63b | 168 | UART_Init((LPC_UART_TypeDef *)LPC_UART0, &UARTConfigStruct); |
dpslwk | 0:7480abd3b63b | 169 | |
dpslwk | 0:7480abd3b63b | 170 | |
dpslwk | 0:7480abd3b63b | 171 | /* Initialize FIFOConfigStruct to default state: |
dpslwk | 0:7480abd3b63b | 172 | * - FIFO_DMAMode = DISABLE |
dpslwk | 0:7480abd3b63b | 173 | * - FIFO_Level = UART_FIFO_TRGLEV0 |
dpslwk | 0:7480abd3b63b | 174 | * - FIFO_ResetRxBuf = ENABLE |
dpslwk | 0:7480abd3b63b | 175 | * - FIFO_ResetTxBuf = ENABLE |
dpslwk | 0:7480abd3b63b | 176 | * - FIFO_State = ENABLE |
dpslwk | 0:7480abd3b63b | 177 | */ |
dpslwk | 0:7480abd3b63b | 178 | UART_FIFOConfigStructInit(&UARTFIFOConfigStruct); |
dpslwk | 0:7480abd3b63b | 179 | |
dpslwk | 0:7480abd3b63b | 180 | // Enable DMA mode in UART |
dpslwk | 0:7480abd3b63b | 181 | UARTFIFOConfigStruct.FIFO_DMAMode = ENABLE; |
dpslwk | 0:7480abd3b63b | 182 | |
dpslwk | 0:7480abd3b63b | 183 | // Initialize FIFO for UART0 peripheral |
dpslwk | 0:7480abd3b63b | 184 | UART_FIFOConfig((LPC_UART_TypeDef *)LPC_UART0, &UARTFIFOConfigStruct); |
dpslwk | 0:7480abd3b63b | 185 | |
dpslwk | 0:7480abd3b63b | 186 | // Enable UART Transmit |
dpslwk | 0:7480abd3b63b | 187 | UART_TxCmd((LPC_UART_TypeDef *)LPC_UART0, ENABLE); |
dpslwk | 0:7480abd3b63b | 188 | |
dpslwk | 0:7480abd3b63b | 189 | |
dpslwk | 0:7480abd3b63b | 190 | /* GPDMA Interrupt configuration section ------------------------------------------------- */ |
dpslwk | 0:7480abd3b63b | 191 | |
dpslwk | 0:7480abd3b63b | 192 | /* Initialize GPDMA controller */ |
dpslwk | 0:7480abd3b63b | 193 | GPDMA_Init(); |
dpslwk | 0:7480abd3b63b | 194 | |
dpslwk | 0:7480abd3b63b | 195 | |
dpslwk | 0:7480abd3b63b | 196 | /* Setting GPDMA interrupt */ |
dpslwk | 0:7480abd3b63b | 197 | // Disable interrupt for DMA |
dpslwk | 0:7480abd3b63b | 198 | NVIC_DisableIRQ (DMA_IRQn); |
dpslwk | 0:7480abd3b63b | 199 | /* preemption = 1, sub-priority = 1 */ |
dpslwk | 0:7480abd3b63b | 200 | NVIC_SetPriority(DMA_IRQn, ((0x01<<3)|0x01)); |
dpslwk | 0:7480abd3b63b | 201 | |
dpslwk | 0:7480abd3b63b | 202 | |
dpslwk | 0:7480abd3b63b | 203 | // Setup GPDMA channel -------------------------------- |
dpslwk | 0:7480abd3b63b | 204 | // channel 0 |
dpslwk | 0:7480abd3b63b | 205 | GPDMACfg.ChannelNum = 0; |
dpslwk | 0:7480abd3b63b | 206 | // Source memory |
dpslwk | 0:7480abd3b63b | 207 | GPDMACfg.SrcMemAddr = (uint32_t) &menu1; |
dpslwk | 0:7480abd3b63b | 208 | // Destination memory - don't care |
dpslwk | 0:7480abd3b63b | 209 | GPDMACfg.DstMemAddr = 0; |
dpslwk | 0:7480abd3b63b | 210 | // Transfer size |
dpslwk | 0:7480abd3b63b | 211 | GPDMACfg.TransferSize = sizeof(menu1); |
dpslwk | 0:7480abd3b63b | 212 | // Transfer width - don't care |
dpslwk | 0:7480abd3b63b | 213 | GPDMACfg.TransferWidth = 0; |
dpslwk | 0:7480abd3b63b | 214 | // Transfer type |
dpslwk | 0:7480abd3b63b | 215 | GPDMACfg.TransferType = GPDMA_TRANSFERTYPE_M2P; |
dpslwk | 0:7480abd3b63b | 216 | // Source connection - don't care |
dpslwk | 0:7480abd3b63b | 217 | GPDMACfg.SrcConn = 0; |
dpslwk | 0:7480abd3b63b | 218 | // Destination connection |
dpslwk | 0:7480abd3b63b | 219 | GPDMACfg.DstConn = GPDMA_CONN_UART0_Tx; |
dpslwk | 0:7480abd3b63b | 220 | // Linker List Item - unused |
dpslwk | 0:7480abd3b63b | 221 | GPDMACfg.DMALLI = 0; |
dpslwk | 0:7480abd3b63b | 222 | // Setup channel with given parameter |
dpslwk | 0:7480abd3b63b | 223 | GPDMA_Setup(&GPDMACfg); |
dpslwk | 0:7480abd3b63b | 224 | |
dpslwk | 0:7480abd3b63b | 225 | // Setup GPDMA channel -------------------------------- |
dpslwk | 0:7480abd3b63b | 226 | // channel 1 |
dpslwk | 0:7480abd3b63b | 227 | GPDMACfg.ChannelNum = 1; |
dpslwk | 0:7480abd3b63b | 228 | // Source memory - don't care |
dpslwk | 0:7480abd3b63b | 229 | GPDMACfg.SrcMemAddr = 0; |
dpslwk | 0:7480abd3b63b | 230 | // Destination memory |
dpslwk | 0:7480abd3b63b | 231 | GPDMACfg.DstMemAddr = (uint32_t) &rx_buf; |
dpslwk | 0:7480abd3b63b | 232 | // Transfer size |
dpslwk | 0:7480abd3b63b | 233 | GPDMACfg.TransferSize = sizeof(rx_buf); |
dpslwk | 0:7480abd3b63b | 234 | // Transfer width - don't care |
dpslwk | 0:7480abd3b63b | 235 | GPDMACfg.TransferWidth = 0; |
dpslwk | 0:7480abd3b63b | 236 | // Transfer type |
dpslwk | 0:7480abd3b63b | 237 | GPDMACfg.TransferType = GPDMA_TRANSFERTYPE_P2M; |
dpslwk | 0:7480abd3b63b | 238 | // Source connection |
dpslwk | 0:7480abd3b63b | 239 | GPDMACfg.SrcConn = GPDMA_CONN_UART0_Rx; |
dpslwk | 0:7480abd3b63b | 240 | // Destination connection - don't care |
dpslwk | 0:7480abd3b63b | 241 | GPDMACfg.DstConn = 0; |
dpslwk | 0:7480abd3b63b | 242 | // Linker List Item - unused |
dpslwk | 0:7480abd3b63b | 243 | GPDMACfg.DMALLI = 0; |
dpslwk | 0:7480abd3b63b | 244 | GPDMA_Setup(&GPDMACfg); |
dpslwk | 0:7480abd3b63b | 245 | |
dpslwk | 0:7480abd3b63b | 246 | /* Reset terminal counter */ |
dpslwk | 0:7480abd3b63b | 247 | Channel0_TC = 0; |
dpslwk | 0:7480abd3b63b | 248 | /* Reset Error counter */ |
dpslwk | 0:7480abd3b63b | 249 | Channel0_Err = 0; |
dpslwk | 0:7480abd3b63b | 250 | |
dpslwk | 0:7480abd3b63b | 251 | // Enable interrupt for DMA |
dpslwk | 0:7480abd3b63b | 252 | NVIC_EnableIRQ (DMA_IRQn); |
dpslwk | 0:7480abd3b63b | 253 | |
dpslwk | 0:7480abd3b63b | 254 | // ***LWK*** First debug LED1 on |
dpslwk | 0:7480abd3b63b | 255 | LPC_GPIO1->FIOSET = (1<<18); |
dpslwk | 0:7480abd3b63b | 256 | |
dpslwk | 0:7480abd3b63b | 257 | // Enable GPDMA channel 0 |
dpslwk | 0:7480abd3b63b | 258 | GPDMA_ChannelCmd(0, ENABLE); |
dpslwk | 0:7480abd3b63b | 259 | // Make sure GPDMA channel 1 is disabled |
dpslwk | 0:7480abd3b63b | 260 | GPDMA_ChannelCmd(1, DISABLE); |
dpslwk | 0:7480abd3b63b | 261 | |
dpslwk | 0:7480abd3b63b | 262 | // ***LWK*** DEBUG LED 2 on |
dpslwk | 0:7480abd3b63b | 263 | LPC_GPIO1->FIOSET = (1<<20); |
dpslwk | 0:7480abd3b63b | 264 | |
dpslwk | 0:7480abd3b63b | 265 | |
dpslwk | 0:7480abd3b63b | 266 | /* Wait for GPDMA on UART0 Tx processing complete */ |
dpslwk | 0:7480abd3b63b | 267 | while ((Channel0_TC == 0) && (Channel0_Err == 0)); // ***LWK*** got stuck here!!! untill i found out the IRQHandeler needed extern "C" |
dpslwk | 0:7480abd3b63b | 268 | |
dpslwk | 0:7480abd3b63b | 269 | // ***LWK** LED 1 off |
dpslwk | 0:7480abd3b63b | 270 | LPC_GPIO1->FIOCLR = (1<<18); |
dpslwk | 0:7480abd3b63b | 271 | |
dpslwk | 0:7480abd3b63b | 272 | LPC_GPIO1->FIOCLR = (11<<20); |
dpslwk | 0:7480abd3b63b | 273 | // Main loop - echos back to the terminal |
dpslwk | 0:7480abd3b63b | 274 | while (1) |
dpslwk | 0:7480abd3b63b | 275 | { |
dpslwk | 0:7480abd3b63b | 276 | //***LWK*** debug LED |
dpslwk | 0:7480abd3b63b | 277 | |
dpslwk | 0:7480abd3b63b | 278 | LPC_GPIO1->FIOSET = (1<<21); //***LWK*** led 3 in while |
dpslwk | 0:7480abd3b63b | 279 | |
dpslwk | 0:7480abd3b63b | 280 | /* Reset terminal counter */ |
dpslwk | 0:7480abd3b63b | 281 | Channel1_TC = 0; |
dpslwk | 0:7480abd3b63b | 282 | /* Reset Error counter */ |
dpslwk | 0:7480abd3b63b | 283 | Channel1_Err = 0; |
dpslwk | 0:7480abd3b63b | 284 | |
dpslwk | 0:7480abd3b63b | 285 | // Setup channel with given parameter |
dpslwk | 0:7480abd3b63b | 286 | GPDMA_Setup(&GPDMACfg); |
dpslwk | 0:7480abd3b63b | 287 | |
dpslwk | 0:7480abd3b63b | 288 | // Enable GPDMA channel 1 |
dpslwk | 0:7480abd3b63b | 289 | GPDMA_ChannelCmd(1, ENABLE); |
dpslwk | 0:7480abd3b63b | 290 | |
dpslwk | 0:7480abd3b63b | 291 | // Clear Rx buffer using DMA |
dpslwk | 0:7480abd3b63b | 292 | for (idx = 0; idx < RX_BUF_SIZE; idx++){ |
dpslwk | 0:7480abd3b63b | 293 | rx_buf[idx] = 0; |
dpslwk | 0:7480abd3b63b | 294 | } |
dpslwk | 0:7480abd3b63b | 295 | |
dpslwk | 0:7480abd3b63b | 296 | |
dpslwk | 0:7480abd3b63b | 297 | |
dpslwk | 0:7480abd3b63b | 298 | // now, start receive character using GPDMA |
dpslwk | 0:7480abd3b63b | 299 | rx_char = (uint8_t *) &rx_buf; |
dpslwk | 0:7480abd3b63b | 300 | while ((Channel1_TC == 0) && (Channel1_Err == 0)){ |
dpslwk | 0:7480abd3b63b | 301 | // Check whether if there's any character received, then print it back |
dpslwk | 0:7480abd3b63b | 302 | if (*rx_char != 0) |
dpslwk | 0:7480abd3b63b | 303 | { |
dpslwk | 0:7480abd3b63b | 304 | UART_Send((LPC_UART_TypeDef *)LPC_UART0, rx_char, 1, BLOCKING); |
dpslwk | 0:7480abd3b63b | 305 | |
dpslwk | 0:7480abd3b63b | 306 | //***LWK*** debug LED |
dpslwk | 0:7480abd3b63b | 307 | // LPC_GPIO1->FIOSET = (1<<21); |
dpslwk | 0:7480abd3b63b | 308 | rx_char++; |
dpslwk | 0:7480abd3b63b | 309 | } |
dpslwk | 0:7480abd3b63b | 310 | } |
dpslwk | 0:7480abd3b63b | 311 | |
dpslwk | 0:7480abd3b63b | 312 | //***LWK*** debug LED out of while eithe tc or err |
dpslwk | 0:7480abd3b63b | 313 | LPC_GPIO1->FIOSET = (1<<23); |
dpslwk | 0:7480abd3b63b | 314 | |
dpslwk | 0:7480abd3b63b | 315 | } |
dpslwk | 0:7480abd3b63b | 316 | |
dpslwk | 0:7480abd3b63b | 317 | //***LWK*** debug LED |
dpslwk | 0:7480abd3b63b | 318 | // LPC_GPIO1->FIOSET = (1<<23); |
dpslwk | 0:7480abd3b63b | 319 | |
dpslwk | 0:7480abd3b63b | 320 | // DeInitialize UART0 peripheral |
dpslwk | 0:7480abd3b63b | 321 | UART_DeInit((LPC_UART_TypeDef *)LPC_UART0); |
dpslwk | 0:7480abd3b63b | 322 | |
dpslwk | 0:7480abd3b63b | 323 | /* Loop forever */ |
dpslwk | 0:7480abd3b63b | 324 | while(1); |
dpslwk | 0:7480abd3b63b | 325 | return 1; |
dpslwk | 0:7480abd3b63b | 326 | } |
dpslwk | 0:7480abd3b63b | 327 | |
dpslwk | 0:7480abd3b63b | 328 | /* With ARM and GHS toolsets, the entry point is main() - this will |
dpslwk | 0:7480abd3b63b | 329 | allow the linker to generate wrapper code to setup stacks, allocate |
dpslwk | 0:7480abd3b63b | 330 | heap area, and initialize and copy code and data segments. For GNU |
dpslwk | 0:7480abd3b63b | 331 | toolsets, the entry point is through __start() in the crt0_gnu.asm |
dpslwk | 0:7480abd3b63b | 332 | file, and that startup code will setup stacks and data */ |
dpslwk | 0:7480abd3b63b | 333 | int main(void) |
dpslwk | 0:7480abd3b63b | 334 | { |
dpslwk | 0:7480abd3b63b | 335 | return c_entry(); |
dpslwk | 0:7480abd3b63b | 336 | } |
dpslwk | 0:7480abd3b63b | 337 | |
dpslwk | 0:7480abd3b63b | 338 | |
dpslwk | 0:7480abd3b63b | 339 | #ifdef DEBUG |
dpslwk | 0:7480abd3b63b | 340 | /******************************************************************************* |
dpslwk | 0:7480abd3b63b | 341 | * @brief Reports the name of the source file and the source line number |
dpslwk | 0:7480abd3b63b | 342 | * where the CHECK_PARAM error has occurred. |
dpslwk | 0:7480abd3b63b | 343 | * @param[in] file Pointer to the source file name |
dpslwk | 0:7480abd3b63b | 344 | * @param[in] line assert_param error line source number |
dpslwk | 0:7480abd3b63b | 345 | * @return None |
dpslwk | 0:7480abd3b63b | 346 | *******************************************************************************/ |
dpslwk | 0:7480abd3b63b | 347 | void check_failed(uint8_t *file, uint32_t line) |
dpslwk | 0:7480abd3b63b | 348 | { |
dpslwk | 0:7480abd3b63b | 349 | /* User can add his own implementation to report the file name and line number, |
dpslwk | 0:7480abd3b63b | 350 | ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ |
dpslwk | 0:7480abd3b63b | 351 | |
dpslwk | 0:7480abd3b63b | 352 | /* Infinite loop */ |
dpslwk | 0:7480abd3b63b | 353 | while(1); |
dpslwk | 0:7480abd3b63b | 354 | } |
dpslwk | 0:7480abd3b63b | 355 | #endif |
dpslwk | 0:7480abd3b63b | 356 | |
dpslwk | 0:7480abd3b63b | 357 | /* |
dpslwk | 0:7480abd3b63b | 358 | * @} |
dpslwk | 0:7480abd3b63b | 359 | */ |