Daniel Worrall / Mbed 2 deprecated Recorder

Record audio data to a .wav file, complete with header, using the TLV320 CODEC and I2S port

Dependencies:   mbed

SDHCFileSystem/SDHCFileSystem.cpp@0:e7efc8468066, 2011-08-05 (annotated)

Committer:
d_worrall
Date:
Fri Aug 05 15:00:51 2011 +0000
Revision:
0:e7efc8468066
version 2.0

Who changed what in which revision?

UserRevisionLine numberNew contents of line
d_worrall 0:e7efc8468066 1 /* mbed SDFileSystem Library, for providing file access to SD cards
d_worrall 0:e7efc8468066 2 * Copyright (c) 2008-2010, sford
d_worrall 0:e7efc8468066 3 *
d_worrall 0:e7efc8468066 4 * Permission is hereby granted, free of charge, to any person obtaining a copy
d_worrall 0:e7efc8468066 5 * of this software and associated documentation files (the "Software"), to deal
d_worrall 0:e7efc8468066 6 * in the Software without restriction, including without limitation the rights
d_worrall 0:e7efc8468066 7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
d_worrall 0:e7efc8468066 8 * copies of the Software, and to permit persons to whom the Software is
d_worrall 0:e7efc8468066 9 * furnished to do so, subject to the following conditions:
d_worrall 0:e7efc8468066 10 *
d_worrall 0:e7efc8468066 11 * The above copyright notice and this permission notice shall be included in
d_worrall 0:e7efc8468066 12 * all copies or substantial portions of the Software.
d_worrall 0:e7efc8468066 13 *
d_worrall 0:e7efc8468066 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
d_worrall 0:e7efc8468066 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
d_worrall 0:e7efc8468066 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
d_worrall 0:e7efc8468066 17 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
d_worrall 0:e7efc8468066 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
d_worrall 0:e7efc8468066 19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
d_worrall 0:e7efc8468066 20 * THE SOFTWARE.
d_worrall 0:e7efc8468066 21 */
d_worrall 0:e7efc8468066 22
d_worrall 0:e7efc8468066 23 /* Introduction
d_worrall 0:e7efc8468066 24 * ------------
d_worrall 0:e7efc8468066 25 * SD and MMC cards support a number of interfaces, but common to them all
d_worrall 0:e7efc8468066 26 * is one based on SPI. This is the one I'm implmenting because it means
d_worrall 0:e7efc8468066 27 * it is much more portable even though not so performant, and we already
d_worrall 0:e7efc8468066 28 * have the mbed SPI Interface!
d_worrall 0:e7efc8468066 29 *
d_worrall 0:e7efc8468066 30 * The main reference I'm using is Chapter 7, "SPI Mode" of:
d_worrall 0:e7efc8468066 31 * http://www.sdcard.org/developers/tech/sdcard/pls/Simplified_Physical_Layer_Spec.pdf
d_worrall 0:e7efc8468066 32 *
d_worrall 0:e7efc8468066 33 * SPI Startup
d_worrall 0:e7efc8468066 34 * -----------
d_worrall 0:e7efc8468066 35 * The SD card powers up in SD mode. The SPI interface mode is selected by
d_worrall 0:e7efc8468066 36 * asserting CS low and sending the reset command (CMD0). The card will
d_worrall 0:e7efc8468066 37 * respond with a (R1) response.
d_worrall 0:e7efc8468066 38 *
d_worrall 0:e7efc8468066 39 * CMD8 is optionally sent to determine the voltage range supported, and
d_worrall 0:e7efc8468066 40 * indirectly determine whether it is a version 1.x SD/non-SD card or
d_worrall 0:e7efc8468066 41 * version 2.x. I'll just ignore this for now.
d_worrall 0:e7efc8468066 42 *
d_worrall 0:e7efc8468066 43 * ACMD41 is repeatedly issued to initialise the card, until "in idle"
d_worrall 0:e7efc8468066 44 * (bit 0) of the R1 response goes to '0', indicating it is initialised.
d_worrall 0:e7efc8468066 45 *
d_worrall 0:e7efc8468066 46 * You should also indicate whether the host supports High Capicity cards,
d_worrall 0:e7efc8468066 47 * and check whether the card is high capacity - i'll also ignore this
d_worrall 0:e7efc8468066 48 *
d_worrall 0:e7efc8468066 49 * SPI Protocol
d_worrall 0:e7efc8468066 50 * ------------
d_worrall 0:e7efc8468066 51 * The SD SPI protocol is based on transactions made up of 8-bit words, with
d_worrall 0:e7efc8468066 52 * the host starting every bus transaction by asserting the CS signal low. The
d_worrall 0:e7efc8468066 53 * card always responds to commands, data blocks and errors.
d_worrall 0:e7efc8468066 54 *
d_worrall 0:e7efc8468066 55 * The protocol supports a CRC, but by default it is off (except for the
d_worrall 0:e7efc8468066 56 * first reset CMD0, where the CRC can just be pre-calculated, and CMD8)
d_worrall 0:e7efc8468066 57 * I'll leave the CRC off I think!
d_worrall 0:e7efc8468066 58 *
d_worrall 0:e7efc8468066 59 * Standard capacity cards have variable data block sizes, whereas High
d_worrall 0:e7efc8468066 60 * Capacity cards fix the size of data block to 512 bytes. I'll therefore
d_worrall 0:e7efc8468066 61 * just always use the Standard Capacity cards with a block size of 512 bytes.
d_worrall 0:e7efc8468066 62 * This is set with CMD16.
d_worrall 0:e7efc8468066 63 *
d_worrall 0:e7efc8468066 64 * You can read and write single blocks (CMD17, CMD25) or multiple blocks
d_worrall 0:e7efc8468066 65 * (CMD18, CMD25). For simplicity, I'll just use single block accesses. When
d_worrall 0:e7efc8468066 66 * the card gets a read command, it responds with a response token, and then
d_worrall 0:e7efc8468066 67 * a data token or an error.
d_worrall 0:e7efc8468066 68 *
d_worrall 0:e7efc8468066 69 * SPI Command Format
d_worrall 0:e7efc8468066 70 * ------------------
d_worrall 0:e7efc8468066 71 * Commands are 6-bytes long, containing the command, 32-bit argument, and CRC.
d_worrall 0:e7efc8468066 72 *
d_worrall 0:e7efc8468066 73 * +---------------+------------+------------+-----------+----------+--------------+
d_worrall 0:e7efc8468066 74 * | 01 | cmd[5:0] | arg[31:24] | arg[23:16] | arg[15:8] | arg[7:0] | crc[6:0] | 1 |
d_worrall 0:e7efc8468066 75 * +---------------+------------+------------+-----------+----------+--------------+
d_worrall 0:e7efc8468066 76 *
d_worrall 0:e7efc8468066 77 * As I'm not using CRC, I can fix that byte to what is needed for CMD0 (0x95)
d_worrall 0:e7efc8468066 78 *
d_worrall 0:e7efc8468066 79 * All Application Specific commands shall be preceded with APP_CMD (CMD55).
d_worrall 0:e7efc8468066 80 *
d_worrall 0:e7efc8468066 81 * SPI Response Format
d_worrall 0:e7efc8468066 82 * -------------------
d_worrall 0:e7efc8468066 83 * The main response format (R1) is a status byte (normally zero). Key flags:
d_worrall 0:e7efc8468066 84 * idle - 1 if the card is in an idle state/initialising
d_worrall 0:e7efc8468066 85 * cmd - 1 if an illegal command code was detected
d_worrall 0:e7efc8468066 86 *
d_worrall 0:e7efc8468066 87 * +-------------------------------------------------+
d_worrall 0:e7efc8468066 88 * R1 | 0 | arg | addr | seq | crc | cmd | erase | idle |
d_worrall 0:e7efc8468066 89 * +-------------------------------------------------+
d_worrall 0:e7efc8468066 90 *
d_worrall 0:e7efc8468066 91 * R1b is the same, except it is followed by a busy signal (zeros) until
d_worrall 0:e7efc8468066 92 * the first non-zero byte when it is ready again.
d_worrall 0:e7efc8468066 93 *
d_worrall 0:e7efc8468066 94 * Data Response Token
d_worrall 0:e7efc8468066 95 * -------------------
d_worrall 0:e7efc8468066 96 * Every data block written to the card is acknowledged by a byte
d_worrall 0:e7efc8468066 97 * response token
d_worrall 0:e7efc8468066 98 *
d_worrall 0:e7efc8468066 99 * +----------------------+
d_worrall 0:e7efc8468066 100 * | xxx | 0 | status | 1 |
d_worrall 0:e7efc8468066 101 * +----------------------+
d_worrall 0:e7efc8468066 102 * 010 - OK!
d_worrall 0:e7efc8468066 103 * 101 - CRC Error
d_worrall 0:e7efc8468066 104 * 110 - Write Error
d_worrall 0:e7efc8468066 105 *
d_worrall 0:e7efc8468066 106 * Single Block Read and Write
d_worrall 0:e7efc8468066 107 * ---------------------------
d_worrall 0:e7efc8468066 108 *
d_worrall 0:e7efc8468066 109 * Block transfers have a byte header, followed by the data, followed
d_worrall 0:e7efc8468066 110 * by a 16-bit CRC. In our case, the data will always be 512 bytes.
d_worrall 0:e7efc8468066 111 *
d_worrall 0:e7efc8468066 112 * +------+---------+---------+- - - -+---------+-----------+----------+
d_worrall 0:e7efc8468066 113 * | 0xFE | data[0] | data[1] | | data[n] | crc[15:8] | crc[7:0] |
d_worrall 0:e7efc8468066 114 * +------+---------+---------+- - - -+---------+-----------+----------+
d_worrall 0:e7efc8468066 115 */
d_worrall 0:e7efc8468066 116
d_worrall 0:e7efc8468066 117 /*
d_worrall 0:e7efc8468066 118 * Comment: Changes for SDHC support till 32GB
d_worrall 0:e7efc8468066 119 * Name: KB
d_worrall 0:e7efc8468066 120 * Date: 07/24/2010
d_worrall 0:e7efc8468066 121 * Release: 0.1
d_worrall 0:e7efc8468066 122 */
d_worrall 0:e7efc8468066 123
d_worrall 0:e7efc8468066 124 #include "SDHCFileSystem.h"
d_worrall 0:e7efc8468066 125
d_worrall 0:e7efc8468066 126 #define DEBUG
d_worrall 0:e7efc8468066 127 #define SD_COMMAND_TIMEOUT 5000
d_worrall 0:e7efc8468066 128
d_worrall 0:e7efc8468066 129
d_worrall 0:e7efc8468066 130 SDFileSystem::SDFileSystem(PinName mosi, PinName miso, PinName sclk, PinName cs, const char* name) :
d_worrall 0:e7efc8468066 131 FATFileSystem(name), _spi(mosi, miso, sclk), _cs(cs) {
d_worrall 0:e7efc8468066 132 _cs = 1;
d_worrall 0:e7efc8468066 133 }
d_worrall 0:e7efc8468066 134
d_worrall 0:e7efc8468066 135 #define R1_IDLE_STATE (1 << 0)
d_worrall 0:e7efc8468066 136 #define R1_ERASE_RESET (1 << 1)
d_worrall 0:e7efc8468066 137 #define R1_ILLEGAL_COMMAND (1 << 2)
d_worrall 0:e7efc8468066 138 #define R1_COM_CRC_ERROR (1 << 3)
d_worrall 0:e7efc8468066 139 #define R1_ERASE_SEQUENCE_ERROR (1 << 4)
d_worrall 0:e7efc8468066 140 #define R1_ADDRESS_ERROR (1 << 5)
d_worrall 0:e7efc8468066 141 #define R1_PARAMETER_ERROR (1 << 6)
d_worrall 0:e7efc8468066 142
d_worrall 0:e7efc8468066 143 // Types
d_worrall 0:e7efc8468066 144 // - v1.x Standard Capacity
d_worrall 0:e7efc8468066 145 // - v2.x Standard Capacity
d_worrall 0:e7efc8468066 146 // - v2.x High Capacity
d_worrall 0:e7efc8468066 147 // - Not recognised as an SD Card
d_worrall 0:e7efc8468066 148
d_worrall 0:e7efc8468066 149 #define SDCARD_FAIL 0
d_worrall 0:e7efc8468066 150 #define SDCARD_V1 1
d_worrall 0:e7efc8468066 151 #define SDCARD_V2 2
d_worrall 0:e7efc8468066 152 #define SDCARD_V2HC 3
d_worrall 0:e7efc8468066 153
d_worrall 0:e7efc8468066 154 int SDFileSystem::initialise_card() {
d_worrall 0:e7efc8468066 155 // Set to 100kHz for initialisation, and clock card with cs = 1
d_worrall 0:e7efc8468066 156 _spi.frequency(100000);
d_worrall 0:e7efc8468066 157 _cs = 1;
d_worrall 0:e7efc8468066 158 for(int i=0; i<16; i++) {
d_worrall 0:e7efc8468066 159 _spi.write(0xFF);
d_worrall 0:e7efc8468066 160 }
d_worrall 0:e7efc8468066 161
d_worrall 0:e7efc8468066 162 // send CMD0, should return with all zeros except IDLE STATE set (bit 0)
d_worrall 0:e7efc8468066 163 if(_cmd(0, 0) != R1_IDLE_STATE) {
d_worrall 0:e7efc8468066 164 fprintf(stderr, "No disk, or could not put SD card in to SPI idle state\n");
d_worrall 0:e7efc8468066 165 return SDCARD_FAIL;
d_worrall 0:e7efc8468066 166 }
d_worrall 0:e7efc8468066 167
d_worrall 0:e7efc8468066 168 // send CMD8 to determine whther it is ver 2.x
d_worrall 0:e7efc8468066 169 int r = _cmd8();
d_worrall 0:e7efc8468066 170 if(r == R1_IDLE_STATE) {
d_worrall 0:e7efc8468066 171 return initialise_card_v2();
d_worrall 0:e7efc8468066 172 } else if(r == (R1_IDLE_STATE | R1_ILLEGAL_COMMAND)) {
d_worrall 0:e7efc8468066 173 return initialise_card_v1();
d_worrall 0:e7efc8468066 174 } else {
d_worrall 0:e7efc8468066 175 fprintf(stderr, "Not in idle state after sending CMD8 (not an SD card?)\n");
d_worrall 0:e7efc8468066 176 return SDCARD_FAIL;
d_worrall 0:e7efc8468066 177 }
d_worrall 0:e7efc8468066 178 }
d_worrall 0:e7efc8468066 179
d_worrall 0:e7efc8468066 180 int SDFileSystem::initialise_card_v1() {
d_worrall 0:e7efc8468066 181 for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
d_worrall 0:e7efc8468066 182 _cmd(55, 0);
d_worrall 0:e7efc8468066 183 if(_cmd(41, 0) == 0) {
d_worrall 0:e7efc8468066 184 cdv = 512;
d_worrall 0:e7efc8468066 185 #ifdef DEBUG
d_worrall 0:e7efc8468066 186 printf("\n\rInit: SEDCARD_V1\n\r");
d_worrall 0:e7efc8468066 187 #endif
d_worrall 0:e7efc8468066 188 return SDCARD_V1;
d_worrall 0:e7efc8468066 189 }
d_worrall 0:e7efc8468066 190 }
d_worrall 0:e7efc8468066 191
d_worrall 0:e7efc8468066 192 fprintf(stderr, "Timeout waiting for v1.x card\n");
d_worrall 0:e7efc8468066 193 return SDCARD_FAIL;
d_worrall 0:e7efc8468066 194 }
d_worrall 0:e7efc8468066 195
d_worrall 0:e7efc8468066 196 int SDFileSystem::initialise_card_v2() {
d_worrall 0:e7efc8468066 197
d_worrall 0:e7efc8468066 198 for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
d_worrall 0:e7efc8468066 199 wait_ms(50);
d_worrall 0:e7efc8468066 200 _cmd58();
d_worrall 0:e7efc8468066 201 _cmd(55, 0);
d_worrall 0:e7efc8468066 202 if(_cmd(41, 0x40000000) == 0) {
d_worrall 0:e7efc8468066 203 _cmd58();
d_worrall 0:e7efc8468066 204 #ifdef DEBUG
d_worrall 0:e7efc8468066 205 printf("\n\rInit: SDCARD_V2\n\r");
d_worrall 0:e7efc8468066 206 #endif
d_worrall 0:e7efc8468066 207 cdv = 1;
d_worrall 0:e7efc8468066 208 return SDCARD_V2;
d_worrall 0:e7efc8468066 209 }
d_worrall 0:e7efc8468066 210 }
d_worrall 0:e7efc8468066 211
d_worrall 0:e7efc8468066 212 fprintf(stderr, "Timeout waiting for v2.x card\n");
d_worrall 0:e7efc8468066 213 return SDCARD_FAIL;
d_worrall 0:e7efc8468066 214 }
d_worrall 0:e7efc8468066 215
d_worrall 0:e7efc8468066 216 int SDFileSystem::disk_initialize() {
d_worrall 0:e7efc8468066 217
d_worrall 0:e7efc8468066 218 int i = initialise_card();
d_worrall 0:e7efc8468066 219 #ifdef DEBUG
d_worrall 0:e7efc8468066 220 printf("init card = %d\n", i);
d_worrall 0:e7efc8468066 221 #endif
d_worrall 0:e7efc8468066 222 _sectors = _sd_sectors();
d_worrall 0:e7efc8468066 223
d_worrall 0:e7efc8468066 224 // Set block length to 512 (CMD16)
d_worrall 0:e7efc8468066 225 if(_cmd(16, 512) != 0) {
d_worrall 0:e7efc8468066 226 fprintf(stderr, "Set 512-byte block timed out\n");
d_worrall 0:e7efc8468066 227 return 1;
d_worrall 0:e7efc8468066 228 }
d_worrall 0:e7efc8468066 229
d_worrall 0:e7efc8468066 230 _spi.frequency(40000000); // Set to 40MHz for data transfer
d_worrall 0:e7efc8468066 231 return 0;
d_worrall 0:e7efc8468066 232 }
d_worrall 0:e7efc8468066 233
d_worrall 0:e7efc8468066 234 int SDFileSystem::disk_write(const char *buffer, int block_number) {
d_worrall 0:e7efc8468066 235 // set write address for single block (CMD24)
d_worrall 0:e7efc8468066 236 if(_cmd(24, block_number * cdv) != 0) {
d_worrall 0:e7efc8468066 237 return 1;
d_worrall 0:e7efc8468066 238 }
d_worrall 0:e7efc8468066 239
d_worrall 0:e7efc8468066 240 // send the data block
d_worrall 0:e7efc8468066 241 _write(buffer, 512);
d_worrall 0:e7efc8468066 242 return 0;
d_worrall 0:e7efc8468066 243 }
d_worrall 0:e7efc8468066 244
d_worrall 0:e7efc8468066 245 int SDFileSystem::disk_read(char *buffer, int block_number) {
d_worrall 0:e7efc8468066 246 // set read address for single block (CMD17)
d_worrall 0:e7efc8468066 247 if(_cmd(17, block_number * cdv) != 0) {
d_worrall 0:e7efc8468066 248 return 1;
d_worrall 0:e7efc8468066 249 }
d_worrall 0:e7efc8468066 250
d_worrall 0:e7efc8468066 251 // receive the data
d_worrall 0:e7efc8468066 252 _read(buffer, 512);
d_worrall 0:e7efc8468066 253 return 0;
d_worrall 0:e7efc8468066 254 }
d_worrall 0:e7efc8468066 255
d_worrall 0:e7efc8468066 256 int SDFileSystem::disk_status() { return 0; }
d_worrall 0:e7efc8468066 257 int SDFileSystem::disk_sync() { return 0; }
d_worrall 0:e7efc8468066 258 int SDFileSystem::disk_sectors() { return _sectors; }
d_worrall 0:e7efc8468066 259
d_worrall 0:e7efc8468066 260 // PRIVATE FUNCTIONS
d_worrall 0:e7efc8468066 261
d_worrall 0:e7efc8468066 262 int SDFileSystem::_cmd(int cmd, int arg) {
d_worrall 0:e7efc8468066 263 _cs = 0;
d_worrall 0:e7efc8468066 264
d_worrall 0:e7efc8468066 265 // send a command
d_worrall 0:e7efc8468066 266 _spi.write(0x40 | cmd);
d_worrall 0:e7efc8468066 267 _spi.write(arg >> 24);
d_worrall 0:e7efc8468066 268 _spi.write(arg >> 16);
d_worrall 0:e7efc8468066 269 _spi.write(arg >> 8);
d_worrall 0:e7efc8468066 270 _spi.write(arg >> 0);
d_worrall 0:e7efc8468066 271 _spi.write(0x95);
d_worrall 0:e7efc8468066 272
d_worrall 0:e7efc8468066 273 // wait for the repsonse (response[7] == 0)
d_worrall 0:e7efc8468066 274 for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
d_worrall 0:e7efc8468066 275 int response = _spi.write(0xFF);
d_worrall 0:e7efc8468066 276 if(!(response & 0x80)) {
d_worrall 0:e7efc8468066 277 _cs = 1;
d_worrall 0:e7efc8468066 278 _spi.write(0xFF);
d_worrall 0:e7efc8468066 279 return response;
d_worrall 0:e7efc8468066 280 }
d_worrall 0:e7efc8468066 281 }
d_worrall 0:e7efc8468066 282 _cs = 1;
d_worrall 0:e7efc8468066 283 _spi.write(0xFF);
d_worrall 0:e7efc8468066 284 return -1; // timeout
d_worrall 0:e7efc8468066 285 }
d_worrall 0:e7efc8468066 286 int SDFileSystem::_cmdx(int cmd, int arg) {
d_worrall 0:e7efc8468066 287 _cs = 0;
d_worrall 0:e7efc8468066 288
d_worrall 0:e7efc8468066 289 // send a command
d_worrall 0:e7efc8468066 290 _spi.write(0x40 | cmd);
d_worrall 0:e7efc8468066 291 _spi.write(arg >> 24);
d_worrall 0:e7efc8468066 292 _spi.write(arg >> 16);
d_worrall 0:e7efc8468066 293 _spi.write(arg >> 8);
d_worrall 0:e7efc8468066 294 _spi.write(arg >> 0);
d_worrall 0:e7efc8468066 295 _spi.write(0x95);
d_worrall 0:e7efc8468066 296
d_worrall 0:e7efc8468066 297 // wait for the repsonse (response[7] == 0)
d_worrall 0:e7efc8468066 298 for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
d_worrall 0:e7efc8468066 299 int response = _spi.write(0xFF);
d_worrall 0:e7efc8468066 300 if(!(response & 0x80)) {
d_worrall 0:e7efc8468066 301 return response;
d_worrall 0:e7efc8468066 302 }
d_worrall 0:e7efc8468066 303 }
d_worrall 0:e7efc8468066 304 _cs = 1;
d_worrall 0:e7efc8468066 305 _spi.write(0xFF);
d_worrall 0:e7efc8468066 306 return -1; // timeout
d_worrall 0:e7efc8468066 307 }
d_worrall 0:e7efc8468066 308
d_worrall 0:e7efc8468066 309
d_worrall 0:e7efc8468066 310 int SDFileSystem::_cmd58() {
d_worrall 0:e7efc8468066 311 _cs = 0;
d_worrall 0:e7efc8468066 312 int arg = 0;
d_worrall 0:e7efc8468066 313
d_worrall 0:e7efc8468066 314 // send a command
d_worrall 0:e7efc8468066 315 _spi.write(0x40 | 58);
d_worrall 0:e7efc8468066 316 _spi.write(arg >> 24);
d_worrall 0:e7efc8468066 317 _spi.write(arg >> 16);
d_worrall 0:e7efc8468066 318 _spi.write(arg >> 8);
d_worrall 0:e7efc8468066 319 _spi.write(arg >> 0);
d_worrall 0:e7efc8468066 320 _spi.write(0x95);
d_worrall 0:e7efc8468066 321
d_worrall 0:e7efc8468066 322 // wait for the repsonse (response[7] == 0)
d_worrall 0:e7efc8468066 323 for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
d_worrall 0:e7efc8468066 324 int response = _spi.write(0xFF);
d_worrall 0:e7efc8468066 325 if(!(response & 0x80)) {
d_worrall 0:e7efc8468066 326 int ocr = _spi.write(0xFF) << 24;
d_worrall 0:e7efc8468066 327 ocr |= _spi.write(0xFF) << 16;
d_worrall 0:e7efc8468066 328 ocr |= _spi.write(0xFF) << 8;
d_worrall 0:e7efc8468066 329 ocr |= _spi.write(0xFF) << 0;
d_worrall 0:e7efc8468066 330 // printf("OCR = 0x%08X\n", ocr);
d_worrall 0:e7efc8468066 331 _cs = 1;
d_worrall 0:e7efc8468066 332 _spi.write(0xFF);
d_worrall 0:e7efc8468066 333 return response;
d_worrall 0:e7efc8468066 334 }
d_worrall 0:e7efc8468066 335 }
d_worrall 0:e7efc8468066 336 _cs = 1;
d_worrall 0:e7efc8468066 337 _spi.write(0xFF);
d_worrall 0:e7efc8468066 338 return -1; // timeout
d_worrall 0:e7efc8468066 339 }
d_worrall 0:e7efc8468066 340
d_worrall 0:e7efc8468066 341 int SDFileSystem::_cmd8() {
d_worrall 0:e7efc8468066 342 _cs = 0;
d_worrall 0:e7efc8468066 343
d_worrall 0:e7efc8468066 344 // send a command
d_worrall 0:e7efc8468066 345 _spi.write(0x40 | 8); // CMD8
d_worrall 0:e7efc8468066 346 _spi.write(0x00); // reserved
d_worrall 0:e7efc8468066 347 _spi.write(0x00); // reserved
d_worrall 0:e7efc8468066 348 _spi.write(0x01); // 3.3v
d_worrall 0:e7efc8468066 349 _spi.write(0xAA); // check pattern
d_worrall 0:e7efc8468066 350 _spi.write(0x87); // crc
d_worrall 0:e7efc8468066 351
d_worrall 0:e7efc8468066 352 // wait for the repsonse (response[7] == 0)
d_worrall 0:e7efc8468066 353 for(int i=0; i<SD_COMMAND_TIMEOUT * 1000; i++) {
d_worrall 0:e7efc8468066 354 char response[5];
d_worrall 0:e7efc8468066 355 response[0] = _spi.write(0xFF);
d_worrall 0:e7efc8468066 356 if(!(response[0] & 0x80)) {
d_worrall 0:e7efc8468066 357 for(int j=1; j<5; j++) {
d_worrall 0:e7efc8468066 358 response[i] = _spi.write(0xFF);
d_worrall 0:e7efc8468066 359 }
d_worrall 0:e7efc8468066 360 _cs = 1;
d_worrall 0:e7efc8468066 361 _spi.write(0xFF);
d_worrall 0:e7efc8468066 362 return response[0];
d_worrall 0:e7efc8468066 363 }
d_worrall 0:e7efc8468066 364 }
d_worrall 0:e7efc8468066 365 _cs = 1;
d_worrall 0:e7efc8468066 366 _spi.write(0xFF);
d_worrall 0:e7efc8468066 367 return -1; // timeout
d_worrall 0:e7efc8468066 368 }
d_worrall 0:e7efc8468066 369
d_worrall 0:e7efc8468066 370 int SDFileSystem::_read(char *buffer, int length) {
d_worrall 0:e7efc8468066 371 _cs = 0;
d_worrall 0:e7efc8468066 372
d_worrall 0:e7efc8468066 373 // read until start byte (0xFF)
d_worrall 0:e7efc8468066 374 while(_spi.write(0xFF) != 0xFE);
d_worrall 0:e7efc8468066 375
d_worrall 0:e7efc8468066 376 // read data
d_worrall 0:e7efc8468066 377 for(int i=0; i<length; i++) {
d_worrall 0:e7efc8468066 378 buffer[i] = _spi.write(0xFF);
d_worrall 0:e7efc8468066 379 }
d_worrall 0:e7efc8468066 380 _spi.write(0xFF); // checksum
d_worrall 0:e7efc8468066 381 _spi.write(0xFF);
d_worrall 0:e7efc8468066 382
d_worrall 0:e7efc8468066 383 _cs = 1;
d_worrall 0:e7efc8468066 384 _spi.write(0xFF);
d_worrall 0:e7efc8468066 385 return 0;
d_worrall 0:e7efc8468066 386 }
d_worrall 0:e7efc8468066 387
d_worrall 0:e7efc8468066 388 int SDFileSystem::_write(const char *buffer, int length) {
d_worrall 0:e7efc8468066 389 _cs = 0;
d_worrall 0:e7efc8468066 390
d_worrall 0:e7efc8468066 391 // indicate start of block
d_worrall 0:e7efc8468066 392 _spi.write(0xFE);
d_worrall 0:e7efc8468066 393
d_worrall 0:e7efc8468066 394 // write the data
d_worrall 0:e7efc8468066 395 for(int i=0; i<length; i++) {
d_worrall 0:e7efc8468066 396 _spi.write(buffer[i]);
d_worrall 0:e7efc8468066 397 }
d_worrall 0:e7efc8468066 398
d_worrall 0:e7efc8468066 399 // write the checksum
d_worrall 0:e7efc8468066 400 _spi.write(0xFF);
d_worrall 0:e7efc8468066 401 _spi.write(0xFF);
d_worrall 0:e7efc8468066 402
d_worrall 0:e7efc8468066 403 // check the repsonse token
d_worrall 0:e7efc8468066 404 if((_spi.write(0xFF) & 0x1F) != 0x05) {
d_worrall 0:e7efc8468066 405 _cs = 1;
d_worrall 0:e7efc8468066 406 _spi.write(0xFF);
d_worrall 0:e7efc8468066 407 return 1;
d_worrall 0:e7efc8468066 408 }
d_worrall 0:e7efc8468066 409
d_worrall 0:e7efc8468066 410 // wait for write to finish
d_worrall 0:e7efc8468066 411 while(_spi.write(0xFF) == 0);
d_worrall 0:e7efc8468066 412
d_worrall 0:e7efc8468066 413 _cs = 1;
d_worrall 0:e7efc8468066 414 _spi.write(0xFF);
d_worrall 0:e7efc8468066 415 return 0;
d_worrall 0:e7efc8468066 416 }
d_worrall 0:e7efc8468066 417
d_worrall 0:e7efc8468066 418 static int ext_bits(char *data, int msb, int lsb) {
d_worrall 0:e7efc8468066 419 int bits = 0;
d_worrall 0:e7efc8468066 420 int size = 1 + msb - lsb;
d_worrall 0:e7efc8468066 421 for(int i=0; i<size; i++) {
d_worrall 0:e7efc8468066 422 int position = lsb + i;
d_worrall 0:e7efc8468066 423 int byte = 15 - (position >> 3);
d_worrall 0:e7efc8468066 424 int bit = position & 0x7;
d_worrall 0:e7efc8468066 425 int value = (data[byte] >> bit) & 1;
d_worrall 0:e7efc8468066 426 bits |= value << i;
d_worrall 0:e7efc8468066 427 }
d_worrall 0:e7efc8468066 428 return bits;
d_worrall 0:e7efc8468066 429 }
d_worrall 0:e7efc8468066 430
d_worrall 0:e7efc8468066 431 int SDFileSystem::_sd_sectors() {
d_worrall 0:e7efc8468066 432
d_worrall 0:e7efc8468066 433 int c_size, c_size_mult, read_bl_len;
d_worrall 0:e7efc8468066 434 int block_len, mult, blocknr, capacity;
d_worrall 0:e7efc8468066 435 int blocks, hc_c_size;
d_worrall 0:e7efc8468066 436 uint64_t hc_capacity;
d_worrall 0:e7efc8468066 437
d_worrall 0:e7efc8468066 438 // CMD9, Response R2 (R1 byte + 16-byte block read)
d_worrall 0:e7efc8468066 439 if(_cmdx(9, 0) != 0) {
d_worrall 0:e7efc8468066 440 fprintf(stderr, "Didn't get a response from the disk\n");
d_worrall 0:e7efc8468066 441 return 0;
d_worrall 0:e7efc8468066 442 }
d_worrall 0:e7efc8468066 443
d_worrall 0:e7efc8468066 444 char csd[16];
d_worrall 0:e7efc8468066 445 if(_read(csd, 16) != 0) {
d_worrall 0:e7efc8468066 446 fprintf(stderr, "Couldn't read csd response from disk\n");
d_worrall 0:e7efc8468066 447 return 0;
d_worrall 0:e7efc8468066 448 }
d_worrall 0:e7efc8468066 449
d_worrall 0:e7efc8468066 450 // csd_structure : csd[127:126]
d_worrall 0:e7efc8468066 451 // c_size : csd[73:62]
d_worrall 0:e7efc8468066 452 // c_size_mult : csd[49:47]
d_worrall 0:e7efc8468066 453 // read_bl_len : csd[83:80] - the *maximum* read block length
d_worrall 0:e7efc8468066 454
d_worrall 0:e7efc8468066 455 int csd_structure = ext_bits(csd, 127, 126);
d_worrall 0:e7efc8468066 456
d_worrall 0:e7efc8468066 457 #ifdef DEBUG
d_worrall 0:e7efc8468066 458 printf("\n\rCSD_STRUCT = %d\n", csd_structure);
d_worrall 0:e7efc8468066 459 #endif
d_worrall 0:e7efc8468066 460
d_worrall 0:e7efc8468066 461 switch (csd_structure){
d_worrall 0:e7efc8468066 462 case 0:
d_worrall 0:e7efc8468066 463 cdv = 512;
d_worrall 0:e7efc8468066 464 c_size = ext_bits(csd, 73, 62);
d_worrall 0:e7efc8468066 465 c_size_mult = ext_bits(csd, 49, 47);
d_worrall 0:e7efc8468066 466 read_bl_len = ext_bits(csd, 83, 80);
d_worrall 0:e7efc8468066 467
d_worrall 0:e7efc8468066 468 block_len = 1 << read_bl_len;
d_worrall 0:e7efc8468066 469 mult = 1 << (c_size_mult + 2);
d_worrall 0:e7efc8468066 470 blocknr = (c_size + 1) * mult;
d_worrall 0:e7efc8468066 471 capacity = blocknr * block_len;
d_worrall 0:e7efc8468066 472 blocks = capacity / 512;
d_worrall 0:e7efc8468066 473 #ifdef DEBUG
d_worrall 0:e7efc8468066 474 printf("\n\rSDCard\n\rc_size: %.4X \n\rcapacity: %.ld \n\rsectors: %d\r\n", c_size, capacity, blocks);
d_worrall 0:e7efc8468066 475 #endif
d_worrall 0:e7efc8468066 476 break;
d_worrall 0:e7efc8468066 477
d_worrall 0:e7efc8468066 478 case 1:
d_worrall 0:e7efc8468066 479 cdv = 1;
d_worrall 0:e7efc8468066 480 hc_c_size = ext_bits(csd, 63, 48);
d_worrall 0:e7efc8468066 481 int hc_read_bl_len = ext_bits(csd, 83, 80);
d_worrall 0:e7efc8468066 482 hc_capacity = hc_c_size+1;
d_worrall 0:e7efc8468066 483 blocks = (hc_c_size+1)*1024;
d_worrall 0:e7efc8468066 484 #ifdef DEBUG
d_worrall 0:e7efc8468066 485 printf("\n\rSDHC Card \n\rhc_c_size: %.4X \n\rcapacity: %.lld \n\rsectors: %d\r\n", hc_c_size, hc_capacity*512*1024, blocks);
d_worrall 0:e7efc8468066 486 #endif
d_worrall 0:e7efc8468066 487 break;
d_worrall 0:e7efc8468066 488
d_worrall 0:e7efc8468066 489 default:
d_worrall 0:e7efc8468066 490 fprintf(stderr, "This disk tastes funny! I only know about type 0 CSD structures\n");
d_worrall 0:e7efc8468066 491 return 0;
d_worrall 0:e7efc8468066 492 //break;
d_worrall 0:e7efc8468066 493 };
d_worrall 0:e7efc8468066 494 return blocks;
d_worrall 0:e7efc8468066 495 }