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| chris |
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/*
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| chris |
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2
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**************************************************************************************************************
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| chris |
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* NXP USB Host Stack
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| chris |
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4
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*
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| chris |
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* (c) Copyright 2008, NXP SemiConductors
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| chris |
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* (c) Copyright 2008, OnChip Technologies LLC
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| chris |
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* All Rights Reserved
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| chris |
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*
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| chris |
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* www.nxp.com
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* www.onchiptech.com
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| chris |
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*
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| chris |
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* File : usbhost_lpc17xx.c
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| chris |
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13
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* Programmer(s) : Ravikanth.P
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| chris |
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* Version :
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*
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**************************************************************************************************************
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17
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*/
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/*
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| chris |
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**************************************************************************************************************
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| chris |
0:144fed3d9420
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* INCLUDE HEADER FILES
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**************************************************************************************************************
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| chris |
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*/
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| chris |
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#include "usbhost_lpc17xx.h"
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| chris |
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26
|
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/*
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| chris |
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**************************************************************************************************************
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| chris |
0:144fed3d9420
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29
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* GLOBAL VARIABLES
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| chris |
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30
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**************************************************************************************************************
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31
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*/
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| chris |
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32
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int gUSBConnected;
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| chris |
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33
|
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| chris |
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34
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volatile USB_INT32U HOST_RhscIntr = 0; /* Root Hub Status Change interrupt */
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| chris |
0:144fed3d9420
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35
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volatile USB_INT32U HOST_WdhIntr = 0; /* Semaphore to wait until the TD is submitted */
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| chris |
0:144fed3d9420
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36
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volatile USB_INT08U HOST_TDControlStatus = 0;
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| chris |
0:144fed3d9420
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37
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volatile HCED *EDCtrl; /* Control endpoint descriptor structure */
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| chris |
0:144fed3d9420
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38
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volatile HCED *EDBulkIn; /* BulkIn endpoint descriptor structure */
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| chris |
0:144fed3d9420
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39
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volatile HCED *EDBulkOut; /* BulkOut endpoint descriptor structure */
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| chris |
0:144fed3d9420
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40
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volatile HCTD *TDHead; /* Head transfer descriptor structure */
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| chris |
0:144fed3d9420
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41
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volatile HCTD *TDTail; /* Tail transfer descriptor structure */
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| chris |
0:144fed3d9420
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42
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volatile HCCA *Hcca; /* Host Controller Communications Area structure */
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| chris |
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43
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USB_INT16U *TDBufNonVol; /* Identical to TDBuffer just to reduce compiler warnings */
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| chris |
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44
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volatile USB_INT08U *TDBuffer; /* Current Buffer Pointer of transfer descriptor */
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| chris |
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45
|
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| chris |
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46
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// USB host structures
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| chris |
0:144fed3d9420
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47
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// AHB SRAM block 1
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| chris |
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48
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#define HOSTBASEADDR 0x2007C000
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| chris |
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49
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// reserve memory for the linker
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| chris |
0:144fed3d9420
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50
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static USB_INT08U HostBuf[0x200] __attribute__((at(HOSTBASEADDR)));
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| chris |
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/*
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| chris |
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52
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**************************************************************************************************************
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| chris |
0:144fed3d9420
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53
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* DELAY IN MILLI SECONDS
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| chris |
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54
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*
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| chris |
0:144fed3d9420
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55
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* Description: This function provides a delay in milli seconds
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| chris |
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*
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| chris |
0:144fed3d9420
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* Arguments : delay The delay required
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| chris |
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*
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| chris |
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* Returns : None
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| chris |
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*
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| chris |
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61
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**************************************************************************************************************
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| chris |
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*/
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| chris |
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63
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| chris |
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64
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void Host_DelayMS (USB_INT32U delay)
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| chris |
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65
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{
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| chris |
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66
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volatile USB_INT32U i;
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| chris |
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67
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68
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| chris |
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69
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for (i = 0; i < delay; i++) {
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| chris |
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70
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Host_DelayUS(1000);
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| chris |
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71
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}
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| chris |
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72
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}
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| chris |
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|
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| chris |
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/*
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| chris |
0:144fed3d9420
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75
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**************************************************************************************************************
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| chris |
0:144fed3d9420
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76
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* DELAY IN MICRO SECONDS
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| chris |
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77
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*
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| chris |
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78
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* Description: This function provides a delay in micro seconds
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| chris |
0:144fed3d9420
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79
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*
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| chris |
0:144fed3d9420
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80
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* Arguments : delay The delay required
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| chris |
0:144fed3d9420
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81
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*
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| chris |
0:144fed3d9420
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82
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* Returns : None
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| chris |
0:144fed3d9420
|
83
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*
|
| chris |
0:144fed3d9420
|
84
|
**************************************************************************************************************
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| chris |
0:144fed3d9420
|
85
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*/
|
| chris |
0:144fed3d9420
|
86
|
|
| chris |
0:144fed3d9420
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87
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void Host_DelayUS (USB_INT32U delay)
|
| chris |
0:144fed3d9420
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88
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{
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| chris |
0:144fed3d9420
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89
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volatile USB_INT32U i;
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| chris |
0:144fed3d9420
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90
|
|
| chris |
0:144fed3d9420
|
91
|
|
| chris |
0:144fed3d9420
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92
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for (i = 0; i < (4 * delay); i++) { /* This logic was tested. It gives app. 1 micro sec delay */
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| chris |
0:144fed3d9420
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93
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;
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| chris |
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94
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}
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| chris |
0:144fed3d9420
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95
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}
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| chris |
0:144fed3d9420
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96
|
|
| chris |
0:144fed3d9420
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97
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// bits of the USB/OTG clock control register
|
| chris |
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|
98
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#define HOST_CLK_EN (1<<0)
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| chris |
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99
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#define DEV_CLK_EN (1<<1)
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| chris |
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100
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#define PORTSEL_CLK_EN (1<<3)
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| chris |
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101
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#define AHB_CLK_EN (1<<4)
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| chris |
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102
|
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| chris |
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103
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// bits of the USB/OTG clock status register
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| chris |
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104
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#define HOST_CLK_ON (1<<0)
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| chris |
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105
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#define DEV_CLK_ON (1<<1)
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| chris |
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106
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#define PORTSEL_CLK_ON (1<<3)
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| chris |
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107
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#define AHB_CLK_ON (1<<4)
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| chris |
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108
|
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| chris |
0:144fed3d9420
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109
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// we need host clock, OTG/portsel clock and AHB clock
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110
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#define CLOCK_MASK (HOST_CLK_EN | PORTSEL_CLK_EN | AHB_CLK_EN)
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| chris |
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111
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| chris |
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112
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/*
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| chris |
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113
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**************************************************************************************************************
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| chris |
0:144fed3d9420
|
114
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* INITIALIZE THE HOST CONTROLLER
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| chris |
0:144fed3d9420
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115
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*
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| chris |
0:144fed3d9420
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116
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* Description: This function initializes lpc17xx host controller
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| chris |
0:144fed3d9420
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117
|
*
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| chris |
0:144fed3d9420
|
118
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* Arguments : None
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| chris |
0:144fed3d9420
|
119
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*
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| chris |
0:144fed3d9420
|
120
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* Returns :
|
| chris |
0:144fed3d9420
|
121
|
*
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| chris |
0:144fed3d9420
|
122
|
**************************************************************************************************************
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| chris |
0:144fed3d9420
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123
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*/
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| chris |
0:144fed3d9420
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124
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void Host_Init (void)
|
| chris |
0:144fed3d9420
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125
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{
|
| chris |
0:144fed3d9420
|
126
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PRINT_Log("In Host_Init\n");
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| chris |
0:144fed3d9420
|
127
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NVIC_DisableIRQ(USB_IRQn); /* Disable the USB interrupt source */
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| chris |
0:144fed3d9420
|
128
|
|
| chris |
0:144fed3d9420
|
129
|
// turn on power for USB
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| chris |
0:144fed3d9420
|
130
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LPC_SC->PCONP |= (1UL<<31);
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| chris |
0:144fed3d9420
|
131
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// Enable USB host clock, port selection and AHB clock
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| chris |
0:144fed3d9420
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132
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LPC_USB->USBClkCtrl |= CLOCK_MASK;
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| chris |
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|
133
|
// Wait for clocks to become available
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| chris |
0:144fed3d9420
|
134
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while ((LPC_USB->USBClkSt & CLOCK_MASK) != CLOCK_MASK)
|
| chris |
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|
135
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;
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| chris |
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|
136
|
|
| chris |
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137
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// it seems the bits[0:1] mean the following
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| chris |
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138
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// 0: U1=device, U2=host
|
| chris |
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139
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// 1: U1=host, U2=host
|
| chris |
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140
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// 2: reserved
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| chris |
0:144fed3d9420
|
141
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// 3: U1=host, U2=device
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| chris |
0:144fed3d9420
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142
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// NB: this register is only available if OTG clock (aka "port select") is enabled!!
|
| chris |
0:144fed3d9420
|
143
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// since we don't care about port 2, set just bit 0 to 1 (U1=host)
|
| chris |
0:144fed3d9420
|
144
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LPC_USB->OTGStCtrl |= 1;
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| chris |
0:144fed3d9420
|
145
|
|
| chris |
0:144fed3d9420
|
146
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// now that we've configured the ports, we can turn off the portsel clock
|
| chris |
0:144fed3d9420
|
147
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LPC_USB->USBClkCtrl &= ~PORTSEL_CLK_EN;
|
| chris |
0:144fed3d9420
|
148
|
|
| chris |
0:144fed3d9420
|
149
|
// power pins are not connected on mbed, so we can skip them
|
| chris |
0:144fed3d9420
|
150
|
/* P1[18] = USB_UP_LED, 01 */
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| chris |
0:144fed3d9420
|
151
|
/* P1[19] = /USB_PPWR, 10 */
|
| chris |
0:144fed3d9420
|
152
|
/* P1[22] = USB_PWRD, 10 */
|
| chris |
0:144fed3d9420
|
153
|
/* P1[27] = /USB_OVRCR, 10 */
|
| chris |
0:144fed3d9420
|
154
|
/*LPC_PINCON->PINSEL3 &= ~((3<<4) | (3<<6) | (3<<12) | (3<<22));
|
| chris |
0:144fed3d9420
|
155
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LPC_PINCON->PINSEL3 |= ((1<<4)|(2<<6) | (2<<12) | (2<<22)); // 0x00802080
|
| chris |
0:144fed3d9420
|
156
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*/
|
| chris |
0:144fed3d9420
|
157
|
|
| chris |
0:144fed3d9420
|
158
|
// configure USB D+/D- pins
|
| chris |
0:144fed3d9420
|
159
|
/* P0[29] = USB_D+, 01 */
|
| chris |
0:144fed3d9420
|
160
|
/* P0[30] = USB_D-, 01 */
|
| chris |
0:144fed3d9420
|
161
|
LPC_PINCON->PINSEL1 &= ~((3<<26) | (3<<28));
|
| chris |
0:144fed3d9420
|
162
|
LPC_PINCON->PINSEL1 |= ((1<<26)|(1<<28)); // 0x14000000
|
| chris |
0:144fed3d9420
|
163
|
|
| chris |
0:144fed3d9420
|
164
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PRINT_Log("Initializing Host Stack\n");
|
| chris |
0:144fed3d9420
|
165
|
|
| chris |
0:144fed3d9420
|
166
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Hcca = (volatile HCCA *)(HostBuf+0x000);
|
| chris |
0:144fed3d9420
|
167
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TDHead = (volatile HCTD *)(HostBuf+0x100);
|
| chris |
0:144fed3d9420
|
168
|
TDTail = (volatile HCTD *)(HostBuf+0x110);
|
| chris |
0:144fed3d9420
|
169
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EDCtrl = (volatile HCED *)(HostBuf+0x120);
|
| chris |
0:144fed3d9420
|
170
|
EDBulkIn = (volatile HCED *)(HostBuf+0x130);
|
| chris |
0:144fed3d9420
|
171
|
EDBulkOut = (volatile HCED *)(HostBuf+0x140);
|
| chris |
0:144fed3d9420
|
172
|
TDBuffer = (volatile USB_INT08U *)(HostBuf+0x150);
|
| chris |
0:144fed3d9420
|
173
|
|
| chris |
0:144fed3d9420
|
174
|
/* Initialize all the TDs, EDs and HCCA to 0 */
|
| chris |
0:144fed3d9420
|
175
|
Host_EDInit(EDCtrl);
|
| chris |
0:144fed3d9420
|
176
|
Host_EDInit(EDBulkIn);
|
| chris |
0:144fed3d9420
|
177
|
Host_EDInit(EDBulkOut);
|
| chris |
0:144fed3d9420
|
178
|
Host_TDInit(TDHead);
|
| chris |
0:144fed3d9420
|
179
|
Host_TDInit(TDTail);
|
| chris |
0:144fed3d9420
|
180
|
Host_HCCAInit(Hcca);
|
| chris |
0:144fed3d9420
|
181
|
|
| chris |
0:144fed3d9420
|
182
|
Host_DelayMS(50); /* Wait 50 ms before apply reset */
|
| chris |
0:144fed3d9420
|
183
|
LPC_USB->HcControl = 0; /* HARDWARE RESET */
|
| chris |
0:144fed3d9420
|
184
|
LPC_USB->HcControlHeadED = 0; /* Initialize Control list head to Zero */
|
| chris |
0:144fed3d9420
|
185
|
LPC_USB->HcBulkHeadED = 0; /* Initialize Bulk list head to Zero */
|
| chris |
0:144fed3d9420
|
186
|
|
| chris |
0:144fed3d9420
|
187
|
/* SOFTWARE RESET */
|
| chris |
0:144fed3d9420
|
188
|
LPC_USB->HcCommandStatus = OR_CMD_STATUS_HCR;
|
| chris |
0:144fed3d9420
|
189
|
LPC_USB->HcFmInterval = DEFAULT_FMINTERVAL; /* Write Fm Interval and Largest Data Packet Counter */
|
| chris |
0:144fed3d9420
|
190
|
|
| chris |
0:144fed3d9420
|
191
|
/* Put HC in operational state */
|
| chris |
0:144fed3d9420
|
192
|
LPC_USB->HcControl = (LPC_USB->HcControl & (~OR_CONTROL_HCFS)) | OR_CONTROL_HC_OPER;
|
| chris |
0:144fed3d9420
|
193
|
LPC_USB->HcRhStatus = OR_RH_STATUS_LPSC; /* Set Global Power */
|
| chris |
0:144fed3d9420
|
194
|
|
| chris |
0:144fed3d9420
|
195
|
LPC_USB->HcHCCA = (USB_INT32U)Hcca;
|
| chris |
0:144fed3d9420
|
196
|
LPC_USB->HcInterruptStatus |= LPC_USB->HcInterruptStatus; /* Clear Interrrupt Status */
|
| chris |
0:144fed3d9420
|
197
|
|
| chris |
0:144fed3d9420
|
198
|
|
| chris |
0:144fed3d9420
|
199
|
LPC_USB->HcInterruptEnable = OR_INTR_ENABLE_MIE |
|
| chris |
0:144fed3d9420
|
200
|
OR_INTR_ENABLE_WDH |
|
| chris |
0:144fed3d9420
|
201
|
OR_INTR_ENABLE_RHSC;
|
| chris |
0:144fed3d9420
|
202
|
|
| chris |
0:144fed3d9420
|
203
|
NVIC_SetPriority(USB_IRQn, 0); /* highest priority */
|
| chris |
0:144fed3d9420
|
204
|
/* Enable the USB Interrupt */
|
| chris |
0:144fed3d9420
|
205
|
NVIC_EnableIRQ(USB_IRQn);
|
| chris |
0:144fed3d9420
|
206
|
PRINT_Log("Host Initialized\n");
|
| chris |
0:144fed3d9420
|
207
|
}
|
| chris |
0:144fed3d9420
|
208
|
|
| chris |
0:144fed3d9420
|
209
|
/*
|
| chris |
0:144fed3d9420
|
210
|
**************************************************************************************************************
|
| chris |
0:144fed3d9420
|
211
|
* INTERRUPT SERVICE ROUTINE
|
| chris |
0:144fed3d9420
|
212
|
*
|
| chris |
0:144fed3d9420
|
213
|
* Description: This function services the interrupt caused by host controller
|
| chris |
0:144fed3d9420
|
214
|
*
|
| chris |
0:144fed3d9420
|
215
|
* Arguments : None
|
| chris |
0:144fed3d9420
|
216
|
*
|
| chris |
0:144fed3d9420
|
217
|
* Returns : None
|
| chris |
0:144fed3d9420
|
218
|
*
|
| chris |
0:144fed3d9420
|
219
|
**************************************************************************************************************
|
| chris |
0:144fed3d9420
|
220
|
*/
|
| chris |
0:144fed3d9420
|
221
|
|
| chris |
0:144fed3d9420
|
222
|
void USB_IRQHandler (void) __irq
|
| chris |
0:144fed3d9420
|
223
|
{
|
| chris |
0:144fed3d9420
|
224
|
USB_INT32U int_status;
|
| chris |
0:144fed3d9420
|
225
|
USB_INT32U ie_status;
|
| chris |
0:144fed3d9420
|
226
|
|
| chris |
0:144fed3d9420
|
227
|
int_status = LPC_USB->HcInterruptStatus; /* Read Interrupt Status */
|
| chris |
0:144fed3d9420
|
228
|
ie_status = LPC_USB->HcInterruptEnable; /* Read Interrupt enable status */
|
| chris |
0:144fed3d9420
|
229
|
|
| chris |
0:144fed3d9420
|
230
|
if (!(int_status & ie_status)) {
|
| chris |
0:144fed3d9420
|
231
|
return;
|
| chris |
0:144fed3d9420
|
232
|
} else {
|
| chris |
0:144fed3d9420
|
233
|
|
| chris |
0:144fed3d9420
|
234
|
int_status = int_status & ie_status;
|
| chris |
0:144fed3d9420
|
235
|
if (int_status & OR_INTR_STATUS_RHSC) { /* Root hub status change interrupt */
|
| chris |
0:144fed3d9420
|
236
|
if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_CSC) {
|
| chris |
0:144fed3d9420
|
237
|
if (LPC_USB->HcRhStatus & OR_RH_STATUS_DRWE) {
|
| chris |
0:144fed3d9420
|
238
|
/*
|
| chris |
0:144fed3d9420
|
239
|
* When DRWE is on, Connect Status Change
|
| chris |
0:144fed3d9420
|
240
|
* means a remote wakeup event.
|
| chris |
0:144fed3d9420
|
241
|
*/
|
| chris |
0:144fed3d9420
|
242
|
HOST_RhscIntr = 1;// JUST SOMETHING FOR A BREAKPOINT
|
| chris |
0:144fed3d9420
|
243
|
}
|
| chris |
0:144fed3d9420
|
244
|
else {
|
| chris |
0:144fed3d9420
|
245
|
/*
|
| chris |
0:144fed3d9420
|
246
|
* When DRWE is off, Connect Status Change
|
| chris |
0:144fed3d9420
|
247
|
* is NOT a remote wakeup event
|
| chris |
0:144fed3d9420
|
248
|
*/
|
| chris |
0:144fed3d9420
|
249
|
if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_CCS) {
|
| chris |
0:144fed3d9420
|
250
|
if (!gUSBConnected) {
|
| chris |
0:144fed3d9420
|
251
|
HOST_TDControlStatus = 0;
|
| chris |
0:144fed3d9420
|
252
|
HOST_WdhIntr = 0;
|
| chris |
0:144fed3d9420
|
253
|
HOST_RhscIntr = 1;
|
| chris |
0:144fed3d9420
|
254
|
gUSBConnected = 1;
|
| chris |
0:144fed3d9420
|
255
|
}
|
| chris |
0:144fed3d9420
|
256
|
else
|
| chris |
0:144fed3d9420
|
257
|
PRINT_Log("Spurious status change (connected)?\n");
|
| chris |
0:144fed3d9420
|
258
|
} else {
|
| chris |
0:144fed3d9420
|
259
|
if (gUSBConnected) {
|
| chris |
0:144fed3d9420
|
260
|
LPC_USB->HcInterruptEnable = 0; // why do we get multiple disc. rupts???
|
| chris |
0:144fed3d9420
|
261
|
HOST_RhscIntr = 0;
|
| chris |
0:144fed3d9420
|
262
|
gUSBConnected = 0;
|
| chris |
0:144fed3d9420
|
263
|
}
|
| chris |
0:144fed3d9420
|
264
|
else
|
| chris |
0:144fed3d9420
|
265
|
PRINT_Log("Spurious status change (disconnected)?\n");
|
| chris |
0:144fed3d9420
|
266
|
}
|
| chris |
0:144fed3d9420
|
267
|
}
|
| chris |
0:144fed3d9420
|
268
|
LPC_USB->HcRhPortStatus1 = OR_RH_PORT_CSC;
|
| chris |
0:144fed3d9420
|
269
|
}
|
| chris |
0:144fed3d9420
|
270
|
if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_PRSC) {
|
| chris |
0:144fed3d9420
|
271
|
LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRSC;
|
| chris |
0:144fed3d9420
|
272
|
}
|
| chris |
0:144fed3d9420
|
273
|
}
|
| chris |
0:144fed3d9420
|
274
|
if (int_status & OR_INTR_STATUS_WDH) { /* Writeback Done Head interrupt */
|
| chris |
0:144fed3d9420
|
275
|
HOST_WdhIntr = 1;
|
| chris |
0:144fed3d9420
|
276
|
HOST_TDControlStatus = (TDHead->Control >> 28) & 0xf;
|
| chris |
0:144fed3d9420
|
277
|
}
|
| chris |
0:144fed3d9420
|
278
|
LPC_USB->HcInterruptStatus = int_status; /* Clear interrupt status register */
|
| chris |
0:144fed3d9420
|
279
|
}
|
| chris |
0:144fed3d9420
|
280
|
return;
|
| chris |
0:144fed3d9420
|
281
|
}
|
| chris |
0:144fed3d9420
|
282
|
|
| chris |
0:144fed3d9420
|
283
|
/*
|
| chris |
0:144fed3d9420
|
284
|
**************************************************************************************************************
|
| chris |
0:144fed3d9420
|
285
|
* PROCESS TRANSFER DESCRIPTOR
|
| chris |
0:144fed3d9420
|
286
|
*
|
| chris |
0:144fed3d9420
|
287
|
* Description: This function processes the transfer descriptor
|
| chris |
0:144fed3d9420
|
288
|
*
|
| chris |
0:144fed3d9420
|
289
|
* Arguments : ed Endpoint descriptor that contains this transfer descriptor
|
| chris |
0:144fed3d9420
|
290
|
* token SETUP, IN, OUT
|
| chris |
0:144fed3d9420
|
291
|
* buffer Current Buffer Pointer of the transfer descriptor
|
| chris |
0:144fed3d9420
|
292
|
* buffer_len Length of the buffer
|
| chris |
0:144fed3d9420
|
293
|
*
|
| chris |
0:144fed3d9420
|
294
|
* Returns : OK if TD submission is successful
|
| chris |
0:144fed3d9420
|
295
|
* ERROR if TD submission fails
|
| chris |
0:144fed3d9420
|
296
|
*
|
| chris |
0:144fed3d9420
|
297
|
**************************************************************************************************************
|
| chris |
0:144fed3d9420
|
298
|
*/
|
| chris |
0:144fed3d9420
|
299
|
|
| chris |
0:144fed3d9420
|
300
|
USB_INT32S Host_ProcessTD (volatile HCED *ed,
|
| chris |
0:144fed3d9420
|
301
|
volatile USB_INT32U token,
|
| chris |
0:144fed3d9420
|
302
|
volatile USB_INT08U *buffer,
|
| chris |
0:144fed3d9420
|
303
|
USB_INT32U buffer_len)
|
| chris |
0:144fed3d9420
|
304
|
{
|
| chris |
0:144fed3d9420
|
305
|
volatile USB_INT32U td_toggle;
|
| chris |
0:144fed3d9420
|
306
|
|
| chris |
0:144fed3d9420
|
307
|
|
| chris |
0:144fed3d9420
|
308
|
if (ed == EDCtrl) {
|
| chris |
0:144fed3d9420
|
309
|
if (token == TD_SETUP) {
|
| chris |
0:144fed3d9420
|
310
|
td_toggle = TD_TOGGLE_0;
|
| chris |
0:144fed3d9420
|
311
|
} else {
|
| chris |
0:144fed3d9420
|
312
|
td_toggle = TD_TOGGLE_1;
|
| chris |
0:144fed3d9420
|
313
|
}
|
| chris |
0:144fed3d9420
|
314
|
} else {
|
| chris |
0:144fed3d9420
|
315
|
td_toggle = 0;
|
| chris |
0:144fed3d9420
|
316
|
}
|
| chris |
0:144fed3d9420
|
317
|
TDHead->Control = (TD_ROUNDING |
|
| chris |
0:144fed3d9420
|
318
|
token |
|
| chris |
0:144fed3d9420
|
319
|
TD_DELAY_INT(0) |
|
| chris |
0:144fed3d9420
|
320
|
td_toggle |
|
| chris |
0:144fed3d9420
|
321
|
TD_CC);
|
| chris |
0:144fed3d9420
|
322
|
TDTail->Control = 0;
|
| chris |
0:144fed3d9420
|
323
|
TDHead->CurrBufPtr = (USB_INT32U) buffer;
|
| chris |
0:144fed3d9420
|
324
|
TDTail->CurrBufPtr = 0;
|
| chris |
0:144fed3d9420
|
325
|
TDHead->Next = (USB_INT32U) TDTail;
|
| chris |
0:144fed3d9420
|
326
|
TDTail->Next = 0;
|
| chris |
0:144fed3d9420
|
327
|
TDHead->BufEnd = (USB_INT32U)(buffer + (buffer_len - 1));
|
| chris |
0:144fed3d9420
|
328
|
TDTail->BufEnd = 0;
|
| chris |
0:144fed3d9420
|
329
|
|
| chris |
0:144fed3d9420
|
330
|
ed->HeadTd = (USB_INT32U)TDHead | ((ed->HeadTd) & 0x00000002);
|
| chris |
0:144fed3d9420
|
331
|
ed->TailTd = (USB_INT32U)TDTail;
|
| chris |
0:144fed3d9420
|
332
|
ed->Next = 0;
|
| chris |
0:144fed3d9420
|
333
|
|
| chris |
0:144fed3d9420
|
334
|
if (ed == EDCtrl) {
|
| chris |
0:144fed3d9420
|
335
|
LPC_USB->HcControlHeadED = (USB_INT32U)ed;
|
| chris |
0:144fed3d9420
|
336
|
LPC_USB->HcCommandStatus = LPC_USB->HcCommandStatus | OR_CMD_STATUS_CLF;
|
| chris |
0:144fed3d9420
|
337
|
LPC_USB->HcControl = LPC_USB->HcControl | OR_CONTROL_CLE;
|
| chris |
0:144fed3d9420
|
338
|
} else {
|
| chris |
0:144fed3d9420
|
339
|
LPC_USB->HcBulkHeadED = (USB_INT32U)ed;
|
| chris |
0:144fed3d9420
|
340
|
LPC_USB->HcCommandStatus = LPC_USB->HcCommandStatus | OR_CMD_STATUS_BLF;
|
| chris |
0:144fed3d9420
|
341
|
LPC_USB->HcControl = LPC_USB->HcControl | OR_CONTROL_BLE;
|
| chris |
0:144fed3d9420
|
342
|
}
|
| chris |
0:144fed3d9420
|
343
|
|
| chris |
0:144fed3d9420
|
344
|
Host_WDHWait();
|
| chris |
0:144fed3d9420
|
345
|
|
| chris |
0:144fed3d9420
|
346
|
// if (!(TDHead->Control & 0xF0000000)) {
|
| chris |
0:144fed3d9420
|
347
|
if (!HOST_TDControlStatus) {
|
| chris |
0:144fed3d9420
|
348
|
return (OK);
|
| chris |
0:144fed3d9420
|
349
|
} else {
|
| chris |
0:144fed3d9420
|
350
|
return (ERR_TD_FAIL);
|
| chris |
0:144fed3d9420
|
351
|
}
|
| chris |
0:144fed3d9420
|
352
|
}
|
| chris |
0:144fed3d9420
|
353
|
|
| chris |
0:144fed3d9420
|
354
|
/*
|
| chris |
0:144fed3d9420
|
355
|
**************************************************************************************************************
|
| chris |
0:144fed3d9420
|
356
|
* ENUMERATE THE DEVICE
|
| chris |
0:144fed3d9420
|
357
|
*
|
| chris |
0:144fed3d9420
|
358
|
* Description: This function is used to enumerate the device connected
|
| chris |
0:144fed3d9420
|
359
|
*
|
| chris |
0:144fed3d9420
|
360
|
* Arguments : None
|
| chris |
0:144fed3d9420
|
361
|
*
|
| chris |
0:144fed3d9420
|
362
|
* Returns : None
|
| chris |
0:144fed3d9420
|
363
|
*
|
| chris |
0:144fed3d9420
|
364
|
**************************************************************************************************************
|
| chris |
0:144fed3d9420
|
365
|
*/
|
| chris |
0:144fed3d9420
|
366
|
|
| chris |
0:144fed3d9420
|
367
|
USB_INT32S Host_EnumDev (void)
|
| chris |
0:144fed3d9420
|
368
|
{
|
| chris |
0:144fed3d9420
|
369
|
USB_INT32S rc;
|
| chris |
0:144fed3d9420
|
370
|
|
| chris |
0:144fed3d9420
|
371
|
PRINT_Log("Connect a Mass Storage device\n");
|
| chris |
0:144fed3d9420
|
372
|
while (!HOST_RhscIntr)
|
| chris |
0:144fed3d9420
|
373
|
__WFI();
|
| chris |
0:144fed3d9420
|
374
|
Host_DelayMS(100); /* USB 2.0 spec says atleast 50ms delay beore port reset */
|
| chris |
0:144fed3d9420
|
375
|
LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRS; // Initiate port reset
|
| chris |
0:144fed3d9420
|
376
|
while (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_PRS)
|
| chris |
0:144fed3d9420
|
377
|
__WFI(); // Wait for port reset to complete...
|
| chris |
0:144fed3d9420
|
378
|
LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRSC; // ...and clear port reset signal
|
| chris |
0:144fed3d9420
|
379
|
Host_DelayMS(200); /* Wait for 100 MS after port reset */
|
| chris |
0:144fed3d9420
|
380
|
|
| chris |
0:144fed3d9420
|
381
|
EDCtrl->Control = 8 << 16; /* Put max pkt size = 8 */
|
| chris |
0:144fed3d9420
|
382
|
/* Read first 8 bytes of device desc */
|
| chris |
0:144fed3d9420
|
383
|
rc = HOST_GET_DESCRIPTOR(USB_DESCRIPTOR_TYPE_DEVICE, 0, TDBuffer, 8);
|
| chris |
0:144fed3d9420
|
384
|
if (rc != OK) {
|
| chris |
0:144fed3d9420
|
385
|
PRINT_Err(rc);
|
| chris |
0:144fed3d9420
|
386
|
return (rc);
|
| chris |
0:144fed3d9420
|
387
|
}
|
| chris |
0:144fed3d9420
|
388
|
EDCtrl->Control = TDBuffer[7] << 16; /* Get max pkt size of endpoint 0 */
|
| chris |
0:144fed3d9420
|
389
|
rc = HOST_SET_ADDRESS(1); /* Set the device address to 1 */
|
| chris |
0:144fed3d9420
|
390
|
if (rc != OK) {
|
| chris |
0:144fed3d9420
|
391
|
PRINT_Err(rc);
|
| chris |
0:144fed3d9420
|
392
|
return (rc);
|
| chris |
0:144fed3d9420
|
393
|
}
|
| chris |
0:144fed3d9420
|
394
|
Host_DelayMS(2);
|
| chris |
0:144fed3d9420
|
395
|
EDCtrl->Control = (EDCtrl->Control) | 1; /* Modify control pipe with address 1 */
|
| chris |
0:144fed3d9420
|
396
|
/* Get the configuration descriptor */
|
| chris |
0:144fed3d9420
|
397
|
rc = HOST_GET_DESCRIPTOR(USB_DESCRIPTOR_TYPE_CONFIGURATION, 0, TDBuffer, 9);
|
| chris |
0:144fed3d9420
|
398
|
if (rc != OK) {
|
| chris |
0:144fed3d9420
|
399
|
PRINT_Err(rc);
|
| chris |
0:144fed3d9420
|
400
|
return (rc);
|
| chris |
0:144fed3d9420
|
401
|
}
|
| chris |
0:144fed3d9420
|
402
|
/* Get the first configuration data */
|
| chris |
0:144fed3d9420
|
403
|
rc = HOST_GET_DESCRIPTOR(USB_DESCRIPTOR_TYPE_CONFIGURATION, 0, TDBuffer, ReadLE16U(&TDBuffer[2]));
|
| chris |
0:144fed3d9420
|
404
|
if (rc != OK) {
|
| chris |
0:144fed3d9420
|
405
|
PRINT_Err(rc);
|
| chris |
0:144fed3d9420
|
406
|
return (rc);
|
| chris |
0:144fed3d9420
|
407
|
}
|
| chris |
0:144fed3d9420
|
408
|
rc = MS_ParseConfiguration(); /* Parse the configuration */
|
| chris |
0:144fed3d9420
|
409
|
if (rc != OK) {
|
| chris |
0:144fed3d9420
|
410
|
PRINT_Err(rc);
|
| chris |
0:144fed3d9420
|
411
|
return (rc);
|
| chris |
0:144fed3d9420
|
412
|
}
|
| chris |
0:144fed3d9420
|
413
|
rc = USBH_SET_CONFIGURATION(1); /* Select device configuration 1 */
|
| chris |
0:144fed3d9420
|
414
|
if (rc != OK) {
|
| chris |
0:144fed3d9420
|
415
|
PRINT_Err(rc);
|
| chris |
0:144fed3d9420
|
416
|
}
|
| chris |
0:144fed3d9420
|
417
|
Host_DelayMS(100); /* Some devices may require this delay */
|
| chris |
0:144fed3d9420
|
418
|
return (rc);
|
| chris |
0:144fed3d9420
|
419
|
}
|
| chris |
0:144fed3d9420
|
420
|
|
| chris |
0:144fed3d9420
|
421
|
/*
|
| chris |
0:144fed3d9420
|
422
|
**************************************************************************************************************
|
| chris |
0:144fed3d9420
|
423
|
* RECEIVE THE CONTROL INFORMATION
|
| chris |
0:144fed3d9420
|
424
|
*
|
| chris |
0:144fed3d9420
|
425
|
* Description: This function is used to receive the control information
|
| chris |
0:144fed3d9420
|
426
|
*
|
| chris |
0:144fed3d9420
|
427
|
* Arguments : bm_request_type
|
| chris |
0:144fed3d9420
|
428
|
* b_request
|
| chris |
0:144fed3d9420
|
429
|
* w_value
|
| chris |
0:144fed3d9420
|
430
|
* w_index
|
| chris |
0:144fed3d9420
|
431
|
* w_length
|
| chris |
0:144fed3d9420
|
432
|
* buffer
|
| chris |
0:144fed3d9420
|
433
|
*
|
| chris |
0:144fed3d9420
|
434
|
* Returns : OK if Success
|
| chris |
0:144fed3d9420
|
435
|
* ERROR if Failed
|
| chris |
0:144fed3d9420
|
436
|
*
|
| chris |
0:144fed3d9420
|
437
|
**************************************************************************************************************
|
| chris |
0:144fed3d9420
|
438
|
*/
|
| chris |
0:144fed3d9420
|
439
|
|
| chris |
0:144fed3d9420
|
440
|
USB_INT32S Host_CtrlRecv ( USB_INT08U bm_request_type,
|
| chris |
0:144fed3d9420
|
441
|
USB_INT08U b_request,
|
| chris |
0:144fed3d9420
|
442
|
USB_INT16U w_value,
|
| chris |
0:144fed3d9420
|
443
|
USB_INT16U w_index,
|
| chris |
0:144fed3d9420
|
444
|
USB_INT16U w_length,
|
| chris |
0:144fed3d9420
|
445
|
volatile USB_INT08U *buffer)
|
| chris |
0:144fed3d9420
|
446
|
{
|
| chris |
0:144fed3d9420
|
447
|
USB_INT32S rc;
|
| chris |
0:144fed3d9420
|
448
|
|
| chris |
0:144fed3d9420
|
449
|
|
| chris |
0:144fed3d9420
|
450
|
Host_FillSetup(bm_request_type, b_request, w_value, w_index, w_length);
|
| chris |
0:144fed3d9420
|
451
|
rc = Host_ProcessTD(EDCtrl, TD_SETUP, TDBuffer, 8);
|
| chris |
0:144fed3d9420
|
452
|
if (rc == OK) {
|
| chris |
0:144fed3d9420
|
453
|
if (w_length) {
|
| chris |
0:144fed3d9420
|
454
|
rc = Host_ProcessTD(EDCtrl, TD_IN, TDBuffer, w_length);
|
| chris |
0:144fed3d9420
|
455
|
}
|
| chris |
0:144fed3d9420
|
456
|
if (rc == OK) {
|
| chris |
0:144fed3d9420
|
457
|
rc = Host_ProcessTD(EDCtrl, TD_OUT, NULL, 0);
|
| chris |
0:144fed3d9420
|
458
|
}
|
| chris |
0:144fed3d9420
|
459
|
}
|
| chris |
0:144fed3d9420
|
460
|
return (rc);
|
| chris |
0:144fed3d9420
|
461
|
}
|
| chris |
0:144fed3d9420
|
462
|
|
| chris |
0:144fed3d9420
|
463
|
/*
|
| chris |
0:144fed3d9420
|
464
|
**************************************************************************************************************
|
| chris |
0:144fed3d9420
|
465
|
* SEND THE CONTROL INFORMATION
|
| chris |
0:144fed3d9420
|
466
|
*
|
| chris |
0:144fed3d9420
|
467
|
* Description: This function is used to send the control information
|
| chris |
0:144fed3d9420
|
468
|
*
|
| chris |
0:144fed3d9420
|
469
|
* Arguments : None
|
| chris |
0:144fed3d9420
|
470
|
*
|
| chris |
0:144fed3d9420
|
471
|
* Returns : OK if Success
|
| chris |
0:144fed3d9420
|
472
|
* ERR_INVALID_BOOTSIG if Failed
|
| chris |
0:144fed3d9420
|
473
|
*
|
| chris |
0:144fed3d9420
|
474
|
**************************************************************************************************************
|
| chris |
0:144fed3d9420
|
475
|
*/
|
| chris |
0:144fed3d9420
|
476
|
|
| chris |
0:144fed3d9420
|
477
|
USB_INT32S Host_CtrlSend ( USB_INT08U bm_request_type,
|
| chris |
0:144fed3d9420
|
478
|
USB_INT08U b_request,
|
| chris |
0:144fed3d9420
|
479
|
USB_INT16U w_value,
|
| chris |
0:144fed3d9420
|
480
|
USB_INT16U w_index,
|
| chris |
0:144fed3d9420
|
481
|
USB_INT16U w_length,
|
| chris |
0:144fed3d9420
|
482
|
volatile USB_INT08U *buffer)
|
| chris |
0:144fed3d9420
|
483
|
{
|
| chris |
0:144fed3d9420
|
484
|
USB_INT32S rc;
|
| chris |
0:144fed3d9420
|
485
|
|
| chris |
0:144fed3d9420
|
486
|
|
| chris |
0:144fed3d9420
|
487
|
Host_FillSetup(bm_request_type, b_request, w_value, w_index, w_length);
|
| chris |
0:144fed3d9420
|
488
|
|
| chris |
0:144fed3d9420
|
489
|
rc = Host_ProcessTD(EDCtrl, TD_SETUP, TDBuffer, 8);
|
| chris |
0:144fed3d9420
|
490
|
if (rc == OK) {
|
| chris |
0:144fed3d9420
|
491
|
if (w_length) {
|
| chris |
0:144fed3d9420
|
492
|
rc = Host_ProcessTD(EDCtrl, TD_OUT, TDBuffer, w_length);
|
| chris |
0:144fed3d9420
|
493
|
}
|
| chris |
0:144fed3d9420
|
494
|
if (rc == OK) {
|
| chris |
0:144fed3d9420
|
495
|
rc = Host_ProcessTD(EDCtrl, TD_IN, NULL, 0);
|
| chris |
0:144fed3d9420
|
496
|
}
|
| chris |
0:144fed3d9420
|
497
|
}
|
| chris |
0:144fed3d9420
|
498
|
return (rc);
|
| chris |
0:144fed3d9420
|
499
|
}
|
| chris |
0:144fed3d9420
|
500
|
|
| chris |
0:144fed3d9420
|
501
|
/*
|
| chris |
0:144fed3d9420
|
502
|
**************************************************************************************************************
|
| chris |
0:144fed3d9420
|
503
|
* FILL SETUP PACKET
|
| chris |
0:144fed3d9420
|
504
|
*
|
| chris |
0:144fed3d9420
|
505
|
* Description: This function is used to fill the setup packet
|
| chris |
0:144fed3d9420
|
506
|
*
|
| chris |
0:144fed3d9420
|
507
|
* Arguments : None
|
| chris |
0:144fed3d9420
|
508
|
*
|
| chris |
0:144fed3d9420
|
509
|
* Returns : OK if Success
|
| chris |
0:144fed3d9420
|
510
|
* ERR_INVALID_BOOTSIG if Failed
|
| chris |
0:144fed3d9420
|
511
|
*
|
| chris |
0:144fed3d9420
|
512
|
**************************************************************************************************************
|
| chris |
0:144fed3d9420
|
513
|
*/
|
| chris |
0:144fed3d9420
|
514
|
|
| chris |
0:144fed3d9420
|
515
|
void Host_FillSetup (USB_INT08U bm_request_type,
|
| chris |
0:144fed3d9420
|
516
|
USB_INT08U b_request,
|
| chris |
0:144fed3d9420
|
517
|
USB_INT16U w_value,
|
| chris |
0:144fed3d9420
|
518
|
USB_INT16U w_index,
|
| chris |
0:144fed3d9420
|
519
|
USB_INT16U w_length)
|
| chris |
0:144fed3d9420
|
520
|
{
|
| chris |
0:144fed3d9420
|
521
|
int i;
|
| chris |
0:144fed3d9420
|
522
|
for (i=0;i<w_length;i++)
|
| chris |
0:144fed3d9420
|
523
|
TDBuffer[i] = 0;
|
| chris |
0:144fed3d9420
|
524
|
|
| chris |
0:144fed3d9420
|
525
|
TDBuffer[0] = bm_request_type;
|
| chris |
0:144fed3d9420
|
526
|
TDBuffer[1] = b_request;
|
| chris |
0:144fed3d9420
|
527
|
WriteLE16U(&TDBuffer[2], w_value);
|
| chris |
0:144fed3d9420
|
528
|
WriteLE16U(&TDBuffer[4], w_index);
|
| chris |
0:144fed3d9420
|
529
|
WriteLE16U(&TDBuffer[6], w_length);
|
| chris |
0:144fed3d9420
|
530
|
}
|
| chris |
0:144fed3d9420
|
531
|
|
| chris |
0:144fed3d9420
|
532
|
|
| chris |
0:144fed3d9420
|
533
|
|
| chris |
0:144fed3d9420
|
534
|
/*
|
| chris |
0:144fed3d9420
|
535
|
**************************************************************************************************************
|
| chris |
0:144fed3d9420
|
536
|
* INITIALIZE THE TRANSFER DESCRIPTOR
|
| chris |
0:144fed3d9420
|
537
|
*
|
| chris |
0:144fed3d9420
|
538
|
* Description: This function initializes transfer descriptor
|
| chris |
0:144fed3d9420
|
539
|
*
|
| chris |
0:144fed3d9420
|
540
|
* Arguments : Pointer to TD structure
|
| chris |
0:144fed3d9420
|
541
|
*
|
| chris |
0:144fed3d9420
|
542
|
* Returns : None
|
| chris |
0:144fed3d9420
|
543
|
*
|
| chris |
0:144fed3d9420
|
544
|
**************************************************************************************************************
|
| chris |
0:144fed3d9420
|
545
|
*/
|
| chris |
0:144fed3d9420
|
546
|
|
| chris |
0:144fed3d9420
|
547
|
void Host_TDInit (volatile HCTD *td)
|
| chris |
0:144fed3d9420
|
548
|
{
|
| chris |
0:144fed3d9420
|
549
|
|
| chris |
0:144fed3d9420
|
550
|
td->Control = 0;
|
| chris |
0:144fed3d9420
|
551
|
td->CurrBufPtr = 0;
|
| chris |
0:144fed3d9420
|
552
|
td->Next = 0;
|
| chris |
0:144fed3d9420
|
553
|
td->BufEnd = 0;
|
| chris |
0:144fed3d9420
|
554
|
}
|
| chris |
0:144fed3d9420
|
555
|
|
| chris |
0:144fed3d9420
|
556
|
/*
|
| chris |
0:144fed3d9420
|
557
|
**************************************************************************************************************
|
| chris |
0:144fed3d9420
|
558
|
* INITIALIZE THE ENDPOINT DESCRIPTOR
|
| chris |
0:144fed3d9420
|
559
|
*
|
| chris |
0:144fed3d9420
|
560
|
* Description: This function initializes endpoint descriptor
|
| chris |
0:144fed3d9420
|
561
|
*
|
| chris |
0:144fed3d9420
|
562
|
* Arguments : Pointer to ED strcuture
|
| chris |
0:144fed3d9420
|
563
|
*
|
| chris |
0:144fed3d9420
|
564
|
* Returns : None
|
| chris |
0:144fed3d9420
|
565
|
*
|
| chris |
0:144fed3d9420
|
566
|
**************************************************************************************************************
|
| chris |
0:144fed3d9420
|
567
|
*/
|
| chris |
0:144fed3d9420
|
568
|
|
| chris |
0:144fed3d9420
|
569
|
void Host_EDInit (volatile HCED *ed)
|
| chris |
0:144fed3d9420
|
570
|
{
|
| chris |
0:144fed3d9420
|
571
|
|
| chris |
0:144fed3d9420
|
572
|
ed->Control = 0;
|
| chris |
0:144fed3d9420
|
573
|
ed->TailTd = 0;
|
| chris |
0:144fed3d9420
|
574
|
ed->HeadTd = 0;
|
| chris |
0:144fed3d9420
|
575
|
ed->Next = 0;
|
| chris |
0:144fed3d9420
|
576
|
}
|
| chris |
0:144fed3d9420
|
577
|
|
| chris |
0:144fed3d9420
|
578
|
/*
|
| chris |
0:144fed3d9420
|
579
|
**************************************************************************************************************
|
| chris |
0:144fed3d9420
|
580
|
* INITIALIZE HOST CONTROLLER COMMUNICATIONS AREA
|
| chris |
0:144fed3d9420
|
581
|
*
|
| chris |
0:144fed3d9420
|
582
|
* Description: This function initializes host controller communications area
|
| chris |
0:144fed3d9420
|
583
|
*
|
| chris |
0:144fed3d9420
|
584
|
* Arguments : Pointer to HCCA
|
| chris |
0:144fed3d9420
|
585
|
*
|
| chris |
0:144fed3d9420
|
586
|
* Returns :
|
| chris |
0:144fed3d9420
|
587
|
*
|
| chris |
0:144fed3d9420
|
588
|
**************************************************************************************************************
|
| chris |
0:144fed3d9420
|
589
|
*/
|
| chris |
0:144fed3d9420
|
590
|
|
| chris |
0:144fed3d9420
|
591
|
void Host_HCCAInit (volatile HCCA *hcca)
|
| chris |
0:144fed3d9420
|
592
|
{
|
| chris |
0:144fed3d9420
|
593
|
USB_INT32U i;
|
| chris |
0:144fed3d9420
|
594
|
|
| chris |
0:144fed3d9420
|
595
|
|
| chris |
0:144fed3d9420
|
596
|
for (i = 0; i < 32; i++) {
|
| chris |
0:144fed3d9420
|
597
|
|
| chris |
0:144fed3d9420
|
598
|
hcca->IntTable[i] = 0;
|
| chris |
0:144fed3d9420
|
599
|
hcca->FrameNumber = 0;
|
| chris |
0:144fed3d9420
|
600
|
hcca->DoneHead = 0;
|
| chris |
0:144fed3d9420
|
601
|
}
|
| chris |
0:144fed3d9420
|
602
|
|
| chris |
0:144fed3d9420
|
603
|
}
|
| chris |
0:144fed3d9420
|
604
|
|
| chris |
0:144fed3d9420
|
605
|
/*
|
| chris |
0:144fed3d9420
|
606
|
**************************************************************************************************************
|
| chris |
0:144fed3d9420
|
607
|
* WAIT FOR WDH INTERRUPT
|
| chris |
0:144fed3d9420
|
608
|
*
|
| chris |
0:144fed3d9420
|
609
|
* Description: This function is infinite loop which breaks when ever a WDH interrupt rises
|
| chris |
0:144fed3d9420
|
610
|
*
|
| chris |
0:144fed3d9420
|
611
|
* Arguments : None
|
| chris |
0:144fed3d9420
|
612
|
*
|
| chris |
0:144fed3d9420
|
613
|
* Returns : None
|
| chris |
0:144fed3d9420
|
614
|
*
|
| chris |
0:144fed3d9420
|
615
|
**************************************************************************************************************
|
| chris |
0:144fed3d9420
|
616
|
*/
|
| chris |
0:144fed3d9420
|
617
|
|
| chris |
0:144fed3d9420
|
618
|
void Host_WDHWait (void)
|
| chris |
0:144fed3d9420
|
619
|
{
|
| chris |
0:144fed3d9420
|
620
|
while (!HOST_WdhIntr)
|
| chris |
0:144fed3d9420
|
621
|
__WFI();
|
| chris |
0:144fed3d9420
|
622
|
|
| chris |
0:144fed3d9420
|
623
|
HOST_WdhIntr = 0;
|
| chris |
0:144fed3d9420
|
624
|
}
|
| chris |
0:144fed3d9420
|
625
|
|
| chris |
0:144fed3d9420
|
626
|
/*
|
| chris |
0:144fed3d9420
|
627
|
**************************************************************************************************************
|
| chris |
0:144fed3d9420
|
628
|
* READ LE 32U
|
| chris |
0:144fed3d9420
|
629
|
*
|
| chris |
0:144fed3d9420
|
630
|
* Description: This function is used to read an unsigned integer from a character buffer in the platform
|
| chris |
0:144fed3d9420
|
631
|
* containing little endian processor
|
| chris |
0:144fed3d9420
|
632
|
*
|
| chris |
0:144fed3d9420
|
633
|
* Arguments : pmem Pointer to the character buffer
|
| chris |
0:144fed3d9420
|
634
|
*
|
| chris |
0:144fed3d9420
|
635
|
* Returns : val Unsigned integer
|
| chris |
0:144fed3d9420
|
636
|
*
|
| chris |
0:144fed3d9420
|
637
|
**************************************************************************************************************
|
| chris |
0:144fed3d9420
|
638
|
*/
|
| chris |
0:144fed3d9420
|
639
|
|
| chris |
0:144fed3d9420
|
640
|
USB_INT32U ReadLE32U (volatile USB_INT08U *pmem)
|
| chris |
0:144fed3d9420
|
641
|
{
|
| chris |
0:144fed3d9420
|
642
|
USB_INT32U val = *(USB_INT32U*)pmem;
|
| chris |
0:144fed3d9420
|
643
|
#ifdef __BIG_ENDIAN
|
| chris |
0:144fed3d9420
|
644
|
return __REV(val);
|
| chris |
0:144fed3d9420
|
645
|
#else
|
| chris |
0:144fed3d9420
|
646
|
return val;
|
| chris |
0:144fed3d9420
|
647
|
#endif
|
| chris |
0:144fed3d9420
|
648
|
}
|
| chris |
0:144fed3d9420
|
649
|
|
| chris |
0:144fed3d9420
|
650
|
/*
|
| chris |
0:144fed3d9420
|
651
|
**************************************************************************************************************
|
| chris |
0:144fed3d9420
|
652
|
* WRITE LE 32U
|
| chris |
0:144fed3d9420
|
653
|
*
|
| chris |
0:144fed3d9420
|
654
|
* Description: This function is used to write an unsigned integer into a charecter buffer in the platform
|
| chris |
0:144fed3d9420
|
655
|
* containing little endian processor.
|
| chris |
0:144fed3d9420
|
656
|
*
|
| chris |
0:144fed3d9420
|
657
|
* Arguments : pmem Pointer to the charecter buffer
|
| chris |
0:144fed3d9420
|
658
|
* val Integer value to be placed in the charecter buffer
|
| chris |
0:144fed3d9420
|
659
|
*
|
| chris |
0:144fed3d9420
|
660
|
* Returns : None
|
| chris |
0:144fed3d9420
|
661
|
*
|
| chris |
0:144fed3d9420
|
662
|
**************************************************************************************************************
|
| chris |
0:144fed3d9420
|
663
|
*/
|
| chris |
0:144fed3d9420
|
664
|
|
| chris |
0:144fed3d9420
|
665
|
void WriteLE32U (volatile USB_INT08U *pmem,
|
| chris |
0:144fed3d9420
|
666
|
USB_INT32U val)
|
| chris |
0:144fed3d9420
|
667
|
{
|
| chris |
0:144fed3d9420
|
668
|
#ifdef __BIG_ENDIAN
|
| chris |
0:144fed3d9420
|
669
|
*(USB_INT32U*)pmem = __REV(val);
|
| chris |
0:144fed3d9420
|
670
|
#else
|
| chris |
0:144fed3d9420
|
671
|
*(USB_INT32U*)pmem = val;
|
| chris |
0:144fed3d9420
|
672
|
#endif
|
| chris |
0:144fed3d9420
|
673
|
}
|
| chris |
0:144fed3d9420
|
674
|
|
| chris |
0:144fed3d9420
|
675
|
/*
|
| chris |
0:144fed3d9420
|
676
|
**************************************************************************************************************
|
| chris |
0:144fed3d9420
|
677
|
* READ LE 16U
|
| chris |
0:144fed3d9420
|
678
|
*
|
| chris |
0:144fed3d9420
|
679
|
* Description: This function is used to read an unsigned short integer from a charecter buffer in the platform
|
| chris |
0:144fed3d9420
|
680
|
* containing little endian processor
|
| chris |
0:144fed3d9420
|
681
|
*
|
| chris |
0:144fed3d9420
|
682
|
* Arguments : pmem Pointer to the charecter buffer
|
| chris |
0:144fed3d9420
|
683
|
*
|
| chris |
0:144fed3d9420
|
684
|
* Returns : val Unsigned short integer
|
| chris |
0:144fed3d9420
|
685
|
*
|
| chris |
0:144fed3d9420
|
686
|
**************************************************************************************************************
|
| chris |
0:144fed3d9420
|
687
|
*/
|
| chris |
0:144fed3d9420
|
688
|
|
| chris |
0:144fed3d9420
|
689
|
USB_INT16U ReadLE16U (volatile USB_INT08U *pmem)
|
| chris |
0:144fed3d9420
|
690
|
{
|
| chris |
0:144fed3d9420
|
691
|
USB_INT16U val = *(USB_INT16U*)pmem;
|
| chris |
0:144fed3d9420
|
692
|
#ifdef __BIG_ENDIAN
|
| chris |
0:144fed3d9420
|
693
|
return __REV16(val);
|
| chris |
0:144fed3d9420
|
694
|
#else
|
| chris |
0:144fed3d9420
|
695
|
return val;
|
| chris |
0:144fed3d9420
|
696
|
#endif
|
| chris |
0:144fed3d9420
|
697
|
}
|
| chris |
0:144fed3d9420
|
698
|
|
| chris |
0:144fed3d9420
|
699
|
/*
|
| chris |
0:144fed3d9420
|
700
|
**************************************************************************************************************
|
| chris |
0:144fed3d9420
|
701
|
* WRITE LE 16U
|
| chris |
0:144fed3d9420
|
702
|
*
|
| chris |
0:144fed3d9420
|
703
|
* Description: This function is used to write an unsigned short integer into a charecter buffer in the
|
| chris |
0:144fed3d9420
|
704
|
* platform containing little endian processor
|
| chris |
0:144fed3d9420
|
705
|
*
|
| chris |
0:144fed3d9420
|
706
|
* Arguments : pmem Pointer to the charecter buffer
|
| chris |
0:144fed3d9420
|
707
|
* val Value to be placed in the charecter buffer
|
| chris |
0:144fed3d9420
|
708
|
*
|
| chris |
0:144fed3d9420
|
709
|
* Returns : None
|
| chris |
0:144fed3d9420
|
710
|
*
|
| chris |
0:144fed3d9420
|
711
|
**************************************************************************************************************
|
| chris |
0:144fed3d9420
|
712
|
*/
|
| chris |
0:144fed3d9420
|
713
|
|
| chris |
0:144fed3d9420
|
714
|
void WriteLE16U (volatile USB_INT08U *pmem,
|
| chris |
0:144fed3d9420
|
715
|
USB_INT16U val)
|
| chris |
0:144fed3d9420
|
716
|
{
|
| chris |
0:144fed3d9420
|
717
|
#ifdef __BIG_ENDIAN
|
| chris |
0:144fed3d9420
|
718
|
*(USB_INT16U*)pmem = (__REV16(val) & 0xFFFF);
|
| chris |
0:144fed3d9420
|
719
|
#else
|
| chris |
0:144fed3d9420
|
720
|
*(USB_INT16U*)pmem = val;
|
| chris |
0:144fed3d9420
|
721
|
#endif
|
| chris |
0:144fed3d9420
|
722
|
}
|
| chris |
0:144fed3d9420
|
723
|
|
| chris |
0:144fed3d9420
|
724
|
/*
|
| chris |
0:144fed3d9420
|
725
|
**************************************************************************************************************
|
| chris |
0:144fed3d9420
|
726
|
* READ BE 32U
|
| chris |
0:144fed3d9420
|
727
|
*
|
| chris |
0:144fed3d9420
|
728
|
* Description: This function is used to read an unsigned integer from a charecter buffer in the platform
|
| chris |
0:144fed3d9420
|
729
|
* containing big endian processor
|
| chris |
0:144fed3d9420
|
730
|
*
|
| chris |
0:144fed3d9420
|
731
|
* Arguments : pmem Pointer to the charecter buffer
|
| chris |
0:144fed3d9420
|
732
|
*
|
| chris |
0:144fed3d9420
|
733
|
* Returns : val Unsigned integer
|
| chris |
0:144fed3d9420
|
734
|
*
|
| chris |
0:144fed3d9420
|
735
|
**************************************************************************************************************
|
| chris |
0:144fed3d9420
|
736
|
*/
|
| chris |
0:144fed3d9420
|
737
|
|
| chris |
0:144fed3d9420
|
738
|
USB_INT32U ReadBE32U (volatile USB_INT08U *pmem)
|
| chris |
0:144fed3d9420
|
739
|
{
|
| chris |
0:144fed3d9420
|
740
|
USB_INT32U val = *(USB_INT32U*)pmem;
|
| chris |
0:144fed3d9420
|
741
|
#ifdef __BIG_ENDIAN
|
| chris |
0:144fed3d9420
|
742
|
return val;
|
| chris |
0:144fed3d9420
|
743
|
#else
|
| chris |
0:144fed3d9420
|
744
|
return __REV(val);
|
| chris |
0:144fed3d9420
|
745
|
#endif
|
| chris |
0:144fed3d9420
|
746
|
}
|
| chris |
0:144fed3d9420
|
747
|
|
| chris |
0:144fed3d9420
|
748
|
/*
|
| chris |
0:144fed3d9420
|
749
|
**************************************************************************************************************
|
| chris |
0:144fed3d9420
|
750
|
* WRITE BE 32U
|
| chris |
0:144fed3d9420
|
751
|
*
|
| chris |
0:144fed3d9420
|
752
|
* Description: This function is used to write an unsigned integer into a charecter buffer in the platform
|
| chris |
0:144fed3d9420
|
753
|
* containing big endian processor
|
| chris |
0:144fed3d9420
|
754
|
*
|
| chris |
0:144fed3d9420
|
755
|
* Arguments : pmem Pointer to the charecter buffer
|
| chris |
0:144fed3d9420
|
756
|
* val Value to be placed in the charecter buffer
|
| chris |
0:144fed3d9420
|
757
|
*
|
| chris |
0:144fed3d9420
|
758
|
* Returns : None
|
| chris |
0:144fed3d9420
|
759
|
*
|
| chris |
0:144fed3d9420
|
760
|
**************************************************************************************************************
|
| chris |
0:144fed3d9420
|
761
|
*/
|
| chris |
0:144fed3d9420
|
762
|
|
| chris |
0:144fed3d9420
|
763
|
void WriteBE32U (volatile USB_INT08U *pmem,
|
| chris |
0:144fed3d9420
|
764
|
USB_INT32U val)
|
| chris |
0:144fed3d9420
|
765
|
{
|
| chris |
0:144fed3d9420
|
766
|
#ifdef __BIG_ENDIAN
|
| chris |
0:144fed3d9420
|
767
|
*(USB_INT32U*)pmem = val;
|
| chris |
0:144fed3d9420
|
768
|
#else
|
| chris |
0:144fed3d9420
|
769
|
*(USB_INT32U*)pmem = __REV(val);
|
| chris |
0:144fed3d9420
|
770
|
#endif
|
| chris |
0:144fed3d9420
|
771
|
}
|
| chris |
0:144fed3d9420
|
772
|
|
| chris |
0:144fed3d9420
|
773
|
/*
|
| chris |
0:144fed3d9420
|
774
|
**************************************************************************************************************
|
| chris |
0:144fed3d9420
|
775
|
* READ BE 16U
|
| chris |
0:144fed3d9420
|
776
|
*
|
| chris |
0:144fed3d9420
|
777
|
* Description: This function is used to read an unsigned short integer from a charecter buffer in the platform
|
| chris |
0:144fed3d9420
|
778
|
* containing big endian processor
|
| chris |
0:144fed3d9420
|
779
|
*
|
| chris |
0:144fed3d9420
|
780
|
* Arguments : pmem Pointer to the charecter buffer
|
| chris |
0:144fed3d9420
|
781
|
*
|
| chris |
0:144fed3d9420
|
782
|
* Returns : val Unsigned short integer
|
| chris |
0:144fed3d9420
|
783
|
*
|
| chris |
0:144fed3d9420
|
784
|
**************************************************************************************************************
|
| chris |
0:144fed3d9420
|
785
|
*/
|
| chris |
0:144fed3d9420
|
786
|
|
| chris |
0:144fed3d9420
|
787
|
USB_INT16U ReadBE16U (volatile USB_INT08U *pmem)
|
| chris |
0:144fed3d9420
|
788
|
{
|
| chris |
0:144fed3d9420
|
789
|
USB_INT16U val = *(USB_INT16U*)pmem;
|
| chris |
0:144fed3d9420
|
790
|
#ifdef __BIG_ENDIAN
|
| chris |
0:144fed3d9420
|
791
|
return val;
|
| chris |
0:144fed3d9420
|
792
|
#else
|
| chris |
0:144fed3d9420
|
793
|
return __REV16(val);
|
| chris |
0:144fed3d9420
|
794
|
#endif
|
| chris |
0:144fed3d9420
|
795
|
}
|
| chris |
0:144fed3d9420
|
796
|
|
| chris |
0:144fed3d9420
|
797
|
/*
|
| chris |
0:144fed3d9420
|
798
|
**************************************************************************************************************
|
| chris |
0:144fed3d9420
|
799
|
* WRITE BE 16U
|
| chris |
0:144fed3d9420
|
800
|
*
|
| chris |
0:144fed3d9420
|
801
|
* Description: This function is used to write an unsigned short integer into the charecter buffer in the
|
| chris |
0:144fed3d9420
|
802
|
* platform containing big endian processor
|
| chris |
0:144fed3d9420
|
803
|
*
|
| chris |
0:144fed3d9420
|
804
|
* Arguments : pmem Pointer to the charecter buffer
|
| chris |
0:144fed3d9420
|
805
|
* val Value to be placed in the charecter buffer
|
| chris |
0:144fed3d9420
|
806
|
*
|
| chris |
0:144fed3d9420
|
807
|
* Returns : None
|
| chris |
0:144fed3d9420
|
808
|
*
|
| chris |
0:144fed3d9420
|
809
|
**************************************************************************************************************
|
| chris |
0:144fed3d9420
|
810
|
*/
|
| chris |
0:144fed3d9420
|
811
|
|
| chris |
0:144fed3d9420
|
812
|
void WriteBE16U (volatile USB_INT08U *pmem,
|
| chris |
0:144fed3d9420
|
813
|
USB_INT16U val)
|
| chris |
0:144fed3d9420
|
814
|
{
|
| chris |
0:144fed3d9420
|
815
|
#ifdef __BIG_ENDIAN
|
| chris |
0:144fed3d9420
|
816
|
*(USB_INT16U*)pmem = val;
|
| chris |
0:144fed3d9420
|
817
|
#else
|
| chris |
0:144fed3d9420
|
818
|
*(USB_INT16U*)pmem = (__REV16(val) & 0xFFFF);
|
| chris |
0:144fed3d9420
|
819
|
#endif
|
| chris |
0:144fed3d9420
|
820
|
}
|
Chris Styles