Added FATFileSystem
Dependents: USBFlashDiskTest RSALB_hbridge_helloworld RSALB_lobster WavPlayer_test ... more
USBHostLite/usbhost_lpc17xx.cpp@4:dcc326e4d358, 2012-07-23 (annotated)
- Committer:
- chris
- Date:
- Mon Jul 23 09:59:06 2012 +0000
- Revision:
- 4:dcc326e4d358
- Parent:
- USBHostLite/usbhost_lpc17xx.c@1:a82ee02f2e91
renamed .c files to .cpp
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
chris | 0:3e7d2baed4b4 | 1 | /* |
chris | 0:3e7d2baed4b4 | 2 | ************************************************************************************************************** |
chris | 0:3e7d2baed4b4 | 3 | * NXP USB Host Stack |
chris | 0:3e7d2baed4b4 | 4 | * |
chris | 0:3e7d2baed4b4 | 5 | * (c) Copyright 2008, NXP SemiConductors |
chris | 0:3e7d2baed4b4 | 6 | * (c) Copyright 2008, OnChip Technologies LLC |
chris | 0:3e7d2baed4b4 | 7 | * All Rights Reserved |
chris | 0:3e7d2baed4b4 | 8 | * |
chris | 0:3e7d2baed4b4 | 9 | * www.nxp.com |
chris | 0:3e7d2baed4b4 | 10 | * www.onchiptech.com |
chris | 0:3e7d2baed4b4 | 11 | * |
chris | 0:3e7d2baed4b4 | 12 | * File : usbhost_lpc17xx.c |
chris | 0:3e7d2baed4b4 | 13 | * Programmer(s) : Ravikanth.P |
chris | 0:3e7d2baed4b4 | 14 | * Version : |
chris | 0:3e7d2baed4b4 | 15 | * |
chris | 0:3e7d2baed4b4 | 16 | ************************************************************************************************************** |
chris | 0:3e7d2baed4b4 | 17 | */ |
chris | 0:3e7d2baed4b4 | 18 | |
chris | 0:3e7d2baed4b4 | 19 | /* |
chris | 0:3e7d2baed4b4 | 20 | ************************************************************************************************************** |
chris | 0:3e7d2baed4b4 | 21 | * INCLUDE HEADER FILES |
chris | 0:3e7d2baed4b4 | 22 | ************************************************************************************************************** |
chris | 0:3e7d2baed4b4 | 23 | */ |
chris | 0:3e7d2baed4b4 | 24 | |
chris | 0:3e7d2baed4b4 | 25 | #include "usbhost_lpc17xx.h" |
chris | 0:3e7d2baed4b4 | 26 | |
chris | 0:3e7d2baed4b4 | 27 | /* |
chris | 0:3e7d2baed4b4 | 28 | ************************************************************************************************************** |
chris | 0:3e7d2baed4b4 | 29 | * GLOBAL VARIABLES |
chris | 0:3e7d2baed4b4 | 30 | ************************************************************************************************************** |
chris | 0:3e7d2baed4b4 | 31 | */ |
chris | 0:3e7d2baed4b4 | 32 | int gUSBConnected; |
chris | 0:3e7d2baed4b4 | 33 | |
chris | 0:3e7d2baed4b4 | 34 | volatile USB_INT32U HOST_RhscIntr = 0; /* Root Hub Status Change interrupt */ |
chris | 0:3e7d2baed4b4 | 35 | volatile USB_INT32U HOST_WdhIntr = 0; /* Semaphore to wait until the TD is submitted */ |
chris | 0:3e7d2baed4b4 | 36 | volatile USB_INT08U HOST_TDControlStatus = 0; |
chris | 0:3e7d2baed4b4 | 37 | volatile HCED *EDCtrl; /* Control endpoint descriptor structure */ |
chris | 0:3e7d2baed4b4 | 38 | volatile HCED *EDBulkIn; /* BulkIn endpoint descriptor structure */ |
chris | 0:3e7d2baed4b4 | 39 | volatile HCED *EDBulkOut; /* BulkOut endpoint descriptor structure */ |
chris | 0:3e7d2baed4b4 | 40 | volatile HCTD *TDHead; /* Head transfer descriptor structure */ |
chris | 0:3e7d2baed4b4 | 41 | volatile HCTD *TDTail; /* Tail transfer descriptor structure */ |
chris | 0:3e7d2baed4b4 | 42 | volatile HCCA *Hcca; /* Host Controller Communications Area structure */ |
chris | 0:3e7d2baed4b4 | 43 | USB_INT16U *TDBufNonVol; /* Identical to TDBuffer just to reduce compiler warnings */ |
chris | 0:3e7d2baed4b4 | 44 | volatile USB_INT08U *TDBuffer; /* Current Buffer Pointer of transfer descriptor */ |
chris | 0:3e7d2baed4b4 | 45 | |
chris | 0:3e7d2baed4b4 | 46 | // USB host structures |
chris | 0:3e7d2baed4b4 | 47 | // AHB SRAM block 1 |
chris | 0:3e7d2baed4b4 | 48 | #define HOSTBASEADDR 0x2007C000 |
chris | 0:3e7d2baed4b4 | 49 | // reserve memory for the linker |
chris | 0:3e7d2baed4b4 | 50 | static USB_INT08U HostBuf[0x200] __attribute__((at(HOSTBASEADDR))); |
chris | 0:3e7d2baed4b4 | 51 | /* |
chris | 0:3e7d2baed4b4 | 52 | ************************************************************************************************************** |
chris | 0:3e7d2baed4b4 | 53 | * DELAY IN MILLI SECONDS |
chris | 0:3e7d2baed4b4 | 54 | * |
chris | 0:3e7d2baed4b4 | 55 | * Description: This function provides a delay in milli seconds |
chris | 0:3e7d2baed4b4 | 56 | * |
chris | 0:3e7d2baed4b4 | 57 | * Arguments : delay The delay required |
chris | 0:3e7d2baed4b4 | 58 | * |
chris | 0:3e7d2baed4b4 | 59 | * Returns : None |
chris | 0:3e7d2baed4b4 | 60 | * |
chris | 0:3e7d2baed4b4 | 61 | ************************************************************************************************************** |
chris | 0:3e7d2baed4b4 | 62 | */ |
chris | 0:3e7d2baed4b4 | 63 | |
chris | 0:3e7d2baed4b4 | 64 | void Host_DelayMS (USB_INT32U delay) |
chris | 0:3e7d2baed4b4 | 65 | { |
chris | 0:3e7d2baed4b4 | 66 | volatile USB_INT32U i; |
chris | 0:3e7d2baed4b4 | 67 | |
chris | 0:3e7d2baed4b4 | 68 | |
chris | 0:3e7d2baed4b4 | 69 | for (i = 0; i < delay; i++) { |
chris | 0:3e7d2baed4b4 | 70 | Host_DelayUS(1000); |
chris | 0:3e7d2baed4b4 | 71 | } |
chris | 0:3e7d2baed4b4 | 72 | } |
chris | 0:3e7d2baed4b4 | 73 | |
chris | 0:3e7d2baed4b4 | 74 | /* |
chris | 0:3e7d2baed4b4 | 75 | ************************************************************************************************************** |
chris | 0:3e7d2baed4b4 | 76 | * DELAY IN MICRO SECONDS |
chris | 0:3e7d2baed4b4 | 77 | * |
chris | 0:3e7d2baed4b4 | 78 | * Description: This function provides a delay in micro seconds |
chris | 0:3e7d2baed4b4 | 79 | * |
chris | 0:3e7d2baed4b4 | 80 | * Arguments : delay The delay required |
chris | 0:3e7d2baed4b4 | 81 | * |
chris | 0:3e7d2baed4b4 | 82 | * Returns : None |
chris | 0:3e7d2baed4b4 | 83 | * |
chris | 0:3e7d2baed4b4 | 84 | ************************************************************************************************************** |
chris | 0:3e7d2baed4b4 | 85 | */ |
chris | 0:3e7d2baed4b4 | 86 | |
chris | 0:3e7d2baed4b4 | 87 | void Host_DelayUS (USB_INT32U delay) |
chris | 0:3e7d2baed4b4 | 88 | { |
chris | 0:3e7d2baed4b4 | 89 | volatile USB_INT32U i; |
chris | 0:3e7d2baed4b4 | 90 | |
chris | 0:3e7d2baed4b4 | 91 | |
chris | 0:3e7d2baed4b4 | 92 | for (i = 0; i < (4 * delay); i++) { /* This logic was tested. It gives app. 1 micro sec delay */ |
chris | 0:3e7d2baed4b4 | 93 | ; |
chris | 0:3e7d2baed4b4 | 94 | } |
chris | 0:3e7d2baed4b4 | 95 | } |
chris | 0:3e7d2baed4b4 | 96 | |
chris | 0:3e7d2baed4b4 | 97 | // bits of the USB/OTG clock control register |
chris | 0:3e7d2baed4b4 | 98 | #define HOST_CLK_EN (1<<0) |
chris | 0:3e7d2baed4b4 | 99 | #define DEV_CLK_EN (1<<1) |
chris | 0:3e7d2baed4b4 | 100 | #define PORTSEL_CLK_EN (1<<3) |
chris | 0:3e7d2baed4b4 | 101 | #define AHB_CLK_EN (1<<4) |
chris | 0:3e7d2baed4b4 | 102 | |
chris | 0:3e7d2baed4b4 | 103 | // bits of the USB/OTG clock status register |
chris | 0:3e7d2baed4b4 | 104 | #define HOST_CLK_ON (1<<0) |
chris | 0:3e7d2baed4b4 | 105 | #define DEV_CLK_ON (1<<1) |
chris | 0:3e7d2baed4b4 | 106 | #define PORTSEL_CLK_ON (1<<3) |
chris | 0:3e7d2baed4b4 | 107 | #define AHB_CLK_ON (1<<4) |
chris | 0:3e7d2baed4b4 | 108 | |
chris | 0:3e7d2baed4b4 | 109 | // we need host clock, OTG/portsel clock and AHB clock |
chris | 0:3e7d2baed4b4 | 110 | #define CLOCK_MASK (HOST_CLK_EN | PORTSEL_CLK_EN | AHB_CLK_EN) |
chris | 0:3e7d2baed4b4 | 111 | |
chris | 0:3e7d2baed4b4 | 112 | /* |
chris | 0:3e7d2baed4b4 | 113 | ************************************************************************************************************** |
chris | 0:3e7d2baed4b4 | 114 | * INITIALIZE THE HOST CONTROLLER |
chris | 0:3e7d2baed4b4 | 115 | * |
chris | 0:3e7d2baed4b4 | 116 | * Description: This function initializes lpc17xx host controller |
chris | 0:3e7d2baed4b4 | 117 | * |
chris | 0:3e7d2baed4b4 | 118 | * Arguments : None |
chris | 0:3e7d2baed4b4 | 119 | * |
chris | 0:3e7d2baed4b4 | 120 | * Returns : |
chris | 0:3e7d2baed4b4 | 121 | * |
chris | 0:3e7d2baed4b4 | 122 | ************************************************************************************************************** |
chris | 0:3e7d2baed4b4 | 123 | */ |
chris | 0:3e7d2baed4b4 | 124 | void Host_Init (void) |
chris | 0:3e7d2baed4b4 | 125 | { |
chris | 0:3e7d2baed4b4 | 126 | PRINT_Log("In Host_Init\n"); |
chris | 0:3e7d2baed4b4 | 127 | NVIC_DisableIRQ(USB_IRQn); /* Disable the USB interrupt source */ |
chris | 0:3e7d2baed4b4 | 128 | |
chris | 0:3e7d2baed4b4 | 129 | // turn on power for USB |
chris | 0:3e7d2baed4b4 | 130 | LPC_SC->PCONP |= (1UL<<31); |
chris | 0:3e7d2baed4b4 | 131 | // Enable USB host clock, port selection and AHB clock |
chris | 0:3e7d2baed4b4 | 132 | LPC_USB->USBClkCtrl |= CLOCK_MASK; |
chris | 0:3e7d2baed4b4 | 133 | // Wait for clocks to become available |
chris | 0:3e7d2baed4b4 | 134 | while ((LPC_USB->USBClkSt & CLOCK_MASK) != CLOCK_MASK) |
chris | 0:3e7d2baed4b4 | 135 | ; |
chris | 0:3e7d2baed4b4 | 136 | |
chris | 0:3e7d2baed4b4 | 137 | // it seems the bits[0:1] mean the following |
chris | 0:3e7d2baed4b4 | 138 | // 0: U1=device, U2=host |
chris | 0:3e7d2baed4b4 | 139 | // 1: U1=host, U2=host |
chris | 0:3e7d2baed4b4 | 140 | // 2: reserved |
chris | 0:3e7d2baed4b4 | 141 | // 3: U1=host, U2=device |
chris | 0:3e7d2baed4b4 | 142 | // NB: this register is only available if OTG clock (aka "port select") is enabled!! |
chris | 0:3e7d2baed4b4 | 143 | // since we don't care about port 2, set just bit 0 to 1 (U1=host) |
chris | 0:3e7d2baed4b4 | 144 | LPC_USB->OTGStCtrl |= 1; |
chris | 0:3e7d2baed4b4 | 145 | |
chris | 0:3e7d2baed4b4 | 146 | // now that we've configured the ports, we can turn off the portsel clock |
chris | 0:3e7d2baed4b4 | 147 | LPC_USB->USBClkCtrl &= ~PORTSEL_CLK_EN; |
chris | 0:3e7d2baed4b4 | 148 | |
chris | 0:3e7d2baed4b4 | 149 | // power pins are not connected on mbed, so we can skip them |
chris | 0:3e7d2baed4b4 | 150 | /* P1[18] = USB_UP_LED, 01 */ |
chris | 0:3e7d2baed4b4 | 151 | /* P1[19] = /USB_PPWR, 10 */ |
chris | 0:3e7d2baed4b4 | 152 | /* P1[22] = USB_PWRD, 10 */ |
chris | 0:3e7d2baed4b4 | 153 | /* P1[27] = /USB_OVRCR, 10 */ |
chris | 0:3e7d2baed4b4 | 154 | /*LPC_PINCON->PINSEL3 &= ~((3<<4) | (3<<6) | (3<<12) | (3<<22)); |
chris | 0:3e7d2baed4b4 | 155 | LPC_PINCON->PINSEL3 |= ((1<<4)|(2<<6) | (2<<12) | (2<<22)); // 0x00802080 |
chris | 0:3e7d2baed4b4 | 156 | */ |
chris | 0:3e7d2baed4b4 | 157 | |
chris | 0:3e7d2baed4b4 | 158 | // configure USB D+/D- pins |
chris | 0:3e7d2baed4b4 | 159 | /* P0[29] = USB_D+, 01 */ |
chris | 0:3e7d2baed4b4 | 160 | /* P0[30] = USB_D-, 01 */ |
chris | 0:3e7d2baed4b4 | 161 | LPC_PINCON->PINSEL1 &= ~((3<<26) | (3<<28)); |
chris | 0:3e7d2baed4b4 | 162 | LPC_PINCON->PINSEL1 |= ((1<<26)|(1<<28)); // 0x14000000 |
chris | 0:3e7d2baed4b4 | 163 | |
chris | 0:3e7d2baed4b4 | 164 | PRINT_Log("Initializing Host Stack\n"); |
chris | 0:3e7d2baed4b4 | 165 | |
chris | 0:3e7d2baed4b4 | 166 | Hcca = (volatile HCCA *)(HostBuf+0x000); |
chris | 0:3e7d2baed4b4 | 167 | TDHead = (volatile HCTD *)(HostBuf+0x100); |
chris | 0:3e7d2baed4b4 | 168 | TDTail = (volatile HCTD *)(HostBuf+0x110); |
chris | 0:3e7d2baed4b4 | 169 | EDCtrl = (volatile HCED *)(HostBuf+0x120); |
chris | 0:3e7d2baed4b4 | 170 | EDBulkIn = (volatile HCED *)(HostBuf+0x130); |
chris | 0:3e7d2baed4b4 | 171 | EDBulkOut = (volatile HCED *)(HostBuf+0x140); |
chris | 0:3e7d2baed4b4 | 172 | TDBuffer = (volatile USB_INT08U *)(HostBuf+0x150); |
chris | 0:3e7d2baed4b4 | 173 | |
chris | 0:3e7d2baed4b4 | 174 | /* Initialize all the TDs, EDs and HCCA to 0 */ |
chris | 0:3e7d2baed4b4 | 175 | Host_EDInit(EDCtrl); |
chris | 0:3e7d2baed4b4 | 176 | Host_EDInit(EDBulkIn); |
chris | 0:3e7d2baed4b4 | 177 | Host_EDInit(EDBulkOut); |
chris | 0:3e7d2baed4b4 | 178 | Host_TDInit(TDHead); |
chris | 0:3e7d2baed4b4 | 179 | Host_TDInit(TDTail); |
chris | 0:3e7d2baed4b4 | 180 | Host_HCCAInit(Hcca); |
chris | 0:3e7d2baed4b4 | 181 | |
chris | 0:3e7d2baed4b4 | 182 | Host_DelayMS(50); /* Wait 50 ms before apply reset */ |
chris | 0:3e7d2baed4b4 | 183 | LPC_USB->HcControl = 0; /* HARDWARE RESET */ |
chris | 0:3e7d2baed4b4 | 184 | LPC_USB->HcControlHeadED = 0; /* Initialize Control list head to Zero */ |
chris | 0:3e7d2baed4b4 | 185 | LPC_USB->HcBulkHeadED = 0; /* Initialize Bulk list head to Zero */ |
chris | 0:3e7d2baed4b4 | 186 | |
chris | 0:3e7d2baed4b4 | 187 | /* SOFTWARE RESET */ |
chris | 0:3e7d2baed4b4 | 188 | LPC_USB->HcCommandStatus = OR_CMD_STATUS_HCR; |
chris | 0:3e7d2baed4b4 | 189 | LPC_USB->HcFmInterval = DEFAULT_FMINTERVAL; /* Write Fm Interval and Largest Data Packet Counter */ |
chris | 0:3e7d2baed4b4 | 190 | |
chris | 0:3e7d2baed4b4 | 191 | /* Put HC in operational state */ |
chris | 0:3e7d2baed4b4 | 192 | LPC_USB->HcControl = (LPC_USB->HcControl & (~OR_CONTROL_HCFS)) | OR_CONTROL_HC_OPER; |
chris | 0:3e7d2baed4b4 | 193 | LPC_USB->HcRhStatus = OR_RH_STATUS_LPSC; /* Set Global Power */ |
chris | 0:3e7d2baed4b4 | 194 | |
chris | 0:3e7d2baed4b4 | 195 | LPC_USB->HcHCCA = (USB_INT32U)Hcca; |
chris | 0:3e7d2baed4b4 | 196 | LPC_USB->HcInterruptStatus |= LPC_USB->HcInterruptStatus; /* Clear Interrrupt Status */ |
chris | 0:3e7d2baed4b4 | 197 | |
chris | 0:3e7d2baed4b4 | 198 | |
chris | 0:3e7d2baed4b4 | 199 | LPC_USB->HcInterruptEnable = OR_INTR_ENABLE_MIE | |
chris | 0:3e7d2baed4b4 | 200 | OR_INTR_ENABLE_WDH | |
chris | 0:3e7d2baed4b4 | 201 | OR_INTR_ENABLE_RHSC; |
chris | 0:3e7d2baed4b4 | 202 | |
chris | 0:3e7d2baed4b4 | 203 | NVIC_SetPriority(USB_IRQn, 0); /* highest priority */ |
chris | 0:3e7d2baed4b4 | 204 | /* Enable the USB Interrupt */ |
chris | 0:3e7d2baed4b4 | 205 | NVIC_EnableIRQ(USB_IRQn); |
chris | 0:3e7d2baed4b4 | 206 | PRINT_Log("Host Initialized\n"); |
chris | 0:3e7d2baed4b4 | 207 | } |
chris | 0:3e7d2baed4b4 | 208 | |
chris | 0:3e7d2baed4b4 | 209 | /* |
chris | 0:3e7d2baed4b4 | 210 | ************************************************************************************************************** |
chris | 0:3e7d2baed4b4 | 211 | * INTERRUPT SERVICE ROUTINE |
chris | 0:3e7d2baed4b4 | 212 | * |
chris | 0:3e7d2baed4b4 | 213 | * Description: This function services the interrupt caused by host controller |
chris | 0:3e7d2baed4b4 | 214 | * |
chris | 0:3e7d2baed4b4 | 215 | * Arguments : None |
chris | 0:3e7d2baed4b4 | 216 | * |
chris | 0:3e7d2baed4b4 | 217 | * Returns : None |
chris | 0:3e7d2baed4b4 | 218 | * |
chris | 0:3e7d2baed4b4 | 219 | ************************************************************************************************************** |
chris | 0:3e7d2baed4b4 | 220 | */ |
chris | 0:3e7d2baed4b4 | 221 | |
chris | 0:3e7d2baed4b4 | 222 | void USB_IRQHandler (void) __irq |
chris | 0:3e7d2baed4b4 | 223 | { |
chris | 0:3e7d2baed4b4 | 224 | USB_INT32U int_status; |
chris | 0:3e7d2baed4b4 | 225 | USB_INT32U ie_status; |
chris | 0:3e7d2baed4b4 | 226 | |
chris | 0:3e7d2baed4b4 | 227 | int_status = LPC_USB->HcInterruptStatus; /* Read Interrupt Status */ |
chris | 0:3e7d2baed4b4 | 228 | ie_status = LPC_USB->HcInterruptEnable; /* Read Interrupt enable status */ |
chris | 0:3e7d2baed4b4 | 229 | |
chris | 0:3e7d2baed4b4 | 230 | if (!(int_status & ie_status)) { |
chris | 0:3e7d2baed4b4 | 231 | return; |
chris | 0:3e7d2baed4b4 | 232 | } else { |
chris | 0:3e7d2baed4b4 | 233 | |
chris | 0:3e7d2baed4b4 | 234 | int_status = int_status & ie_status; |
chris | 0:3e7d2baed4b4 | 235 | if (int_status & OR_INTR_STATUS_RHSC) { /* Root hub status change interrupt */ |
chris | 0:3e7d2baed4b4 | 236 | if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_CSC) { |
chris | 0:3e7d2baed4b4 | 237 | if (LPC_USB->HcRhStatus & OR_RH_STATUS_DRWE) { |
chris | 0:3e7d2baed4b4 | 238 | /* |
chris | 0:3e7d2baed4b4 | 239 | * When DRWE is on, Connect Status Change |
chris | 0:3e7d2baed4b4 | 240 | * means a remote wakeup event. |
chris | 0:3e7d2baed4b4 | 241 | */ |
chris | 0:3e7d2baed4b4 | 242 | HOST_RhscIntr = 1;// JUST SOMETHING FOR A BREAKPOINT |
chris | 0:3e7d2baed4b4 | 243 | } |
chris | 0:3e7d2baed4b4 | 244 | else { |
chris | 0:3e7d2baed4b4 | 245 | /* |
chris | 0:3e7d2baed4b4 | 246 | * When DRWE is off, Connect Status Change |
chris | 0:3e7d2baed4b4 | 247 | * is NOT a remote wakeup event |
chris | 0:3e7d2baed4b4 | 248 | */ |
chris | 0:3e7d2baed4b4 | 249 | if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_CCS) { |
chris | 0:3e7d2baed4b4 | 250 | if (!gUSBConnected) { |
chris | 0:3e7d2baed4b4 | 251 | HOST_TDControlStatus = 0; |
chris | 0:3e7d2baed4b4 | 252 | HOST_WdhIntr = 0; |
chris | 0:3e7d2baed4b4 | 253 | HOST_RhscIntr = 1; |
chris | 0:3e7d2baed4b4 | 254 | gUSBConnected = 1; |
chris | 0:3e7d2baed4b4 | 255 | } |
chris | 0:3e7d2baed4b4 | 256 | else |
chris | 0:3e7d2baed4b4 | 257 | PRINT_Log("Spurious status change (connected)?\n"); |
chris | 0:3e7d2baed4b4 | 258 | } else { |
chris | 0:3e7d2baed4b4 | 259 | if (gUSBConnected) { |
chris | 0:3e7d2baed4b4 | 260 | LPC_USB->HcInterruptEnable = 0; // why do we get multiple disc. rupts??? |
chris | 0:3e7d2baed4b4 | 261 | HOST_RhscIntr = 0; |
chris | 0:3e7d2baed4b4 | 262 | gUSBConnected = 0; |
chris | 0:3e7d2baed4b4 | 263 | } |
chris | 0:3e7d2baed4b4 | 264 | else |
chris | 0:3e7d2baed4b4 | 265 | PRINT_Log("Spurious status change (disconnected)?\n"); |
chris | 0:3e7d2baed4b4 | 266 | } |
chris | 0:3e7d2baed4b4 | 267 | } |
chris | 0:3e7d2baed4b4 | 268 | LPC_USB->HcRhPortStatus1 = OR_RH_PORT_CSC; |
chris | 0:3e7d2baed4b4 | 269 | } |
chris | 0:3e7d2baed4b4 | 270 | if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_PRSC) { |
chris | 0:3e7d2baed4b4 | 271 | LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRSC; |
chris | 0:3e7d2baed4b4 | 272 | } |
chris | 0:3e7d2baed4b4 | 273 | } |
chris | 0:3e7d2baed4b4 | 274 | if (int_status & OR_INTR_STATUS_WDH) { /* Writeback Done Head interrupt */ |
chris | 0:3e7d2baed4b4 | 275 | HOST_WdhIntr = 1; |
chris | 0:3e7d2baed4b4 | 276 | HOST_TDControlStatus = (TDHead->Control >> 28) & 0xf; |
chris | 0:3e7d2baed4b4 | 277 | } |
chris | 0:3e7d2baed4b4 | 278 | LPC_USB->HcInterruptStatus = int_status; /* Clear interrupt status register */ |
chris | 0:3e7d2baed4b4 | 279 | } |
chris | 0:3e7d2baed4b4 | 280 | return; |
chris | 0:3e7d2baed4b4 | 281 | } |
chris | 0:3e7d2baed4b4 | 282 | |
chris | 0:3e7d2baed4b4 | 283 | /* |
chris | 0:3e7d2baed4b4 | 284 | ************************************************************************************************************** |
chris | 0:3e7d2baed4b4 | 285 | * PROCESS TRANSFER DESCRIPTOR |
chris | 0:3e7d2baed4b4 | 286 | * |
chris | 0:3e7d2baed4b4 | 287 | * Description: This function processes the transfer descriptor |
chris | 0:3e7d2baed4b4 | 288 | * |
chris | 0:3e7d2baed4b4 | 289 | * Arguments : ed Endpoint descriptor that contains this transfer descriptor |
chris | 0:3e7d2baed4b4 | 290 | * token SETUP, IN, OUT |
chris | 0:3e7d2baed4b4 | 291 | * buffer Current Buffer Pointer of the transfer descriptor |
chris | 0:3e7d2baed4b4 | 292 | * buffer_len Length of the buffer |
chris | 0:3e7d2baed4b4 | 293 | * |
chris | 0:3e7d2baed4b4 | 294 | * Returns : OK if TD submission is successful |
chris | 0:3e7d2baed4b4 | 295 | * ERROR if TD submission fails |
chris | 0:3e7d2baed4b4 | 296 | * |
chris | 0:3e7d2baed4b4 | 297 | ************************************************************************************************************** |
chris | 0:3e7d2baed4b4 | 298 | */ |
chris | 0:3e7d2baed4b4 | 299 | |
chris | 0:3e7d2baed4b4 | 300 | USB_INT32S Host_ProcessTD (volatile HCED *ed, |
chris | 0:3e7d2baed4b4 | 301 | volatile USB_INT32U token, |
chris | 0:3e7d2baed4b4 | 302 | volatile USB_INT08U *buffer, |
chris | 0:3e7d2baed4b4 | 303 | USB_INT32U buffer_len) |
chris | 0:3e7d2baed4b4 | 304 | { |
chris | 0:3e7d2baed4b4 | 305 | volatile USB_INT32U td_toggle; |
chris | 0:3e7d2baed4b4 | 306 | |
chris | 0:3e7d2baed4b4 | 307 | |
chris | 0:3e7d2baed4b4 | 308 | if (ed == EDCtrl) { |
chris | 0:3e7d2baed4b4 | 309 | if (token == TD_SETUP) { |
chris | 0:3e7d2baed4b4 | 310 | td_toggle = TD_TOGGLE_0; |
chris | 0:3e7d2baed4b4 | 311 | } else { |
chris | 0:3e7d2baed4b4 | 312 | td_toggle = TD_TOGGLE_1; |
chris | 0:3e7d2baed4b4 | 313 | } |
chris | 0:3e7d2baed4b4 | 314 | } else { |
chris | 0:3e7d2baed4b4 | 315 | td_toggle = 0; |
chris | 0:3e7d2baed4b4 | 316 | } |
chris | 0:3e7d2baed4b4 | 317 | TDHead->Control = (TD_ROUNDING | |
chris | 0:3e7d2baed4b4 | 318 | token | |
chris | 0:3e7d2baed4b4 | 319 | TD_DELAY_INT(0) | |
chris | 0:3e7d2baed4b4 | 320 | td_toggle | |
chris | 0:3e7d2baed4b4 | 321 | TD_CC); |
chris | 0:3e7d2baed4b4 | 322 | TDTail->Control = 0; |
chris | 0:3e7d2baed4b4 | 323 | TDHead->CurrBufPtr = (USB_INT32U) buffer; |
chris | 0:3e7d2baed4b4 | 324 | TDTail->CurrBufPtr = 0; |
chris | 0:3e7d2baed4b4 | 325 | TDHead->Next = (USB_INT32U) TDTail; |
chris | 0:3e7d2baed4b4 | 326 | TDTail->Next = 0; |
chris | 0:3e7d2baed4b4 | 327 | TDHead->BufEnd = (USB_INT32U)(buffer + (buffer_len - 1)); |
chris | 0:3e7d2baed4b4 | 328 | TDTail->BufEnd = 0; |
chris | 0:3e7d2baed4b4 | 329 | |
chris | 0:3e7d2baed4b4 | 330 | ed->HeadTd = (USB_INT32U)TDHead | ((ed->HeadTd) & 0x00000002); |
chris | 0:3e7d2baed4b4 | 331 | ed->TailTd = (USB_INT32U)TDTail; |
chris | 0:3e7d2baed4b4 | 332 | ed->Next = 0; |
chris | 0:3e7d2baed4b4 | 333 | |
chris | 0:3e7d2baed4b4 | 334 | if (ed == EDCtrl) { |
chris | 0:3e7d2baed4b4 | 335 | LPC_USB->HcControlHeadED = (USB_INT32U)ed; |
chris | 0:3e7d2baed4b4 | 336 | LPC_USB->HcCommandStatus = LPC_USB->HcCommandStatus | OR_CMD_STATUS_CLF; |
chris | 0:3e7d2baed4b4 | 337 | LPC_USB->HcControl = LPC_USB->HcControl | OR_CONTROL_CLE; |
chris | 0:3e7d2baed4b4 | 338 | } else { |
chris | 0:3e7d2baed4b4 | 339 | LPC_USB->HcBulkHeadED = (USB_INT32U)ed; |
chris | 0:3e7d2baed4b4 | 340 | LPC_USB->HcCommandStatus = LPC_USB->HcCommandStatus | OR_CMD_STATUS_BLF; |
chris | 0:3e7d2baed4b4 | 341 | LPC_USB->HcControl = LPC_USB->HcControl | OR_CONTROL_BLE; |
chris | 0:3e7d2baed4b4 | 342 | } |
chris | 0:3e7d2baed4b4 | 343 | |
chris | 0:3e7d2baed4b4 | 344 | Host_WDHWait(); |
chris | 0:3e7d2baed4b4 | 345 | |
chris | 0:3e7d2baed4b4 | 346 | // if (!(TDHead->Control & 0xF0000000)) { |
chris | 0:3e7d2baed4b4 | 347 | if (!HOST_TDControlStatus) { |
chris | 0:3e7d2baed4b4 | 348 | return (OK); |
chris | 0:3e7d2baed4b4 | 349 | } else { |
chris | 0:3e7d2baed4b4 | 350 | return (ERR_TD_FAIL); |
chris | 0:3e7d2baed4b4 | 351 | } |
chris | 0:3e7d2baed4b4 | 352 | } |
chris | 0:3e7d2baed4b4 | 353 | |
chris | 0:3e7d2baed4b4 | 354 | /* |
chris | 0:3e7d2baed4b4 | 355 | ************************************************************************************************************** |
chris | 0:3e7d2baed4b4 | 356 | * ENUMERATE THE DEVICE |
chris | 0:3e7d2baed4b4 | 357 | * |
chris | 0:3e7d2baed4b4 | 358 | * Description: This function is used to enumerate the device connected |
chris | 0:3e7d2baed4b4 | 359 | * |
chris | 0:3e7d2baed4b4 | 360 | * Arguments : None |
chris | 0:3e7d2baed4b4 | 361 | * |
chris | 0:3e7d2baed4b4 | 362 | * Returns : None |
chris | 0:3e7d2baed4b4 | 363 | * |
chris | 0:3e7d2baed4b4 | 364 | ************************************************************************************************************** |
chris | 0:3e7d2baed4b4 | 365 | */ |
chris | 0:3e7d2baed4b4 | 366 | |
chris | 0:3e7d2baed4b4 | 367 | USB_INT32S Host_EnumDev (void) |
chris | 0:3e7d2baed4b4 | 368 | { |
chris | 0:3e7d2baed4b4 | 369 | USB_INT32S rc; |
chris | 0:3e7d2baed4b4 | 370 | |
chris | 0:3e7d2baed4b4 | 371 | PRINT_Log("Connect a Mass Storage device\n"); |
chris | 0:3e7d2baed4b4 | 372 | while (!HOST_RhscIntr) |
chris | 0:3e7d2baed4b4 | 373 | __WFI(); |
chris | 0:3e7d2baed4b4 | 374 | Host_DelayMS(100); /* USB 2.0 spec says atleast 50ms delay beore port reset */ |
chris | 0:3e7d2baed4b4 | 375 | LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRS; // Initiate port reset |
chris | 0:3e7d2baed4b4 | 376 | while (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_PRS) |
chris | 0:3e7d2baed4b4 | 377 | __WFI(); // Wait for port reset to complete... |
chris | 0:3e7d2baed4b4 | 378 | LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRSC; // ...and clear port reset signal |
chris | 0:3e7d2baed4b4 | 379 | Host_DelayMS(200); /* Wait for 100 MS after port reset */ |
chris | 0:3e7d2baed4b4 | 380 | |
chris | 0:3e7d2baed4b4 | 381 | EDCtrl->Control = 8 << 16; /* Put max pkt size = 8 */ |
chris | 0:3e7d2baed4b4 | 382 | /* Read first 8 bytes of device desc */ |
chris | 0:3e7d2baed4b4 | 383 | rc = HOST_GET_DESCRIPTOR(USB_DESCRIPTOR_TYPE_DEVICE, 0, TDBuffer, 8); |
chris | 0:3e7d2baed4b4 | 384 | if (rc != OK) { |
chris | 0:3e7d2baed4b4 | 385 | PRINT_Err(rc); |
chris | 0:3e7d2baed4b4 | 386 | return (rc); |
chris | 0:3e7d2baed4b4 | 387 | } |
chris | 0:3e7d2baed4b4 | 388 | EDCtrl->Control = TDBuffer[7] << 16; /* Get max pkt size of endpoint 0 */ |
chris | 0:3e7d2baed4b4 | 389 | rc = HOST_SET_ADDRESS(1); /* Set the device address to 1 */ |
chris | 0:3e7d2baed4b4 | 390 | if (rc != OK) { |
chris | 0:3e7d2baed4b4 | 391 | PRINT_Err(rc); |
chris | 0:3e7d2baed4b4 | 392 | return (rc); |
chris | 0:3e7d2baed4b4 | 393 | } |
chris | 0:3e7d2baed4b4 | 394 | Host_DelayMS(2); |
chris | 0:3e7d2baed4b4 | 395 | EDCtrl->Control = (EDCtrl->Control) | 1; /* Modify control pipe with address 1 */ |
chris | 0:3e7d2baed4b4 | 396 | /* Get the configuration descriptor */ |
chris | 0:3e7d2baed4b4 | 397 | rc = HOST_GET_DESCRIPTOR(USB_DESCRIPTOR_TYPE_CONFIGURATION, 0, TDBuffer, 9); |
chris | 0:3e7d2baed4b4 | 398 | if (rc != OK) { |
chris | 0:3e7d2baed4b4 | 399 | PRINT_Err(rc); |
chris | 0:3e7d2baed4b4 | 400 | return (rc); |
chris | 0:3e7d2baed4b4 | 401 | } |
chris | 0:3e7d2baed4b4 | 402 | /* Get the first configuration data */ |
chris | 0:3e7d2baed4b4 | 403 | rc = HOST_GET_DESCRIPTOR(USB_DESCRIPTOR_TYPE_CONFIGURATION, 0, TDBuffer, ReadLE16U(&TDBuffer[2])); |
chris | 0:3e7d2baed4b4 | 404 | if (rc != OK) { |
chris | 0:3e7d2baed4b4 | 405 | PRINT_Err(rc); |
chris | 0:3e7d2baed4b4 | 406 | return (rc); |
chris | 0:3e7d2baed4b4 | 407 | } |
chris | 0:3e7d2baed4b4 | 408 | rc = MS_ParseConfiguration(); /* Parse the configuration */ |
chris | 0:3e7d2baed4b4 | 409 | if (rc != OK) { |
chris | 0:3e7d2baed4b4 | 410 | PRINT_Err(rc); |
chris | 0:3e7d2baed4b4 | 411 | return (rc); |
chris | 0:3e7d2baed4b4 | 412 | } |
chris | 0:3e7d2baed4b4 | 413 | rc = USBH_SET_CONFIGURATION(1); /* Select device configuration 1 */ |
chris | 0:3e7d2baed4b4 | 414 | if (rc != OK) { |
chris | 0:3e7d2baed4b4 | 415 | PRINT_Err(rc); |
chris | 0:3e7d2baed4b4 | 416 | } |
chris | 0:3e7d2baed4b4 | 417 | Host_DelayMS(100); /* Some devices may require this delay */ |
chris | 0:3e7d2baed4b4 | 418 | return (rc); |
chris | 0:3e7d2baed4b4 | 419 | } |
chris | 0:3e7d2baed4b4 | 420 | |
chris | 0:3e7d2baed4b4 | 421 | /* |
chris | 0:3e7d2baed4b4 | 422 | ************************************************************************************************************** |
chris | 0:3e7d2baed4b4 | 423 | * RECEIVE THE CONTROL INFORMATION |
chris | 0:3e7d2baed4b4 | 424 | * |
chris | 0:3e7d2baed4b4 | 425 | * Description: This function is used to receive the control information |
chris | 0:3e7d2baed4b4 | 426 | * |
chris | 0:3e7d2baed4b4 | 427 | * Arguments : bm_request_type |
chris | 0:3e7d2baed4b4 | 428 | * b_request |
chris | 0:3e7d2baed4b4 | 429 | * w_value |
chris | 0:3e7d2baed4b4 | 430 | * w_index |
chris | 0:3e7d2baed4b4 | 431 | * w_length |
chris | 0:3e7d2baed4b4 | 432 | * buffer |
chris | 0:3e7d2baed4b4 | 433 | * |
chris | 0:3e7d2baed4b4 | 434 | * Returns : OK if Success |
chris | 0:3e7d2baed4b4 | 435 | * ERROR if Failed |
chris | 0:3e7d2baed4b4 | 436 | * |
chris | 0:3e7d2baed4b4 | 437 | ************************************************************************************************************** |
chris | 0:3e7d2baed4b4 | 438 | */ |
chris | 0:3e7d2baed4b4 | 439 | |
chris | 0:3e7d2baed4b4 | 440 | USB_INT32S Host_CtrlRecv ( USB_INT08U bm_request_type, |
chris | 0:3e7d2baed4b4 | 441 | USB_INT08U b_request, |
chris | 0:3e7d2baed4b4 | 442 | USB_INT16U w_value, |
chris | 0:3e7d2baed4b4 | 443 | USB_INT16U w_index, |
chris | 0:3e7d2baed4b4 | 444 | USB_INT16U w_length, |
chris | 0:3e7d2baed4b4 | 445 | volatile USB_INT08U *buffer) |
chris | 0:3e7d2baed4b4 | 446 | { |
chris | 0:3e7d2baed4b4 | 447 | USB_INT32S rc; |
chris | 0:3e7d2baed4b4 | 448 | |
chris | 0:3e7d2baed4b4 | 449 | |
chris | 0:3e7d2baed4b4 | 450 | Host_FillSetup(bm_request_type, b_request, w_value, w_index, w_length); |
chris | 0:3e7d2baed4b4 | 451 | rc = Host_ProcessTD(EDCtrl, TD_SETUP, TDBuffer, 8); |
chris | 0:3e7d2baed4b4 | 452 | if (rc == OK) { |
chris | 0:3e7d2baed4b4 | 453 | if (w_length) { |
chris | 0:3e7d2baed4b4 | 454 | rc = Host_ProcessTD(EDCtrl, TD_IN, TDBuffer, w_length); |
chris | 0:3e7d2baed4b4 | 455 | } |
chris | 0:3e7d2baed4b4 | 456 | if (rc == OK) { |
chris | 0:3e7d2baed4b4 | 457 | rc = Host_ProcessTD(EDCtrl, TD_OUT, NULL, 0); |
chris | 0:3e7d2baed4b4 | 458 | } |
chris | 0:3e7d2baed4b4 | 459 | } |
chris | 0:3e7d2baed4b4 | 460 | return (rc); |
chris | 0:3e7d2baed4b4 | 461 | } |
chris | 0:3e7d2baed4b4 | 462 | |
chris | 0:3e7d2baed4b4 | 463 | /* |
chris | 0:3e7d2baed4b4 | 464 | ************************************************************************************************************** |
chris | 0:3e7d2baed4b4 | 465 | * SEND THE CONTROL INFORMATION |
chris | 0:3e7d2baed4b4 | 466 | * |
chris | 0:3e7d2baed4b4 | 467 | * Description: This function is used to send the control information |
chris | 0:3e7d2baed4b4 | 468 | * |
chris | 0:3e7d2baed4b4 | 469 | * Arguments : None |
chris | 0:3e7d2baed4b4 | 470 | * |
chris | 0:3e7d2baed4b4 | 471 | * Returns : OK if Success |
chris | 0:3e7d2baed4b4 | 472 | * ERR_INVALID_BOOTSIG if Failed |
chris | 0:3e7d2baed4b4 | 473 | * |
chris | 0:3e7d2baed4b4 | 474 | ************************************************************************************************************** |
chris | 0:3e7d2baed4b4 | 475 | */ |
chris | 0:3e7d2baed4b4 | 476 | |
chris | 0:3e7d2baed4b4 | 477 | USB_INT32S Host_CtrlSend ( USB_INT08U bm_request_type, |
chris | 0:3e7d2baed4b4 | 478 | USB_INT08U b_request, |
chris | 0:3e7d2baed4b4 | 479 | USB_INT16U w_value, |
chris | 0:3e7d2baed4b4 | 480 | USB_INT16U w_index, |
chris | 0:3e7d2baed4b4 | 481 | USB_INT16U w_length, |
chris | 0:3e7d2baed4b4 | 482 | volatile USB_INT08U *buffer) |
chris | 0:3e7d2baed4b4 | 483 | { |
chris | 0:3e7d2baed4b4 | 484 | USB_INT32S rc; |
chris | 0:3e7d2baed4b4 | 485 | |
chris | 0:3e7d2baed4b4 | 486 | |
chris | 0:3e7d2baed4b4 | 487 | Host_FillSetup(bm_request_type, b_request, w_value, w_index, w_length); |
chris | 0:3e7d2baed4b4 | 488 | |
chris | 0:3e7d2baed4b4 | 489 | rc = Host_ProcessTD(EDCtrl, TD_SETUP, TDBuffer, 8); |
chris | 0:3e7d2baed4b4 | 490 | if (rc == OK) { |
chris | 0:3e7d2baed4b4 | 491 | if (w_length) { |
chris | 0:3e7d2baed4b4 | 492 | rc = Host_ProcessTD(EDCtrl, TD_OUT, TDBuffer, w_length); |
chris | 0:3e7d2baed4b4 | 493 | } |
chris | 0:3e7d2baed4b4 | 494 | if (rc == OK) { |
chris | 0:3e7d2baed4b4 | 495 | rc = Host_ProcessTD(EDCtrl, TD_IN, NULL, 0); |
chris | 0:3e7d2baed4b4 | 496 | } |
chris | 0:3e7d2baed4b4 | 497 | } |
chris | 0:3e7d2baed4b4 | 498 | return (rc); |
chris | 0:3e7d2baed4b4 | 499 | } |
chris | 0:3e7d2baed4b4 | 500 | |
chris | 0:3e7d2baed4b4 | 501 | /* |
chris | 0:3e7d2baed4b4 | 502 | ************************************************************************************************************** |
chris | 0:3e7d2baed4b4 | 503 | * FILL SETUP PACKET |
chris | 0:3e7d2baed4b4 | 504 | * |
chris | 0:3e7d2baed4b4 | 505 | * Description: This function is used to fill the setup packet |
chris | 0:3e7d2baed4b4 | 506 | * |
chris | 0:3e7d2baed4b4 | 507 | * Arguments : None |
chris | 0:3e7d2baed4b4 | 508 | * |
chris | 0:3e7d2baed4b4 | 509 | * Returns : OK if Success |
chris | 0:3e7d2baed4b4 | 510 | * ERR_INVALID_BOOTSIG if Failed |
chris | 0:3e7d2baed4b4 | 511 | * |
chris | 0:3e7d2baed4b4 | 512 | ************************************************************************************************************** |
chris | 0:3e7d2baed4b4 | 513 | */ |
chris | 0:3e7d2baed4b4 | 514 | |
chris | 0:3e7d2baed4b4 | 515 | void Host_FillSetup (USB_INT08U bm_request_type, |
chris | 0:3e7d2baed4b4 | 516 | USB_INT08U b_request, |
chris | 0:3e7d2baed4b4 | 517 | USB_INT16U w_value, |
chris | 0:3e7d2baed4b4 | 518 | USB_INT16U w_index, |
chris | 0:3e7d2baed4b4 | 519 | USB_INT16U w_length) |
chris | 0:3e7d2baed4b4 | 520 | { |
chris | 0:3e7d2baed4b4 | 521 | int i; |
chris | 0:3e7d2baed4b4 | 522 | for (i=0;i<w_length;i++) |
chris | 0:3e7d2baed4b4 | 523 | TDBuffer[i] = 0; |
chris | 0:3e7d2baed4b4 | 524 | |
chris | 0:3e7d2baed4b4 | 525 | TDBuffer[0] = bm_request_type; |
chris | 0:3e7d2baed4b4 | 526 | TDBuffer[1] = b_request; |
chris | 0:3e7d2baed4b4 | 527 | WriteLE16U(&TDBuffer[2], w_value); |
chris | 0:3e7d2baed4b4 | 528 | WriteLE16U(&TDBuffer[4], w_index); |
chris | 0:3e7d2baed4b4 | 529 | WriteLE16U(&TDBuffer[6], w_length); |
chris | 0:3e7d2baed4b4 | 530 | } |
chris | 0:3e7d2baed4b4 | 531 | |
chris | 0:3e7d2baed4b4 | 532 | |
chris | 0:3e7d2baed4b4 | 533 | |
chris | 0:3e7d2baed4b4 | 534 | /* |
chris | 0:3e7d2baed4b4 | 535 | ************************************************************************************************************** |
chris | 0:3e7d2baed4b4 | 536 | * INITIALIZE THE TRANSFER DESCRIPTOR |
chris | 0:3e7d2baed4b4 | 537 | * |
chris | 0:3e7d2baed4b4 | 538 | * Description: This function initializes transfer descriptor |
chris | 0:3e7d2baed4b4 | 539 | * |
chris | 0:3e7d2baed4b4 | 540 | * Arguments : Pointer to TD structure |
chris | 0:3e7d2baed4b4 | 541 | * |
chris | 0:3e7d2baed4b4 | 542 | * Returns : None |
chris | 0:3e7d2baed4b4 | 543 | * |
chris | 0:3e7d2baed4b4 | 544 | ************************************************************************************************************** |
chris | 0:3e7d2baed4b4 | 545 | */ |
chris | 0:3e7d2baed4b4 | 546 | |
chris | 0:3e7d2baed4b4 | 547 | void Host_TDInit (volatile HCTD *td) |
chris | 0:3e7d2baed4b4 | 548 | { |
chris | 0:3e7d2baed4b4 | 549 | |
chris | 0:3e7d2baed4b4 | 550 | td->Control = 0; |
chris | 0:3e7d2baed4b4 | 551 | td->CurrBufPtr = 0; |
chris | 0:3e7d2baed4b4 | 552 | td->Next = 0; |
chris | 0:3e7d2baed4b4 | 553 | td->BufEnd = 0; |
chris | 0:3e7d2baed4b4 | 554 | } |
chris | 0:3e7d2baed4b4 | 555 | |
chris | 0:3e7d2baed4b4 | 556 | /* |
chris | 0:3e7d2baed4b4 | 557 | ************************************************************************************************************** |
chris | 0:3e7d2baed4b4 | 558 | * INITIALIZE THE ENDPOINT DESCRIPTOR |
chris | 0:3e7d2baed4b4 | 559 | * |
chris | 0:3e7d2baed4b4 | 560 | * Description: This function initializes endpoint descriptor |
chris | 0:3e7d2baed4b4 | 561 | * |
chris | 0:3e7d2baed4b4 | 562 | * Arguments : Pointer to ED strcuture |
chris | 0:3e7d2baed4b4 | 563 | * |
chris | 0:3e7d2baed4b4 | 564 | * Returns : None |
chris | 0:3e7d2baed4b4 | 565 | * |
chris | 0:3e7d2baed4b4 | 566 | ************************************************************************************************************** |
chris | 0:3e7d2baed4b4 | 567 | */ |
chris | 0:3e7d2baed4b4 | 568 | |
chris | 0:3e7d2baed4b4 | 569 | void Host_EDInit (volatile HCED *ed) |
chris | 0:3e7d2baed4b4 | 570 | { |
chris | 0:3e7d2baed4b4 | 571 | |
chris | 0:3e7d2baed4b4 | 572 | ed->Control = 0; |
chris | 0:3e7d2baed4b4 | 573 | ed->TailTd = 0; |
chris | 0:3e7d2baed4b4 | 574 | ed->HeadTd = 0; |
chris | 0:3e7d2baed4b4 | 575 | ed->Next = 0; |
chris | 0:3e7d2baed4b4 | 576 | } |
chris | 0:3e7d2baed4b4 | 577 | |
chris | 0:3e7d2baed4b4 | 578 | /* |
chris | 0:3e7d2baed4b4 | 579 | ************************************************************************************************************** |
chris | 0:3e7d2baed4b4 | 580 | * INITIALIZE HOST CONTROLLER COMMUNICATIONS AREA |
chris | 0:3e7d2baed4b4 | 581 | * |
chris | 0:3e7d2baed4b4 | 582 | * Description: This function initializes host controller communications area |
chris | 0:3e7d2baed4b4 | 583 | * |
chris | 0:3e7d2baed4b4 | 584 | * Arguments : Pointer to HCCA |
chris | 0:3e7d2baed4b4 | 585 | * |
chris | 0:3e7d2baed4b4 | 586 | * Returns : |
chris | 0:3e7d2baed4b4 | 587 | * |
chris | 0:3e7d2baed4b4 | 588 | ************************************************************************************************************** |
chris | 0:3e7d2baed4b4 | 589 | */ |
chris | 0:3e7d2baed4b4 | 590 | |
chris | 0:3e7d2baed4b4 | 591 | void Host_HCCAInit (volatile HCCA *hcca) |
chris | 0:3e7d2baed4b4 | 592 | { |
chris | 0:3e7d2baed4b4 | 593 | USB_INT32U i; |
chris | 0:3e7d2baed4b4 | 594 | |
chris | 0:3e7d2baed4b4 | 595 | |
chris | 0:3e7d2baed4b4 | 596 | for (i = 0; i < 32; i++) { |
chris | 0:3e7d2baed4b4 | 597 | |
chris | 0:3e7d2baed4b4 | 598 | hcca->IntTable[i] = 0; |
chris | 0:3e7d2baed4b4 | 599 | hcca->FrameNumber = 0; |
chris | 0:3e7d2baed4b4 | 600 | hcca->DoneHead = 0; |
chris | 0:3e7d2baed4b4 | 601 | } |
chris | 0:3e7d2baed4b4 | 602 | |
chris | 0:3e7d2baed4b4 | 603 | } |
chris | 0:3e7d2baed4b4 | 604 | |
chris | 0:3e7d2baed4b4 | 605 | /* |
chris | 0:3e7d2baed4b4 | 606 | ************************************************************************************************************** |
chris | 0:3e7d2baed4b4 | 607 | * WAIT FOR WDH INTERRUPT |
chris | 0:3e7d2baed4b4 | 608 | * |
chris | 0:3e7d2baed4b4 | 609 | * Description: This function is infinite loop which breaks when ever a WDH interrupt rises |
chris | 0:3e7d2baed4b4 | 610 | * |
chris | 0:3e7d2baed4b4 | 611 | * Arguments : None |
chris | 0:3e7d2baed4b4 | 612 | * |
chris | 0:3e7d2baed4b4 | 613 | * Returns : None |
chris | 0:3e7d2baed4b4 | 614 | * |
chris | 0:3e7d2baed4b4 | 615 | ************************************************************************************************************** |
chris | 0:3e7d2baed4b4 | 616 | */ |
chris | 0:3e7d2baed4b4 | 617 | |
chris | 0:3e7d2baed4b4 | 618 | void Host_WDHWait (void) |
chris | 0:3e7d2baed4b4 | 619 | { |
chris | 1:a82ee02f2e91 | 620 | while (!HOST_WdhIntr) { |
chris | 1:a82ee02f2e91 | 621 | ; |
chris | 1:a82ee02f2e91 | 622 | } |
chris | 0:3e7d2baed4b4 | 623 | HOST_WdhIntr = 0; |
chris | 0:3e7d2baed4b4 | 624 | } |
chris | 0:3e7d2baed4b4 | 625 | |
chris | 1:a82ee02f2e91 | 626 | |
chris | 1:a82ee02f2e91 | 627 | |
chris | 1:a82ee02f2e91 | 628 | |
chris | 1:a82ee02f2e91 | 629 | |
chris | 1:a82ee02f2e91 | 630 | |
chris | 1:a82ee02f2e91 | 631 | |
chris | 1:a82ee02f2e91 | 632 | |
chris | 0:3e7d2baed4b4 | 633 | /* |
chris | 0:3e7d2baed4b4 | 634 | ************************************************************************************************************** |
chris | 0:3e7d2baed4b4 | 635 | * READ LE 32U |
chris | 0:3e7d2baed4b4 | 636 | * |
chris | 0:3e7d2baed4b4 | 637 | * Description: This function is used to read an unsigned integer from a character buffer in the platform |
chris | 0:3e7d2baed4b4 | 638 | * containing little endian processor |
chris | 0:3e7d2baed4b4 | 639 | * |
chris | 0:3e7d2baed4b4 | 640 | * Arguments : pmem Pointer to the character buffer |
chris | 0:3e7d2baed4b4 | 641 | * |
chris | 0:3e7d2baed4b4 | 642 | * Returns : val Unsigned integer |
chris | 0:3e7d2baed4b4 | 643 | * |
chris | 0:3e7d2baed4b4 | 644 | ************************************************************************************************************** |
chris | 0:3e7d2baed4b4 | 645 | */ |
chris | 0:3e7d2baed4b4 | 646 | |
chris | 0:3e7d2baed4b4 | 647 | USB_INT32U ReadLE32U (volatile USB_INT08U *pmem) |
chris | 0:3e7d2baed4b4 | 648 | { |
chris | 0:3e7d2baed4b4 | 649 | USB_INT32U val = *(USB_INT32U*)pmem; |
chris | 0:3e7d2baed4b4 | 650 | #ifdef __BIG_ENDIAN |
chris | 0:3e7d2baed4b4 | 651 | return __REV(val); |
chris | 0:3e7d2baed4b4 | 652 | #else |
chris | 0:3e7d2baed4b4 | 653 | return val; |
chris | 0:3e7d2baed4b4 | 654 | #endif |
chris | 0:3e7d2baed4b4 | 655 | } |
chris | 0:3e7d2baed4b4 | 656 | |
chris | 0:3e7d2baed4b4 | 657 | /* |
chris | 0:3e7d2baed4b4 | 658 | ************************************************************************************************************** |
chris | 0:3e7d2baed4b4 | 659 | * WRITE LE 32U |
chris | 0:3e7d2baed4b4 | 660 | * |
chris | 0:3e7d2baed4b4 | 661 | * Description: This function is used to write an unsigned integer into a charecter buffer in the platform |
chris | 0:3e7d2baed4b4 | 662 | * containing little endian processor. |
chris | 0:3e7d2baed4b4 | 663 | * |
chris | 0:3e7d2baed4b4 | 664 | * Arguments : pmem Pointer to the charecter buffer |
chris | 0:3e7d2baed4b4 | 665 | * val Integer value to be placed in the charecter buffer |
chris | 0:3e7d2baed4b4 | 666 | * |
chris | 0:3e7d2baed4b4 | 667 | * Returns : None |
chris | 0:3e7d2baed4b4 | 668 | * |
chris | 0:3e7d2baed4b4 | 669 | ************************************************************************************************************** |
chris | 0:3e7d2baed4b4 | 670 | */ |
chris | 0:3e7d2baed4b4 | 671 | |
chris | 0:3e7d2baed4b4 | 672 | void WriteLE32U (volatile USB_INT08U *pmem, |
chris | 0:3e7d2baed4b4 | 673 | USB_INT32U val) |
chris | 0:3e7d2baed4b4 | 674 | { |
chris | 0:3e7d2baed4b4 | 675 | #ifdef __BIG_ENDIAN |
chris | 0:3e7d2baed4b4 | 676 | *(USB_INT32U*)pmem = __REV(val); |
chris | 0:3e7d2baed4b4 | 677 | #else |
chris | 0:3e7d2baed4b4 | 678 | *(USB_INT32U*)pmem = val; |
chris | 0:3e7d2baed4b4 | 679 | #endif |
chris | 0:3e7d2baed4b4 | 680 | } |
chris | 0:3e7d2baed4b4 | 681 | |
chris | 0:3e7d2baed4b4 | 682 | /* |
chris | 0:3e7d2baed4b4 | 683 | ************************************************************************************************************** |
chris | 0:3e7d2baed4b4 | 684 | * READ LE 16U |
chris | 0:3e7d2baed4b4 | 685 | * |
chris | 0:3e7d2baed4b4 | 686 | * Description: This function is used to read an unsigned short integer from a charecter buffer in the platform |
chris | 0:3e7d2baed4b4 | 687 | * containing little endian processor |
chris | 0:3e7d2baed4b4 | 688 | * |
chris | 0:3e7d2baed4b4 | 689 | * Arguments : pmem Pointer to the charecter buffer |
chris | 0:3e7d2baed4b4 | 690 | * |
chris | 0:3e7d2baed4b4 | 691 | * Returns : val Unsigned short integer |
chris | 0:3e7d2baed4b4 | 692 | * |
chris | 0:3e7d2baed4b4 | 693 | ************************************************************************************************************** |
chris | 0:3e7d2baed4b4 | 694 | */ |
chris | 0:3e7d2baed4b4 | 695 | |
chris | 0:3e7d2baed4b4 | 696 | USB_INT16U ReadLE16U (volatile USB_INT08U *pmem) |
chris | 0:3e7d2baed4b4 | 697 | { |
chris | 0:3e7d2baed4b4 | 698 | USB_INT16U val = *(USB_INT16U*)pmem; |
chris | 0:3e7d2baed4b4 | 699 | #ifdef __BIG_ENDIAN |
chris | 0:3e7d2baed4b4 | 700 | return __REV16(val); |
chris | 0:3e7d2baed4b4 | 701 | #else |
chris | 0:3e7d2baed4b4 | 702 | return val; |
chris | 0:3e7d2baed4b4 | 703 | #endif |
chris | 0:3e7d2baed4b4 | 704 | } |
chris | 0:3e7d2baed4b4 | 705 | |
chris | 0:3e7d2baed4b4 | 706 | /* |
chris | 0:3e7d2baed4b4 | 707 | ************************************************************************************************************** |
chris | 0:3e7d2baed4b4 | 708 | * WRITE LE 16U |
chris | 0:3e7d2baed4b4 | 709 | * |
chris | 0:3e7d2baed4b4 | 710 | * Description: This function is used to write an unsigned short integer into a charecter buffer in the |
chris | 0:3e7d2baed4b4 | 711 | * platform containing little endian processor |
chris | 0:3e7d2baed4b4 | 712 | * |
chris | 0:3e7d2baed4b4 | 713 | * Arguments : pmem Pointer to the charecter buffer |
chris | 0:3e7d2baed4b4 | 714 | * val Value to be placed in the charecter buffer |
chris | 0:3e7d2baed4b4 | 715 | * |
chris | 0:3e7d2baed4b4 | 716 | * Returns : None |
chris | 0:3e7d2baed4b4 | 717 | * |
chris | 0:3e7d2baed4b4 | 718 | ************************************************************************************************************** |
chris | 0:3e7d2baed4b4 | 719 | */ |
chris | 0:3e7d2baed4b4 | 720 | |
chris | 0:3e7d2baed4b4 | 721 | void WriteLE16U (volatile USB_INT08U *pmem, |
chris | 0:3e7d2baed4b4 | 722 | USB_INT16U val) |
chris | 0:3e7d2baed4b4 | 723 | { |
chris | 0:3e7d2baed4b4 | 724 | #ifdef __BIG_ENDIAN |
chris | 0:3e7d2baed4b4 | 725 | *(USB_INT16U*)pmem = (__REV16(val) & 0xFFFF); |
chris | 0:3e7d2baed4b4 | 726 | #else |
chris | 0:3e7d2baed4b4 | 727 | *(USB_INT16U*)pmem = val; |
chris | 0:3e7d2baed4b4 | 728 | #endif |
chris | 0:3e7d2baed4b4 | 729 | } |
chris | 0:3e7d2baed4b4 | 730 | |
chris | 0:3e7d2baed4b4 | 731 | /* |
chris | 0:3e7d2baed4b4 | 732 | ************************************************************************************************************** |
chris | 0:3e7d2baed4b4 | 733 | * READ BE 32U |
chris | 0:3e7d2baed4b4 | 734 | * |
chris | 0:3e7d2baed4b4 | 735 | * Description: This function is used to read an unsigned integer from a charecter buffer in the platform |
chris | 0:3e7d2baed4b4 | 736 | * containing big endian processor |
chris | 0:3e7d2baed4b4 | 737 | * |
chris | 0:3e7d2baed4b4 | 738 | * Arguments : pmem Pointer to the charecter buffer |
chris | 0:3e7d2baed4b4 | 739 | * |
chris | 0:3e7d2baed4b4 | 740 | * Returns : val Unsigned integer |
chris | 0:3e7d2baed4b4 | 741 | * |
chris | 0:3e7d2baed4b4 | 742 | ************************************************************************************************************** |
chris | 0:3e7d2baed4b4 | 743 | */ |
chris | 0:3e7d2baed4b4 | 744 | |
chris | 0:3e7d2baed4b4 | 745 | USB_INT32U ReadBE32U (volatile USB_INT08U *pmem) |
chris | 0:3e7d2baed4b4 | 746 | { |
chris | 0:3e7d2baed4b4 | 747 | USB_INT32U val = *(USB_INT32U*)pmem; |
chris | 0:3e7d2baed4b4 | 748 | #ifdef __BIG_ENDIAN |
chris | 0:3e7d2baed4b4 | 749 | return val; |
chris | 0:3e7d2baed4b4 | 750 | #else |
chris | 0:3e7d2baed4b4 | 751 | return __REV(val); |
chris | 0:3e7d2baed4b4 | 752 | #endif |
chris | 0:3e7d2baed4b4 | 753 | } |
chris | 0:3e7d2baed4b4 | 754 | |
chris | 0:3e7d2baed4b4 | 755 | /* |
chris | 0:3e7d2baed4b4 | 756 | ************************************************************************************************************** |
chris | 0:3e7d2baed4b4 | 757 | * WRITE BE 32U |
chris | 0:3e7d2baed4b4 | 758 | * |
chris | 0:3e7d2baed4b4 | 759 | * Description: This function is used to write an unsigned integer into a charecter buffer in the platform |
chris | 0:3e7d2baed4b4 | 760 | * containing big endian processor |
chris | 0:3e7d2baed4b4 | 761 | * |
chris | 0:3e7d2baed4b4 | 762 | * Arguments : pmem Pointer to the charecter buffer |
chris | 0:3e7d2baed4b4 | 763 | * val Value to be placed in the charecter buffer |
chris | 0:3e7d2baed4b4 | 764 | * |
chris | 0:3e7d2baed4b4 | 765 | * Returns : None |
chris | 0:3e7d2baed4b4 | 766 | * |
chris | 0:3e7d2baed4b4 | 767 | ************************************************************************************************************** |
chris | 0:3e7d2baed4b4 | 768 | */ |
chris | 0:3e7d2baed4b4 | 769 | |
chris | 0:3e7d2baed4b4 | 770 | void WriteBE32U (volatile USB_INT08U *pmem, |
chris | 0:3e7d2baed4b4 | 771 | USB_INT32U val) |
chris | 0:3e7d2baed4b4 | 772 | { |
chris | 0:3e7d2baed4b4 | 773 | #ifdef __BIG_ENDIAN |
chris | 0:3e7d2baed4b4 | 774 | *(USB_INT32U*)pmem = val; |
chris | 0:3e7d2baed4b4 | 775 | #else |
chris | 0:3e7d2baed4b4 | 776 | *(USB_INT32U*)pmem = __REV(val); |
chris | 0:3e7d2baed4b4 | 777 | #endif |
chris | 0:3e7d2baed4b4 | 778 | } |
chris | 0:3e7d2baed4b4 | 779 | |
chris | 0:3e7d2baed4b4 | 780 | /* |
chris | 0:3e7d2baed4b4 | 781 | ************************************************************************************************************** |
chris | 0:3e7d2baed4b4 | 782 | * READ BE 16U |
chris | 0:3e7d2baed4b4 | 783 | * |
chris | 0:3e7d2baed4b4 | 784 | * Description: This function is used to read an unsigned short integer from a charecter buffer in the platform |
chris | 0:3e7d2baed4b4 | 785 | * containing big endian processor |
chris | 0:3e7d2baed4b4 | 786 | * |
chris | 0:3e7d2baed4b4 | 787 | * Arguments : pmem Pointer to the charecter buffer |
chris | 0:3e7d2baed4b4 | 788 | * |
chris | 0:3e7d2baed4b4 | 789 | * Returns : val Unsigned short integer |
chris | 0:3e7d2baed4b4 | 790 | * |
chris | 0:3e7d2baed4b4 | 791 | ************************************************************************************************************** |
chris | 0:3e7d2baed4b4 | 792 | */ |
chris | 0:3e7d2baed4b4 | 793 | |
chris | 0:3e7d2baed4b4 | 794 | USB_INT16U ReadBE16U (volatile USB_INT08U *pmem) |
chris | 0:3e7d2baed4b4 | 795 | { |
chris | 0:3e7d2baed4b4 | 796 | USB_INT16U val = *(USB_INT16U*)pmem; |
chris | 0:3e7d2baed4b4 | 797 | #ifdef __BIG_ENDIAN |
chris | 0:3e7d2baed4b4 | 798 | return val; |
chris | 0:3e7d2baed4b4 | 799 | #else |
chris | 0:3e7d2baed4b4 | 800 | return __REV16(val); |
chris | 0:3e7d2baed4b4 | 801 | #endif |
chris | 0:3e7d2baed4b4 | 802 | } |
chris | 0:3e7d2baed4b4 | 803 | |
chris | 0:3e7d2baed4b4 | 804 | /* |
chris | 0:3e7d2baed4b4 | 805 | ************************************************************************************************************** |
chris | 0:3e7d2baed4b4 | 806 | * WRITE BE 16U |
chris | 0:3e7d2baed4b4 | 807 | * |
chris | 0:3e7d2baed4b4 | 808 | * Description: This function is used to write an unsigned short integer into the charecter buffer in the |
chris | 0:3e7d2baed4b4 | 809 | * platform containing big endian processor |
chris | 0:3e7d2baed4b4 | 810 | * |
chris | 0:3e7d2baed4b4 | 811 | * Arguments : pmem Pointer to the charecter buffer |
chris | 0:3e7d2baed4b4 | 812 | * val Value to be placed in the charecter buffer |
chris | 0:3e7d2baed4b4 | 813 | * |
chris | 0:3e7d2baed4b4 | 814 | * Returns : None |
chris | 0:3e7d2baed4b4 | 815 | * |
chris | 0:3e7d2baed4b4 | 816 | ************************************************************************************************************** |
chris | 0:3e7d2baed4b4 | 817 | */ |
chris | 0:3e7d2baed4b4 | 818 | |
chris | 0:3e7d2baed4b4 | 819 | void WriteBE16U (volatile USB_INT08U *pmem, |
chris | 0:3e7d2baed4b4 | 820 | USB_INT16U val) |
chris | 0:3e7d2baed4b4 | 821 | { |
chris | 0:3e7d2baed4b4 | 822 | #ifdef __BIG_ENDIAN |
chris | 0:3e7d2baed4b4 | 823 | *(USB_INT16U*)pmem = val; |
chris | 0:3e7d2baed4b4 | 824 | #else |
chris | 0:3e7d2baed4b4 | 825 | *(USB_INT16U*)pmem = (__REV16(val) & 0xFFFF); |
chris | 0:3e7d2baed4b4 | 826 | #endif |
chris | 0:3e7d2baed4b4 | 827 | } |