Ankit Patel / Mbed 2 deprecated Robot_Control_UDP_Wifi

Control a robot over the internet using UDP and a Wifly module (WiFi).

Dependencies:   Motor TextLCD WiflyInterface mbed-rtos mbed

mbed-rtos/rtx/TARGET_M3/TOOLCHAIN_ARM/HAL_CM3.c@0:c0dc3a76f3d4, 2013-10-17 (annotated)

Committer:
apatel336
Date:
Thu Oct 17 13:27:56 2013 +0000
Revision:
0:c0dc3a76f3d4
Initial Release

Who changed what in which revision?

UserRevisionLine numberNew contents of line
apatel336 0:c0dc3a76f3d4 1 /*----------------------------------------------------------------------------
apatel336 0:c0dc3a76f3d4 2 * RL-ARM - RTX
apatel336 0:c0dc3a76f3d4 3 *----------------------------------------------------------------------------
apatel336 0:c0dc3a76f3d4 4 * Name: HAL_CM3.C
apatel336 0:c0dc3a76f3d4 5 * Purpose: Hardware Abstraction Layer for Cortex-M3
apatel336 0:c0dc3a76f3d4 6 * Rev.: V4.60
apatel336 0:c0dc3a76f3d4 7 *----------------------------------------------------------------------------
apatel336 0:c0dc3a76f3d4 8 *
apatel336 0:c0dc3a76f3d4 9 * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
apatel336 0:c0dc3a76f3d4 10 * All rights reserved.
apatel336 0:c0dc3a76f3d4 11 * Redistribution and use in source and binary forms, with or without
apatel336 0:c0dc3a76f3d4 12 * modification, are permitted provided that the following conditions are met:
apatel336 0:c0dc3a76f3d4 13 * - Redistributions of source code must retain the above copyright
apatel336 0:c0dc3a76f3d4 14 * notice, this list of conditions and the following disclaimer.
apatel336 0:c0dc3a76f3d4 15 * - Redistributions in binary form must reproduce the above copyright
apatel336 0:c0dc3a76f3d4 16 * notice, this list of conditions and the following disclaimer in the
apatel336 0:c0dc3a76f3d4 17 * documentation and/or other materials provided with the distribution.
apatel336 0:c0dc3a76f3d4 18 * - Neither the name of ARM nor the names of its contributors may be used
apatel336 0:c0dc3a76f3d4 19 * to endorse or promote products derived from this software without
apatel336 0:c0dc3a76f3d4 20 * specific prior written permission.
apatel336 0:c0dc3a76f3d4 21 *
apatel336 0:c0dc3a76f3d4 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
apatel336 0:c0dc3a76f3d4 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
apatel336 0:c0dc3a76f3d4 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
apatel336 0:c0dc3a76f3d4 25 * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
apatel336 0:c0dc3a76f3d4 26 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
apatel336 0:c0dc3a76f3d4 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
apatel336 0:c0dc3a76f3d4 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
apatel336 0:c0dc3a76f3d4 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
apatel336 0:c0dc3a76f3d4 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
apatel336 0:c0dc3a76f3d4 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
apatel336 0:c0dc3a76f3d4 32 * POSSIBILITY OF SUCH DAMAGE.
apatel336 0:c0dc3a76f3d4 33 *---------------------------------------------------------------------------*/
apatel336 0:c0dc3a76f3d4 34
apatel336 0:c0dc3a76f3d4 35 #include "rt_TypeDef.h"
apatel336 0:c0dc3a76f3d4 36 #include "RTX_Conf.h"
apatel336 0:c0dc3a76f3d4 37 #include "rt_System.h"
apatel336 0:c0dc3a76f3d4 38 #include "rt_HAL_CM.h"
apatel336 0:c0dc3a76f3d4 39 #include "rt_Task.h"
apatel336 0:c0dc3a76f3d4 40 #include "rt_MemBox.h"
apatel336 0:c0dc3a76f3d4 41
apatel336 0:c0dc3a76f3d4 42
apatel336 0:c0dc3a76f3d4 43 /*----------------------------------------------------------------------------
apatel336 0:c0dc3a76f3d4 44 * Functions
apatel336 0:c0dc3a76f3d4 45 *---------------------------------------------------------------------------*/
apatel336 0:c0dc3a76f3d4 46
apatel336 0:c0dc3a76f3d4 47
apatel336 0:c0dc3a76f3d4 48 /*--------------------------- rt_set_PSP ------------------------------------*/
apatel336 0:c0dc3a76f3d4 49
apatel336 0:c0dc3a76f3d4 50 __asm void rt_set_PSP (U32 stack) {
apatel336 0:c0dc3a76f3d4 51 MSR PSP,R0
apatel336 0:c0dc3a76f3d4 52 BX LR
apatel336 0:c0dc3a76f3d4 53 }
apatel336 0:c0dc3a76f3d4 54
apatel336 0:c0dc3a76f3d4 55
apatel336 0:c0dc3a76f3d4 56 /*--------------------------- rt_get_PSP ------------------------------------*/
apatel336 0:c0dc3a76f3d4 57
apatel336 0:c0dc3a76f3d4 58 __asm U32 rt_get_PSP (void) {
apatel336 0:c0dc3a76f3d4 59 MRS R0,PSP
apatel336 0:c0dc3a76f3d4 60 BX LR
apatel336 0:c0dc3a76f3d4 61 }
apatel336 0:c0dc3a76f3d4 62
apatel336 0:c0dc3a76f3d4 63
apatel336 0:c0dc3a76f3d4 64 /*--------------------------- os_set_env ------------------------------------*/
apatel336 0:c0dc3a76f3d4 65
apatel336 0:c0dc3a76f3d4 66 __asm void os_set_env (void) {
apatel336 0:c0dc3a76f3d4 67 /* Switch to Unprivileged/Privileged Thread mode, use PSP. */
apatel336 0:c0dc3a76f3d4 68 MOV R0,SP ; PSP = MSP
apatel336 0:c0dc3a76f3d4 69 MSR PSP,R0
apatel336 0:c0dc3a76f3d4 70 LDR R0,=__cpp(&os_flags)
apatel336 0:c0dc3a76f3d4 71 LDRB R0,[R0]
apatel336 0:c0dc3a76f3d4 72 LSLS R0,#31
apatel336 0:c0dc3a76f3d4 73 MOVNE R0,#0x02 ; Privileged Thread mode, use PSP
apatel336 0:c0dc3a76f3d4 74 MOVEQ R0,#0x03 ; Unprivileged Thread mode, use PSP
apatel336 0:c0dc3a76f3d4 75 MSR CONTROL,R0
apatel336 0:c0dc3a76f3d4 76 BX LR
apatel336 0:c0dc3a76f3d4 77
apatel336 0:c0dc3a76f3d4 78 ALIGN
apatel336 0:c0dc3a76f3d4 79 }
apatel336 0:c0dc3a76f3d4 80
apatel336 0:c0dc3a76f3d4 81
apatel336 0:c0dc3a76f3d4 82 /*--------------------------- _alloc_box ------------------------------------*/
apatel336 0:c0dc3a76f3d4 83
apatel336 0:c0dc3a76f3d4 84 __asm void *_alloc_box (void *box_mem) {
apatel336 0:c0dc3a76f3d4 85 /* Function wrapper for Unprivileged/Privileged mode. */
apatel336 0:c0dc3a76f3d4 86 LDR R12,=__cpp(rt_alloc_box)
apatel336 0:c0dc3a76f3d4 87 MRS R3,IPSR
apatel336 0:c0dc3a76f3d4 88 LSLS R3,#24
apatel336 0:c0dc3a76f3d4 89 BXNE R12
apatel336 0:c0dc3a76f3d4 90 MRS R3,CONTROL
apatel336 0:c0dc3a76f3d4 91 LSLS R3,#31
apatel336 0:c0dc3a76f3d4 92 BXEQ R12
apatel336 0:c0dc3a76f3d4 93 SVC 0
apatel336 0:c0dc3a76f3d4 94 BX LR
apatel336 0:c0dc3a76f3d4 95
apatel336 0:c0dc3a76f3d4 96 ALIGN
apatel336 0:c0dc3a76f3d4 97 }
apatel336 0:c0dc3a76f3d4 98
apatel336 0:c0dc3a76f3d4 99
apatel336 0:c0dc3a76f3d4 100 /*--------------------------- _free_box -------------------------------------*/
apatel336 0:c0dc3a76f3d4 101
apatel336 0:c0dc3a76f3d4 102 __asm int _free_box (void *box_mem, void *box) {
apatel336 0:c0dc3a76f3d4 103 /* Function wrapper for Unprivileged/Privileged mode. */
apatel336 0:c0dc3a76f3d4 104 LDR R12,=__cpp(rt_free_box)
apatel336 0:c0dc3a76f3d4 105 MRS R3,IPSR
apatel336 0:c0dc3a76f3d4 106 LSLS R3,#24
apatel336 0:c0dc3a76f3d4 107 BXNE R12
apatel336 0:c0dc3a76f3d4 108 MRS R3,CONTROL
apatel336 0:c0dc3a76f3d4 109 LSLS R3,#31
apatel336 0:c0dc3a76f3d4 110 BXEQ R12
apatel336 0:c0dc3a76f3d4 111 SVC 0
apatel336 0:c0dc3a76f3d4 112 BX LR
apatel336 0:c0dc3a76f3d4 113
apatel336 0:c0dc3a76f3d4 114 ALIGN
apatel336 0:c0dc3a76f3d4 115 }
apatel336 0:c0dc3a76f3d4 116
apatel336 0:c0dc3a76f3d4 117
apatel336 0:c0dc3a76f3d4 118 /*-------------------------- SVC_Handler ------------------------------------*/
apatel336 0:c0dc3a76f3d4 119
apatel336 0:c0dc3a76f3d4 120 __asm void SVC_Handler (void) {
apatel336 0:c0dc3a76f3d4 121 PRESERVE8
apatel336 0:c0dc3a76f3d4 122
apatel336 0:c0dc3a76f3d4 123 IMPORT SVC_Count
apatel336 0:c0dc3a76f3d4 124 IMPORT SVC_Table
apatel336 0:c0dc3a76f3d4 125 IMPORT rt_stk_check
apatel336 0:c0dc3a76f3d4 126
apatel336 0:c0dc3a76f3d4 127 MRS R0,PSP ; Read PSP
apatel336 0:c0dc3a76f3d4 128 LDR R1,[R0,#24] ; Read Saved PC from Stack
apatel336 0:c0dc3a76f3d4 129 LDRB R1,[R1,#-2] ; Load SVC Number
apatel336 0:c0dc3a76f3d4 130 CBNZ R1,SVC_User
apatel336 0:c0dc3a76f3d4 131
apatel336 0:c0dc3a76f3d4 132 LDM R0,{R0-R3,R12} ; Read R0-R3,R12 from stack
apatel336 0:c0dc3a76f3d4 133 BLX R12 ; Call SVC Function
apatel336 0:c0dc3a76f3d4 134
apatel336 0:c0dc3a76f3d4 135 MRS R12,PSP ; Read PSP
apatel336 0:c0dc3a76f3d4 136 STM R12,{R0-R2} ; Store return values
apatel336 0:c0dc3a76f3d4 137
apatel336 0:c0dc3a76f3d4 138 LDR R3,=__cpp(&os_tsk)
apatel336 0:c0dc3a76f3d4 139 LDM R3,{R1,R2} ; os_tsk.run, os_tsk.new
apatel336 0:c0dc3a76f3d4 140 CMP R1,R2
apatel336 0:c0dc3a76f3d4 141 BEQ SVC_Exit ; no task switch
apatel336 0:c0dc3a76f3d4 142
apatel336 0:c0dc3a76f3d4 143 CBZ R1,SVC_Next ; Runtask deleted?
apatel336 0:c0dc3a76f3d4 144 STMDB R12!,{R4-R11} ; Save Old context
apatel336 0:c0dc3a76f3d4 145 STR R12,[R1,#TCB_TSTACK] ; Update os_tsk.run->tsk_stack
apatel336 0:c0dc3a76f3d4 146
apatel336 0:c0dc3a76f3d4 147 PUSH {R2,R3}
apatel336 0:c0dc3a76f3d4 148 BL rt_stk_check ; Check for Stack overflow
apatel336 0:c0dc3a76f3d4 149 POP {R2,R3}
apatel336 0:c0dc3a76f3d4 150
apatel336 0:c0dc3a76f3d4 151 SVC_Next
apatel336 0:c0dc3a76f3d4 152 STR R2,[R3] ; os_tsk.run = os_tsk.new
apatel336 0:c0dc3a76f3d4 153
apatel336 0:c0dc3a76f3d4 154 LDR R12,[R2,#TCB_TSTACK] ; os_tsk.new->tsk_stack
apatel336 0:c0dc3a76f3d4 155 LDMIA R12!,{R4-R11} ; Restore New Context
apatel336 0:c0dc3a76f3d4 156 MSR PSP,R12 ; Write PSP
apatel336 0:c0dc3a76f3d4 157
apatel336 0:c0dc3a76f3d4 158 SVC_Exit
apatel336 0:c0dc3a76f3d4 159 MVN LR,#:NOT:0xFFFFFFFD ; set EXC_RETURN value
apatel336 0:c0dc3a76f3d4 160 BX LR
apatel336 0:c0dc3a76f3d4 161
apatel336 0:c0dc3a76f3d4 162 /*------------------- User SVC ------------------------------*/
apatel336 0:c0dc3a76f3d4 163
apatel336 0:c0dc3a76f3d4 164 SVC_User
apatel336 0:c0dc3a76f3d4 165 PUSH {R4,LR} ; Save Registers
apatel336 0:c0dc3a76f3d4 166 LDR R2,=SVC_Count
apatel336 0:c0dc3a76f3d4 167 LDR R2,[R2]
apatel336 0:c0dc3a76f3d4 168 CMP R1,R2
apatel336 0:c0dc3a76f3d4 169 BHI SVC_Done ; Overflow
apatel336 0:c0dc3a76f3d4 170
apatel336 0:c0dc3a76f3d4 171 LDR R4,=SVC_Table-4
apatel336 0:c0dc3a76f3d4 172 LDR R4,[R4,R1,LSL #2] ; Load SVC Function Address
apatel336 0:c0dc3a76f3d4 173
apatel336 0:c0dc3a76f3d4 174 LDM R0,{R0-R3,R12} ; Read R0-R3,R12 from stack
apatel336 0:c0dc3a76f3d4 175 BLX R4 ; Call SVC Function
apatel336 0:c0dc3a76f3d4 176
apatel336 0:c0dc3a76f3d4 177 MRS R12,PSP
apatel336 0:c0dc3a76f3d4 178 STM R12,{R0-R3} ; Function return values
apatel336 0:c0dc3a76f3d4 179 SVC_Done
apatel336 0:c0dc3a76f3d4 180 POP {R4,PC} ; RETI
apatel336 0:c0dc3a76f3d4 181
apatel336 0:c0dc3a76f3d4 182 ALIGN
apatel336 0:c0dc3a76f3d4 183 }
apatel336 0:c0dc3a76f3d4 184
apatel336 0:c0dc3a76f3d4 185
apatel336 0:c0dc3a76f3d4 186 /*-------------------------- PendSV_Handler ---------------------------------*/
apatel336 0:c0dc3a76f3d4 187
apatel336 0:c0dc3a76f3d4 188 __asm void PendSV_Handler (void) {
apatel336 0:c0dc3a76f3d4 189 PRESERVE8
apatel336 0:c0dc3a76f3d4 190
apatel336 0:c0dc3a76f3d4 191 BL __cpp(rt_pop_req)
apatel336 0:c0dc3a76f3d4 192
apatel336 0:c0dc3a76f3d4 193 Sys_Switch
apatel336 0:c0dc3a76f3d4 194 LDR R3,=__cpp(&os_tsk)
apatel336 0:c0dc3a76f3d4 195 LDM R3,{R1,R2} ; os_tsk.run, os_tsk.new
apatel336 0:c0dc3a76f3d4 196 CMP R1,R2
apatel336 0:c0dc3a76f3d4 197 BEQ Sys_Exit
apatel336 0:c0dc3a76f3d4 198
apatel336 0:c0dc3a76f3d4 199 MRS R12,PSP ; Read PSP
apatel336 0:c0dc3a76f3d4 200 STMDB R12!,{R4-R11} ; Save Old context
apatel336 0:c0dc3a76f3d4 201 STR R12,[R1,#TCB_TSTACK] ; Update os_tsk.run->tsk_stack
apatel336 0:c0dc3a76f3d4 202
apatel336 0:c0dc3a76f3d4 203 PUSH {R2,R3}
apatel336 0:c0dc3a76f3d4 204 BL rt_stk_check ; Check for Stack overflow
apatel336 0:c0dc3a76f3d4 205 POP {R2,R3}
apatel336 0:c0dc3a76f3d4 206
apatel336 0:c0dc3a76f3d4 207 STR R2,[R3] ; os_tsk.run = os_tsk.new
apatel336 0:c0dc3a76f3d4 208
apatel336 0:c0dc3a76f3d4 209 LDR R12,[R2,#TCB_TSTACK] ; os_tsk.new->tsk_stack
apatel336 0:c0dc3a76f3d4 210 LDMIA R12!,{R4-R11} ; Restore New Context
apatel336 0:c0dc3a76f3d4 211 MSR PSP,R12 ; Write PSP
apatel336 0:c0dc3a76f3d4 212
apatel336 0:c0dc3a76f3d4 213 Sys_Exit
apatel336 0:c0dc3a76f3d4 214 MVN LR,#:NOT:0xFFFFFFFD ; set EXC_RETURN value
apatel336 0:c0dc3a76f3d4 215 BX LR ; Return to Thread Mode
apatel336 0:c0dc3a76f3d4 216
apatel336 0:c0dc3a76f3d4 217 ALIGN
apatel336 0:c0dc3a76f3d4 218 }
apatel336 0:c0dc3a76f3d4 219
apatel336 0:c0dc3a76f3d4 220
apatel336 0:c0dc3a76f3d4 221 /*-------------------------- SysTick_Handler --------------------------------*/
apatel336 0:c0dc3a76f3d4 222
apatel336 0:c0dc3a76f3d4 223 __asm void SysTick_Handler (void) {
apatel336 0:c0dc3a76f3d4 224 PRESERVE8
apatel336 0:c0dc3a76f3d4 225
apatel336 0:c0dc3a76f3d4 226 BL __cpp(rt_systick)
apatel336 0:c0dc3a76f3d4 227 B Sys_Switch
apatel336 0:c0dc3a76f3d4 228
apatel336 0:c0dc3a76f3d4 229 ALIGN
apatel336 0:c0dc3a76f3d4 230 }
apatel336 0:c0dc3a76f3d4 231
apatel336 0:c0dc3a76f3d4 232
apatel336 0:c0dc3a76f3d4 233 /*-------------------------- OS_Tick_Handler --------------------------------*/
apatel336 0:c0dc3a76f3d4 234
apatel336 0:c0dc3a76f3d4 235 __asm void OS_Tick_Handler (void) {
apatel336 0:c0dc3a76f3d4 236 PRESERVE8
apatel336 0:c0dc3a76f3d4 237
apatel336 0:c0dc3a76f3d4 238 BL __cpp(os_tick_irqack)
apatel336 0:c0dc3a76f3d4 239 BL __cpp(rt_systick)
apatel336 0:c0dc3a76f3d4 240 B Sys_Switch
apatel336 0:c0dc3a76f3d4 241
apatel336 0:c0dc3a76f3d4 242 ALIGN
apatel336 0:c0dc3a76f3d4 243 }
apatel336 0:c0dc3a76f3d4 244
apatel336 0:c0dc3a76f3d4 245
apatel336 0:c0dc3a76f3d4 246 /*----------------------------------------------------------------------------
apatel336 0:c0dc3a76f3d4 247 * end of file
apatel336 0:c0dc3a76f3d4 248 *---------------------------------------------------------------------------*/
apatel336 0:c0dc3a76f3d4 249