Control a robot over the internet using UDP and a Wifly module (WiFi).

Dependencies:   Motor TextLCD WiflyInterface mbed-rtos mbed

Committer:
apatel336
Date:
Thu Oct 17 13:27:56 2013 +0000
Revision:
0:c0dc3a76f3d4
Initial Release

Who changed what in which revision?

UserRevisionLine numberNew contents of line
apatel336 0:c0dc3a76f3d4 1 /*----------------------------------------------------------------------------
apatel336 0:c0dc3a76f3d4 2 * RL-ARM - RTX
apatel336 0:c0dc3a76f3d4 3 *----------------------------------------------------------------------------
apatel336 0:c0dc3a76f3d4 4 * Name: HAL_CM0.C
apatel336 0:c0dc3a76f3d4 5 * Purpose: Hardware Abstraction Layer for Cortex-M0
apatel336 0:c0dc3a76f3d4 6 * Rev.: V4.60
apatel336 0:c0dc3a76f3d4 7 *----------------------------------------------------------------------------
apatel336 0:c0dc3a76f3d4 8 *
apatel336 0:c0dc3a76f3d4 9 * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
apatel336 0:c0dc3a76f3d4 10 * All rights reserved.
apatel336 0:c0dc3a76f3d4 11 * Redistribution and use in source and binary forms, with or without
apatel336 0:c0dc3a76f3d4 12 * modification, are permitted provided that the following conditions are met:
apatel336 0:c0dc3a76f3d4 13 * - Redistributions of source code must retain the above copyright
apatel336 0:c0dc3a76f3d4 14 * notice, this list of conditions and the following disclaimer.
apatel336 0:c0dc3a76f3d4 15 * - Redistributions in binary form must reproduce the above copyright
apatel336 0:c0dc3a76f3d4 16 * notice, this list of conditions and the following disclaimer in the
apatel336 0:c0dc3a76f3d4 17 * documentation and/or other materials provided with the distribution.
apatel336 0:c0dc3a76f3d4 18 * - Neither the name of ARM nor the names of its contributors may be used
apatel336 0:c0dc3a76f3d4 19 * to endorse or promote products derived from this software without
apatel336 0:c0dc3a76f3d4 20 * specific prior written permission.
apatel336 0:c0dc3a76f3d4 21 *
apatel336 0:c0dc3a76f3d4 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
apatel336 0:c0dc3a76f3d4 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
apatel336 0:c0dc3a76f3d4 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
apatel336 0:c0dc3a76f3d4 25 * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
apatel336 0:c0dc3a76f3d4 26 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
apatel336 0:c0dc3a76f3d4 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
apatel336 0:c0dc3a76f3d4 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
apatel336 0:c0dc3a76f3d4 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
apatel336 0:c0dc3a76f3d4 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
apatel336 0:c0dc3a76f3d4 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
apatel336 0:c0dc3a76f3d4 32 * POSSIBILITY OF SUCH DAMAGE.
apatel336 0:c0dc3a76f3d4 33 *---------------------------------------------------------------------------*/
apatel336 0:c0dc3a76f3d4 34
apatel336 0:c0dc3a76f3d4 35 #include "rt_TypeDef.h"
apatel336 0:c0dc3a76f3d4 36 #include "RTX_Conf.h"
apatel336 0:c0dc3a76f3d4 37 #include "rt_System.h"
apatel336 0:c0dc3a76f3d4 38 #include "rt_HAL_CM.h"
apatel336 0:c0dc3a76f3d4 39 #include "rt_Task.h"
apatel336 0:c0dc3a76f3d4 40 #include "rt_MemBox.h"
apatel336 0:c0dc3a76f3d4 41
apatel336 0:c0dc3a76f3d4 42
apatel336 0:c0dc3a76f3d4 43 /*----------------------------------------------------------------------------
apatel336 0:c0dc3a76f3d4 44 * Functions
apatel336 0:c0dc3a76f3d4 45 *---------------------------------------------------------------------------*/
apatel336 0:c0dc3a76f3d4 46
apatel336 0:c0dc3a76f3d4 47
apatel336 0:c0dc3a76f3d4 48 /*--------------------------- rt_set_PSP ------------------------------------*/
apatel336 0:c0dc3a76f3d4 49
apatel336 0:c0dc3a76f3d4 50 __asm void rt_set_PSP (U32 stack) {
apatel336 0:c0dc3a76f3d4 51 MSR PSP,R0
apatel336 0:c0dc3a76f3d4 52 BX LR
apatel336 0:c0dc3a76f3d4 53 }
apatel336 0:c0dc3a76f3d4 54
apatel336 0:c0dc3a76f3d4 55
apatel336 0:c0dc3a76f3d4 56 /*--------------------------- rt_get_PSP ------------------------------------*/
apatel336 0:c0dc3a76f3d4 57
apatel336 0:c0dc3a76f3d4 58 __asm U32 rt_get_PSP (void) {
apatel336 0:c0dc3a76f3d4 59 MRS R0,PSP
apatel336 0:c0dc3a76f3d4 60 BX LR
apatel336 0:c0dc3a76f3d4 61 }
apatel336 0:c0dc3a76f3d4 62
apatel336 0:c0dc3a76f3d4 63
apatel336 0:c0dc3a76f3d4 64 /*--------------------------- os_set_env ------------------------------------*/
apatel336 0:c0dc3a76f3d4 65
apatel336 0:c0dc3a76f3d4 66 __asm void os_set_env (void) {
apatel336 0:c0dc3a76f3d4 67 /* Switch to Unprivileged/Privileged Thread mode, use PSP. */
apatel336 0:c0dc3a76f3d4 68 MOV R0,SP ; PSP = MSP
apatel336 0:c0dc3a76f3d4 69 MSR PSP,R0
apatel336 0:c0dc3a76f3d4 70 LDR R0,=__cpp(&os_flags)
apatel336 0:c0dc3a76f3d4 71 LDRB R0,[R0]
apatel336 0:c0dc3a76f3d4 72 LSLS R0,#31
apatel336 0:c0dc3a76f3d4 73 BNE PrivilegedE
apatel336 0:c0dc3a76f3d4 74 MOVS R0,#0x03 ; Unprivileged Thread mode, use PSP
apatel336 0:c0dc3a76f3d4 75 MSR CONTROL,R0
apatel336 0:c0dc3a76f3d4 76 BX LR
apatel336 0:c0dc3a76f3d4 77 PrivilegedE
apatel336 0:c0dc3a76f3d4 78 MOVS R0,#0x02 ; Privileged Thread mode, use PSP
apatel336 0:c0dc3a76f3d4 79 MSR CONTROL,R0
apatel336 0:c0dc3a76f3d4 80 BX LR
apatel336 0:c0dc3a76f3d4 81
apatel336 0:c0dc3a76f3d4 82 ALIGN
apatel336 0:c0dc3a76f3d4 83 }
apatel336 0:c0dc3a76f3d4 84
apatel336 0:c0dc3a76f3d4 85
apatel336 0:c0dc3a76f3d4 86 /*--------------------------- _alloc_box ------------------------------------*/
apatel336 0:c0dc3a76f3d4 87
apatel336 0:c0dc3a76f3d4 88 __asm void *_alloc_box (void *box_mem) {
apatel336 0:c0dc3a76f3d4 89 /* Function wrapper for Unprivileged/Privileged mode. */
apatel336 0:c0dc3a76f3d4 90 LDR R3,=__cpp(rt_alloc_box)
apatel336 0:c0dc3a76f3d4 91 MOV R12,R3
apatel336 0:c0dc3a76f3d4 92 MRS R3,IPSR
apatel336 0:c0dc3a76f3d4 93 LSLS R3,#24
apatel336 0:c0dc3a76f3d4 94 BNE PrivilegedA
apatel336 0:c0dc3a76f3d4 95 MRS R3,CONTROL
apatel336 0:c0dc3a76f3d4 96 LSLS R3,#31
apatel336 0:c0dc3a76f3d4 97 BEQ PrivilegedA
apatel336 0:c0dc3a76f3d4 98 SVC 0
apatel336 0:c0dc3a76f3d4 99 BX LR
apatel336 0:c0dc3a76f3d4 100 PrivilegedA
apatel336 0:c0dc3a76f3d4 101 BX R12
apatel336 0:c0dc3a76f3d4 102
apatel336 0:c0dc3a76f3d4 103 ALIGN
apatel336 0:c0dc3a76f3d4 104 }
apatel336 0:c0dc3a76f3d4 105
apatel336 0:c0dc3a76f3d4 106
apatel336 0:c0dc3a76f3d4 107 /*--------------------------- _free_box -------------------------------------*/
apatel336 0:c0dc3a76f3d4 108
apatel336 0:c0dc3a76f3d4 109 __asm int _free_box (void *box_mem, void *box) {
apatel336 0:c0dc3a76f3d4 110 /* Function wrapper for Unprivileged/Privileged mode. */
apatel336 0:c0dc3a76f3d4 111 LDR R3,=__cpp(rt_free_box)
apatel336 0:c0dc3a76f3d4 112 MOV R12,R3
apatel336 0:c0dc3a76f3d4 113 MRS R3,IPSR
apatel336 0:c0dc3a76f3d4 114 LSLS R3,#24
apatel336 0:c0dc3a76f3d4 115 BNE PrivilegedF
apatel336 0:c0dc3a76f3d4 116 MRS R3,CONTROL
apatel336 0:c0dc3a76f3d4 117 LSLS R3,#31
apatel336 0:c0dc3a76f3d4 118 BEQ PrivilegedF
apatel336 0:c0dc3a76f3d4 119 SVC 0
apatel336 0:c0dc3a76f3d4 120 BX LR
apatel336 0:c0dc3a76f3d4 121 PrivilegedF
apatel336 0:c0dc3a76f3d4 122 BX R12
apatel336 0:c0dc3a76f3d4 123
apatel336 0:c0dc3a76f3d4 124 ALIGN
apatel336 0:c0dc3a76f3d4 125 }
apatel336 0:c0dc3a76f3d4 126
apatel336 0:c0dc3a76f3d4 127
apatel336 0:c0dc3a76f3d4 128 /*-------------------------- SVC_Handler ------------------------------------*/
apatel336 0:c0dc3a76f3d4 129
apatel336 0:c0dc3a76f3d4 130 __asm void SVC_Handler (void) {
apatel336 0:c0dc3a76f3d4 131 PRESERVE8
apatel336 0:c0dc3a76f3d4 132
apatel336 0:c0dc3a76f3d4 133 IMPORT SVC_Count
apatel336 0:c0dc3a76f3d4 134 IMPORT SVC_Table
apatel336 0:c0dc3a76f3d4 135 IMPORT rt_stk_check
apatel336 0:c0dc3a76f3d4 136
apatel336 0:c0dc3a76f3d4 137 MRS R0,PSP ; Read PSP
apatel336 0:c0dc3a76f3d4 138 LDR R1,[R0,#24] ; Read Saved PC from Stack
apatel336 0:c0dc3a76f3d4 139 SUBS R1,R1,#2 ; Point to SVC Instruction
apatel336 0:c0dc3a76f3d4 140 LDRB R1,[R1] ; Load SVC Number
apatel336 0:c0dc3a76f3d4 141 CMP R1,#0
apatel336 0:c0dc3a76f3d4 142 BNE SVC_User ; User SVC Number > 0
apatel336 0:c0dc3a76f3d4 143
apatel336 0:c0dc3a76f3d4 144 MOV LR,R4
apatel336 0:c0dc3a76f3d4 145 LDMIA R0,{R0-R3,R4} ; Read R0-R3,R12 from stack
apatel336 0:c0dc3a76f3d4 146 MOV R12,R4
apatel336 0:c0dc3a76f3d4 147 MOV R4,LR
apatel336 0:c0dc3a76f3d4 148 BLX R12 ; Call SVC Function
apatel336 0:c0dc3a76f3d4 149
apatel336 0:c0dc3a76f3d4 150 MRS R3,PSP ; Read PSP
apatel336 0:c0dc3a76f3d4 151 STMIA R3!,{R0-R2} ; Store return values
apatel336 0:c0dc3a76f3d4 152
apatel336 0:c0dc3a76f3d4 153 LDR R3,=__cpp(&os_tsk)
apatel336 0:c0dc3a76f3d4 154 LDMIA R3!,{R1,R2} ; os_tsk.run, os_tsk.new
apatel336 0:c0dc3a76f3d4 155 CMP R1,R2
apatel336 0:c0dc3a76f3d4 156 BEQ SVC_Exit ; no task switch
apatel336 0:c0dc3a76f3d4 157
apatel336 0:c0dc3a76f3d4 158 SUBS R3,#8
apatel336 0:c0dc3a76f3d4 159 CMP R1,#0 ; Runtask deleted?
apatel336 0:c0dc3a76f3d4 160 BEQ SVC_Next
apatel336 0:c0dc3a76f3d4 161
apatel336 0:c0dc3a76f3d4 162 MRS R0,PSP ; Read PSP
apatel336 0:c0dc3a76f3d4 163 SUBS R0,R0,#32 ; Adjust Start Address
apatel336 0:c0dc3a76f3d4 164 STR R0,[R1,#TCB_TSTACK] ; Update os_tsk.run->tsk_stack
apatel336 0:c0dc3a76f3d4 165 STMIA R0!,{R4-R7} ; Save old context (R4-R7)
apatel336 0:c0dc3a76f3d4 166 MOV R4,R8
apatel336 0:c0dc3a76f3d4 167 MOV R5,R9
apatel336 0:c0dc3a76f3d4 168 MOV R6,R10
apatel336 0:c0dc3a76f3d4 169 MOV R7,R11
apatel336 0:c0dc3a76f3d4 170 STMIA R0!,{R4-R7} ; Save old context (R8-R11)
apatel336 0:c0dc3a76f3d4 171
apatel336 0:c0dc3a76f3d4 172 PUSH {R2,R3}
apatel336 0:c0dc3a76f3d4 173 BL rt_stk_check ; Check for Stack overflow
apatel336 0:c0dc3a76f3d4 174 POP {R2,R3}
apatel336 0:c0dc3a76f3d4 175
apatel336 0:c0dc3a76f3d4 176 SVC_Next
apatel336 0:c0dc3a76f3d4 177 STR R2,[R3] ; os_tsk.run = os_tsk.new
apatel336 0:c0dc3a76f3d4 178
apatel336 0:c0dc3a76f3d4 179 LDR R0,[R2,#TCB_TSTACK] ; os_tsk.new->tsk_stack
apatel336 0:c0dc3a76f3d4 180 ADDS R0,R0,#16 ; Adjust Start Address
apatel336 0:c0dc3a76f3d4 181 LDMIA R0!,{R4-R7} ; Restore new Context (R8-R11)
apatel336 0:c0dc3a76f3d4 182 MOV R8,R4
apatel336 0:c0dc3a76f3d4 183 MOV R9,R5
apatel336 0:c0dc3a76f3d4 184 MOV R10,R6
apatel336 0:c0dc3a76f3d4 185 MOV R11,R7
apatel336 0:c0dc3a76f3d4 186 MSR PSP,R0 ; Write PSP
apatel336 0:c0dc3a76f3d4 187 SUBS R0,R0,#32 ; Adjust Start Address
apatel336 0:c0dc3a76f3d4 188 LDMIA R0!,{R4-R7} ; Restore new Context (R4-R7)
apatel336 0:c0dc3a76f3d4 189
apatel336 0:c0dc3a76f3d4 190 SVC_Exit
apatel336 0:c0dc3a76f3d4 191 MOVS R0,#:NOT:0xFFFFFFFD ; Set EXC_RETURN value
apatel336 0:c0dc3a76f3d4 192 MVNS R0,R0
apatel336 0:c0dc3a76f3d4 193 BX R0 ; RETI to Thread Mode, use PSP
apatel336 0:c0dc3a76f3d4 194
apatel336 0:c0dc3a76f3d4 195 /*------------------- User SVC ------------------------------*/
apatel336 0:c0dc3a76f3d4 196
apatel336 0:c0dc3a76f3d4 197 SVC_User
apatel336 0:c0dc3a76f3d4 198 PUSH {R4,LR} ; Save Registers
apatel336 0:c0dc3a76f3d4 199 LDR R2,=SVC_Count
apatel336 0:c0dc3a76f3d4 200 LDR R2,[R2]
apatel336 0:c0dc3a76f3d4 201 CMP R1,R2
apatel336 0:c0dc3a76f3d4 202 BHI SVC_Done ; Overflow
apatel336 0:c0dc3a76f3d4 203
apatel336 0:c0dc3a76f3d4 204 LDR R4,=SVC_Table-4
apatel336 0:c0dc3a76f3d4 205 LSLS R1,R1,#2
apatel336 0:c0dc3a76f3d4 206 LDR R4,[R4,R1] ; Load SVC Function Address
apatel336 0:c0dc3a76f3d4 207 MOV LR,R4
apatel336 0:c0dc3a76f3d4 208
apatel336 0:c0dc3a76f3d4 209 LDMIA R0,{R0-R3,R4} ; Read R0-R3,R12 from stack
apatel336 0:c0dc3a76f3d4 210 MOV R12,R4
apatel336 0:c0dc3a76f3d4 211 BLX LR ; Call SVC Function
apatel336 0:c0dc3a76f3d4 212
apatel336 0:c0dc3a76f3d4 213 MRS R4,PSP ; Read PSP
apatel336 0:c0dc3a76f3d4 214 STMIA R4!,{R0-R3} ; Function return values
apatel336 0:c0dc3a76f3d4 215 SVC_Done
apatel336 0:c0dc3a76f3d4 216 POP {R4,PC} ; RETI
apatel336 0:c0dc3a76f3d4 217
apatel336 0:c0dc3a76f3d4 218 ALIGN
apatel336 0:c0dc3a76f3d4 219 }
apatel336 0:c0dc3a76f3d4 220
apatel336 0:c0dc3a76f3d4 221
apatel336 0:c0dc3a76f3d4 222 /*-------------------------- PendSV_Handler ---------------------------------*/
apatel336 0:c0dc3a76f3d4 223
apatel336 0:c0dc3a76f3d4 224 __asm void PendSV_Handler (void) {
apatel336 0:c0dc3a76f3d4 225 PRESERVE8
apatel336 0:c0dc3a76f3d4 226
apatel336 0:c0dc3a76f3d4 227 BL __cpp(rt_pop_req)
apatel336 0:c0dc3a76f3d4 228
apatel336 0:c0dc3a76f3d4 229 Sys_Switch
apatel336 0:c0dc3a76f3d4 230 LDR R3,=__cpp(&os_tsk)
apatel336 0:c0dc3a76f3d4 231 LDMIA R3!,{R1,R2} ; os_tsk.run, os_tsk.new
apatel336 0:c0dc3a76f3d4 232 CMP R1,R2
apatel336 0:c0dc3a76f3d4 233 BEQ Sys_Exit ; no task switch
apatel336 0:c0dc3a76f3d4 234
apatel336 0:c0dc3a76f3d4 235 SUBS R3,#8
apatel336 0:c0dc3a76f3d4 236
apatel336 0:c0dc3a76f3d4 237 MRS R0,PSP ; Read PSP
apatel336 0:c0dc3a76f3d4 238 SUBS R0,R0,#32 ; Adjust Start Address
apatel336 0:c0dc3a76f3d4 239 STR R0,[R1,#TCB_TSTACK] ; Update os_tsk.run->tsk_stack
apatel336 0:c0dc3a76f3d4 240 STMIA R0!,{R4-R7} ; Save old context (R4-R7)
apatel336 0:c0dc3a76f3d4 241 MOV R4,R8
apatel336 0:c0dc3a76f3d4 242 MOV R5,R9
apatel336 0:c0dc3a76f3d4 243 MOV R6,R10
apatel336 0:c0dc3a76f3d4 244 MOV R7,R11
apatel336 0:c0dc3a76f3d4 245 STMIA R0!,{R4-R7} ; Save old context (R8-R11)
apatel336 0:c0dc3a76f3d4 246
apatel336 0:c0dc3a76f3d4 247 PUSH {R2,R3}
apatel336 0:c0dc3a76f3d4 248 BL rt_stk_check ; Check for Stack overflow
apatel336 0:c0dc3a76f3d4 249 POP {R2,R3}
apatel336 0:c0dc3a76f3d4 250
apatel336 0:c0dc3a76f3d4 251 STR R2,[R3] ; os_tsk.run = os_tsk.new
apatel336 0:c0dc3a76f3d4 252
apatel336 0:c0dc3a76f3d4 253 LDR R0,[R2,#TCB_TSTACK] ; os_tsk.new->tsk_stack
apatel336 0:c0dc3a76f3d4 254 ADDS R0,R0,#16 ; Adjust Start Address
apatel336 0:c0dc3a76f3d4 255 LDMIA R0!,{R4-R7} ; Restore new Context (R8-R11)
apatel336 0:c0dc3a76f3d4 256 MOV R8,R4
apatel336 0:c0dc3a76f3d4 257 MOV R9,R5
apatel336 0:c0dc3a76f3d4 258 MOV R10,R6
apatel336 0:c0dc3a76f3d4 259 MOV R11,R7
apatel336 0:c0dc3a76f3d4 260 MSR PSP,R0 ; Write PSP
apatel336 0:c0dc3a76f3d4 261 SUBS R0,R0,#32 ; Adjust Start Address
apatel336 0:c0dc3a76f3d4 262 LDMIA R0!,{R4-R7} ; Restore new Context (R4-R7)
apatel336 0:c0dc3a76f3d4 263
apatel336 0:c0dc3a76f3d4 264 Sys_Exit
apatel336 0:c0dc3a76f3d4 265 MOVS R0,#:NOT:0xFFFFFFFD ; Set EXC_RETURN value
apatel336 0:c0dc3a76f3d4 266 MVNS R0,R0
apatel336 0:c0dc3a76f3d4 267 BX R0 ; RETI to Thread Mode, use PSP
apatel336 0:c0dc3a76f3d4 268
apatel336 0:c0dc3a76f3d4 269 ALIGN
apatel336 0:c0dc3a76f3d4 270 }
apatel336 0:c0dc3a76f3d4 271
apatel336 0:c0dc3a76f3d4 272
apatel336 0:c0dc3a76f3d4 273 /*-------------------------- SysTick_Handler --------------------------------*/
apatel336 0:c0dc3a76f3d4 274
apatel336 0:c0dc3a76f3d4 275 __asm void SysTick_Handler (void) {
apatel336 0:c0dc3a76f3d4 276 PRESERVE8
apatel336 0:c0dc3a76f3d4 277
apatel336 0:c0dc3a76f3d4 278 BL __cpp(rt_systick)
apatel336 0:c0dc3a76f3d4 279 B Sys_Switch
apatel336 0:c0dc3a76f3d4 280
apatel336 0:c0dc3a76f3d4 281 ALIGN
apatel336 0:c0dc3a76f3d4 282 }
apatel336 0:c0dc3a76f3d4 283
apatel336 0:c0dc3a76f3d4 284
apatel336 0:c0dc3a76f3d4 285 /*-------------------------- OS_Tick_Handler --------------------------------*/
apatel336 0:c0dc3a76f3d4 286
apatel336 0:c0dc3a76f3d4 287 __asm void OS_Tick_Handler (void) {
apatel336 0:c0dc3a76f3d4 288 PRESERVE8
apatel336 0:c0dc3a76f3d4 289
apatel336 0:c0dc3a76f3d4 290 BL __cpp(os_tick_irqack)
apatel336 0:c0dc3a76f3d4 291 BL __cpp(rt_systick)
apatel336 0:c0dc3a76f3d4 292 B Sys_Switch
apatel336 0:c0dc3a76f3d4 293
apatel336 0:c0dc3a76f3d4 294 ALIGN
apatel336 0:c0dc3a76f3d4 295 }
apatel336 0:c0dc3a76f3d4 296
apatel336 0:c0dc3a76f3d4 297
apatel336 0:c0dc3a76f3d4 298 /*----------------------------------------------------------------------------
apatel336 0:c0dc3a76f3d4 299 * end of file
apatel336 0:c0dc3a76f3d4 300 *---------------------------------------------------------------------------*/
apatel336 0:c0dc3a76f3d4 301