Replacement for regular GPIO (DigitalIn, DigitalOut, DigitalInOut) classes which has superior speed.

Fork of FastIO by Erik -

Files at this revision

API Documentation at this revision

Comitter:
Sissors
Date:
Sun May 17 20:21:41 2015 +0000
Parent:
13:0e21ffc6cb84
Child:
15:e0c5a5216647
Commit message:
Fixed Nucleo F4 for latest mbed lib which just had to change the CMSIS register names.

Changed in this revision

Devices/FastIO_STM32F4.h Show annotated file Show diff for this revision Revisions of this file
--- a/Devices/FastIO_STM32F4.h	Sun May 17 10:48:26 2015 +0000
+++ b/Devices/FastIO_STM32F4.h	Sun May 17 20:21:41 2015 +0000
@@ -8,6 +8,7 @@
 } fastio_vars;
 
 #define PINMASK             (1 << STM_PIN(pin))
+#define PINMASK_CLR         ((1<<16) << STM_PIN(pin))
 #define PORT                ((GPIO_TypeDef *)(GPIOA_BASE + 0x0400 * STM_PORT(pin)))
 
 #define INIT_PIN            RCC->AHB1ENR |= (1 << STM_PORT(pin)); (PORT->MODER &= ~(GPIO_MODER_MODER0_1 << (STM_PIN(pin) * 2))); container.mask = PINMASK
@@ -17,8 +18,8 @@
 #define SET_DIR_OUTPUT      (PORT->MODER |= (GPIO_MODER_MODER0_0 << (STM_PIN(pin) * 2)))
 #define SET_MODE(pull)      pin_mode(pin, pull);
 
-#define WRITE_PIN_SET       (PORT->BSRRL = PINMASK)
-#define WRITE_PIN_CLR       (PORT->BSRRH = PINMASK)
+#define WRITE_PIN_SET       (PORT->BSRR = PINMASK)
+#define WRITE_PIN_CLR       (PORT->BSRR = PINMASK_CLR)
 
 #define READ_PIN            ((PORT->IDR & container.mask) ? 1 : 0)