Alexan E
/
blinky
blinky example from NXP code bundle for LPC11Uxx. No mbed library used
KEIL_LPC11U_COMMON_LIB/gpio.c@1:0f1be4e75668, 2012-05-28 (annotated)
- Committer:
- alexan_e
- Date:
- Mon May 28 00:13:23 2012 +0000
- Revision:
- 1:0f1be4e75668
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
alexan_e | 1:0f1be4e75668 | 1 | /**************************************************************************** |
alexan_e | 1:0f1be4e75668 | 2 | * $Id:: gpio.c 9190 2012-02-16 20:59:45Z nxp41306 $ |
alexan_e | 1:0f1be4e75668 | 3 | * Project: NXP LPC11Uxx GPIO example |
alexan_e | 1:0f1be4e75668 | 4 | * |
alexan_e | 1:0f1be4e75668 | 5 | * Description: |
alexan_e | 1:0f1be4e75668 | 6 | * This file contains GPIO code example which include GPIO |
alexan_e | 1:0f1be4e75668 | 7 | * initialization, GPIO interrupt handler, and related APIs for |
alexan_e | 1:0f1be4e75668 | 8 | * GPIO access. |
alexan_e | 1:0f1be4e75668 | 9 | * |
alexan_e | 1:0f1be4e75668 | 10 | **************************************************************************** |
alexan_e | 1:0f1be4e75668 | 11 | * Software that is described herein is for illustrative purposes only |
alexan_e | 1:0f1be4e75668 | 12 | * which provides customers with programming information regarding the |
alexan_e | 1:0f1be4e75668 | 13 | * products. This software is supplied "AS IS" without any warranties. |
alexan_e | 1:0f1be4e75668 | 14 | * NXP Semiconductors assumes no responsibility or liability for the |
alexan_e | 1:0f1be4e75668 | 15 | * use of the software, conveys no license or title under any patent, |
alexan_e | 1:0f1be4e75668 | 16 | * copyright, or mask work right to the product. NXP Semiconductors |
alexan_e | 1:0f1be4e75668 | 17 | * reserves the right to make changes in the software without |
alexan_e | 1:0f1be4e75668 | 18 | * notification. NXP Semiconductors also make no representation or |
alexan_e | 1:0f1be4e75668 | 19 | * warranty that such application will be suitable for the specified |
alexan_e | 1:0f1be4e75668 | 20 | * use without further testing or modification. |
alexan_e | 1:0f1be4e75668 | 21 | |
alexan_e | 1:0f1be4e75668 | 22 | * Permission to use, copy, modify, and distribute this software and its |
alexan_e | 1:0f1be4e75668 | 23 | * documentation is hereby granted, under NXP Semiconductors' |
alexan_e | 1:0f1be4e75668 | 24 | * relevant copyright in the software, without fee, provided that it |
alexan_e | 1:0f1be4e75668 | 25 | * is used in conjunction with NXP Semiconductors microcontrollers. This |
alexan_e | 1:0f1be4e75668 | 26 | * copyright, permission, and disclaimer notice must appear in all copies of |
alexan_e | 1:0f1be4e75668 | 27 | * this code. |
alexan_e | 1:0f1be4e75668 | 28 | |
alexan_e | 1:0f1be4e75668 | 29 | ****************************************************************************/ |
alexan_e | 1:0f1be4e75668 | 30 | |
alexan_e | 1:0f1be4e75668 | 31 | #include "LPC11Uxx.h" /* LPC11xx Peripheral Registers */ |
alexan_e | 1:0f1be4e75668 | 32 | #include "gpio.h" |
alexan_e | 1:0f1be4e75668 | 33 | |
alexan_e | 1:0f1be4e75668 | 34 | volatile uint32_t flex_int0_counter = 0; |
alexan_e | 1:0f1be4e75668 | 35 | volatile uint32_t flex_int1_counter = 0; |
alexan_e | 1:0f1be4e75668 | 36 | volatile uint32_t flex_int2_counter = 0; |
alexan_e | 1:0f1be4e75668 | 37 | volatile uint32_t flex_int3_counter = 0; |
alexan_e | 1:0f1be4e75668 | 38 | volatile uint32_t flex_int4_counter = 0; |
alexan_e | 1:0f1be4e75668 | 39 | volatile uint32_t flex_int5_counter = 0; |
alexan_e | 1:0f1be4e75668 | 40 | volatile uint32_t flex_int6_counter = 0; |
alexan_e | 1:0f1be4e75668 | 41 | volatile uint32_t flex_int7_counter = 0; |
alexan_e | 1:0f1be4e75668 | 42 | volatile uint32_t gint0_counter = 0; |
alexan_e | 1:0f1be4e75668 | 43 | volatile uint32_t gint1_counter = 0; |
alexan_e | 1:0f1be4e75668 | 44 | volatile uint32_t flex_int0_level_counter = 0; |
alexan_e | 1:0f1be4e75668 | 45 | volatile uint32_t flex_int0_rising_edge_counter = 0; |
alexan_e | 1:0f1be4e75668 | 46 | volatile uint32_t flex_int0_falling_edge_counter = 0; |
alexan_e | 1:0f1be4e75668 | 47 | volatile uint32_t flex_int1_level_counter = 0; |
alexan_e | 1:0f1be4e75668 | 48 | volatile uint32_t flex_int1_rising_edge_counter = 0; |
alexan_e | 1:0f1be4e75668 | 49 | volatile uint32_t flex_int1_falling_edge_counter = 0; |
alexan_e | 1:0f1be4e75668 | 50 | volatile uint32_t flex_int2_level_counter = 0; |
alexan_e | 1:0f1be4e75668 | 51 | volatile uint32_t flex_int2_rising_edge_counter = 0; |
alexan_e | 1:0f1be4e75668 | 52 | volatile uint32_t flex_int2_falling_edge_counter = 0; |
alexan_e | 1:0f1be4e75668 | 53 | volatile uint32_t flex_int3_level_counter = 0; |
alexan_e | 1:0f1be4e75668 | 54 | volatile uint32_t flex_int3_rising_edge_counter = 0; |
alexan_e | 1:0f1be4e75668 | 55 | volatile uint32_t flex_int3_falling_edge_counter = 0; |
alexan_e | 1:0f1be4e75668 | 56 | volatile uint32_t flex_int4_level_counter = 0; |
alexan_e | 1:0f1be4e75668 | 57 | volatile uint32_t flex_int4_rising_edge_counter = 0; |
alexan_e | 1:0f1be4e75668 | 58 | volatile uint32_t flex_int4_falling_edge_counter = 0; |
alexan_e | 1:0f1be4e75668 | 59 | volatile uint32_t flex_int5_level_counter = 0; |
alexan_e | 1:0f1be4e75668 | 60 | volatile uint32_t flex_int5_rising_edge_counter = 0; |
alexan_e | 1:0f1be4e75668 | 61 | volatile uint32_t flex_int5_falling_edge_counter = 0; |
alexan_e | 1:0f1be4e75668 | 62 | volatile uint32_t flex_int6_level_counter = 0; |
alexan_e | 1:0f1be4e75668 | 63 | volatile uint32_t flex_int6_rising_edge_counter = 0; |
alexan_e | 1:0f1be4e75668 | 64 | volatile uint32_t flex_int6_falling_edge_counter = 0; |
alexan_e | 1:0f1be4e75668 | 65 | volatile uint32_t flex_int7_level_counter = 0; |
alexan_e | 1:0f1be4e75668 | 66 | volatile uint32_t flex_int7_rising_edge_counter = 0; |
alexan_e | 1:0f1be4e75668 | 67 | volatile uint32_t flex_int7_falling_edge_counter = 0; |
alexan_e | 1:0f1be4e75668 | 68 | volatile uint32_t gint0_level_counter = 0; |
alexan_e | 1:0f1be4e75668 | 69 | volatile uint32_t gint0_edge_counter = 0; |
alexan_e | 1:0f1be4e75668 | 70 | volatile uint32_t gint1_level_counter = 0; |
alexan_e | 1:0f1be4e75668 | 71 | volatile uint32_t gint1_edge_counter = 0; |
alexan_e | 1:0f1be4e75668 | 72 | |
alexan_e | 1:0f1be4e75668 | 73 | /***************************************************************************** |
alexan_e | 1:0f1be4e75668 | 74 | ** Function name: FLEX_INT0_IRQHandler |
alexan_e | 1:0f1be4e75668 | 75 | ** |
alexan_e | 1:0f1be4e75668 | 76 | ** Descriptions: Use one GPIO pin as interrupt source |
alexan_e | 1:0f1be4e75668 | 77 | ** |
alexan_e | 1:0f1be4e75668 | 78 | ** parameters: None |
alexan_e | 1:0f1be4e75668 | 79 | ** |
alexan_e | 1:0f1be4e75668 | 80 | ** Returned value: None |
alexan_e | 1:0f1be4e75668 | 81 | ** |
alexan_e | 1:0f1be4e75668 | 82 | *****************************************************************************/ |
alexan_e | 1:0f1be4e75668 | 83 | void FLEX_INT0_IRQHandler(void) |
alexan_e | 1:0f1be4e75668 | 84 | { |
alexan_e | 1:0f1be4e75668 | 85 | flex_int0_counter++; |
alexan_e | 1:0f1be4e75668 | 86 | if ( LPC_GPIO_PIN_INT->IST & (0x1<<0) ) |
alexan_e | 1:0f1be4e75668 | 87 | { |
alexan_e | 1:0f1be4e75668 | 88 | if ( LPC_GPIO_PIN_INT->ISEL & (0x1<<0) ) |
alexan_e | 1:0f1be4e75668 | 89 | { |
alexan_e | 1:0f1be4e75668 | 90 | flex_int0_level_counter++; |
alexan_e | 1:0f1be4e75668 | 91 | } |
alexan_e | 1:0f1be4e75668 | 92 | else |
alexan_e | 1:0f1be4e75668 | 93 | { |
alexan_e | 1:0f1be4e75668 | 94 | if ( ( LPC_GPIO_PIN_INT->RISE & (0x1<<0) ) && ( LPC_GPIO_PIN_INT->IENR & (0x1<<0) ) ) |
alexan_e | 1:0f1be4e75668 | 95 | { |
alexan_e | 1:0f1be4e75668 | 96 | flex_int0_rising_edge_counter++; |
alexan_e | 1:0f1be4e75668 | 97 | LPC_GPIO_PIN_INT->RISE = 0x1<<0; |
alexan_e | 1:0f1be4e75668 | 98 | } |
alexan_e | 1:0f1be4e75668 | 99 | if ( ( LPC_GPIO_PIN_INT->FALL & (0x1<<0) ) && ( LPC_GPIO_PIN_INT->IENF & (0x1<<0) ) ) |
alexan_e | 1:0f1be4e75668 | 100 | { |
alexan_e | 1:0f1be4e75668 | 101 | flex_int0_falling_edge_counter++; |
alexan_e | 1:0f1be4e75668 | 102 | LPC_GPIO_PIN_INT->FALL = 0x1<<0; |
alexan_e | 1:0f1be4e75668 | 103 | } |
alexan_e | 1:0f1be4e75668 | 104 | LPC_GPIO_PIN_INT->IST = 0x1<<0; |
alexan_e | 1:0f1be4e75668 | 105 | } |
alexan_e | 1:0f1be4e75668 | 106 | } |
alexan_e | 1:0f1be4e75668 | 107 | return; |
alexan_e | 1:0f1be4e75668 | 108 | } |
alexan_e | 1:0f1be4e75668 | 109 | |
alexan_e | 1:0f1be4e75668 | 110 | /***************************************************************************** |
alexan_e | 1:0f1be4e75668 | 111 | ** Function name: FLEX_INT1_IRQHandler |
alexan_e | 1:0f1be4e75668 | 112 | ** |
alexan_e | 1:0f1be4e75668 | 113 | ** Descriptions: Use one GPIO pin as interrupt source |
alexan_e | 1:0f1be4e75668 | 114 | ** |
alexan_e | 1:0f1be4e75668 | 115 | ** parameters: None |
alexan_e | 1:0f1be4e75668 | 116 | ** |
alexan_e | 1:0f1be4e75668 | 117 | ** Returned value: None |
alexan_e | 1:0f1be4e75668 | 118 | ** |
alexan_e | 1:0f1be4e75668 | 119 | *****************************************************************************/ |
alexan_e | 1:0f1be4e75668 | 120 | void FLEX_INT1_IRQHandler(void) |
alexan_e | 1:0f1be4e75668 | 121 | { |
alexan_e | 1:0f1be4e75668 | 122 | flex_int1_counter++; |
alexan_e | 1:0f1be4e75668 | 123 | if ( LPC_GPIO_PIN_INT->IST & (0x1<<1) ) |
alexan_e | 1:0f1be4e75668 | 124 | { |
alexan_e | 1:0f1be4e75668 | 125 | if ( LPC_GPIO_PIN_INT->ISEL & (0x1<<1) ) |
alexan_e | 1:0f1be4e75668 | 126 | { |
alexan_e | 1:0f1be4e75668 | 127 | flex_int1_level_counter++; |
alexan_e | 1:0f1be4e75668 | 128 | } |
alexan_e | 1:0f1be4e75668 | 129 | else |
alexan_e | 1:0f1be4e75668 | 130 | { |
alexan_e | 1:0f1be4e75668 | 131 | if ( ( LPC_GPIO_PIN_INT->RISE & (0x1<<1) ) && ( LPC_GPIO_PIN_INT->IENR & (0x1<<1) ) ) |
alexan_e | 1:0f1be4e75668 | 132 | { |
alexan_e | 1:0f1be4e75668 | 133 | flex_int1_rising_edge_counter++; |
alexan_e | 1:0f1be4e75668 | 134 | LPC_GPIO_PIN_INT->RISE = 0x1<<1; |
alexan_e | 1:0f1be4e75668 | 135 | } |
alexan_e | 1:0f1be4e75668 | 136 | if ( ( LPC_GPIO_PIN_INT->FALL & (0x1<<1) ) && ( LPC_GPIO_PIN_INT->IENF & (0x1<<1) ) ) |
alexan_e | 1:0f1be4e75668 | 137 | { |
alexan_e | 1:0f1be4e75668 | 138 | flex_int1_falling_edge_counter++; |
alexan_e | 1:0f1be4e75668 | 139 | LPC_GPIO_PIN_INT->FALL = 0x1<<1; |
alexan_e | 1:0f1be4e75668 | 140 | } |
alexan_e | 1:0f1be4e75668 | 141 | LPC_GPIO_PIN_INT->IST = 0x1<<1; |
alexan_e | 1:0f1be4e75668 | 142 | } |
alexan_e | 1:0f1be4e75668 | 143 | } |
alexan_e | 1:0f1be4e75668 | 144 | return; |
alexan_e | 1:0f1be4e75668 | 145 | } |
alexan_e | 1:0f1be4e75668 | 146 | |
alexan_e | 1:0f1be4e75668 | 147 | /***************************************************************************** |
alexan_e | 1:0f1be4e75668 | 148 | ** Function name: FLEX_INT2_IRQHandler |
alexan_e | 1:0f1be4e75668 | 149 | ** |
alexan_e | 1:0f1be4e75668 | 150 | ** Descriptions: Use one GPIO pin as interrupt source |
alexan_e | 1:0f1be4e75668 | 151 | ** |
alexan_e | 1:0f1be4e75668 | 152 | ** parameters: None |
alexan_e | 1:0f1be4e75668 | 153 | ** |
alexan_e | 1:0f1be4e75668 | 154 | ** Returned value: None |
alexan_e | 1:0f1be4e75668 | 155 | ** |
alexan_e | 1:0f1be4e75668 | 156 | *****************************************************************************/ |
alexan_e | 1:0f1be4e75668 | 157 | void FLEX_INT2_IRQHandler(void) |
alexan_e | 1:0f1be4e75668 | 158 | { |
alexan_e | 1:0f1be4e75668 | 159 | flex_int2_counter++; |
alexan_e | 1:0f1be4e75668 | 160 | if ( LPC_GPIO_PIN_INT->IST & (0x1<<2) ) |
alexan_e | 1:0f1be4e75668 | 161 | { |
alexan_e | 1:0f1be4e75668 | 162 | if ( LPC_GPIO_PIN_INT->ISEL & (0x1<<2) ) |
alexan_e | 1:0f1be4e75668 | 163 | { |
alexan_e | 1:0f1be4e75668 | 164 | flex_int2_level_counter++; |
alexan_e | 1:0f1be4e75668 | 165 | } |
alexan_e | 1:0f1be4e75668 | 166 | else |
alexan_e | 1:0f1be4e75668 | 167 | { |
alexan_e | 1:0f1be4e75668 | 168 | if ( ( LPC_GPIO_PIN_INT->RISE & (0x1<<2) ) && ( LPC_GPIO_PIN_INT->IENR & (0x1<<2) ) ) |
alexan_e | 1:0f1be4e75668 | 169 | { |
alexan_e | 1:0f1be4e75668 | 170 | flex_int2_rising_edge_counter++; |
alexan_e | 1:0f1be4e75668 | 171 | LPC_GPIO_PIN_INT->RISE = 0x1<<2; |
alexan_e | 1:0f1be4e75668 | 172 | } |
alexan_e | 1:0f1be4e75668 | 173 | if ( ( LPC_GPIO_PIN_INT->FALL & (0x1<<2) ) && ( LPC_GPIO_PIN_INT->IENF & (0x1<<2) ) ) |
alexan_e | 1:0f1be4e75668 | 174 | { |
alexan_e | 1:0f1be4e75668 | 175 | flex_int2_falling_edge_counter++; |
alexan_e | 1:0f1be4e75668 | 176 | LPC_GPIO_PIN_INT->FALL = 0x1<<2; |
alexan_e | 1:0f1be4e75668 | 177 | } |
alexan_e | 1:0f1be4e75668 | 178 | LPC_GPIO_PIN_INT->IST = 0x1<<2; |
alexan_e | 1:0f1be4e75668 | 179 | } |
alexan_e | 1:0f1be4e75668 | 180 | } |
alexan_e | 1:0f1be4e75668 | 181 | return; |
alexan_e | 1:0f1be4e75668 | 182 | } |
alexan_e | 1:0f1be4e75668 | 183 | |
alexan_e | 1:0f1be4e75668 | 184 | /***************************************************************************** |
alexan_e | 1:0f1be4e75668 | 185 | ** Function name: FLEX_INT3_IRQHandler |
alexan_e | 1:0f1be4e75668 | 186 | ** |
alexan_e | 1:0f1be4e75668 | 187 | ** Descriptions: Use one GPIO pin as interrupt source |
alexan_e | 1:0f1be4e75668 | 188 | ** |
alexan_e | 1:0f1be4e75668 | 189 | ** parameters: None |
alexan_e | 1:0f1be4e75668 | 190 | ** |
alexan_e | 1:0f1be4e75668 | 191 | ** Returned value: None |
alexan_e | 1:0f1be4e75668 | 192 | ** |
alexan_e | 1:0f1be4e75668 | 193 | *****************************************************************************/ |
alexan_e | 1:0f1be4e75668 | 194 | void FLEX_INT3_IRQHandler(void) |
alexan_e | 1:0f1be4e75668 | 195 | { |
alexan_e | 1:0f1be4e75668 | 196 | flex_int3_counter++; |
alexan_e | 1:0f1be4e75668 | 197 | if ( LPC_GPIO_PIN_INT->IST & (0x1<<3) ) |
alexan_e | 1:0f1be4e75668 | 198 | { |
alexan_e | 1:0f1be4e75668 | 199 | if ( LPC_GPIO_PIN_INT->ISEL & (0x1<<3) ) |
alexan_e | 1:0f1be4e75668 | 200 | { |
alexan_e | 1:0f1be4e75668 | 201 | flex_int3_level_counter++; |
alexan_e | 1:0f1be4e75668 | 202 | } |
alexan_e | 1:0f1be4e75668 | 203 | else |
alexan_e | 1:0f1be4e75668 | 204 | { |
alexan_e | 1:0f1be4e75668 | 205 | if ( ( LPC_GPIO_PIN_INT->RISE & (0x1<<3) ) && ( LPC_GPIO_PIN_INT->IENR & (0x1<<3) ) ) |
alexan_e | 1:0f1be4e75668 | 206 | { |
alexan_e | 1:0f1be4e75668 | 207 | flex_int3_rising_edge_counter++; |
alexan_e | 1:0f1be4e75668 | 208 | LPC_GPIO_PIN_INT->RISE = 0x1<<3; |
alexan_e | 1:0f1be4e75668 | 209 | } |
alexan_e | 1:0f1be4e75668 | 210 | if ( ( LPC_GPIO_PIN_INT->FALL & (0x1<<3) ) && ( LPC_GPIO_PIN_INT->IENF & (0x1<<3) ) ) |
alexan_e | 1:0f1be4e75668 | 211 | { |
alexan_e | 1:0f1be4e75668 | 212 | flex_int3_falling_edge_counter++; |
alexan_e | 1:0f1be4e75668 | 213 | LPC_GPIO_PIN_INT->FALL = 0x1<<3; |
alexan_e | 1:0f1be4e75668 | 214 | } |
alexan_e | 1:0f1be4e75668 | 215 | LPC_GPIO_PIN_INT->IST = 0x1<<3; |
alexan_e | 1:0f1be4e75668 | 216 | } |
alexan_e | 1:0f1be4e75668 | 217 | } |
alexan_e | 1:0f1be4e75668 | 218 | return; |
alexan_e | 1:0f1be4e75668 | 219 | } |
alexan_e | 1:0f1be4e75668 | 220 | |
alexan_e | 1:0f1be4e75668 | 221 | /***************************************************************************** |
alexan_e | 1:0f1be4e75668 | 222 | ** Function name: FLEX_INT4_IRQHandler |
alexan_e | 1:0f1be4e75668 | 223 | ** |
alexan_e | 1:0f1be4e75668 | 224 | ** Descriptions: Use one GPIO pin as interrupt source |
alexan_e | 1:0f1be4e75668 | 225 | ** |
alexan_e | 1:0f1be4e75668 | 226 | ** parameters: None |
alexan_e | 1:0f1be4e75668 | 227 | ** |
alexan_e | 1:0f1be4e75668 | 228 | ** Returned value: None |
alexan_e | 1:0f1be4e75668 | 229 | ** |
alexan_e | 1:0f1be4e75668 | 230 | *****************************************************************************/ |
alexan_e | 1:0f1be4e75668 | 231 | void FLEX_INT4_IRQHandler(void) |
alexan_e | 1:0f1be4e75668 | 232 | { |
alexan_e | 1:0f1be4e75668 | 233 | flex_int4_counter++; |
alexan_e | 1:0f1be4e75668 | 234 | if ( LPC_GPIO_PIN_INT->IST & (0x1<<4) ) |
alexan_e | 1:0f1be4e75668 | 235 | { |
alexan_e | 1:0f1be4e75668 | 236 | if ( LPC_GPIO_PIN_INT->ISEL & (0x1<<4) ) |
alexan_e | 1:0f1be4e75668 | 237 | { |
alexan_e | 1:0f1be4e75668 | 238 | flex_int4_level_counter++; |
alexan_e | 1:0f1be4e75668 | 239 | } |
alexan_e | 1:0f1be4e75668 | 240 | else |
alexan_e | 1:0f1be4e75668 | 241 | { |
alexan_e | 1:0f1be4e75668 | 242 | if ( ( LPC_GPIO_PIN_INT->RISE & (0x1<<4) ) && ( LPC_GPIO_PIN_INT->IENR & (0x1<<4) ) ) |
alexan_e | 1:0f1be4e75668 | 243 | { |
alexan_e | 1:0f1be4e75668 | 244 | flex_int4_rising_edge_counter++; |
alexan_e | 1:0f1be4e75668 | 245 | LPC_GPIO_PIN_INT->RISE = 0x1<<4; |
alexan_e | 1:0f1be4e75668 | 246 | } |
alexan_e | 1:0f1be4e75668 | 247 | if ( ( LPC_GPIO_PIN_INT->FALL & (0x1<<4) ) && ( LPC_GPIO_PIN_INT->IENF & (0x1<<4) ) ) |
alexan_e | 1:0f1be4e75668 | 248 | { |
alexan_e | 1:0f1be4e75668 | 249 | flex_int4_falling_edge_counter++; |
alexan_e | 1:0f1be4e75668 | 250 | LPC_GPIO_PIN_INT->FALL = 0x1<<4; |
alexan_e | 1:0f1be4e75668 | 251 | } |
alexan_e | 1:0f1be4e75668 | 252 | LPC_GPIO_PIN_INT->IST = 0x1<<4; |
alexan_e | 1:0f1be4e75668 | 253 | } |
alexan_e | 1:0f1be4e75668 | 254 | } |
alexan_e | 1:0f1be4e75668 | 255 | return; |
alexan_e | 1:0f1be4e75668 | 256 | } |
alexan_e | 1:0f1be4e75668 | 257 | |
alexan_e | 1:0f1be4e75668 | 258 | /***************************************************************************** |
alexan_e | 1:0f1be4e75668 | 259 | ** Function name: FLEX_INT5_IRQHandler |
alexan_e | 1:0f1be4e75668 | 260 | ** |
alexan_e | 1:0f1be4e75668 | 261 | ** Descriptions: Use one GPIO pin as interrupt source |
alexan_e | 1:0f1be4e75668 | 262 | ** |
alexan_e | 1:0f1be4e75668 | 263 | ** parameters: None |
alexan_e | 1:0f1be4e75668 | 264 | ** |
alexan_e | 1:0f1be4e75668 | 265 | ** Returned value: None |
alexan_e | 1:0f1be4e75668 | 266 | ** |
alexan_e | 1:0f1be4e75668 | 267 | *****************************************************************************/ |
alexan_e | 1:0f1be4e75668 | 268 | void FLEX_INT5_IRQHandler(void) |
alexan_e | 1:0f1be4e75668 | 269 | { |
alexan_e | 1:0f1be4e75668 | 270 | flex_int5_counter++; |
alexan_e | 1:0f1be4e75668 | 271 | if ( LPC_GPIO_PIN_INT->IST & (0x1<<5) ) |
alexan_e | 1:0f1be4e75668 | 272 | { |
alexan_e | 1:0f1be4e75668 | 273 | if ( LPC_GPIO_PIN_INT->ISEL & (0x1<<5) ) |
alexan_e | 1:0f1be4e75668 | 274 | { |
alexan_e | 1:0f1be4e75668 | 275 | flex_int5_level_counter++; |
alexan_e | 1:0f1be4e75668 | 276 | } |
alexan_e | 1:0f1be4e75668 | 277 | else |
alexan_e | 1:0f1be4e75668 | 278 | { |
alexan_e | 1:0f1be4e75668 | 279 | if ( ( LPC_GPIO_PIN_INT->RISE & (0x1<<5) ) && ( LPC_GPIO_PIN_INT->IENR & (0x1<<5) ) ) |
alexan_e | 1:0f1be4e75668 | 280 | { |
alexan_e | 1:0f1be4e75668 | 281 | flex_int5_rising_edge_counter++; |
alexan_e | 1:0f1be4e75668 | 282 | LPC_GPIO_PIN_INT->RISE = 0x1<<5; |
alexan_e | 1:0f1be4e75668 | 283 | } |
alexan_e | 1:0f1be4e75668 | 284 | if ( ( LPC_GPIO_PIN_INT->FALL & (0x1<<5) ) && ( LPC_GPIO_PIN_INT->IENF & (0x1<<5) ) ) |
alexan_e | 1:0f1be4e75668 | 285 | { |
alexan_e | 1:0f1be4e75668 | 286 | flex_int5_falling_edge_counter++; |
alexan_e | 1:0f1be4e75668 | 287 | LPC_GPIO_PIN_INT->FALL = 0x1<<5; |
alexan_e | 1:0f1be4e75668 | 288 | } |
alexan_e | 1:0f1be4e75668 | 289 | LPC_GPIO_PIN_INT->IST = 0x1<<5; |
alexan_e | 1:0f1be4e75668 | 290 | } |
alexan_e | 1:0f1be4e75668 | 291 | } |
alexan_e | 1:0f1be4e75668 | 292 | return; |
alexan_e | 1:0f1be4e75668 | 293 | } |
alexan_e | 1:0f1be4e75668 | 294 | |
alexan_e | 1:0f1be4e75668 | 295 | /***************************************************************************** |
alexan_e | 1:0f1be4e75668 | 296 | ** Function name: FLEX_INT6_IRQHandler |
alexan_e | 1:0f1be4e75668 | 297 | ** |
alexan_e | 1:0f1be4e75668 | 298 | ** Descriptions: Use one GPIO pin as interrupt source |
alexan_e | 1:0f1be4e75668 | 299 | ** |
alexan_e | 1:0f1be4e75668 | 300 | ** parameters: None |
alexan_e | 1:0f1be4e75668 | 301 | ** |
alexan_e | 1:0f1be4e75668 | 302 | ** Returned value: None |
alexan_e | 1:0f1be4e75668 | 303 | ** |
alexan_e | 1:0f1be4e75668 | 304 | *****************************************************************************/ |
alexan_e | 1:0f1be4e75668 | 305 | void FLEX_INT6_IRQHandler(void) |
alexan_e | 1:0f1be4e75668 | 306 | { |
alexan_e | 1:0f1be4e75668 | 307 | flex_int6_counter++; |
alexan_e | 1:0f1be4e75668 | 308 | if ( LPC_GPIO_PIN_INT->IST & (0x1<<6) ) |
alexan_e | 1:0f1be4e75668 | 309 | { |
alexan_e | 1:0f1be4e75668 | 310 | if ( LPC_GPIO_PIN_INT->ISEL & (0x1<<6) ) |
alexan_e | 1:0f1be4e75668 | 311 | { |
alexan_e | 1:0f1be4e75668 | 312 | flex_int6_level_counter++; |
alexan_e | 1:0f1be4e75668 | 313 | } |
alexan_e | 1:0f1be4e75668 | 314 | else |
alexan_e | 1:0f1be4e75668 | 315 | { |
alexan_e | 1:0f1be4e75668 | 316 | if ( ( LPC_GPIO_PIN_INT->RISE & (0x1<<6) ) && ( LPC_GPIO_PIN_INT->IENR & (0x1<<6) ) ) |
alexan_e | 1:0f1be4e75668 | 317 | { |
alexan_e | 1:0f1be4e75668 | 318 | flex_int6_rising_edge_counter++; |
alexan_e | 1:0f1be4e75668 | 319 | LPC_GPIO_PIN_INT->RISE = 0x1<<6; |
alexan_e | 1:0f1be4e75668 | 320 | } |
alexan_e | 1:0f1be4e75668 | 321 | if ( ( LPC_GPIO_PIN_INT->FALL & (0x1<<6) ) && ( LPC_GPIO_PIN_INT->IENF & (0x1<<6) ) ) |
alexan_e | 1:0f1be4e75668 | 322 | { |
alexan_e | 1:0f1be4e75668 | 323 | flex_int6_falling_edge_counter++; |
alexan_e | 1:0f1be4e75668 | 324 | LPC_GPIO_PIN_INT->FALL = 0x1<<6; |
alexan_e | 1:0f1be4e75668 | 325 | } |
alexan_e | 1:0f1be4e75668 | 326 | LPC_GPIO_PIN_INT->IST = 0x1<<6; |
alexan_e | 1:0f1be4e75668 | 327 | } |
alexan_e | 1:0f1be4e75668 | 328 | } |
alexan_e | 1:0f1be4e75668 | 329 | return; |
alexan_e | 1:0f1be4e75668 | 330 | } |
alexan_e | 1:0f1be4e75668 | 331 | |
alexan_e | 1:0f1be4e75668 | 332 | /***************************************************************************** |
alexan_e | 1:0f1be4e75668 | 333 | ** Function name: FLEX_INT7_IRQHandler |
alexan_e | 1:0f1be4e75668 | 334 | ** |
alexan_e | 1:0f1be4e75668 | 335 | ** Descriptions: Use one GPIO pin as interrupt source |
alexan_e | 1:0f1be4e75668 | 336 | ** |
alexan_e | 1:0f1be4e75668 | 337 | ** parameters: None |
alexan_e | 1:0f1be4e75668 | 338 | ** |
alexan_e | 1:0f1be4e75668 | 339 | ** Returned value: None |
alexan_e | 1:0f1be4e75668 | 340 | ** |
alexan_e | 1:0f1be4e75668 | 341 | *****************************************************************************/ |
alexan_e | 1:0f1be4e75668 | 342 | void FLEX_INT7_IRQHandler(void) |
alexan_e | 1:0f1be4e75668 | 343 | { |
alexan_e | 1:0f1be4e75668 | 344 | flex_int7_counter++; |
alexan_e | 1:0f1be4e75668 | 345 | if ( LPC_GPIO_PIN_INT->IST & (0x1<<7) ) |
alexan_e | 1:0f1be4e75668 | 346 | { |
alexan_e | 1:0f1be4e75668 | 347 | if ( LPC_GPIO_PIN_INT->ISEL & (0x1<<7) ) |
alexan_e | 1:0f1be4e75668 | 348 | { |
alexan_e | 1:0f1be4e75668 | 349 | flex_int7_level_counter++; |
alexan_e | 1:0f1be4e75668 | 350 | } |
alexan_e | 1:0f1be4e75668 | 351 | else |
alexan_e | 1:0f1be4e75668 | 352 | { |
alexan_e | 1:0f1be4e75668 | 353 | if ( ( LPC_GPIO_PIN_INT->RISE & (0x1<<7) ) && ( LPC_GPIO_PIN_INT->IENR & (0x1<<7) ) ) |
alexan_e | 1:0f1be4e75668 | 354 | { |
alexan_e | 1:0f1be4e75668 | 355 | flex_int7_rising_edge_counter++; |
alexan_e | 1:0f1be4e75668 | 356 | LPC_GPIO_PIN_INT->RISE = 0x1<<7; |
alexan_e | 1:0f1be4e75668 | 357 | } |
alexan_e | 1:0f1be4e75668 | 358 | if ( ( LPC_GPIO_PIN_INT->FALL & (0x1<<7) ) && ( LPC_GPIO_PIN_INT->IENF & (0x1<<7) ) ) |
alexan_e | 1:0f1be4e75668 | 359 | { |
alexan_e | 1:0f1be4e75668 | 360 | flex_int7_falling_edge_counter++; |
alexan_e | 1:0f1be4e75668 | 361 | LPC_GPIO_PIN_INT->FALL = 0x1<<7; |
alexan_e | 1:0f1be4e75668 | 362 | } |
alexan_e | 1:0f1be4e75668 | 363 | LPC_GPIO_PIN_INT->IST = 0x1<<7; |
alexan_e | 1:0f1be4e75668 | 364 | } |
alexan_e | 1:0f1be4e75668 | 365 | } |
alexan_e | 1:0f1be4e75668 | 366 | return; |
alexan_e | 1:0f1be4e75668 | 367 | } |
alexan_e | 1:0f1be4e75668 | 368 | |
alexan_e | 1:0f1be4e75668 | 369 | /***************************************************************************** |
alexan_e | 1:0f1be4e75668 | 370 | ** Function name: GINT0_IRQHandler |
alexan_e | 1:0f1be4e75668 | 371 | ** |
alexan_e | 1:0f1be4e75668 | 372 | ** Descriptions: Use one GPIO pin as interrupt source |
alexan_e | 1:0f1be4e75668 | 373 | ** |
alexan_e | 1:0f1be4e75668 | 374 | ** parameters: None |
alexan_e | 1:0f1be4e75668 | 375 | ** |
alexan_e | 1:0f1be4e75668 | 376 | ** Returned value: None |
alexan_e | 1:0f1be4e75668 | 377 | ** |
alexan_e | 1:0f1be4e75668 | 378 | *****************************************************************************/ |
alexan_e | 1:0f1be4e75668 | 379 | void GINT0_IRQHandler(void) |
alexan_e | 1:0f1be4e75668 | 380 | { |
alexan_e | 1:0f1be4e75668 | 381 | gint0_counter++; |
alexan_e | 1:0f1be4e75668 | 382 | if ( LPC_GPIO_GROUP_INT0->CTRL & 0x1 ) |
alexan_e | 1:0f1be4e75668 | 383 | { |
alexan_e | 1:0f1be4e75668 | 384 | if ( LPC_GPIO_GROUP_INT0->CTRL & (0x1<<2) ) |
alexan_e | 1:0f1be4e75668 | 385 | { |
alexan_e | 1:0f1be4e75668 | 386 | gint0_level_counter++; |
alexan_e | 1:0f1be4e75668 | 387 | } |
alexan_e | 1:0f1be4e75668 | 388 | else |
alexan_e | 1:0f1be4e75668 | 389 | { |
alexan_e | 1:0f1be4e75668 | 390 | gint0_edge_counter++; |
alexan_e | 1:0f1be4e75668 | 391 | } |
alexan_e | 1:0f1be4e75668 | 392 | LPC_GPIO_GROUP_INT0->CTRL |= 0x1; |
alexan_e | 1:0f1be4e75668 | 393 | } |
alexan_e | 1:0f1be4e75668 | 394 | return; |
alexan_e | 1:0f1be4e75668 | 395 | } |
alexan_e | 1:0f1be4e75668 | 396 | |
alexan_e | 1:0f1be4e75668 | 397 | /***************************************************************************** |
alexan_e | 1:0f1be4e75668 | 398 | ** Function name: GINT1_IRQHandler |
alexan_e | 1:0f1be4e75668 | 399 | ** |
alexan_e | 1:0f1be4e75668 | 400 | ** Descriptions: Use one GPIO pin as interrupt source |
alexan_e | 1:0f1be4e75668 | 401 | ** |
alexan_e | 1:0f1be4e75668 | 402 | ** parameters: None |
alexan_e | 1:0f1be4e75668 | 403 | ** |
alexan_e | 1:0f1be4e75668 | 404 | ** Returned value: None |
alexan_e | 1:0f1be4e75668 | 405 | ** |
alexan_e | 1:0f1be4e75668 | 406 | *****************************************************************************/ |
alexan_e | 1:0f1be4e75668 | 407 | void GINT1_IRQHandler(void) |
alexan_e | 1:0f1be4e75668 | 408 | { |
alexan_e | 1:0f1be4e75668 | 409 | gint1_counter++; |
alexan_e | 1:0f1be4e75668 | 410 | if ( LPC_GPIO_GROUP_INT1->CTRL & 0x1 ) |
alexan_e | 1:0f1be4e75668 | 411 | { |
alexan_e | 1:0f1be4e75668 | 412 | if ( LPC_GPIO_GROUP_INT1->CTRL & (0x1<<2) ) |
alexan_e | 1:0f1be4e75668 | 413 | { |
alexan_e | 1:0f1be4e75668 | 414 | gint1_level_counter++; |
alexan_e | 1:0f1be4e75668 | 415 | } |
alexan_e | 1:0f1be4e75668 | 416 | else |
alexan_e | 1:0f1be4e75668 | 417 | { |
alexan_e | 1:0f1be4e75668 | 418 | gint1_edge_counter++; |
alexan_e | 1:0f1be4e75668 | 419 | } |
alexan_e | 1:0f1be4e75668 | 420 | LPC_GPIO_GROUP_INT1->CTRL |= 0x1; |
alexan_e | 1:0f1be4e75668 | 421 | } |
alexan_e | 1:0f1be4e75668 | 422 | return; |
alexan_e | 1:0f1be4e75668 | 423 | } |
alexan_e | 1:0f1be4e75668 | 424 | |
alexan_e | 1:0f1be4e75668 | 425 | /***************************************************************************** |
alexan_e | 1:0f1be4e75668 | 426 | ** Function name: GPIOInit |
alexan_e | 1:0f1be4e75668 | 427 | ** |
alexan_e | 1:0f1be4e75668 | 428 | ** Descriptions: Initialize GPIO, install the |
alexan_e | 1:0f1be4e75668 | 429 | ** GPIO interrupt handler |
alexan_e | 1:0f1be4e75668 | 430 | ** |
alexan_e | 1:0f1be4e75668 | 431 | ** parameters: None |
alexan_e | 1:0f1be4e75668 | 432 | ** |
alexan_e | 1:0f1be4e75668 | 433 | ** Returned value: true or false, return false if the VIC table |
alexan_e | 1:0f1be4e75668 | 434 | ** is full and GPIO interrupt handler can be |
alexan_e | 1:0f1be4e75668 | 435 | ** installed. |
alexan_e | 1:0f1be4e75668 | 436 | ** |
alexan_e | 1:0f1be4e75668 | 437 | *****************************************************************************/ |
alexan_e | 1:0f1be4e75668 | 438 | void GPIOInit( void ) |
alexan_e | 1:0f1be4e75668 | 439 | { |
alexan_e | 1:0f1be4e75668 | 440 | /* Enable AHB clock to the GPIO domain. */ |
alexan_e | 1:0f1be4e75668 | 441 | LPC_SYSCON->SYSAHBCLKCTRL |= (1<<6); |
alexan_e | 1:0f1be4e75668 | 442 | |
alexan_e | 1:0f1be4e75668 | 443 | /* Enable AHB clock to the FlexInt, GroupedInt domain. */ |
alexan_e | 1:0f1be4e75668 | 444 | LPC_SYSCON->SYSAHBCLKCTRL |= ((1<<19) | (1<<23) | (1<<24)); |
alexan_e | 1:0f1be4e75668 | 445 | |
alexan_e | 1:0f1be4e75668 | 446 | return; |
alexan_e | 1:0f1be4e75668 | 447 | } |
alexan_e | 1:0f1be4e75668 | 448 | |
alexan_e | 1:0f1be4e75668 | 449 | /***************************************************************************** |
alexan_e | 1:0f1be4e75668 | 450 | ** Function name: GPIOSetFlexInterrupt |
alexan_e | 1:0f1be4e75668 | 451 | ** |
alexan_e | 1:0f1be4e75668 | 452 | ** Descriptions: Set interrupt sense, event, etc. |
alexan_e | 1:0f1be4e75668 | 453 | ** sense: edge or level, 0 is edge, 1 is level |
alexan_e | 1:0f1be4e75668 | 454 | ** event/polarity: 0 is active low/falling, 1 is high/rising. |
alexan_e | 1:0f1be4e75668 | 455 | ** |
alexan_e | 1:0f1be4e75668 | 456 | ** parameters: channel #, port #, bit position, sense, event(polarity) |
alexan_e | 1:0f1be4e75668 | 457 | ** |
alexan_e | 1:0f1be4e75668 | 458 | ** Returned value: None |
alexan_e | 1:0f1be4e75668 | 459 | ** |
alexan_e | 1:0f1be4e75668 | 460 | *****************************************************************************/ |
alexan_e | 1:0f1be4e75668 | 461 | void GPIOSetFlexInterrupt( uint32_t channelNum, uint32_t portNum, uint32_t bitPosi, |
alexan_e | 1:0f1be4e75668 | 462 | uint32_t sense, uint32_t event ) |
alexan_e | 1:0f1be4e75668 | 463 | { |
alexan_e | 1:0f1be4e75668 | 464 | switch ( channelNum ) |
alexan_e | 1:0f1be4e75668 | 465 | { |
alexan_e | 1:0f1be4e75668 | 466 | case CHANNEL0: |
alexan_e | 1:0f1be4e75668 | 467 | if ( portNum ) |
alexan_e | 1:0f1be4e75668 | 468 | { |
alexan_e | 1:0f1be4e75668 | 469 | LPC_SYSCON->PINTSEL[0] = bitPosi + 24; |
alexan_e | 1:0f1be4e75668 | 470 | } |
alexan_e | 1:0f1be4e75668 | 471 | else |
alexan_e | 1:0f1be4e75668 | 472 | { |
alexan_e | 1:0f1be4e75668 | 473 | LPC_SYSCON->PINTSEL[0] = bitPosi; |
alexan_e | 1:0f1be4e75668 | 474 | } |
alexan_e | 1:0f1be4e75668 | 475 | NVIC_EnableIRQ(FLEX_INT0_IRQn); |
alexan_e | 1:0f1be4e75668 | 476 | break; |
alexan_e | 1:0f1be4e75668 | 477 | case CHANNEL1: |
alexan_e | 1:0f1be4e75668 | 478 | if ( portNum ) |
alexan_e | 1:0f1be4e75668 | 479 | { |
alexan_e | 1:0f1be4e75668 | 480 | LPC_SYSCON->PINTSEL[1] = bitPosi + 24; |
alexan_e | 1:0f1be4e75668 | 481 | } |
alexan_e | 1:0f1be4e75668 | 482 | else |
alexan_e | 1:0f1be4e75668 | 483 | { |
alexan_e | 1:0f1be4e75668 | 484 | LPC_SYSCON->PINTSEL[1] = bitPosi; |
alexan_e | 1:0f1be4e75668 | 485 | } |
alexan_e | 1:0f1be4e75668 | 486 | NVIC_EnableIRQ(FLEX_INT1_IRQn); |
alexan_e | 1:0f1be4e75668 | 487 | break; |
alexan_e | 1:0f1be4e75668 | 488 | case CHANNEL2: |
alexan_e | 1:0f1be4e75668 | 489 | if ( portNum ) |
alexan_e | 1:0f1be4e75668 | 490 | { |
alexan_e | 1:0f1be4e75668 | 491 | LPC_SYSCON->PINTSEL[2] = bitPosi + 24; |
alexan_e | 1:0f1be4e75668 | 492 | } |
alexan_e | 1:0f1be4e75668 | 493 | else |
alexan_e | 1:0f1be4e75668 | 494 | { |
alexan_e | 1:0f1be4e75668 | 495 | LPC_SYSCON->PINTSEL[2] = bitPosi; |
alexan_e | 1:0f1be4e75668 | 496 | } |
alexan_e | 1:0f1be4e75668 | 497 | NVIC_EnableIRQ(FLEX_INT2_IRQn); |
alexan_e | 1:0f1be4e75668 | 498 | break; |
alexan_e | 1:0f1be4e75668 | 499 | case CHANNEL3: |
alexan_e | 1:0f1be4e75668 | 500 | if ( portNum ) |
alexan_e | 1:0f1be4e75668 | 501 | { |
alexan_e | 1:0f1be4e75668 | 502 | LPC_SYSCON->PINTSEL[3] = bitPosi + 24; |
alexan_e | 1:0f1be4e75668 | 503 | } |
alexan_e | 1:0f1be4e75668 | 504 | else |
alexan_e | 1:0f1be4e75668 | 505 | { |
alexan_e | 1:0f1be4e75668 | 506 | LPC_SYSCON->PINTSEL[3] = bitPosi; |
alexan_e | 1:0f1be4e75668 | 507 | } |
alexan_e | 1:0f1be4e75668 | 508 | NVIC_EnableIRQ(FLEX_INT3_IRQn); |
alexan_e | 1:0f1be4e75668 | 509 | break; |
alexan_e | 1:0f1be4e75668 | 510 | case CHANNEL4: |
alexan_e | 1:0f1be4e75668 | 511 | if ( portNum ) |
alexan_e | 1:0f1be4e75668 | 512 | { |
alexan_e | 1:0f1be4e75668 | 513 | LPC_SYSCON->PINTSEL[4] = bitPosi + 24; |
alexan_e | 1:0f1be4e75668 | 514 | } |
alexan_e | 1:0f1be4e75668 | 515 | else |
alexan_e | 1:0f1be4e75668 | 516 | { |
alexan_e | 1:0f1be4e75668 | 517 | LPC_SYSCON->PINTSEL[4] = bitPosi; |
alexan_e | 1:0f1be4e75668 | 518 | } |
alexan_e | 1:0f1be4e75668 | 519 | NVIC_EnableIRQ(FLEX_INT4_IRQn); |
alexan_e | 1:0f1be4e75668 | 520 | break; |
alexan_e | 1:0f1be4e75668 | 521 | case CHANNEL5: |
alexan_e | 1:0f1be4e75668 | 522 | if ( portNum ) |
alexan_e | 1:0f1be4e75668 | 523 | { |
alexan_e | 1:0f1be4e75668 | 524 | LPC_SYSCON->PINTSEL[5] = bitPosi + 24; |
alexan_e | 1:0f1be4e75668 | 525 | } |
alexan_e | 1:0f1be4e75668 | 526 | else |
alexan_e | 1:0f1be4e75668 | 527 | { |
alexan_e | 1:0f1be4e75668 | 528 | LPC_SYSCON->PINTSEL[5] = bitPosi; |
alexan_e | 1:0f1be4e75668 | 529 | } |
alexan_e | 1:0f1be4e75668 | 530 | NVIC_EnableIRQ(FLEX_INT5_IRQn); |
alexan_e | 1:0f1be4e75668 | 531 | break; |
alexan_e | 1:0f1be4e75668 | 532 | case CHANNEL6: |
alexan_e | 1:0f1be4e75668 | 533 | if ( portNum ) |
alexan_e | 1:0f1be4e75668 | 534 | { |
alexan_e | 1:0f1be4e75668 | 535 | LPC_SYSCON->PINTSEL[6] = bitPosi + 24; |
alexan_e | 1:0f1be4e75668 | 536 | } |
alexan_e | 1:0f1be4e75668 | 537 | else |
alexan_e | 1:0f1be4e75668 | 538 | { |
alexan_e | 1:0f1be4e75668 | 539 | LPC_SYSCON->PINTSEL[6] = bitPosi; |
alexan_e | 1:0f1be4e75668 | 540 | } |
alexan_e | 1:0f1be4e75668 | 541 | NVIC_EnableIRQ(FLEX_INT6_IRQn); |
alexan_e | 1:0f1be4e75668 | 542 | break; |
alexan_e | 1:0f1be4e75668 | 543 | case CHANNEL7: |
alexan_e | 1:0f1be4e75668 | 544 | if ( portNum ) |
alexan_e | 1:0f1be4e75668 | 545 | { |
alexan_e | 1:0f1be4e75668 | 546 | LPC_SYSCON->PINTSEL[7] = bitPosi + 24; |
alexan_e | 1:0f1be4e75668 | 547 | } |
alexan_e | 1:0f1be4e75668 | 548 | else |
alexan_e | 1:0f1be4e75668 | 549 | { |
alexan_e | 1:0f1be4e75668 | 550 | LPC_SYSCON->PINTSEL[7] = bitPosi; |
alexan_e | 1:0f1be4e75668 | 551 | } |
alexan_e | 1:0f1be4e75668 | 552 | NVIC_EnableIRQ(FLEX_INT7_IRQn); |
alexan_e | 1:0f1be4e75668 | 553 | break; |
alexan_e | 1:0f1be4e75668 | 554 | default: |
alexan_e | 1:0f1be4e75668 | 555 | break; |
alexan_e | 1:0f1be4e75668 | 556 | } |
alexan_e | 1:0f1be4e75668 | 557 | if ( sense == 0 ) |
alexan_e | 1:0f1be4e75668 | 558 | { |
alexan_e | 1:0f1be4e75668 | 559 | LPC_GPIO_PIN_INT->ISEL &= ~(0x1<<channelNum); /* Edge trigger */ |
alexan_e | 1:0f1be4e75668 | 560 | if ( event == 0 ) |
alexan_e | 1:0f1be4e75668 | 561 | { |
alexan_e | 1:0f1be4e75668 | 562 | LPC_GPIO_PIN_INT->IENF |= (0x1<<channelNum); /* faling edge */ |
alexan_e | 1:0f1be4e75668 | 563 | } |
alexan_e | 1:0f1be4e75668 | 564 | else |
alexan_e | 1:0f1be4e75668 | 565 | { |
alexan_e | 1:0f1be4e75668 | 566 | LPC_GPIO_PIN_INT->IENR |= (0x1<<channelNum); /* Rising edge */ |
alexan_e | 1:0f1be4e75668 | 567 | } |
alexan_e | 1:0f1be4e75668 | 568 | } |
alexan_e | 1:0f1be4e75668 | 569 | else |
alexan_e | 1:0f1be4e75668 | 570 | { |
alexan_e | 1:0f1be4e75668 | 571 | LPC_GPIO_PIN_INT->ISEL |= (0x1<<channelNum); /* Level trigger. */ |
alexan_e | 1:0f1be4e75668 | 572 | LPC_GPIO_PIN_INT->IENR |= (0x1<<channelNum); /* Level enable */ |
alexan_e | 1:0f1be4e75668 | 573 | if ( event == 0 ) |
alexan_e | 1:0f1be4e75668 | 574 | { |
alexan_e | 1:0f1be4e75668 | 575 | LPC_GPIO_PIN_INT->IENF &= ~(0x1<<channelNum); /* active-low */ |
alexan_e | 1:0f1be4e75668 | 576 | } |
alexan_e | 1:0f1be4e75668 | 577 | else |
alexan_e | 1:0f1be4e75668 | 578 | { |
alexan_e | 1:0f1be4e75668 | 579 | LPC_GPIO_PIN_INT->IENF |= (0x1<<channelNum); /* active-high */ |
alexan_e | 1:0f1be4e75668 | 580 | } |
alexan_e | 1:0f1be4e75668 | 581 | } |
alexan_e | 1:0f1be4e75668 | 582 | return; |
alexan_e | 1:0f1be4e75668 | 583 | } |
alexan_e | 1:0f1be4e75668 | 584 | |
alexan_e | 1:0f1be4e75668 | 585 | /***************************************************************************** |
alexan_e | 1:0f1be4e75668 | 586 | ** Function name: GPIOFlexIntEnable |
alexan_e | 1:0f1be4e75668 | 587 | ** |
alexan_e | 1:0f1be4e75668 | 588 | ** Descriptions: Enable Interrupt |
alexan_e | 1:0f1be4e75668 | 589 | ** |
alexan_e | 1:0f1be4e75668 | 590 | ** parameters: channel num, event(0 is falling edge, 1 is rising edge) |
alexan_e | 1:0f1be4e75668 | 591 | ** Returned value: None |
alexan_e | 1:0f1be4e75668 | 592 | ** |
alexan_e | 1:0f1be4e75668 | 593 | *****************************************************************************/ |
alexan_e | 1:0f1be4e75668 | 594 | void GPIOFlexIntEnable( uint32_t channelNum, uint32_t event ) |
alexan_e | 1:0f1be4e75668 | 595 | { |
alexan_e | 1:0f1be4e75668 | 596 | if ( !( LPC_GPIO_PIN_INT->ISEL & (0x1<<channelNum) ) ) |
alexan_e | 1:0f1be4e75668 | 597 | { |
alexan_e | 1:0f1be4e75668 | 598 | if ( event == 0 ) |
alexan_e | 1:0f1be4e75668 | 599 | { |
alexan_e | 1:0f1be4e75668 | 600 | LPC_GPIO_PIN_INT->SIENF |= (0x1<<channelNum); /* faling edge */ |
alexan_e | 1:0f1be4e75668 | 601 | } |
alexan_e | 1:0f1be4e75668 | 602 | else |
alexan_e | 1:0f1be4e75668 | 603 | { |
alexan_e | 1:0f1be4e75668 | 604 | LPC_GPIO_PIN_INT->SIENR |= (0x1<<channelNum); /* Rising edge */ |
alexan_e | 1:0f1be4e75668 | 605 | } |
alexan_e | 1:0f1be4e75668 | 606 | } |
alexan_e | 1:0f1be4e75668 | 607 | else |
alexan_e | 1:0f1be4e75668 | 608 | { |
alexan_e | 1:0f1be4e75668 | 609 | LPC_GPIO_PIN_INT->SIENR |= (0x1<<channelNum); /* Level */ |
alexan_e | 1:0f1be4e75668 | 610 | } |
alexan_e | 1:0f1be4e75668 | 611 | return; |
alexan_e | 1:0f1be4e75668 | 612 | } |
alexan_e | 1:0f1be4e75668 | 613 | |
alexan_e | 1:0f1be4e75668 | 614 | /***************************************************************************** |
alexan_e | 1:0f1be4e75668 | 615 | ** Function name: GPIOFlexIntDisable |
alexan_e | 1:0f1be4e75668 | 616 | ** |
alexan_e | 1:0f1be4e75668 | 617 | ** Descriptions: Disable Interrupt |
alexan_e | 1:0f1be4e75668 | 618 | ** |
alexan_e | 1:0f1be4e75668 | 619 | ** parameters: channel num, event(0 is falling edge, 1 is rising edge) |
alexan_e | 1:0f1be4e75668 | 620 | ** |
alexan_e | 1:0f1be4e75668 | 621 | ** Returned value: None |
alexan_e | 1:0f1be4e75668 | 622 | ** |
alexan_e | 1:0f1be4e75668 | 623 | *****************************************************************************/ |
alexan_e | 1:0f1be4e75668 | 624 | void GPIOFlexIntDisable( uint32_t channelNum, uint32_t event ) |
alexan_e | 1:0f1be4e75668 | 625 | { |
alexan_e | 1:0f1be4e75668 | 626 | if ( !( LPC_GPIO_PIN_INT->ISEL & (0x1<<channelNum) ) ) |
alexan_e | 1:0f1be4e75668 | 627 | { |
alexan_e | 1:0f1be4e75668 | 628 | if ( event == 0 ) |
alexan_e | 1:0f1be4e75668 | 629 | { |
alexan_e | 1:0f1be4e75668 | 630 | LPC_GPIO_PIN_INT->CIENF |= (0x1<<channelNum); /* faling edge */ |
alexan_e | 1:0f1be4e75668 | 631 | } |
alexan_e | 1:0f1be4e75668 | 632 | else |
alexan_e | 1:0f1be4e75668 | 633 | { |
alexan_e | 1:0f1be4e75668 | 634 | LPC_GPIO_PIN_INT->CIENR |= (0x1<<channelNum); /* Rising edge */ |
alexan_e | 1:0f1be4e75668 | 635 | } |
alexan_e | 1:0f1be4e75668 | 636 | } |
alexan_e | 1:0f1be4e75668 | 637 | else |
alexan_e | 1:0f1be4e75668 | 638 | { |
alexan_e | 1:0f1be4e75668 | 639 | LPC_GPIO_PIN_INT->CIENR |= (0x1<<channelNum); /* Level */ |
alexan_e | 1:0f1be4e75668 | 640 | } |
alexan_e | 1:0f1be4e75668 | 641 | return; |
alexan_e | 1:0f1be4e75668 | 642 | } |
alexan_e | 1:0f1be4e75668 | 643 | |
alexan_e | 1:0f1be4e75668 | 644 | /***************************************************************************** |
alexan_e | 1:0f1be4e75668 | 645 | ** Function name: GPIOFlexIntStatus |
alexan_e | 1:0f1be4e75668 | 646 | ** |
alexan_e | 1:0f1be4e75668 | 647 | ** Descriptions: Get Interrupt status |
alexan_e | 1:0f1be4e75668 | 648 | ** |
alexan_e | 1:0f1be4e75668 | 649 | ** parameters: channel num |
alexan_e | 1:0f1be4e75668 | 650 | ** |
alexan_e | 1:0f1be4e75668 | 651 | ** Returned value: None |
alexan_e | 1:0f1be4e75668 | 652 | ** |
alexan_e | 1:0f1be4e75668 | 653 | *****************************************************************************/ |
alexan_e | 1:0f1be4e75668 | 654 | uint32_t GPIOFlexIntStatus( uint32_t channelNum ) |
alexan_e | 1:0f1be4e75668 | 655 | { |
alexan_e | 1:0f1be4e75668 | 656 | if ( LPC_GPIO_PIN_INT->IST & (0x1<<channelNum) ) |
alexan_e | 1:0f1be4e75668 | 657 | { |
alexan_e | 1:0f1be4e75668 | 658 | return( 1 ); |
alexan_e | 1:0f1be4e75668 | 659 | } |
alexan_e | 1:0f1be4e75668 | 660 | else |
alexan_e | 1:0f1be4e75668 | 661 | { |
alexan_e | 1:0f1be4e75668 | 662 | return( 0 ); |
alexan_e | 1:0f1be4e75668 | 663 | } |
alexan_e | 1:0f1be4e75668 | 664 | } |
alexan_e | 1:0f1be4e75668 | 665 | |
alexan_e | 1:0f1be4e75668 | 666 | /***************************************************************************** |
alexan_e | 1:0f1be4e75668 | 667 | ** Function name: GPIOFlexIntClear |
alexan_e | 1:0f1be4e75668 | 668 | ** |
alexan_e | 1:0f1be4e75668 | 669 | ** Descriptions: Clear Interrupt |
alexan_e | 1:0f1be4e75668 | 670 | ** |
alexan_e | 1:0f1be4e75668 | 671 | ** parameters: channel num |
alexan_e | 1:0f1be4e75668 | 672 | ** |
alexan_e | 1:0f1be4e75668 | 673 | ** Returned value: None |
alexan_e | 1:0f1be4e75668 | 674 | ** |
alexan_e | 1:0f1be4e75668 | 675 | *****************************************************************************/ |
alexan_e | 1:0f1be4e75668 | 676 | void GPIOFlexIntClear( uint32_t channelNum ) |
alexan_e | 1:0f1be4e75668 | 677 | { |
alexan_e | 1:0f1be4e75668 | 678 | if ( !( LPC_GPIO_PIN_INT->ISEL & (0x1<<channelNum) ) ) |
alexan_e | 1:0f1be4e75668 | 679 | { |
alexan_e | 1:0f1be4e75668 | 680 | LPC_GPIO_PIN_INT->IST = (1<<channelNum); |
alexan_e | 1:0f1be4e75668 | 681 | } |
alexan_e | 1:0f1be4e75668 | 682 | return; |
alexan_e | 1:0f1be4e75668 | 683 | } |
alexan_e | 1:0f1be4e75668 | 684 | |
alexan_e | 1:0f1be4e75668 | 685 | /***************************************************************************** |
alexan_e | 1:0f1be4e75668 | 686 | ** Function name: GPIOSetGroupedInterrupt |
alexan_e | 1:0f1be4e75668 | 687 | ** |
alexan_e | 1:0f1be4e75668 | 688 | ** Descriptions: Set interrupt logic, sense, eventPattern, etc. |
alexan_e | 1:0f1be4e75668 | 689 | ** logic: AND or OR, 0 is OR, 1 is AND |
alexan_e | 1:0f1be4e75668 | 690 | ** sensePattern: edge or level, 0 is edge, 1 is level |
alexan_e | 1:0f1be4e75668 | 691 | ** event/polarity: 0 is active low/falling, 1 is high/rising. |
alexan_e | 1:0f1be4e75668 | 692 | ** |
alexan_e | 1:0f1be4e75668 | 693 | ** parameters: group #, bit pattern, logic, sense, event(polarity) pattern |
alexan_e | 1:0f1be4e75668 | 694 | ** |
alexan_e | 1:0f1be4e75668 | 695 | ** Returned value: None |
alexan_e | 1:0f1be4e75668 | 696 | ** |
alexan_e | 1:0f1be4e75668 | 697 | *****************************************************************************/ |
alexan_e | 1:0f1be4e75668 | 698 | void GPIOSetGroupedInterrupt( uint32_t groupNum, uint32_t *bitPattern, uint32_t logic, |
alexan_e | 1:0f1be4e75668 | 699 | uint32_t sense, uint32_t *eventPattern ) |
alexan_e | 1:0f1be4e75668 | 700 | { |
alexan_e | 1:0f1be4e75668 | 701 | switch ( groupNum ) |
alexan_e | 1:0f1be4e75668 | 702 | { |
alexan_e | 1:0f1be4e75668 | 703 | case GROUP0: |
alexan_e | 1:0f1be4e75668 | 704 | if ( sense == 0 ) |
alexan_e | 1:0f1be4e75668 | 705 | { |
alexan_e | 1:0f1be4e75668 | 706 | LPC_GPIO_GROUP_INT0->CTRL &= ~(0x1<<2); /* Edge trigger */ |
alexan_e | 1:0f1be4e75668 | 707 | } |
alexan_e | 1:0f1be4e75668 | 708 | else |
alexan_e | 1:0f1be4e75668 | 709 | { |
alexan_e | 1:0f1be4e75668 | 710 | LPC_GPIO_GROUP_INT0->CTRL |= (0x1<<2); /* Level trigger. */ |
alexan_e | 1:0f1be4e75668 | 711 | } |
alexan_e | 1:0f1be4e75668 | 712 | LPC_GPIO_GROUP_INT0->CTRL |= (logic<<1); |
alexan_e | 1:0f1be4e75668 | 713 | LPC_GPIO_GROUP_INT0->PORT_POL[0] = *((uint32_t *)(eventPattern + 0)); |
alexan_e | 1:0f1be4e75668 | 714 | LPC_GPIO_GROUP_INT0->PORT_POL[1] = *((uint32_t *)(eventPattern + 1)); |
alexan_e | 1:0f1be4e75668 | 715 | LPC_GPIO_GROUP_INT0->PORT_ENA[0] = *((uint32_t *)(bitPattern + 0)); |
alexan_e | 1:0f1be4e75668 | 716 | LPC_GPIO_GROUP_INT0->PORT_ENA[1] = *((uint32_t *)(bitPattern + 1)); |
alexan_e | 1:0f1be4e75668 | 717 | /* as soon as enabled, an edge may be generated */ |
alexan_e | 1:0f1be4e75668 | 718 | /* clear interrupt flag and NVIC pending interrupt to */ |
alexan_e | 1:0f1be4e75668 | 719 | /* workaround the potential edge generated as enabled */ |
alexan_e | 1:0f1be4e75668 | 720 | LPC_GPIO_GROUP_INT0->CTRL |= (1<<0); |
alexan_e | 1:0f1be4e75668 | 721 | NVIC_ClearPendingIRQ(GINT0_IRQn); |
alexan_e | 1:0f1be4e75668 | 722 | NVIC_EnableIRQ(GINT0_IRQn); |
alexan_e | 1:0f1be4e75668 | 723 | break; |
alexan_e | 1:0f1be4e75668 | 724 | case GROUP1: |
alexan_e | 1:0f1be4e75668 | 725 | if ( sense == 0 ) |
alexan_e | 1:0f1be4e75668 | 726 | { |
alexan_e | 1:0f1be4e75668 | 727 | LPC_GPIO_GROUP_INT1->CTRL &= ~(0x1<<2); /* Edge trigger */ |
alexan_e | 1:0f1be4e75668 | 728 | } |
alexan_e | 1:0f1be4e75668 | 729 | else |
alexan_e | 1:0f1be4e75668 | 730 | { |
alexan_e | 1:0f1be4e75668 | 731 | LPC_GPIO_GROUP_INT1->CTRL |= (0x1<<2); /* Level trigger. */ |
alexan_e | 1:0f1be4e75668 | 732 | } |
alexan_e | 1:0f1be4e75668 | 733 | LPC_GPIO_GROUP_INT1->CTRL |= (logic<<1); |
alexan_e | 1:0f1be4e75668 | 734 | LPC_GPIO_GROUP_INT1->PORT_POL[0] = *((uint32_t *)(eventPattern + 0)); |
alexan_e | 1:0f1be4e75668 | 735 | LPC_GPIO_GROUP_INT1->PORT_POL[1] = *((uint32_t *)(eventPattern + 1)); |
alexan_e | 1:0f1be4e75668 | 736 | LPC_GPIO_GROUP_INT1->PORT_ENA[0] = *((uint32_t *)(bitPattern + 0)); |
alexan_e | 1:0f1be4e75668 | 737 | LPC_GPIO_GROUP_INT1->PORT_ENA[1] = *((uint32_t *)(bitPattern + 1)); |
alexan_e | 1:0f1be4e75668 | 738 | /* as soon as enabled, an edge may be generated */ |
alexan_e | 1:0f1be4e75668 | 739 | /* clear interrupt flag and NVIC pending interrupt to */ |
alexan_e | 1:0f1be4e75668 | 740 | /* workaround the potential edge generated as enabled */ |
alexan_e | 1:0f1be4e75668 | 741 | LPC_GPIO_GROUP_INT1->CTRL |= (1<<0); |
alexan_e | 1:0f1be4e75668 | 742 | NVIC_ClearPendingIRQ(GINT1_IRQn); |
alexan_e | 1:0f1be4e75668 | 743 | NVIC_EnableIRQ(GINT1_IRQn); |
alexan_e | 1:0f1be4e75668 | 744 | break; |
alexan_e | 1:0f1be4e75668 | 745 | default: |
alexan_e | 1:0f1be4e75668 | 746 | break; |
alexan_e | 1:0f1be4e75668 | 747 | } |
alexan_e | 1:0f1be4e75668 | 748 | |
alexan_e | 1:0f1be4e75668 | 749 | return; |
alexan_e | 1:0f1be4e75668 | 750 | } |
alexan_e | 1:0f1be4e75668 | 751 | |
alexan_e | 1:0f1be4e75668 | 752 | /***************************************************************************** |
alexan_e | 1:0f1be4e75668 | 753 | ** Function name: GPIOGetPinValue |
alexan_e | 1:0f1be4e75668 | 754 | ** |
alexan_e | 1:0f1be4e75668 | 755 | ** Descriptions: Read Current state of port pin, PIN register value |
alexan_e | 1:0f1be4e75668 | 756 | ** |
alexan_e | 1:0f1be4e75668 | 757 | ** parameters: port num, bit position |
alexan_e | 1:0f1be4e75668 | 758 | ** Returned value: None |
alexan_e | 1:0f1be4e75668 | 759 | ** |
alexan_e | 1:0f1be4e75668 | 760 | *****************************************************************************/ |
alexan_e | 1:0f1be4e75668 | 761 | uint32_t GPIOGetPinValue( uint32_t portNum, uint32_t bitPosi ) |
alexan_e | 1:0f1be4e75668 | 762 | { |
alexan_e | 1:0f1be4e75668 | 763 | uint32_t regVal = 0; |
alexan_e | 1:0f1be4e75668 | 764 | |
alexan_e | 1:0f1be4e75668 | 765 | if( bitPosi < 0x20 ) |
alexan_e | 1:0f1be4e75668 | 766 | { |
alexan_e | 1:0f1be4e75668 | 767 | if ( LPC_GPIO->PIN[portNum] & (0x1<<bitPosi) ) |
alexan_e | 1:0f1be4e75668 | 768 | { |
alexan_e | 1:0f1be4e75668 | 769 | regVal = 1; |
alexan_e | 1:0f1be4e75668 | 770 | } |
alexan_e | 1:0f1be4e75668 | 771 | } |
alexan_e | 1:0f1be4e75668 | 772 | else if( bitPosi == 0xFF ) |
alexan_e | 1:0f1be4e75668 | 773 | { |
alexan_e | 1:0f1be4e75668 | 774 | regVal = LPC_GPIO->PIN[portNum]; |
alexan_e | 1:0f1be4e75668 | 775 | } |
alexan_e | 1:0f1be4e75668 | 776 | return ( regVal ); |
alexan_e | 1:0f1be4e75668 | 777 | } |
alexan_e | 1:0f1be4e75668 | 778 | |
alexan_e | 1:0f1be4e75668 | 779 | /***************************************************************************** |
alexan_e | 1:0f1be4e75668 | 780 | ** Function name: GPIOSetBitValue |
alexan_e | 1:0f1be4e75668 | 781 | ** |
alexan_e | 1:0f1be4e75668 | 782 | ** Descriptions: Set/clear a bit in a specific position |
alexan_e | 1:0f1be4e75668 | 783 | ** |
alexan_e | 1:0f1be4e75668 | 784 | ** parameters: port num, bit position, bit value |
alexan_e | 1:0f1be4e75668 | 785 | ** |
alexan_e | 1:0f1be4e75668 | 786 | ** Returned value: None |
alexan_e | 1:0f1be4e75668 | 787 | ** |
alexan_e | 1:0f1be4e75668 | 788 | *****************************************************************************/ |
alexan_e | 1:0f1be4e75668 | 789 | void GPIOSetBitValue( uint32_t portNum, uint32_t bitPosi, uint32_t bitVal ) |
alexan_e | 1:0f1be4e75668 | 790 | { |
alexan_e | 1:0f1be4e75668 | 791 | if ( bitVal ) |
alexan_e | 1:0f1be4e75668 | 792 | { |
alexan_e | 1:0f1be4e75668 | 793 | LPC_GPIO->SET[portNum] = 1<<bitPosi; |
alexan_e | 1:0f1be4e75668 | 794 | } |
alexan_e | 1:0f1be4e75668 | 795 | else |
alexan_e | 1:0f1be4e75668 | 796 | { |
alexan_e | 1:0f1be4e75668 | 797 | LPC_GPIO->CLR[portNum] = 1<<bitPosi; |
alexan_e | 1:0f1be4e75668 | 798 | } |
alexan_e | 1:0f1be4e75668 | 799 | return; |
alexan_e | 1:0f1be4e75668 | 800 | } |
alexan_e | 1:0f1be4e75668 | 801 | |
alexan_e | 1:0f1be4e75668 | 802 | /***************************************************************************** |
alexan_e | 1:0f1be4e75668 | 803 | ** Function name: GPIOSetDir |
alexan_e | 1:0f1be4e75668 | 804 | ** |
alexan_e | 1:0f1be4e75668 | 805 | ** Descriptions: Set the direction in GPIO port |
alexan_e | 1:0f1be4e75668 | 806 | ** |
alexan_e | 1:0f1be4e75668 | 807 | ** parameters: portNum, bit position, direction (1 out, 0 input) |
alexan_e | 1:0f1be4e75668 | 808 | ** |
alexan_e | 1:0f1be4e75668 | 809 | ** Returned value: None |
alexan_e | 1:0f1be4e75668 | 810 | ** |
alexan_e | 1:0f1be4e75668 | 811 | *****************************************************************************/ |
alexan_e | 1:0f1be4e75668 | 812 | void GPIOSetDir( uint32_t portNum, uint32_t bitPosi, uint32_t dir ) |
alexan_e | 1:0f1be4e75668 | 813 | { |
alexan_e | 1:0f1be4e75668 | 814 | if( dir ) |
alexan_e | 1:0f1be4e75668 | 815 | { |
alexan_e | 1:0f1be4e75668 | 816 | LPC_GPIO->DIR[portNum] |= (1<<bitPosi); |
alexan_e | 1:0f1be4e75668 | 817 | } |
alexan_e | 1:0f1be4e75668 | 818 | else |
alexan_e | 1:0f1be4e75668 | 819 | { |
alexan_e | 1:0f1be4e75668 | 820 | LPC_GPIO->DIR[portNum] &= ~(1<<bitPosi); |
alexan_e | 1:0f1be4e75668 | 821 | } |
alexan_e | 1:0f1be4e75668 | 822 | return; |
alexan_e | 1:0f1be4e75668 | 823 | } |
alexan_e | 1:0f1be4e75668 | 824 | |
alexan_e | 1:0f1be4e75668 | 825 | /****************************************************************************** |
alexan_e | 1:0f1be4e75668 | 826 | ** End Of File |
alexan_e | 1:0f1be4e75668 | 827 | ******************************************************************************/ |