a hambi / Mbed 2 deprecated Frequency_ramps_with_RAM

With the DDS RAM registers a desired function "frequency (time)" can be implemented for one of the output channels and triggered either by the serial terminal or by an external signal on one of the mbed pins.

Dependencies:   mbed

DDS.h@7:c186636817d0, 2012-11-09 (annotated)

Committer:
ahambi
Date:
Fri Nov 09 16:02:56 2012 +0000
Revision:
7:c186636817d0
Parent:
0:2160f1821475
Child:
2:2f8894495161
With the DDS RAM registers  a desired function "frequency(time)" can be implemented for one of the output channels and triggered either by the serial terminal or by an external signal on one of the mbed pins.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
ahambi 0:2160f1821475 1 #ifndef DDS_H
ahambi 0:2160f1821475 2 #define DDS_H
ahambi 0:2160f1821475 3
ahambi 0:2160f1821475 4 #include "mbed.h"
ahambi 0:2160f1821475 5
ahambi 0:2160f1821475 6 class DDS {
ahambi 0:2160f1821475 7
ahambi 0:2160f1821475 8 public:
ahambi 0:2160f1821475 9 SPI _spi;
ahambi 0:2160f1821475 10 DigitalOut _cs;
ahambi 0:2160f1821475 11 DigitalOut _rst;
ahambi 0:2160f1821475 12 DigitalOut update;
ahambi 0:2160f1821475 13
ahambi 0:2160f1821475 14 DDS(PinName mosi, PinName miso, PinName sclk, PinName cs, PinName rst, PinName update) :
ahambi 0:2160f1821475 15 _spi(mosi, miso, sclk), _cs(cs), _rst(rst), update(update)
ahambi 0:2160f1821475 16 {
ahambi 0:2160f1821475 17 // see http://mbed.org/handbook/SPI and page 23 [manual] why format 0
ahambi 0:2160f1821475 18 _spi.format(8, 0);
ahambi 0:2160f1821475 19 _spi.frequency(12e6); // system clock: 1 MHz or 1 us
ahambi 0:2160f1821475 20 };
ahambi 0:2160f1821475 21
ahambi 0:2160f1821475 22 // ------------------------------------------------------------
ahambi 0:2160f1821475 23
ahambi 0:2160f1821475 24 // *** write and read functions ***
ahambi 0:2160f1821475 25
ahambi 0:2160f1821475 26 // writing to "n_byte" register, with address "address" the value "value"
ahambi 0:2160f1821475 27 void write(int n_byte, uint32_t address, uint64_t value) {
ahambi 0:2160f1821475 28 update = 0;
ahambi 0:2160f1821475 29 // Instruction byte: (page 25 [manual]) write (0) + internal adress of the register to be written in
ahambi 0:2160f1821475 30 _spi.write(0x00 | (address & 0x1F));
ahambi 0:2160f1821475 31 while(n_byte>0) {
ahambi 0:2160f1821475 32 n_byte = n_byte - 1;
ahambi 0:2160f1821475 33 _spi.write((value >> 8*n_byte) & 0xFF);
ahambi 0:2160f1821475 34 }
ahambi 0:2160f1821475 35 update = 1;
ahambi 0:2160f1821475 36 wait(5*1/(12.0e6));
ahambi 0:2160f1821475 37 update =0;
ahambi 0:2160f1821475 38 }
ahambi 0:2160f1821475 39
ahambi 0:2160f1821475 40 void ram_write(int n_byte, uint32_t value) {
ahambi 0:2160f1821475 41 while(n_byte>0) {
ahambi 0:2160f1821475 42 n_byte = n_byte - 1;
ahambi 0:2160f1821475 43 _spi.write((value >> 8*n_byte) & 0xFF);
ahambi 0:2160f1821475 44 }
ahambi 0:2160f1821475 45 }
ahambi 0:2160f1821475 46
ahambi 0:2160f1821475 47 /*
ahambi 0:2160f1821475 48 void RAM_enable() {
ahambi 0:2160f1821475 49 int n_byte = 4;
ahambi 0:2160f1821475 50 uint32_t value = 0x80000200;
ahambi 0:2160f1821475 51 _ps0 = 0;
ahambi 0:2160f1821475 52 _spi.write(0x00 | (0x00 & 0x1F));
ahambi 0:2160f1821475 53 while(n_byte>0) {
ahambi 0:2160f1821475 54 n_byte = n_byte - 1;
ahambi 0:2160f1821475 55 _spi.write((value >> 8*n_byte) & 0xFF);
ahambi 0:2160f1821475 56 }
ahambi 0:2160f1821475 57 _ps0 = 1;
ahambi 0:2160f1821475 58 }*/
ahambi 0:2160f1821475 59
ahambi 0:2160f1821475 60 // Write functions
ahambi 0:2160f1821475 61 void PLSCW_write(uint64_t reg) { write(5, 0x08, reg); }
ahambi 0:2160f1821475 62 void NLSCW_write(uint64_t reg) { write(5, 0x07, reg); }
ahambi 0:2160f1821475 63 // void RSCW0_write(uint64_t reg) { write(5, 0x07, reg); }
ahambi 0:2160f1821475 64 void CFR1_write(uint32_t reg) { write(4, 0x00, reg); }
ahambi 0:2160f1821475 65 void RAM_write_FTWO(uint32_t reg) { ram_write(4, reg); }
ahambi 0:2160f1821475 66 void RAM_write_PHWO(uint32_t reg) { ram_write(2, reg); }
ahambi 0:2160f1821475 67 void FTW0_write(uint32_t reg) { write(4, 0x04, reg); }
ahambi 0:2160f1821475 68 void FTW1_write(uint32_t reg) { write(4, 0x06, reg); }
ahambi 0:2160f1821475 69 void CFR2_write(uint32_t reg) { write(3, 0x01, reg); }
ahambi 0:2160f1821475 70 void PHWO_write(uint32_t reg) { write(2, 0x05, reg); }
ahambi 0:2160f1821475 71 void ASF_write(uint32_t reg) { write(2, 0x02, reg); }
ahambi 0:2160f1821475 72 void ARR_write(uint32_t reg) { write(1, 0x03, reg); }
ahambi 0:2160f1821475 73
ahambi 0:2160f1821475 74
ahambi 0:2160f1821475 75 // ------------------------------------------------------------
ahambi 0:2160f1821475 76
ahambi 0:2160f1821475 77 // Read 5 byte
ahambi 0:2160f1821475 78 uint64_t read_reg_5byte(uint32_t address) {
ahambi 0:2160f1821475 79 uint64_t value;
ahambi 0:2160f1821475 80 _spi.write(0x80 | (address & 0x0F)); // Instruction byte
ahambi 0:2160f1821475 81 value |= _spi.write(0x00);
ahambi 0:2160f1821475 82 value = value << 8;
ahambi 0:2160f1821475 83 value |= _spi.write(0x00);
ahambi 0:2160f1821475 84 value = value << 8;
ahambi 0:2160f1821475 85 value |= _spi.write(0x00);
ahambi 0:2160f1821475 86 value = value << 8;
ahambi 0:2160f1821475 87 value |= _spi.write(0x00);
ahambi 0:2160f1821475 88 value = value << 8;
ahambi 0:2160f1821475 89 value |= _spi.write(0x00);
ahambi 0:2160f1821475 90 return value;
ahambi 0:2160f1821475 91 }
ahambi 0:2160f1821475 92
ahambi 0:2160f1821475 93 // Read 4 byte.
ahambi 0:2160f1821475 94 uint32_t read_reg_4byte(uint32_t address) {
ahambi 0:2160f1821475 95 uint32_t value = 0x00000000;
ahambi 0:2160f1821475 96 _spi.write(0x80 | (address & 0x0F)); // Instruction byte
ahambi 0:2160f1821475 97 value |= _spi.write(0x00);
ahambi 0:2160f1821475 98 value = value << 8;
ahambi 0:2160f1821475 99 value |= _spi.write(0x00);
ahambi 0:2160f1821475 100 value = value << 8;
ahambi 0:2160f1821475 101 value |= _spi.write(0x00);
ahambi 0:2160f1821475 102 value = value << 8;
ahambi 0:2160f1821475 103 value |= _spi.write(0x00);
ahambi 0:2160f1821475 104 return value;
ahambi 0:2160f1821475 105 }
ahambi 0:2160f1821475 106
ahambi 0:2160f1821475 107 // Read 3 byte
ahambi 0:2160f1821475 108 uint32_t read_reg_3byte(uint32_t address) {
ahambi 0:2160f1821475 109 uint32_t value = 0x000000;
ahambi 0:2160f1821475 110 _spi.write(0x80 | (address & 0x0F)); // Instruction byte
ahambi 0:2160f1821475 111 value |= _spi.write(0x00);
ahambi 0:2160f1821475 112 value = value << 8;
ahambi 0:2160f1821475 113 value |= _spi.write(0x00);
ahambi 0:2160f1821475 114 value = value << 8;
ahambi 0:2160f1821475 115 value |= _spi.write(0x00);
ahambi 0:2160f1821475 116 return value;
ahambi 0:2160f1821475 117 }
ahambi 0:2160f1821475 118
ahambi 0:2160f1821475 119 // Read 2 byte
ahambi 0:2160f1821475 120 uint32_t read_reg_2byte(uint32_t address) {
ahambi 0:2160f1821475 121 uint32_t value = 0x000000;
ahambi 0:2160f1821475 122 _spi.write(0x80 | (address & 0x0F)); // Instruction byte
ahambi 0:2160f1821475 123 value |= _spi.write(0x00);
ahambi 0:2160f1821475 124 value = value << 8;
ahambi 0:2160f1821475 125 value |= _spi.write(0x00);
ahambi 0:2160f1821475 126 return value;
ahambi 0:2160f1821475 127 }
ahambi 0:2160f1821475 128
ahambi 0:2160f1821475 129 // Read 1 byte
ahambi 0:2160f1821475 130 uint32_t read_reg_1byte(uint32_t address) {
ahambi 0:2160f1821475 131 uint32_t value = 0x00;
ahambi 0:2160f1821475 132 _spi.write(0x80 | (address & 0x0F)); // Instruction byte
ahambi 0:2160f1821475 133 value |= _spi.write(0x00);
ahambi 0:2160f1821475 134 return value;
ahambi 0:2160f1821475 135 }
ahambi 0:2160f1821475 136
ahambi 0:2160f1821475 137
ahambi 0:2160f1821475 138 // Read functions
ahambi 0:2160f1821475 139 uint64_t RSCW0_read(void) { return read_reg_5byte(0x07); }
ahambi 0:2160f1821475 140 uint64_t PLSCW_read(void) { return read_reg_5byte(0x08); }
ahambi 0:2160f1821475 141 uint64_t NLSCW_read(void) { return read_reg_5byte(0x07); }
ahambi 0:2160f1821475 142 uint32_t CFR1_read(void) { return read_reg_4byte(0x00); }
ahambi 0:2160f1821475 143 uint32_t FTWO_read(void) { return read_reg_4byte(0x04); }
ahambi 0:2160f1821475 144 uint32_t CFR2_read(void) { return read_reg_3byte(0x01); }
ahambi 0:2160f1821475 145 uint32_t PHWO_read(void) { return read_reg_2byte(0x05); }
ahambi 0:2160f1821475 146 };
ahambi 0:2160f1821475 147
ahambi 0:2160f1821475 148 #endif