Diff: targets/cmsis/TARGET_STM/TARGET_NUCLEO_F401RE/stm32f4xx_hal_sdram.c

Revision:

106:ced8cbb51063

Parent:

87:085cde657901

--- a/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F401RE/stm32f4xx_hal_sdram.c	Mon Feb 24 10:30:08 2014 +0000
+++ b/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F401RE/stm32f4xx_hal_sdram.c	Wed Feb 26 09:45:12 2014 +0000
@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_sdram.c
   * @author  MCD Application Team
-  * @version V1.0.0RC2
-  * @date    04-February-2014
+  * @version V1.0.0
+  * @date    18-February-2014
   * @brief   SDRAM HAL module driver.
   *          This file provides a generic firmware to drive SDRAM memories mounted 
   *          as external device.
@@ -102,7 +102,6 @@
   * @{
   */
 #ifdef HAL_SDRAM_MODULE_ENABLED
-
 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
 
 /* Private typedef -----------------------------------------------------------*/
@@ -176,10 +175,16 @@
 {
   /* Initialize the low level hardware (MSP) */
   HAL_SDRAM_MspDeInit(hsdram);
-  
+
   /* Configure the SDRAM registers with their reset values */
   FMC_SDRAM_DeInit(hsdram->Instance, hsdram->Init.SDBank);
-  
+
+  /* Reset the SDRAM controller state */
+  hsdram->State = HAL_SDRAM_STATE_RESET;
+
+  /* Release Lock */
+  __HAL_UNLOCK(hsdram);
+
   return HAL_OK;
 }
 
@@ -309,11 +314,11 @@
   {
     *pDstBuffer = *(__IO uint8_t *)pSdramAddress;  
     pDstBuffer++;
-    pSdramAddress++;               
+    pSdramAddress++;
   }
   
   /* Process Unlocked */
-  __HAL_UNLOCK(hsdram);       
+  __HAL_UNLOCK(hsdram);
   
   return HAL_OK; 
 }
@@ -352,7 +357,7 @@
   {
     *(__IO uint8_t *)pSdramAddress = *pSrcBuffer;
     pSrcBuffer++;
-    pSdramAddress++;           
+    pSdramAddress++;
   }
   
   /* Process Unlocked */