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targets/cmsis/TARGET_STM/TARGET_NUCLEO_F401RE/stm32f4xx_hal_nand.c@106:ced8cbb51063, 2014-02-26 (annotated)
- Committer:
- mbed_official
- Date:
- Wed Feb 26 09:45:12 2014 +0000
- Revision:
- 106:ced8cbb51063
- Parent:
- 87:085cde657901
Synchronized with git revision 4222735eff5868389433f0e9271976b39c8115cd
Full URL: https://github.com/mbedmicro/mbed/commit/4222735eff5868389433f0e9271976b39c8115cd/
[NUCLEO_xxx] Update STM32CubeF4 driver V1.0.0 + update license
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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mbed_official | 87:085cde657901 | 1 | /** |
mbed_official | 87:085cde657901 | 2 | ****************************************************************************** |
mbed_official | 87:085cde657901 | 3 | * @file stm32f4xx_hal_nand.c |
mbed_official | 87:085cde657901 | 4 | * @author MCD Application Team |
mbed_official | 106:ced8cbb51063 | 5 | * @version V1.0.0 |
mbed_official | 106:ced8cbb51063 | 6 | * @date 18-February-2014 |
mbed_official | 87:085cde657901 | 7 | * @brief NAND HAL module driver. |
mbed_official | 87:085cde657901 | 8 | * This file provides a generic firmware to drive NAND memories mounted |
mbed_official | 87:085cde657901 | 9 | * as external device. |
mbed_official | 87:085cde657901 | 10 | * |
mbed_official | 87:085cde657901 | 11 | @verbatim |
mbed_official | 87:085cde657901 | 12 | ============================================================================== |
mbed_official | 87:085cde657901 | 13 | ##### How to use this driver ##### |
mbed_official | 87:085cde657901 | 14 | ============================================================================== |
mbed_official | 87:085cde657901 | 15 | [..] |
mbed_official | 87:085cde657901 | 16 | This driver is a generic layered driver which contains a set of APIs used to |
mbed_official | 87:085cde657901 | 17 | control NAND flash memories. It uses the FMC/FSMC layer functions to interface |
mbed_official | 87:085cde657901 | 18 | with NAND devices. This driver is used as follows: |
mbed_official | 87:085cde657901 | 19 | |
mbed_official | 87:085cde657901 | 20 | (+) NAND flash memory configuration sequence using the function HAL_NAND_Init() |
mbed_official | 87:085cde657901 | 21 | with control and timing parameters for both common and attribute spaces. |
mbed_official | 87:085cde657901 | 22 | |
mbed_official | 87:085cde657901 | 23 | (+) Read NAND flash memory maker and device IDs using the function |
mbed_official | 87:085cde657901 | 24 | HAL_NAND_Read_ID(). The read information is stored in the NAND_ID_TypeDef |
mbed_official | 87:085cde657901 | 25 | structure declared by the function caller. |
mbed_official | 87:085cde657901 | 26 | |
mbed_official | 87:085cde657901 | 27 | (+) Access NAND flash memory by read/write operations using the functions |
mbed_official | 87:085cde657901 | 28 | HAL_NAND_Read_Page()/HAL_NAND_Read_SpareArea(), HAL_NAND_Write_Page()/HAL_NAND_Write_SpareArea() |
mbed_official | 87:085cde657901 | 29 | to read/write page(s)/spare area(s). These functions use specific device |
mbed_official | 87:085cde657901 | 30 | information (Block, page size..) predefined by the user in the HAL_NAND_Info_TypeDef |
mbed_official | 87:085cde657901 | 31 | structure. The read/write address information is contained by the Nand_Address_Typedef |
mbed_official | 87:085cde657901 | 32 | structure passed as parameter. |
mbed_official | 87:085cde657901 | 33 | |
mbed_official | 87:085cde657901 | 34 | (+) Perform NAND flash Reset chip operation using the function HAL_NAND_Reset(). |
mbed_official | 87:085cde657901 | 35 | |
mbed_official | 87:085cde657901 | 36 | (+) Perform NAND flash erase block operation using the function HAL_NAND_Erase_Block(). |
mbed_official | 87:085cde657901 | 37 | The erase block address information is contained in the Nand_Address_Typedef |
mbed_official | 87:085cde657901 | 38 | structure passed as parameter. |
mbed_official | 87:085cde657901 | 39 | |
mbed_official | 87:085cde657901 | 40 | (+) Read the NAND flash status operation using the function HAL_NAND_Read_Status(). |
mbed_official | 87:085cde657901 | 41 | |
mbed_official | 87:085cde657901 | 42 | (+) You can also control the NAND device by calling the control APIs HAL_NAND_ECC_Enable()/ |
mbed_official | 87:085cde657901 | 43 | HAL_NAND_ECC_Disable() to respectively enable/disable the ECC code correction |
mbed_official | 87:085cde657901 | 44 | feature or the function HAL_NAND_GetECC() to get the ECC correction code. |
mbed_official | 87:085cde657901 | 45 | |
mbed_official | 87:085cde657901 | 46 | (+) You can monitor the NAND device HAL state by calling the function |
mbed_official | 87:085cde657901 | 47 | HAL_NAND_GetState() |
mbed_official | 87:085cde657901 | 48 | |
mbed_official | 87:085cde657901 | 49 | [..] |
mbed_official | 87:085cde657901 | 50 | (@) This driver is a set of generic APIs which handle standard NAND flash operations. |
mbed_official | 87:085cde657901 | 51 | If a NAND flash device contains different operations and/or implementations, |
mbed_official | 87:085cde657901 | 52 | it should be implemented separately. |
mbed_official | 87:085cde657901 | 53 | |
mbed_official | 87:085cde657901 | 54 | @endverbatim |
mbed_official | 87:085cde657901 | 55 | ****************************************************************************** |
mbed_official | 87:085cde657901 | 56 | * @attention |
mbed_official | 87:085cde657901 | 57 | * |
mbed_official | 87:085cde657901 | 58 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
mbed_official | 87:085cde657901 | 59 | * |
mbed_official | 87:085cde657901 | 60 | * Redistribution and use in source and binary forms, with or without modification, |
mbed_official | 87:085cde657901 | 61 | * are permitted provided that the following conditions are met: |
mbed_official | 87:085cde657901 | 62 | * 1. Redistributions of source code must retain the above copyright notice, |
mbed_official | 87:085cde657901 | 63 | * this list of conditions and the following disclaimer. |
mbed_official | 87:085cde657901 | 64 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
mbed_official | 87:085cde657901 | 65 | * this list of conditions and the following disclaimer in the documentation |
mbed_official | 87:085cde657901 | 66 | * and/or other materials provided with the distribution. |
mbed_official | 87:085cde657901 | 67 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
mbed_official | 87:085cde657901 | 68 | * may be used to endorse or promote products derived from this software |
mbed_official | 87:085cde657901 | 69 | * without specific prior written permission. |
mbed_official | 87:085cde657901 | 70 | * |
mbed_official | 87:085cde657901 | 71 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
mbed_official | 87:085cde657901 | 72 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
mbed_official | 87:085cde657901 | 73 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
mbed_official | 87:085cde657901 | 74 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
mbed_official | 87:085cde657901 | 75 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
mbed_official | 87:085cde657901 | 76 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
mbed_official | 87:085cde657901 | 77 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
mbed_official | 87:085cde657901 | 78 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
mbed_official | 87:085cde657901 | 79 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
mbed_official | 87:085cde657901 | 80 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
mbed_official | 87:085cde657901 | 81 | * |
mbed_official | 87:085cde657901 | 82 | ****************************************************************************** |
mbed_official | 87:085cde657901 | 83 | */ |
mbed_official | 87:085cde657901 | 84 | |
mbed_official | 87:085cde657901 | 85 | /* Includes ------------------------------------------------------------------*/ |
mbed_official | 87:085cde657901 | 86 | #include "stm32f4xx_hal.h" |
mbed_official | 87:085cde657901 | 87 | |
mbed_official | 87:085cde657901 | 88 | /** @addtogroup STM32F4xx_HAL_Driver |
mbed_official | 87:085cde657901 | 89 | * @{ |
mbed_official | 87:085cde657901 | 90 | */ |
mbed_official | 87:085cde657901 | 91 | |
mbed_official | 87:085cde657901 | 92 | /** @defgroup NAND |
mbed_official | 87:085cde657901 | 93 | * @brief NAND driver modules |
mbed_official | 87:085cde657901 | 94 | * @{ |
mbed_official | 87:085cde657901 | 95 | */ |
mbed_official | 87:085cde657901 | 96 | #ifdef HAL_NAND_MODULE_ENABLED |
mbed_official | 87:085cde657901 | 97 | |
mbed_official | 87:085cde657901 | 98 | #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) |
mbed_official | 87:085cde657901 | 99 | |
mbed_official | 87:085cde657901 | 100 | /* Private typedef -----------------------------------------------------------*/ |
mbed_official | 87:085cde657901 | 101 | /* Private define ------------------------------------------------------------*/ |
mbed_official | 87:085cde657901 | 102 | /* Private macro -------------------------------------------------------------*/ |
mbed_official | 87:085cde657901 | 103 | /* Private variables ---------------------------------------------------------*/ |
mbed_official | 87:085cde657901 | 104 | /* Private function prototypes -----------------------------------------------*/ |
mbed_official | 87:085cde657901 | 105 | /* Private functions ---------------------------------------------------------*/ |
mbed_official | 87:085cde657901 | 106 | |
mbed_official | 87:085cde657901 | 107 | /** @defgroup NAND_Private_Functions |
mbed_official | 87:085cde657901 | 108 | * @{ |
mbed_official | 87:085cde657901 | 109 | */ |
mbed_official | 87:085cde657901 | 110 | |
mbed_official | 87:085cde657901 | 111 | /** @defgroup NAND_Group1 Initialization and de-initialization functions |
mbed_official | 87:085cde657901 | 112 | * @brief Initialization and Configuration functions |
mbed_official | 87:085cde657901 | 113 | * |
mbed_official | 87:085cde657901 | 114 | @verbatim |
mbed_official | 87:085cde657901 | 115 | ============================================================================== |
mbed_official | 87:085cde657901 | 116 | ##### NAND Initialization and de-initialization functions ##### |
mbed_official | 87:085cde657901 | 117 | ============================================================================== |
mbed_official | 87:085cde657901 | 118 | [..] |
mbed_official | 87:085cde657901 | 119 | This section provides functions allowing to initialize/de-initialize |
mbed_official | 87:085cde657901 | 120 | the NAND memory |
mbed_official | 87:085cde657901 | 121 | |
mbed_official | 87:085cde657901 | 122 | @endverbatim |
mbed_official | 87:085cde657901 | 123 | * @{ |
mbed_official | 87:085cde657901 | 124 | */ |
mbed_official | 87:085cde657901 | 125 | |
mbed_official | 87:085cde657901 | 126 | /** |
mbed_official | 87:085cde657901 | 127 | * @brief Perform NAND memory Initialization sequence |
mbed_official | 87:085cde657901 | 128 | * @param hnand: pointer to NAND handle |
mbed_official | 87:085cde657901 | 129 | * @param ComSpace_Timing: pointer to Common space timing structure |
mbed_official | 87:085cde657901 | 130 | * @param AttSpace_Timing: pointer to Attribute space timing structure |
mbed_official | 87:085cde657901 | 131 | * @retval HAL status |
mbed_official | 87:085cde657901 | 132 | */ |
mbed_official | 87:085cde657901 | 133 | HAL_StatusTypeDef HAL_NAND_Init(NAND_HandleTypeDef *hnand, FMC_NAND_PCC_TimingTypeDef *ComSpace_Timing, FMC_NAND_PCC_TimingTypeDef *AttSpace_Timing) |
mbed_official | 87:085cde657901 | 134 | { |
mbed_official | 87:085cde657901 | 135 | /* Check the NAND handle state */ |
mbed_official | 87:085cde657901 | 136 | if(hnand == NULL) |
mbed_official | 87:085cde657901 | 137 | { |
mbed_official | 87:085cde657901 | 138 | return HAL_ERROR; |
mbed_official | 87:085cde657901 | 139 | } |
mbed_official | 87:085cde657901 | 140 | |
mbed_official | 87:085cde657901 | 141 | if(hnand->State == HAL_NAND_STATE_RESET) |
mbed_official | 87:085cde657901 | 142 | { |
mbed_official | 87:085cde657901 | 143 | /* Initialize the low level hardware (MSP) */ |
mbed_official | 87:085cde657901 | 144 | HAL_NAND_MspInit(hnand); |
mbed_official | 87:085cde657901 | 145 | } |
mbed_official | 87:085cde657901 | 146 | |
mbed_official | 87:085cde657901 | 147 | /* Initialize NAND control Interface */ |
mbed_official | 87:085cde657901 | 148 | FMC_NAND_Init(hnand->Instance, &(hnand->Init)); |
mbed_official | 87:085cde657901 | 149 | |
mbed_official | 87:085cde657901 | 150 | /* Initialize NAND common space timing Interface */ |
mbed_official | 87:085cde657901 | 151 | FMC_NAND_CommonSpace_Timing_Init(hnand->Instance, ComSpace_Timing, hnand->Init.NandBank); |
mbed_official | 87:085cde657901 | 152 | |
mbed_official | 87:085cde657901 | 153 | /* Initialize NAND attribute space timing Interface */ |
mbed_official | 87:085cde657901 | 154 | FMC_NAND_AttributeSpace_Timing_Init(hnand->Instance, AttSpace_Timing, hnand->Init.NandBank); |
mbed_official | 87:085cde657901 | 155 | |
mbed_official | 87:085cde657901 | 156 | /* Enable the NAND device */ |
mbed_official | 106:ced8cbb51063 | 157 | __FMC_NAND_ENABLE(hnand->Instance, hnand->Init.NandBank); |
mbed_official | 87:085cde657901 | 158 | |
mbed_official | 87:085cde657901 | 159 | /* Update the NAND controller state */ |
mbed_official | 106:ced8cbb51063 | 160 | hnand->State = HAL_NAND_STATE_READY; |
mbed_official | 106:ced8cbb51063 | 161 | |
mbed_official | 87:085cde657901 | 162 | return HAL_OK; |
mbed_official | 87:085cde657901 | 163 | } |
mbed_official | 87:085cde657901 | 164 | |
mbed_official | 87:085cde657901 | 165 | /** |
mbed_official | 87:085cde657901 | 166 | * @brief Perform NAND memory De-Initialization sequence |
mbed_official | 87:085cde657901 | 167 | * @param hnand: pointer to NAND handle |
mbed_official | 87:085cde657901 | 168 | * @retval HAL status |
mbed_official | 87:085cde657901 | 169 | */ |
mbed_official | 87:085cde657901 | 170 | HAL_StatusTypeDef HAL_NAND_DeInit(NAND_HandleTypeDef *hnand) |
mbed_official | 87:085cde657901 | 171 | { |
mbed_official | 87:085cde657901 | 172 | /* Initialize the low level hardware (MSP) */ |
mbed_official | 87:085cde657901 | 173 | HAL_NAND_MspDeInit(hnand); |
mbed_official | 106:ced8cbb51063 | 174 | |
mbed_official | 87:085cde657901 | 175 | /* Configure the NAND registers with their reset values */ |
mbed_official | 87:085cde657901 | 176 | FMC_NAND_DeInit(hnand->Instance, hnand->Init.NandBank); |
mbed_official | 87:085cde657901 | 177 | |
mbed_official | 106:ced8cbb51063 | 178 | /* Reset the NAND controller state */ |
mbed_official | 106:ced8cbb51063 | 179 | hnand->State = HAL_NAND_STATE_RESET; |
mbed_official | 106:ced8cbb51063 | 180 | |
mbed_official | 106:ced8cbb51063 | 181 | /* Release Lock */ |
mbed_official | 106:ced8cbb51063 | 182 | __HAL_UNLOCK(hnand); |
mbed_official | 106:ced8cbb51063 | 183 | |
mbed_official | 106:ced8cbb51063 | 184 | return HAL_OK; |
mbed_official | 87:085cde657901 | 185 | } |
mbed_official | 87:085cde657901 | 186 | |
mbed_official | 87:085cde657901 | 187 | /** |
mbed_official | 87:085cde657901 | 188 | * @brief NAND MSP Init |
mbed_official | 87:085cde657901 | 189 | * @param hnand: pointer to NAND handle |
mbed_official | 87:085cde657901 | 190 | * @retval None |
mbed_official | 87:085cde657901 | 191 | */ |
mbed_official | 87:085cde657901 | 192 | __weak void HAL_NAND_MspInit(NAND_HandleTypeDef *hnand) |
mbed_official | 87:085cde657901 | 193 | { |
mbed_official | 87:085cde657901 | 194 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 87:085cde657901 | 195 | the HAL_NAND_MspInit could be implemented in the user file |
mbed_official | 87:085cde657901 | 196 | */ |
mbed_official | 87:085cde657901 | 197 | } |
mbed_official | 87:085cde657901 | 198 | |
mbed_official | 87:085cde657901 | 199 | /** |
mbed_official | 87:085cde657901 | 200 | * @brief NAND MSP DeInit |
mbed_official | 87:085cde657901 | 201 | * @param hnand: pointer to NAND handle |
mbed_official | 87:085cde657901 | 202 | * @retval None |
mbed_official | 87:085cde657901 | 203 | */ |
mbed_official | 87:085cde657901 | 204 | __weak void HAL_NAND_MspDeInit(NAND_HandleTypeDef *hnand) |
mbed_official | 87:085cde657901 | 205 | { |
mbed_official | 87:085cde657901 | 206 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 87:085cde657901 | 207 | the HAL_NAND_MspDeInit could be implemented in the user file |
mbed_official | 87:085cde657901 | 208 | */ |
mbed_official | 87:085cde657901 | 209 | } |
mbed_official | 87:085cde657901 | 210 | |
mbed_official | 87:085cde657901 | 211 | |
mbed_official | 87:085cde657901 | 212 | /** |
mbed_official | 87:085cde657901 | 213 | * @brief This function handles NAND device interrupt request. |
mbed_official | 87:085cde657901 | 214 | * @param hnand: pointer to NAND handle |
mbed_official | 87:085cde657901 | 215 | * @retval HAL status |
mbed_official | 87:085cde657901 | 216 | */ |
mbed_official | 87:085cde657901 | 217 | void HAL_NAND_IRQHandler(NAND_HandleTypeDef *hnand) |
mbed_official | 87:085cde657901 | 218 | { |
mbed_official | 87:085cde657901 | 219 | /* Check NAND interrupt Rising edge flag */ |
mbed_official | 87:085cde657901 | 220 | if(__FMC_NAND_GET_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_RISING_EDGE)) |
mbed_official | 87:085cde657901 | 221 | { |
mbed_official | 87:085cde657901 | 222 | /* NAND interrupt callback*/ |
mbed_official | 87:085cde657901 | 223 | HAL_NAND_ITCallback(hnand); |
mbed_official | 87:085cde657901 | 224 | |
mbed_official | 87:085cde657901 | 225 | /* Clear NAND interrupt Rising edge pending bit */ |
mbed_official | 87:085cde657901 | 226 | __FMC_NAND_CLEAR_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_RISING_EDGE); |
mbed_official | 87:085cde657901 | 227 | } |
mbed_official | 87:085cde657901 | 228 | |
mbed_official | 87:085cde657901 | 229 | /* Check NAND interrupt Level flag */ |
mbed_official | 87:085cde657901 | 230 | if(__FMC_NAND_GET_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_LEVEL)) |
mbed_official | 87:085cde657901 | 231 | { |
mbed_official | 87:085cde657901 | 232 | /* NAND interrupt callback*/ |
mbed_official | 87:085cde657901 | 233 | HAL_NAND_ITCallback(hnand); |
mbed_official | 87:085cde657901 | 234 | |
mbed_official | 87:085cde657901 | 235 | /* Clear NAND interrupt Level pending bit */ |
mbed_official | 87:085cde657901 | 236 | __FMC_NAND_CLEAR_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_LEVEL); |
mbed_official | 87:085cde657901 | 237 | } |
mbed_official | 87:085cde657901 | 238 | |
mbed_official | 87:085cde657901 | 239 | /* Check NAND interrupt Falling edge flag */ |
mbed_official | 87:085cde657901 | 240 | if(__FMC_NAND_GET_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_FALLING_EDGE)) |
mbed_official | 87:085cde657901 | 241 | { |
mbed_official | 87:085cde657901 | 242 | /* NAND interrupt callback*/ |
mbed_official | 87:085cde657901 | 243 | HAL_NAND_ITCallback(hnand); |
mbed_official | 87:085cde657901 | 244 | |
mbed_official | 87:085cde657901 | 245 | /* Clear NAND interrupt Falling edge pending bit */ |
mbed_official | 87:085cde657901 | 246 | __FMC_NAND_CLEAR_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_FALLING_EDGE); |
mbed_official | 87:085cde657901 | 247 | } |
mbed_official | 87:085cde657901 | 248 | |
mbed_official | 87:085cde657901 | 249 | /* Check NAND interrupt FIFO empty flag */ |
mbed_official | 87:085cde657901 | 250 | if(__FMC_NAND_GET_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_FEMPT)) |
mbed_official | 87:085cde657901 | 251 | { |
mbed_official | 87:085cde657901 | 252 | /* NAND interrupt callback*/ |
mbed_official | 87:085cde657901 | 253 | HAL_NAND_ITCallback(hnand); |
mbed_official | 87:085cde657901 | 254 | |
mbed_official | 87:085cde657901 | 255 | /* Clear NAND interrupt FIFO empty pending bit */ |
mbed_official | 87:085cde657901 | 256 | __FMC_NAND_CLEAR_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_FEMPT); |
mbed_official | 87:085cde657901 | 257 | } |
mbed_official | 87:085cde657901 | 258 | |
mbed_official | 87:085cde657901 | 259 | } |
mbed_official | 87:085cde657901 | 260 | |
mbed_official | 87:085cde657901 | 261 | /** |
mbed_official | 87:085cde657901 | 262 | * @brief NAND interrupt feature callback |
mbed_official | 87:085cde657901 | 263 | * @param hnand: pointer to NAND handle |
mbed_official | 87:085cde657901 | 264 | * @retval None |
mbed_official | 87:085cde657901 | 265 | */ |
mbed_official | 87:085cde657901 | 266 | __weak void HAL_NAND_ITCallback(NAND_HandleTypeDef *hnand) |
mbed_official | 87:085cde657901 | 267 | { |
mbed_official | 87:085cde657901 | 268 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 87:085cde657901 | 269 | the HAL_NAND_ITCallback could be implemented in the user file |
mbed_official | 87:085cde657901 | 270 | */ |
mbed_official | 87:085cde657901 | 271 | } |
mbed_official | 87:085cde657901 | 272 | |
mbed_official | 87:085cde657901 | 273 | /** |
mbed_official | 87:085cde657901 | 274 | * @} |
mbed_official | 87:085cde657901 | 275 | */ |
mbed_official | 87:085cde657901 | 276 | |
mbed_official | 87:085cde657901 | 277 | /** @defgroup NAND_Group2 Input and Output functions |
mbed_official | 87:085cde657901 | 278 | * @brief Input Output and memory control functions |
mbed_official | 87:085cde657901 | 279 | * |
mbed_official | 87:085cde657901 | 280 | @verbatim |
mbed_official | 87:085cde657901 | 281 | ============================================================================== |
mbed_official | 87:085cde657901 | 282 | ##### NAND Input and Output functions ##### |
mbed_official | 87:085cde657901 | 283 | ============================================================================== |
mbed_official | 87:085cde657901 | 284 | [..] |
mbed_official | 87:085cde657901 | 285 | This section provides functions allowing to use and control the NAND |
mbed_official | 87:085cde657901 | 286 | memory |
mbed_official | 87:085cde657901 | 287 | |
mbed_official | 87:085cde657901 | 288 | @endverbatim |
mbed_official | 87:085cde657901 | 289 | * @{ |
mbed_official | 87:085cde657901 | 290 | */ |
mbed_official | 87:085cde657901 | 291 | |
mbed_official | 87:085cde657901 | 292 | /** |
mbed_official | 87:085cde657901 | 293 | * @brief Read the NAND memory electronic signature |
mbed_official | 87:085cde657901 | 294 | * @param hnand: pointer to NAND handle |
mbed_official | 87:085cde657901 | 295 | * @param pNAND_ID: NAND ID structure |
mbed_official | 87:085cde657901 | 296 | * @retval HAL status |
mbed_official | 87:085cde657901 | 297 | */ |
mbed_official | 87:085cde657901 | 298 | HAL_StatusTypeDef HAL_NAND_Read_ID(NAND_HandleTypeDef *hnand, NAND_IDTypeDef *pNAND_ID) |
mbed_official | 87:085cde657901 | 299 | { |
mbed_official | 87:085cde657901 | 300 | __IO uint32_t data = 0; |
mbed_official | 87:085cde657901 | 301 | uint32_t deviceAddress = 0; |
mbed_official | 87:085cde657901 | 302 | |
mbed_official | 87:085cde657901 | 303 | /* Process Locked */ |
mbed_official | 87:085cde657901 | 304 | __HAL_LOCK(hnand); |
mbed_official | 87:085cde657901 | 305 | |
mbed_official | 87:085cde657901 | 306 | /* Check the NAND controller state */ |
mbed_official | 87:085cde657901 | 307 | if(hnand->State == HAL_NAND_STATE_BUSY) |
mbed_official | 87:085cde657901 | 308 | { |
mbed_official | 87:085cde657901 | 309 | return HAL_BUSY; |
mbed_official | 87:085cde657901 | 310 | } |
mbed_official | 87:085cde657901 | 311 | |
mbed_official | 87:085cde657901 | 312 | /* Identify the device address */ |
mbed_official | 87:085cde657901 | 313 | if(hnand->Init.NandBank == FMC_NAND_BANK2) |
mbed_official | 87:085cde657901 | 314 | { |
mbed_official | 87:085cde657901 | 315 | deviceAddress = NAND_DEVICE1; |
mbed_official | 87:085cde657901 | 316 | } |
mbed_official | 87:085cde657901 | 317 | else |
mbed_official | 87:085cde657901 | 318 | { |
mbed_official | 87:085cde657901 | 319 | deviceAddress = NAND_DEVICE2; |
mbed_official | 87:085cde657901 | 320 | } |
mbed_official | 87:085cde657901 | 321 | |
mbed_official | 87:085cde657901 | 322 | /* Update the NAND controller state */ |
mbed_official | 87:085cde657901 | 323 | hnand->State = HAL_NAND_STATE_BUSY; |
mbed_official | 87:085cde657901 | 324 | |
mbed_official | 87:085cde657901 | 325 | /* Send Read ID command sequence */ |
mbed_official | 87:085cde657901 | 326 | *(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA)) = 0x90; |
mbed_official | 87:085cde657901 | 327 | *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = 0x00; |
mbed_official | 87:085cde657901 | 328 | |
mbed_official | 87:085cde657901 | 329 | /* Read the electronic signature from NAND flash */ |
mbed_official | 87:085cde657901 | 330 | data = *(__IO uint32_t *)deviceAddress; |
mbed_official | 87:085cde657901 | 331 | |
mbed_official | 87:085cde657901 | 332 | /* Return the data read */ |
mbed_official | 87:085cde657901 | 333 | pNAND_ID->Maker_Id = ADDR_1st_CYCLE(data); |
mbed_official | 87:085cde657901 | 334 | pNAND_ID->Device_Id = ADDR_2nd_CYCLE(data); |
mbed_official | 87:085cde657901 | 335 | pNAND_ID->Third_Id = ADDR_3rd_CYCLE(data); |
mbed_official | 87:085cde657901 | 336 | pNAND_ID->Fourth_Id = ADDR_4th_CYCLE(data); |
mbed_official | 87:085cde657901 | 337 | |
mbed_official | 87:085cde657901 | 338 | /* Update the NAND controller state */ |
mbed_official | 87:085cde657901 | 339 | hnand->State = HAL_NAND_STATE_READY; |
mbed_official | 87:085cde657901 | 340 | |
mbed_official | 87:085cde657901 | 341 | /* Process unlocked */ |
mbed_official | 87:085cde657901 | 342 | __HAL_UNLOCK(hnand); |
mbed_official | 87:085cde657901 | 343 | |
mbed_official | 87:085cde657901 | 344 | return HAL_OK; |
mbed_official | 87:085cde657901 | 345 | } |
mbed_official | 87:085cde657901 | 346 | |
mbed_official | 87:085cde657901 | 347 | /** |
mbed_official | 87:085cde657901 | 348 | * @brief NAND memory reset |
mbed_official | 87:085cde657901 | 349 | * @param hnand: pointer to NAND handle |
mbed_official | 87:085cde657901 | 350 | * @retval HAL status |
mbed_official | 87:085cde657901 | 351 | */ |
mbed_official | 87:085cde657901 | 352 | HAL_StatusTypeDef HAL_NAND_Reset(NAND_HandleTypeDef *hnand) |
mbed_official | 87:085cde657901 | 353 | { |
mbed_official | 87:085cde657901 | 354 | uint32_t deviceAddress = 0; |
mbed_official | 87:085cde657901 | 355 | |
mbed_official | 87:085cde657901 | 356 | /* Process Locked */ |
mbed_official | 87:085cde657901 | 357 | __HAL_LOCK(hnand); |
mbed_official | 87:085cde657901 | 358 | |
mbed_official | 87:085cde657901 | 359 | /* Check the NAND controller state */ |
mbed_official | 87:085cde657901 | 360 | if(hnand->State == HAL_NAND_STATE_BUSY) |
mbed_official | 87:085cde657901 | 361 | { |
mbed_official | 87:085cde657901 | 362 | return HAL_BUSY; |
mbed_official | 87:085cde657901 | 363 | } |
mbed_official | 87:085cde657901 | 364 | |
mbed_official | 87:085cde657901 | 365 | /* Identify the device address */ |
mbed_official | 87:085cde657901 | 366 | if(hnand->Init.NandBank == FMC_NAND_BANK2) |
mbed_official | 87:085cde657901 | 367 | { |
mbed_official | 87:085cde657901 | 368 | deviceAddress = NAND_DEVICE1; |
mbed_official | 87:085cde657901 | 369 | } |
mbed_official | 87:085cde657901 | 370 | else |
mbed_official | 87:085cde657901 | 371 | { |
mbed_official | 87:085cde657901 | 372 | deviceAddress = NAND_DEVICE2; |
mbed_official | 87:085cde657901 | 373 | } |
mbed_official | 87:085cde657901 | 374 | |
mbed_official | 87:085cde657901 | 375 | /* Update the NAND controller state */ |
mbed_official | 87:085cde657901 | 376 | hnand->State = HAL_NAND_STATE_BUSY; |
mbed_official | 87:085cde657901 | 377 | |
mbed_official | 87:085cde657901 | 378 | /* Send NAND reset command */ |
mbed_official | 87:085cde657901 | 379 | *(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA)) = 0xFF; |
mbed_official | 87:085cde657901 | 380 | |
mbed_official | 87:085cde657901 | 381 | |
mbed_official | 87:085cde657901 | 382 | /* Update the NAND controller state */ |
mbed_official | 87:085cde657901 | 383 | hnand->State = HAL_NAND_STATE_READY; |
mbed_official | 87:085cde657901 | 384 | |
mbed_official | 87:085cde657901 | 385 | /* Process unlocked */ |
mbed_official | 87:085cde657901 | 386 | __HAL_UNLOCK(hnand); |
mbed_official | 87:085cde657901 | 387 | |
mbed_official | 87:085cde657901 | 388 | return HAL_OK; |
mbed_official | 87:085cde657901 | 389 | |
mbed_official | 87:085cde657901 | 390 | } |
mbed_official | 87:085cde657901 | 391 | |
mbed_official | 87:085cde657901 | 392 | |
mbed_official | 87:085cde657901 | 393 | /** |
mbed_official | 87:085cde657901 | 394 | * @brief Read Page(s) from NAND memory block |
mbed_official | 87:085cde657901 | 395 | * @param hnand: pointer to NAND handle |
mbed_official | 87:085cde657901 | 396 | * @param pAddress : pointer to NAND address structure |
mbed_official | 87:085cde657901 | 397 | * @param pBuffer : pointer to destination read buffer |
mbed_official | 87:085cde657901 | 398 | * @param NumPageToRead : number of pages to read from block |
mbed_official | 87:085cde657901 | 399 | * @retval HAL status |
mbed_official | 87:085cde657901 | 400 | */ |
mbed_official | 87:085cde657901 | 401 | HAL_StatusTypeDef HAL_NAND_Read_Page(NAND_HandleTypeDef *hnand, NAND_AddressTypedef *pAddress, uint8_t *pBuffer, uint32_t NumPageToRead) |
mbed_official | 87:085cde657901 | 402 | { |
mbed_official | 87:085cde657901 | 403 | __IO uint32_t index = 0; |
mbed_official | 87:085cde657901 | 404 | uint32_t deviceAddress = 0, size = 0, numPagesRead = 0, nandAddress = 0; |
mbed_official | 87:085cde657901 | 405 | |
mbed_official | 87:085cde657901 | 406 | /* Process Locked */ |
mbed_official | 87:085cde657901 | 407 | __HAL_LOCK(hnand); |
mbed_official | 87:085cde657901 | 408 | |
mbed_official | 87:085cde657901 | 409 | /* Check the NAND controller state */ |
mbed_official | 87:085cde657901 | 410 | if(hnand->State == HAL_NAND_STATE_BUSY) |
mbed_official | 87:085cde657901 | 411 | { |
mbed_official | 87:085cde657901 | 412 | return HAL_BUSY; |
mbed_official | 87:085cde657901 | 413 | } |
mbed_official | 87:085cde657901 | 414 | |
mbed_official | 87:085cde657901 | 415 | /* Identify the device address */ |
mbed_official | 87:085cde657901 | 416 | if(hnand->Init.NandBank == FMC_NAND_BANK2) |
mbed_official | 87:085cde657901 | 417 | { |
mbed_official | 87:085cde657901 | 418 | deviceAddress = NAND_DEVICE1; |
mbed_official | 87:085cde657901 | 419 | } |
mbed_official | 87:085cde657901 | 420 | else |
mbed_official | 87:085cde657901 | 421 | { |
mbed_official | 87:085cde657901 | 422 | deviceAddress = NAND_DEVICE2; |
mbed_official | 87:085cde657901 | 423 | } |
mbed_official | 87:085cde657901 | 424 | |
mbed_official | 87:085cde657901 | 425 | /* Update the NAND controller state */ |
mbed_official | 87:085cde657901 | 426 | hnand->State = HAL_NAND_STATE_BUSY; |
mbed_official | 87:085cde657901 | 427 | |
mbed_official | 87:085cde657901 | 428 | /* NAND raw address calculation */ |
mbed_official | 87:085cde657901 | 429 | nandAddress = ARRAY_ADDRESS(pAddress, hnand); |
mbed_official | 87:085cde657901 | 430 | |
mbed_official | 87:085cde657901 | 431 | /* Page(s) read loop */ |
mbed_official | 87:085cde657901 | 432 | while((NumPageToRead != 0) && (nandAddress < (hnand->Info.BlockSize) * (hnand->Info.PageSize))) |
mbed_official | 87:085cde657901 | 433 | { |
mbed_official | 87:085cde657901 | 434 | /* update the buffer size */ |
mbed_official | 87:085cde657901 | 435 | size = (hnand->Info.PageSize) + ((hnand->Info.PageSize) * numPagesRead); |
mbed_official | 87:085cde657901 | 436 | |
mbed_official | 87:085cde657901 | 437 | /* Send read page command sequence */ |
mbed_official | 87:085cde657901 | 438 | *(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA)) = NAND_CMD_AREA_A; |
mbed_official | 87:085cde657901 | 439 | |
mbed_official | 87:085cde657901 | 440 | *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = 0x00; |
mbed_official | 87:085cde657901 | 441 | *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_1st_CYCLE(nandAddress); |
mbed_official | 87:085cde657901 | 442 | *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_2nd_CYCLE(nandAddress); |
mbed_official | 87:085cde657901 | 443 | *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_3rd_CYCLE(nandAddress); |
mbed_official | 87:085cde657901 | 444 | |
mbed_official | 87:085cde657901 | 445 | /* for 512 and 1 GB devices, 4th cycle is required */ |
mbed_official | 87:085cde657901 | 446 | if(hnand->Info.BlockNbr >= 1024) |
mbed_official | 87:085cde657901 | 447 | { |
mbed_official | 87:085cde657901 | 448 | *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_4th_CYCLE(nandAddress); |
mbed_official | 87:085cde657901 | 449 | } |
mbed_official | 87:085cde657901 | 450 | |
mbed_official | 87:085cde657901 | 451 | *(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA)) = 0x30; |
mbed_official | 87:085cde657901 | 452 | |
mbed_official | 87:085cde657901 | 453 | /* Get Data into Buffer */ |
mbed_official | 87:085cde657901 | 454 | for(; index < size; index++) |
mbed_official | 87:085cde657901 | 455 | { |
mbed_official | 87:085cde657901 | 456 | *(uint8_t *)pBuffer++ = *(uint8_t *)deviceAddress; |
mbed_official | 87:085cde657901 | 457 | } |
mbed_official | 87:085cde657901 | 458 | |
mbed_official | 87:085cde657901 | 459 | /* Increment read pages number */ |
mbed_official | 87:085cde657901 | 460 | numPagesRead++; |
mbed_official | 87:085cde657901 | 461 | |
mbed_official | 87:085cde657901 | 462 | /* Decrement pages to read */ |
mbed_official | 87:085cde657901 | 463 | NumPageToRead--; |
mbed_official | 87:085cde657901 | 464 | |
mbed_official | 87:085cde657901 | 465 | /* Increment the NAND address */ |
mbed_official | 87:085cde657901 | 466 | nandAddress = (uint32_t)(nandAddress + (hnand->Info.PageSize * 8)); |
mbed_official | 87:085cde657901 | 467 | |
mbed_official | 87:085cde657901 | 468 | } |
mbed_official | 87:085cde657901 | 469 | |
mbed_official | 87:085cde657901 | 470 | /* Update the NAND controller state */ |
mbed_official | 87:085cde657901 | 471 | hnand->State = HAL_NAND_STATE_READY; |
mbed_official | 87:085cde657901 | 472 | |
mbed_official | 87:085cde657901 | 473 | /* Process unlocked */ |
mbed_official | 87:085cde657901 | 474 | __HAL_UNLOCK(hnand); |
mbed_official | 87:085cde657901 | 475 | |
mbed_official | 87:085cde657901 | 476 | return HAL_OK; |
mbed_official | 87:085cde657901 | 477 | |
mbed_official | 87:085cde657901 | 478 | } |
mbed_official | 87:085cde657901 | 479 | |
mbed_official | 87:085cde657901 | 480 | /** |
mbed_official | 87:085cde657901 | 481 | * @brief Write Page(s) to NAND memory block |
mbed_official | 87:085cde657901 | 482 | * @param hnand: pointer to NAND handle |
mbed_official | 87:085cde657901 | 483 | * @param pAddress : pointer to NAND address structure |
mbed_official | 87:085cde657901 | 484 | * @param pBuffer : pointer to source buffer to write |
mbed_official | 87:085cde657901 | 485 | * @param NumPageToWrite : number of pages to write to block |
mbed_official | 87:085cde657901 | 486 | * @retval HAL status |
mbed_official | 87:085cde657901 | 487 | */ |
mbed_official | 87:085cde657901 | 488 | HAL_StatusTypeDef HAL_NAND_Write_Page(NAND_HandleTypeDef *hnand, NAND_AddressTypedef *pAddress, uint8_t *pBuffer, uint32_t NumPageToWrite) |
mbed_official | 87:085cde657901 | 489 | { |
mbed_official | 87:085cde657901 | 490 | __IO uint32_t index = 0; |
mbed_official | 87:085cde657901 | 491 | uint32_t timeout = 0; |
mbed_official | 87:085cde657901 | 492 | uint32_t deviceAddress = 0, size = 0 , numPagesWritten = 0, nandAddress = 0; |
mbed_official | 87:085cde657901 | 493 | |
mbed_official | 87:085cde657901 | 494 | /* Process Locked */ |
mbed_official | 87:085cde657901 | 495 | __HAL_LOCK(hnand); |
mbed_official | 87:085cde657901 | 496 | |
mbed_official | 87:085cde657901 | 497 | /* Check the NAND controller state */ |
mbed_official | 87:085cde657901 | 498 | if(hnand->State == HAL_NAND_STATE_BUSY) |
mbed_official | 87:085cde657901 | 499 | { |
mbed_official | 87:085cde657901 | 500 | return HAL_BUSY; |
mbed_official | 87:085cde657901 | 501 | } |
mbed_official | 87:085cde657901 | 502 | |
mbed_official | 87:085cde657901 | 503 | /* Identify the device address */ |
mbed_official | 87:085cde657901 | 504 | if(hnand->Init.NandBank == FMC_NAND_BANK2) |
mbed_official | 87:085cde657901 | 505 | { |
mbed_official | 87:085cde657901 | 506 | deviceAddress = NAND_DEVICE1; |
mbed_official | 87:085cde657901 | 507 | } |
mbed_official | 87:085cde657901 | 508 | else |
mbed_official | 87:085cde657901 | 509 | { |
mbed_official | 87:085cde657901 | 510 | deviceAddress = NAND_DEVICE2; |
mbed_official | 87:085cde657901 | 511 | } |
mbed_official | 87:085cde657901 | 512 | |
mbed_official | 87:085cde657901 | 513 | /* Update the NAND controller state */ |
mbed_official | 87:085cde657901 | 514 | hnand->State = HAL_NAND_STATE_BUSY; |
mbed_official | 87:085cde657901 | 515 | |
mbed_official | 87:085cde657901 | 516 | /* NAND raw address calculation */ |
mbed_official | 87:085cde657901 | 517 | nandAddress = ARRAY_ADDRESS(pAddress, hnand); |
mbed_official | 87:085cde657901 | 518 | |
mbed_official | 87:085cde657901 | 519 | /* Page(s) write loop */ |
mbed_official | 87:085cde657901 | 520 | while((NumPageToWrite != 0) && (nandAddress < (hnand->Info.BlockSize) * (hnand->Info.PageSize))) |
mbed_official | 87:085cde657901 | 521 | { |
mbed_official | 87:085cde657901 | 522 | /* update the buffer size */ |
mbed_official | 87:085cde657901 | 523 | size = (hnand->Info.PageSize) + ((hnand->Info.PageSize) * numPagesWritten); |
mbed_official | 87:085cde657901 | 524 | |
mbed_official | 87:085cde657901 | 525 | /* Send write page command sequence */ |
mbed_official | 87:085cde657901 | 526 | *(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA)) = NAND_CMD_AREA_A; |
mbed_official | 87:085cde657901 | 527 | *(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA)) = 0x80; |
mbed_official | 87:085cde657901 | 528 | |
mbed_official | 87:085cde657901 | 529 | *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = 0x00; |
mbed_official | 87:085cde657901 | 530 | *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_1st_CYCLE(nandAddress); |
mbed_official | 87:085cde657901 | 531 | *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_2nd_CYCLE(nandAddress); |
mbed_official | 87:085cde657901 | 532 | *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_3rd_CYCLE(nandAddress); |
mbed_official | 87:085cde657901 | 533 | |
mbed_official | 87:085cde657901 | 534 | /* for 512 and 1 GB devices, 4th cycle is required */ |
mbed_official | 87:085cde657901 | 535 | if(hnand->Info.BlockNbr >= 1024) |
mbed_official | 87:085cde657901 | 536 | { |
mbed_official | 87:085cde657901 | 537 | *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_4th_CYCLE(nandAddress); |
mbed_official | 87:085cde657901 | 538 | } |
mbed_official | 87:085cde657901 | 539 | |
mbed_official | 87:085cde657901 | 540 | /* Write data to memory */ |
mbed_official | 87:085cde657901 | 541 | for(; index < size; index++) |
mbed_official | 87:085cde657901 | 542 | { |
mbed_official | 87:085cde657901 | 543 | *(__IO uint8_t *)deviceAddress = *(uint8_t *)pBuffer++; |
mbed_official | 87:085cde657901 | 544 | } |
mbed_official | 87:085cde657901 | 545 | |
mbed_official | 87:085cde657901 | 546 | *(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA)) = 0x10; |
mbed_official | 87:085cde657901 | 547 | |
mbed_official | 87:085cde657901 | 548 | /* Read status until NAND is ready */ |
mbed_official | 87:085cde657901 | 549 | while(HAL_NAND_Read_Status(hnand) != NAND_READY) |
mbed_official | 87:085cde657901 | 550 | { |
mbed_official | 87:085cde657901 | 551 | /* Check for timeout value */ |
mbed_official | 87:085cde657901 | 552 | timeout = HAL_GetTick() + NAND_WRITE_TIMEOUT; |
mbed_official | 87:085cde657901 | 553 | |
mbed_official | 87:085cde657901 | 554 | if(HAL_GetTick() >= timeout) |
mbed_official | 87:085cde657901 | 555 | { |
mbed_official | 87:085cde657901 | 556 | return HAL_TIMEOUT; |
mbed_official | 87:085cde657901 | 557 | } |
mbed_official | 87:085cde657901 | 558 | } |
mbed_official | 87:085cde657901 | 559 | |
mbed_official | 87:085cde657901 | 560 | /* Increment written pages number */ |
mbed_official | 87:085cde657901 | 561 | numPagesWritten++; |
mbed_official | 87:085cde657901 | 562 | |
mbed_official | 87:085cde657901 | 563 | /* Decrement pages to write */ |
mbed_official | 87:085cde657901 | 564 | NumPageToWrite--; |
mbed_official | 87:085cde657901 | 565 | |
mbed_official | 87:085cde657901 | 566 | /* Increment the NAND address */ |
mbed_official | 87:085cde657901 | 567 | nandAddress = (uint32_t)(nandAddress + (hnand->Info.PageSize * 8)); |
mbed_official | 87:085cde657901 | 568 | |
mbed_official | 87:085cde657901 | 569 | } |
mbed_official | 87:085cde657901 | 570 | |
mbed_official | 87:085cde657901 | 571 | /* Update the NAND controller state */ |
mbed_official | 87:085cde657901 | 572 | hnand->State = HAL_NAND_STATE_READY; |
mbed_official | 87:085cde657901 | 573 | |
mbed_official | 87:085cde657901 | 574 | /* Process unlocked */ |
mbed_official | 87:085cde657901 | 575 | __HAL_UNLOCK(hnand); |
mbed_official | 87:085cde657901 | 576 | |
mbed_official | 87:085cde657901 | 577 | return HAL_OK; |
mbed_official | 87:085cde657901 | 578 | } |
mbed_official | 87:085cde657901 | 579 | |
mbed_official | 87:085cde657901 | 580 | |
mbed_official | 87:085cde657901 | 581 | /** |
mbed_official | 87:085cde657901 | 582 | * @brief Read Spare area(s) from NAND memory |
mbed_official | 87:085cde657901 | 583 | * @param hnand: pointer to NAND handle |
mbed_official | 87:085cde657901 | 584 | * @param pAddress : pointer to NAND address structure |
mbed_official | 87:085cde657901 | 585 | * @param pBuffer: pointer to source buffer to write |
mbed_official | 87:085cde657901 | 586 | * @param NumSpareAreaToRead: Number of spare area to read |
mbed_official | 87:085cde657901 | 587 | * @retval HAL status |
mbed_official | 87:085cde657901 | 588 | */ |
mbed_official | 87:085cde657901 | 589 | HAL_StatusTypeDef HAL_NAND_Read_SpareArea(NAND_HandleTypeDef *hnand, NAND_AddressTypedef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaToRead) |
mbed_official | 87:085cde657901 | 590 | { |
mbed_official | 87:085cde657901 | 591 | __IO uint32_t index = 0; |
mbed_official | 87:085cde657901 | 592 | uint32_t deviceAddress = 0, size = 0, numSpareAreaRead = 0, nandAddress = 0; |
mbed_official | 87:085cde657901 | 593 | |
mbed_official | 87:085cde657901 | 594 | /* Process Locked */ |
mbed_official | 87:085cde657901 | 595 | __HAL_LOCK(hnand); |
mbed_official | 87:085cde657901 | 596 | |
mbed_official | 87:085cde657901 | 597 | /* Check the NAND controller state */ |
mbed_official | 87:085cde657901 | 598 | if(hnand->State == HAL_NAND_STATE_BUSY) |
mbed_official | 87:085cde657901 | 599 | { |
mbed_official | 87:085cde657901 | 600 | return HAL_BUSY; |
mbed_official | 87:085cde657901 | 601 | } |
mbed_official | 87:085cde657901 | 602 | |
mbed_official | 87:085cde657901 | 603 | /* Identify the device address */ |
mbed_official | 87:085cde657901 | 604 | if(hnand->Init.NandBank == FMC_NAND_BANK2) |
mbed_official | 87:085cde657901 | 605 | { |
mbed_official | 87:085cde657901 | 606 | deviceAddress = NAND_DEVICE1; |
mbed_official | 87:085cde657901 | 607 | } |
mbed_official | 87:085cde657901 | 608 | else |
mbed_official | 87:085cde657901 | 609 | { |
mbed_official | 87:085cde657901 | 610 | deviceAddress = NAND_DEVICE2; |
mbed_official | 87:085cde657901 | 611 | } |
mbed_official | 87:085cde657901 | 612 | |
mbed_official | 87:085cde657901 | 613 | /* Update the NAND controller state */ |
mbed_official | 87:085cde657901 | 614 | hnand->State = HAL_NAND_STATE_BUSY; |
mbed_official | 87:085cde657901 | 615 | |
mbed_official | 87:085cde657901 | 616 | /* NAND raw address calculation */ |
mbed_official | 87:085cde657901 | 617 | nandAddress = ARRAY_ADDRESS(pAddress, hnand); |
mbed_official | 87:085cde657901 | 618 | |
mbed_official | 87:085cde657901 | 619 | /* Spare area(s) read loop */ |
mbed_official | 87:085cde657901 | 620 | while((NumSpareAreaToRead != 0) && (nandAddress < (hnand->Info.BlockSize) * (hnand->Info.SpareAreaSize))) |
mbed_official | 87:085cde657901 | 621 | { |
mbed_official | 87:085cde657901 | 622 | |
mbed_official | 87:085cde657901 | 623 | /* update the buffer size */ |
mbed_official | 87:085cde657901 | 624 | size = (hnand->Info.PageSize) + ((hnand->Info.PageSize) * numSpareAreaRead); |
mbed_official | 87:085cde657901 | 625 | |
mbed_official | 87:085cde657901 | 626 | /* Send read spare area command sequence */ |
mbed_official | 87:085cde657901 | 627 | *(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA)) = NAND_CMD_AREA_C; |
mbed_official | 87:085cde657901 | 628 | |
mbed_official | 87:085cde657901 | 629 | *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = 0x00; |
mbed_official | 87:085cde657901 | 630 | *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_1st_CYCLE(nandAddress); |
mbed_official | 87:085cde657901 | 631 | *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_2nd_CYCLE(nandAddress); |
mbed_official | 87:085cde657901 | 632 | *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_3rd_CYCLE(nandAddress); |
mbed_official | 87:085cde657901 | 633 | |
mbed_official | 87:085cde657901 | 634 | /* for 512 and 1 GB devices, 4th cycle is required */ |
mbed_official | 87:085cde657901 | 635 | if(hnand->Info.BlockNbr >= 1024) |
mbed_official | 87:085cde657901 | 636 | { |
mbed_official | 87:085cde657901 | 637 | *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_4th_CYCLE(nandAddress); |
mbed_official | 87:085cde657901 | 638 | } |
mbed_official | 87:085cde657901 | 639 | |
mbed_official | 87:085cde657901 | 640 | *(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA)) = 0x30; |
mbed_official | 87:085cde657901 | 641 | |
mbed_official | 87:085cde657901 | 642 | /* Get Data into Buffer */ |
mbed_official | 87:085cde657901 | 643 | for ( ;index < size; index++) |
mbed_official | 87:085cde657901 | 644 | { |
mbed_official | 87:085cde657901 | 645 | *(uint8_t *)pBuffer++ = *(uint8_t *)deviceAddress; |
mbed_official | 87:085cde657901 | 646 | } |
mbed_official | 87:085cde657901 | 647 | |
mbed_official | 87:085cde657901 | 648 | /* Increment read spare areas number */ |
mbed_official | 87:085cde657901 | 649 | numSpareAreaRead++; |
mbed_official | 87:085cde657901 | 650 | |
mbed_official | 87:085cde657901 | 651 | /* Decrement spare areas to read */ |
mbed_official | 87:085cde657901 | 652 | NumSpareAreaToRead--; |
mbed_official | 87:085cde657901 | 653 | |
mbed_official | 87:085cde657901 | 654 | /* Increment the NAND address */ |
mbed_official | 87:085cde657901 | 655 | nandAddress = (uint32_t)(nandAddress + (hnand->Info.SpareAreaSize)); |
mbed_official | 87:085cde657901 | 656 | } |
mbed_official | 87:085cde657901 | 657 | |
mbed_official | 87:085cde657901 | 658 | /* Update the NAND controller state */ |
mbed_official | 87:085cde657901 | 659 | hnand->State = HAL_NAND_STATE_READY; |
mbed_official | 87:085cde657901 | 660 | |
mbed_official | 87:085cde657901 | 661 | /* Process unlocked */ |
mbed_official | 87:085cde657901 | 662 | __HAL_UNLOCK(hnand); |
mbed_official | 87:085cde657901 | 663 | |
mbed_official | 87:085cde657901 | 664 | return HAL_OK; |
mbed_official | 87:085cde657901 | 665 | } |
mbed_official | 87:085cde657901 | 666 | |
mbed_official | 87:085cde657901 | 667 | /** |
mbed_official | 87:085cde657901 | 668 | * @brief Write Spare area(s) to NAND memory |
mbed_official | 87:085cde657901 | 669 | * @param hnand: pointer to NAND handle |
mbed_official | 87:085cde657901 | 670 | * @param pAddress : pointer to NAND address structure |
mbed_official | 87:085cde657901 | 671 | * @param pBuffer : pointer to source buffer to write |
mbed_official | 87:085cde657901 | 672 | * @param NumSpareAreaTowrite : number of spare areas to write to block |
mbed_official | 87:085cde657901 | 673 | * @retval HAL status |
mbed_official | 87:085cde657901 | 674 | */ |
mbed_official | 87:085cde657901 | 675 | HAL_StatusTypeDef HAL_NAND_Write_SpareArea(NAND_HandleTypeDef *hnand, NAND_AddressTypedef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaTowrite) |
mbed_official | 87:085cde657901 | 676 | { |
mbed_official | 87:085cde657901 | 677 | __IO uint32_t index = 0; |
mbed_official | 87:085cde657901 | 678 | uint32_t timeout = 0; |
mbed_official | 87:085cde657901 | 679 | uint32_t deviceAddress = 0, size = 0, numSpareAreaWritten = 0, nandAddress = 0; |
mbed_official | 87:085cde657901 | 680 | |
mbed_official | 87:085cde657901 | 681 | /* Process Locked */ |
mbed_official | 87:085cde657901 | 682 | __HAL_LOCK(hnand); |
mbed_official | 87:085cde657901 | 683 | |
mbed_official | 87:085cde657901 | 684 | /* Check the NAND controller state */ |
mbed_official | 87:085cde657901 | 685 | if(hnand->State == HAL_NAND_STATE_BUSY) |
mbed_official | 87:085cde657901 | 686 | { |
mbed_official | 87:085cde657901 | 687 | return HAL_BUSY; |
mbed_official | 87:085cde657901 | 688 | } |
mbed_official | 87:085cde657901 | 689 | |
mbed_official | 87:085cde657901 | 690 | /* Identify the device address */ |
mbed_official | 87:085cde657901 | 691 | if(hnand->Init.NandBank == FMC_NAND_BANK2) |
mbed_official | 87:085cde657901 | 692 | { |
mbed_official | 87:085cde657901 | 693 | deviceAddress = NAND_DEVICE1; |
mbed_official | 87:085cde657901 | 694 | } |
mbed_official | 87:085cde657901 | 695 | else |
mbed_official | 87:085cde657901 | 696 | { |
mbed_official | 87:085cde657901 | 697 | deviceAddress = NAND_DEVICE2; |
mbed_official | 87:085cde657901 | 698 | } |
mbed_official | 87:085cde657901 | 699 | |
mbed_official | 87:085cde657901 | 700 | /* Update the FMC_NAND controller state */ |
mbed_official | 87:085cde657901 | 701 | hnand->State = HAL_NAND_STATE_BUSY; |
mbed_official | 87:085cde657901 | 702 | |
mbed_official | 87:085cde657901 | 703 | /* NAND raw address calculation */ |
mbed_official | 87:085cde657901 | 704 | nandAddress = ARRAY_ADDRESS(pAddress, hnand); |
mbed_official | 87:085cde657901 | 705 | |
mbed_official | 87:085cde657901 | 706 | /* Spare area(s) write loop */ |
mbed_official | 87:085cde657901 | 707 | while((NumSpareAreaTowrite != 0) && (nandAddress < (hnand->Info.BlockSize) * (hnand->Info.SpareAreaSize))) |
mbed_official | 87:085cde657901 | 708 | { |
mbed_official | 87:085cde657901 | 709 | /* update the buffer size */ |
mbed_official | 87:085cde657901 | 710 | size = (hnand->Info.PageSize) + ((hnand->Info.PageSize) * numSpareAreaWritten); |
mbed_official | 87:085cde657901 | 711 | |
mbed_official | 87:085cde657901 | 712 | /* Send write Spare area command sequence */ |
mbed_official | 87:085cde657901 | 713 | *(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA)) = NAND_CMD_AREA_C; |
mbed_official | 87:085cde657901 | 714 | *(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA)) = 0x80; |
mbed_official | 87:085cde657901 | 715 | |
mbed_official | 87:085cde657901 | 716 | *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = 0x00; |
mbed_official | 87:085cde657901 | 717 | *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_1st_CYCLE(nandAddress); |
mbed_official | 87:085cde657901 | 718 | *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_2nd_CYCLE(nandAddress); |
mbed_official | 87:085cde657901 | 719 | *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_3rd_CYCLE(nandAddress); |
mbed_official | 87:085cde657901 | 720 | |
mbed_official | 87:085cde657901 | 721 | /* for 512 and 1 GB devices, 4th cycle is required */ |
mbed_official | 87:085cde657901 | 722 | if(hnand->Info.BlockNbr >= 1024) |
mbed_official | 87:085cde657901 | 723 | { |
mbed_official | 87:085cde657901 | 724 | *(__IO uint8_t *)((uint32_t)(deviceAddress | ADDR_AREA)) = ADDR_4th_CYCLE(nandAddress); |
mbed_official | 87:085cde657901 | 725 | } |
mbed_official | 87:085cde657901 | 726 | |
mbed_official | 87:085cde657901 | 727 | /* Write data to memory */ |
mbed_official | 87:085cde657901 | 728 | for(; index < size; index++) |
mbed_official | 87:085cde657901 | 729 | { |
mbed_official | 87:085cde657901 | 730 | *(__IO uint8_t *)deviceAddress = *(uint8_t *)pBuffer++; |
mbed_official | 87:085cde657901 | 731 | } |
mbed_official | 87:085cde657901 | 732 | |
mbed_official | 87:085cde657901 | 733 | *(__IO uint8_t *)((uint32_t)(deviceAddress | CMD_AREA)) = 0x10; |
mbed_official | 87:085cde657901 | 734 | |
mbed_official | 87:085cde657901 | 735 | |
mbed_official | 87:085cde657901 | 736 | /* Read status until NAND is ready */ |
mbed_official | 87:085cde657901 | 737 | while(HAL_NAND_Read_Status(hnand) != NAND_READY) |
mbed_official | 87:085cde657901 | 738 | { |
mbed_official | 87:085cde657901 | 739 | /* Check for timeout value */ |
mbed_official | 87:085cde657901 | 740 | timeout = HAL_GetTick() + NAND_WRITE_TIMEOUT; |
mbed_official | 87:085cde657901 | 741 | |
mbed_official | 87:085cde657901 | 742 | if(HAL_GetTick() >= timeout) |
mbed_official | 87:085cde657901 | 743 | { |
mbed_official | 87:085cde657901 | 744 | return HAL_TIMEOUT; |
mbed_official | 87:085cde657901 | 745 | } |
mbed_official | 87:085cde657901 | 746 | } |
mbed_official | 87:085cde657901 | 747 | |
mbed_official | 87:085cde657901 | 748 | /* Increment written spare areas number */ |
mbed_official | 87:085cde657901 | 749 | numSpareAreaWritten++; |
mbed_official | 87:085cde657901 | 750 | |
mbed_official | 87:085cde657901 | 751 | /* Decrement spare areas to write */ |
mbed_official | 87:085cde657901 | 752 | NumSpareAreaTowrite--; |
mbed_official | 87:085cde657901 | 753 | |
mbed_official | 87:085cde657901 | 754 | /* Increment the NAND address */ |
mbed_official | 87:085cde657901 | 755 | nandAddress = (uint32_t)(nandAddress + (hnand->Info.PageSize)); |
mbed_official | 87:085cde657901 | 756 | |
mbed_official | 87:085cde657901 | 757 | } |
mbed_official | 87:085cde657901 | 758 | |
mbed_official | 87:085cde657901 | 759 | /* Update the NAND controller state */ |
mbed_official | 87:085cde657901 | 760 | hnand->State = HAL_NAND_STATE_READY; |
mbed_official | 87:085cde657901 | 761 | |
mbed_official | 87:085cde657901 | 762 | /* Process unlocked */ |
mbed_official | 87:085cde657901 | 763 | __HAL_UNLOCK(hnand); |
mbed_official | 87:085cde657901 | 764 | |
mbed_official | 87:085cde657901 | 765 | return HAL_OK; |
mbed_official | 87:085cde657901 | 766 | } |
mbed_official | 87:085cde657901 | 767 | |
mbed_official | 87:085cde657901 | 768 | /** |
mbed_official | 87:085cde657901 | 769 | * @brief NAND memory Block erase |
mbed_official | 87:085cde657901 | 770 | * @param hnand: pointer to NAND handle |
mbed_official | 87:085cde657901 | 771 | * @param pAddress : pointer to NAND address structure |
mbed_official | 87:085cde657901 | 772 | * @retval HAL status |
mbed_official | 87:085cde657901 | 773 | */ |
mbed_official | 87:085cde657901 | 774 | HAL_StatusTypeDef HAL_NAND_Erase_Block(NAND_HandleTypeDef *hnand, NAND_AddressTypedef *pAddress) |
mbed_official | 87:085cde657901 | 775 | { |
mbed_official | 87:085cde657901 | 776 | uint32_t DeviceAddress = 0; |
mbed_official | 87:085cde657901 | 777 | |
mbed_official | 87:085cde657901 | 778 | /* Process Locked */ |
mbed_official | 87:085cde657901 | 779 | __HAL_LOCK(hnand); |
mbed_official | 87:085cde657901 | 780 | |
mbed_official | 87:085cde657901 | 781 | /* Check the NAND controller state */ |
mbed_official | 87:085cde657901 | 782 | if(hnand->State == HAL_NAND_STATE_BUSY) |
mbed_official | 87:085cde657901 | 783 | { |
mbed_official | 87:085cde657901 | 784 | return HAL_BUSY; |
mbed_official | 87:085cde657901 | 785 | } |
mbed_official | 87:085cde657901 | 786 | |
mbed_official | 87:085cde657901 | 787 | /* Identify the device address */ |
mbed_official | 87:085cde657901 | 788 | if(hnand->Init.NandBank == FMC_NAND_BANK2) |
mbed_official | 87:085cde657901 | 789 | { |
mbed_official | 87:085cde657901 | 790 | DeviceAddress = NAND_DEVICE1; |
mbed_official | 87:085cde657901 | 791 | } |
mbed_official | 87:085cde657901 | 792 | else |
mbed_official | 87:085cde657901 | 793 | { |
mbed_official | 87:085cde657901 | 794 | DeviceAddress = NAND_DEVICE2; |
mbed_official | 87:085cde657901 | 795 | } |
mbed_official | 87:085cde657901 | 796 | |
mbed_official | 87:085cde657901 | 797 | /* Update the NAND controller state */ |
mbed_official | 87:085cde657901 | 798 | hnand->State = HAL_NAND_STATE_BUSY; |
mbed_official | 87:085cde657901 | 799 | |
mbed_official | 87:085cde657901 | 800 | /* Send Erase block command sequence */ |
mbed_official | 87:085cde657901 | 801 | *(__IO uint8_t *)((uint32_t)(DeviceAddress | CMD_AREA)) = 0x60; |
mbed_official | 87:085cde657901 | 802 | |
mbed_official | 87:085cde657901 | 803 | *(__IO uint8_t *)((uint32_t)(DeviceAddress | ADDR_AREA)) = ADDR_1st_CYCLE(ARRAY_ADDRESS(pAddress, hnand)); |
mbed_official | 87:085cde657901 | 804 | *(__IO uint8_t *)((uint32_t)(DeviceAddress | ADDR_AREA)) = ADDR_2nd_CYCLE(ARRAY_ADDRESS(pAddress, hnand)); |
mbed_official | 87:085cde657901 | 805 | *(__IO uint8_t *)((uint32_t)(DeviceAddress | ADDR_AREA)) = ADDR_3rd_CYCLE(ARRAY_ADDRESS(pAddress, hnand)); |
mbed_official | 87:085cde657901 | 806 | |
mbed_official | 87:085cde657901 | 807 | /* for 512 and 1 GB devices, 4th cycle is required */ |
mbed_official | 87:085cde657901 | 808 | if(hnand->Info.BlockNbr >= 1024) |
mbed_official | 87:085cde657901 | 809 | { |
mbed_official | 87:085cde657901 | 810 | *(__IO uint8_t *)((uint32_t)(DeviceAddress | ADDR_AREA)) = ADDR_4th_CYCLE(ARRAY_ADDRESS(pAddress, hnand)); |
mbed_official | 87:085cde657901 | 811 | } |
mbed_official | 87:085cde657901 | 812 | |
mbed_official | 87:085cde657901 | 813 | *(__IO uint8_t *)((uint32_t)(DeviceAddress | CMD_AREA)) = 0xD0; |
mbed_official | 87:085cde657901 | 814 | |
mbed_official | 87:085cde657901 | 815 | /* Update the NAND controller state */ |
mbed_official | 87:085cde657901 | 816 | hnand->State = HAL_NAND_STATE_READY; |
mbed_official | 87:085cde657901 | 817 | |
mbed_official | 87:085cde657901 | 818 | /* Process unlocked */ |
mbed_official | 87:085cde657901 | 819 | __HAL_UNLOCK(hnand); |
mbed_official | 87:085cde657901 | 820 | |
mbed_official | 87:085cde657901 | 821 | return HAL_OK; |
mbed_official | 87:085cde657901 | 822 | } |
mbed_official | 87:085cde657901 | 823 | |
mbed_official | 87:085cde657901 | 824 | |
mbed_official | 87:085cde657901 | 825 | /** |
mbed_official | 87:085cde657901 | 826 | * @brief NAND memory read status |
mbed_official | 87:085cde657901 | 827 | * @param hnand: pointer to NAND handle |
mbed_official | 87:085cde657901 | 828 | * @retval NAND status |
mbed_official | 87:085cde657901 | 829 | */ |
mbed_official | 87:085cde657901 | 830 | uint32_t HAL_NAND_Read_Status(NAND_HandleTypeDef *hnand) |
mbed_official | 87:085cde657901 | 831 | { |
mbed_official | 87:085cde657901 | 832 | uint32_t data = 0; |
mbed_official | 87:085cde657901 | 833 | uint32_t DeviceAddress = 0; |
mbed_official | 87:085cde657901 | 834 | |
mbed_official | 87:085cde657901 | 835 | /* Identify the device address */ |
mbed_official | 87:085cde657901 | 836 | if(hnand->Init.NandBank == FMC_NAND_BANK2) |
mbed_official | 87:085cde657901 | 837 | { |
mbed_official | 87:085cde657901 | 838 | DeviceAddress = NAND_DEVICE1; |
mbed_official | 87:085cde657901 | 839 | } |
mbed_official | 87:085cde657901 | 840 | else |
mbed_official | 87:085cde657901 | 841 | { |
mbed_official | 87:085cde657901 | 842 | DeviceAddress = NAND_DEVICE2; |
mbed_official | 87:085cde657901 | 843 | } |
mbed_official | 87:085cde657901 | 844 | |
mbed_official | 87:085cde657901 | 845 | /* Send Read status operation command */ |
mbed_official | 87:085cde657901 | 846 | *(__IO uint8_t *)((uint32_t)(DeviceAddress | CMD_AREA)) = 0x70; |
mbed_official | 87:085cde657901 | 847 | |
mbed_official | 87:085cde657901 | 848 | /* Read status register data */ |
mbed_official | 87:085cde657901 | 849 | data = *(__IO uint8_t *)DeviceAddress; |
mbed_official | 87:085cde657901 | 850 | |
mbed_official | 87:085cde657901 | 851 | /* Return the status */ |
mbed_official | 87:085cde657901 | 852 | if((data & NAND_ERROR) == NAND_ERROR) |
mbed_official | 87:085cde657901 | 853 | { |
mbed_official | 87:085cde657901 | 854 | return NAND_ERROR; |
mbed_official | 87:085cde657901 | 855 | } |
mbed_official | 87:085cde657901 | 856 | else if((data & NAND_READY) == NAND_READY) |
mbed_official | 87:085cde657901 | 857 | { |
mbed_official | 87:085cde657901 | 858 | return NAND_READY; |
mbed_official | 87:085cde657901 | 859 | } |
mbed_official | 87:085cde657901 | 860 | |
mbed_official | 87:085cde657901 | 861 | return NAND_BUSY; |
mbed_official | 87:085cde657901 | 862 | |
mbed_official | 87:085cde657901 | 863 | } |
mbed_official | 87:085cde657901 | 864 | |
mbed_official | 87:085cde657901 | 865 | /** |
mbed_official | 87:085cde657901 | 866 | * @brief Increment the NAND memory address |
mbed_official | 87:085cde657901 | 867 | * @param hnand: pointer to NAND handle |
mbed_official | 87:085cde657901 | 868 | * @param pAddress: pointer to NAND adress structure |
mbed_official | 87:085cde657901 | 869 | * @retval The new status of the increment address operation. It can be: |
mbed_official | 87:085cde657901 | 870 | * - NAND_VALID_ADDRESS: When the new address is valid address |
mbed_official | 87:085cde657901 | 871 | * - NAND_INVALID_ADDRESS: When the new address is invalid address |
mbed_official | 87:085cde657901 | 872 | */ |
mbed_official | 87:085cde657901 | 873 | uint32_t HAL_NAND_Address_Inc(NAND_HandleTypeDef *hnand, NAND_AddressTypedef *pAddress) |
mbed_official | 87:085cde657901 | 874 | { |
mbed_official | 87:085cde657901 | 875 | uint32_t status = NAND_VALID_ADDRESS; |
mbed_official | 87:085cde657901 | 876 | |
mbed_official | 87:085cde657901 | 877 | /* Increment page address */ |
mbed_official | 87:085cde657901 | 878 | pAddress->Page++; |
mbed_official | 87:085cde657901 | 879 | |
mbed_official | 87:085cde657901 | 880 | /* Check NAND address is valid */ |
mbed_official | 87:085cde657901 | 881 | if(pAddress->Page == hnand->Info.BlockSize) |
mbed_official | 87:085cde657901 | 882 | { |
mbed_official | 87:085cde657901 | 883 | pAddress->Page = 0; |
mbed_official | 87:085cde657901 | 884 | pAddress->Block++; |
mbed_official | 87:085cde657901 | 885 | |
mbed_official | 87:085cde657901 | 886 | if(pAddress->Block == hnand->Info.ZoneSize) |
mbed_official | 87:085cde657901 | 887 | { |
mbed_official | 87:085cde657901 | 888 | pAddress->Block = 0; |
mbed_official | 87:085cde657901 | 889 | pAddress->Zone++; |
mbed_official | 87:085cde657901 | 890 | |
mbed_official | 87:085cde657901 | 891 | if(pAddress->Zone == (hnand->Info.ZoneSize/ hnand->Info.BlockNbr)) |
mbed_official | 87:085cde657901 | 892 | { |
mbed_official | 87:085cde657901 | 893 | status = NAND_INVALID_ADDRESS; |
mbed_official | 87:085cde657901 | 894 | } |
mbed_official | 87:085cde657901 | 895 | } |
mbed_official | 87:085cde657901 | 896 | } |
mbed_official | 87:085cde657901 | 897 | |
mbed_official | 87:085cde657901 | 898 | return (status); |
mbed_official | 87:085cde657901 | 899 | } |
mbed_official | 87:085cde657901 | 900 | |
mbed_official | 87:085cde657901 | 901 | |
mbed_official | 87:085cde657901 | 902 | /** |
mbed_official | 87:085cde657901 | 903 | * @} |
mbed_official | 87:085cde657901 | 904 | */ |
mbed_official | 87:085cde657901 | 905 | |
mbed_official | 87:085cde657901 | 906 | /** @defgroup NAND_Group3 Control functions |
mbed_official | 87:085cde657901 | 907 | * @brief management functions |
mbed_official | 87:085cde657901 | 908 | * |
mbed_official | 87:085cde657901 | 909 | @verbatim |
mbed_official | 87:085cde657901 | 910 | ============================================================================== |
mbed_official | 87:085cde657901 | 911 | ##### NAND Control functions ##### |
mbed_official | 87:085cde657901 | 912 | ============================================================================== |
mbed_official | 87:085cde657901 | 913 | [..] |
mbed_official | 87:085cde657901 | 914 | This subsection provides a set of functions allowing to control dynamically |
mbed_official | 87:085cde657901 | 915 | the NAND interface. |
mbed_official | 87:085cde657901 | 916 | |
mbed_official | 87:085cde657901 | 917 | @endverbatim |
mbed_official | 87:085cde657901 | 918 | * @{ |
mbed_official | 87:085cde657901 | 919 | */ |
mbed_official | 87:085cde657901 | 920 | |
mbed_official | 87:085cde657901 | 921 | |
mbed_official | 87:085cde657901 | 922 | /** |
mbed_official | 87:085cde657901 | 923 | * @brief Enables dynamically NAND ECC feature. |
mbed_official | 87:085cde657901 | 924 | * @param hnand: pointer to NAND handle |
mbed_official | 87:085cde657901 | 925 | * @retval HAL status |
mbed_official | 87:085cde657901 | 926 | */ |
mbed_official | 87:085cde657901 | 927 | HAL_StatusTypeDef HAL_NAND_ECC_Enable(NAND_HandleTypeDef *hnand) |
mbed_official | 87:085cde657901 | 928 | { |
mbed_official | 87:085cde657901 | 929 | /* Check the NAND controller state */ |
mbed_official | 87:085cde657901 | 930 | if(hnand->State == HAL_NAND_STATE_BUSY) |
mbed_official | 87:085cde657901 | 931 | { |
mbed_official | 87:085cde657901 | 932 | return HAL_BUSY; |
mbed_official | 87:085cde657901 | 933 | } |
mbed_official | 87:085cde657901 | 934 | |
mbed_official | 87:085cde657901 | 935 | /* Update the NAND state */ |
mbed_official | 87:085cde657901 | 936 | hnand->State = HAL_NAND_STATE_BUSY; |
mbed_official | 87:085cde657901 | 937 | |
mbed_official | 87:085cde657901 | 938 | /* Enable ECC feature */ |
mbed_official | 87:085cde657901 | 939 | FMC_NAND_ECC_Enable(hnand->Instance, hnand->Init.NandBank); |
mbed_official | 87:085cde657901 | 940 | |
mbed_official | 87:085cde657901 | 941 | /* Update the NAND state */ |
mbed_official | 87:085cde657901 | 942 | hnand->State = HAL_NAND_STATE_READY; |
mbed_official | 87:085cde657901 | 943 | |
mbed_official | 87:085cde657901 | 944 | return HAL_OK; |
mbed_official | 87:085cde657901 | 945 | } |
mbed_official | 87:085cde657901 | 946 | |
mbed_official | 87:085cde657901 | 947 | |
mbed_official | 87:085cde657901 | 948 | /** |
mbed_official | 87:085cde657901 | 949 | * @brief Disables dynamically FMC_NAND ECC feature. |
mbed_official | 87:085cde657901 | 950 | * @param hnand: pointer to NAND handle |
mbed_official | 87:085cde657901 | 951 | * @retval HAL status |
mbed_official | 87:085cde657901 | 952 | */ |
mbed_official | 87:085cde657901 | 953 | HAL_StatusTypeDef HAL_NAND_ECC_Disable(NAND_HandleTypeDef *hnand) |
mbed_official | 87:085cde657901 | 954 | { |
mbed_official | 87:085cde657901 | 955 | /* Check the NAND controller state */ |
mbed_official | 87:085cde657901 | 956 | if(hnand->State == HAL_NAND_STATE_BUSY) |
mbed_official | 87:085cde657901 | 957 | { |
mbed_official | 87:085cde657901 | 958 | return HAL_BUSY; |
mbed_official | 87:085cde657901 | 959 | } |
mbed_official | 87:085cde657901 | 960 | |
mbed_official | 87:085cde657901 | 961 | /* Update the NAND state */ |
mbed_official | 87:085cde657901 | 962 | hnand->State = HAL_NAND_STATE_BUSY; |
mbed_official | 87:085cde657901 | 963 | |
mbed_official | 87:085cde657901 | 964 | /* Disable ECC feature */ |
mbed_official | 87:085cde657901 | 965 | FMC_NAND_ECC_Disable(hnand->Instance, hnand->Init.NandBank); |
mbed_official | 87:085cde657901 | 966 | |
mbed_official | 87:085cde657901 | 967 | /* Update the NAND state */ |
mbed_official | 87:085cde657901 | 968 | hnand->State = HAL_NAND_STATE_READY; |
mbed_official | 87:085cde657901 | 969 | |
mbed_official | 87:085cde657901 | 970 | return HAL_OK; |
mbed_official | 87:085cde657901 | 971 | } |
mbed_official | 87:085cde657901 | 972 | |
mbed_official | 87:085cde657901 | 973 | /** |
mbed_official | 87:085cde657901 | 974 | * @brief Disables dynamically NAND ECC feature. |
mbed_official | 87:085cde657901 | 975 | * @param hnand: pointer to NAND handle |
mbed_official | 87:085cde657901 | 976 | * @param ECCval: pointer to ECC value |
mbed_official | 87:085cde657901 | 977 | * @param Timeout: maximum timeout to wait |
mbed_official | 87:085cde657901 | 978 | * @retval HAL status |
mbed_official | 87:085cde657901 | 979 | */ |
mbed_official | 87:085cde657901 | 980 | HAL_StatusTypeDef HAL_NAND_GetECC(NAND_HandleTypeDef *hnand, uint32_t *ECCval, uint32_t Timeout) |
mbed_official | 87:085cde657901 | 981 | { |
mbed_official | 87:085cde657901 | 982 | HAL_StatusTypeDef status = HAL_OK; |
mbed_official | 87:085cde657901 | 983 | |
mbed_official | 87:085cde657901 | 984 | /* Check the NAND controller state */ |
mbed_official | 87:085cde657901 | 985 | if(hnand->State == HAL_NAND_STATE_BUSY) |
mbed_official | 87:085cde657901 | 986 | { |
mbed_official | 87:085cde657901 | 987 | return HAL_BUSY; |
mbed_official | 87:085cde657901 | 988 | } |
mbed_official | 87:085cde657901 | 989 | |
mbed_official | 87:085cde657901 | 990 | /* Update the NAND state */ |
mbed_official | 87:085cde657901 | 991 | hnand->State = HAL_NAND_STATE_BUSY; |
mbed_official | 87:085cde657901 | 992 | |
mbed_official | 87:085cde657901 | 993 | /* Get NAND ECC value */ |
mbed_official | 87:085cde657901 | 994 | status = FMC_NAND_GetECC(hnand->Instance, ECCval, hnand->Init.NandBank, Timeout); |
mbed_official | 87:085cde657901 | 995 | |
mbed_official | 87:085cde657901 | 996 | /* Update the NAND state */ |
mbed_official | 87:085cde657901 | 997 | hnand->State = HAL_NAND_STATE_READY; |
mbed_official | 87:085cde657901 | 998 | |
mbed_official | 87:085cde657901 | 999 | return status; |
mbed_official | 87:085cde657901 | 1000 | } |
mbed_official | 87:085cde657901 | 1001 | |
mbed_official | 87:085cde657901 | 1002 | /** |
mbed_official | 87:085cde657901 | 1003 | * @} |
mbed_official | 87:085cde657901 | 1004 | */ |
mbed_official | 87:085cde657901 | 1005 | |
mbed_official | 87:085cde657901 | 1006 | |
mbed_official | 87:085cde657901 | 1007 | /** @defgroup NAND_Group4 State functions |
mbed_official | 87:085cde657901 | 1008 | * @brief Peripheral State functions |
mbed_official | 87:085cde657901 | 1009 | * |
mbed_official | 87:085cde657901 | 1010 | @verbatim |
mbed_official | 87:085cde657901 | 1011 | ============================================================================== |
mbed_official | 87:085cde657901 | 1012 | ##### NAND State functions ##### |
mbed_official | 87:085cde657901 | 1013 | ============================================================================== |
mbed_official | 87:085cde657901 | 1014 | [..] |
mbed_official | 87:085cde657901 | 1015 | This subsection permit to get in run-time the status of the NAND controller |
mbed_official | 87:085cde657901 | 1016 | and the data flow. |
mbed_official | 87:085cde657901 | 1017 | |
mbed_official | 87:085cde657901 | 1018 | @endverbatim |
mbed_official | 87:085cde657901 | 1019 | * @{ |
mbed_official | 87:085cde657901 | 1020 | */ |
mbed_official | 87:085cde657901 | 1021 | |
mbed_official | 87:085cde657901 | 1022 | /** |
mbed_official | 87:085cde657901 | 1023 | * @brief return the NAND state |
mbed_official | 87:085cde657901 | 1024 | * @param hnand: pointer to NAND handle |
mbed_official | 87:085cde657901 | 1025 | * @retval HAL state |
mbed_official | 87:085cde657901 | 1026 | */ |
mbed_official | 87:085cde657901 | 1027 | HAL_NAND_StateTypeDef HAL_NAND_GetState(NAND_HandleTypeDef *hnand) |
mbed_official | 87:085cde657901 | 1028 | { |
mbed_official | 87:085cde657901 | 1029 | return hnand->State; |
mbed_official | 87:085cde657901 | 1030 | } |
mbed_official | 87:085cde657901 | 1031 | |
mbed_official | 87:085cde657901 | 1032 | /** |
mbed_official | 87:085cde657901 | 1033 | * @} |
mbed_official | 87:085cde657901 | 1034 | */ |
mbed_official | 87:085cde657901 | 1035 | |
mbed_official | 87:085cde657901 | 1036 | /** |
mbed_official | 87:085cde657901 | 1037 | * @} |
mbed_official | 87:085cde657901 | 1038 | */ |
mbed_official | 87:085cde657901 | 1039 | #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */ |
mbed_official | 87:085cde657901 | 1040 | #endif /* HAL_NAND_MODULE_ENABLED */ |
mbed_official | 87:085cde657901 | 1041 | |
mbed_official | 87:085cde657901 | 1042 | /** |
mbed_official | 87:085cde657901 | 1043 | * @} |
mbed_official | 87:085cde657901 | 1044 | */ |
mbed_official | 87:085cde657901 | 1045 | |
mbed_official | 87:085cde657901 | 1046 | /** |
mbed_official | 87:085cde657901 | 1047 | * @} |
mbed_official | 87:085cde657901 | 1048 | */ |
mbed_official | 87:085cde657901 | 1049 | |
mbed_official | 87:085cde657901 | 1050 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |