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targets/cmsis/TARGET_STM/TARGET_NUCLEO_F401RE/stm32f4xx_hal_cryp_ex.c@106:ced8cbb51063, 2014-02-26 (annotated)

Committer:: mbed_official
Date:: Wed Feb 26 09:45:12 2014 +0000
Revision:: 106:ced8cbb51063
Parent:: 87:085cde657901

Synchronized with git revision 4222735eff5868389433f0e9271976b39c8115cd



Full URL: https://github.com/mbedmicro/mbed/commit/4222735eff5868389433f0e9271976b39c8115cd/



[NUCLEO_xxx] Update STM32CubeF4 driver V1.0.0 + update license

Who changed what in which revision?

User	Revision	Line number	New contents of line
mbed_official	87:085cde657901	1	/**
mbed_official	87:085cde657901	2	******************************************************************************
mbed_official	87:085cde657901	3	* @file stm32f4xx_hal_cryp_ex.c
mbed_official	87:085cde657901	4	* @author MCD Application Team
mbed_official	106:ced8cbb51063	5	* @version V1.0.0
mbed_official	106:ced8cbb51063	6	* @date 18-February-2014
mbed_official	87:085cde657901	7	* @brief Extended CRYP HAL module driver
mbed_official	87:085cde657901	8	* This file provides firmware functions to manage the following
mbed_official	87:085cde657901	9	* functionalities of CRYP extension peripheral:
mbed_official	87:085cde657901	10	* + Extended AES processing functions
mbed_official	87:085cde657901	11	*
mbed_official	87:085cde657901	12	@verbatim
mbed_official	87:085cde657901	13	==============================================================================
mbed_official	87:085cde657901	14	##### How to use this driver #####
mbed_official	87:085cde657901	15	==============================================================================
mbed_official	87:085cde657901	16	[..]
mbed_official	87:085cde657901	17	The CRYP Extension HAL driver can be used as follows:
mbed_official	87:085cde657901	18	(#)Initialize the CRYP low level resources by implementing the HAL_CRYP_MspInit():
mbed_official	87:085cde657901	19	(##) Enable the CRYP interface clock using __CRYP_CLK_ENABLE()
mbed_official	87:085cde657901	20	(##) In case of using interrupts (e.g. HAL_CRYPEx_AESGCM_Encrypt_IT())
mbed_official	87:085cde657901	21	(+++) Configure the CRYP interrupt priority using HAL_NVIC_SetPriority()
mbed_official	87:085cde657901	22	(+++) Enable the CRYP IRQ handler using HAL_NVIC_EnableIRQ()
mbed_official	87:085cde657901	23	(+) In CRYP IRQ handler, call HAL_CRYP_IRQHandler()
mbed_official	87:085cde657901	24	(##) In case of using DMA to control data transfer (e.g. HAL_AES_ECB_Encrypt_DMA())
mbed_official	87:085cde657901	25	(+++) Enable the DMAx interface clock using __DMAx_CLK_ENABLE()
mbed_official	87:085cde657901	26	(+++) Configure and enable two DMA streams one for managing data transfer from
mbed_official	87:085cde657901	27	memory to peripheral (input stream) and another stream for managing data
mbed_official	87:085cde657901	28	transfer from peripheral to memory (output stream)
mbed_official	87:085cde657901	29	(+++) Associate the initilalized DMA handle to the CRYP DMA handle
mbed_official	87:085cde657901	30	using __HAL_LINKDMA()
mbed_official	87:085cde657901	31	(+++) Configure the priority and enable the NVIC for the transfer complete
mbed_official	87:085cde657901	32	interrupt on the two DMA Streams. The output stream should have higher
mbed_official	87:085cde657901	33	priority than the input stream HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ()
mbed_official	87:085cde657901	34	(#)Initialize the CRYP HAL using HAL_CRYP_Init(). This function configures mainly:
mbed_official	87:085cde657901	35	(##) The data type: 1-bit, 8-bit, 16-bit and 32-bit
mbed_official	87:085cde657901	36	(##) The key size: 128, 192 and 256. This parameter is relevant only for AES
mbed_official	87:085cde657901	37	(##) The encryption/decryption key. Its size depends on the algorithm
mbed_official	87:085cde657901	38	used for encryption/decryption
mbed_official	87:085cde657901	39	(##) The initialization vector (counter). It is not used ECB mode.
mbed_official	87:085cde657901	40	(#)Three processing (encryption/decryption) functions are available:
mbed_official	87:085cde657901	41	(##) Polling mode: encryption and decryption APIs are blocking functions
mbed_official	87:085cde657901	42	i.e. they process the data and wait till the processing is finished
mbed_official	87:085cde657901	43	e.g. HAL_CRYPEx_AESGCM_Encrypt()
mbed_official	87:085cde657901	44	(##) Interrupt mode: encryption and decryption APIs are not blocking functions
mbed_official	87:085cde657901	45	i.e. they process the data under interrupt
mbed_official	87:085cde657901	46	e.g. HAL_CRYPEx_AESGCM_Encrypt_IT()
mbed_official	87:085cde657901	47	(##) DMA mode: encryption and decryption APIs are not blocking functions
mbed_official	87:085cde657901	48	i.e. the data transfer is ensured by DMA
mbed_official	87:085cde657901	49	e.g. HAL_CRYPEx_AESGCM_Encrypt_DMA()
mbed_official	87:085cde657901	50	(#)When the processing function is called at first time after HAL_CRYP_Init()
mbed_official	87:085cde657901	51	the CRYP peripheral is initialized and processes the buffer in input.
mbed_official	87:085cde657901	52	At second call, the processing function performs an append of the already
mbed_official	87:085cde657901	53	processed buffer.
mbed_official	87:085cde657901	54	When a new data block is to be processed, call HAL_CRYP_Init() then the
mbed_official	87:085cde657901	55	processing function.
mbed_official	87:085cde657901	56	(#)In AES-GCM and AES-CCM modes are an authenticated encryption algorithms
mbed_official	87:085cde657901	57	which provide authentication messages.
mbed_official	87:085cde657901	58	HAL_AES_GCM_Finish() and HAL_AES_CCM_Finish() are used to provide those
mbed_official	87:085cde657901	59	authentication messages.
mbed_official	87:085cde657901	60	Call those functions after the processing ones (polling, interrupt or DMA).
mbed_official	87:085cde657901	61	e.g. in AES-CCM mode call HAL_CRYPEx_AESCCM_Encrypt() to encrypt the plain data
mbed_official	87:085cde657901	62	then call HAL_CRYPEx_AESCCM_Finish() to get the authentication message
mbed_official	87:085cde657901	63	(#)Call HAL_CRYP_DeInit() to deinitialize the CRYP peripheral.
mbed_official	87:085cde657901	64
mbed_official	87:085cde657901	65	@endverbatim
mbed_official	87:085cde657901	66	******************************************************************************
mbed_official	87:085cde657901	67	* @attention
mbed_official	87:085cde657901	68	*
mbed_official	87:085cde657901	69	* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official	87:085cde657901	70	*
mbed_official	87:085cde657901	71	* Redistribution and use in source and binary forms, with or without modification,
mbed_official	87:085cde657901	72	* are permitted provided that the following conditions are met:
mbed_official	87:085cde657901	73	* 1. Redistributions of source code must retain the above copyright notice,
mbed_official	87:085cde657901	74	* this list of conditions and the following disclaimer.
mbed_official	87:085cde657901	75	* 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official	87:085cde657901	76	* this list of conditions and the following disclaimer in the documentation
mbed_official	87:085cde657901	77	* and/or other materials provided with the distribution.
mbed_official	87:085cde657901	78	* 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official	87:085cde657901	79	* may be used to endorse or promote products derived from this software
mbed_official	87:085cde657901	80	* without specific prior written permission.
mbed_official	87:085cde657901	81	*
mbed_official	87:085cde657901	82	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official	87:085cde657901	83	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official	87:085cde657901	84	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official	87:085cde657901	85	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official	87:085cde657901	86	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official	87:085cde657901	87	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official	87:085cde657901	88	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official	87:085cde657901	89	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official	87:085cde657901	90	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official	87:085cde657901	91	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official	87:085cde657901	92	*
mbed_official	87:085cde657901	93	******************************************************************************
mbed_official	87:085cde657901	94	*/
mbed_official	87:085cde657901	95
mbed_official	87:085cde657901	96	/* Includes ------------------------------------------------------------------*/
mbed_official	87:085cde657901	97	#include "stm32f4xx_hal.h"
mbed_official	87:085cde657901	98
mbed_official	87:085cde657901	99	/** @addtogroup STM32F4xx_HAL_Driver
mbed_official	87:085cde657901	100	* @{
mbed_official	87:085cde657901	101	*/
mbed_official	87:085cde657901	102
mbed_official	87:085cde657901	103	/** @defgroup CRYPEx
mbed_official	87:085cde657901	104	* @brief CRYP Extension HAL module driver.
mbed_official	87:085cde657901	105	* @{
mbed_official	87:085cde657901	106	*/
mbed_official	87:085cde657901	107
mbed_official	87:085cde657901	108	#ifdef HAL_CRYP_MODULE_ENABLED
mbed_official	87:085cde657901	109
mbed_official	87:085cde657901	110	#if defined(STM32F437xx) \|\| defined(STM32F439xx)
mbed_official	87:085cde657901	111
mbed_official	87:085cde657901	112	/* Private typedef -----------------------------------------------------------*/
mbed_official	87:085cde657901	113	/* Private define ------------------------------------------------------------*/
mbed_official	87:085cde657901	114	/* Private macro -------------------------------------------------------------*/
mbed_official	87:085cde657901	115	/* Private variables ---------------------------------------------------------*/
mbed_official	87:085cde657901	116	/* Private function prototypes -----------------------------------------------*/
mbed_official	87:085cde657901	117	static void CRYPEx_GCMCCM_SetInitVector(CRYP_HandleTypeDef hcryp, uint8_t InitVector, uint32_t IVSize);
mbed_official	87:085cde657901	118	static void CRYPEx_GCMCCM_SetKey(CRYP_HandleTypeDef hcryp, uint8_t Key, uint32_t KeySize);
mbed_official	87:085cde657901	119	static HAL_StatusTypeDef CRYPEx_GCMCCM_ProcessData(CRYP_HandleTypeDef hcryp, uint8_t Input, uint16_t Ilength, uint8_t *Output, uint32_t Timeout);
mbed_official	87:085cde657901	120	static HAL_StatusTypeDef CRYPEx_GCMCCM_SetHeaderPhase(CRYP_HandleTypeDef hcryp, uint8_t Input, uint16_t Ilength, uint32_t Timeout);
mbed_official	87:085cde657901	121	static void CRYPEx_GCMCCM_DMAInCplt(DMA_HandleTypeDef *hdma);
mbed_official	87:085cde657901	122	static void CRYPEx_GCMCCM_DMAOutCplt(DMA_HandleTypeDef *hdma);
mbed_official	87:085cde657901	123	static void CRYPEx_GCMCCM_DMAError(DMA_HandleTypeDef *hdma);
mbed_official	87:085cde657901	124	static void CRYPEx_GCMCCM_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size, uint32_t outputaddr);
mbed_official	87:085cde657901	125
mbed_official	87:085cde657901	126	/* Private functions ---------------------------------------------------------*/
mbed_official	87:085cde657901	127
mbed_official	87:085cde657901	128	/** @defgroup CRYPEx_Private_Functions
mbed_official	87:085cde657901	129	* @{
mbed_official	87:085cde657901	130	*/
mbed_official	87:085cde657901	131
mbed_official	87:085cde657901	132	/** @defgroup CRYPEx_Group1 Extended AES processing functions
mbed_official	87:085cde657901	133	* @brief Extended processing functions.
mbed_official	87:085cde657901	134	*
mbed_official	87:085cde657901	135	@verbatim
mbed_official	87:085cde657901	136	==============================================================================
mbed_official	87:085cde657901	137	##### Extended AES processing functions #####
mbed_official	87:085cde657901	138	==============================================================================
mbed_official	87:085cde657901	139	[..] This section provides functions allowing to:
mbed_official	87:085cde657901	140	(+) Encrypt plaintext using AES-128/192/256 using GCM and CCM chaining modes
mbed_official	87:085cde657901	141	(+) Decrypt cyphertext using AES-128/192/256 using GCM and CCM chaining modes
mbed_official	87:085cde657901	142	(+) Finish the processing. This function is available only for GCM and CCM
mbed_official	87:085cde657901	143	[..] Three processing methods are available:
mbed_official	87:085cde657901	144	(+) Polling mode
mbed_official	87:085cde657901	145	(+) Interrupt mode
mbed_official	87:085cde657901	146	(+) DMA mode
mbed_official	87:085cde657901	147
mbed_official	87:085cde657901	148	@endverbatim
mbed_official	87:085cde657901	149	* @{
mbed_official	87:085cde657901	150	*/
mbed_official	87:085cde657901	151
mbed_official	87:085cde657901	152
mbed_official	87:085cde657901	153	/**
mbed_official	87:085cde657901	154	* @brief Initializes the CRYP peripheral in AES CCM encryption mode then
mbed_official	87:085cde657901	155	* encrypt pPlainData. The cypher data are available in pCypherData.
mbed_official	87:085cde657901	156	* @param hcryp: CRYP handle
mbed_official	87:085cde657901	157	* @param pPlainData: Pointer to the plaintext buffer
mbed_official	87:085cde657901	158	* @param Size: Length of the plaintext buffer, must be a multiple of 16
mbed_official	87:085cde657901	159	* @param pCypherData: Pointer to the cyphertext buffer
mbed_official	87:085cde657901	160	* @param Timeout: Timeout duration
mbed_official	87:085cde657901	161	* @retval HAL status
mbed_official	87:085cde657901	162	*/
mbed_official	87:085cde657901	163	HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Encrypt(CRYP_HandleTypeDef hcryp, uint8_t pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
mbed_official	87:085cde657901	164	{
mbed_official	87:085cde657901	165	uint32_t timeout = 0;
mbed_official	87:085cde657901	166	uint32_t headersize = hcryp->Init.HeaderSize;
mbed_official	87:085cde657901	167	uint32_t headeraddr = (uint32_t)hcryp->Init.Header;
mbed_official	87:085cde657901	168	uint32_t loopcounter = 0;
mbed_official	87:085cde657901	169	uint32_t bufferidx = 0;
mbed_official	87:085cde657901	170	uint8_t blockb0[16] = {0};/* Block B0 */
mbed_official	87:085cde657901	171	uint8_t ctr[16] = {0}; /* Counter */
mbed_official	87:085cde657901	172	uint32_t b0addr = (uint32_t)blockb0;
mbed_official	87:085cde657901	173
mbed_official	87:085cde657901	174	/* Process Locked */
mbed_official	87:085cde657901	175	__HAL_LOCK(hcryp);
mbed_official	87:085cde657901	176
mbed_official	87:085cde657901	177	/* Change the CRYP peripheral state */
mbed_official	87:085cde657901	178	hcryp->State = HAL_CRYP_STATE_BUSY;
mbed_official	87:085cde657901	179
mbed_official	87:085cde657901	180	/* Check if initialization phase has already been performed */
mbed_official	87:085cde657901	181	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
mbed_official	87:085cde657901	182	{
mbed_official	87:085cde657901	183	/********************** Formatting the header block *******************/
mbed_official	87:085cde657901	184	if(headersize != 0)
mbed_official	87:085cde657901	185	{
mbed_official	87:085cde657901	186	/* Check that the associated data (or header) length is lower than 2^16 - 2^8 = 65536 - 256 = 65280 */
mbed_official	87:085cde657901	187	if(headersize < 65280)
mbed_official	87:085cde657901	188	{
mbed_official	87:085cde657901	189	hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize >> 8) & 0xFF);
mbed_official	87:085cde657901	190	hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize) & 0xFF);
mbed_official	87:085cde657901	191	headersize += 2;
mbed_official	87:085cde657901	192	}
mbed_official	87:085cde657901	193	else
mbed_official	87:085cde657901	194	{
mbed_official	87:085cde657901	195	/* Header is encoded as 0xff \|\| 0xfe \|\| [headersize]32, i.e., six octets */
mbed_official	87:085cde657901	196	hcryp->Init.pScratch[bufferidx++] = 0xFF;
mbed_official	87:085cde657901	197	hcryp->Init.pScratch[bufferidx++] = 0xFE;
mbed_official	87:085cde657901	198	hcryp->Init.pScratch[bufferidx++] = headersize & 0xff000000;
mbed_official	87:085cde657901	199	hcryp->Init.pScratch[bufferidx++] = headersize & 0x00ff0000;
mbed_official	87:085cde657901	200	hcryp->Init.pScratch[bufferidx++] = headersize & 0x0000ff00;
mbed_official	87:085cde657901	201	hcryp->Init.pScratch[bufferidx++] = headersize & 0x000000ff;
mbed_official	87:085cde657901	202	headersize += 6;
mbed_official	87:085cde657901	203	}
mbed_official	87:085cde657901	204	/* Copy the header buffer in internal buffer "hcryp->Init.pScratch" */
mbed_official	87:085cde657901	205	for(loopcounter = 0; loopcounter < headersize; loopcounter++)
mbed_official	87:085cde657901	206	{
mbed_official	87:085cde657901	207	hcryp->Init.pScratch[bufferidx++] = hcryp->Init.Header[loopcounter];
mbed_official	87:085cde657901	208	}
mbed_official	87:085cde657901	209	/* Check if the header size is modulo 16 */
mbed_official	87:085cde657901	210	if ((headersize % 16) != 0)
mbed_official	87:085cde657901	211	{
mbed_official	87:085cde657901	212	/* Padd the header buffer with 0s till the hcryp->Init.pScratch length is modulo 16 */
mbed_official	87:085cde657901	213	for(loopcounter = headersize; loopcounter <= ((headersize/16) + 1) * 16; loopcounter++)
mbed_official	87:085cde657901	214	{
mbed_official	87:085cde657901	215	hcryp->Init.pScratch[loopcounter] = 0;
mbed_official	87:085cde657901	216	}
mbed_official	87:085cde657901	217	/* Set the header size to modulo 16 */
mbed_official	87:085cde657901	218	headersize = ((headersize/16) + 1) * 16;
mbed_official	87:085cde657901	219	}
mbed_official	87:085cde657901	220	/* Set the pointer headeraddr to hcryp->Init.pScratch */
mbed_official	87:085cde657901	221	headeraddr = (uint32_t)hcryp->Init.pScratch;
mbed_official	87:085cde657901	222	}
mbed_official	87:085cde657901	223	/********************* Formatting the block B0 ************************/
mbed_official	87:085cde657901	224	if(headersize != 0)
mbed_official	87:085cde657901	225	{
mbed_official	87:085cde657901	226	blockb0[0] = 0x40;
mbed_official	87:085cde657901	227	}
mbed_official	87:085cde657901	228	/* Flags byte */
mbed_official	87:085cde657901	229	/* blockb0[0] \|= 0u \| (((( (uint8_t) hcryp->Init.TagSize - 2) / 2) & 0x07 ) << 3 ) \| ( ( (uint8_t) (15 - hcryp->Init.IVSize) - 1) & 0x07) */
mbed_official	87:085cde657901	230	blockb0[0] \|= (uint8_t)((uint8_t)((uint8_t)(((uint8_t)(hcryp->Init.TagSize - (uint8_t)(2))) >> 1) & (uint8_t)0x07 ) << 3);
mbed_official	87:085cde657901	231	blockb0[0] \|= (uint8_t)((uint8_t)((uint8_t)((uint8_t)(15) - hcryp->Init.IVSize) - (uint8_t)1) & (uint8_t)0x07);
mbed_official	87:085cde657901	232
mbed_official	87:085cde657901	233	for (loopcounter = 0; loopcounter < hcryp->Init.IVSize; loopcounter++)
mbed_official	87:085cde657901	234	{
mbed_official	87:085cde657901	235	blockb0[loopcounter+1] = hcryp->Init.pInitVect[loopcounter];
mbed_official	87:085cde657901	236	}
mbed_official	87:085cde657901	237	for ( ; loopcounter < 13; loopcounter++)
mbed_official	87:085cde657901	238	{
mbed_official	87:085cde657901	239	blockb0[loopcounter+1] = 0;
mbed_official	87:085cde657901	240	}
mbed_official	87:085cde657901	241
mbed_official	87:085cde657901	242	blockb0[14] = (Size >> 8);
mbed_official	87:085cde657901	243	blockb0[15] = (Size & 0xFF);
mbed_official	87:085cde657901	244
mbed_official	87:085cde657901	245	/*********************** Formatting the initial counter ***************/
mbed_official	87:085cde657901	246	/* Byte 0:
mbed_official	87:085cde657901	247	Bits 7 and 6 are reserved and shall be set to 0
mbed_official	87:085cde657901	248	Bits 3, 4, and 5 shall also be set to 0, to ensure that all the counter blocks
mbed_official	87:085cde657901	249	are distinct from B0
mbed_official	87:085cde657901	250	Bits 0, 1, and 2 contain the same encoding of q as in B0
mbed_official	87:085cde657901	251	*/
mbed_official	87:085cde657901	252	ctr[0] = blockb0[0] & 0x07;
mbed_official	87:085cde657901	253	/* byte 1 to NonceSize is the IV (Nonce) */
mbed_official	87:085cde657901	254	for(loopcounter = 1; loopcounter < hcryp->Init.IVSize + 1; loopcounter++)
mbed_official	87:085cde657901	255	{
mbed_official	87:085cde657901	256	ctr[loopcounter] = blockb0[loopcounter];
mbed_official	87:085cde657901	257	}
mbed_official	87:085cde657901	258	/* Set the LSB to 1 */
mbed_official	87:085cde657901	259	ctr[15] \|= 0x01;
mbed_official	87:085cde657901	260
mbed_official	87:085cde657901	261	/* Set the key */
mbed_official	87:085cde657901	262	CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
mbed_official	87:085cde657901	263
mbed_official	87:085cde657901	264	/* Set the CRYP peripheral in AES CCM mode */
mbed_official	87:085cde657901	265	__HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CCM_ENCRYPT);
mbed_official	87:085cde657901	266
mbed_official	87:085cde657901	267	/* Set the Initialization Vector */
mbed_official	87:085cde657901	268	CRYPEx_GCMCCM_SetInitVector(hcryp, ctr, CRYP_KEYSIZE_128B);
mbed_official	87:085cde657901	269
mbed_official	87:085cde657901	270	/* Select init phase */
mbed_official	87:085cde657901	271	__HAL_CRYP_SET_PHASE(CRYP_PHASE_INIT);
mbed_official	87:085cde657901	272
mbed_official	87:085cde657901	273	b0addr = (uint32_t)blockb0;
mbed_official	87:085cde657901	274	/* Write the blockb0 block in the IN FIFO */
mbed_official	87:085cde657901	275	CRYP->DR = (uint32_t)(b0addr);
mbed_official	87:085cde657901	276	b0addr+=4;
mbed_official	87:085cde657901	277	CRYP->DR = (uint32_t)(b0addr);
mbed_official	87:085cde657901	278	b0addr+=4;
mbed_official	87:085cde657901	279	CRYP->DR = (uint32_t)(b0addr);
mbed_official	87:085cde657901	280	b0addr+=4;
mbed_official	87:085cde657901	281	CRYP->DR = (uint32_t)(b0addr);
mbed_official	87:085cde657901	282
mbed_official	87:085cde657901	283	/* Enable the CRYP peripheral */
mbed_official	87:085cde657901	284	__HAL_CRYP_ENABLE();
mbed_official	87:085cde657901	285
mbed_official	87:085cde657901	286	/* Get timeout */
mbed_official	87:085cde657901	287	timeout = HAL_GetTick() + Timeout;
mbed_official	87:085cde657901	288
mbed_official	87:085cde657901	289	while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
mbed_official	87:085cde657901	290	{
mbed_official	87:085cde657901	291	/* Check for the Timeout */
mbed_official	87:085cde657901	292	if(Timeout != HAL_MAX_DELAY)
mbed_official	87:085cde657901	293	{
mbed_official	87:085cde657901	294	if(HAL_GetTick() >= timeout)
mbed_official	87:085cde657901	295	{
mbed_official	87:085cde657901	296	/* Change state */
mbed_official	87:085cde657901	297	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official	87:085cde657901	298
mbed_official	87:085cde657901	299	/* Process Unlocked */
mbed_official	87:085cde657901	300	__HAL_UNLOCK(hcryp);
mbed_official	87:085cde657901	301
mbed_official	87:085cde657901	302	return HAL_TIMEOUT;
mbed_official	87:085cde657901	303	}
mbed_official	87:085cde657901	304	}
mbed_official	87:085cde657901	305	}
mbed_official	87:085cde657901	306	/*************************** Header phase *****************************/
mbed_official	87:085cde657901	307	if(headersize != 0)
mbed_official	87:085cde657901	308	{
mbed_official	87:085cde657901	309	/* Select header phase */
mbed_official	87:085cde657901	310	__HAL_CRYP_SET_PHASE(CRYP_PHASE_HEADER);
mbed_official	87:085cde657901	311
mbed_official	87:085cde657901	312	/* Enable the CRYP peripheral */
mbed_official	87:085cde657901	313	__HAL_CRYP_ENABLE();
mbed_official	87:085cde657901	314
mbed_official	87:085cde657901	315	for(loopcounter = 0; (loopcounter < headersize); loopcounter+=16)
mbed_official	87:085cde657901	316	{
mbed_official	87:085cde657901	317	/* Get timeout */
mbed_official	87:085cde657901	318	timeout = HAL_GetTick() + Timeout;
mbed_official	87:085cde657901	319	while(HAL_IS_BIT_CLR(CRYP->SR, CRYP_FLAG_IFEM))
mbed_official	87:085cde657901	320	{
mbed_official	87:085cde657901	321	{
mbed_official	87:085cde657901	322	/* Check for the Timeout */
mbed_official	87:085cde657901	323	if(Timeout != HAL_MAX_DELAY)
mbed_official	87:085cde657901	324	{
mbed_official	87:085cde657901	325	if(HAL_GetTick() >= timeout)
mbed_official	87:085cde657901	326	{
mbed_official	87:085cde657901	327	/* Change state */
mbed_official	87:085cde657901	328	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official	87:085cde657901	329
mbed_official	87:085cde657901	330	/* Process Unlocked */
mbed_official	87:085cde657901	331	__HAL_UNLOCK(hcryp);
mbed_official	87:085cde657901	332
mbed_official	87:085cde657901	333	return HAL_TIMEOUT;
mbed_official	87:085cde657901	334	}
mbed_official	87:085cde657901	335	}
mbed_official	87:085cde657901	336	}
mbed_official	87:085cde657901	337	}
mbed_official	87:085cde657901	338	/* Write the header block in the IN FIFO */
mbed_official	87:085cde657901	339	CRYP->DR = (uint32_t)(headeraddr);
mbed_official	87:085cde657901	340	headeraddr+=4;
mbed_official	87:085cde657901	341	CRYP->DR = (uint32_t)(headeraddr);
mbed_official	87:085cde657901	342	headeraddr+=4;
mbed_official	87:085cde657901	343	CRYP->DR = (uint32_t)(headeraddr);
mbed_official	87:085cde657901	344	headeraddr+=4;
mbed_official	87:085cde657901	345	CRYP->DR = (uint32_t)(headeraddr);
mbed_official	87:085cde657901	346	headeraddr+=4;
mbed_official	87:085cde657901	347	}
mbed_official	87:085cde657901	348
mbed_official	87:085cde657901	349	/* Get timeout */
mbed_official	87:085cde657901	350	timeout = HAL_GetTick() + Timeout;
mbed_official	87:085cde657901	351
mbed_official	87:085cde657901	352	while((CRYP->SR & CRYP_FLAG_BUSY) == CRYP_FLAG_BUSY)
mbed_official	87:085cde657901	353	{
mbed_official	87:085cde657901	354	/* Check for the Timeout */
mbed_official	87:085cde657901	355	if(Timeout != HAL_MAX_DELAY)
mbed_official	87:085cde657901	356	{
mbed_official	87:085cde657901	357	if(HAL_GetTick() >= timeout)
mbed_official	87:085cde657901	358	{
mbed_official	87:085cde657901	359	/* Change state */
mbed_official	87:085cde657901	360	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official	87:085cde657901	361
mbed_official	87:085cde657901	362	/* Process Unlocked */
mbed_official	87:085cde657901	363	__HAL_UNLOCK(hcryp);
mbed_official	87:085cde657901	364
mbed_official	87:085cde657901	365	return HAL_TIMEOUT;
mbed_official	87:085cde657901	366	}
mbed_official	87:085cde657901	367	}
mbed_official	87:085cde657901	368	}
mbed_official	87:085cde657901	369	}
mbed_official	87:085cde657901	370	/* Save formatted counter into the scratch buffer pScratch */
mbed_official	87:085cde657901	371	for(loopcounter = 0; (loopcounter < 16); loopcounter++)
mbed_official	87:085cde657901	372	{
mbed_official	87:085cde657901	373	hcryp->Init.pScratch[loopcounter] = ctr[loopcounter];
mbed_official	87:085cde657901	374	}
mbed_official	87:085cde657901	375	/* Reset bit 0 */
mbed_official	87:085cde657901	376	hcryp->Init.pScratch[15] &= 0xfe;
mbed_official	87:085cde657901	377
mbed_official	87:085cde657901	378	/* Select payload phase once the header phase is performed */
mbed_official	87:085cde657901	379	__HAL_CRYP_SET_PHASE(CRYP_PHASE_PAYLOAD);
mbed_official	87:085cde657901	380
mbed_official	87:085cde657901	381	/* Flush FIFO */
mbed_official	87:085cde657901	382	__HAL_CRYP_FIFO_FLUSH();
mbed_official	87:085cde657901	383
mbed_official	87:085cde657901	384	/* Enable the CRYP peripheral */
mbed_official	87:085cde657901	385	__HAL_CRYP_ENABLE();
mbed_official	87:085cde657901	386
mbed_official	87:085cde657901	387	/* Set the phase */
mbed_official	87:085cde657901	388	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
mbed_official	87:085cde657901	389	}
mbed_official	87:085cde657901	390
mbed_official	87:085cde657901	391	/* Write Plain Data and Get Cypher Data */
mbed_official	87:085cde657901	392	if(CRYPEx_GCMCCM_ProcessData(hcryp,pPlainData, Size, pCypherData, Timeout) != HAL_OK)
mbed_official	87:085cde657901	393	{
mbed_official	87:085cde657901	394	return HAL_TIMEOUT;
mbed_official	87:085cde657901	395	}
mbed_official	87:085cde657901	396
mbed_official	87:085cde657901	397	/* Change the CRYP peripheral state */
mbed_official	87:085cde657901	398	hcryp->State = HAL_CRYP_STATE_READY;
mbed_official	87:085cde657901	399
mbed_official	87:085cde657901	400	/* Process Unlocked */
mbed_official	87:085cde657901	401	__HAL_UNLOCK(hcryp);
mbed_official	87:085cde657901	402
mbed_official	87:085cde657901	403	/* Return function status */
mbed_official	87:085cde657901	404	return HAL_OK;
mbed_official	87:085cde657901	405	}
mbed_official	87:085cde657901	406
mbed_official	87:085cde657901	407	/**
mbed_official	87:085cde657901	408	* @brief Initializes the CRYP peripheral in AES GCM encryption mode then
mbed_official	87:085cde657901	409	* encrypt pPlainData. The cypher data are available in pCypherData.
mbed_official	87:085cde657901	410	* @param hcryp: CRYP handle
mbed_official	87:085cde657901	411	* @param pPlainData: Pointer to the plaintext buffer
mbed_official	87:085cde657901	412	* @param Size: Length of the plaintext buffer, must be a multiple of 16
mbed_official	87:085cde657901	413	* @param pCypherData: Pointer to the cyphertext buffer
mbed_official	87:085cde657901	414	* @param Timeout: Timeout duration
mbed_official	87:085cde657901	415	* @retval HAL status
mbed_official	87:085cde657901	416	*/
mbed_official	87:085cde657901	417	HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Encrypt(CRYP_HandleTypeDef hcryp, uint8_t pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
mbed_official	87:085cde657901	418	{
mbed_official	87:085cde657901	419	uint32_t timeout = 0;
mbed_official	87:085cde657901	420
mbed_official	87:085cde657901	421	/* Process Locked */
mbed_official	87:085cde657901	422	__HAL_LOCK(hcryp);
mbed_official	87:085cde657901	423
mbed_official	87:085cde657901	424	/* Change the CRYP peripheral state */
mbed_official	87:085cde657901	425	hcryp->State = HAL_CRYP_STATE_BUSY;
mbed_official	87:085cde657901	426
mbed_official	87:085cde657901	427	/* Check if initialization phase has already been performed */
mbed_official	87:085cde657901	428	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
mbed_official	87:085cde657901	429	{
mbed_official	87:085cde657901	430	/* Set the key */
mbed_official	87:085cde657901	431	CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
mbed_official	87:085cde657901	432
mbed_official	87:085cde657901	433	/* Set the CRYP peripheral in AES GCM mode */
mbed_official	87:085cde657901	434	__HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_GCM_ENCRYPT);
mbed_official	87:085cde657901	435
mbed_official	87:085cde657901	436	/* Set the Initialization Vector */
mbed_official	87:085cde657901	437	CRYPEx_GCMCCM_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
mbed_official	87:085cde657901	438
mbed_official	87:085cde657901	439	/* Flush FIFO */
mbed_official	87:085cde657901	440	__HAL_CRYP_FIFO_FLUSH();
mbed_official	87:085cde657901	441
mbed_official	87:085cde657901	442	/* Enable the CRYP peripheral */
mbed_official	87:085cde657901	443	__HAL_CRYP_ENABLE();
mbed_official	87:085cde657901	444
mbed_official	87:085cde657901	445	/* Get timeout */
mbed_official	87:085cde657901	446	timeout = HAL_GetTick() + Timeout;
mbed_official	87:085cde657901	447
mbed_official	87:085cde657901	448	while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
mbed_official	87:085cde657901	449	{
mbed_official	87:085cde657901	450	/* Check for the Timeout */
mbed_official	87:085cde657901	451	if(Timeout != HAL_MAX_DELAY)
mbed_official	87:085cde657901	452	{
mbed_official	87:085cde657901	453	if(HAL_GetTick() >= timeout)
mbed_official	87:085cde657901	454	{
mbed_official	87:085cde657901	455	/* Change state */
mbed_official	87:085cde657901	456	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official	87:085cde657901	457
mbed_official	87:085cde657901	458	/* Process Unlocked */
mbed_official	87:085cde657901	459	__HAL_UNLOCK(hcryp);
mbed_official	87:085cde657901	460
mbed_official	87:085cde657901	461	return HAL_TIMEOUT;
mbed_official	87:085cde657901	462	}
mbed_official	87:085cde657901	463	}
mbed_official	87:085cde657901	464	}
mbed_official	87:085cde657901	465
mbed_official	87:085cde657901	466	/* Set the header phase */
mbed_official	87:085cde657901	467	if(CRYPEx_GCMCCM_SetHeaderPhase(hcryp, hcryp->Init.Header, hcryp->Init.HeaderSize, Timeout) != HAL_OK)
mbed_official	87:085cde657901	468	{
mbed_official	87:085cde657901	469	return HAL_TIMEOUT;
mbed_official	87:085cde657901	470	}
mbed_official	87:085cde657901	471
mbed_official	87:085cde657901	472	/* Disable the CRYP peripheral */
mbed_official	87:085cde657901	473	__HAL_CRYP_DISABLE();
mbed_official	87:085cde657901	474
mbed_official	87:085cde657901	475	/* Select payload phase once the header phase is performed */
mbed_official	87:085cde657901	476	__HAL_CRYP_SET_PHASE(CRYP_PHASE_PAYLOAD);
mbed_official	87:085cde657901	477
mbed_official	87:085cde657901	478	/* Flush FIFO */
mbed_official	87:085cde657901	479	__HAL_CRYP_FIFO_FLUSH();
mbed_official	87:085cde657901	480
mbed_official	87:085cde657901	481	/* Enable the CRYP peripheral */
mbed_official	87:085cde657901	482	__HAL_CRYP_ENABLE();
mbed_official	87:085cde657901	483
mbed_official	87:085cde657901	484	/* Set the phase */
mbed_official	87:085cde657901	485	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
mbed_official	87:085cde657901	486	}
mbed_official	87:085cde657901	487
mbed_official	87:085cde657901	488	/* Write Plain Data and Get Cypher Data */
mbed_official	87:085cde657901	489	if(CRYPEx_GCMCCM_ProcessData(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
mbed_official	87:085cde657901	490	{
mbed_official	87:085cde657901	491	return HAL_TIMEOUT;
mbed_official	87:085cde657901	492	}
mbed_official	87:085cde657901	493
mbed_official	87:085cde657901	494	/* Change the CRYP peripheral state */
mbed_official	87:085cde657901	495	hcryp->State = HAL_CRYP_STATE_READY;
mbed_official	87:085cde657901	496
mbed_official	87:085cde657901	497	/* Process Unlocked */
mbed_official	87:085cde657901	498	__HAL_UNLOCK(hcryp);
mbed_official	87:085cde657901	499
mbed_official	87:085cde657901	500	/* Return function status */
mbed_official	87:085cde657901	501	return HAL_OK;
mbed_official	87:085cde657901	502	}
mbed_official	87:085cde657901	503
mbed_official	87:085cde657901	504	/**
mbed_official	87:085cde657901	505	* @brief Initializes the CRYP peripheral in AES GCM decryption mode then
mbed_official	87:085cde657901	506	* decrypted pCypherData. The cypher data are available in pPlainData.
mbed_official	87:085cde657901	507	* @param hcryp: CRYP handle
mbed_official	87:085cde657901	508	* @param pCypherData: Pointer to the cyphertext buffer
mbed_official	87:085cde657901	509	* @param Size: Length of the cyphertext buffer, must be a multiple of 16
mbed_official	87:085cde657901	510	* @param pPlainData: Pointer to the plaintext buffer
mbed_official	87:085cde657901	511	* @param Timeout: Timeout duration
mbed_official	87:085cde657901	512	* @retval HAL status
mbed_official	87:085cde657901	513	*/
mbed_official	87:085cde657901	514	HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Decrypt(CRYP_HandleTypeDef hcryp, uint8_t pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
mbed_official	87:085cde657901	515	{
mbed_official	87:085cde657901	516	uint32_t timeout = 0;
mbed_official	87:085cde657901	517
mbed_official	87:085cde657901	518	/* Process Locked */
mbed_official	87:085cde657901	519	__HAL_LOCK(hcryp);
mbed_official	87:085cde657901	520
mbed_official	87:085cde657901	521	/* Change the CRYP peripheral state */
mbed_official	87:085cde657901	522	hcryp->State = HAL_CRYP_STATE_BUSY;
mbed_official	87:085cde657901	523
mbed_official	87:085cde657901	524	/* Check if initialization phase has already been performed */
mbed_official	87:085cde657901	525	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
mbed_official	87:085cde657901	526	{
mbed_official	87:085cde657901	527	/* Set the key */
mbed_official	87:085cde657901	528	CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
mbed_official	87:085cde657901	529
mbed_official	87:085cde657901	530	/* Set the CRYP peripheral in AES GCM decryption mode */
mbed_official	87:085cde657901	531	__HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_GCM_DECRYPT);
mbed_official	87:085cde657901	532
mbed_official	87:085cde657901	533	/* Set the Initialization Vector */
mbed_official	87:085cde657901	534	CRYPEx_GCMCCM_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
mbed_official	87:085cde657901	535
mbed_official	87:085cde657901	536	/* Flush FIFO */
mbed_official	87:085cde657901	537	__HAL_CRYP_FIFO_FLUSH();
mbed_official	87:085cde657901	538
mbed_official	87:085cde657901	539	/* Enable the CRYP peripheral */
mbed_official	87:085cde657901	540	__HAL_CRYP_ENABLE();
mbed_official	87:085cde657901	541
mbed_official	87:085cde657901	542	/* Get the timeout */
mbed_official	87:085cde657901	543	timeout = HAL_GetTick() + Timeout;
mbed_official	87:085cde657901	544
mbed_official	87:085cde657901	545	while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
mbed_official	87:085cde657901	546	{
mbed_official	87:085cde657901	547	/* Check for the Timeout */
mbed_official	87:085cde657901	548	if(Timeout != HAL_MAX_DELAY)
mbed_official	87:085cde657901	549	{
mbed_official	87:085cde657901	550	if(HAL_GetTick() >= timeout)
mbed_official	87:085cde657901	551	{
mbed_official	87:085cde657901	552	/* Change state */
mbed_official	87:085cde657901	553	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official	87:085cde657901	554
mbed_official	87:085cde657901	555	/* Process Unlocked */
mbed_official	87:085cde657901	556	__HAL_UNLOCK(hcryp);
mbed_official	87:085cde657901	557
mbed_official	87:085cde657901	558	return HAL_TIMEOUT;
mbed_official	87:085cde657901	559	}
mbed_official	87:085cde657901	560	}
mbed_official	87:085cde657901	561	}
mbed_official	87:085cde657901	562
mbed_official	87:085cde657901	563	/* Set the header phase */
mbed_official	87:085cde657901	564	if(CRYPEx_GCMCCM_SetHeaderPhase(hcryp, hcryp->Init.Header, hcryp->Init.HeaderSize, Timeout) != HAL_OK)
mbed_official	87:085cde657901	565	{
mbed_official	87:085cde657901	566	return HAL_TIMEOUT;
mbed_official	87:085cde657901	567	}
mbed_official	87:085cde657901	568	/* Disable the CRYP peripheral */
mbed_official	87:085cde657901	569	__HAL_CRYP_DISABLE();
mbed_official	87:085cde657901	570
mbed_official	87:085cde657901	571	/* Select payload phase once the header phase is performed */
mbed_official	87:085cde657901	572	__HAL_CRYP_SET_PHASE(CRYP_PHASE_PAYLOAD);
mbed_official	87:085cde657901	573
mbed_official	87:085cde657901	574	/* Enable the CRYP peripheral */
mbed_official	87:085cde657901	575	__HAL_CRYP_ENABLE();
mbed_official	87:085cde657901	576
mbed_official	87:085cde657901	577	/* Set the phase */
mbed_official	87:085cde657901	578	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
mbed_official	87:085cde657901	579	}
mbed_official	87:085cde657901	580
mbed_official	87:085cde657901	581	/* Write Plain Data and Get Cypher Data */
mbed_official	87:085cde657901	582	if(CRYPEx_GCMCCM_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
mbed_official	87:085cde657901	583	{
mbed_official	87:085cde657901	584	return HAL_TIMEOUT;
mbed_official	87:085cde657901	585	}
mbed_official	87:085cde657901	586
mbed_official	87:085cde657901	587	/* Change the CRYP peripheral state */
mbed_official	87:085cde657901	588	hcryp->State = HAL_CRYP_STATE_READY;
mbed_official	87:085cde657901	589
mbed_official	87:085cde657901	590	/* Process Unlocked */
mbed_official	87:085cde657901	591	__HAL_UNLOCK(hcryp);
mbed_official	87:085cde657901	592
mbed_official	87:085cde657901	593	/* Return function status */
mbed_official	87:085cde657901	594	return HAL_OK;
mbed_official	87:085cde657901	595	}
mbed_official	87:085cde657901	596
mbed_official	87:085cde657901	597	/**
mbed_official	87:085cde657901	598	* @brief Computes the authentication TAG.
mbed_official	87:085cde657901	599	* @param hcryp: CRYP handle
mbed_official	87:085cde657901	600	* @param Size: Total length of the plain/cyphertext buffer
mbed_official	87:085cde657901	601	* @param AuthTag: Pointer to the authentication buffer
mbed_official	87:085cde657901	602	* @param Timeout: Timeout duration
mbed_official	87:085cde657901	603	* @retval HAL status
mbed_official	87:085cde657901	604	*/
mbed_official	87:085cde657901	605	HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Finish(CRYP_HandleTypeDef hcryp, uint16_t Size, uint8_t AuthTag, uint32_t Timeout)
mbed_official	87:085cde657901	606	{
mbed_official	87:085cde657901	607	uint32_t timeout = 0;
mbed_official	87:085cde657901	608	uint32_t headerlength = hcryp->Init.HeaderSize * 8; /* Header length in bits */
mbed_official	87:085cde657901	609	uint32_t inputlength = Size * 8; /* input length in bits */
mbed_official	87:085cde657901	610	uint32_t tagaddr = (uint32_t)AuthTag;
mbed_official	87:085cde657901	611
mbed_official	87:085cde657901	612	/* Process Locked */
mbed_official	87:085cde657901	613	__HAL_LOCK(hcryp);
mbed_official	87:085cde657901	614
mbed_official	87:085cde657901	615	/* Change the CRYP peripheral state */
mbed_official	87:085cde657901	616	hcryp->State = HAL_CRYP_STATE_BUSY;
mbed_official	87:085cde657901	617
mbed_official	87:085cde657901	618	/* Check if initialization phase has already been performed */
mbed_official	87:085cde657901	619	if(hcryp->Phase == HAL_CRYP_PHASE_PROCESS)
mbed_official	87:085cde657901	620	{
mbed_official	87:085cde657901	621	/* Change the CRYP phase */
mbed_official	87:085cde657901	622	hcryp->Phase = HAL_CRYP_PHASE_FINAL;
mbed_official	87:085cde657901	623
mbed_official	87:085cde657901	624	/* Disable CRYP to start the final phase */
mbed_official	87:085cde657901	625	__HAL_CRYP_DISABLE();
mbed_official	87:085cde657901	626
mbed_official	87:085cde657901	627	/* Select final phase */
mbed_official	87:085cde657901	628	__HAL_CRYP_SET_PHASE(CRYP_PHASE_FINAL);
mbed_official	87:085cde657901	629
mbed_official	87:085cde657901	630	/* Enable the CRYP peripheral */
mbed_official	87:085cde657901	631	__HAL_CRYP_ENABLE();
mbed_official	87:085cde657901	632
mbed_official	87:085cde657901	633	/* Write the number of bits in header (64 bits) followed by the number of bits
mbed_official	87:085cde657901	634	in the payload */
mbed_official	87:085cde657901	635	if(hcryp->Init.DataType == CRYP_DATATYPE_1B)
mbed_official	87:085cde657901	636	{
mbed_official	87:085cde657901	637	CRYP->DR = 0;
mbed_official	87:085cde657901	638	CRYP->DR = __RBIT(headerlength);
mbed_official	87:085cde657901	639	CRYP->DR = 0;
mbed_official	87:085cde657901	640	CRYP->DR = __RBIT(inputlength);
mbed_official	87:085cde657901	641	}
mbed_official	87:085cde657901	642	else if(hcryp->Init.DataType == CRYP_DATATYPE_8B)
mbed_official	87:085cde657901	643	{
mbed_official	87:085cde657901	644	CRYP->DR = 0;
mbed_official	87:085cde657901	645	CRYP->DR = __REV(headerlength);
mbed_official	87:085cde657901	646	CRYP->DR = 0;
mbed_official	87:085cde657901	647	CRYP->DR = __REV(inputlength);
mbed_official	87:085cde657901	648	}
mbed_official	87:085cde657901	649	else if(hcryp->Init.DataType == CRYP_DATATYPE_16B)
mbed_official	87:085cde657901	650	{
mbed_official	87:085cde657901	651	CRYP->DR = 0;
mbed_official	87:085cde657901	652	CRYP->DR = __REV16(headerlength);
mbed_official	87:085cde657901	653	CRYP->DR = 0;
mbed_official	87:085cde657901	654	CRYP->DR = __REV16(inputlength);
mbed_official	87:085cde657901	655	}
mbed_official	87:085cde657901	656	else if(hcryp->Init.DataType == CRYP_DATATYPE_32B)
mbed_official	87:085cde657901	657	{
mbed_official	87:085cde657901	658	CRYP->DR = 0;
mbed_official	87:085cde657901	659	CRYP->DR = (uint32_t)(headerlength);
mbed_official	87:085cde657901	660	CRYP->DR = 0;
mbed_official	87:085cde657901	661	CRYP->DR = (uint32_t)(inputlength);
mbed_official	87:085cde657901	662	}
mbed_official	87:085cde657901	663	/* Get timeout */
mbed_official	87:085cde657901	664	timeout = HAL_GetTick() + Timeout;
mbed_official	87:085cde657901	665
mbed_official	87:085cde657901	666	while(HAL_IS_BIT_CLR(CRYP->SR, CRYP_FLAG_OFNE))
mbed_official	87:085cde657901	667	{
mbed_official	87:085cde657901	668	/* Check for the Timeout */
mbed_official	87:085cde657901	669	if(Timeout != HAL_MAX_DELAY)
mbed_official	87:085cde657901	670	{
mbed_official	87:085cde657901	671	if(HAL_GetTick() >= timeout)
mbed_official	87:085cde657901	672	{
mbed_official	87:085cde657901	673	/* Change state */
mbed_official	87:085cde657901	674	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official	87:085cde657901	675
mbed_official	87:085cde657901	676	/* Process Unlocked */
mbed_official	87:085cde657901	677	__HAL_UNLOCK(hcryp);
mbed_official	87:085cde657901	678
mbed_official	87:085cde657901	679	return HAL_TIMEOUT;
mbed_official	87:085cde657901	680	}
mbed_official	87:085cde657901	681	}
mbed_official	87:085cde657901	682	}
mbed_official	87:085cde657901	683
mbed_official	87:085cde657901	684	/* Read the Auth TAG in the IN FIFO */
mbed_official	87:085cde657901	685	(uint32_t)(tagaddr) = CRYP->DOUT;
mbed_official	87:085cde657901	686	tagaddr+=4;
mbed_official	87:085cde657901	687	(uint32_t)(tagaddr) = CRYP->DOUT;
mbed_official	87:085cde657901	688	tagaddr+=4;
mbed_official	87:085cde657901	689	(uint32_t)(tagaddr) = CRYP->DOUT;
mbed_official	87:085cde657901	690	tagaddr+=4;
mbed_official	87:085cde657901	691	(uint32_t)(tagaddr) = CRYP->DOUT;
mbed_official	87:085cde657901	692	}
mbed_official	87:085cde657901	693
mbed_official	87:085cde657901	694	/* Change the CRYP peripheral state */
mbed_official	87:085cde657901	695	hcryp->State = HAL_CRYP_STATE_READY;
mbed_official	87:085cde657901	696
mbed_official	87:085cde657901	697	/* Process Unlocked */
mbed_official	87:085cde657901	698	__HAL_UNLOCK(hcryp);
mbed_official	87:085cde657901	699
mbed_official	87:085cde657901	700	/* Return function status */
mbed_official	87:085cde657901	701	return HAL_OK;
mbed_official	87:085cde657901	702	}
mbed_official	87:085cde657901	703
mbed_official	87:085cde657901	704	/**
mbed_official	87:085cde657901	705	* @brief Computes the authentication TAG for AES CCM mode.
mbed_official	87:085cde657901	706	* @note This API is called after HAL_AES_CCM_Encrypt()/HAL_AES_CCM_Decrypt()
mbed_official	87:085cde657901	707	* @param hcryp: CRYP handle
mbed_official	87:085cde657901	708	* @param AuthTag: Pointer to the authentication buffer
mbed_official	87:085cde657901	709	* @param Timeout: Timeout duration
mbed_official	87:085cde657901	710	* @retval HAL status
mbed_official	87:085cde657901	711	*/
mbed_official	87:085cde657901	712	HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Finish(CRYP_HandleTypeDef hcryp, uint8_t AuthTag, uint32_t Timeout)
mbed_official	87:085cde657901	713	{
mbed_official	87:085cde657901	714	uint32_t timeout = 0;
mbed_official	87:085cde657901	715	uint32_t tagaddr = (uint32_t)AuthTag;
mbed_official	87:085cde657901	716	uint32_t ctraddr = (uint32_t)hcryp->Init.pScratch;
mbed_official	87:085cde657901	717	uint32_t temptag[4] = {0}; /* Temporary TAG (MAC) */
mbed_official	87:085cde657901	718	uint32_t loopcounter;
mbed_official	87:085cde657901	719
mbed_official	87:085cde657901	720	/* Process Locked */
mbed_official	87:085cde657901	721	__HAL_LOCK(hcryp);
mbed_official	87:085cde657901	722
mbed_official	87:085cde657901	723	/* Change the CRYP peripheral state */
mbed_official	87:085cde657901	724	hcryp->State = HAL_CRYP_STATE_BUSY;
mbed_official	87:085cde657901	725
mbed_official	87:085cde657901	726	/* Check if initialization phase has already been performed */
mbed_official	87:085cde657901	727	if(hcryp->Phase == HAL_CRYP_PHASE_PROCESS)
mbed_official	87:085cde657901	728	{
mbed_official	87:085cde657901	729	/* Change the CRYP phase */
mbed_official	87:085cde657901	730	hcryp->Phase = HAL_CRYP_PHASE_FINAL;
mbed_official	87:085cde657901	731
mbed_official	87:085cde657901	732	/* Disable CRYP to start the final phase */
mbed_official	87:085cde657901	733	__HAL_CRYP_DISABLE();
mbed_official	87:085cde657901	734
mbed_official	87:085cde657901	735	/* Select final phase */
mbed_official	87:085cde657901	736	__HAL_CRYP_SET_PHASE(CRYP_PHASE_FINAL);
mbed_official	87:085cde657901	737
mbed_official	87:085cde657901	738	/* Enable the CRYP peripheral */
mbed_official	87:085cde657901	739	__HAL_CRYP_ENABLE();
mbed_official	87:085cde657901	740
mbed_official	87:085cde657901	741	/* Write the counter block in the IN FIFO */
mbed_official	87:085cde657901	742	CRYP->DR = (uint32_t)ctraddr;
mbed_official	87:085cde657901	743	ctraddr+=4;
mbed_official	87:085cde657901	744	CRYP->DR = (uint32_t)ctraddr;
mbed_official	87:085cde657901	745	ctraddr+=4;
mbed_official	87:085cde657901	746	CRYP->DR = (uint32_t)ctraddr;
mbed_official	87:085cde657901	747	ctraddr+=4;
mbed_official	87:085cde657901	748	CRYP->DR = (uint32_t)ctraddr;
mbed_official	87:085cde657901	749
mbed_official	87:085cde657901	750	/* Get timeout */
mbed_official	87:085cde657901	751	timeout = HAL_GetTick() + Timeout;
mbed_official	87:085cde657901	752
mbed_official	87:085cde657901	753	while(HAL_IS_BIT_CLR(CRYP->SR, CRYP_FLAG_OFNE))
mbed_official	87:085cde657901	754	{
mbed_official	87:085cde657901	755	/* Check for the Timeout */
mbed_official	87:085cde657901	756	if(Timeout != HAL_MAX_DELAY)
mbed_official	87:085cde657901	757	{
mbed_official	87:085cde657901	758	if(HAL_GetTick() >= timeout)
mbed_official	87:085cde657901	759	{
mbed_official	87:085cde657901	760	/* Change state */
mbed_official	87:085cde657901	761	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official	87:085cde657901	762
mbed_official	87:085cde657901	763	/* Process Unlocked */
mbed_official	87:085cde657901	764	__HAL_UNLOCK(hcryp);
mbed_official	87:085cde657901	765
mbed_official	87:085cde657901	766	return HAL_TIMEOUT;
mbed_official	87:085cde657901	767	}
mbed_official	87:085cde657901	768	}
mbed_official	87:085cde657901	769	}
mbed_official	87:085cde657901	770
mbed_official	87:085cde657901	771	/* Read the Auth TAG in the IN FIFO */
mbed_official	87:085cde657901	772	temptag[0] = CRYP->DOUT;
mbed_official	87:085cde657901	773	temptag[1] = CRYP->DOUT;
mbed_official	87:085cde657901	774	temptag[2] = CRYP->DOUT;
mbed_official	87:085cde657901	775	temptag[3] = CRYP->DOUT;
mbed_official	87:085cde657901	776	}
mbed_official	87:085cde657901	777
mbed_official	87:085cde657901	778	/* Copy temporary authentication TAG in user TAG buffer */
mbed_official	87:085cde657901	779	for(loopcounter = 0; loopcounter < hcryp->Init.TagSize ; loopcounter++)
mbed_official	87:085cde657901	780	{
mbed_official	87:085cde657901	781	/* Set the authentication TAG buffer */
mbed_official	87:085cde657901	782	((uint8_t)tagaddr+loopcounter) = ((uint8_t)temptag+loopcounter);
mbed_official	87:085cde657901	783	}
mbed_official	87:085cde657901	784
mbed_official	87:085cde657901	785	/* Change the CRYP peripheral state */
mbed_official	87:085cde657901	786	hcryp->State = HAL_CRYP_STATE_READY;
mbed_official	87:085cde657901	787
mbed_official	87:085cde657901	788	/* Process Unlocked */
mbed_official	87:085cde657901	789	__HAL_UNLOCK(hcryp);
mbed_official	87:085cde657901	790
mbed_official	87:085cde657901	791	/* Return function status */
mbed_official	87:085cde657901	792	return HAL_OK;
mbed_official	87:085cde657901	793	}
mbed_official	87:085cde657901	794
mbed_official	87:085cde657901	795	/**
mbed_official	87:085cde657901	796	* @brief Initializes the CRYP peripheral in AES CCM decryption mode then
mbed_official	87:085cde657901	797	* decrypted pCypherData. The cypher data are available in pPlainData.
mbed_official	87:085cde657901	798	* @param hcryp: CRYP handle
mbed_official	87:085cde657901	799	* @param pPlainData: Pointer to the plaintext buffer
mbed_official	87:085cde657901	800	* @param Size: Length of the plaintext buffer, must be a multiple of 16
mbed_official	87:085cde657901	801	* @param pCypherData: Pointer to the cyphertext buffer
mbed_official	87:085cde657901	802	* @param Timeout: Timeout duration
mbed_official	87:085cde657901	803	* @retval HAL status
mbed_official	87:085cde657901	804	*/
mbed_official	87:085cde657901	805	HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Decrypt(CRYP_HandleTypeDef hcryp, uint8_t pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
mbed_official	87:085cde657901	806	{
mbed_official	87:085cde657901	807	uint32_t timeout = 0;
mbed_official	87:085cde657901	808	uint32_t headersize = hcryp->Init.HeaderSize;
mbed_official	87:085cde657901	809	uint32_t headeraddr = (uint32_t)hcryp->Init.Header;
mbed_official	87:085cde657901	810	uint32_t loopcounter = 0;
mbed_official	87:085cde657901	811	uint32_t bufferidx = 0;
mbed_official	87:085cde657901	812	uint8_t blockb0[16] = {0};/* Block B0 */
mbed_official	87:085cde657901	813	uint8_t ctr[16] = {0}; /* Counter */
mbed_official	87:085cde657901	814	uint32_t b0addr = (uint32_t)blockb0;
mbed_official	87:085cde657901	815
mbed_official	87:085cde657901	816	/* Process Locked */
mbed_official	87:085cde657901	817	__HAL_LOCK(hcryp);
mbed_official	87:085cde657901	818
mbed_official	87:085cde657901	819	/* Change the CRYP peripheral state */
mbed_official	87:085cde657901	820	hcryp->State = HAL_CRYP_STATE_BUSY;
mbed_official	87:085cde657901	821
mbed_official	87:085cde657901	822	/* Check if initialization phase has already been performed */
mbed_official	87:085cde657901	823	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
mbed_official	87:085cde657901	824	{
mbed_official	87:085cde657901	825	/********************** Formatting the header block *******************/
mbed_official	87:085cde657901	826	if(headersize != 0)
mbed_official	87:085cde657901	827	{
mbed_official	87:085cde657901	828	/* Check that the associated data (or header) length is lower than 2^16 - 2^8 = 65536 - 256 = 65280 */
mbed_official	87:085cde657901	829	if(headersize < 65280)
mbed_official	87:085cde657901	830	{
mbed_official	87:085cde657901	831	hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize >> 8) & 0xFF);
mbed_official	87:085cde657901	832	hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize) & 0xFF);
mbed_official	87:085cde657901	833	headersize += 2;
mbed_official	87:085cde657901	834	}
mbed_official	87:085cde657901	835	else
mbed_official	87:085cde657901	836	{
mbed_official	87:085cde657901	837	/* Header is encoded as 0xff \|\| 0xfe \|\| [headersize]32, i.e., six octets */
mbed_official	87:085cde657901	838	hcryp->Init.pScratch[bufferidx++] = 0xFF;
mbed_official	87:085cde657901	839	hcryp->Init.pScratch[bufferidx++] = 0xFE;
mbed_official	87:085cde657901	840	hcryp->Init.pScratch[bufferidx++] = headersize & 0xff000000;
mbed_official	87:085cde657901	841	hcryp->Init.pScratch[bufferidx++] = headersize & 0x00ff0000;
mbed_official	87:085cde657901	842	hcryp->Init.pScratch[bufferidx++] = headersize & 0x0000ff00;
mbed_official	87:085cde657901	843	hcryp->Init.pScratch[bufferidx++] = headersize & 0x000000ff;
mbed_official	87:085cde657901	844	headersize += 6;
mbed_official	87:085cde657901	845	}
mbed_official	87:085cde657901	846	/* Copy the header buffer in internal buffer "hcryp->Init.pScratch" */
mbed_official	87:085cde657901	847	for(loopcounter = 0; loopcounter < headersize; loopcounter++)
mbed_official	87:085cde657901	848	{
mbed_official	87:085cde657901	849	hcryp->Init.pScratch[bufferidx++] = hcryp->Init.Header[loopcounter];
mbed_official	87:085cde657901	850	}
mbed_official	87:085cde657901	851	/* Check if the header size is modulo 16 */
mbed_official	87:085cde657901	852	if ((headersize % 16) != 0)
mbed_official	87:085cde657901	853	{
mbed_official	87:085cde657901	854	/* Padd the header buffer with 0s till the hcryp->Init.pScratch length is modulo 16 */
mbed_official	87:085cde657901	855	for(loopcounter = headersize; loopcounter <= ((headersize/16) + 1) * 16; loopcounter++)
mbed_official	87:085cde657901	856	{
mbed_official	87:085cde657901	857	hcryp->Init.pScratch[loopcounter] = 0;
mbed_official	87:085cde657901	858	}
mbed_official	87:085cde657901	859	/* Set the header size to modulo 16 */
mbed_official	87:085cde657901	860	headersize = ((headersize/16) + 1) * 16;
mbed_official	87:085cde657901	861	}
mbed_official	87:085cde657901	862	/* Set the pointer headeraddr to hcryp->Init.pScratch */
mbed_official	87:085cde657901	863	headeraddr = (uint32_t)hcryp->Init.pScratch;
mbed_official	87:085cde657901	864	}
mbed_official	87:085cde657901	865	/********************* Formatting the block B0 ************************/
mbed_official	87:085cde657901	866	if(headersize != 0)
mbed_official	87:085cde657901	867	{
mbed_official	87:085cde657901	868	blockb0[0] = 0x40;
mbed_official	87:085cde657901	869	}
mbed_official	87:085cde657901	870	/* Flags byte */
mbed_official	87:085cde657901	871	/* blockb0[0] \|= 0u \| (((( (uint8_t) hcryp->Init.TagSize - 2) / 2) & 0x07 ) << 3 ) \| ( ( (uint8_t) (15 - hcryp->Init.IVSize) - 1) & 0x07) */
mbed_official	87:085cde657901	872	blockb0[0] \|= (uint8_t)((uint8_t)((uint8_t)(((uint8_t)(hcryp->Init.TagSize - (uint8_t)(2))) >> 1) & (uint8_t)0x07 ) << 3);
mbed_official	87:085cde657901	873	blockb0[0] \|= (uint8_t)((uint8_t)((uint8_t)((uint8_t)(15) - hcryp->Init.IVSize) - (uint8_t)1) & (uint8_t)0x07);
mbed_official	87:085cde657901	874
mbed_official	87:085cde657901	875	for (loopcounter = 0; loopcounter < hcryp->Init.IVSize; loopcounter++)
mbed_official	87:085cde657901	876	{
mbed_official	87:085cde657901	877	blockb0[loopcounter+1] = hcryp->Init.pInitVect[loopcounter];
mbed_official	87:085cde657901	878	}
mbed_official	87:085cde657901	879	for ( ; loopcounter < 13; loopcounter++)
mbed_official	87:085cde657901	880	{
mbed_official	87:085cde657901	881	blockb0[loopcounter+1] = 0;
mbed_official	87:085cde657901	882	}
mbed_official	87:085cde657901	883
mbed_official	87:085cde657901	884	blockb0[14] = (Size >> 8);
mbed_official	87:085cde657901	885	blockb0[15] = (Size & 0xFF);
mbed_official	87:085cde657901	886
mbed_official	87:085cde657901	887	/*********************** Formatting the initial counter ***************/
mbed_official	87:085cde657901	888	/* Byte 0:
mbed_official	87:085cde657901	889	Bits 7 and 6 are reserved and shall be set to 0
mbed_official	87:085cde657901	890	Bits 3, 4, and 5 shall also be set to 0, to ensure that all the counter
mbed_official	87:085cde657901	891	blocks are distinct from B0
mbed_official	87:085cde657901	892	Bits 0, 1, and 2 contain the same encoding of q as in B0
mbed_official	87:085cde657901	893	*/
mbed_official	87:085cde657901	894	ctr[0] = blockb0[0] & 0x07;
mbed_official	87:085cde657901	895	/* byte 1 to NonceSize is the IV (Nonce) */
mbed_official	87:085cde657901	896	for(loopcounter = 1; loopcounter < hcryp->Init.IVSize + 1; loopcounter++)
mbed_official	87:085cde657901	897	{
mbed_official	87:085cde657901	898	ctr[loopcounter] = blockb0[loopcounter];
mbed_official	87:085cde657901	899	}
mbed_official	87:085cde657901	900	/* Set the LSB to 1 */
mbed_official	87:085cde657901	901	ctr[15] \|= 0x01;
mbed_official	87:085cde657901	902
mbed_official	87:085cde657901	903	/* Set the key */
mbed_official	87:085cde657901	904	CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
mbed_official	87:085cde657901	905
mbed_official	87:085cde657901	906	/* Set the CRYP peripheral in AES CCM mode */
mbed_official	87:085cde657901	907	__HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CCM_DECRYPT);
mbed_official	87:085cde657901	908
mbed_official	87:085cde657901	909	/* Set the Initialization Vector */
mbed_official	87:085cde657901	910	CRYPEx_GCMCCM_SetInitVector(hcryp, ctr, CRYP_KEYSIZE_128B);
mbed_official	87:085cde657901	911
mbed_official	87:085cde657901	912	/* Select init phase */
mbed_official	87:085cde657901	913	__HAL_CRYP_SET_PHASE(CRYP_PHASE_INIT);
mbed_official	87:085cde657901	914
mbed_official	87:085cde657901	915	b0addr = (uint32_t)blockb0;
mbed_official	87:085cde657901	916	/* Write the blockb0 block in the IN FIFO */
mbed_official	87:085cde657901	917	CRYP->DR = (uint32_t)(b0addr);
mbed_official	87:085cde657901	918	b0addr+=4;
mbed_official	87:085cde657901	919	CRYP->DR = (uint32_t)(b0addr);
mbed_official	87:085cde657901	920	b0addr+=4;
mbed_official	87:085cde657901	921	CRYP->DR = (uint32_t)(b0addr);
mbed_official	87:085cde657901	922	b0addr+=4;
mbed_official	87:085cde657901	923	CRYP->DR = (uint32_t)(b0addr);
mbed_official	87:085cde657901	924
mbed_official	87:085cde657901	925	/* Enable the CRYP peripheral */
mbed_official	87:085cde657901	926	__HAL_CRYP_ENABLE();
mbed_official	87:085cde657901	927
mbed_official	87:085cde657901	928	/* Get timeout */
mbed_official	87:085cde657901	929	timeout = HAL_GetTick() + Timeout;
mbed_official	87:085cde657901	930
mbed_official	87:085cde657901	931	while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
mbed_official	87:085cde657901	932	{
mbed_official	87:085cde657901	933	/* Check for the Timeout */
mbed_official	87:085cde657901	934	if(Timeout != HAL_MAX_DELAY)
mbed_official	87:085cde657901	935	{
mbed_official	87:085cde657901	936	if(HAL_GetTick() >= timeout)
mbed_official	87:085cde657901	937	{
mbed_official	87:085cde657901	938	/* Change state */
mbed_official	87:085cde657901	939	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official	87:085cde657901	940
mbed_official	87:085cde657901	941	/* Process Unlocked */
mbed_official	87:085cde657901	942	__HAL_UNLOCK(hcryp);
mbed_official	87:085cde657901	943
mbed_official	87:085cde657901	944	return HAL_TIMEOUT;
mbed_official	87:085cde657901	945	}
mbed_official	87:085cde657901	946	}
mbed_official	87:085cde657901	947	}
mbed_official	87:085cde657901	948	/*************************** Header phase *****************************/
mbed_official	87:085cde657901	949	if(headersize != 0)
mbed_official	87:085cde657901	950	{
mbed_official	87:085cde657901	951	/* Select header phase */
mbed_official	87:085cde657901	952	__HAL_CRYP_SET_PHASE(CRYP_PHASE_HEADER);
mbed_official	87:085cde657901	953
mbed_official	87:085cde657901	954	/* Enable Crypto processor */
mbed_official	87:085cde657901	955	__HAL_CRYP_ENABLE();
mbed_official	87:085cde657901	956
mbed_official	87:085cde657901	957	for(loopcounter = 0; (loopcounter < headersize); loopcounter+=16)
mbed_official	87:085cde657901	958	{
mbed_official	87:085cde657901	959	/* Get timeout */
mbed_official	87:085cde657901	960	timeout = HAL_GetTick() + Timeout;
mbed_official	87:085cde657901	961
mbed_official	87:085cde657901	962	while(HAL_IS_BIT_CLR(CRYP->SR, CRYP_FLAG_IFEM))
mbed_official	87:085cde657901	963	{
mbed_official	87:085cde657901	964	/* Check for the Timeout */
mbed_official	87:085cde657901	965	if(Timeout != HAL_MAX_DELAY)
mbed_official	87:085cde657901	966	{
mbed_official	87:085cde657901	967	if(HAL_GetTick() >= timeout)
mbed_official	87:085cde657901	968	{
mbed_official	87:085cde657901	969	/* Change state */
mbed_official	87:085cde657901	970	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official	87:085cde657901	971
mbed_official	87:085cde657901	972	/* Process Unlocked */
mbed_official	87:085cde657901	973	__HAL_UNLOCK(hcryp);
mbed_official	87:085cde657901	974
mbed_official	87:085cde657901	975	return HAL_TIMEOUT;
mbed_official	87:085cde657901	976	}
mbed_official	87:085cde657901	977	}
mbed_official	87:085cde657901	978	}
mbed_official	87:085cde657901	979	/* Write the header block in the IN FIFO */
mbed_official	87:085cde657901	980	CRYP->DR = (uint32_t)(headeraddr);
mbed_official	87:085cde657901	981	headeraddr+=4;
mbed_official	87:085cde657901	982	CRYP->DR = (uint32_t)(headeraddr);
mbed_official	87:085cde657901	983	headeraddr+=4;
mbed_official	87:085cde657901	984	CRYP->DR = (uint32_t)(headeraddr);
mbed_official	87:085cde657901	985	headeraddr+=4;
mbed_official	87:085cde657901	986	CRYP->DR = (uint32_t)(headeraddr);
mbed_official	87:085cde657901	987	headeraddr+=4;
mbed_official	87:085cde657901	988	}
mbed_official	87:085cde657901	989
mbed_official	87:085cde657901	990	/* Get timeout */
mbed_official	87:085cde657901	991	timeout = HAL_GetTick() + Timeout;
mbed_official	87:085cde657901	992
mbed_official	87:085cde657901	993	while((CRYP->SR & CRYP_FLAG_BUSY) == CRYP_FLAG_BUSY)
mbed_official	87:085cde657901	994	{
mbed_official	87:085cde657901	995	/* Check for the Timeout */
mbed_official	87:085cde657901	996	if(Timeout != HAL_MAX_DELAY)
mbed_official	87:085cde657901	997	{
mbed_official	87:085cde657901	998	if(HAL_GetTick() >= timeout)
mbed_official	87:085cde657901	999	{
mbed_official	87:085cde657901	1000	/* Change state */
mbed_official	87:085cde657901	1001	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official	87:085cde657901	1002
mbed_official	87:085cde657901	1003	/* Process Unlocked */
mbed_official	87:085cde657901	1004	__HAL_UNLOCK(hcryp);
mbed_official	87:085cde657901	1005
mbed_official	87:085cde657901	1006	return HAL_TIMEOUT;
mbed_official	87:085cde657901	1007	}
mbed_official	87:085cde657901	1008	}
mbed_official	87:085cde657901	1009	}
mbed_official	87:085cde657901	1010	}
mbed_official	87:085cde657901	1011	/* Save formatted counter into the scratch buffer pScratch */
mbed_official	87:085cde657901	1012	for(loopcounter = 0; (loopcounter < 16); loopcounter++)
mbed_official	87:085cde657901	1013	{
mbed_official	87:085cde657901	1014	hcryp->Init.pScratch[loopcounter] = ctr[loopcounter];
mbed_official	87:085cde657901	1015	}
mbed_official	87:085cde657901	1016	/* Reset bit 0 */
mbed_official	87:085cde657901	1017	hcryp->Init.pScratch[15] &= 0xfe;
mbed_official	87:085cde657901	1018	/* Select payload phase once the header phase is performed */
mbed_official	87:085cde657901	1019	__HAL_CRYP_SET_PHASE(CRYP_PHASE_PAYLOAD);
mbed_official	87:085cde657901	1020
mbed_official	87:085cde657901	1021	/* Flush FIFO */
mbed_official	87:085cde657901	1022	__HAL_CRYP_FIFO_FLUSH();
mbed_official	87:085cde657901	1023
mbed_official	87:085cde657901	1024	/* Enable the CRYP peripheral */
mbed_official	87:085cde657901	1025	__HAL_CRYP_ENABLE();
mbed_official	87:085cde657901	1026
mbed_official	87:085cde657901	1027	/* Set the phase */
mbed_official	87:085cde657901	1028	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
mbed_official	87:085cde657901	1029	}
mbed_official	87:085cde657901	1030
mbed_official	87:085cde657901	1031	/* Write Plain Data and Get Cypher Data */
mbed_official	87:085cde657901	1032	if(CRYPEx_GCMCCM_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
mbed_official	87:085cde657901	1033	{
mbed_official	87:085cde657901	1034	return HAL_TIMEOUT;
mbed_official	87:085cde657901	1035	}
mbed_official	87:085cde657901	1036
mbed_official	87:085cde657901	1037	/* Change the CRYP peripheral state */
mbed_official	87:085cde657901	1038	hcryp->State = HAL_CRYP_STATE_READY;
mbed_official	87:085cde657901	1039
mbed_official	87:085cde657901	1040	/* Process Unlocked */
mbed_official	87:085cde657901	1041	__HAL_UNLOCK(hcryp);
mbed_official	87:085cde657901	1042
mbed_official	87:085cde657901	1043	/* Return function status */
mbed_official	87:085cde657901	1044	return HAL_OK;
mbed_official	87:085cde657901	1045	}
mbed_official	87:085cde657901	1046
mbed_official	87:085cde657901	1047	/**
mbed_official	87:085cde657901	1048	* @brief Initializes the CRYP peripheral in AES GCM encryption mode using IT.
mbed_official	87:085cde657901	1049	* @param hcryp: CRYP handle
mbed_official	87:085cde657901	1050	* @param pPlainData: Pointer to the plaintext buffer
mbed_official	87:085cde657901	1051	* @param Size: Length of the plaintext buffer, must be a multiple of 16
mbed_official	87:085cde657901	1052	* @param pCypherData: Pointer to the cyphertext buffer
mbed_official	87:085cde657901	1053	* @retval HAL status
mbed_official	87:085cde657901	1054	*/
mbed_official	87:085cde657901	1055	HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Encrypt_IT(CRYP_HandleTypeDef hcryp, uint8_t pPlainData, uint16_t Size, uint8_t *pCypherData)
mbed_official	87:085cde657901	1056	{
mbed_official	87:085cde657901	1057	uint32_t timeout = 0;
mbed_official	87:085cde657901	1058	uint32_t inputaddr;
mbed_official	87:085cde657901	1059	uint32_t outputaddr;
mbed_official	87:085cde657901	1060
mbed_official	87:085cde657901	1061	if(hcryp->State == HAL_CRYP_STATE_READY)
mbed_official	87:085cde657901	1062	{
mbed_official	87:085cde657901	1063	/* Process Locked */
mbed_official	87:085cde657901	1064	__HAL_LOCK(hcryp);
mbed_official	87:085cde657901	1065
mbed_official	87:085cde657901	1066	/* Get the buffer addresses and sizes */
mbed_official	87:085cde657901	1067	hcryp->CrypInCount = Size;
mbed_official	87:085cde657901	1068	hcryp->pCrypInBuffPtr = pPlainData;
mbed_official	87:085cde657901	1069	hcryp->pCrypOutBuffPtr = pCypherData;
mbed_official	87:085cde657901	1070	hcryp->CrypOutCount = Size;
mbed_official	87:085cde657901	1071
mbed_official	87:085cde657901	1072	/* Change the CRYP peripheral state */
mbed_official	87:085cde657901	1073	hcryp->State = HAL_CRYP_STATE_BUSY;
mbed_official	87:085cde657901	1074
mbed_official	87:085cde657901	1075	/* Check if initialization phase has already been performed */
mbed_official	87:085cde657901	1076	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
mbed_official	87:085cde657901	1077	{
mbed_official	87:085cde657901	1078	/* Set the key */
mbed_official	87:085cde657901	1079	CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
mbed_official	87:085cde657901	1080
mbed_official	87:085cde657901	1081	/* Set the CRYP peripheral in AES GCM mode */
mbed_official	87:085cde657901	1082	__HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_GCM_ENCRYPT);
mbed_official	87:085cde657901	1083
mbed_official	87:085cde657901	1084	/* Set the Initialization Vector */
mbed_official	87:085cde657901	1085	CRYPEx_GCMCCM_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
mbed_official	87:085cde657901	1086
mbed_official	87:085cde657901	1087	/* Flush FIFO */
mbed_official	87:085cde657901	1088	__HAL_CRYP_FIFO_FLUSH();
mbed_official	87:085cde657901	1089
mbed_official	87:085cde657901	1090	/* Enable CRYP to start the init phase */
mbed_official	87:085cde657901	1091	__HAL_CRYP_ENABLE();
mbed_official	87:085cde657901	1092
mbed_official	87:085cde657901	1093	/* Get timeout */
mbed_official	87:085cde657901	1094	timeout = HAL_GetTick() + 1;
mbed_official	87:085cde657901	1095
mbed_official	87:085cde657901	1096	while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
mbed_official	87:085cde657901	1097	{
mbed_official	87:085cde657901	1098	/* Check for the Timeout */
mbed_official	87:085cde657901	1099
mbed_official	87:085cde657901	1100	if(HAL_GetTick() >= timeout)
mbed_official	87:085cde657901	1101	{
mbed_official	87:085cde657901	1102	/* Change state */
mbed_official	87:085cde657901	1103	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official	87:085cde657901	1104
mbed_official	87:085cde657901	1105	/* Process Unlocked */
mbed_official	87:085cde657901	1106	__HAL_UNLOCK(hcryp);
mbed_official	87:085cde657901	1107
mbed_official	87:085cde657901	1108	return HAL_TIMEOUT;
mbed_official	87:085cde657901	1109
mbed_official	87:085cde657901	1110	}
mbed_official	87:085cde657901	1111	}
mbed_official	87:085cde657901	1112
mbed_official	87:085cde657901	1113	/* Set the header phase */
mbed_official	87:085cde657901	1114	if(CRYPEx_GCMCCM_SetHeaderPhase(hcryp, hcryp->Init.Header, hcryp->Init.HeaderSize, 1) != HAL_OK)
mbed_official	87:085cde657901	1115	{
mbed_official	87:085cde657901	1116	return HAL_TIMEOUT;
mbed_official	87:085cde657901	1117	}
mbed_official	87:085cde657901	1118	/* Disable the CRYP peripheral */
mbed_official	87:085cde657901	1119	__HAL_CRYP_DISABLE();
mbed_official	87:085cde657901	1120
mbed_official	87:085cde657901	1121	/* Select payload phase once the header phase is performed */
mbed_official	87:085cde657901	1122	__HAL_CRYP_SET_PHASE(CRYP_PHASE_PAYLOAD);
mbed_official	87:085cde657901	1123
mbed_official	87:085cde657901	1124	/* Flush FIFO */
mbed_official	87:085cde657901	1125	__HAL_CRYP_FIFO_FLUSH();
mbed_official	87:085cde657901	1126
mbed_official	87:085cde657901	1127	/* Set the phase */
mbed_official	87:085cde657901	1128	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
mbed_official	87:085cde657901	1129	}
mbed_official	87:085cde657901	1130
mbed_official	87:085cde657901	1131	if(Size != 0)
mbed_official	87:085cde657901	1132	{
mbed_official	87:085cde657901	1133	/* Enable Interrupts */
mbed_official	87:085cde657901	1134	__HAL_CRYP_ENABLE_IT(CRYP_IT_INI \| CRYP_IT_OUTI);
mbed_official	87:085cde657901	1135	/* Enable the CRYP peripheral */
mbed_official	87:085cde657901	1136	__HAL_CRYP_ENABLE();
mbed_official	87:085cde657901	1137	}
mbed_official	87:085cde657901	1138	else
mbed_official	87:085cde657901	1139	{
mbed_official	87:085cde657901	1140	/* Process Locked */
mbed_official	87:085cde657901	1141	__HAL_UNLOCK(hcryp);
mbed_official	87:085cde657901	1142	/* Change the CRYP state and phase */
mbed_official	87:085cde657901	1143	hcryp->State = HAL_CRYP_STATE_READY;
mbed_official	87:085cde657901	1144	}
mbed_official	87:085cde657901	1145	/* Return function status */
mbed_official	87:085cde657901	1146	return HAL_OK;
mbed_official	87:085cde657901	1147	}
mbed_official	87:085cde657901	1148	else if (__HAL_CRYP_GET_IT(CRYP_IT_INI))
mbed_official	87:085cde657901	1149	{
mbed_official	87:085cde657901	1150	inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
mbed_official	87:085cde657901	1151	/* Write the Input block in the IN FIFO */
mbed_official	87:085cde657901	1152	CRYP->DR = (uint32_t)(inputaddr);
mbed_official	87:085cde657901	1153	inputaddr+=4;
mbed_official	87:085cde657901	1154	CRYP->DR = (uint32_t)(inputaddr);
mbed_official	87:085cde657901	1155	inputaddr+=4;
mbed_official	87:085cde657901	1156	CRYP->DR = (uint32_t)(inputaddr);
mbed_official	87:085cde657901	1157	inputaddr+=4;
mbed_official	87:085cde657901	1158	CRYP->DR = (uint32_t)(inputaddr);
mbed_official	87:085cde657901	1159	hcryp->pCrypInBuffPtr += 16;
mbed_official	87:085cde657901	1160	hcryp->CrypInCount -= 16;
mbed_official	87:085cde657901	1161	if(hcryp->CrypInCount == 0)
mbed_official	87:085cde657901	1162	{
mbed_official	87:085cde657901	1163	__HAL_CRYP_DISABLE_IT(CRYP_IT_INI);
mbed_official	87:085cde657901	1164	/* Call the Input data transfer complete callback */
mbed_official	87:085cde657901	1165	HAL_CRYP_InCpltCallback(hcryp);
mbed_official	87:085cde657901	1166	}
mbed_official	87:085cde657901	1167	}
mbed_official	87:085cde657901	1168	else if (__HAL_CRYP_GET_IT(CRYP_IT_OUTI))
mbed_official	87:085cde657901	1169	{
mbed_official	87:085cde657901	1170	outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
mbed_official	87:085cde657901	1171	/* Read the Output block from the Output FIFO */
mbed_official	87:085cde657901	1172	(uint32_t)(outputaddr) = CRYP->DOUT;
mbed_official	87:085cde657901	1173	outputaddr+=4;
mbed_official	87:085cde657901	1174	(uint32_t)(outputaddr) = CRYP->DOUT;
mbed_official	87:085cde657901	1175	outputaddr+=4;
mbed_official	87:085cde657901	1176	(uint32_t)(outputaddr) = CRYP->DOUT;
mbed_official	87:085cde657901	1177	outputaddr+=4;
mbed_official	87:085cde657901	1178	(uint32_t)(outputaddr) = CRYP->DOUT;
mbed_official	87:085cde657901	1179	hcryp->pCrypOutBuffPtr += 16;
mbed_official	87:085cde657901	1180	hcryp->CrypOutCount -= 16;
mbed_official	87:085cde657901	1181	if(hcryp->CrypOutCount == 0)
mbed_official	87:085cde657901	1182	{
mbed_official	87:085cde657901	1183	__HAL_CRYP_DISABLE_IT(CRYP_IT_OUTI);
mbed_official	87:085cde657901	1184	/* Process Unlocked */
mbed_official	87:085cde657901	1185	__HAL_UNLOCK(hcryp);
mbed_official	87:085cde657901	1186	/* Change the CRYP peripheral state */
mbed_official	87:085cde657901	1187	hcryp->State = HAL_CRYP_STATE_READY;
mbed_official	87:085cde657901	1188	/* Call Input transfer complete callback */
mbed_official	87:085cde657901	1189	HAL_CRYP_OutCpltCallback(hcryp);
mbed_official	87:085cde657901	1190	}
mbed_official	87:085cde657901	1191	}
mbed_official	87:085cde657901	1192
mbed_official	87:085cde657901	1193	/* Return function status */
mbed_official	87:085cde657901	1194	return HAL_OK;
mbed_official	87:085cde657901	1195	}
mbed_official	87:085cde657901	1196
mbed_official	87:085cde657901	1197	/**
mbed_official	87:085cde657901	1198	* @brief Initializes the CRYP peripheral in AES CCM encryption mode using interrupt.
mbed_official	87:085cde657901	1199	* @param hcryp: CRYP handle
mbed_official	87:085cde657901	1200	* @param pPlainData: Pointer to the plaintext buffer
mbed_official	87:085cde657901	1201	* @param Size: Length of the plaintext buffer, must be a multiple of 16
mbed_official	87:085cde657901	1202	* @param pCypherData: Pointer to the cyphertext buffer
mbed_official	87:085cde657901	1203	* @retval HAL status
mbed_official	87:085cde657901	1204	*/
mbed_official	87:085cde657901	1205	HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Encrypt_IT(CRYP_HandleTypeDef hcryp, uint8_t pPlainData, uint16_t Size, uint8_t *pCypherData)
mbed_official	87:085cde657901	1206	{
mbed_official	87:085cde657901	1207	uint32_t timeout = 0;
mbed_official	87:085cde657901	1208	uint32_t inputaddr;
mbed_official	87:085cde657901	1209	uint32_t outputaddr;
mbed_official	87:085cde657901	1210
mbed_official	87:085cde657901	1211	uint32_t headersize = hcryp->Init.HeaderSize;
mbed_official	87:085cde657901	1212	uint32_t headeraddr = (uint32_t)hcryp->Init.Header;
mbed_official	87:085cde657901	1213	uint32_t loopcounter = 0;
mbed_official	87:085cde657901	1214	uint32_t bufferidx = 0;
mbed_official	87:085cde657901	1215	uint8_t blockb0[16] = {0};/* Block B0 */
mbed_official	87:085cde657901	1216	uint8_t ctr[16] = {0}; /* Counter */
mbed_official	87:085cde657901	1217	uint32_t b0addr = (uint32_t)blockb0;
mbed_official	87:085cde657901	1218
mbed_official	87:085cde657901	1219	if(hcryp->State == HAL_CRYP_STATE_READY)
mbed_official	87:085cde657901	1220	{
mbed_official	87:085cde657901	1221	/* Process Locked */
mbed_official	87:085cde657901	1222	__HAL_LOCK(hcryp);
mbed_official	87:085cde657901	1223
mbed_official	87:085cde657901	1224	hcryp->CrypInCount = Size;
mbed_official	87:085cde657901	1225	hcryp->pCrypInBuffPtr = pPlainData;
mbed_official	87:085cde657901	1226	hcryp->pCrypOutBuffPtr = pCypherData;
mbed_official	87:085cde657901	1227	hcryp->CrypOutCount = Size;
mbed_official	87:085cde657901	1228
mbed_official	87:085cde657901	1229	/* Change the CRYP peripheral state */
mbed_official	87:085cde657901	1230	hcryp->State = HAL_CRYP_STATE_BUSY;
mbed_official	87:085cde657901	1231
mbed_official	87:085cde657901	1232	/* Check if initialization phase has already been performed */
mbed_official	87:085cde657901	1233	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
mbed_official	87:085cde657901	1234	{
mbed_official	87:085cde657901	1235	/********************** Formatting the header block *****************/
mbed_official	87:085cde657901	1236	if(headersize != 0)
mbed_official	87:085cde657901	1237	{
mbed_official	87:085cde657901	1238	/* Check that the associated data (or header) length is lower than 2^16 - 2^8 = 65536 - 256 = 65280 */
mbed_official	87:085cde657901	1239	if(headersize < 65280)
mbed_official	87:085cde657901	1240	{
mbed_official	87:085cde657901	1241	hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize >> 8) & 0xFF);
mbed_official	87:085cde657901	1242	hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize) & 0xFF);
mbed_official	87:085cde657901	1243	headersize += 2;
mbed_official	87:085cde657901	1244	}
mbed_official	87:085cde657901	1245	else
mbed_official	87:085cde657901	1246	{
mbed_official	87:085cde657901	1247	/* Header is encoded as 0xff \|\| 0xfe \|\| [headersize]32, i.e., six octets */
mbed_official	87:085cde657901	1248	hcryp->Init.pScratch[bufferidx++] = 0xFF;
mbed_official	87:085cde657901	1249	hcryp->Init.pScratch[bufferidx++] = 0xFE;
mbed_official	87:085cde657901	1250	hcryp->Init.pScratch[bufferidx++] = headersize & 0xff000000;
mbed_official	87:085cde657901	1251	hcryp->Init.pScratch[bufferidx++] = headersize & 0x00ff0000;
mbed_official	87:085cde657901	1252	hcryp->Init.pScratch[bufferidx++] = headersize & 0x0000ff00;
mbed_official	87:085cde657901	1253	hcryp->Init.pScratch[bufferidx++] = headersize & 0x000000ff;
mbed_official	87:085cde657901	1254	headersize += 6;
mbed_official	87:085cde657901	1255	}
mbed_official	87:085cde657901	1256	/* Copy the header buffer in internal buffer "hcryp->Init.pScratch" */
mbed_official	87:085cde657901	1257	for(loopcounter = 0; loopcounter < headersize; loopcounter++)
mbed_official	87:085cde657901	1258	{
mbed_official	87:085cde657901	1259	hcryp->Init.pScratch[bufferidx++] = hcryp->Init.Header[loopcounter];
mbed_official	87:085cde657901	1260	}
mbed_official	87:085cde657901	1261	/* Check if the header size is modulo 16 */
mbed_official	87:085cde657901	1262	if ((headersize % 16) != 0)
mbed_official	87:085cde657901	1263	{
mbed_official	87:085cde657901	1264	/* Padd the header buffer with 0s till the hcryp->Init.pScratch length is modulo 16 */
mbed_official	87:085cde657901	1265	for(loopcounter = headersize; loopcounter <= ((headersize/16) + 1) * 16; loopcounter++)
mbed_official	87:085cde657901	1266	{
mbed_official	87:085cde657901	1267	hcryp->Init.pScratch[loopcounter] = 0;
mbed_official	87:085cde657901	1268	}
mbed_official	87:085cde657901	1269	/* Set the header size to modulo 16 */
mbed_official	87:085cde657901	1270	headersize = ((headersize/16) + 1) * 16;
mbed_official	87:085cde657901	1271	}
mbed_official	87:085cde657901	1272	/* Set the pointer headeraddr to hcryp->Init.pScratch */
mbed_official	87:085cde657901	1273	headeraddr = (uint32_t)hcryp->Init.pScratch;
mbed_official	87:085cde657901	1274	}
mbed_official	87:085cde657901	1275	/********************* Formatting the block B0 **********************/
mbed_official	87:085cde657901	1276	if(headersize != 0)
mbed_official	87:085cde657901	1277	{
mbed_official	87:085cde657901	1278	blockb0[0] = 0x40;
mbed_official	87:085cde657901	1279	}
mbed_official	87:085cde657901	1280	/* Flags byte */
mbed_official	87:085cde657901	1281	/* blockb0[0] \|= 0u \| (((( (uint8_t) hcryp->Init.TagSize - 2) / 2) & 0x07 ) << 3 ) \| ( ( (uint8_t) (15 - hcryp->Init.IVSize) - 1) & 0x07) */
mbed_official	87:085cde657901	1282	blockb0[0] \|= (uint8_t)((uint8_t)((uint8_t)(((uint8_t)(hcryp->Init.TagSize - (uint8_t)(2))) >> 1) & (uint8_t)0x07 ) << 3);
mbed_official	87:085cde657901	1283	blockb0[0] \|= (uint8_t)((uint8_t)((uint8_t)((uint8_t)(15) - hcryp->Init.IVSize) - (uint8_t)1) & (uint8_t)0x07);
mbed_official	87:085cde657901	1284
mbed_official	87:085cde657901	1285	for (loopcounter = 0; loopcounter < hcryp->Init.IVSize; loopcounter++)
mbed_official	87:085cde657901	1286	{
mbed_official	87:085cde657901	1287	blockb0[loopcounter+1] = hcryp->Init.pInitVect[loopcounter];
mbed_official	87:085cde657901	1288	}
mbed_official	87:085cde657901	1289	for ( ; loopcounter < 13; loopcounter++)
mbed_official	87:085cde657901	1290	{
mbed_official	87:085cde657901	1291	blockb0[loopcounter+1] = 0;
mbed_official	87:085cde657901	1292	}
mbed_official	87:085cde657901	1293
mbed_official	87:085cde657901	1294	blockb0[14] = (Size >> 8);
mbed_official	87:085cde657901	1295	blockb0[15] = (Size & 0xFF);
mbed_official	87:085cde657901	1296
mbed_official	87:085cde657901	1297	/*********************** Formatting the initial counter *************/
mbed_official	87:085cde657901	1298	/* Byte 0:
mbed_official	87:085cde657901	1299	Bits 7 and 6 are reserved and shall be set to 0
mbed_official	87:085cde657901	1300	Bits 3, 4, and 5 shall also be set to 0, to ensure that all the counter
mbed_official	87:085cde657901	1301	blocks are distinct from B0
mbed_official	87:085cde657901	1302	Bits 0, 1, and 2 contain the same encoding of q as in B0
mbed_official	87:085cde657901	1303	*/
mbed_official	87:085cde657901	1304	ctr[0] = blockb0[0] & 0x07;
mbed_official	87:085cde657901	1305	/* byte 1 to NonceSize is the IV (Nonce) */
mbed_official	87:085cde657901	1306	for(loopcounter = 1; loopcounter < hcryp->Init.IVSize + 1; loopcounter++)
mbed_official	87:085cde657901	1307	{
mbed_official	87:085cde657901	1308	ctr[loopcounter] = blockb0[loopcounter];
mbed_official	87:085cde657901	1309	}
mbed_official	87:085cde657901	1310	/* Set the LSB to 1 */
mbed_official	87:085cde657901	1311	ctr[15] \|= 0x01;
mbed_official	87:085cde657901	1312
mbed_official	87:085cde657901	1313	/* Set the key */
mbed_official	87:085cde657901	1314	CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
mbed_official	87:085cde657901	1315
mbed_official	87:085cde657901	1316	/* Set the CRYP peripheral in AES CCM mode */
mbed_official	87:085cde657901	1317	__HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CCM_ENCRYPT);
mbed_official	87:085cde657901	1318
mbed_official	87:085cde657901	1319	/* Set the Initialization Vector */
mbed_official	87:085cde657901	1320	CRYPEx_GCMCCM_SetInitVector(hcryp, ctr, hcryp->Init.KeySize);
mbed_official	87:085cde657901	1321
mbed_official	87:085cde657901	1322	/* Select init phase */
mbed_official	87:085cde657901	1323	__HAL_CRYP_SET_PHASE(CRYP_PHASE_INIT);
mbed_official	87:085cde657901	1324
mbed_official	87:085cde657901	1325	b0addr = (uint32_t)blockb0;
mbed_official	87:085cde657901	1326	/* Write the blockb0 block in the IN FIFO */
mbed_official	87:085cde657901	1327	CRYP->DR = (uint32_t)(b0addr);
mbed_official	87:085cde657901	1328	b0addr+=4;
mbed_official	87:085cde657901	1329	CRYP->DR = (uint32_t)(b0addr);
mbed_official	87:085cde657901	1330	b0addr+=4;
mbed_official	87:085cde657901	1331	CRYP->DR = (uint32_t)(b0addr);
mbed_official	87:085cde657901	1332	b0addr+=4;
mbed_official	87:085cde657901	1333	CRYP->DR = (uint32_t)(b0addr);
mbed_official	87:085cde657901	1334
mbed_official	87:085cde657901	1335	/* Enable the CRYP peripheral */
mbed_official	87:085cde657901	1336	__HAL_CRYP_ENABLE();
mbed_official	87:085cde657901	1337
mbed_official	87:085cde657901	1338	/* Get timeout */
mbed_official	87:085cde657901	1339	timeout = HAL_GetTick() + 1;
mbed_official	87:085cde657901	1340
mbed_official	87:085cde657901	1341	while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
mbed_official	87:085cde657901	1342	{
mbed_official	87:085cde657901	1343	/* Check for the Timeout */
mbed_official	87:085cde657901	1344	if(HAL_GetTick() >= timeout)
mbed_official	87:085cde657901	1345	{
mbed_official	87:085cde657901	1346	/* Change state */
mbed_official	87:085cde657901	1347	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official	87:085cde657901	1348
mbed_official	87:085cde657901	1349	/* Process Unlocked */
mbed_official	87:085cde657901	1350	__HAL_UNLOCK(hcryp);
mbed_official	87:085cde657901	1351
mbed_official	87:085cde657901	1352	return HAL_TIMEOUT;
mbed_official	87:085cde657901	1353	}
mbed_official	87:085cde657901	1354	}
mbed_official	87:085cde657901	1355	/*************************** Header phase ***************************/
mbed_official	87:085cde657901	1356	if(headersize != 0)
mbed_official	87:085cde657901	1357	{
mbed_official	87:085cde657901	1358	/* Select header phase */
mbed_official	87:085cde657901	1359	__HAL_CRYP_SET_PHASE(CRYP_PHASE_HEADER);
mbed_official	87:085cde657901	1360
mbed_official	87:085cde657901	1361	/* Enable Crypto processor */
mbed_official	87:085cde657901	1362	__HAL_CRYP_ENABLE();
mbed_official	87:085cde657901	1363
mbed_official	87:085cde657901	1364	for(loopcounter = 0; (loopcounter < headersize); loopcounter+=16)
mbed_official	87:085cde657901	1365	{
mbed_official	87:085cde657901	1366	/* Get timeout */
mbed_official	87:085cde657901	1367	timeout = HAL_GetTick() + 1;
mbed_official	87:085cde657901	1368
mbed_official	87:085cde657901	1369	while(HAL_IS_BIT_CLR(CRYP->SR, CRYP_FLAG_IFEM))
mbed_official	87:085cde657901	1370	{
mbed_official	87:085cde657901	1371	/* Check for the Timeout */
mbed_official	87:085cde657901	1372	if(HAL_GetTick() >= timeout)
mbed_official	87:085cde657901	1373	{
mbed_official	87:085cde657901	1374	/* Change state */
mbed_official	87:085cde657901	1375	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official	87:085cde657901	1376
mbed_official	87:085cde657901	1377	/* Process Unlocked */
mbed_official	87:085cde657901	1378	__HAL_UNLOCK(hcryp);
mbed_official	87:085cde657901	1379
mbed_official	87:085cde657901	1380	return HAL_TIMEOUT;
mbed_official	87:085cde657901	1381	}
mbed_official	87:085cde657901	1382	}
mbed_official	87:085cde657901	1383	/* Write the header block in the IN FIFO */
mbed_official	87:085cde657901	1384	CRYP->DR = (uint32_t)(headeraddr);
mbed_official	87:085cde657901	1385	headeraddr+=4;
mbed_official	87:085cde657901	1386	CRYP->DR = (uint32_t)(headeraddr);
mbed_official	87:085cde657901	1387	headeraddr+=4;
mbed_official	87:085cde657901	1388	CRYP->DR = (uint32_t)(headeraddr);
mbed_official	87:085cde657901	1389	headeraddr+=4;
mbed_official	87:085cde657901	1390	CRYP->DR = (uint32_t)(headeraddr);
mbed_official	87:085cde657901	1391	headeraddr+=4;
mbed_official	87:085cde657901	1392	}
mbed_official	87:085cde657901	1393
mbed_official	87:085cde657901	1394	/* Get timeout */
mbed_official	87:085cde657901	1395	timeout = HAL_GetTick() + 1;
mbed_official	87:085cde657901	1396
mbed_official	87:085cde657901	1397	while((CRYP->SR & CRYP_FLAG_BUSY) == CRYP_FLAG_BUSY)
mbed_official	87:085cde657901	1398	{
mbed_official	87:085cde657901	1399	/* Check for the Timeout */
mbed_official	87:085cde657901	1400	if(HAL_GetTick() >= timeout)
mbed_official	87:085cde657901	1401	{
mbed_official	87:085cde657901	1402	/* Change state */
mbed_official	87:085cde657901	1403	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official	87:085cde657901	1404
mbed_official	87:085cde657901	1405	/* Process Unlocked */
mbed_official	87:085cde657901	1406	__HAL_UNLOCK(hcryp);
mbed_official	87:085cde657901	1407
mbed_official	87:085cde657901	1408	return HAL_TIMEOUT;
mbed_official	87:085cde657901	1409	}
mbed_official	87:085cde657901	1410	}
mbed_official	87:085cde657901	1411	}
mbed_official	87:085cde657901	1412	/* Save formatted counter into the scratch buffer pScratch */
mbed_official	87:085cde657901	1413	for(loopcounter = 0; (loopcounter < 16); loopcounter++)
mbed_official	87:085cde657901	1414	{
mbed_official	87:085cde657901	1415	hcryp->Init.pScratch[loopcounter] = ctr[loopcounter];
mbed_official	87:085cde657901	1416	}
mbed_official	87:085cde657901	1417	/* Reset bit 0 */
mbed_official	87:085cde657901	1418	hcryp->Init.pScratch[15] &= 0xfe;
mbed_official	87:085cde657901	1419
mbed_official	87:085cde657901	1420	/* Select payload phase once the header phase is performed */
mbed_official	87:085cde657901	1421	__HAL_CRYP_SET_PHASE(CRYP_PHASE_PAYLOAD);
mbed_official	87:085cde657901	1422
mbed_official	87:085cde657901	1423	/* Flush FIFO */
mbed_official	87:085cde657901	1424	__HAL_CRYP_FIFO_FLUSH();
mbed_official	87:085cde657901	1425
mbed_official	87:085cde657901	1426	/* Set the phase */
mbed_official	87:085cde657901	1427	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
mbed_official	87:085cde657901	1428	}
mbed_official	87:085cde657901	1429
mbed_official	87:085cde657901	1430	if(Size != 0)
mbed_official	87:085cde657901	1431	{
mbed_official	87:085cde657901	1432	/* Enable Interrupts */
mbed_official	87:085cde657901	1433	__HAL_CRYP_ENABLE_IT(CRYP_IT_INI \| CRYP_IT_OUTI);
mbed_official	87:085cde657901	1434	/* Enable the CRYP peripheral */
mbed_official	87:085cde657901	1435	__HAL_CRYP_ENABLE();
mbed_official	87:085cde657901	1436	}
mbed_official	87:085cde657901	1437	else
mbed_official	87:085cde657901	1438	{
mbed_official	87:085cde657901	1439	/* Change the CRYP state and phase */
mbed_official	87:085cde657901	1440	hcryp->State = HAL_CRYP_STATE_READY;
mbed_official	87:085cde657901	1441	}
mbed_official	87:085cde657901	1442
mbed_official	87:085cde657901	1443	/* Return function status */
mbed_official	87:085cde657901	1444	return HAL_OK;
mbed_official	87:085cde657901	1445	}
mbed_official	87:085cde657901	1446	else if (__HAL_CRYP_GET_IT(CRYP_IT_INI))
mbed_official	87:085cde657901	1447	{
mbed_official	87:085cde657901	1448	inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
mbed_official	87:085cde657901	1449	/* Write the Input block in the IN FIFO */
mbed_official	87:085cde657901	1450	CRYP->DR = (uint32_t)(inputaddr);
mbed_official	87:085cde657901	1451	inputaddr+=4;
mbed_official	87:085cde657901	1452	CRYP->DR = (uint32_t)(inputaddr);
mbed_official	87:085cde657901	1453	inputaddr+=4;
mbed_official	87:085cde657901	1454	CRYP->DR = (uint32_t)(inputaddr);
mbed_official	87:085cde657901	1455	inputaddr+=4;
mbed_official	87:085cde657901	1456	CRYP->DR = (uint32_t)(inputaddr);
mbed_official	87:085cde657901	1457	hcryp->pCrypInBuffPtr += 16;
mbed_official	87:085cde657901	1458	hcryp->CrypInCount -= 16;
mbed_official	87:085cde657901	1459	if(hcryp->CrypInCount == 0)
mbed_official	87:085cde657901	1460	{
mbed_official	87:085cde657901	1461	__HAL_CRYP_DISABLE_IT(CRYP_IT_INI);
mbed_official	87:085cde657901	1462	/* Call Input transfer complete callback */
mbed_official	87:085cde657901	1463	HAL_CRYP_InCpltCallback(hcryp);
mbed_official	87:085cde657901	1464	}
mbed_official	87:085cde657901	1465	}
mbed_official	87:085cde657901	1466	else if (__HAL_CRYP_GET_IT(CRYP_IT_OUTI))
mbed_official	87:085cde657901	1467	{
mbed_official	87:085cde657901	1468	outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
mbed_official	87:085cde657901	1469	/* Read the Output block from the Output FIFO */
mbed_official	87:085cde657901	1470	(uint32_t)(outputaddr) = CRYP->DOUT;
mbed_official	87:085cde657901	1471	outputaddr+=4;
mbed_official	87:085cde657901	1472	(uint32_t)(outputaddr) = CRYP->DOUT;
mbed_official	87:085cde657901	1473	outputaddr+=4;
mbed_official	87:085cde657901	1474	(uint32_t)(outputaddr) = CRYP->DOUT;
mbed_official	87:085cde657901	1475	outputaddr+=4;
mbed_official	87:085cde657901	1476	(uint32_t)(outputaddr) = CRYP->DOUT;
mbed_official	87:085cde657901	1477	hcryp->pCrypOutBuffPtr += 16;
mbed_official	87:085cde657901	1478	hcryp->CrypOutCount -= 16;
mbed_official	87:085cde657901	1479	if(hcryp->CrypOutCount == 0)
mbed_official	87:085cde657901	1480	{
mbed_official	87:085cde657901	1481	__HAL_CRYP_DISABLE_IT(CRYP_IT_OUTI);
mbed_official	87:085cde657901	1482	/* Process Unlocked */
mbed_official	87:085cde657901	1483	__HAL_UNLOCK(hcryp);
mbed_official	87:085cde657901	1484	/* Change the CRYP peripheral state */
mbed_official	87:085cde657901	1485	hcryp->State = HAL_CRYP_STATE_READY;
mbed_official	87:085cde657901	1486	/* Call Input transfer complete callback */
mbed_official	87:085cde657901	1487	HAL_CRYP_OutCpltCallback(hcryp);
mbed_official	87:085cde657901	1488	}
mbed_official	87:085cde657901	1489	}
mbed_official	87:085cde657901	1490
mbed_official	87:085cde657901	1491	/* Return function status */
mbed_official	87:085cde657901	1492	return HAL_OK;
mbed_official	87:085cde657901	1493	}
mbed_official	87:085cde657901	1494
mbed_official	87:085cde657901	1495	/**
mbed_official	87:085cde657901	1496	* @brief Initializes the CRYP peripheral in AES GCM decryption mode using IT.
mbed_official	87:085cde657901	1497	* @param hcryp: CRYP handle
mbed_official	87:085cde657901	1498	* @param pCypherData: Pointer to the cyphertext buffer
mbed_official	87:085cde657901	1499	* @param Size: Length of the cyphertext buffer, must be a multiple of 16
mbed_official	87:085cde657901	1500	* @param pPlainData: Pointer to the plaintext buffer
mbed_official	87:085cde657901	1501	* @retval HAL status
mbed_official	87:085cde657901	1502	*/
mbed_official	87:085cde657901	1503	HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Decrypt_IT(CRYP_HandleTypeDef hcryp, uint8_t pCypherData, uint16_t Size, uint8_t *pPlainData)
mbed_official	87:085cde657901	1504	{
mbed_official	87:085cde657901	1505	uint32_t timeout = 0;
mbed_official	87:085cde657901	1506	uint32_t inputaddr;
mbed_official	87:085cde657901	1507	uint32_t outputaddr;
mbed_official	87:085cde657901	1508
mbed_official	87:085cde657901	1509	if(hcryp->State == HAL_CRYP_STATE_READY)
mbed_official	87:085cde657901	1510	{
mbed_official	87:085cde657901	1511	/* Process Locked */
mbed_official	87:085cde657901	1512	__HAL_LOCK(hcryp);
mbed_official	87:085cde657901	1513
mbed_official	87:085cde657901	1514	/* Get the buffer addresses and sizes */
mbed_official	87:085cde657901	1515	hcryp->CrypInCount = Size;
mbed_official	87:085cde657901	1516	hcryp->pCrypInBuffPtr = pCypherData;
mbed_official	87:085cde657901	1517	hcryp->pCrypOutBuffPtr = pPlainData;
mbed_official	87:085cde657901	1518	hcryp->CrypOutCount = Size;
mbed_official	87:085cde657901	1519
mbed_official	87:085cde657901	1520	/* Change the CRYP peripheral state */
mbed_official	87:085cde657901	1521	hcryp->State = HAL_CRYP_STATE_BUSY;
mbed_official	87:085cde657901	1522
mbed_official	87:085cde657901	1523	/* Check if initialization phase has already been performed */
mbed_official	87:085cde657901	1524	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
mbed_official	87:085cde657901	1525	{
mbed_official	87:085cde657901	1526	/* Set the key */
mbed_official	87:085cde657901	1527	CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
mbed_official	87:085cde657901	1528
mbed_official	87:085cde657901	1529	/* Set the CRYP peripheral in AES GCM decryption mode */
mbed_official	87:085cde657901	1530	__HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_GCM_DECRYPT);
mbed_official	87:085cde657901	1531
mbed_official	87:085cde657901	1532	/* Set the Initialization Vector */
mbed_official	87:085cde657901	1533	CRYPEx_GCMCCM_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
mbed_official	87:085cde657901	1534
mbed_official	87:085cde657901	1535	/* Flush FIFO */
mbed_official	87:085cde657901	1536	__HAL_CRYP_FIFO_FLUSH();
mbed_official	87:085cde657901	1537
mbed_official	87:085cde657901	1538	/* Enable CRYP to start the init phase */
mbed_official	87:085cde657901	1539	__HAL_CRYP_ENABLE();
mbed_official	87:085cde657901	1540
mbed_official	87:085cde657901	1541	/* Get timeout */
mbed_official	87:085cde657901	1542	timeout = HAL_GetTick() + 1;
mbed_official	87:085cde657901	1543
mbed_official	87:085cde657901	1544	while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
mbed_official	87:085cde657901	1545	{
mbed_official	87:085cde657901	1546	/* Check for the Timeout */
mbed_official	87:085cde657901	1547	if(HAL_GetTick() >= timeout)
mbed_official	87:085cde657901	1548	{
mbed_official	87:085cde657901	1549	/* Change state */
mbed_official	87:085cde657901	1550	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official	87:085cde657901	1551
mbed_official	87:085cde657901	1552	/* Process Unlocked */
mbed_official	87:085cde657901	1553	__HAL_UNLOCK(hcryp);
mbed_official	87:085cde657901	1554
mbed_official	87:085cde657901	1555	return HAL_TIMEOUT;
mbed_official	87:085cde657901	1556	}
mbed_official	87:085cde657901	1557	}
mbed_official	87:085cde657901	1558
mbed_official	87:085cde657901	1559	/* Set the header phase */
mbed_official	87:085cde657901	1560	if(CRYPEx_GCMCCM_SetHeaderPhase(hcryp, hcryp->Init.Header, hcryp->Init.HeaderSize, 1) != HAL_OK)
mbed_official	87:085cde657901	1561	{
mbed_official	87:085cde657901	1562	return HAL_TIMEOUT;
mbed_official	87:085cde657901	1563	}
mbed_official	87:085cde657901	1564	/* Disable the CRYP peripheral */
mbed_official	87:085cde657901	1565	__HAL_CRYP_DISABLE();
mbed_official	87:085cde657901	1566
mbed_official	87:085cde657901	1567	/* Select payload phase once the header phase is performed */
mbed_official	87:085cde657901	1568	__HAL_CRYP_SET_PHASE(CRYP_PHASE_PAYLOAD);
mbed_official	87:085cde657901	1569
mbed_official	87:085cde657901	1570	/* Set the phase */
mbed_official	87:085cde657901	1571	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
mbed_official	87:085cde657901	1572	}
mbed_official	87:085cde657901	1573
mbed_official	87:085cde657901	1574	if(Size != 0)
mbed_official	87:085cde657901	1575	{
mbed_official	87:085cde657901	1576	/* Enable Interrupts */
mbed_official	87:085cde657901	1577	__HAL_CRYP_ENABLE_IT(CRYP_IT_INI \| CRYP_IT_OUTI);
mbed_official	87:085cde657901	1578	/* Enable the CRYP peripheral */
mbed_official	87:085cde657901	1579	__HAL_CRYP_ENABLE();
mbed_official	87:085cde657901	1580	}
mbed_official	87:085cde657901	1581	else
mbed_official	87:085cde657901	1582	{
mbed_official	87:085cde657901	1583	/* Process Locked */
mbed_official	87:085cde657901	1584	__HAL_UNLOCK(hcryp);
mbed_official	87:085cde657901	1585	/* Change the CRYP state and phase */
mbed_official	87:085cde657901	1586	hcryp->State = HAL_CRYP_STATE_READY;
mbed_official	87:085cde657901	1587	}
mbed_official	87:085cde657901	1588
mbed_official	87:085cde657901	1589	/* Return function status */
mbed_official	87:085cde657901	1590	return HAL_OK;
mbed_official	87:085cde657901	1591	}
mbed_official	87:085cde657901	1592	else if (__HAL_CRYP_GET_IT(CRYP_IT_INI))
mbed_official	87:085cde657901	1593	{
mbed_official	87:085cde657901	1594	inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
mbed_official	87:085cde657901	1595	/* Write the Input block in the IN FIFO */
mbed_official	87:085cde657901	1596	CRYP->DR = (uint32_t)(inputaddr);
mbed_official	87:085cde657901	1597	inputaddr+=4;
mbed_official	87:085cde657901	1598	CRYP->DR = (uint32_t)(inputaddr);
mbed_official	87:085cde657901	1599	inputaddr+=4;
mbed_official	87:085cde657901	1600	CRYP->DR = (uint32_t)(inputaddr);
mbed_official	87:085cde657901	1601	inputaddr+=4;
mbed_official	87:085cde657901	1602	CRYP->DR = (uint32_t)(inputaddr);
mbed_official	87:085cde657901	1603	hcryp->pCrypInBuffPtr += 16;
mbed_official	87:085cde657901	1604	hcryp->CrypInCount -= 16;
mbed_official	87:085cde657901	1605	if(hcryp->CrypInCount == 0)
mbed_official	87:085cde657901	1606	{
mbed_official	87:085cde657901	1607	__HAL_CRYP_DISABLE_IT(CRYP_IT_INI);
mbed_official	87:085cde657901	1608	/* Call the Input data transfer complete callback */
mbed_official	87:085cde657901	1609	HAL_CRYP_InCpltCallback(hcryp);
mbed_official	87:085cde657901	1610	}
mbed_official	87:085cde657901	1611	}
mbed_official	87:085cde657901	1612	else if (__HAL_CRYP_GET_IT(CRYP_IT_OUTI))
mbed_official	87:085cde657901	1613	{
mbed_official	87:085cde657901	1614	outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
mbed_official	87:085cde657901	1615	/* Read the Output block from the Output FIFO */
mbed_official	87:085cde657901	1616	(uint32_t)(outputaddr) = CRYP->DOUT;
mbed_official	87:085cde657901	1617	outputaddr+=4;
mbed_official	87:085cde657901	1618	(uint32_t)(outputaddr) = CRYP->DOUT;
mbed_official	87:085cde657901	1619	outputaddr+=4;
mbed_official	87:085cde657901	1620	(uint32_t)(outputaddr) = CRYP->DOUT;
mbed_official	87:085cde657901	1621	outputaddr+=4;
mbed_official	87:085cde657901	1622	(uint32_t)(outputaddr) = CRYP->DOUT;
mbed_official	87:085cde657901	1623	hcryp->pCrypOutBuffPtr += 16;
mbed_official	87:085cde657901	1624	hcryp->CrypOutCount -= 16;
mbed_official	87:085cde657901	1625	if(hcryp->CrypOutCount == 0)
mbed_official	87:085cde657901	1626	{
mbed_official	87:085cde657901	1627	__HAL_CRYP_DISABLE_IT(CRYP_IT_OUTI);
mbed_official	87:085cde657901	1628	/* Process Unlocked */
mbed_official	87:085cde657901	1629	__HAL_UNLOCK(hcryp);
mbed_official	87:085cde657901	1630	/* Change the CRYP peripheral state */
mbed_official	87:085cde657901	1631	hcryp->State = HAL_CRYP_STATE_READY;
mbed_official	87:085cde657901	1632	/* Call Input transfer complete callback */
mbed_official	87:085cde657901	1633	HAL_CRYP_OutCpltCallback(hcryp);
mbed_official	87:085cde657901	1634	}
mbed_official	87:085cde657901	1635	}
mbed_official	87:085cde657901	1636
mbed_official	87:085cde657901	1637	/* Return function status */
mbed_official	87:085cde657901	1638	return HAL_OK;
mbed_official	87:085cde657901	1639	}
mbed_official	87:085cde657901	1640
mbed_official	87:085cde657901	1641	/**
mbed_official	87:085cde657901	1642	* @brief Initializes the CRYP peripheral in AES CCM decryption mode using interrupt
mbed_official	87:085cde657901	1643	* then decrypted pCypherData. The cypher data are available in pPlainData.
mbed_official	87:085cde657901	1644	* @param hcryp: CRYP handle
mbed_official	87:085cde657901	1645	* @param pCypherData: Pointer to the cyphertext buffer
mbed_official	87:085cde657901	1646	* @param Size: Length of the plaintext buffer, must be a multiple of 16
mbed_official	87:085cde657901	1647	* @param pPlainData: Pointer to the plaintext buffer
mbed_official	87:085cde657901	1648	* @retval HAL status
mbed_official	87:085cde657901	1649	*/
mbed_official	87:085cde657901	1650	HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Decrypt_IT(CRYP_HandleTypeDef hcryp, uint8_t pCypherData, uint16_t Size, uint8_t *pPlainData)
mbed_official	87:085cde657901	1651	{
mbed_official	87:085cde657901	1652	uint32_t inputaddr;
mbed_official	87:085cde657901	1653	uint32_t outputaddr;
mbed_official	87:085cde657901	1654	uint32_t timeout = 0;
mbed_official	87:085cde657901	1655	uint32_t headersize = hcryp->Init.HeaderSize;
mbed_official	87:085cde657901	1656	uint32_t headeraddr = (uint32_t)hcryp->Init.Header;
mbed_official	87:085cde657901	1657	uint32_t loopcounter = 0;
mbed_official	87:085cde657901	1658	uint32_t bufferidx = 0;
mbed_official	87:085cde657901	1659	uint8_t blockb0[16] = {0};/* Block B0 */
mbed_official	87:085cde657901	1660	uint8_t ctr[16] = {0}; /* Counter */
mbed_official	87:085cde657901	1661	uint32_t b0addr = (uint32_t)blockb0;
mbed_official	87:085cde657901	1662
mbed_official	87:085cde657901	1663	if(hcryp->State == HAL_CRYP_STATE_READY)
mbed_official	87:085cde657901	1664	{
mbed_official	87:085cde657901	1665	/* Process Locked */
mbed_official	87:085cde657901	1666	__HAL_LOCK(hcryp);
mbed_official	87:085cde657901	1667
mbed_official	87:085cde657901	1668	hcryp->CrypInCount = Size;
mbed_official	87:085cde657901	1669	hcryp->pCrypInBuffPtr = pCypherData;
mbed_official	87:085cde657901	1670	hcryp->pCrypOutBuffPtr = pPlainData;
mbed_official	87:085cde657901	1671	hcryp->CrypOutCount = Size;
mbed_official	87:085cde657901	1672
mbed_official	87:085cde657901	1673	/* Change the CRYP peripheral state */
mbed_official	87:085cde657901	1674	hcryp->State = HAL_CRYP_STATE_BUSY;
mbed_official	87:085cde657901	1675
mbed_official	87:085cde657901	1676	/* Check if initialization phase has already been performed */
mbed_official	87:085cde657901	1677	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
mbed_official	87:085cde657901	1678	{
mbed_official	87:085cde657901	1679	/********************** Formatting the header block *****************/
mbed_official	87:085cde657901	1680	if(headersize != 0)
mbed_official	87:085cde657901	1681	{
mbed_official	87:085cde657901	1682	/* Check that the associated data (or header) length is lower than 2^16 - 2^8 = 65536 - 256 = 65280 */
mbed_official	87:085cde657901	1683	if(headersize < 65280)
mbed_official	87:085cde657901	1684	{
mbed_official	87:085cde657901	1685	hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize >> 8) & 0xFF);
mbed_official	87:085cde657901	1686	hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize) & 0xFF);
mbed_official	87:085cde657901	1687	headersize += 2;
mbed_official	87:085cde657901	1688	}
mbed_official	87:085cde657901	1689	else
mbed_official	87:085cde657901	1690	{
mbed_official	87:085cde657901	1691	/* Header is encoded as 0xff \|\| 0xfe \|\| [headersize]32, i.e., six octets */
mbed_official	87:085cde657901	1692	hcryp->Init.pScratch[bufferidx++] = 0xFF;
mbed_official	87:085cde657901	1693	hcryp->Init.pScratch[bufferidx++] = 0xFE;
mbed_official	87:085cde657901	1694	hcryp->Init.pScratch[bufferidx++] = headersize & 0xff000000;
mbed_official	87:085cde657901	1695	hcryp->Init.pScratch[bufferidx++] = headersize & 0x00ff0000;
mbed_official	87:085cde657901	1696	hcryp->Init.pScratch[bufferidx++] = headersize & 0x0000ff00;
mbed_official	87:085cde657901	1697	hcryp->Init.pScratch[bufferidx++] = headersize & 0x000000ff;
mbed_official	87:085cde657901	1698	headersize += 6;
mbed_official	87:085cde657901	1699	}
mbed_official	87:085cde657901	1700	/* Copy the header buffer in internal buffer "hcryp->Init.pScratch" */
mbed_official	87:085cde657901	1701	for(loopcounter = 0; loopcounter < headersize; loopcounter++)
mbed_official	87:085cde657901	1702	{
mbed_official	87:085cde657901	1703	hcryp->Init.pScratch[bufferidx++] = hcryp->Init.Header[loopcounter];
mbed_official	87:085cde657901	1704	}
mbed_official	87:085cde657901	1705	/* Check if the header size is modulo 16 */
mbed_official	87:085cde657901	1706	if ((headersize % 16) != 0)
mbed_official	87:085cde657901	1707	{
mbed_official	87:085cde657901	1708	/* Padd the header buffer with 0s till the hcryp->Init.pScratch length is modulo 16 */
mbed_official	87:085cde657901	1709	for(loopcounter = headersize; loopcounter <= ((headersize/16) + 1) * 16; loopcounter++)
mbed_official	87:085cde657901	1710	{
mbed_official	87:085cde657901	1711	hcryp->Init.pScratch[loopcounter] = 0;
mbed_official	87:085cde657901	1712	}
mbed_official	87:085cde657901	1713	/* Set the header size to modulo 16 */
mbed_official	87:085cde657901	1714	headersize = ((headersize/16) + 1) * 16;
mbed_official	87:085cde657901	1715	}
mbed_official	87:085cde657901	1716	/* Set the pointer headeraddr to hcryp->Init.pScratch */
mbed_official	87:085cde657901	1717	headeraddr = (uint32_t)hcryp->Init.pScratch;
mbed_official	87:085cde657901	1718	}
mbed_official	87:085cde657901	1719	/********************* Formatting the block B0 **********************/
mbed_official	87:085cde657901	1720	if(headersize != 0)
mbed_official	87:085cde657901	1721	{
mbed_official	87:085cde657901	1722	blockb0[0] = 0x40;
mbed_official	87:085cde657901	1723	}
mbed_official	87:085cde657901	1724	/* Flags byte */
mbed_official	87:085cde657901	1725	/* blockb0[0] \|= 0u \| (((( (uint8_t) hcryp->Init.TagSize - 2) / 2) & 0x07 ) << 3 ) \| ( ( (uint8_t) (15 - hcryp->Init.IVSize) - 1) & 0x07) */
mbed_official	87:085cde657901	1726	blockb0[0] \|= (uint8_t)((uint8_t)((uint8_t)(((uint8_t)(hcryp->Init.TagSize - (uint8_t)(2))) >> 1) & (uint8_t)0x07 ) << 3);
mbed_official	87:085cde657901	1727	blockb0[0] \|= (uint8_t)((uint8_t)((uint8_t)((uint8_t)(15) - hcryp->Init.IVSize) - (uint8_t)1) & (uint8_t)0x07);
mbed_official	87:085cde657901	1728
mbed_official	87:085cde657901	1729	for (loopcounter = 0; loopcounter < hcryp->Init.IVSize; loopcounter++)
mbed_official	87:085cde657901	1730	{
mbed_official	87:085cde657901	1731	blockb0[loopcounter+1] = hcryp->Init.pInitVect[loopcounter];
mbed_official	87:085cde657901	1732	}
mbed_official	87:085cde657901	1733	for ( ; loopcounter < 13; loopcounter++)
mbed_official	87:085cde657901	1734	{
mbed_official	87:085cde657901	1735	blockb0[loopcounter+1] = 0;
mbed_official	87:085cde657901	1736	}
mbed_official	87:085cde657901	1737
mbed_official	87:085cde657901	1738	blockb0[14] = (Size >> 8);
mbed_official	87:085cde657901	1739	blockb0[15] = (Size & 0xFF);
mbed_official	87:085cde657901	1740
mbed_official	87:085cde657901	1741	/*********************** Formatting the initial counter *************/
mbed_official	87:085cde657901	1742	/* Byte 0:
mbed_official	87:085cde657901	1743	Bits 7 and 6 are reserved and shall be set to 0
mbed_official	87:085cde657901	1744	Bits 3, 4, and 5 shall also be set to 0, to ensure that all the counter
mbed_official	87:085cde657901	1745	blocks are distinct from B0
mbed_official	87:085cde657901	1746	Bits 0, 1, and 2 contain the same encoding of q as in B0
mbed_official	87:085cde657901	1747	*/
mbed_official	87:085cde657901	1748	ctr[0] = blockb0[0] & 0x07;
mbed_official	87:085cde657901	1749	/* byte 1 to NonceSize is the IV (Nonce) */
mbed_official	87:085cde657901	1750	for(loopcounter = 1; loopcounter < hcryp->Init.IVSize + 1; loopcounter++)
mbed_official	87:085cde657901	1751	{
mbed_official	87:085cde657901	1752	ctr[loopcounter] = blockb0[loopcounter];
mbed_official	87:085cde657901	1753	}
mbed_official	87:085cde657901	1754	/* Set the LSB to 1 */
mbed_official	87:085cde657901	1755	ctr[15] \|= 0x01;
mbed_official	87:085cde657901	1756
mbed_official	87:085cde657901	1757	/* Set the key */
mbed_official	87:085cde657901	1758	CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
mbed_official	87:085cde657901	1759
mbed_official	87:085cde657901	1760	/* Set the CRYP peripheral in AES CCM mode */
mbed_official	87:085cde657901	1761	__HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CCM_DECRYPT);
mbed_official	87:085cde657901	1762
mbed_official	87:085cde657901	1763	/* Set the Initialization Vector */
mbed_official	87:085cde657901	1764	CRYPEx_GCMCCM_SetInitVector(hcryp, ctr, hcryp->Init.KeySize);
mbed_official	87:085cde657901	1765
mbed_official	87:085cde657901	1766	/* Select init phase */
mbed_official	87:085cde657901	1767	__HAL_CRYP_SET_PHASE(CRYP_PHASE_INIT);
mbed_official	87:085cde657901	1768
mbed_official	87:085cde657901	1769	b0addr = (uint32_t)blockb0;
mbed_official	87:085cde657901	1770	/* Write the blockb0 block in the IN FIFO */
mbed_official	87:085cde657901	1771	CRYP->DR = (uint32_t)(b0addr);
mbed_official	87:085cde657901	1772	b0addr+=4;
mbed_official	87:085cde657901	1773	CRYP->DR = (uint32_t)(b0addr);
mbed_official	87:085cde657901	1774	b0addr+=4;
mbed_official	87:085cde657901	1775	CRYP->DR = (uint32_t)(b0addr);
mbed_official	87:085cde657901	1776	b0addr+=4;
mbed_official	87:085cde657901	1777	CRYP->DR = (uint32_t)(b0addr);
mbed_official	87:085cde657901	1778
mbed_official	87:085cde657901	1779	/* Enable the CRYP peripheral */
mbed_official	87:085cde657901	1780	__HAL_CRYP_ENABLE();
mbed_official	87:085cde657901	1781
mbed_official	87:085cde657901	1782	/* Get timeout */
mbed_official	87:085cde657901	1783	timeout = HAL_GetTick() + 1;
mbed_official	87:085cde657901	1784
mbed_official	87:085cde657901	1785	while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
mbed_official	87:085cde657901	1786	{
mbed_official	87:085cde657901	1787	/* Check for the Timeout */
mbed_official	87:085cde657901	1788	if(HAL_GetTick() >= timeout)
mbed_official	87:085cde657901	1789	{
mbed_official	87:085cde657901	1790	/* Change state */
mbed_official	87:085cde657901	1791	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official	87:085cde657901	1792
mbed_official	87:085cde657901	1793	/* Process Unlocked */
mbed_official	87:085cde657901	1794	__HAL_UNLOCK(hcryp);
mbed_official	87:085cde657901	1795
mbed_official	87:085cde657901	1796	return HAL_TIMEOUT;
mbed_official	87:085cde657901	1797	}
mbed_official	87:085cde657901	1798	}
mbed_official	87:085cde657901	1799	/*************************** Header phase ***************************/
mbed_official	87:085cde657901	1800	if(headersize != 0)
mbed_official	87:085cde657901	1801	{
mbed_official	87:085cde657901	1802	/* Select header phase */
mbed_official	87:085cde657901	1803	__HAL_CRYP_SET_PHASE(CRYP_PHASE_HEADER);
mbed_official	87:085cde657901	1804
mbed_official	87:085cde657901	1805	/* Enable Crypto processor */
mbed_official	87:085cde657901	1806	__HAL_CRYP_ENABLE();
mbed_official	87:085cde657901	1807
mbed_official	87:085cde657901	1808	for(loopcounter = 0; (loopcounter < headersize); loopcounter+=16)
mbed_official	87:085cde657901	1809	{
mbed_official	87:085cde657901	1810	/* Get timeout */
mbed_official	87:085cde657901	1811	timeout = HAL_GetTick() + 1;
mbed_official	87:085cde657901	1812
mbed_official	87:085cde657901	1813	while(HAL_IS_BIT_CLR(CRYP->SR, CRYP_FLAG_IFEM))
mbed_official	87:085cde657901	1814	{
mbed_official	87:085cde657901	1815	/* Check for the Timeout */
mbed_official	87:085cde657901	1816	if(HAL_GetTick() >= timeout)
mbed_official	87:085cde657901	1817	{
mbed_official	87:085cde657901	1818	/* Change state */
mbed_official	87:085cde657901	1819	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official	87:085cde657901	1820
mbed_official	87:085cde657901	1821	/* Process Unlocked */
mbed_official	87:085cde657901	1822	__HAL_UNLOCK(hcryp);
mbed_official	87:085cde657901	1823
mbed_official	87:085cde657901	1824	return HAL_TIMEOUT;
mbed_official	87:085cde657901	1825	}
mbed_official	87:085cde657901	1826	}
mbed_official	87:085cde657901	1827	/* Write the header block in the IN FIFO */
mbed_official	87:085cde657901	1828	CRYP->DR = (uint32_t)(headeraddr);
mbed_official	87:085cde657901	1829	headeraddr+=4;
mbed_official	87:085cde657901	1830	CRYP->DR = (uint32_t)(headeraddr);
mbed_official	87:085cde657901	1831	headeraddr+=4;
mbed_official	87:085cde657901	1832	CRYP->DR = (uint32_t)(headeraddr);
mbed_official	87:085cde657901	1833	headeraddr+=4;
mbed_official	87:085cde657901	1834	CRYP->DR = (uint32_t)(headeraddr);
mbed_official	87:085cde657901	1835	headeraddr+=4;
mbed_official	87:085cde657901	1836	}
mbed_official	87:085cde657901	1837
mbed_official	87:085cde657901	1838	/* Get timeout */
mbed_official	87:085cde657901	1839	timeout = HAL_GetTick() + 1;
mbed_official	87:085cde657901	1840
mbed_official	87:085cde657901	1841	while((CRYP->SR & CRYP_FLAG_BUSY) == CRYP_FLAG_BUSY)
mbed_official	87:085cde657901	1842	{
mbed_official	87:085cde657901	1843	/* Check for the Timeout */
mbed_official	87:085cde657901	1844	if(HAL_GetTick() >= timeout)
mbed_official	87:085cde657901	1845	{
mbed_official	87:085cde657901	1846	/* Change state */
mbed_official	87:085cde657901	1847	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official	87:085cde657901	1848
mbed_official	87:085cde657901	1849	/* Process Unlocked */
mbed_official	87:085cde657901	1850	__HAL_UNLOCK(hcryp);
mbed_official	87:085cde657901	1851
mbed_official	87:085cde657901	1852	return HAL_TIMEOUT;
mbed_official	87:085cde657901	1853	}
mbed_official	87:085cde657901	1854	}
mbed_official	87:085cde657901	1855	}
mbed_official	87:085cde657901	1856	/* Save formatted counter into the scratch buffer pScratch */
mbed_official	87:085cde657901	1857	for(loopcounter = 0; (loopcounter < 16); loopcounter++)
mbed_official	87:085cde657901	1858	{
mbed_official	87:085cde657901	1859	hcryp->Init.pScratch[loopcounter] = ctr[loopcounter];
mbed_official	87:085cde657901	1860	}
mbed_official	87:085cde657901	1861	/* Reset bit 0 */
mbed_official	87:085cde657901	1862	hcryp->Init.pScratch[15] &= 0xfe;
mbed_official	87:085cde657901	1863	/* Select payload phase once the header phase is performed */
mbed_official	87:085cde657901	1864	__HAL_CRYP_SET_PHASE(CRYP_PHASE_PAYLOAD);
mbed_official	87:085cde657901	1865
mbed_official	87:085cde657901	1866	/* Flush FIFO */
mbed_official	87:085cde657901	1867	__HAL_CRYP_FIFO_FLUSH();
mbed_official	87:085cde657901	1868
mbed_official	87:085cde657901	1869	/* Set the phase */
mbed_official	87:085cde657901	1870	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
mbed_official	87:085cde657901	1871	}
mbed_official	87:085cde657901	1872
mbed_official	87:085cde657901	1873	/* Enable Interrupts */
mbed_official	87:085cde657901	1874	__HAL_CRYP_ENABLE_IT(CRYP_IT_INI \| CRYP_IT_OUTI);
mbed_official	87:085cde657901	1875
mbed_official	87:085cde657901	1876	/* Enable the CRYP peripheral */
mbed_official	87:085cde657901	1877	__HAL_CRYP_ENABLE();
mbed_official	87:085cde657901	1878
mbed_official	87:085cde657901	1879	/* Return function status */
mbed_official	87:085cde657901	1880	return HAL_OK;
mbed_official	87:085cde657901	1881	}
mbed_official	87:085cde657901	1882	else if (__HAL_CRYP_GET_IT(CRYP_IT_INI))
mbed_official	87:085cde657901	1883	{
mbed_official	87:085cde657901	1884	inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
mbed_official	87:085cde657901	1885	/* Write the Input block in the IN FIFO */
mbed_official	87:085cde657901	1886	CRYP->DR = (uint32_t)(inputaddr);
mbed_official	87:085cde657901	1887	inputaddr+=4;
mbed_official	87:085cde657901	1888	CRYP->DR = (uint32_t)(inputaddr);
mbed_official	87:085cde657901	1889	inputaddr+=4;
mbed_official	87:085cde657901	1890	CRYP->DR = (uint32_t)(inputaddr);
mbed_official	87:085cde657901	1891	inputaddr+=4;
mbed_official	87:085cde657901	1892	CRYP->DR = (uint32_t)(inputaddr);
mbed_official	87:085cde657901	1893	hcryp->pCrypInBuffPtr += 16;
mbed_official	87:085cde657901	1894	hcryp->CrypInCount -= 16;
mbed_official	87:085cde657901	1895	if(hcryp->CrypInCount == 0)
mbed_official	87:085cde657901	1896	{
mbed_official	87:085cde657901	1897	__HAL_CRYP_DISABLE_IT(CRYP_IT_INI);
mbed_official	87:085cde657901	1898	/* Call the Input data transfer complete callback */
mbed_official	87:085cde657901	1899	HAL_CRYP_InCpltCallback(hcryp);
mbed_official	87:085cde657901	1900	}
mbed_official	87:085cde657901	1901	}
mbed_official	87:085cde657901	1902	else if (__HAL_CRYP_GET_IT(CRYP_IT_OUTI))
mbed_official	87:085cde657901	1903	{
mbed_official	87:085cde657901	1904	outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
mbed_official	87:085cde657901	1905	/* Read the Output block from the Output FIFO */
mbed_official	87:085cde657901	1906	(uint32_t)(outputaddr) = CRYP->DOUT;
mbed_official	87:085cde657901	1907	outputaddr+=4;
mbed_official	87:085cde657901	1908	(uint32_t)(outputaddr) = CRYP->DOUT;
mbed_official	87:085cde657901	1909	outputaddr+=4;
mbed_official	87:085cde657901	1910	(uint32_t)(outputaddr) = CRYP->DOUT;
mbed_official	87:085cde657901	1911	outputaddr+=4;
mbed_official	87:085cde657901	1912	(uint32_t)(outputaddr) = CRYP->DOUT;
mbed_official	87:085cde657901	1913	hcryp->pCrypOutBuffPtr += 16;
mbed_official	87:085cde657901	1914	hcryp->CrypOutCount -= 16;
mbed_official	87:085cde657901	1915	if(hcryp->CrypOutCount == 0)
mbed_official	87:085cde657901	1916	{
mbed_official	87:085cde657901	1917	__HAL_CRYP_DISABLE_IT(CRYP_IT_OUTI);
mbed_official	87:085cde657901	1918	/* Process Unlocked */
mbed_official	87:085cde657901	1919	__HAL_UNLOCK(hcryp);
mbed_official	87:085cde657901	1920	/* Change the CRYP peripheral state */
mbed_official	87:085cde657901	1921	hcryp->State = HAL_CRYP_STATE_READY;
mbed_official	87:085cde657901	1922	/* Call Input transfer complete callback */
mbed_official	87:085cde657901	1923	HAL_CRYP_OutCpltCallback(hcryp);
mbed_official	87:085cde657901	1924	}
mbed_official	87:085cde657901	1925	}
mbed_official	87:085cde657901	1926
mbed_official	87:085cde657901	1927	/* Return function status */
mbed_official	87:085cde657901	1928	return HAL_OK;
mbed_official	87:085cde657901	1929	}
mbed_official	87:085cde657901	1930
mbed_official	87:085cde657901	1931	/**
mbed_official	87:085cde657901	1932	* @brief Initializes the CRYP peripheral in AES GCM encryption mode using DMA.
mbed_official	87:085cde657901	1933	* @param hcryp: CRYP handle
mbed_official	87:085cde657901	1934	* @param pPlainData: Pointer to the plaintext buffer
mbed_official	87:085cde657901	1935	* @param Size: Length of the plaintext buffer, must be a multiple of 16
mbed_official	87:085cde657901	1936	* @param pCypherData: Pointer to the cyphertext buffer
mbed_official	87:085cde657901	1937	* @retval HAL status
mbed_official	87:085cde657901	1938	*/
mbed_official	87:085cde657901	1939	HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Encrypt_DMA(CRYP_HandleTypeDef hcryp, uint8_t pPlainData, uint16_t Size, uint8_t *pCypherData)
mbed_official	87:085cde657901	1940	{
mbed_official	87:085cde657901	1941	uint32_t timeout = 0;
mbed_official	87:085cde657901	1942	uint32_t inputaddr;
mbed_official	87:085cde657901	1943	uint32_t outputaddr;
mbed_official	87:085cde657901	1944
mbed_official	87:085cde657901	1945	if((hcryp->State == HAL_CRYP_STATE_READY) \|\| (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
mbed_official	87:085cde657901	1946	{
mbed_official	87:085cde657901	1947	/* Process Locked */
mbed_official	87:085cde657901	1948	__HAL_LOCK(hcryp);
mbed_official	87:085cde657901	1949
mbed_official	87:085cde657901	1950	inputaddr = (uint32_t)pPlainData;
mbed_official	87:085cde657901	1951	outputaddr = (uint32_t)pCypherData;
mbed_official	87:085cde657901	1952
mbed_official	87:085cde657901	1953	/* Change the CRYP peripheral state */
mbed_official	87:085cde657901	1954	hcryp->State = HAL_CRYP_STATE_BUSY;
mbed_official	87:085cde657901	1955
mbed_official	87:085cde657901	1956	/* Check if initialization phase has already been performed */
mbed_official	87:085cde657901	1957	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
mbed_official	87:085cde657901	1958	{
mbed_official	87:085cde657901	1959	/* Set the key */
mbed_official	87:085cde657901	1960	CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
mbed_official	87:085cde657901	1961
mbed_official	87:085cde657901	1962	/* Set the CRYP peripheral in AES GCM mode */
mbed_official	87:085cde657901	1963	__HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_GCM_ENCRYPT);
mbed_official	87:085cde657901	1964
mbed_official	87:085cde657901	1965	/* Set the Initialization Vector */
mbed_official	87:085cde657901	1966	CRYPEx_GCMCCM_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
mbed_official	87:085cde657901	1967
mbed_official	87:085cde657901	1968	/* Flush FIFO */
mbed_official	87:085cde657901	1969	__HAL_CRYP_FIFO_FLUSH();
mbed_official	87:085cde657901	1970
mbed_official	87:085cde657901	1971	/* Enable CRYP to start the init phase */
mbed_official	87:085cde657901	1972	__HAL_CRYP_ENABLE();
mbed_official	87:085cde657901	1973
mbed_official	87:085cde657901	1974	/* Get timeout */
mbed_official	87:085cde657901	1975	timeout = HAL_GetTick() + 1;
mbed_official	87:085cde657901	1976
mbed_official	87:085cde657901	1977	while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
mbed_official	87:085cde657901	1978	{
mbed_official	87:085cde657901	1979	/* Check for the Timeout */
mbed_official	87:085cde657901	1980	if(HAL_GetTick() >= timeout)
mbed_official	87:085cde657901	1981	{
mbed_official	87:085cde657901	1982	/* Change state */
mbed_official	87:085cde657901	1983	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official	87:085cde657901	1984
mbed_official	87:085cde657901	1985	/* Process Unlocked */
mbed_official	87:085cde657901	1986	__HAL_UNLOCK(hcryp);
mbed_official	87:085cde657901	1987
mbed_official	87:085cde657901	1988	return HAL_TIMEOUT;
mbed_official	87:085cde657901	1989	}
mbed_official	87:085cde657901	1990	}
mbed_official	87:085cde657901	1991	/* Flush FIFO */
mbed_official	87:085cde657901	1992	__HAL_CRYP_FIFO_FLUSH();
mbed_official	87:085cde657901	1993
mbed_official	87:085cde657901	1994	/* Set the header phase */
mbed_official	87:085cde657901	1995	if(CRYPEx_GCMCCM_SetHeaderPhase(hcryp, hcryp->Init.Header, hcryp->Init.HeaderSize, 1) != HAL_OK)
mbed_official	87:085cde657901	1996	{
mbed_official	87:085cde657901	1997	return HAL_TIMEOUT;
mbed_official	87:085cde657901	1998	}
mbed_official	87:085cde657901	1999	/* Disable the CRYP peripheral */
mbed_official	87:085cde657901	2000	__HAL_CRYP_DISABLE();
mbed_official	87:085cde657901	2001
mbed_official	87:085cde657901	2002	/* Select payload phase once the header phase is performed */
mbed_official	87:085cde657901	2003	__HAL_CRYP_SET_PHASE(CRYP_PHASE_PAYLOAD);
mbed_official	87:085cde657901	2004
mbed_official	87:085cde657901	2005	/* Flush FIFO */
mbed_official	87:085cde657901	2006	__HAL_CRYP_FIFO_FLUSH();
mbed_official	87:085cde657901	2007
mbed_official	87:085cde657901	2008	/* Set the phase */
mbed_official	87:085cde657901	2009	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
mbed_official	87:085cde657901	2010	}
mbed_official	87:085cde657901	2011
mbed_official	87:085cde657901	2012	/* Set the input and output addresses and start DMA transfer */
mbed_official	87:085cde657901	2013	CRYPEx_GCMCCM_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
mbed_official	87:085cde657901	2014
mbed_official	87:085cde657901	2015	/* Unlock process */
mbed_official	87:085cde657901	2016	__HAL_UNLOCK(hcryp);
mbed_official	87:085cde657901	2017
mbed_official	87:085cde657901	2018	/* Return function status */
mbed_official	87:085cde657901	2019	return HAL_OK;
mbed_official	87:085cde657901	2020	}
mbed_official	87:085cde657901	2021	else
mbed_official	87:085cde657901	2022	{
mbed_official	87:085cde657901	2023	return HAL_ERROR;
mbed_official	87:085cde657901	2024	}
mbed_official	87:085cde657901	2025	}
mbed_official	87:085cde657901	2026
mbed_official	87:085cde657901	2027	/**
mbed_official	87:085cde657901	2028	* @brief Initializes the CRYP peripheral in AES CCM encryption mode using interrupt.
mbed_official	87:085cde657901	2029	* @param hcryp: CRYP handle
mbed_official	87:085cde657901	2030	* @param pPlainData: Pointer to the plaintext buffer
mbed_official	87:085cde657901	2031	* @param Size: Length of the plaintext buffer, must be a multiple of 16
mbed_official	87:085cde657901	2032	* @param pCypherData: Pointer to the cyphertext buffer
mbed_official	87:085cde657901	2033	* @retval HAL status
mbed_official	87:085cde657901	2034	*/
mbed_official	87:085cde657901	2035	HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Encrypt_DMA(CRYP_HandleTypeDef hcryp, uint8_t pPlainData, uint16_t Size, uint8_t *pCypherData)
mbed_official	87:085cde657901	2036	{
mbed_official	87:085cde657901	2037	uint32_t timeout = 0;
mbed_official	87:085cde657901	2038	uint32_t inputaddr;
mbed_official	87:085cde657901	2039	uint32_t outputaddr;
mbed_official	87:085cde657901	2040	uint32_t headersize;
mbed_official	87:085cde657901	2041	uint32_t headeraddr;
mbed_official	87:085cde657901	2042	uint32_t loopcounter = 0;
mbed_official	87:085cde657901	2043	uint32_t bufferidx = 0;
mbed_official	87:085cde657901	2044	uint8_t blockb0[16] = {0};/* Block B0 */
mbed_official	87:085cde657901	2045	uint8_t ctr[16] = {0}; /* Counter */
mbed_official	87:085cde657901	2046	uint32_t b0addr = (uint32_t)blockb0;
mbed_official	87:085cde657901	2047
mbed_official	87:085cde657901	2048	if((hcryp->State == HAL_CRYP_STATE_READY) \|\| (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
mbed_official	87:085cde657901	2049	{
mbed_official	87:085cde657901	2050	/* Process Locked */
mbed_official	87:085cde657901	2051	__HAL_LOCK(hcryp);
mbed_official	87:085cde657901	2052
mbed_official	87:085cde657901	2053	inputaddr = (uint32_t)pPlainData;
mbed_official	87:085cde657901	2054	outputaddr = (uint32_t)pCypherData;
mbed_official	87:085cde657901	2055
mbed_official	87:085cde657901	2056	headersize = hcryp->Init.HeaderSize;
mbed_official	87:085cde657901	2057	headeraddr = (uint32_t)hcryp->Init.Header;
mbed_official	87:085cde657901	2058
mbed_official	87:085cde657901	2059	hcryp->CrypInCount = Size;
mbed_official	87:085cde657901	2060	hcryp->pCrypInBuffPtr = pPlainData;
mbed_official	87:085cde657901	2061	hcryp->pCrypOutBuffPtr = pCypherData;
mbed_official	87:085cde657901	2062	hcryp->CrypOutCount = Size;
mbed_official	87:085cde657901	2063
mbed_official	87:085cde657901	2064	/* Change the CRYP peripheral state */
mbed_official	87:085cde657901	2065	hcryp->State = HAL_CRYP_STATE_BUSY;
mbed_official	87:085cde657901	2066
mbed_official	87:085cde657901	2067	/* Check if initialization phase has already been performed */
mbed_official	87:085cde657901	2068	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
mbed_official	87:085cde657901	2069	{
mbed_official	87:085cde657901	2070	/********************** Formatting the header block *****************/
mbed_official	87:085cde657901	2071	if(headersize != 0)
mbed_official	87:085cde657901	2072	{
mbed_official	87:085cde657901	2073	/* Check that the associated data (or header) length is lower than 2^16 - 2^8 = 65536 - 256 = 65280 */
mbed_official	87:085cde657901	2074	if(headersize < 65280)
mbed_official	87:085cde657901	2075	{
mbed_official	87:085cde657901	2076	hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize >> 8) & 0xFF);
mbed_official	87:085cde657901	2077	hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize) & 0xFF);
mbed_official	87:085cde657901	2078	headersize += 2;
mbed_official	87:085cde657901	2079	}
mbed_official	87:085cde657901	2080	else
mbed_official	87:085cde657901	2081	{
mbed_official	87:085cde657901	2082	/* Header is encoded as 0xff \|\| 0xfe \|\| [headersize]32, i.e., six octets */
mbed_official	87:085cde657901	2083	hcryp->Init.pScratch[bufferidx++] = 0xFF;
mbed_official	87:085cde657901	2084	hcryp->Init.pScratch[bufferidx++] = 0xFE;
mbed_official	87:085cde657901	2085	hcryp->Init.pScratch[bufferidx++] = headersize & 0xff000000;
mbed_official	87:085cde657901	2086	hcryp->Init.pScratch[bufferidx++] = headersize & 0x00ff0000;
mbed_official	87:085cde657901	2087	hcryp->Init.pScratch[bufferidx++] = headersize & 0x0000ff00;
mbed_official	87:085cde657901	2088	hcryp->Init.pScratch[bufferidx++] = headersize & 0x000000ff;
mbed_official	87:085cde657901	2089	headersize += 6;
mbed_official	87:085cde657901	2090	}
mbed_official	87:085cde657901	2091	/* Copy the header buffer in internal buffer "hcryp->Init.pScratch" */
mbed_official	87:085cde657901	2092	for(loopcounter = 0; loopcounter < headersize; loopcounter++)
mbed_official	87:085cde657901	2093	{
mbed_official	87:085cde657901	2094	hcryp->Init.pScratch[bufferidx++] = hcryp->Init.Header[loopcounter];
mbed_official	87:085cde657901	2095	}
mbed_official	87:085cde657901	2096	/* Check if the header size is modulo 16 */
mbed_official	87:085cde657901	2097	if ((headersize % 16) != 0)
mbed_official	87:085cde657901	2098	{
mbed_official	87:085cde657901	2099	/* Padd the header buffer with 0s till the hcryp->Init.pScratch length is modulo 16 */
mbed_official	87:085cde657901	2100	for(loopcounter = headersize; loopcounter <= ((headersize/16) + 1) * 16; loopcounter++)
mbed_official	87:085cde657901	2101	{
mbed_official	87:085cde657901	2102	hcryp->Init.pScratch[loopcounter] = 0;
mbed_official	87:085cde657901	2103	}
mbed_official	87:085cde657901	2104	/* Set the header size to modulo 16 */
mbed_official	87:085cde657901	2105	headersize = ((headersize/16) + 1) * 16;
mbed_official	87:085cde657901	2106	}
mbed_official	87:085cde657901	2107	/* Set the pointer headeraddr to hcryp->Init.pScratch */
mbed_official	87:085cde657901	2108	headeraddr = (uint32_t)hcryp->Init.pScratch;
mbed_official	87:085cde657901	2109	}
mbed_official	87:085cde657901	2110	/********************* Formatting the block B0 **********************/
mbed_official	87:085cde657901	2111	if(headersize != 0)
mbed_official	87:085cde657901	2112	{
mbed_official	87:085cde657901	2113	blockb0[0] = 0x40;
mbed_official	87:085cde657901	2114	}
mbed_official	87:085cde657901	2115	/* Flags byte */
mbed_official	87:085cde657901	2116	/* blockb0[0] \|= 0u \| (((( (uint8_t) hcryp->Init.TagSize - 2) / 2) & 0x07 ) << 3 ) \| ( ( (uint8_t) (15 - hcryp->Init.IVSize) - 1) & 0x07) */
mbed_official	87:085cde657901	2117	blockb0[0] \|= (uint8_t)((uint8_t)((uint8_t)(((uint8_t)(hcryp->Init.TagSize - (uint8_t)(2))) >> 1) & (uint8_t)0x07 ) << 3);
mbed_official	87:085cde657901	2118	blockb0[0] \|= (uint8_t)((uint8_t)((uint8_t)((uint8_t)(15) - hcryp->Init.IVSize) - (uint8_t)1) & (uint8_t)0x07);
mbed_official	87:085cde657901	2119
mbed_official	87:085cde657901	2120	for (loopcounter = 0; loopcounter < hcryp->Init.IVSize; loopcounter++)
mbed_official	87:085cde657901	2121	{
mbed_official	87:085cde657901	2122	blockb0[loopcounter+1] = hcryp->Init.pInitVect[loopcounter];
mbed_official	87:085cde657901	2123	}
mbed_official	87:085cde657901	2124	for ( ; loopcounter < 13; loopcounter++)
mbed_official	87:085cde657901	2125	{
mbed_official	87:085cde657901	2126	blockb0[loopcounter+1] = 0;
mbed_official	87:085cde657901	2127	}
mbed_official	87:085cde657901	2128
mbed_official	87:085cde657901	2129	blockb0[14] = (Size >> 8);
mbed_official	87:085cde657901	2130	blockb0[15] = (Size & 0xFF);
mbed_official	87:085cde657901	2131
mbed_official	87:085cde657901	2132	/*********************** Formatting the initial counter *************/
mbed_official	87:085cde657901	2133	/* Byte 0:
mbed_official	87:085cde657901	2134	Bits 7 and 6 are reserved and shall be set to 0
mbed_official	87:085cde657901	2135	Bits 3, 4, and 5 shall also be set to 0, to ensure that all the counter
mbed_official	87:085cde657901	2136	blocks are distinct from B0
mbed_official	87:085cde657901	2137	Bits 0, 1, and 2 contain the same encoding of q as in B0
mbed_official	87:085cde657901	2138	*/
mbed_official	87:085cde657901	2139	ctr[0] = blockb0[0] & 0x07;
mbed_official	87:085cde657901	2140	/* byte 1 to NonceSize is the IV (Nonce) */
mbed_official	87:085cde657901	2141	for(loopcounter = 1; loopcounter < hcryp->Init.IVSize + 1; loopcounter++)
mbed_official	87:085cde657901	2142	{
mbed_official	87:085cde657901	2143	ctr[loopcounter] = blockb0[loopcounter];
mbed_official	87:085cde657901	2144	}
mbed_official	87:085cde657901	2145	/* Set the LSB to 1 */
mbed_official	87:085cde657901	2146	ctr[15] \|= 0x01;
mbed_official	87:085cde657901	2147
mbed_official	87:085cde657901	2148	/* Set the key */
mbed_official	87:085cde657901	2149	CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
mbed_official	87:085cde657901	2150
mbed_official	87:085cde657901	2151	/* Set the CRYP peripheral in AES CCM mode */
mbed_official	87:085cde657901	2152	__HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CCM_ENCRYPT);
mbed_official	87:085cde657901	2153
mbed_official	87:085cde657901	2154	/* Set the Initialization Vector */
mbed_official	87:085cde657901	2155	CRYPEx_GCMCCM_SetInitVector(hcryp, ctr, CRYP_KEYSIZE_128B);
mbed_official	87:085cde657901	2156
mbed_official	87:085cde657901	2157	/* Select init phase */
mbed_official	87:085cde657901	2158	__HAL_CRYP_SET_PHASE(CRYP_PHASE_INIT);
mbed_official	87:085cde657901	2159
mbed_official	87:085cde657901	2160	b0addr = (uint32_t)blockb0;
mbed_official	87:085cde657901	2161	/* Write the blockb0 block in the IN FIFO */
mbed_official	87:085cde657901	2162	CRYP->DR = (uint32_t)(b0addr);
mbed_official	87:085cde657901	2163	b0addr+=4;
mbed_official	87:085cde657901	2164	CRYP->DR = (uint32_t)(b0addr);
mbed_official	87:085cde657901	2165	b0addr+=4;
mbed_official	87:085cde657901	2166	CRYP->DR = (uint32_t)(b0addr);
mbed_official	87:085cde657901	2167	b0addr+=4;
mbed_official	87:085cde657901	2168	CRYP->DR = (uint32_t)(b0addr);
mbed_official	87:085cde657901	2169
mbed_official	87:085cde657901	2170	/* Enable the CRYP peripheral */
mbed_official	87:085cde657901	2171	__HAL_CRYP_ENABLE();
mbed_official	87:085cde657901	2172
mbed_official	87:085cde657901	2173	/* Get timeout */
mbed_official	87:085cde657901	2174	timeout = HAL_GetTick() + 1;
mbed_official	87:085cde657901	2175
mbed_official	87:085cde657901	2176	while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
mbed_official	87:085cde657901	2177	{
mbed_official	87:085cde657901	2178	/* Check for the Timeout */
mbed_official	87:085cde657901	2179	if(HAL_GetTick() >= timeout)
mbed_official	87:085cde657901	2180	{
mbed_official	87:085cde657901	2181	/* Change state */
mbed_official	87:085cde657901	2182	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official	87:085cde657901	2183
mbed_official	87:085cde657901	2184	/* Process Unlocked */
mbed_official	87:085cde657901	2185	__HAL_UNLOCK(hcryp);
mbed_official	87:085cde657901	2186
mbed_official	87:085cde657901	2187	return HAL_TIMEOUT;
mbed_official	87:085cde657901	2188	}
mbed_official	87:085cde657901	2189	}
mbed_official	87:085cde657901	2190	/*************************** Header phase ***************************/
mbed_official	87:085cde657901	2191	if(headersize != 0)
mbed_official	87:085cde657901	2192	{
mbed_official	87:085cde657901	2193	/* Select header phase */
mbed_official	87:085cde657901	2194	__HAL_CRYP_SET_PHASE(CRYP_PHASE_HEADER);
mbed_official	87:085cde657901	2195
mbed_official	87:085cde657901	2196	/* Enable Crypto processor */
mbed_official	87:085cde657901	2197	__HAL_CRYP_ENABLE();
mbed_official	87:085cde657901	2198
mbed_official	87:085cde657901	2199	for(loopcounter = 0; (loopcounter < headersize); loopcounter+=16)
mbed_official	87:085cde657901	2200	{
mbed_official	87:085cde657901	2201	/* Get timeout */
mbed_official	87:085cde657901	2202	timeout = HAL_GetTick() + 1;
mbed_official	87:085cde657901	2203
mbed_official	87:085cde657901	2204	while(HAL_IS_BIT_CLR(CRYP->SR, CRYP_FLAG_IFEM))
mbed_official	87:085cde657901	2205	{
mbed_official	87:085cde657901	2206	/* Check for the Timeout */
mbed_official	87:085cde657901	2207	if(HAL_GetTick() >= timeout)
mbed_official	87:085cde657901	2208	{
mbed_official	87:085cde657901	2209	/* Change state */
mbed_official	87:085cde657901	2210	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official	87:085cde657901	2211
mbed_official	87:085cde657901	2212	/* Process Unlocked */
mbed_official	87:085cde657901	2213	__HAL_UNLOCK(hcryp);
mbed_official	87:085cde657901	2214
mbed_official	87:085cde657901	2215	return HAL_TIMEOUT;
mbed_official	87:085cde657901	2216	}
mbed_official	87:085cde657901	2217	}
mbed_official	87:085cde657901	2218	/* Write the header block in the IN FIFO */
mbed_official	87:085cde657901	2219	CRYP->DR = (uint32_t)(headeraddr);
mbed_official	87:085cde657901	2220	headeraddr+=4;
mbed_official	87:085cde657901	2221	CRYP->DR = (uint32_t)(headeraddr);
mbed_official	87:085cde657901	2222	headeraddr+=4;
mbed_official	87:085cde657901	2223	CRYP->DR = (uint32_t)(headeraddr);
mbed_official	87:085cde657901	2224	headeraddr+=4;
mbed_official	87:085cde657901	2225	CRYP->DR = (uint32_t)(headeraddr);
mbed_official	87:085cde657901	2226	headeraddr+=4;
mbed_official	87:085cde657901	2227	}
mbed_official	87:085cde657901	2228
mbed_official	87:085cde657901	2229	/* Get timeout */
mbed_official	87:085cde657901	2230	timeout = HAL_GetTick() + 1;
mbed_official	87:085cde657901	2231
mbed_official	87:085cde657901	2232	while((CRYP->SR & CRYP_FLAG_BUSY) == CRYP_FLAG_BUSY)
mbed_official	87:085cde657901	2233	{
mbed_official	87:085cde657901	2234	/* Check for the Timeout */
mbed_official	87:085cde657901	2235	if(HAL_GetTick() >= timeout)
mbed_official	87:085cde657901	2236	{
mbed_official	87:085cde657901	2237	/* Change state */
mbed_official	87:085cde657901	2238	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official	87:085cde657901	2239
mbed_official	87:085cde657901	2240	/* Process Unlocked */
mbed_official	87:085cde657901	2241	__HAL_UNLOCK(hcryp);
mbed_official	87:085cde657901	2242
mbed_official	87:085cde657901	2243	return HAL_TIMEOUT;
mbed_official	87:085cde657901	2244	}
mbed_official	87:085cde657901	2245	}
mbed_official	87:085cde657901	2246	}
mbed_official	87:085cde657901	2247	/* Save formatted counter into the scratch buffer pScratch */
mbed_official	87:085cde657901	2248	for(loopcounter = 0; (loopcounter < 16); loopcounter++)
mbed_official	87:085cde657901	2249	{
mbed_official	87:085cde657901	2250	hcryp->Init.pScratch[loopcounter] = ctr[loopcounter];
mbed_official	87:085cde657901	2251	}
mbed_official	87:085cde657901	2252	/* Reset bit 0 */
mbed_official	87:085cde657901	2253	hcryp->Init.pScratch[15] &= 0xfe;
mbed_official	87:085cde657901	2254
mbed_official	87:085cde657901	2255	/* Select payload phase once the header phase is performed */
mbed_official	87:085cde657901	2256	__HAL_CRYP_SET_PHASE(CRYP_PHASE_PAYLOAD);
mbed_official	87:085cde657901	2257
mbed_official	87:085cde657901	2258	/* Flush FIFO */
mbed_official	87:085cde657901	2259	__HAL_CRYP_FIFO_FLUSH();
mbed_official	87:085cde657901	2260
mbed_official	87:085cde657901	2261	/* Set the phase */
mbed_official	87:085cde657901	2262	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
mbed_official	87:085cde657901	2263	}
mbed_official	87:085cde657901	2264
mbed_official	87:085cde657901	2265	/* Set the input and output addresses and start DMA transfer */
mbed_official	87:085cde657901	2266	CRYPEx_GCMCCM_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
mbed_official	87:085cde657901	2267
mbed_official	87:085cde657901	2268	/* Unlock process */
mbed_official	87:085cde657901	2269	__HAL_UNLOCK(hcryp);
mbed_official	87:085cde657901	2270
mbed_official	87:085cde657901	2271	/* Return function status */
mbed_official	87:085cde657901	2272	return HAL_OK;
mbed_official	87:085cde657901	2273	}
mbed_official	87:085cde657901	2274	else
mbed_official	87:085cde657901	2275	{
mbed_official	87:085cde657901	2276	return HAL_ERROR;
mbed_official	87:085cde657901	2277	}
mbed_official	87:085cde657901	2278	}
mbed_official	87:085cde657901	2279
mbed_official	87:085cde657901	2280	/**
mbed_official	87:085cde657901	2281	* @brief Initializes the CRYP peripheral in AES GCM decryption mode using DMA.
mbed_official	87:085cde657901	2282	* @param hcryp: CRYP handle
mbed_official	87:085cde657901	2283	* @param pCypherData: Pointer to the cyphertext buffer.
mbed_official	87:085cde657901	2284	* @param Size: Length of the cyphertext buffer, must be a multiple of 16
mbed_official	87:085cde657901	2285	* @param pPlainData: Pointer to the plaintext buffer
mbed_official	87:085cde657901	2286	* @retval HAL status
mbed_official	87:085cde657901	2287	*/
mbed_official	87:085cde657901	2288	HAL_StatusTypeDef HAL_CRYPEx_AESGCM_Decrypt_DMA(CRYP_HandleTypeDef hcryp, uint8_t pCypherData, uint16_t Size, uint8_t *pPlainData)
mbed_official	87:085cde657901	2289	{
mbed_official	87:085cde657901	2290	uint32_t timeout = 0;
mbed_official	87:085cde657901	2291	uint32_t inputaddr;
mbed_official	87:085cde657901	2292	uint32_t outputaddr;
mbed_official	87:085cde657901	2293
mbed_official	87:085cde657901	2294	if((hcryp->State == HAL_CRYP_STATE_READY) \|\| (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
mbed_official	87:085cde657901	2295	{
mbed_official	87:085cde657901	2296	/* Process Locked */
mbed_official	87:085cde657901	2297	__HAL_LOCK(hcryp);
mbed_official	87:085cde657901	2298
mbed_official	87:085cde657901	2299	inputaddr = (uint32_t)pCypherData;
mbed_official	87:085cde657901	2300	outputaddr = (uint32_t)pPlainData;
mbed_official	87:085cde657901	2301
mbed_official	87:085cde657901	2302	/* Change the CRYP peripheral state */
mbed_official	87:085cde657901	2303	hcryp->State = HAL_CRYP_STATE_BUSY;
mbed_official	87:085cde657901	2304
mbed_official	87:085cde657901	2305	/* Check if initialization phase has already been performed */
mbed_official	87:085cde657901	2306	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
mbed_official	87:085cde657901	2307	{
mbed_official	87:085cde657901	2308	/* Set the key */
mbed_official	87:085cde657901	2309	CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
mbed_official	87:085cde657901	2310
mbed_official	87:085cde657901	2311	/* Set the CRYP peripheral in AES GCM decryption mode */
mbed_official	87:085cde657901	2312	__HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_GCM_DECRYPT);
mbed_official	87:085cde657901	2313
mbed_official	87:085cde657901	2314	/* Set the Initialization Vector */
mbed_official	87:085cde657901	2315	CRYPEx_GCMCCM_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
mbed_official	87:085cde657901	2316
mbed_official	87:085cde657901	2317	/* Enable CRYP to start the init phase */
mbed_official	87:085cde657901	2318	__HAL_CRYP_ENABLE();
mbed_official	87:085cde657901	2319
mbed_official	87:085cde657901	2320	/* Get timeout */
mbed_official	87:085cde657901	2321	timeout = HAL_GetTick() + 1;
mbed_official	87:085cde657901	2322
mbed_official	87:085cde657901	2323	while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
mbed_official	87:085cde657901	2324	{
mbed_official	87:085cde657901	2325	/* Check for the Timeout */
mbed_official	87:085cde657901	2326	if(HAL_GetTick() >= timeout)
mbed_official	87:085cde657901	2327	{
mbed_official	87:085cde657901	2328	/* Change state */
mbed_official	87:085cde657901	2329	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official	87:085cde657901	2330
mbed_official	87:085cde657901	2331	/* Process Unlocked */
mbed_official	87:085cde657901	2332	__HAL_UNLOCK(hcryp);
mbed_official	87:085cde657901	2333
mbed_official	87:085cde657901	2334	return HAL_TIMEOUT;
mbed_official	87:085cde657901	2335	}
mbed_official	87:085cde657901	2336	}
mbed_official	87:085cde657901	2337
mbed_official	87:085cde657901	2338	/* Set the header phase */
mbed_official	87:085cde657901	2339	if(CRYPEx_GCMCCM_SetHeaderPhase(hcryp, hcryp->Init.Header, hcryp->Init.HeaderSize, 1) != HAL_OK)
mbed_official	87:085cde657901	2340	{
mbed_official	87:085cde657901	2341	return HAL_TIMEOUT;
mbed_official	87:085cde657901	2342	}
mbed_official	87:085cde657901	2343	/* Disable the CRYP peripheral */
mbed_official	87:085cde657901	2344	__HAL_CRYP_DISABLE();
mbed_official	87:085cde657901	2345
mbed_official	87:085cde657901	2346	/* Select payload phase once the header phase is performed */
mbed_official	87:085cde657901	2347	__HAL_CRYP_SET_PHASE(CRYP_PHASE_PAYLOAD);
mbed_official	87:085cde657901	2348
mbed_official	87:085cde657901	2349	/* Set the phase */
mbed_official	87:085cde657901	2350	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
mbed_official	87:085cde657901	2351	}
mbed_official	87:085cde657901	2352
mbed_official	87:085cde657901	2353	/* Set the input and output addresses and start DMA transfer */
mbed_official	87:085cde657901	2354	CRYPEx_GCMCCM_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
mbed_official	87:085cde657901	2355
mbed_official	87:085cde657901	2356	/* Unlock process */
mbed_official	87:085cde657901	2357	__HAL_UNLOCK(hcryp);
mbed_official	87:085cde657901	2358
mbed_official	87:085cde657901	2359	/* Return function status */
mbed_official	87:085cde657901	2360	return HAL_OK;
mbed_official	87:085cde657901	2361	}
mbed_official	87:085cde657901	2362	else
mbed_official	87:085cde657901	2363	{
mbed_official	87:085cde657901	2364	return HAL_ERROR;
mbed_official	87:085cde657901	2365	}
mbed_official	87:085cde657901	2366	}
mbed_official	87:085cde657901	2367
mbed_official	87:085cde657901	2368	/**
mbed_official	87:085cde657901	2369	* @brief Initializes the CRYP peripheral in AES CCM decryption mode using DMA
mbed_official	87:085cde657901	2370	* then decrypted pCypherData. The cypher data are available in pPlainData.
mbed_official	87:085cde657901	2371	* @param hcryp: CRYP handle
mbed_official	87:085cde657901	2372	* @param pCypherData: Pointer to the cyphertext buffer
mbed_official	87:085cde657901	2373	* @param Size: Length of the plaintext buffer, must be a multiple of 16
mbed_official	87:085cde657901	2374	* @param pPlainData: Pointer to the plaintext buffer
mbed_official	87:085cde657901	2375	* @retval HAL status
mbed_official	87:085cde657901	2376	*/
mbed_official	87:085cde657901	2377	HAL_StatusTypeDef HAL_CRYPEx_AESCCM_Decrypt_DMA(CRYP_HandleTypeDef hcryp, uint8_t pCypherData, uint16_t Size, uint8_t *pPlainData)
mbed_official	87:085cde657901	2378	{
mbed_official	87:085cde657901	2379	uint32_t timeout = 0;
mbed_official	87:085cde657901	2380	uint32_t inputaddr;
mbed_official	87:085cde657901	2381	uint32_t outputaddr;
mbed_official	87:085cde657901	2382	uint32_t headersize;
mbed_official	87:085cde657901	2383	uint32_t headeraddr;
mbed_official	87:085cde657901	2384	uint32_t loopcounter = 0;
mbed_official	87:085cde657901	2385	uint32_t bufferidx = 0;
mbed_official	87:085cde657901	2386	uint8_t blockb0[16] = {0};/* Block B0 */
mbed_official	87:085cde657901	2387	uint8_t ctr[16] = {0}; /* Counter */
mbed_official	87:085cde657901	2388	uint32_t b0addr = (uint32_t)blockb0;
mbed_official	87:085cde657901	2389
mbed_official	87:085cde657901	2390	if((hcryp->State == HAL_CRYP_STATE_READY) \|\| (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
mbed_official	87:085cde657901	2391	{
mbed_official	87:085cde657901	2392	/* Process Locked */
mbed_official	87:085cde657901	2393	__HAL_LOCK(hcryp);
mbed_official	87:085cde657901	2394
mbed_official	87:085cde657901	2395	inputaddr = (uint32_t)pCypherData;
mbed_official	87:085cde657901	2396	outputaddr = (uint32_t)pPlainData;
mbed_official	87:085cde657901	2397
mbed_official	87:085cde657901	2398	headersize = hcryp->Init.HeaderSize;
mbed_official	87:085cde657901	2399	headeraddr = (uint32_t)hcryp->Init.Header;
mbed_official	87:085cde657901	2400
mbed_official	87:085cde657901	2401	hcryp->CrypInCount = Size;
mbed_official	87:085cde657901	2402	hcryp->pCrypInBuffPtr = pCypherData;
mbed_official	87:085cde657901	2403	hcryp->pCrypOutBuffPtr = pPlainData;
mbed_official	87:085cde657901	2404	hcryp->CrypOutCount = Size;
mbed_official	87:085cde657901	2405
mbed_official	87:085cde657901	2406	/* Change the CRYP peripheral state */
mbed_official	87:085cde657901	2407	hcryp->State = HAL_CRYP_STATE_BUSY;
mbed_official	87:085cde657901	2408
mbed_official	87:085cde657901	2409	/* Check if initialization phase has already been performed */
mbed_official	87:085cde657901	2410	if(hcryp->Phase == HAL_CRYP_PHASE_READY)
mbed_official	87:085cde657901	2411	{
mbed_official	87:085cde657901	2412	/********************** Formatting the header block *****************/
mbed_official	87:085cde657901	2413	if(headersize != 0)
mbed_official	87:085cde657901	2414	{
mbed_official	87:085cde657901	2415	/* Check that the associated data (or header) length is lower than 2^16 - 2^8 = 65536 - 256 = 65280 */
mbed_official	87:085cde657901	2416	if(headersize < 65280)
mbed_official	87:085cde657901	2417	{
mbed_official	87:085cde657901	2418	hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize >> 8) & 0xFF);
mbed_official	87:085cde657901	2419	hcryp->Init.pScratch[bufferidx++] = (uint8_t) ((headersize) & 0xFF);
mbed_official	87:085cde657901	2420	headersize += 2;
mbed_official	87:085cde657901	2421	}
mbed_official	87:085cde657901	2422	else
mbed_official	87:085cde657901	2423	{
mbed_official	87:085cde657901	2424	/* Header is encoded as 0xff \|\| 0xfe \|\| [headersize]32, i.e., six octets */
mbed_official	87:085cde657901	2425	hcryp->Init.pScratch[bufferidx++] = 0xFF;
mbed_official	87:085cde657901	2426	hcryp->Init.pScratch[bufferidx++] = 0xFE;
mbed_official	87:085cde657901	2427	hcryp->Init.pScratch[bufferidx++] = headersize & 0xff000000;
mbed_official	87:085cde657901	2428	hcryp->Init.pScratch[bufferidx++] = headersize & 0x00ff0000;
mbed_official	87:085cde657901	2429	hcryp->Init.pScratch[bufferidx++] = headersize & 0x0000ff00;
mbed_official	87:085cde657901	2430	hcryp->Init.pScratch[bufferidx++] = headersize & 0x000000ff;
mbed_official	87:085cde657901	2431	headersize += 6;
mbed_official	87:085cde657901	2432	}
mbed_official	87:085cde657901	2433	/* Copy the header buffer in internal buffer "hcryp->Init.pScratch" */
mbed_official	87:085cde657901	2434	for(loopcounter = 0; loopcounter < headersize; loopcounter++)
mbed_official	87:085cde657901	2435	{
mbed_official	87:085cde657901	2436	hcryp->Init.pScratch[bufferidx++] = hcryp->Init.Header[loopcounter];
mbed_official	87:085cde657901	2437	}
mbed_official	87:085cde657901	2438	/* Check if the header size is modulo 16 */
mbed_official	87:085cde657901	2439	if ((headersize % 16) != 0)
mbed_official	87:085cde657901	2440	{
mbed_official	87:085cde657901	2441	/* Padd the header buffer with 0s till the hcryp->Init.pScratch length is modulo 16 */
mbed_official	87:085cde657901	2442	for(loopcounter = headersize; loopcounter <= ((headersize/16) + 1) * 16; loopcounter++)
mbed_official	87:085cde657901	2443	{
mbed_official	87:085cde657901	2444	hcryp->Init.pScratch[loopcounter] = 0;
mbed_official	87:085cde657901	2445	}
mbed_official	87:085cde657901	2446	/* Set the header size to modulo 16 */
mbed_official	87:085cde657901	2447	headersize = ((headersize/16) + 1) * 16;
mbed_official	87:085cde657901	2448	}
mbed_official	87:085cde657901	2449	/* Set the pointer headeraddr to hcryp->Init.pScratch */
mbed_official	87:085cde657901	2450	headeraddr = (uint32_t)hcryp->Init.pScratch;
mbed_official	87:085cde657901	2451	}
mbed_official	87:085cde657901	2452	/********************* Formatting the block B0 **********************/
mbed_official	87:085cde657901	2453	if(headersize != 0)
mbed_official	87:085cde657901	2454	{
mbed_official	87:085cde657901	2455	blockb0[0] = 0x40;
mbed_official	87:085cde657901	2456	}
mbed_official	87:085cde657901	2457	/* Flags byte */
mbed_official	87:085cde657901	2458	/* blockb0[0] \|= 0u \| (((( (uint8_t) hcryp->Init.TagSize - 2) / 2) & 0x07 ) << 3 ) \| ( ( (uint8_t) (15 - hcryp->Init.IVSize) - 1) & 0x07) */
mbed_official	87:085cde657901	2459	blockb0[0] \|= (uint8_t)((uint8_t)((uint8_t)(((uint8_t)(hcryp->Init.TagSize - (uint8_t)(2))) >> 1) & (uint8_t)0x07 ) << 3);
mbed_official	87:085cde657901	2460	blockb0[0] \|= (uint8_t)((uint8_t)((uint8_t)((uint8_t)(15) - hcryp->Init.IVSize) - (uint8_t)1) & (uint8_t)0x07);
mbed_official	87:085cde657901	2461
mbed_official	87:085cde657901	2462	for (loopcounter = 0; loopcounter < hcryp->Init.IVSize; loopcounter++)
mbed_official	87:085cde657901	2463	{
mbed_official	87:085cde657901	2464	blockb0[loopcounter+1] = hcryp->Init.pInitVect[loopcounter];
mbed_official	87:085cde657901	2465	}
mbed_official	87:085cde657901	2466	for ( ; loopcounter < 13; loopcounter++)
mbed_official	87:085cde657901	2467	{
mbed_official	87:085cde657901	2468	blockb0[loopcounter+1] = 0;
mbed_official	87:085cde657901	2469	}
mbed_official	87:085cde657901	2470
mbed_official	87:085cde657901	2471	blockb0[14] = (Size >> 8);
mbed_official	87:085cde657901	2472	blockb0[15] = (Size & 0xFF);
mbed_official	87:085cde657901	2473
mbed_official	87:085cde657901	2474	/*********************** Formatting the initial counter *************/
mbed_official	87:085cde657901	2475	/* Byte 0:
mbed_official	87:085cde657901	2476	Bits 7 and 6 are reserved and shall be set to 0
mbed_official	87:085cde657901	2477	Bits 3, 4, and 5 shall also be set to 0, to ensure that all the counter
mbed_official	87:085cde657901	2478	blocks are distinct from B0
mbed_official	87:085cde657901	2479	Bits 0, 1, and 2 contain the same encoding of q as in B0
mbed_official	87:085cde657901	2480	*/
mbed_official	87:085cde657901	2481	ctr[0] = blockb0[0] & 0x07;
mbed_official	87:085cde657901	2482	/* byte 1 to NonceSize is the IV (Nonce) */
mbed_official	87:085cde657901	2483	for(loopcounter = 1; loopcounter < hcryp->Init.IVSize + 1; loopcounter++)
mbed_official	87:085cde657901	2484	{
mbed_official	87:085cde657901	2485	ctr[loopcounter] = blockb0[loopcounter];
mbed_official	87:085cde657901	2486	}
mbed_official	87:085cde657901	2487	/* Set the LSB to 1 */
mbed_official	87:085cde657901	2488	ctr[15] \|= 0x01;
mbed_official	87:085cde657901	2489
mbed_official	87:085cde657901	2490	/* Set the key */
mbed_official	87:085cde657901	2491	CRYPEx_GCMCCM_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
mbed_official	87:085cde657901	2492
mbed_official	87:085cde657901	2493	/* Set the CRYP peripheral in AES CCM mode */
mbed_official	87:085cde657901	2494	__HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CCM_DECRYPT);
mbed_official	87:085cde657901	2495
mbed_official	87:085cde657901	2496	/* Set the Initialization Vector */
mbed_official	87:085cde657901	2497	CRYPEx_GCMCCM_SetInitVector(hcryp, ctr, CRYP_KEYSIZE_128B);
mbed_official	87:085cde657901	2498
mbed_official	87:085cde657901	2499	/* Select init phase */
mbed_official	87:085cde657901	2500	__HAL_CRYP_SET_PHASE(CRYP_PHASE_INIT);
mbed_official	87:085cde657901	2501
mbed_official	87:085cde657901	2502	b0addr = (uint32_t)blockb0;
mbed_official	87:085cde657901	2503	/* Write the blockb0 block in the IN FIFO */
mbed_official	87:085cde657901	2504	CRYP->DR = (uint32_t)(b0addr);
mbed_official	87:085cde657901	2505	b0addr+=4;
mbed_official	87:085cde657901	2506	CRYP->DR = (uint32_t)(b0addr);
mbed_official	87:085cde657901	2507	b0addr+=4;
mbed_official	87:085cde657901	2508	CRYP->DR = (uint32_t)(b0addr);
mbed_official	87:085cde657901	2509	b0addr+=4;
mbed_official	87:085cde657901	2510	CRYP->DR = (uint32_t)(b0addr);
mbed_official	87:085cde657901	2511
mbed_official	87:085cde657901	2512	/* Enable the CRYP peripheral */
mbed_official	87:085cde657901	2513	__HAL_CRYP_ENABLE();
mbed_official	87:085cde657901	2514
mbed_official	87:085cde657901	2515	/* Get timeout */
mbed_official	87:085cde657901	2516	timeout = HAL_GetTick() + 1;
mbed_official	87:085cde657901	2517
mbed_official	87:085cde657901	2518	while((CRYP->CR & CRYP_CR_CRYPEN) == CRYP_CR_CRYPEN)
mbed_official	87:085cde657901	2519	{
mbed_official	87:085cde657901	2520	/* Check for the Timeout */
mbed_official	87:085cde657901	2521
mbed_official	87:085cde657901	2522	if(HAL_GetTick() >= timeout)
mbed_official	87:085cde657901	2523	{
mbed_official	87:085cde657901	2524	/* Change state */
mbed_official	87:085cde657901	2525	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official	87:085cde657901	2526
mbed_official	87:085cde657901	2527	/* Process Unlocked */
mbed_official	87:085cde657901	2528	__HAL_UNLOCK(hcryp);
mbed_official	87:085cde657901	2529
mbed_official	87:085cde657901	2530	return HAL_TIMEOUT;
mbed_official	87:085cde657901	2531
mbed_official	87:085cde657901	2532	}
mbed_official	87:085cde657901	2533	}
mbed_official	87:085cde657901	2534	/*************************** Header phase ***************************/
mbed_official	87:085cde657901	2535	if(headersize != 0)
mbed_official	87:085cde657901	2536	{
mbed_official	87:085cde657901	2537	/* Select header phase */
mbed_official	87:085cde657901	2538	__HAL_CRYP_SET_PHASE(CRYP_PHASE_HEADER);
mbed_official	87:085cde657901	2539
mbed_official	87:085cde657901	2540	/* Enable Crypto processor */
mbed_official	87:085cde657901	2541	__HAL_CRYP_ENABLE();
mbed_official	87:085cde657901	2542
mbed_official	87:085cde657901	2543	for(loopcounter = 0; (loopcounter < headersize); loopcounter+=16)
mbed_official	87:085cde657901	2544	{
mbed_official	87:085cde657901	2545	/* Get timeout */
mbed_official	87:085cde657901	2546	timeout = HAL_GetTick() + 1;
mbed_official	87:085cde657901	2547
mbed_official	87:085cde657901	2548	while(HAL_IS_BIT_CLR(CRYP->SR, CRYP_FLAG_IFEM))
mbed_official	87:085cde657901	2549	{
mbed_official	87:085cde657901	2550	/* Check for the Timeout */
mbed_official	87:085cde657901	2551	if(HAL_GetTick() >= timeout)
mbed_official	87:085cde657901	2552	{
mbed_official	87:085cde657901	2553	/* Change state */
mbed_official	87:085cde657901	2554	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official	87:085cde657901	2555
mbed_official	87:085cde657901	2556	/* Process Unlocked */
mbed_official	87:085cde657901	2557	__HAL_UNLOCK(hcryp);
mbed_official	87:085cde657901	2558
mbed_official	87:085cde657901	2559	return HAL_TIMEOUT;
mbed_official	87:085cde657901	2560	}
mbed_official	87:085cde657901	2561	}
mbed_official	87:085cde657901	2562	/* Write the header block in the IN FIFO */
mbed_official	87:085cde657901	2563	CRYP->DR = (uint32_t)(headeraddr);
mbed_official	87:085cde657901	2564	headeraddr+=4;
mbed_official	87:085cde657901	2565	CRYP->DR = (uint32_t)(headeraddr);
mbed_official	87:085cde657901	2566	headeraddr+=4;
mbed_official	87:085cde657901	2567	CRYP->DR = (uint32_t)(headeraddr);
mbed_official	87:085cde657901	2568	headeraddr+=4;
mbed_official	87:085cde657901	2569	CRYP->DR = (uint32_t)(headeraddr);
mbed_official	87:085cde657901	2570	headeraddr+=4;
mbed_official	87:085cde657901	2571	}
mbed_official	87:085cde657901	2572
mbed_official	87:085cde657901	2573	/* Get timeout */
mbed_official	87:085cde657901	2574	timeout = HAL_GetTick() + 1;
mbed_official	87:085cde657901	2575
mbed_official	87:085cde657901	2576	while((CRYP->SR & CRYP_FLAG_BUSY) == CRYP_FLAG_BUSY)
mbed_official	87:085cde657901	2577	{
mbed_official	87:085cde657901	2578	/* Check for the Timeout */
mbed_official	87:085cde657901	2579	if(HAL_GetTick() >= timeout)
mbed_official	87:085cde657901	2580	{
mbed_official	87:085cde657901	2581	/* Change state */
mbed_official	87:085cde657901	2582	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official	87:085cde657901	2583
mbed_official	87:085cde657901	2584	/* Process Unlocked */
mbed_official	87:085cde657901	2585	__HAL_UNLOCK(hcryp);
mbed_official	87:085cde657901	2586
mbed_official	87:085cde657901	2587	return HAL_TIMEOUT;
mbed_official	87:085cde657901	2588	}
mbed_official	87:085cde657901	2589	}
mbed_official	87:085cde657901	2590	}
mbed_official	87:085cde657901	2591	/* Save formatted counter into the scratch buffer pScratch */
mbed_official	87:085cde657901	2592	for(loopcounter = 0; (loopcounter < 16); loopcounter++)
mbed_official	87:085cde657901	2593	{
mbed_official	87:085cde657901	2594	hcryp->Init.pScratch[loopcounter] = ctr[loopcounter];
mbed_official	87:085cde657901	2595	}
mbed_official	87:085cde657901	2596	/* Reset bit 0 */
mbed_official	87:085cde657901	2597	hcryp->Init.pScratch[15] &= 0xfe;
mbed_official	87:085cde657901	2598	/* Select payload phase once the header phase is performed */
mbed_official	87:085cde657901	2599	__HAL_CRYP_SET_PHASE(CRYP_PHASE_PAYLOAD);
mbed_official	87:085cde657901	2600
mbed_official	87:085cde657901	2601	/* Flush FIFO */
mbed_official	87:085cde657901	2602	__HAL_CRYP_FIFO_FLUSH();
mbed_official	87:085cde657901	2603
mbed_official	87:085cde657901	2604	/* Set the phase */
mbed_official	87:085cde657901	2605	hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
mbed_official	87:085cde657901	2606	}
mbed_official	87:085cde657901	2607	/* Set the input and output addresses and start DMA transfer */
mbed_official	87:085cde657901	2608	CRYPEx_GCMCCM_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
mbed_official	87:085cde657901	2609
mbed_official	87:085cde657901	2610	/* Unlock process */
mbed_official	87:085cde657901	2611	__HAL_UNLOCK(hcryp);
mbed_official	87:085cde657901	2612
mbed_official	87:085cde657901	2613	/* Return function status */
mbed_official	87:085cde657901	2614	return HAL_OK;
mbed_official	87:085cde657901	2615	}
mbed_official	87:085cde657901	2616	else
mbed_official	87:085cde657901	2617	{
mbed_official	87:085cde657901	2618	return HAL_ERROR;
mbed_official	87:085cde657901	2619	}
mbed_official	87:085cde657901	2620	}
mbed_official	87:085cde657901	2621
mbed_official	87:085cde657901	2622	/**
mbed_official	87:085cde657901	2623	* @brief This function handles CRYP interrupt request.
mbed_official	87:085cde657901	2624	* @param hcryp: CRYP handle
mbed_official	87:085cde657901	2625	* @retval None
mbed_official	87:085cde657901	2626	*/
mbed_official	87:085cde657901	2627	void HAL_CRYPEx_GCMCCM_IRQHandler(CRYP_HandleTypeDef *hcryp)
mbed_official	87:085cde657901	2628	{
mbed_official	87:085cde657901	2629	switch(CRYP->CR & CRYP_CR_ALGOMODE_DIRECTION)
mbed_official	87:085cde657901	2630	{
mbed_official	87:085cde657901	2631	case CRYP_CR_ALGOMODE_AES_GCM_ENCRYPT:
mbed_official	87:085cde657901	2632	HAL_CRYPEx_AESGCM_Encrypt_IT(hcryp, NULL, 0, NULL);
mbed_official	87:085cde657901	2633	break;
mbed_official	87:085cde657901	2634
mbed_official	87:085cde657901	2635	case CRYP_CR_ALGOMODE_AES_GCM_DECRYPT:
mbed_official	87:085cde657901	2636	HAL_CRYPEx_AESGCM_Decrypt_IT(hcryp, NULL, 0, NULL);
mbed_official	87:085cde657901	2637	break;
mbed_official	87:085cde657901	2638
mbed_official	87:085cde657901	2639	case CRYP_CR_ALGOMODE_AES_CCM_ENCRYPT:
mbed_official	87:085cde657901	2640	HAL_CRYPEx_AESCCM_Encrypt_IT(hcryp, NULL, 0, NULL);
mbed_official	87:085cde657901	2641	break;
mbed_official	87:085cde657901	2642
mbed_official	87:085cde657901	2643	case CRYP_CR_ALGOMODE_AES_CCM_DECRYPT:
mbed_official	87:085cde657901	2644	HAL_CRYPEx_AESCCM_Decrypt_IT(hcryp, NULL, 0, NULL);
mbed_official	87:085cde657901	2645	break;
mbed_official	87:085cde657901	2646
mbed_official	87:085cde657901	2647	default:
mbed_official	87:085cde657901	2648	break;
mbed_official	87:085cde657901	2649	}
mbed_official	87:085cde657901	2650	}
mbed_official	87:085cde657901	2651
mbed_official	87:085cde657901	2652	/**
mbed_official	87:085cde657901	2653	* @}
mbed_official	87:085cde657901	2654	*/
mbed_official	87:085cde657901	2655
mbed_official	87:085cde657901	2656	/**
mbed_official	87:085cde657901	2657	* @brief DMA CRYP Input Data process complete callback.
mbed_official	87:085cde657901	2658	* @param hdma: DMA handle
mbed_official	87:085cde657901	2659	* @retval None
mbed_official	87:085cde657901	2660	*/
mbed_official	87:085cde657901	2661	static void CRYPEx_GCMCCM_DMAInCplt(DMA_HandleTypeDef *hdma)
mbed_official	87:085cde657901	2662	{
mbed_official	87:085cde657901	2663	CRYP_HandleTypeDef* hcryp = ( CRYP_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official	87:085cde657901	2664
mbed_official	87:085cde657901	2665	/* Disable the DMA transfer for input Fifo request by resetting the DIEN bit
mbed_official	87:085cde657901	2666	in the DMACR register */
mbed_official	87:085cde657901	2667	CRYP->DMACR &= (uint32_t)(~CRYP_DMACR_DIEN);
mbed_official	87:085cde657901	2668
mbed_official	87:085cde657901	2669	/* Call input data transfer complete callback */
mbed_official	87:085cde657901	2670	HAL_CRYP_InCpltCallback(hcryp);
mbed_official	87:085cde657901	2671	}
mbed_official	87:085cde657901	2672
mbed_official	87:085cde657901	2673	/**
mbed_official	87:085cde657901	2674	* @brief DMA CRYP Output Data process complete callback.
mbed_official	87:085cde657901	2675	* @param hdma: DMA handle
mbed_official	87:085cde657901	2676	* @retval None
mbed_official	87:085cde657901	2677	*/
mbed_official	87:085cde657901	2678	static void CRYPEx_GCMCCM_DMAOutCplt(DMA_HandleTypeDef *hdma)
mbed_official	87:085cde657901	2679	{
mbed_official	87:085cde657901	2680	CRYP_HandleTypeDef* hcryp = ( CRYP_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official	87:085cde657901	2681
mbed_official	87:085cde657901	2682	/* Disable the DMA transfer for output Fifo request by resetting the DOEN bit
mbed_official	87:085cde657901	2683	in the DMACR register */
mbed_official	87:085cde657901	2684	CRYP->DMACR &= (uint32_t)(~CRYP_DMACR_DOEN);
mbed_official	87:085cde657901	2685
mbed_official	87:085cde657901	2686	/* Enable the CRYP peripheral */
mbed_official	87:085cde657901	2687	__HAL_CRYP_DISABLE();
mbed_official	87:085cde657901	2688
mbed_official	87:085cde657901	2689	/* Change the CRYP peripheral state */
mbed_official	87:085cde657901	2690	hcryp->State = HAL_CRYP_STATE_READY;
mbed_official	87:085cde657901	2691
mbed_official	87:085cde657901	2692	/* Call output data transfer complete callback */
mbed_official	87:085cde657901	2693	HAL_CRYP_OutCpltCallback(hcryp);
mbed_official	87:085cde657901	2694	}
mbed_official	87:085cde657901	2695
mbed_official	87:085cde657901	2696	/**
mbed_official	87:085cde657901	2697	* @brief DMA CRYP communication error callback.
mbed_official	87:085cde657901	2698	* @param hdma: DMA handle
mbed_official	87:085cde657901	2699	* @retval None
mbed_official	87:085cde657901	2700	*/
mbed_official	87:085cde657901	2701	static void CRYPEx_GCMCCM_DMAError(DMA_HandleTypeDef *hdma)
mbed_official	87:085cde657901	2702	{
mbed_official	87:085cde657901	2703	CRYP_HandleTypeDef* hcryp = ( CRYP_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official	87:085cde657901	2704	hcryp->State= HAL_CRYP_STATE_READY;
mbed_official	87:085cde657901	2705	HAL_CRYP_ErrorCallback(hcryp);
mbed_official	87:085cde657901	2706	}
mbed_official	87:085cde657901	2707
mbed_official	87:085cde657901	2708	/**
mbed_official	87:085cde657901	2709	* @brief Writes the Key in Key registers.
mbed_official	87:085cde657901	2710	* @param hcryp: CRYP handle
mbed_official	87:085cde657901	2711	* @param Key: Pointer to Key buffer
mbed_official	87:085cde657901	2712	* @param KeySize: Size of Key
mbed_official	87:085cde657901	2713	* @retval None
mbed_official	87:085cde657901	2714	*/
mbed_official	87:085cde657901	2715	static void CRYPEx_GCMCCM_SetKey(CRYP_HandleTypeDef hcryp, uint8_t Key, uint32_t KeySize)
mbed_official	87:085cde657901	2716	{
mbed_official	87:085cde657901	2717	uint32_t keyaddr = (uint32_t)Key;
mbed_official	87:085cde657901	2718
mbed_official	87:085cde657901	2719	switch(KeySize)
mbed_official	87:085cde657901	2720	{
mbed_official	87:085cde657901	2721	case CRYP_KEYSIZE_256B:
mbed_official	87:085cde657901	2722	/* Key Initialisation */
mbed_official	87:085cde657901	2723	CRYP->K0LR = __REV((uint32_t)(keyaddr));
mbed_official	87:085cde657901	2724	keyaddr+=4;
mbed_official	87:085cde657901	2725	CRYP->K0RR = __REV((uint32_t)(keyaddr));
mbed_official	87:085cde657901	2726	keyaddr+=4;
mbed_official	87:085cde657901	2727	CRYP->K1LR = __REV((uint32_t)(keyaddr));
mbed_official	87:085cde657901	2728	keyaddr+=4;
mbed_official	87:085cde657901	2729	CRYP->K1RR = __REV((uint32_t)(keyaddr));
mbed_official	87:085cde657901	2730	keyaddr+=4;
mbed_official	87:085cde657901	2731	CRYP->K2LR = __REV((uint32_t)(keyaddr));
mbed_official	87:085cde657901	2732	keyaddr+=4;
mbed_official	87:085cde657901	2733	CRYP->K2RR = __REV((uint32_t)(keyaddr));
mbed_official	87:085cde657901	2734	keyaddr+=4;
mbed_official	87:085cde657901	2735	CRYP->K3LR = __REV((uint32_t)(keyaddr));
mbed_official	87:085cde657901	2736	keyaddr+=4;
mbed_official	87:085cde657901	2737	CRYP->K3RR = __REV((uint32_t)(keyaddr));
mbed_official	87:085cde657901	2738	break;
mbed_official	87:085cde657901	2739	case CRYP_KEYSIZE_192B:
mbed_official	87:085cde657901	2740	CRYP->K1LR = __REV((uint32_t)(keyaddr));
mbed_official	87:085cde657901	2741	keyaddr+=4;
mbed_official	87:085cde657901	2742	CRYP->K1RR = __REV((uint32_t)(keyaddr));
mbed_official	87:085cde657901	2743	keyaddr+=4;
mbed_official	87:085cde657901	2744	CRYP->K2LR = __REV((uint32_t)(keyaddr));
mbed_official	87:085cde657901	2745	keyaddr+=4;
mbed_official	87:085cde657901	2746	CRYP->K2RR = __REV((uint32_t)(keyaddr));
mbed_official	87:085cde657901	2747	keyaddr+=4;
mbed_official	87:085cde657901	2748	CRYP->K3LR = __REV((uint32_t)(keyaddr));
mbed_official	87:085cde657901	2749	keyaddr+=4;
mbed_official	87:085cde657901	2750	CRYP->K3RR = __REV((uint32_t)(keyaddr));
mbed_official	87:085cde657901	2751	break;
mbed_official	87:085cde657901	2752	case CRYP_KEYSIZE_128B:
mbed_official	87:085cde657901	2753	CRYP->K2LR = __REV((uint32_t)(keyaddr));
mbed_official	87:085cde657901	2754	keyaddr+=4;
mbed_official	87:085cde657901	2755	CRYP->K2RR = __REV((uint32_t)(keyaddr));
mbed_official	87:085cde657901	2756	keyaddr+=4;
mbed_official	87:085cde657901	2757	CRYP->K3LR = __REV((uint32_t)(keyaddr));
mbed_official	87:085cde657901	2758	keyaddr+=4;
mbed_official	87:085cde657901	2759	CRYP->K3RR = __REV((uint32_t)(keyaddr));
mbed_official	87:085cde657901	2760	break;
mbed_official	87:085cde657901	2761	default:
mbed_official	87:085cde657901	2762	break;
mbed_official	87:085cde657901	2763	}
mbed_official	87:085cde657901	2764	}
mbed_official	87:085cde657901	2765
mbed_official	87:085cde657901	2766	/**
mbed_official	87:085cde657901	2767	* @brief Writes the InitVector/InitCounter in IV registers.
mbed_official	87:085cde657901	2768	* @param hcryp: CRYP handle
mbed_official	87:085cde657901	2769	* @param InitVector: Pointer to InitVector/InitCounter buffer
mbed_official	87:085cde657901	2770	* @param IVSize: Size of the InitVector/InitCounter
mbed_official	87:085cde657901	2771	* @retval None
mbed_official	87:085cde657901	2772	*/
mbed_official	87:085cde657901	2773	static void CRYPEx_GCMCCM_SetInitVector(CRYP_HandleTypeDef hcryp, uint8_t InitVector, uint32_t IVSize)
mbed_official	87:085cde657901	2774	{
mbed_official	87:085cde657901	2775	uint32_t ivaddr = (uint32_t)InitVector;
mbed_official	87:085cde657901	2776
mbed_official	87:085cde657901	2777	switch(IVSize)
mbed_official	87:085cde657901	2778	{
mbed_official	87:085cde657901	2779	case CRYP_KEYSIZE_128B:
mbed_official	87:085cde657901	2780	CRYP->IV0LR = __REV((uint32_t)(ivaddr));
mbed_official	87:085cde657901	2781	ivaddr+=4;
mbed_official	87:085cde657901	2782	CRYP->IV0RR = __REV((uint32_t)(ivaddr));
mbed_official	87:085cde657901	2783	ivaddr+=4;
mbed_official	87:085cde657901	2784	CRYP->IV1LR = __REV((uint32_t)(ivaddr));
mbed_official	87:085cde657901	2785	ivaddr+=4;
mbed_official	87:085cde657901	2786	CRYP->IV1RR = __REV((uint32_t)(ivaddr));
mbed_official	87:085cde657901	2787	break;
mbed_official	87:085cde657901	2788	/* Whatever key size 192 or 256, Init vector is written in IV0LR and IV0RR */
mbed_official	87:085cde657901	2789	case CRYP_KEYSIZE_192B:
mbed_official	87:085cde657901	2790	CRYP->IV0LR = __REV((uint32_t)(ivaddr));
mbed_official	87:085cde657901	2791	ivaddr+=4;
mbed_official	87:085cde657901	2792	CRYP->IV0RR = __REV((uint32_t)(ivaddr));
mbed_official	87:085cde657901	2793	break;
mbed_official	87:085cde657901	2794	case CRYP_KEYSIZE_256B:
mbed_official	87:085cde657901	2795	CRYP->IV0LR = __REV((uint32_t)(ivaddr));
mbed_official	87:085cde657901	2796	ivaddr+=4;
mbed_official	87:085cde657901	2797	CRYP->IV0RR = __REV((uint32_t)(ivaddr));
mbed_official	87:085cde657901	2798	break;
mbed_official	87:085cde657901	2799	default:
mbed_official	87:085cde657901	2800	break;
mbed_official	87:085cde657901	2801	}
mbed_official	87:085cde657901	2802	}
mbed_official	87:085cde657901	2803
mbed_official	87:085cde657901	2804	/**
mbed_official	87:085cde657901	2805	* @brief Process Data: Writes Input data in polling mode and read the Output data.
mbed_official	87:085cde657901	2806	* @param hcryp: CRYP handle
mbed_official	87:085cde657901	2807	* @param Input: Pointer to the Input buffer.
mbed_official	87:085cde657901	2808	* @param Ilength: Length of the Input buffer, must be a multiple of 16
mbed_official	87:085cde657901	2809	* @param Output: Pointer to the returned buffer
mbed_official	87:085cde657901	2810	* @param Timeout: Timeout value
mbed_official	87:085cde657901	2811	* @retval None
mbed_official	87:085cde657901	2812	*/
mbed_official	87:085cde657901	2813	static HAL_StatusTypeDef CRYPEx_GCMCCM_ProcessData(CRYP_HandleTypeDef hcryp, uint8_t Input, uint16_t Ilength, uint8_t *Output, uint32_t Timeout)
mbed_official	87:085cde657901	2814	{
mbed_official	87:085cde657901	2815	uint32_t timeout = 0;
mbed_official	87:085cde657901	2816	uint32_t i = 0;
mbed_official	87:085cde657901	2817	uint32_t inputaddr = (uint32_t)Input;
mbed_official	87:085cde657901	2818	uint32_t outputaddr = (uint32_t)Output;
mbed_official	87:085cde657901	2819
mbed_official	87:085cde657901	2820	for(i=0; (i < Ilength); i+=16)
mbed_official	87:085cde657901	2821	{
mbed_official	87:085cde657901	2822	/* Write the Input block in the IN FIFO */
mbed_official	87:085cde657901	2823	CRYP->DR = (uint32_t)(inputaddr);
mbed_official	87:085cde657901	2824	inputaddr+=4;
mbed_official	87:085cde657901	2825	CRYP->DR = (uint32_t)(inputaddr);
mbed_official	87:085cde657901	2826	inputaddr+=4;
mbed_official	87:085cde657901	2827	CRYP->DR = (uint32_t)(inputaddr);
mbed_official	87:085cde657901	2828	inputaddr+=4;
mbed_official	87:085cde657901	2829	CRYP->DR = (uint32_t)(inputaddr);
mbed_official	87:085cde657901	2830	inputaddr+=4;
mbed_official	87:085cde657901	2831
mbed_official	87:085cde657901	2832	/* Get timeout */
mbed_official	87:085cde657901	2833	timeout = HAL_GetTick() + Timeout;
mbed_official	87:085cde657901	2834
mbed_official	87:085cde657901	2835	while(HAL_IS_BIT_CLR(CRYP->SR, CRYP_FLAG_OFNE))
mbed_official	87:085cde657901	2836	{
mbed_official	87:085cde657901	2837	/* Check for the Timeout */
mbed_official	87:085cde657901	2838	if(Timeout != HAL_MAX_DELAY)
mbed_official	87:085cde657901	2839	{
mbed_official	87:085cde657901	2840	if(HAL_GetTick() >= timeout)
mbed_official	87:085cde657901	2841	{
mbed_official	87:085cde657901	2842	/* Change state */
mbed_official	87:085cde657901	2843	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official	87:085cde657901	2844
mbed_official	87:085cde657901	2845	/* Process Unlocked */
mbed_official	87:085cde657901	2846	__HAL_UNLOCK(hcryp);
mbed_official	87:085cde657901	2847
mbed_official	87:085cde657901	2848	return HAL_TIMEOUT;
mbed_official	87:085cde657901	2849	}
mbed_official	87:085cde657901	2850	}
mbed_official	87:085cde657901	2851	}
mbed_official	87:085cde657901	2852	/* Read the Output block from the OUT FIFO */
mbed_official	87:085cde657901	2853	(uint32_t)(outputaddr) = CRYP->DOUT;
mbed_official	87:085cde657901	2854	outputaddr+=4;
mbed_official	87:085cde657901	2855	(uint32_t)(outputaddr) = CRYP->DOUT;
mbed_official	87:085cde657901	2856	outputaddr+=4;
mbed_official	87:085cde657901	2857	(uint32_t)(outputaddr) = CRYP->DOUT;
mbed_official	87:085cde657901	2858	outputaddr+=4;
mbed_official	87:085cde657901	2859	(uint32_t)(outputaddr) = CRYP->DOUT;
mbed_official	87:085cde657901	2860	outputaddr+=4;
mbed_official	87:085cde657901	2861	}
mbed_official	87:085cde657901	2862	/* Return function status */
mbed_official	87:085cde657901	2863	return HAL_OK;
mbed_official	87:085cde657901	2864	}
mbed_official	87:085cde657901	2865
mbed_official	87:085cde657901	2866	/**
mbed_official	87:085cde657901	2867	* @brief Sets the header phase
mbed_official	87:085cde657901	2868	* @param hcryp: CRYP handle
mbed_official	87:085cde657901	2869	* @param Input: Pointer to the Input buffer.
mbed_official	87:085cde657901	2870	* @param Ilength: Length of the Input buffer, must be a multiple of 16
mbed_official	87:085cde657901	2871	* @param Timeout: Timeout value
mbed_official	87:085cde657901	2872	* @retval None
mbed_official	87:085cde657901	2873	*/
mbed_official	87:085cde657901	2874	static HAL_StatusTypeDef CRYPEx_GCMCCM_SetHeaderPhase(CRYP_HandleTypeDef hcryp, uint8_t Input, uint16_t Ilength, uint32_t Timeout)
mbed_official	87:085cde657901	2875	{
mbed_official	87:085cde657901	2876	uint32_t timeout = 0;
mbed_official	87:085cde657901	2877	uint32_t loopcounter = 0;
mbed_official	87:085cde657901	2878	uint32_t headeraddr = (uint32_t)Input;
mbed_official	87:085cde657901	2879
mbed_official	87:085cde657901	2880	/*************************** Header phase *******************************/
mbed_official	87:085cde657901	2881	if(hcryp->Init.HeaderSize != 0)
mbed_official	87:085cde657901	2882	{
mbed_official	87:085cde657901	2883	/* Select header phase */
mbed_official	87:085cde657901	2884	__HAL_CRYP_SET_PHASE(CRYP_PHASE_HEADER);
mbed_official	87:085cde657901	2885	/* Enable the CRYP peripheral */
mbed_official	87:085cde657901	2886	__HAL_CRYP_ENABLE();
mbed_official	87:085cde657901	2887
mbed_official	87:085cde657901	2888	for(loopcounter = 0; (loopcounter < hcryp->Init.HeaderSize); loopcounter+=16)
mbed_official	87:085cde657901	2889	{
mbed_official	87:085cde657901	2890	/* Get timeout */
mbed_official	87:085cde657901	2891	timeout = HAL_GetTick() + Timeout;
mbed_official	87:085cde657901	2892
mbed_official	87:085cde657901	2893	while(HAL_IS_BIT_CLR(CRYP->SR, CRYP_FLAG_IFEM))
mbed_official	87:085cde657901	2894	{
mbed_official	87:085cde657901	2895	/* Check for the Timeout */
mbed_official	87:085cde657901	2896	if(Timeout != HAL_MAX_DELAY)
mbed_official	87:085cde657901	2897	{
mbed_official	87:085cde657901	2898	if(HAL_GetTick() >= timeout)
mbed_official	87:085cde657901	2899	{
mbed_official	87:085cde657901	2900	/* Change state */
mbed_official	87:085cde657901	2901	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official	87:085cde657901	2902
mbed_official	87:085cde657901	2903	/* Process Unlocked */
mbed_official	87:085cde657901	2904	__HAL_UNLOCK(hcryp);
mbed_official	87:085cde657901	2905
mbed_official	87:085cde657901	2906	return HAL_TIMEOUT;
mbed_official	87:085cde657901	2907	}
mbed_official	87:085cde657901	2908	}
mbed_official	87:085cde657901	2909	}
mbed_official	87:085cde657901	2910	/* Write the Input block in the IN FIFO */
mbed_official	87:085cde657901	2911	CRYP->DR = (uint32_t)(headeraddr);
mbed_official	87:085cde657901	2912	headeraddr+=4;
mbed_official	87:085cde657901	2913	CRYP->DR = (uint32_t)(headeraddr);
mbed_official	87:085cde657901	2914	headeraddr+=4;
mbed_official	87:085cde657901	2915	CRYP->DR = (uint32_t)(headeraddr);
mbed_official	87:085cde657901	2916	headeraddr+=4;
mbed_official	87:085cde657901	2917	CRYP->DR = (uint32_t)(headeraddr);
mbed_official	87:085cde657901	2918	headeraddr+=4;
mbed_official	87:085cde657901	2919	}
mbed_official	87:085cde657901	2920
mbed_official	87:085cde657901	2921	/* Wait until the complete message has been processed */
mbed_official	87:085cde657901	2922
mbed_official	87:085cde657901	2923	/* Get timeout */
mbed_official	87:085cde657901	2924	timeout = HAL_GetTick() + Timeout;
mbed_official	87:085cde657901	2925
mbed_official	87:085cde657901	2926	while((CRYP->SR & CRYP_FLAG_BUSY) == CRYP_FLAG_BUSY)
mbed_official	87:085cde657901	2927	{
mbed_official	87:085cde657901	2928	/* Check for the Timeout */
mbed_official	87:085cde657901	2929	if(Timeout != HAL_MAX_DELAY)
mbed_official	87:085cde657901	2930	{
mbed_official	87:085cde657901	2931	if(HAL_GetTick() >= timeout)
mbed_official	87:085cde657901	2932	{
mbed_official	87:085cde657901	2933	/* Change state */
mbed_official	87:085cde657901	2934	hcryp->State = HAL_CRYP_STATE_TIMEOUT;
mbed_official	87:085cde657901	2935
mbed_official	87:085cde657901	2936	/* Process Unlocked */
mbed_official	87:085cde657901	2937	__HAL_UNLOCK(hcryp);
mbed_official	87:085cde657901	2938
mbed_official	87:085cde657901	2939	return HAL_TIMEOUT;
mbed_official	87:085cde657901	2940	}
mbed_official	87:085cde657901	2941	}
mbed_official	87:085cde657901	2942	}
mbed_official	87:085cde657901	2943	}
mbed_official	87:085cde657901	2944	/* Return function status */
mbed_official	87:085cde657901	2945	return HAL_OK;
mbed_official	87:085cde657901	2946	}
mbed_official	87:085cde657901	2947
mbed_official	87:085cde657901	2948	/**
mbed_official	87:085cde657901	2949	* @brief Sets the DMA configuration and start the DMA transfert.
mbed_official	87:085cde657901	2950	* @param hcryp: CRYP handle
mbed_official	87:085cde657901	2951	* @param inputaddr: Address of the Input buffer
mbed_official	87:085cde657901	2952	* @param Size: Size of the Input buffer, must be a multiple of 16
mbed_official	87:085cde657901	2953	* @param outputaddr: Address of the Output buffer
mbed_official	87:085cde657901	2954	* @retval None
mbed_official	87:085cde657901	2955	*/
mbed_official	87:085cde657901	2956	static void CRYPEx_GCMCCM_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size, uint32_t outputaddr)
mbed_official	87:085cde657901	2957	{
mbed_official	87:085cde657901	2958	/* Set the CRYP DMA transfer complete callback */
mbed_official	87:085cde657901	2959	hcryp->hdmain->XferCpltCallback = CRYPEx_GCMCCM_DMAInCplt;
mbed_official	87:085cde657901	2960	/* Set the DMA error callback */
mbed_official	87:085cde657901	2961	hcryp->hdmain->XferErrorCallback = CRYPEx_GCMCCM_DMAError;
mbed_official	87:085cde657901	2962
mbed_official	87:085cde657901	2963	/* Set the CRYP DMA transfer complete callback */
mbed_official	87:085cde657901	2964	hcryp->hdmaout->XferCpltCallback = CRYPEx_GCMCCM_DMAOutCplt;
mbed_official	87:085cde657901	2965	/* Set the DMA error callback */
mbed_official	87:085cde657901	2966	hcryp->hdmaout->XferErrorCallback = CRYPEx_GCMCCM_DMAError;
mbed_official	87:085cde657901	2967
mbed_official	87:085cde657901	2968	/* Enable the CRYP peripheral */
mbed_official	87:085cde657901	2969	__HAL_CRYP_ENABLE();
mbed_official	87:085cde657901	2970
mbed_official	87:085cde657901	2971	/* Enable the DMA In DMA Stream */
mbed_official	87:085cde657901	2972	HAL_DMA_Start_IT(hcryp->hdmain, inputaddr, (uint32_t)&CRYP->DR, Size/4);
mbed_official	87:085cde657901	2973
mbed_official	87:085cde657901	2974	/* Enable In DMA request */
mbed_official	87:085cde657901	2975	CRYP->DMACR = CRYP_DMACR_DIEN;
mbed_official	87:085cde657901	2976
mbed_official	87:085cde657901	2977	/* Enable the DMA Out DMA Stream */
mbed_official	87:085cde657901	2978	HAL_DMA_Start_IT(hcryp->hdmaout, (uint32_t)&CRYP->DOUT, outputaddr, Size/4);
mbed_official	87:085cde657901	2979
mbed_official	87:085cde657901	2980	/* Enable Out DMA request */
mbed_official	87:085cde657901	2981	CRYP->DMACR \|= CRYP_DMACR_DOEN;
mbed_official	87:085cde657901	2982	}
mbed_official	87:085cde657901	2983
mbed_official	87:085cde657901	2984	/**
mbed_official	87:085cde657901	2985	* @}
mbed_official	87:085cde657901	2986	*/
mbed_official	87:085cde657901	2987	#endif /* STM32F437xx \|\| STM32F439xx */
mbed_official	87:085cde657901	2988
mbed_official	87:085cde657901	2989	#endif /* HAL_CRYP_MODULE_ENABLED */
mbed_official	87:085cde657901	2990	/**
mbed_official	87:085cde657901	2991	* @}
mbed_official	87:085cde657901	2992	*/
mbed_official	87:085cde657901	2993
mbed_official	87:085cde657901	2994	/**
mbed_official	87:085cde657901	2995	* @}
mbed_official	87:085cde657901	2996	*/
mbed_official	87:085cde657901	2997
mbed_official	87:085cde657901	2998	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Type:	Library
Created:	19 Apr 2014
Imports:	9
Forks:	0
Commits:	164
Dependents:	0
Dependencies:	0
Followers:	1

targets/cmsis/TARGET_STM/TARGET_NUCLEO_F401RE/stm32f4xx_hal_cryp_ex.c@106:ced8cbb51063, 2014-02-26 (annotated)

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