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targets/cmsis/TARGET_STM/TARGET_NUCLEO_F030R8/stm32f0xx_tim.h@106:ced8cbb51063, 2014-02-26 (annotated)
- Committer:
- mbed_official
- Date:
- Wed Feb 26 09:45:12 2014 +0000
- Revision:
- 106:ced8cbb51063
- Parent:
- 76:aeb1df146756
Synchronized with git revision 4222735eff5868389433f0e9271976b39c8115cd
Full URL: https://github.com/mbedmicro/mbed/commit/4222735eff5868389433f0e9271976b39c8115cd/
[NUCLEO_xxx] Update STM32CubeF4 driver V1.0.0 + update license
Who changed what in which revision?
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mbed_official | 76:aeb1df146756 | 1 | /** |
mbed_official | 76:aeb1df146756 | 2 | ****************************************************************************** |
mbed_official | 76:aeb1df146756 | 3 | * @file stm32f0xx_tim.h |
mbed_official | 76:aeb1df146756 | 4 | * @author MCD Application Team |
mbed_official | 76:aeb1df146756 | 5 | * @version V1.3.0 |
mbed_official | 76:aeb1df146756 | 6 | * @date 16-January-2014 |
mbed_official | 76:aeb1df146756 | 7 | * @brief This file contains all the functions prototypes for the TIM |
mbed_official | 76:aeb1df146756 | 8 | * firmware library. |
mbed_official | 76:aeb1df146756 | 9 | ****************************************************************************** |
mbed_official | 76:aeb1df146756 | 10 | * @attention |
mbed_official | 76:aeb1df146756 | 11 | * |
mbed_official | 106:ced8cbb51063 | 12 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
mbed_official | 76:aeb1df146756 | 13 | * |
mbed_official | 106:ced8cbb51063 | 14 | * Redistribution and use in source and binary forms, with or without modification, |
mbed_official | 106:ced8cbb51063 | 15 | * are permitted provided that the following conditions are met: |
mbed_official | 106:ced8cbb51063 | 16 | * 1. Redistributions of source code must retain the above copyright notice, |
mbed_official | 106:ced8cbb51063 | 17 | * this list of conditions and the following disclaimer. |
mbed_official | 106:ced8cbb51063 | 18 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
mbed_official | 106:ced8cbb51063 | 19 | * this list of conditions and the following disclaimer in the documentation |
mbed_official | 106:ced8cbb51063 | 20 | * and/or other materials provided with the distribution. |
mbed_official | 106:ced8cbb51063 | 21 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
mbed_official | 106:ced8cbb51063 | 22 | * may be used to endorse or promote products derived from this software |
mbed_official | 106:ced8cbb51063 | 23 | * without specific prior written permission. |
mbed_official | 76:aeb1df146756 | 24 | * |
mbed_official | 106:ced8cbb51063 | 25 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
mbed_official | 106:ced8cbb51063 | 26 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
mbed_official | 106:ced8cbb51063 | 27 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
mbed_official | 106:ced8cbb51063 | 28 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
mbed_official | 106:ced8cbb51063 | 29 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
mbed_official | 106:ced8cbb51063 | 30 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
mbed_official | 106:ced8cbb51063 | 31 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
mbed_official | 106:ced8cbb51063 | 32 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
mbed_official | 106:ced8cbb51063 | 33 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
mbed_official | 106:ced8cbb51063 | 34 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
mbed_official | 76:aeb1df146756 | 35 | * |
mbed_official | 76:aeb1df146756 | 36 | ****************************************************************************** |
mbed_official | 76:aeb1df146756 | 37 | */ |
mbed_official | 76:aeb1df146756 | 38 | |
mbed_official | 76:aeb1df146756 | 39 | /* Define to prevent recursive inclusion -------------------------------------*/ |
mbed_official | 76:aeb1df146756 | 40 | #ifndef __STM32F0XX_TIM_H |
mbed_official | 76:aeb1df146756 | 41 | #define __STM32F0XX_TIM_H |
mbed_official | 76:aeb1df146756 | 42 | |
mbed_official | 76:aeb1df146756 | 43 | #ifdef __cplusplus |
mbed_official | 76:aeb1df146756 | 44 | extern "C" { |
mbed_official | 76:aeb1df146756 | 45 | #endif |
mbed_official | 76:aeb1df146756 | 46 | |
mbed_official | 76:aeb1df146756 | 47 | /* Includes ------------------------------------------------------------------*/ |
mbed_official | 76:aeb1df146756 | 48 | #include "stm32f0xx.h" |
mbed_official | 76:aeb1df146756 | 49 | |
mbed_official | 76:aeb1df146756 | 50 | /** @addtogroup STM32F0xx_StdPeriph_Driver |
mbed_official | 76:aeb1df146756 | 51 | * @{ |
mbed_official | 76:aeb1df146756 | 52 | */ |
mbed_official | 76:aeb1df146756 | 53 | |
mbed_official | 76:aeb1df146756 | 54 | /** @addtogroup TIM |
mbed_official | 76:aeb1df146756 | 55 | * @{ |
mbed_official | 76:aeb1df146756 | 56 | */ |
mbed_official | 76:aeb1df146756 | 57 | |
mbed_official | 76:aeb1df146756 | 58 | /* Exported types ------------------------------------------------------------*/ |
mbed_official | 76:aeb1df146756 | 59 | |
mbed_official | 76:aeb1df146756 | 60 | /** |
mbed_official | 76:aeb1df146756 | 61 | * @brief TIM Time Base Init structure definition |
mbed_official | 76:aeb1df146756 | 62 | * @note This sturcture is used with all TIMx. |
mbed_official | 76:aeb1df146756 | 63 | */ |
mbed_official | 76:aeb1df146756 | 64 | |
mbed_official | 76:aeb1df146756 | 65 | typedef struct |
mbed_official | 76:aeb1df146756 | 66 | { |
mbed_official | 76:aeb1df146756 | 67 | uint16_t TIM_Prescaler; /*!< Specifies the prescaler value used to divide the TIM clock. |
mbed_official | 76:aeb1df146756 | 68 | This parameter can be a number between 0x0000 and 0xFFFF */ |
mbed_official | 76:aeb1df146756 | 69 | |
mbed_official | 76:aeb1df146756 | 70 | uint16_t TIM_CounterMode; /*!< Specifies the counter mode. |
mbed_official | 76:aeb1df146756 | 71 | This parameter can be a value of @ref TIM_Counter_Mode */ |
mbed_official | 76:aeb1df146756 | 72 | |
mbed_official | 76:aeb1df146756 | 73 | uint32_t TIM_Period; /*!< Specifies the period value to be loaded into the active |
mbed_official | 76:aeb1df146756 | 74 | Auto-Reload Register at the next update event. |
mbed_official | 76:aeb1df146756 | 75 | This parameter must be a number between 0x0000 and 0xFFFF. */ |
mbed_official | 76:aeb1df146756 | 76 | |
mbed_official | 76:aeb1df146756 | 77 | uint16_t TIM_ClockDivision; /*!< Specifies the clock division. |
mbed_official | 76:aeb1df146756 | 78 | This parameter can be a value of @ref TIM_Clock_Division_CKD */ |
mbed_official | 76:aeb1df146756 | 79 | |
mbed_official | 76:aeb1df146756 | 80 | uint8_t TIM_RepetitionCounter; /*!< Specifies the repetition counter value. Each time the RCR downcounter |
mbed_official | 76:aeb1df146756 | 81 | reaches zero, an update event is generated and counting restarts |
mbed_official | 76:aeb1df146756 | 82 | from the RCR value (N). |
mbed_official | 76:aeb1df146756 | 83 | This means in PWM mode that (N+1) corresponds to: |
mbed_official | 76:aeb1df146756 | 84 | - the number of PWM periods in edge-aligned mode |
mbed_official | 76:aeb1df146756 | 85 | - the number of half PWM period in center-aligned mode |
mbed_official | 76:aeb1df146756 | 86 | This parameter must be a number between 0x00 and 0xFF. |
mbed_official | 76:aeb1df146756 | 87 | @note This parameter is valid only for TIM1. */ |
mbed_official | 76:aeb1df146756 | 88 | } TIM_TimeBaseInitTypeDef; |
mbed_official | 76:aeb1df146756 | 89 | |
mbed_official | 76:aeb1df146756 | 90 | /** |
mbed_official | 76:aeb1df146756 | 91 | * @brief TIM Output Compare Init structure definition |
mbed_official | 76:aeb1df146756 | 92 | */ |
mbed_official | 76:aeb1df146756 | 93 | |
mbed_official | 76:aeb1df146756 | 94 | typedef struct |
mbed_official | 76:aeb1df146756 | 95 | { |
mbed_official | 76:aeb1df146756 | 96 | uint16_t TIM_OCMode; /*!< Specifies the TIM mode. |
mbed_official | 76:aeb1df146756 | 97 | This parameter can be a value of @ref TIM_Output_Compare_and_PWM_modes */ |
mbed_official | 76:aeb1df146756 | 98 | |
mbed_official | 76:aeb1df146756 | 99 | uint16_t TIM_OutputState; /*!< Specifies the TIM Output Compare state. |
mbed_official | 76:aeb1df146756 | 100 | This parameter can be a value of @ref TIM_Output_Compare_state */ |
mbed_official | 76:aeb1df146756 | 101 | |
mbed_official | 76:aeb1df146756 | 102 | uint16_t TIM_OutputNState; /*!< Specifies the TIM complementary Output Compare state. |
mbed_official | 76:aeb1df146756 | 103 | This parameter can be a value of @ref TIM_Output_Compare_N_state |
mbed_official | 76:aeb1df146756 | 104 | @note This parameter is valid only for TIM1. */ |
mbed_official | 76:aeb1df146756 | 105 | |
mbed_official | 76:aeb1df146756 | 106 | uint32_t TIM_Pulse; /*!< Specifies the pulse value to be loaded into the Capture Compare Register. |
mbed_official | 76:aeb1df146756 | 107 | This parameter can be a number between 0x0000 and 0xFFFF ( or 0xFFFFFFFF |
mbed_official | 76:aeb1df146756 | 108 | for TIM2) */ |
mbed_official | 76:aeb1df146756 | 109 | |
mbed_official | 76:aeb1df146756 | 110 | uint16_t TIM_OCPolarity; /*!< Specifies the output polarity. |
mbed_official | 76:aeb1df146756 | 111 | This parameter can be a value of @ref TIM_Output_Compare_Polarity */ |
mbed_official | 76:aeb1df146756 | 112 | |
mbed_official | 76:aeb1df146756 | 113 | uint16_t TIM_OCNPolarity; /*!< Specifies the complementary output polarity. |
mbed_official | 76:aeb1df146756 | 114 | This parameter can be a value of @ref TIM_Output_Compare_N_Polarity |
mbed_official | 76:aeb1df146756 | 115 | @note This parameter is valid only for TIM1. */ |
mbed_official | 76:aeb1df146756 | 116 | |
mbed_official | 76:aeb1df146756 | 117 | uint16_t TIM_OCIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state. |
mbed_official | 76:aeb1df146756 | 118 | This parameter can be a value of @ref TIM_Output_Compare_Idle_State |
mbed_official | 76:aeb1df146756 | 119 | @note This parameter is valid only for TIM1. */ |
mbed_official | 76:aeb1df146756 | 120 | |
mbed_official | 76:aeb1df146756 | 121 | uint16_t TIM_OCNIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state. |
mbed_official | 76:aeb1df146756 | 122 | This parameter can be a value of @ref TIM_Output_Compare_N_Idle_State |
mbed_official | 76:aeb1df146756 | 123 | @note This parameter is valid only for TIM1. */ |
mbed_official | 76:aeb1df146756 | 124 | } TIM_OCInitTypeDef; |
mbed_official | 76:aeb1df146756 | 125 | |
mbed_official | 76:aeb1df146756 | 126 | /** |
mbed_official | 76:aeb1df146756 | 127 | * @brief TIM Input Capture Init structure definition |
mbed_official | 76:aeb1df146756 | 128 | */ |
mbed_official | 76:aeb1df146756 | 129 | |
mbed_official | 76:aeb1df146756 | 130 | typedef struct |
mbed_official | 76:aeb1df146756 | 131 | { |
mbed_official | 76:aeb1df146756 | 132 | |
mbed_official | 76:aeb1df146756 | 133 | uint16_t TIM_Channel; /*!< Specifies the TIM channel. |
mbed_official | 76:aeb1df146756 | 134 | This parameter can be a value of @ref TIM_Channel */ |
mbed_official | 76:aeb1df146756 | 135 | |
mbed_official | 76:aeb1df146756 | 136 | uint16_t TIM_ICPolarity; /*!< Specifies the active edge of the input signal. |
mbed_official | 76:aeb1df146756 | 137 | This parameter can be a value of @ref TIM_Input_Capture_Polarity */ |
mbed_official | 76:aeb1df146756 | 138 | |
mbed_official | 76:aeb1df146756 | 139 | uint16_t TIM_ICSelection; /*!< Specifies the input. |
mbed_official | 76:aeb1df146756 | 140 | This parameter can be a value of @ref TIM_Input_Capture_Selection */ |
mbed_official | 76:aeb1df146756 | 141 | |
mbed_official | 76:aeb1df146756 | 142 | uint16_t TIM_ICPrescaler; /*!< Specifies the Input Capture Prescaler. |
mbed_official | 76:aeb1df146756 | 143 | This parameter can be a value of @ref TIM_Input_Capture_Prescaler */ |
mbed_official | 76:aeb1df146756 | 144 | |
mbed_official | 76:aeb1df146756 | 145 | uint16_t TIM_ICFilter; /*!< Specifies the input capture filter. |
mbed_official | 76:aeb1df146756 | 146 | This parameter can be a number between 0x0 and 0xF */ |
mbed_official | 76:aeb1df146756 | 147 | } TIM_ICInitTypeDef; |
mbed_official | 76:aeb1df146756 | 148 | |
mbed_official | 76:aeb1df146756 | 149 | /** |
mbed_official | 76:aeb1df146756 | 150 | * @brief TIM_BDTR structure definition |
mbed_official | 76:aeb1df146756 | 151 | * @note This sturcture is used only with TIM1. |
mbed_official | 76:aeb1df146756 | 152 | */ |
mbed_official | 76:aeb1df146756 | 153 | |
mbed_official | 76:aeb1df146756 | 154 | typedef struct |
mbed_official | 76:aeb1df146756 | 155 | { |
mbed_official | 76:aeb1df146756 | 156 | |
mbed_official | 76:aeb1df146756 | 157 | uint16_t TIM_OSSRState; /*!< Specifies the Off-State selection used in Run mode. |
mbed_official | 76:aeb1df146756 | 158 | This parameter can be a value of @ref TIM_OSSR_Off_State_Selection_for_Run_mode_state */ |
mbed_official | 76:aeb1df146756 | 159 | |
mbed_official | 76:aeb1df146756 | 160 | uint16_t TIM_OSSIState; /*!< Specifies the Off-State used in Idle state. |
mbed_official | 76:aeb1df146756 | 161 | This parameter can be a value of @ref TIM_OSSI_Off_State_Selection_for_Idle_mode_state */ |
mbed_official | 76:aeb1df146756 | 162 | |
mbed_official | 76:aeb1df146756 | 163 | uint16_t TIM_LOCKLevel; /*!< Specifies the LOCK level parameters. |
mbed_official | 76:aeb1df146756 | 164 | This parameter can be a value of @ref TIM_Lock_level */ |
mbed_official | 76:aeb1df146756 | 165 | |
mbed_official | 76:aeb1df146756 | 166 | uint16_t TIM_DeadTime; /*!< Specifies the delay time between the switching-off and the |
mbed_official | 76:aeb1df146756 | 167 | switching-on of the outputs. |
mbed_official | 76:aeb1df146756 | 168 | This parameter can be a number between 0x00 and 0xFF */ |
mbed_official | 76:aeb1df146756 | 169 | |
mbed_official | 76:aeb1df146756 | 170 | uint16_t TIM_Break; /*!< Specifies whether the TIM Break input is enabled or not. |
mbed_official | 76:aeb1df146756 | 171 | This parameter can be a value of @ref TIM_Break_Input_enable_disable */ |
mbed_official | 76:aeb1df146756 | 172 | |
mbed_official | 76:aeb1df146756 | 173 | uint16_t TIM_BreakPolarity; /*!< Specifies the TIM Break Input pin polarity. |
mbed_official | 76:aeb1df146756 | 174 | This parameter can be a value of @ref TIM_Break_Polarity */ |
mbed_official | 76:aeb1df146756 | 175 | |
mbed_official | 76:aeb1df146756 | 176 | uint16_t TIM_AutomaticOutput; /*!< Specifies whether the TIM Automatic Output feature is enabled or not. |
mbed_official | 76:aeb1df146756 | 177 | This parameter can be a value of @ref TIM_AOE_Bit_Set_Reset */ |
mbed_official | 76:aeb1df146756 | 178 | } TIM_BDTRInitTypeDef; |
mbed_official | 76:aeb1df146756 | 179 | |
mbed_official | 76:aeb1df146756 | 180 | /** |
mbed_official | 76:aeb1df146756 | 181 | * @brief TIM Input Capture Init structure definition |
mbed_official | 76:aeb1df146756 | 182 | */ |
mbed_official | 76:aeb1df146756 | 183 | |
mbed_official | 76:aeb1df146756 | 184 | /* Exported constants --------------------------------------------------------*/ |
mbed_official | 76:aeb1df146756 | 185 | |
mbed_official | 76:aeb1df146756 | 186 | |
mbed_official | 76:aeb1df146756 | 187 | /** @defgroup TIM_Exported_constants |
mbed_official | 76:aeb1df146756 | 188 | * @{ |
mbed_official | 76:aeb1df146756 | 189 | */ |
mbed_official | 76:aeb1df146756 | 190 | |
mbed_official | 76:aeb1df146756 | 191 | #define IS_TIM_ALL_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ |
mbed_official | 76:aeb1df146756 | 192 | ((PERIPH) == TIM2) || \ |
mbed_official | 76:aeb1df146756 | 193 | ((PERIPH) == TIM3) || \ |
mbed_official | 76:aeb1df146756 | 194 | ((PERIPH) == TIM6) || \ |
mbed_official | 76:aeb1df146756 | 195 | ((PERIPH) == TIM7) || \ |
mbed_official | 76:aeb1df146756 | 196 | ((PERIPH) == TIM14)|| \ |
mbed_official | 76:aeb1df146756 | 197 | ((PERIPH) == TIM15)|| \ |
mbed_official | 76:aeb1df146756 | 198 | ((PERIPH) == TIM16)|| \ |
mbed_official | 76:aeb1df146756 | 199 | ((PERIPH) == TIM17)) |
mbed_official | 76:aeb1df146756 | 200 | |
mbed_official | 76:aeb1df146756 | 201 | /* LIST1: TIM 1 */ |
mbed_official | 76:aeb1df146756 | 202 | #define IS_TIM_LIST1_PERIPH(PERIPH) ((PERIPH) == TIM1) |
mbed_official | 76:aeb1df146756 | 203 | |
mbed_official | 76:aeb1df146756 | 204 | /* LIST2: TIM 1, 15, 16 and 17 */ |
mbed_official | 76:aeb1df146756 | 205 | #define IS_TIM_LIST2_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ |
mbed_official | 76:aeb1df146756 | 206 | ((PERIPH) == TIM15)|| \ |
mbed_official | 76:aeb1df146756 | 207 | ((PERIPH) == TIM16)|| \ |
mbed_official | 76:aeb1df146756 | 208 | ((PERIPH) == TIM17)) |
mbed_official | 76:aeb1df146756 | 209 | |
mbed_official | 76:aeb1df146756 | 210 | /* LIST3: TIM 1, 2 and 3 */ |
mbed_official | 76:aeb1df146756 | 211 | #define IS_TIM_LIST3_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ |
mbed_official | 76:aeb1df146756 | 212 | ((PERIPH) == TIM2) || \ |
mbed_official | 76:aeb1df146756 | 213 | ((PERIPH) == TIM3)) |
mbed_official | 76:aeb1df146756 | 214 | |
mbed_official | 76:aeb1df146756 | 215 | /* LIST4: TIM 1, 2, 3, 14, 15, 16 and 17 */ |
mbed_official | 76:aeb1df146756 | 216 | #define IS_TIM_LIST4_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ |
mbed_official | 76:aeb1df146756 | 217 | ((PERIPH) == TIM2) || \ |
mbed_official | 76:aeb1df146756 | 218 | ((PERIPH) == TIM3) || \ |
mbed_official | 76:aeb1df146756 | 219 | ((PERIPH) == TIM14) || \ |
mbed_official | 76:aeb1df146756 | 220 | ((PERIPH) == TIM15)|| \ |
mbed_official | 76:aeb1df146756 | 221 | ((PERIPH) == TIM16)|| \ |
mbed_official | 76:aeb1df146756 | 222 | ((PERIPH) == TIM17)) |
mbed_official | 76:aeb1df146756 | 223 | |
mbed_official | 76:aeb1df146756 | 224 | /* LIST5: TIM 1, 2, 3, 15, 16 and 17 */ |
mbed_official | 76:aeb1df146756 | 225 | #define IS_TIM_LIST5_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ |
mbed_official | 76:aeb1df146756 | 226 | ((PERIPH) == TIM2) || \ |
mbed_official | 76:aeb1df146756 | 227 | ((PERIPH) == TIM3) || \ |
mbed_official | 76:aeb1df146756 | 228 | ((PERIPH) == TIM15)|| \ |
mbed_official | 76:aeb1df146756 | 229 | ((PERIPH) == TIM16)|| \ |
mbed_official | 76:aeb1df146756 | 230 | ((PERIPH) == TIM17)) |
mbed_official | 76:aeb1df146756 | 231 | |
mbed_official | 76:aeb1df146756 | 232 | /* LIST6: TIM 1, 2, 3 and 15 */ |
mbed_official | 76:aeb1df146756 | 233 | #define IS_TIM_LIST6_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ |
mbed_official | 76:aeb1df146756 | 234 | ((PERIPH) == TIM2) || \ |
mbed_official | 76:aeb1df146756 | 235 | ((PERIPH) == TIM3) || \ |
mbed_official | 76:aeb1df146756 | 236 | ((PERIPH) == TIM15)) |
mbed_official | 76:aeb1df146756 | 237 | |
mbed_official | 76:aeb1df146756 | 238 | /* LIST7: TIM 1, 2, 3, 6, 7 and 14 */ |
mbed_official | 76:aeb1df146756 | 239 | #define IS_TIM_LIST7_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ |
mbed_official | 76:aeb1df146756 | 240 | ((PERIPH) == TIM2) || \ |
mbed_official | 76:aeb1df146756 | 241 | ((PERIPH) == TIM3) || \ |
mbed_official | 76:aeb1df146756 | 242 | ((PERIPH) == TIM6) || \ |
mbed_official | 76:aeb1df146756 | 243 | ((PERIPH) == TIM7) || \ |
mbed_official | 76:aeb1df146756 | 244 | ((PERIPH) == TIM14)) |
mbed_official | 76:aeb1df146756 | 245 | |
mbed_official | 76:aeb1df146756 | 246 | /* LIST8: TIM 1, 2, 3 and 14 */ |
mbed_official | 76:aeb1df146756 | 247 | #define IS_TIM_LIST8_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ |
mbed_official | 76:aeb1df146756 | 248 | ((PERIPH) == TIM2) || \ |
mbed_official | 76:aeb1df146756 | 249 | ((PERIPH) == TIM3) || \ |
mbed_official | 76:aeb1df146756 | 250 | ((PERIPH) == TIM14)) |
mbed_official | 76:aeb1df146756 | 251 | |
mbed_official | 76:aeb1df146756 | 252 | /* LIST9: TIM 1, 2, 3, 6, 7 and 15 */ |
mbed_official | 76:aeb1df146756 | 253 | #define IS_TIM_LIST9_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ |
mbed_official | 76:aeb1df146756 | 254 | ((PERIPH) == TIM2) || \ |
mbed_official | 76:aeb1df146756 | 255 | ((PERIPH) == TIM3) || \ |
mbed_official | 76:aeb1df146756 | 256 | ((PERIPH) == TIM6) || \ |
mbed_official | 76:aeb1df146756 | 257 | ((PERIPH) == TIM7) || \ |
mbed_official | 76:aeb1df146756 | 258 | ((PERIPH) == TIM15)) |
mbed_official | 76:aeb1df146756 | 259 | |
mbed_official | 76:aeb1df146756 | 260 | /* LIST10: TIM 1, 2, 3, 6, 7, 15, 16 and 17 */ |
mbed_official | 76:aeb1df146756 | 261 | #define IS_TIM_LIST10_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ |
mbed_official | 76:aeb1df146756 | 262 | ((PERIPH) == TIM2) || \ |
mbed_official | 76:aeb1df146756 | 263 | ((PERIPH) == TIM3) || \ |
mbed_official | 76:aeb1df146756 | 264 | ((PERIPH) == TIM6) || \ |
mbed_official | 76:aeb1df146756 | 265 | ((PERIPH) == TIM7) || \ |
mbed_official | 76:aeb1df146756 | 266 | ((PERIPH) == TIM15)|| \ |
mbed_official | 76:aeb1df146756 | 267 | ((PERIPH) == TIM16)|| \ |
mbed_official | 76:aeb1df146756 | 268 | ((PERIPH) == TIM17)) |
mbed_official | 76:aeb1df146756 | 269 | |
mbed_official | 76:aeb1df146756 | 270 | /* LIST1: TIM 11 */ |
mbed_official | 76:aeb1df146756 | 271 | #define IS_TIM_LIST11_PERIPH(PERIPH) ((PERIPH) == TIM14) |
mbed_official | 76:aeb1df146756 | 272 | |
mbed_official | 76:aeb1df146756 | 273 | |
mbed_official | 76:aeb1df146756 | 274 | /** |
mbed_official | 76:aeb1df146756 | 275 | * @} |
mbed_official | 76:aeb1df146756 | 276 | */ |
mbed_official | 76:aeb1df146756 | 277 | |
mbed_official | 76:aeb1df146756 | 278 | /** @defgroup TIM_Output_Compare_and_PWM_modes |
mbed_official | 76:aeb1df146756 | 279 | * @{ |
mbed_official | 76:aeb1df146756 | 280 | */ |
mbed_official | 76:aeb1df146756 | 281 | |
mbed_official | 76:aeb1df146756 | 282 | #define TIM_OCMode_Timing ((uint16_t)0x0000) |
mbed_official | 76:aeb1df146756 | 283 | #define TIM_OCMode_Active ((uint16_t)0x0010) |
mbed_official | 76:aeb1df146756 | 284 | #define TIM_OCMode_Inactive ((uint16_t)0x0020) |
mbed_official | 76:aeb1df146756 | 285 | #define TIM_OCMode_Toggle ((uint16_t)0x0030) |
mbed_official | 76:aeb1df146756 | 286 | #define TIM_OCMode_PWM1 ((uint16_t)0x0060) |
mbed_official | 76:aeb1df146756 | 287 | #define TIM_OCMode_PWM2 ((uint16_t)0x0070) |
mbed_official | 76:aeb1df146756 | 288 | #define IS_TIM_OC_MODE(MODE) (((MODE) == TIM_OCMode_Timing) || \ |
mbed_official | 76:aeb1df146756 | 289 | ((MODE) == TIM_OCMode_Active) || \ |
mbed_official | 76:aeb1df146756 | 290 | ((MODE) == TIM_OCMode_Inactive) || \ |
mbed_official | 76:aeb1df146756 | 291 | ((MODE) == TIM_OCMode_Toggle)|| \ |
mbed_official | 76:aeb1df146756 | 292 | ((MODE) == TIM_OCMode_PWM1) || \ |
mbed_official | 76:aeb1df146756 | 293 | ((MODE) == TIM_OCMode_PWM2)) |
mbed_official | 76:aeb1df146756 | 294 | #define IS_TIM_OCM(MODE) (((MODE) == TIM_OCMode_Timing) || \ |
mbed_official | 76:aeb1df146756 | 295 | ((MODE) == TIM_OCMode_Active) || \ |
mbed_official | 76:aeb1df146756 | 296 | ((MODE) == TIM_OCMode_Inactive) || \ |
mbed_official | 76:aeb1df146756 | 297 | ((MODE) == TIM_OCMode_Toggle)|| \ |
mbed_official | 76:aeb1df146756 | 298 | ((MODE) == TIM_OCMode_PWM1) || \ |
mbed_official | 76:aeb1df146756 | 299 | ((MODE) == TIM_OCMode_PWM2) || \ |
mbed_official | 76:aeb1df146756 | 300 | ((MODE) == TIM_ForcedAction_Active) || \ |
mbed_official | 76:aeb1df146756 | 301 | ((MODE) == TIM_ForcedAction_InActive)) |
mbed_official | 76:aeb1df146756 | 302 | /** |
mbed_official | 76:aeb1df146756 | 303 | * @} |
mbed_official | 76:aeb1df146756 | 304 | */ |
mbed_official | 76:aeb1df146756 | 305 | |
mbed_official | 76:aeb1df146756 | 306 | /** @defgroup TIM_One_Pulse_Mode |
mbed_official | 76:aeb1df146756 | 307 | * @{ |
mbed_official | 76:aeb1df146756 | 308 | */ |
mbed_official | 76:aeb1df146756 | 309 | |
mbed_official | 76:aeb1df146756 | 310 | #define TIM_OPMode_Single ((uint16_t)0x0008) |
mbed_official | 76:aeb1df146756 | 311 | #define TIM_OPMode_Repetitive ((uint16_t)0x0000) |
mbed_official | 76:aeb1df146756 | 312 | #define IS_TIM_OPM_MODE(MODE) (((MODE) == TIM_OPMode_Single) || \ |
mbed_official | 76:aeb1df146756 | 313 | ((MODE) == TIM_OPMode_Repetitive)) |
mbed_official | 76:aeb1df146756 | 314 | /** |
mbed_official | 76:aeb1df146756 | 315 | * @} |
mbed_official | 76:aeb1df146756 | 316 | */ |
mbed_official | 76:aeb1df146756 | 317 | |
mbed_official | 76:aeb1df146756 | 318 | /** @defgroup TIM_Channel |
mbed_official | 76:aeb1df146756 | 319 | * @{ |
mbed_official | 76:aeb1df146756 | 320 | */ |
mbed_official | 76:aeb1df146756 | 321 | |
mbed_official | 76:aeb1df146756 | 322 | #define TIM_Channel_1 ((uint16_t)0x0000) |
mbed_official | 76:aeb1df146756 | 323 | #define TIM_Channel_2 ((uint16_t)0x0004) |
mbed_official | 76:aeb1df146756 | 324 | #define TIM_Channel_3 ((uint16_t)0x0008) |
mbed_official | 76:aeb1df146756 | 325 | #define TIM_Channel_4 ((uint16_t)0x000C) |
mbed_official | 76:aeb1df146756 | 326 | |
mbed_official | 76:aeb1df146756 | 327 | #define IS_TIM_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \ |
mbed_official | 76:aeb1df146756 | 328 | ((CHANNEL) == TIM_Channel_2) || \ |
mbed_official | 76:aeb1df146756 | 329 | ((CHANNEL) == TIM_Channel_3) || \ |
mbed_official | 76:aeb1df146756 | 330 | ((CHANNEL) == TIM_Channel_4)) |
mbed_official | 76:aeb1df146756 | 331 | #define IS_TIM_COMPLEMENTARY_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \ |
mbed_official | 76:aeb1df146756 | 332 | ((CHANNEL) == TIM_Channel_2) || \ |
mbed_official | 76:aeb1df146756 | 333 | ((CHANNEL) == TIM_Channel_3)) |
mbed_official | 76:aeb1df146756 | 334 | #define IS_TIM_PWMI_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \ |
mbed_official | 76:aeb1df146756 | 335 | ((CHANNEL) == TIM_Channel_2)) |
mbed_official | 76:aeb1df146756 | 336 | |
mbed_official | 76:aeb1df146756 | 337 | /** |
mbed_official | 76:aeb1df146756 | 338 | * @} |
mbed_official | 76:aeb1df146756 | 339 | */ |
mbed_official | 76:aeb1df146756 | 340 | |
mbed_official | 76:aeb1df146756 | 341 | /** @defgroup TIM_Clock_Division_CKD |
mbed_official | 76:aeb1df146756 | 342 | * @{ |
mbed_official | 76:aeb1df146756 | 343 | */ |
mbed_official | 76:aeb1df146756 | 344 | |
mbed_official | 76:aeb1df146756 | 345 | #define TIM_CKD_DIV1 ((uint16_t)0x0000) |
mbed_official | 76:aeb1df146756 | 346 | #define TIM_CKD_DIV2 ((uint16_t)0x0100) |
mbed_official | 76:aeb1df146756 | 347 | #define TIM_CKD_DIV4 ((uint16_t)0x0200) |
mbed_official | 76:aeb1df146756 | 348 | #define IS_TIM_CKD_DIV(DIV) (((DIV) == TIM_CKD_DIV1) || \ |
mbed_official | 76:aeb1df146756 | 349 | ((DIV) == TIM_CKD_DIV2) || \ |
mbed_official | 76:aeb1df146756 | 350 | ((DIV) == TIM_CKD_DIV4)) |
mbed_official | 76:aeb1df146756 | 351 | /** |
mbed_official | 76:aeb1df146756 | 352 | * @} |
mbed_official | 76:aeb1df146756 | 353 | */ |
mbed_official | 76:aeb1df146756 | 354 | |
mbed_official | 76:aeb1df146756 | 355 | /** @defgroup TIM_Counter_Mode |
mbed_official | 76:aeb1df146756 | 356 | * @{ |
mbed_official | 76:aeb1df146756 | 357 | */ |
mbed_official | 76:aeb1df146756 | 358 | |
mbed_official | 76:aeb1df146756 | 359 | #define TIM_CounterMode_Up ((uint16_t)0x0000) |
mbed_official | 76:aeb1df146756 | 360 | #define TIM_CounterMode_Down ((uint16_t)0x0010) |
mbed_official | 76:aeb1df146756 | 361 | #define TIM_CounterMode_CenterAligned1 ((uint16_t)0x0020) |
mbed_official | 76:aeb1df146756 | 362 | #define TIM_CounterMode_CenterAligned2 ((uint16_t)0x0040) |
mbed_official | 76:aeb1df146756 | 363 | #define TIM_CounterMode_CenterAligned3 ((uint16_t)0x0060) |
mbed_official | 76:aeb1df146756 | 364 | #define IS_TIM_COUNTER_MODE(MODE) (((MODE) == TIM_CounterMode_Up) || \ |
mbed_official | 76:aeb1df146756 | 365 | ((MODE) == TIM_CounterMode_Down) || \ |
mbed_official | 76:aeb1df146756 | 366 | ((MODE) == TIM_CounterMode_CenterAligned1) || \ |
mbed_official | 76:aeb1df146756 | 367 | ((MODE) == TIM_CounterMode_CenterAligned2) || \ |
mbed_official | 76:aeb1df146756 | 368 | ((MODE) == TIM_CounterMode_CenterAligned3)) |
mbed_official | 76:aeb1df146756 | 369 | /** |
mbed_official | 76:aeb1df146756 | 370 | * @} |
mbed_official | 76:aeb1df146756 | 371 | */ |
mbed_official | 76:aeb1df146756 | 372 | |
mbed_official | 76:aeb1df146756 | 373 | /** @defgroup TIM_Output_Compare_Polarity |
mbed_official | 76:aeb1df146756 | 374 | * @{ |
mbed_official | 76:aeb1df146756 | 375 | */ |
mbed_official | 76:aeb1df146756 | 376 | |
mbed_official | 76:aeb1df146756 | 377 | #define TIM_OCPolarity_High ((uint16_t)0x0000) |
mbed_official | 76:aeb1df146756 | 378 | #define TIM_OCPolarity_Low ((uint16_t)0x0002) |
mbed_official | 76:aeb1df146756 | 379 | #define IS_TIM_OC_POLARITY(POLARITY) (((POLARITY) == TIM_OCPolarity_High) || \ |
mbed_official | 76:aeb1df146756 | 380 | ((POLARITY) == TIM_OCPolarity_Low)) |
mbed_official | 76:aeb1df146756 | 381 | /** |
mbed_official | 76:aeb1df146756 | 382 | * @} |
mbed_official | 76:aeb1df146756 | 383 | */ |
mbed_official | 76:aeb1df146756 | 384 | |
mbed_official | 76:aeb1df146756 | 385 | /** @defgroup TIM_Output_Compare_N_Polarity |
mbed_official | 76:aeb1df146756 | 386 | * @{ |
mbed_official | 76:aeb1df146756 | 387 | */ |
mbed_official | 76:aeb1df146756 | 388 | |
mbed_official | 76:aeb1df146756 | 389 | #define TIM_OCNPolarity_High ((uint16_t)0x0000) |
mbed_official | 76:aeb1df146756 | 390 | #define TIM_OCNPolarity_Low ((uint16_t)0x0008) |
mbed_official | 76:aeb1df146756 | 391 | #define IS_TIM_OCN_POLARITY(POLARITY) (((POLARITY) == TIM_OCNPolarity_High) || \ |
mbed_official | 76:aeb1df146756 | 392 | ((POLARITY) == TIM_OCNPolarity_Low)) |
mbed_official | 76:aeb1df146756 | 393 | /** |
mbed_official | 76:aeb1df146756 | 394 | * @} |
mbed_official | 76:aeb1df146756 | 395 | */ |
mbed_official | 76:aeb1df146756 | 396 | |
mbed_official | 76:aeb1df146756 | 397 | /** @defgroup TIM_Output_Compare_state |
mbed_official | 76:aeb1df146756 | 398 | * @{ |
mbed_official | 76:aeb1df146756 | 399 | */ |
mbed_official | 76:aeb1df146756 | 400 | |
mbed_official | 76:aeb1df146756 | 401 | #define TIM_OutputState_Disable ((uint16_t)0x0000) |
mbed_official | 76:aeb1df146756 | 402 | #define TIM_OutputState_Enable ((uint16_t)0x0001) |
mbed_official | 76:aeb1df146756 | 403 | #define IS_TIM_OUTPUT_STATE(STATE) (((STATE) == TIM_OutputState_Disable) || \ |
mbed_official | 76:aeb1df146756 | 404 | ((STATE) == TIM_OutputState_Enable)) |
mbed_official | 76:aeb1df146756 | 405 | /** |
mbed_official | 76:aeb1df146756 | 406 | * @} |
mbed_official | 76:aeb1df146756 | 407 | */ |
mbed_official | 76:aeb1df146756 | 408 | |
mbed_official | 76:aeb1df146756 | 409 | /** @defgroup TIM_Output_Compare_N_state |
mbed_official | 76:aeb1df146756 | 410 | * @{ |
mbed_official | 76:aeb1df146756 | 411 | */ |
mbed_official | 76:aeb1df146756 | 412 | |
mbed_official | 76:aeb1df146756 | 413 | #define TIM_OutputNState_Disable ((uint16_t)0x0000) |
mbed_official | 76:aeb1df146756 | 414 | #define TIM_OutputNState_Enable ((uint16_t)0x0004) |
mbed_official | 76:aeb1df146756 | 415 | #define IS_TIM_OUTPUTN_STATE(STATE) (((STATE) == TIM_OutputNState_Disable) || \ |
mbed_official | 76:aeb1df146756 | 416 | ((STATE) == TIM_OutputNState_Enable)) |
mbed_official | 76:aeb1df146756 | 417 | /** |
mbed_official | 76:aeb1df146756 | 418 | * @} |
mbed_official | 76:aeb1df146756 | 419 | */ |
mbed_official | 76:aeb1df146756 | 420 | |
mbed_official | 76:aeb1df146756 | 421 | /** @defgroup TIM_Capture_Compare_state |
mbed_official | 76:aeb1df146756 | 422 | * @{ |
mbed_official | 76:aeb1df146756 | 423 | */ |
mbed_official | 76:aeb1df146756 | 424 | |
mbed_official | 76:aeb1df146756 | 425 | #define TIM_CCx_Enable ((uint16_t)0x0001) |
mbed_official | 76:aeb1df146756 | 426 | #define TIM_CCx_Disable ((uint16_t)0x0000) |
mbed_official | 76:aeb1df146756 | 427 | #define IS_TIM_CCX(CCX) (((CCX) == TIM_CCx_Enable) || \ |
mbed_official | 76:aeb1df146756 | 428 | ((CCX) == TIM_CCx_Disable)) |
mbed_official | 76:aeb1df146756 | 429 | /** |
mbed_official | 76:aeb1df146756 | 430 | * @} |
mbed_official | 76:aeb1df146756 | 431 | */ |
mbed_official | 76:aeb1df146756 | 432 | |
mbed_official | 76:aeb1df146756 | 433 | /** @defgroup TIM_Capture_Compare_N_state |
mbed_official | 76:aeb1df146756 | 434 | * @{ |
mbed_official | 76:aeb1df146756 | 435 | */ |
mbed_official | 76:aeb1df146756 | 436 | |
mbed_official | 76:aeb1df146756 | 437 | #define TIM_CCxN_Enable ((uint16_t)0x0004) |
mbed_official | 76:aeb1df146756 | 438 | #define TIM_CCxN_Disable ((uint16_t)0x0000) |
mbed_official | 76:aeb1df146756 | 439 | #define IS_TIM_CCXN(CCXN) (((CCXN) == TIM_CCxN_Enable) || \ |
mbed_official | 76:aeb1df146756 | 440 | ((CCXN) == TIM_CCxN_Disable)) |
mbed_official | 76:aeb1df146756 | 441 | /** |
mbed_official | 76:aeb1df146756 | 442 | * @} |
mbed_official | 76:aeb1df146756 | 443 | */ |
mbed_official | 76:aeb1df146756 | 444 | |
mbed_official | 76:aeb1df146756 | 445 | /** @defgroup TIM_Break_Input_enable_disable |
mbed_official | 76:aeb1df146756 | 446 | * @{ |
mbed_official | 76:aeb1df146756 | 447 | */ |
mbed_official | 76:aeb1df146756 | 448 | |
mbed_official | 76:aeb1df146756 | 449 | #define TIM_Break_Enable ((uint16_t)0x1000) |
mbed_official | 76:aeb1df146756 | 450 | #define TIM_Break_Disable ((uint16_t)0x0000) |
mbed_official | 76:aeb1df146756 | 451 | #define IS_TIM_BREAK_STATE(STATE) (((STATE) == TIM_Break_Enable) || \ |
mbed_official | 76:aeb1df146756 | 452 | ((STATE) == TIM_Break_Disable)) |
mbed_official | 76:aeb1df146756 | 453 | /** |
mbed_official | 76:aeb1df146756 | 454 | * @} |
mbed_official | 76:aeb1df146756 | 455 | */ |
mbed_official | 76:aeb1df146756 | 456 | |
mbed_official | 76:aeb1df146756 | 457 | /** @defgroup TIM_Break_Polarity |
mbed_official | 76:aeb1df146756 | 458 | * @{ |
mbed_official | 76:aeb1df146756 | 459 | */ |
mbed_official | 76:aeb1df146756 | 460 | |
mbed_official | 76:aeb1df146756 | 461 | #define TIM_BreakPolarity_Low ((uint16_t)0x0000) |
mbed_official | 76:aeb1df146756 | 462 | #define TIM_BreakPolarity_High ((uint16_t)0x2000) |
mbed_official | 76:aeb1df146756 | 463 | #define IS_TIM_BREAK_POLARITY(POLARITY) (((POLARITY) == TIM_BreakPolarity_Low) || \ |
mbed_official | 76:aeb1df146756 | 464 | ((POLARITY) == TIM_BreakPolarity_High)) |
mbed_official | 76:aeb1df146756 | 465 | /** |
mbed_official | 76:aeb1df146756 | 466 | * @} |
mbed_official | 76:aeb1df146756 | 467 | */ |
mbed_official | 76:aeb1df146756 | 468 | |
mbed_official | 76:aeb1df146756 | 469 | /** @defgroup TIM_AOE_Bit_Set_Reset |
mbed_official | 76:aeb1df146756 | 470 | * @{ |
mbed_official | 76:aeb1df146756 | 471 | */ |
mbed_official | 76:aeb1df146756 | 472 | |
mbed_official | 76:aeb1df146756 | 473 | #define TIM_AutomaticOutput_Enable ((uint16_t)0x4000) |
mbed_official | 76:aeb1df146756 | 474 | #define TIM_AutomaticOutput_Disable ((uint16_t)0x0000) |
mbed_official | 76:aeb1df146756 | 475 | #define IS_TIM_AUTOMATIC_OUTPUT_STATE(STATE) (((STATE) == TIM_AutomaticOutput_Enable) || \ |
mbed_official | 76:aeb1df146756 | 476 | ((STATE) == TIM_AutomaticOutput_Disable)) |
mbed_official | 76:aeb1df146756 | 477 | /** |
mbed_official | 76:aeb1df146756 | 478 | * @} |
mbed_official | 76:aeb1df146756 | 479 | */ |
mbed_official | 76:aeb1df146756 | 480 | |
mbed_official | 76:aeb1df146756 | 481 | /** @defgroup TIM_Lock_level |
mbed_official | 76:aeb1df146756 | 482 | * @{ |
mbed_official | 76:aeb1df146756 | 483 | */ |
mbed_official | 76:aeb1df146756 | 484 | |
mbed_official | 76:aeb1df146756 | 485 | #define TIM_LOCKLevel_OFF ((uint16_t)0x0000) |
mbed_official | 76:aeb1df146756 | 486 | #define TIM_LOCKLevel_1 ((uint16_t)0x0100) |
mbed_official | 76:aeb1df146756 | 487 | #define TIM_LOCKLevel_2 ((uint16_t)0x0200) |
mbed_official | 76:aeb1df146756 | 488 | #define TIM_LOCKLevel_3 ((uint16_t)0x0300) |
mbed_official | 76:aeb1df146756 | 489 | #define IS_TIM_LOCK_LEVEL(LEVEL) (((LEVEL) == TIM_LOCKLevel_OFF) || \ |
mbed_official | 76:aeb1df146756 | 490 | ((LEVEL) == TIM_LOCKLevel_1) || \ |
mbed_official | 76:aeb1df146756 | 491 | ((LEVEL) == TIM_LOCKLevel_2) || \ |
mbed_official | 76:aeb1df146756 | 492 | ((LEVEL) == TIM_LOCKLevel_3)) |
mbed_official | 76:aeb1df146756 | 493 | /** |
mbed_official | 76:aeb1df146756 | 494 | * @} |
mbed_official | 76:aeb1df146756 | 495 | */ |
mbed_official | 76:aeb1df146756 | 496 | |
mbed_official | 76:aeb1df146756 | 497 | /** @defgroup TIM_OSSI_Off_State_Selection_for_Idle_mode_state |
mbed_official | 76:aeb1df146756 | 498 | * @{ |
mbed_official | 76:aeb1df146756 | 499 | */ |
mbed_official | 76:aeb1df146756 | 500 | |
mbed_official | 76:aeb1df146756 | 501 | #define TIM_OSSIState_Enable ((uint16_t)0x0400) |
mbed_official | 76:aeb1df146756 | 502 | #define TIM_OSSIState_Disable ((uint16_t)0x0000) |
mbed_official | 76:aeb1df146756 | 503 | #define IS_TIM_OSSI_STATE(STATE) (((STATE) == TIM_OSSIState_Enable) || \ |
mbed_official | 76:aeb1df146756 | 504 | ((STATE) == TIM_OSSIState_Disable)) |
mbed_official | 76:aeb1df146756 | 505 | /** |
mbed_official | 76:aeb1df146756 | 506 | * @} |
mbed_official | 76:aeb1df146756 | 507 | */ |
mbed_official | 76:aeb1df146756 | 508 | |
mbed_official | 76:aeb1df146756 | 509 | /** @defgroup TIM_OSSR_Off_State_Selection_for_Run_mode_state |
mbed_official | 76:aeb1df146756 | 510 | * @{ |
mbed_official | 76:aeb1df146756 | 511 | */ |
mbed_official | 76:aeb1df146756 | 512 | |
mbed_official | 76:aeb1df146756 | 513 | #define TIM_OSSRState_Enable ((uint16_t)0x0800) |
mbed_official | 76:aeb1df146756 | 514 | #define TIM_OSSRState_Disable ((uint16_t)0x0000) |
mbed_official | 76:aeb1df146756 | 515 | #define IS_TIM_OSSR_STATE(STATE) (((STATE) == TIM_OSSRState_Enable) || \ |
mbed_official | 76:aeb1df146756 | 516 | ((STATE) == TIM_OSSRState_Disable)) |
mbed_official | 76:aeb1df146756 | 517 | /** |
mbed_official | 76:aeb1df146756 | 518 | * @} |
mbed_official | 76:aeb1df146756 | 519 | */ |
mbed_official | 76:aeb1df146756 | 520 | |
mbed_official | 76:aeb1df146756 | 521 | /** @defgroup TIM_Output_Compare_Idle_State |
mbed_official | 76:aeb1df146756 | 522 | * @{ |
mbed_official | 76:aeb1df146756 | 523 | */ |
mbed_official | 76:aeb1df146756 | 524 | |
mbed_official | 76:aeb1df146756 | 525 | #define TIM_OCIdleState_Set ((uint16_t)0x0100) |
mbed_official | 76:aeb1df146756 | 526 | #define TIM_OCIdleState_Reset ((uint16_t)0x0000) |
mbed_official | 76:aeb1df146756 | 527 | #define IS_TIM_OCIDLE_STATE(STATE) (((STATE) == TIM_OCIdleState_Set) || \ |
mbed_official | 76:aeb1df146756 | 528 | ((STATE) == TIM_OCIdleState_Reset)) |
mbed_official | 76:aeb1df146756 | 529 | /** |
mbed_official | 76:aeb1df146756 | 530 | * @} |
mbed_official | 76:aeb1df146756 | 531 | */ |
mbed_official | 76:aeb1df146756 | 532 | |
mbed_official | 76:aeb1df146756 | 533 | /** @defgroup TIM_Output_Compare_N_Idle_State |
mbed_official | 76:aeb1df146756 | 534 | * @{ |
mbed_official | 76:aeb1df146756 | 535 | */ |
mbed_official | 76:aeb1df146756 | 536 | |
mbed_official | 76:aeb1df146756 | 537 | #define TIM_OCNIdleState_Set ((uint16_t)0x0200) |
mbed_official | 76:aeb1df146756 | 538 | #define TIM_OCNIdleState_Reset ((uint16_t)0x0000) |
mbed_official | 76:aeb1df146756 | 539 | #define IS_TIM_OCNIDLE_STATE(STATE) (((STATE) == TIM_OCNIdleState_Set) || \ |
mbed_official | 76:aeb1df146756 | 540 | ((STATE) == TIM_OCNIdleState_Reset)) |
mbed_official | 76:aeb1df146756 | 541 | /** |
mbed_official | 76:aeb1df146756 | 542 | * @} |
mbed_official | 76:aeb1df146756 | 543 | */ |
mbed_official | 76:aeb1df146756 | 544 | |
mbed_official | 76:aeb1df146756 | 545 | /** @defgroup TIM_Input_Capture_Polarity |
mbed_official | 76:aeb1df146756 | 546 | * @{ |
mbed_official | 76:aeb1df146756 | 547 | */ |
mbed_official | 76:aeb1df146756 | 548 | |
mbed_official | 76:aeb1df146756 | 549 | #define TIM_ICPolarity_Rising ((uint16_t)0x0000) |
mbed_official | 76:aeb1df146756 | 550 | #define TIM_ICPolarity_Falling ((uint16_t)0x0002) |
mbed_official | 76:aeb1df146756 | 551 | #define TIM_ICPolarity_BothEdge ((uint16_t)0x000A) |
mbed_official | 76:aeb1df146756 | 552 | #define IS_TIM_IC_POLARITY(POLARITY) (((POLARITY) == TIM_ICPolarity_Rising) || \ |
mbed_official | 76:aeb1df146756 | 553 | ((POLARITY) == TIM_ICPolarity_Falling)|| \ |
mbed_official | 76:aeb1df146756 | 554 | ((POLARITY) == TIM_ICPolarity_BothEdge)) |
mbed_official | 76:aeb1df146756 | 555 | /** |
mbed_official | 76:aeb1df146756 | 556 | * @} |
mbed_official | 76:aeb1df146756 | 557 | */ |
mbed_official | 76:aeb1df146756 | 558 | |
mbed_official | 76:aeb1df146756 | 559 | /** @defgroup TIM_Input_Capture_Selection |
mbed_official | 76:aeb1df146756 | 560 | * @{ |
mbed_official | 76:aeb1df146756 | 561 | */ |
mbed_official | 76:aeb1df146756 | 562 | |
mbed_official | 76:aeb1df146756 | 563 | #define TIM_ICSelection_DirectTI ((uint16_t)0x0001) /*!< TIM Input 1, 2, 3 or 4 is selected to be |
mbed_official | 76:aeb1df146756 | 564 | connected to IC1, IC2, IC3 or IC4, respectively */ |
mbed_official | 76:aeb1df146756 | 565 | #define TIM_ICSelection_IndirectTI ((uint16_t)0x0002) /*!< TIM Input 1, 2, 3 or 4 is selected to be |
mbed_official | 76:aeb1df146756 | 566 | connected to IC2, IC1, IC4 or IC3, respectively. */ |
mbed_official | 76:aeb1df146756 | 567 | #define TIM_ICSelection_TRC ((uint16_t)0x0003) /*!< TIM Input 1, 2, 3 or 4 is selected to be connected to TRC. */ |
mbed_official | 76:aeb1df146756 | 568 | #define IS_TIM_IC_SELECTION(SELECTION) (((SELECTION) == TIM_ICSelection_DirectTI) || \ |
mbed_official | 76:aeb1df146756 | 569 | ((SELECTION) == TIM_ICSelection_IndirectTI) || \ |
mbed_official | 76:aeb1df146756 | 570 | ((SELECTION) == TIM_ICSelection_TRC)) |
mbed_official | 76:aeb1df146756 | 571 | /** |
mbed_official | 76:aeb1df146756 | 572 | * @} |
mbed_official | 76:aeb1df146756 | 573 | */ |
mbed_official | 76:aeb1df146756 | 574 | |
mbed_official | 76:aeb1df146756 | 575 | /** @defgroup TIM_Input_Capture_Prescaler |
mbed_official | 76:aeb1df146756 | 576 | * @{ |
mbed_official | 76:aeb1df146756 | 577 | */ |
mbed_official | 76:aeb1df146756 | 578 | |
mbed_official | 76:aeb1df146756 | 579 | #define TIM_ICPSC_DIV1 ((uint16_t)0x0000) /*!< Capture performed each time an edge is detected on the capture input. */ |
mbed_official | 76:aeb1df146756 | 580 | #define TIM_ICPSC_DIV2 ((uint16_t)0x0004) /*!< Capture performed once every 2 events. */ |
mbed_official | 76:aeb1df146756 | 581 | #define TIM_ICPSC_DIV4 ((uint16_t)0x0008) /*!< Capture performed once every 4 events. */ |
mbed_official | 76:aeb1df146756 | 582 | #define TIM_ICPSC_DIV8 ((uint16_t)0x000C) /*!< Capture performed once every 8 events. */ |
mbed_official | 76:aeb1df146756 | 583 | #define IS_TIM_IC_PRESCALER(PRESCALER) (((PRESCALER) == TIM_ICPSC_DIV1) || \ |
mbed_official | 76:aeb1df146756 | 584 | ((PRESCALER) == TIM_ICPSC_DIV2) || \ |
mbed_official | 76:aeb1df146756 | 585 | ((PRESCALER) == TIM_ICPSC_DIV4) || \ |
mbed_official | 76:aeb1df146756 | 586 | ((PRESCALER) == TIM_ICPSC_DIV8)) |
mbed_official | 76:aeb1df146756 | 587 | /** |
mbed_official | 76:aeb1df146756 | 588 | * @} |
mbed_official | 76:aeb1df146756 | 589 | */ |
mbed_official | 76:aeb1df146756 | 590 | |
mbed_official | 76:aeb1df146756 | 591 | /** @defgroup TIM_interrupt_sources |
mbed_official | 76:aeb1df146756 | 592 | * @{ |
mbed_official | 76:aeb1df146756 | 593 | */ |
mbed_official | 76:aeb1df146756 | 594 | |
mbed_official | 76:aeb1df146756 | 595 | #define TIM_IT_Update ((uint16_t)0x0001) |
mbed_official | 76:aeb1df146756 | 596 | #define TIM_IT_CC1 ((uint16_t)0x0002) |
mbed_official | 76:aeb1df146756 | 597 | #define TIM_IT_CC2 ((uint16_t)0x0004) |
mbed_official | 76:aeb1df146756 | 598 | #define TIM_IT_CC3 ((uint16_t)0x0008) |
mbed_official | 76:aeb1df146756 | 599 | #define TIM_IT_CC4 ((uint16_t)0x0010) |
mbed_official | 76:aeb1df146756 | 600 | #define TIM_IT_COM ((uint16_t)0x0020) |
mbed_official | 76:aeb1df146756 | 601 | #define TIM_IT_Trigger ((uint16_t)0x0040) |
mbed_official | 76:aeb1df146756 | 602 | #define TIM_IT_Break ((uint16_t)0x0080) |
mbed_official | 76:aeb1df146756 | 603 | #define IS_TIM_IT(IT) ((((IT) & (uint16_t)0xFF00) == 0x0000) && ((IT) != 0x0000)) |
mbed_official | 76:aeb1df146756 | 604 | |
mbed_official | 76:aeb1df146756 | 605 | #define IS_TIM_GET_IT(IT) (((IT) == TIM_IT_Update) || \ |
mbed_official | 76:aeb1df146756 | 606 | ((IT) == TIM_IT_CC1) || \ |
mbed_official | 76:aeb1df146756 | 607 | ((IT) == TIM_IT_CC2) || \ |
mbed_official | 76:aeb1df146756 | 608 | ((IT) == TIM_IT_CC3) || \ |
mbed_official | 76:aeb1df146756 | 609 | ((IT) == TIM_IT_CC4) || \ |
mbed_official | 76:aeb1df146756 | 610 | ((IT) == TIM_IT_COM) || \ |
mbed_official | 76:aeb1df146756 | 611 | ((IT) == TIM_IT_Trigger) || \ |
mbed_official | 76:aeb1df146756 | 612 | ((IT) == TIM_IT_Break)) |
mbed_official | 76:aeb1df146756 | 613 | /** |
mbed_official | 76:aeb1df146756 | 614 | * @} |
mbed_official | 76:aeb1df146756 | 615 | */ |
mbed_official | 76:aeb1df146756 | 616 | |
mbed_official | 76:aeb1df146756 | 617 | /** @defgroup TIM_DMA_Base_address |
mbed_official | 76:aeb1df146756 | 618 | * @{ |
mbed_official | 76:aeb1df146756 | 619 | */ |
mbed_official | 76:aeb1df146756 | 620 | |
mbed_official | 76:aeb1df146756 | 621 | #define TIM_DMABase_CR1 ((uint16_t)0x0000) |
mbed_official | 76:aeb1df146756 | 622 | #define TIM_DMABase_CR2 ((uint16_t)0x0001) |
mbed_official | 76:aeb1df146756 | 623 | #define TIM_DMABase_SMCR ((uint16_t)0x0002) |
mbed_official | 76:aeb1df146756 | 624 | #define TIM_DMABase_DIER ((uint16_t)0x0003) |
mbed_official | 76:aeb1df146756 | 625 | #define TIM_DMABase_SR ((uint16_t)0x0004) |
mbed_official | 76:aeb1df146756 | 626 | #define TIM_DMABase_EGR ((uint16_t)0x0005) |
mbed_official | 76:aeb1df146756 | 627 | #define TIM_DMABase_CCMR1 ((uint16_t)0x0006) |
mbed_official | 76:aeb1df146756 | 628 | #define TIM_DMABase_CCMR2 ((uint16_t)0x0007) |
mbed_official | 76:aeb1df146756 | 629 | #define TIM_DMABase_CCER ((uint16_t)0x0008) |
mbed_official | 76:aeb1df146756 | 630 | #define TIM_DMABase_CNT ((uint16_t)0x0009) |
mbed_official | 76:aeb1df146756 | 631 | #define TIM_DMABase_PSC ((uint16_t)0x000A) |
mbed_official | 76:aeb1df146756 | 632 | #define TIM_DMABase_ARR ((uint16_t)0x000B) |
mbed_official | 76:aeb1df146756 | 633 | #define TIM_DMABase_RCR ((uint16_t)0x000C) |
mbed_official | 76:aeb1df146756 | 634 | #define TIM_DMABase_CCR1 ((uint16_t)0x000D) |
mbed_official | 76:aeb1df146756 | 635 | #define TIM_DMABase_CCR2 ((uint16_t)0x000E) |
mbed_official | 76:aeb1df146756 | 636 | #define TIM_DMABase_CCR3 ((uint16_t)0x000F) |
mbed_official | 76:aeb1df146756 | 637 | #define TIM_DMABase_CCR4 ((uint16_t)0x0010) |
mbed_official | 76:aeb1df146756 | 638 | #define TIM_DMABase_BDTR ((uint16_t)0x0011) |
mbed_official | 76:aeb1df146756 | 639 | #define TIM_DMABase_DCR ((uint16_t)0x0012) |
mbed_official | 76:aeb1df146756 | 640 | #define TIM_DMABase_OR ((uint16_t)0x0013) |
mbed_official | 76:aeb1df146756 | 641 | #define IS_TIM_DMA_BASE(BASE) (((BASE) == TIM_DMABase_CR1) || \ |
mbed_official | 76:aeb1df146756 | 642 | ((BASE) == TIM_DMABase_CR2) || \ |
mbed_official | 76:aeb1df146756 | 643 | ((BASE) == TIM_DMABase_SMCR) || \ |
mbed_official | 76:aeb1df146756 | 644 | ((BASE) == TIM_DMABase_DIER) || \ |
mbed_official | 76:aeb1df146756 | 645 | ((BASE) == TIM_DMABase_SR) || \ |
mbed_official | 76:aeb1df146756 | 646 | ((BASE) == TIM_DMABase_EGR) || \ |
mbed_official | 76:aeb1df146756 | 647 | ((BASE) == TIM_DMABase_CCMR1) || \ |
mbed_official | 76:aeb1df146756 | 648 | ((BASE) == TIM_DMABase_CCMR2) || \ |
mbed_official | 76:aeb1df146756 | 649 | ((BASE) == TIM_DMABase_CCER) || \ |
mbed_official | 76:aeb1df146756 | 650 | ((BASE) == TIM_DMABase_CNT) || \ |
mbed_official | 76:aeb1df146756 | 651 | ((BASE) == TIM_DMABase_PSC) || \ |
mbed_official | 76:aeb1df146756 | 652 | ((BASE) == TIM_DMABase_ARR) || \ |
mbed_official | 76:aeb1df146756 | 653 | ((BASE) == TIM_DMABase_RCR) || \ |
mbed_official | 76:aeb1df146756 | 654 | ((BASE) == TIM_DMABase_CCR1) || \ |
mbed_official | 76:aeb1df146756 | 655 | ((BASE) == TIM_DMABase_CCR2) || \ |
mbed_official | 76:aeb1df146756 | 656 | ((BASE) == TIM_DMABase_CCR3) || \ |
mbed_official | 76:aeb1df146756 | 657 | ((BASE) == TIM_DMABase_CCR4) || \ |
mbed_official | 76:aeb1df146756 | 658 | ((BASE) == TIM_DMABase_BDTR) || \ |
mbed_official | 76:aeb1df146756 | 659 | ((BASE) == TIM_DMABase_DCR) || \ |
mbed_official | 76:aeb1df146756 | 660 | ((BASE) == TIM_DMABase_OR)) |
mbed_official | 76:aeb1df146756 | 661 | /** |
mbed_official | 76:aeb1df146756 | 662 | * @} |
mbed_official | 76:aeb1df146756 | 663 | */ |
mbed_official | 76:aeb1df146756 | 664 | |
mbed_official | 76:aeb1df146756 | 665 | |
mbed_official | 76:aeb1df146756 | 666 | /** @defgroup TIM_DMA_Burst_Length |
mbed_official | 76:aeb1df146756 | 667 | * @{ |
mbed_official | 76:aeb1df146756 | 668 | */ |
mbed_official | 76:aeb1df146756 | 669 | |
mbed_official | 76:aeb1df146756 | 670 | #define TIM_DMABurstLength_1Transfer ((uint16_t)0x0000) |
mbed_official | 76:aeb1df146756 | 671 | #define TIM_DMABurstLength_2Transfers ((uint16_t)0x0100) |
mbed_official | 76:aeb1df146756 | 672 | #define TIM_DMABurstLength_3Transfers ((uint16_t)0x0200) |
mbed_official | 76:aeb1df146756 | 673 | #define TIM_DMABurstLength_4Transfers ((uint16_t)0x0300) |
mbed_official | 76:aeb1df146756 | 674 | #define TIM_DMABurstLength_5Transfers ((uint16_t)0x0400) |
mbed_official | 76:aeb1df146756 | 675 | #define TIM_DMABurstLength_6Transfers ((uint16_t)0x0500) |
mbed_official | 76:aeb1df146756 | 676 | #define TIM_DMABurstLength_7Transfers ((uint16_t)0x0600) |
mbed_official | 76:aeb1df146756 | 677 | #define TIM_DMABurstLength_8Transfers ((uint16_t)0x0700) |
mbed_official | 76:aeb1df146756 | 678 | #define TIM_DMABurstLength_9Transfers ((uint16_t)0x0800) |
mbed_official | 76:aeb1df146756 | 679 | #define TIM_DMABurstLength_10Transfers ((uint16_t)0x0900) |
mbed_official | 76:aeb1df146756 | 680 | #define TIM_DMABurstLength_11Transfers ((uint16_t)0x0A00) |
mbed_official | 76:aeb1df146756 | 681 | #define TIM_DMABurstLength_12Transfers ((uint16_t)0x0B00) |
mbed_official | 76:aeb1df146756 | 682 | #define TIM_DMABurstLength_13Transfers ((uint16_t)0x0C00) |
mbed_official | 76:aeb1df146756 | 683 | #define TIM_DMABurstLength_14Transfers ((uint16_t)0x0D00) |
mbed_official | 76:aeb1df146756 | 684 | #define TIM_DMABurstLength_15Transfers ((uint16_t)0x0E00) |
mbed_official | 76:aeb1df146756 | 685 | #define TIM_DMABurstLength_16Transfers ((uint16_t)0x0F00) |
mbed_official | 76:aeb1df146756 | 686 | #define TIM_DMABurstLength_17Transfers ((uint16_t)0x1000) |
mbed_official | 76:aeb1df146756 | 687 | #define TIM_DMABurstLength_18Transfers ((uint16_t)0x1100) |
mbed_official | 76:aeb1df146756 | 688 | #define IS_TIM_DMA_LENGTH(LENGTH) (((LENGTH) == TIM_DMABurstLength_1Transfer) || \ |
mbed_official | 76:aeb1df146756 | 689 | ((LENGTH) == TIM_DMABurstLength_2Transfers) || \ |
mbed_official | 76:aeb1df146756 | 690 | ((LENGTH) == TIM_DMABurstLength_3Transfers) || \ |
mbed_official | 76:aeb1df146756 | 691 | ((LENGTH) == TIM_DMABurstLength_4Transfers) || \ |
mbed_official | 76:aeb1df146756 | 692 | ((LENGTH) == TIM_DMABurstLength_5Transfers) || \ |
mbed_official | 76:aeb1df146756 | 693 | ((LENGTH) == TIM_DMABurstLength_6Transfers) || \ |
mbed_official | 76:aeb1df146756 | 694 | ((LENGTH) == TIM_DMABurstLength_7Transfers) || \ |
mbed_official | 76:aeb1df146756 | 695 | ((LENGTH) == TIM_DMABurstLength_8Transfers) || \ |
mbed_official | 76:aeb1df146756 | 696 | ((LENGTH) == TIM_DMABurstLength_9Transfers) || \ |
mbed_official | 76:aeb1df146756 | 697 | ((LENGTH) == TIM_DMABurstLength_10Transfers) || \ |
mbed_official | 76:aeb1df146756 | 698 | ((LENGTH) == TIM_DMABurstLength_11Transfers) || \ |
mbed_official | 76:aeb1df146756 | 699 | ((LENGTH) == TIM_DMABurstLength_12Transfers) || \ |
mbed_official | 76:aeb1df146756 | 700 | ((LENGTH) == TIM_DMABurstLength_13Transfers) || \ |
mbed_official | 76:aeb1df146756 | 701 | ((LENGTH) == TIM_DMABurstLength_14Transfers) || \ |
mbed_official | 76:aeb1df146756 | 702 | ((LENGTH) == TIM_DMABurstLength_15Transfers) || \ |
mbed_official | 76:aeb1df146756 | 703 | ((LENGTH) == TIM_DMABurstLength_16Transfers) || \ |
mbed_official | 76:aeb1df146756 | 704 | ((LENGTH) == TIM_DMABurstLength_17Transfers) || \ |
mbed_official | 76:aeb1df146756 | 705 | ((LENGTH) == TIM_DMABurstLength_18Transfers)) |
mbed_official | 76:aeb1df146756 | 706 | /** |
mbed_official | 76:aeb1df146756 | 707 | * @} |
mbed_official | 76:aeb1df146756 | 708 | */ |
mbed_official | 76:aeb1df146756 | 709 | |
mbed_official | 76:aeb1df146756 | 710 | /** @defgroup TIM_DMA_sources |
mbed_official | 76:aeb1df146756 | 711 | * @{ |
mbed_official | 76:aeb1df146756 | 712 | */ |
mbed_official | 76:aeb1df146756 | 713 | |
mbed_official | 76:aeb1df146756 | 714 | #define TIM_DMA_Update ((uint16_t)0x0100) |
mbed_official | 76:aeb1df146756 | 715 | #define TIM_DMA_CC1 ((uint16_t)0x0200) |
mbed_official | 76:aeb1df146756 | 716 | #define TIM_DMA_CC2 ((uint16_t)0x0400) |
mbed_official | 76:aeb1df146756 | 717 | #define TIM_DMA_CC3 ((uint16_t)0x0800) |
mbed_official | 76:aeb1df146756 | 718 | #define TIM_DMA_CC4 ((uint16_t)0x1000) |
mbed_official | 76:aeb1df146756 | 719 | #define TIM_DMA_COM ((uint16_t)0x2000) |
mbed_official | 76:aeb1df146756 | 720 | #define TIM_DMA_Trigger ((uint16_t)0x4000) |
mbed_official | 76:aeb1df146756 | 721 | #define IS_TIM_DMA_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0x80FF) == 0x0000) && ((SOURCE) != 0x0000)) |
mbed_official | 76:aeb1df146756 | 722 | |
mbed_official | 76:aeb1df146756 | 723 | /** |
mbed_official | 76:aeb1df146756 | 724 | * @} |
mbed_official | 76:aeb1df146756 | 725 | */ |
mbed_official | 76:aeb1df146756 | 726 | |
mbed_official | 76:aeb1df146756 | 727 | /** @defgroup TIM_External_Trigger_Prescaler |
mbed_official | 76:aeb1df146756 | 728 | * @{ |
mbed_official | 76:aeb1df146756 | 729 | */ |
mbed_official | 76:aeb1df146756 | 730 | |
mbed_official | 76:aeb1df146756 | 731 | #define TIM_ExtTRGPSC_OFF ((uint16_t)0x0000) |
mbed_official | 76:aeb1df146756 | 732 | #define TIM_ExtTRGPSC_DIV2 ((uint16_t)0x1000) |
mbed_official | 76:aeb1df146756 | 733 | #define TIM_ExtTRGPSC_DIV4 ((uint16_t)0x2000) |
mbed_official | 76:aeb1df146756 | 734 | #define TIM_ExtTRGPSC_DIV8 ((uint16_t)0x3000) |
mbed_official | 76:aeb1df146756 | 735 | #define IS_TIM_EXT_PRESCALER(PRESCALER) (((PRESCALER) == TIM_ExtTRGPSC_OFF) || \ |
mbed_official | 76:aeb1df146756 | 736 | ((PRESCALER) == TIM_ExtTRGPSC_DIV2) || \ |
mbed_official | 76:aeb1df146756 | 737 | ((PRESCALER) == TIM_ExtTRGPSC_DIV4) || \ |
mbed_official | 76:aeb1df146756 | 738 | ((PRESCALER) == TIM_ExtTRGPSC_DIV8)) |
mbed_official | 76:aeb1df146756 | 739 | /** |
mbed_official | 76:aeb1df146756 | 740 | * @} |
mbed_official | 76:aeb1df146756 | 741 | */ |
mbed_official | 76:aeb1df146756 | 742 | |
mbed_official | 76:aeb1df146756 | 743 | /** @defgroup TIM_Internal_Trigger_Selection |
mbed_official | 76:aeb1df146756 | 744 | * @{ |
mbed_official | 76:aeb1df146756 | 745 | */ |
mbed_official | 76:aeb1df146756 | 746 | |
mbed_official | 76:aeb1df146756 | 747 | #define TIM_TS_ITR0 ((uint16_t)0x0000) |
mbed_official | 76:aeb1df146756 | 748 | #define TIM_TS_ITR1 ((uint16_t)0x0010) |
mbed_official | 76:aeb1df146756 | 749 | #define TIM_TS_ITR2 ((uint16_t)0x0020) |
mbed_official | 76:aeb1df146756 | 750 | #define TIM_TS_ITR3 ((uint16_t)0x0030) |
mbed_official | 76:aeb1df146756 | 751 | #define TIM_TS_TI1F_ED ((uint16_t)0x0040) |
mbed_official | 76:aeb1df146756 | 752 | #define TIM_TS_TI1FP1 ((uint16_t)0x0050) |
mbed_official | 76:aeb1df146756 | 753 | #define TIM_TS_TI2FP2 ((uint16_t)0x0060) |
mbed_official | 76:aeb1df146756 | 754 | #define TIM_TS_ETRF ((uint16_t)0x0070) |
mbed_official | 76:aeb1df146756 | 755 | #define IS_TIM_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) || \ |
mbed_official | 76:aeb1df146756 | 756 | ((SELECTION) == TIM_TS_ITR1) || \ |
mbed_official | 76:aeb1df146756 | 757 | ((SELECTION) == TIM_TS_ITR2) || \ |
mbed_official | 76:aeb1df146756 | 758 | ((SELECTION) == TIM_TS_ITR3) || \ |
mbed_official | 76:aeb1df146756 | 759 | ((SELECTION) == TIM_TS_TI1F_ED) || \ |
mbed_official | 76:aeb1df146756 | 760 | ((SELECTION) == TIM_TS_TI1FP1) || \ |
mbed_official | 76:aeb1df146756 | 761 | ((SELECTION) == TIM_TS_TI2FP2) || \ |
mbed_official | 76:aeb1df146756 | 762 | ((SELECTION) == TIM_TS_ETRF)) |
mbed_official | 76:aeb1df146756 | 763 | #define IS_TIM_INTERNAL_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) || \ |
mbed_official | 76:aeb1df146756 | 764 | ((SELECTION) == TIM_TS_ITR1) || \ |
mbed_official | 76:aeb1df146756 | 765 | ((SELECTION) == TIM_TS_ITR2) || \ |
mbed_official | 76:aeb1df146756 | 766 | ((SELECTION) == TIM_TS_ITR3)) |
mbed_official | 76:aeb1df146756 | 767 | /** |
mbed_official | 76:aeb1df146756 | 768 | * @} |
mbed_official | 76:aeb1df146756 | 769 | */ |
mbed_official | 76:aeb1df146756 | 770 | |
mbed_official | 76:aeb1df146756 | 771 | /** @defgroup TIM_TIx_External_Clock_Source |
mbed_official | 76:aeb1df146756 | 772 | * @{ |
mbed_official | 76:aeb1df146756 | 773 | */ |
mbed_official | 76:aeb1df146756 | 774 | |
mbed_official | 76:aeb1df146756 | 775 | #define TIM_TIxExternalCLK1Source_TI1 ((uint16_t)0x0050) |
mbed_official | 76:aeb1df146756 | 776 | #define TIM_TIxExternalCLK1Source_TI2 ((uint16_t)0x0060) |
mbed_official | 76:aeb1df146756 | 777 | #define TIM_TIxExternalCLK1Source_TI1ED ((uint16_t)0x0040) |
mbed_official | 76:aeb1df146756 | 778 | |
mbed_official | 76:aeb1df146756 | 779 | /** |
mbed_official | 76:aeb1df146756 | 780 | * @} |
mbed_official | 76:aeb1df146756 | 781 | */ |
mbed_official | 76:aeb1df146756 | 782 | |
mbed_official | 76:aeb1df146756 | 783 | /** @defgroup TIM_External_Trigger_Polarity |
mbed_official | 76:aeb1df146756 | 784 | * @{ |
mbed_official | 76:aeb1df146756 | 785 | */ |
mbed_official | 76:aeb1df146756 | 786 | #define TIM_ExtTRGPolarity_Inverted ((uint16_t)0x8000) |
mbed_official | 76:aeb1df146756 | 787 | #define TIM_ExtTRGPolarity_NonInverted ((uint16_t)0x0000) |
mbed_official | 76:aeb1df146756 | 788 | #define IS_TIM_EXT_POLARITY(POLARITY) (((POLARITY) == TIM_ExtTRGPolarity_Inverted) || \ |
mbed_official | 76:aeb1df146756 | 789 | ((POLARITY) == TIM_ExtTRGPolarity_NonInverted)) |
mbed_official | 76:aeb1df146756 | 790 | /** |
mbed_official | 76:aeb1df146756 | 791 | * @} |
mbed_official | 76:aeb1df146756 | 792 | */ |
mbed_official | 76:aeb1df146756 | 793 | |
mbed_official | 76:aeb1df146756 | 794 | /** @defgroup TIM_Prescaler_Reload_Mode |
mbed_official | 76:aeb1df146756 | 795 | * @{ |
mbed_official | 76:aeb1df146756 | 796 | */ |
mbed_official | 76:aeb1df146756 | 797 | |
mbed_official | 76:aeb1df146756 | 798 | #define TIM_PSCReloadMode_Update ((uint16_t)0x0000) |
mbed_official | 76:aeb1df146756 | 799 | #define TIM_PSCReloadMode_Immediate ((uint16_t)0x0001) |
mbed_official | 76:aeb1df146756 | 800 | #define IS_TIM_PRESCALER_RELOAD(RELOAD) (((RELOAD) == TIM_PSCReloadMode_Update) || \ |
mbed_official | 76:aeb1df146756 | 801 | ((RELOAD) == TIM_PSCReloadMode_Immediate)) |
mbed_official | 76:aeb1df146756 | 802 | /** |
mbed_official | 76:aeb1df146756 | 803 | * @} |
mbed_official | 76:aeb1df146756 | 804 | */ |
mbed_official | 76:aeb1df146756 | 805 | |
mbed_official | 76:aeb1df146756 | 806 | /** @defgroup TIM_Forced_Action |
mbed_official | 76:aeb1df146756 | 807 | * @{ |
mbed_official | 76:aeb1df146756 | 808 | */ |
mbed_official | 76:aeb1df146756 | 809 | |
mbed_official | 76:aeb1df146756 | 810 | #define TIM_ForcedAction_Active ((uint16_t)0x0050) |
mbed_official | 76:aeb1df146756 | 811 | #define TIM_ForcedAction_InActive ((uint16_t)0x0040) |
mbed_official | 76:aeb1df146756 | 812 | #define IS_TIM_FORCED_ACTION(ACTION) (((ACTION) == TIM_ForcedAction_Active) || \ |
mbed_official | 76:aeb1df146756 | 813 | ((ACTION) == TIM_ForcedAction_InActive)) |
mbed_official | 76:aeb1df146756 | 814 | /** |
mbed_official | 76:aeb1df146756 | 815 | * @} |
mbed_official | 76:aeb1df146756 | 816 | */ |
mbed_official | 76:aeb1df146756 | 817 | |
mbed_official | 76:aeb1df146756 | 818 | /** @defgroup TIM_Encoder_Mode |
mbed_official | 76:aeb1df146756 | 819 | * @{ |
mbed_official | 76:aeb1df146756 | 820 | */ |
mbed_official | 76:aeb1df146756 | 821 | |
mbed_official | 76:aeb1df146756 | 822 | #define TIM_EncoderMode_TI1 ((uint16_t)0x0001) |
mbed_official | 76:aeb1df146756 | 823 | #define TIM_EncoderMode_TI2 ((uint16_t)0x0002) |
mbed_official | 76:aeb1df146756 | 824 | #define TIM_EncoderMode_TI12 ((uint16_t)0x0003) |
mbed_official | 76:aeb1df146756 | 825 | #define IS_TIM_ENCODER_MODE(MODE) (((MODE) == TIM_EncoderMode_TI1) || \ |
mbed_official | 76:aeb1df146756 | 826 | ((MODE) == TIM_EncoderMode_TI2) || \ |
mbed_official | 76:aeb1df146756 | 827 | ((MODE) == TIM_EncoderMode_TI12)) |
mbed_official | 76:aeb1df146756 | 828 | /** |
mbed_official | 76:aeb1df146756 | 829 | * @} |
mbed_official | 76:aeb1df146756 | 830 | */ |
mbed_official | 76:aeb1df146756 | 831 | |
mbed_official | 76:aeb1df146756 | 832 | |
mbed_official | 76:aeb1df146756 | 833 | /** @defgroup TIM_Event_Source |
mbed_official | 76:aeb1df146756 | 834 | * @{ |
mbed_official | 76:aeb1df146756 | 835 | */ |
mbed_official | 76:aeb1df146756 | 836 | |
mbed_official | 76:aeb1df146756 | 837 | #define TIM_EventSource_Update ((uint16_t)0x0001) |
mbed_official | 76:aeb1df146756 | 838 | #define TIM_EventSource_CC1 ((uint16_t)0x0002) |
mbed_official | 76:aeb1df146756 | 839 | #define TIM_EventSource_CC2 ((uint16_t)0x0004) |
mbed_official | 76:aeb1df146756 | 840 | #define TIM_EventSource_CC3 ((uint16_t)0x0008) |
mbed_official | 76:aeb1df146756 | 841 | #define TIM_EventSource_CC4 ((uint16_t)0x0010) |
mbed_official | 76:aeb1df146756 | 842 | #define TIM_EventSource_COM ((uint16_t)0x0020) |
mbed_official | 76:aeb1df146756 | 843 | #define TIM_EventSource_Trigger ((uint16_t)0x0040) |
mbed_official | 76:aeb1df146756 | 844 | #define TIM_EventSource_Break ((uint16_t)0x0080) |
mbed_official | 76:aeb1df146756 | 845 | #define IS_TIM_EVENT_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0xFF00) == 0x0000) && ((SOURCE) != 0x0000)) |
mbed_official | 76:aeb1df146756 | 846 | |
mbed_official | 76:aeb1df146756 | 847 | /** |
mbed_official | 76:aeb1df146756 | 848 | * @} |
mbed_official | 76:aeb1df146756 | 849 | */ |
mbed_official | 76:aeb1df146756 | 850 | |
mbed_official | 76:aeb1df146756 | 851 | /** @defgroup TIM_Update_Source |
mbed_official | 76:aeb1df146756 | 852 | * @{ |
mbed_official | 76:aeb1df146756 | 853 | */ |
mbed_official | 76:aeb1df146756 | 854 | |
mbed_official | 76:aeb1df146756 | 855 | #define TIM_UpdateSource_Global ((uint16_t)0x0000) /*!< Source of update is the counter overflow/underflow |
mbed_official | 76:aeb1df146756 | 856 | or the setting of UG bit, or an update generation |
mbed_official | 76:aeb1df146756 | 857 | through the slave mode controller. */ |
mbed_official | 76:aeb1df146756 | 858 | #define TIM_UpdateSource_Regular ((uint16_t)0x0001) /*!< Source of update is counter overflow/underflow. */ |
mbed_official | 76:aeb1df146756 | 859 | #define IS_TIM_UPDATE_SOURCE(SOURCE) (((SOURCE) == TIM_UpdateSource_Global) || \ |
mbed_official | 76:aeb1df146756 | 860 | ((SOURCE) == TIM_UpdateSource_Regular)) |
mbed_official | 76:aeb1df146756 | 861 | /** |
mbed_official | 76:aeb1df146756 | 862 | * @} |
mbed_official | 76:aeb1df146756 | 863 | */ |
mbed_official | 76:aeb1df146756 | 864 | |
mbed_official | 76:aeb1df146756 | 865 | /** @defgroup TIM_Output_Compare_Preload_State |
mbed_official | 76:aeb1df146756 | 866 | * @{ |
mbed_official | 76:aeb1df146756 | 867 | */ |
mbed_official | 76:aeb1df146756 | 868 | |
mbed_official | 76:aeb1df146756 | 869 | #define TIM_OCPreload_Enable ((uint16_t)0x0008) |
mbed_official | 76:aeb1df146756 | 870 | #define TIM_OCPreload_Disable ((uint16_t)0x0000) |
mbed_official | 76:aeb1df146756 | 871 | #define IS_TIM_OCPRELOAD_STATE(STATE) (((STATE) == TIM_OCPreload_Enable) || \ |
mbed_official | 76:aeb1df146756 | 872 | ((STATE) == TIM_OCPreload_Disable)) |
mbed_official | 76:aeb1df146756 | 873 | /** |
mbed_official | 76:aeb1df146756 | 874 | * @} |
mbed_official | 76:aeb1df146756 | 875 | */ |
mbed_official | 76:aeb1df146756 | 876 | |
mbed_official | 76:aeb1df146756 | 877 | /** @defgroup TIM_Output_Compare_Fast_State |
mbed_official | 76:aeb1df146756 | 878 | * @{ |
mbed_official | 76:aeb1df146756 | 879 | */ |
mbed_official | 76:aeb1df146756 | 880 | |
mbed_official | 76:aeb1df146756 | 881 | #define TIM_OCFast_Enable ((uint16_t)0x0004) |
mbed_official | 76:aeb1df146756 | 882 | #define TIM_OCFast_Disable ((uint16_t)0x0000) |
mbed_official | 76:aeb1df146756 | 883 | #define IS_TIM_OCFAST_STATE(STATE) (((STATE) == TIM_OCFast_Enable) || \ |
mbed_official | 76:aeb1df146756 | 884 | ((STATE) == TIM_OCFast_Disable)) |
mbed_official | 76:aeb1df146756 | 885 | |
mbed_official | 76:aeb1df146756 | 886 | /** |
mbed_official | 76:aeb1df146756 | 887 | * @} |
mbed_official | 76:aeb1df146756 | 888 | */ |
mbed_official | 76:aeb1df146756 | 889 | |
mbed_official | 76:aeb1df146756 | 890 | /** @defgroup TIM_Output_Compare_Clear_State |
mbed_official | 76:aeb1df146756 | 891 | * @{ |
mbed_official | 76:aeb1df146756 | 892 | */ |
mbed_official | 76:aeb1df146756 | 893 | |
mbed_official | 76:aeb1df146756 | 894 | #define TIM_OCClear_Enable ((uint16_t)0x0080) |
mbed_official | 76:aeb1df146756 | 895 | #define TIM_OCClear_Disable ((uint16_t)0x0000) |
mbed_official | 76:aeb1df146756 | 896 | #define IS_TIM_OCCLEAR_STATE(STATE) (((STATE) == TIM_OCClear_Enable) || \ |
mbed_official | 76:aeb1df146756 | 897 | ((STATE) == TIM_OCClear_Disable)) |
mbed_official | 76:aeb1df146756 | 898 | /** |
mbed_official | 76:aeb1df146756 | 899 | * @} |
mbed_official | 76:aeb1df146756 | 900 | */ |
mbed_official | 76:aeb1df146756 | 901 | |
mbed_official | 76:aeb1df146756 | 902 | /** @defgroup TIM_Trigger_Output_Source |
mbed_official | 76:aeb1df146756 | 903 | * @{ |
mbed_official | 76:aeb1df146756 | 904 | */ |
mbed_official | 76:aeb1df146756 | 905 | |
mbed_official | 76:aeb1df146756 | 906 | #define TIM_TRGOSource_Reset ((uint16_t)0x0000) |
mbed_official | 76:aeb1df146756 | 907 | #define TIM_TRGOSource_Enable ((uint16_t)0x0010) |
mbed_official | 76:aeb1df146756 | 908 | #define TIM_TRGOSource_Update ((uint16_t)0x0020) |
mbed_official | 76:aeb1df146756 | 909 | #define TIM_TRGOSource_OC1 ((uint16_t)0x0030) |
mbed_official | 76:aeb1df146756 | 910 | #define TIM_TRGOSource_OC1Ref ((uint16_t)0x0040) |
mbed_official | 76:aeb1df146756 | 911 | #define TIM_TRGOSource_OC2Ref ((uint16_t)0x0050) |
mbed_official | 76:aeb1df146756 | 912 | #define TIM_TRGOSource_OC3Ref ((uint16_t)0x0060) |
mbed_official | 76:aeb1df146756 | 913 | #define TIM_TRGOSource_OC4Ref ((uint16_t)0x0070) |
mbed_official | 76:aeb1df146756 | 914 | #define IS_TIM_TRGO_SOURCE(SOURCE) (((SOURCE) == TIM_TRGOSource_Reset) || \ |
mbed_official | 76:aeb1df146756 | 915 | ((SOURCE) == TIM_TRGOSource_Enable) || \ |
mbed_official | 76:aeb1df146756 | 916 | ((SOURCE) == TIM_TRGOSource_Update) || \ |
mbed_official | 76:aeb1df146756 | 917 | ((SOURCE) == TIM_TRGOSource_OC1) || \ |
mbed_official | 76:aeb1df146756 | 918 | ((SOURCE) == TIM_TRGOSource_OC1Ref) || \ |
mbed_official | 76:aeb1df146756 | 919 | ((SOURCE) == TIM_TRGOSource_OC2Ref) || \ |
mbed_official | 76:aeb1df146756 | 920 | ((SOURCE) == TIM_TRGOSource_OC3Ref) || \ |
mbed_official | 76:aeb1df146756 | 921 | ((SOURCE) == TIM_TRGOSource_OC4Ref)) |
mbed_official | 76:aeb1df146756 | 922 | /** |
mbed_official | 76:aeb1df146756 | 923 | * @} |
mbed_official | 76:aeb1df146756 | 924 | */ |
mbed_official | 76:aeb1df146756 | 925 | |
mbed_official | 76:aeb1df146756 | 926 | /** @defgroup TIM_Slave_Mode |
mbed_official | 76:aeb1df146756 | 927 | * @{ |
mbed_official | 76:aeb1df146756 | 928 | */ |
mbed_official | 76:aeb1df146756 | 929 | |
mbed_official | 76:aeb1df146756 | 930 | #define TIM_SlaveMode_Reset ((uint16_t)0x0004) |
mbed_official | 76:aeb1df146756 | 931 | #define TIM_SlaveMode_Gated ((uint16_t)0x0005) |
mbed_official | 76:aeb1df146756 | 932 | #define TIM_SlaveMode_Trigger ((uint16_t)0x0006) |
mbed_official | 76:aeb1df146756 | 933 | #define TIM_SlaveMode_External1 ((uint16_t)0x0007) |
mbed_official | 76:aeb1df146756 | 934 | #define IS_TIM_SLAVE_MODE(MODE) (((MODE) == TIM_SlaveMode_Reset) || \ |
mbed_official | 76:aeb1df146756 | 935 | ((MODE) == TIM_SlaveMode_Gated) || \ |
mbed_official | 76:aeb1df146756 | 936 | ((MODE) == TIM_SlaveMode_Trigger) || \ |
mbed_official | 76:aeb1df146756 | 937 | ((MODE) == TIM_SlaveMode_External1)) |
mbed_official | 76:aeb1df146756 | 938 | /** |
mbed_official | 76:aeb1df146756 | 939 | * @} |
mbed_official | 76:aeb1df146756 | 940 | */ |
mbed_official | 76:aeb1df146756 | 941 | |
mbed_official | 76:aeb1df146756 | 942 | /** @defgroup TIM_Master_Slave_Mode |
mbed_official | 76:aeb1df146756 | 943 | * @{ |
mbed_official | 76:aeb1df146756 | 944 | */ |
mbed_official | 76:aeb1df146756 | 945 | |
mbed_official | 76:aeb1df146756 | 946 | #define TIM_MasterSlaveMode_Enable ((uint16_t)0x0080) |
mbed_official | 76:aeb1df146756 | 947 | #define TIM_MasterSlaveMode_Disable ((uint16_t)0x0000) |
mbed_official | 76:aeb1df146756 | 948 | #define IS_TIM_MSM_STATE(STATE) (((STATE) == TIM_MasterSlaveMode_Enable) || \ |
mbed_official | 76:aeb1df146756 | 949 | ((STATE) == TIM_MasterSlaveMode_Disable)) |
mbed_official | 76:aeb1df146756 | 950 | /** |
mbed_official | 76:aeb1df146756 | 951 | * @} |
mbed_official | 76:aeb1df146756 | 952 | */ |
mbed_official | 76:aeb1df146756 | 953 | |
mbed_official | 76:aeb1df146756 | 954 | /** @defgroup TIM_Flags |
mbed_official | 76:aeb1df146756 | 955 | * @{ |
mbed_official | 76:aeb1df146756 | 956 | */ |
mbed_official | 76:aeb1df146756 | 957 | |
mbed_official | 76:aeb1df146756 | 958 | #define TIM_FLAG_Update ((uint16_t)0x0001) |
mbed_official | 76:aeb1df146756 | 959 | #define TIM_FLAG_CC1 ((uint16_t)0x0002) |
mbed_official | 76:aeb1df146756 | 960 | #define TIM_FLAG_CC2 ((uint16_t)0x0004) |
mbed_official | 76:aeb1df146756 | 961 | #define TIM_FLAG_CC3 ((uint16_t)0x0008) |
mbed_official | 76:aeb1df146756 | 962 | #define TIM_FLAG_CC4 ((uint16_t)0x0010) |
mbed_official | 76:aeb1df146756 | 963 | #define TIM_FLAG_COM ((uint16_t)0x0020) |
mbed_official | 76:aeb1df146756 | 964 | #define TIM_FLAG_Trigger ((uint16_t)0x0040) |
mbed_official | 76:aeb1df146756 | 965 | #define TIM_FLAG_Break ((uint16_t)0x0080) |
mbed_official | 76:aeb1df146756 | 966 | #define TIM_FLAG_CC1OF ((uint16_t)0x0200) |
mbed_official | 76:aeb1df146756 | 967 | #define TIM_FLAG_CC2OF ((uint16_t)0x0400) |
mbed_official | 76:aeb1df146756 | 968 | #define TIM_FLAG_CC3OF ((uint16_t)0x0800) |
mbed_official | 76:aeb1df146756 | 969 | #define TIM_FLAG_CC4OF ((uint16_t)0x1000) |
mbed_official | 76:aeb1df146756 | 970 | #define IS_TIM_GET_FLAG(FLAG) (((FLAG) == TIM_FLAG_Update) || \ |
mbed_official | 76:aeb1df146756 | 971 | ((FLAG) == TIM_FLAG_CC1) || \ |
mbed_official | 76:aeb1df146756 | 972 | ((FLAG) == TIM_FLAG_CC2) || \ |
mbed_official | 76:aeb1df146756 | 973 | ((FLAG) == TIM_FLAG_CC3) || \ |
mbed_official | 76:aeb1df146756 | 974 | ((FLAG) == TIM_FLAG_CC4) || \ |
mbed_official | 76:aeb1df146756 | 975 | ((FLAG) == TIM_FLAG_COM) || \ |
mbed_official | 76:aeb1df146756 | 976 | ((FLAG) == TIM_FLAG_Trigger) || \ |
mbed_official | 76:aeb1df146756 | 977 | ((FLAG) == TIM_FLAG_Break) || \ |
mbed_official | 76:aeb1df146756 | 978 | ((FLAG) == TIM_FLAG_CC1OF) || \ |
mbed_official | 76:aeb1df146756 | 979 | ((FLAG) == TIM_FLAG_CC2OF) || \ |
mbed_official | 76:aeb1df146756 | 980 | ((FLAG) == TIM_FLAG_CC3OF) || \ |
mbed_official | 76:aeb1df146756 | 981 | ((FLAG) == TIM_FLAG_CC4OF)) |
mbed_official | 76:aeb1df146756 | 982 | |
mbed_official | 76:aeb1df146756 | 983 | |
mbed_official | 76:aeb1df146756 | 984 | #define IS_TIM_CLEAR_FLAG(TIM_FLAG) ((((TIM_FLAG) & (uint16_t)0xE100) == 0x0000) && ((TIM_FLAG) != 0x0000)) |
mbed_official | 76:aeb1df146756 | 985 | /** |
mbed_official | 76:aeb1df146756 | 986 | * @} |
mbed_official | 76:aeb1df146756 | 987 | */ |
mbed_official | 76:aeb1df146756 | 988 | |
mbed_official | 76:aeb1df146756 | 989 | |
mbed_official | 76:aeb1df146756 | 990 | /** @defgroup TIM_Input_Capture_Filer_Value |
mbed_official | 76:aeb1df146756 | 991 | * @{ |
mbed_official | 76:aeb1df146756 | 992 | */ |
mbed_official | 76:aeb1df146756 | 993 | |
mbed_official | 76:aeb1df146756 | 994 | #define IS_TIM_IC_FILTER(ICFILTER) ((ICFILTER) <= 0xF) |
mbed_official | 76:aeb1df146756 | 995 | /** |
mbed_official | 76:aeb1df146756 | 996 | * @} |
mbed_official | 76:aeb1df146756 | 997 | */ |
mbed_official | 76:aeb1df146756 | 998 | |
mbed_official | 76:aeb1df146756 | 999 | /** @defgroup TIM_External_Trigger_Filter |
mbed_official | 76:aeb1df146756 | 1000 | * @{ |
mbed_official | 76:aeb1df146756 | 1001 | */ |
mbed_official | 76:aeb1df146756 | 1002 | |
mbed_official | 76:aeb1df146756 | 1003 | #define IS_TIM_EXT_FILTER(EXTFILTER) ((EXTFILTER) <= 0xF) |
mbed_official | 76:aeb1df146756 | 1004 | /** |
mbed_official | 76:aeb1df146756 | 1005 | * @} |
mbed_official | 76:aeb1df146756 | 1006 | */ |
mbed_official | 76:aeb1df146756 | 1007 | |
mbed_official | 76:aeb1df146756 | 1008 | /** @defgroup TIM_OCReferenceClear |
mbed_official | 76:aeb1df146756 | 1009 | * @{ |
mbed_official | 76:aeb1df146756 | 1010 | */ |
mbed_official | 76:aeb1df146756 | 1011 | #define TIM_OCReferenceClear_ETRF ((uint16_t)0x0008) |
mbed_official | 76:aeb1df146756 | 1012 | #define TIM_OCReferenceClear_OCREFCLR ((uint16_t)0x0000) |
mbed_official | 76:aeb1df146756 | 1013 | #define TIM_OCREFERENCECECLEAR_SOURCE(SOURCE) (((SOURCE) == TIM_OCReferenceClear_ETRF) || \ |
mbed_official | 76:aeb1df146756 | 1014 | ((SOURCE) == TIM_OCReferenceClear_OCREFCLR)) |
mbed_official | 76:aeb1df146756 | 1015 | |
mbed_official | 76:aeb1df146756 | 1016 | /** |
mbed_official | 76:aeb1df146756 | 1017 | * @} |
mbed_official | 76:aeb1df146756 | 1018 | */ |
mbed_official | 76:aeb1df146756 | 1019 | /** @defgroup TIM_Remap |
mbed_official | 76:aeb1df146756 | 1020 | * @{ |
mbed_official | 76:aeb1df146756 | 1021 | */ |
mbed_official | 76:aeb1df146756 | 1022 | #define TIM14_GPIO ((uint16_t)0x0000) |
mbed_official | 76:aeb1df146756 | 1023 | #define TIM14_RTC_CLK ((uint16_t)0x0001) |
mbed_official | 76:aeb1df146756 | 1024 | #define TIM14_HSEDiv32 ((uint16_t)0x0002) |
mbed_official | 76:aeb1df146756 | 1025 | #define TIM14_MCO ((uint16_t)0x0003) |
mbed_official | 76:aeb1df146756 | 1026 | |
mbed_official | 76:aeb1df146756 | 1027 | #define IS_TIM_REMAP(TIM_REMAP) (((TIM_REMAP) == TIM14_GPIO)|| \ |
mbed_official | 76:aeb1df146756 | 1028 | ((TIM_REMAP) == TIM14_RTC_CLK) || \ |
mbed_official | 76:aeb1df146756 | 1029 | ((TIM_REMAP) == TIM14_HSEDiv32) || \ |
mbed_official | 76:aeb1df146756 | 1030 | ((TIM_REMAP) == TIM14_MCO)) |
mbed_official | 76:aeb1df146756 | 1031 | /** |
mbed_official | 76:aeb1df146756 | 1032 | * @} |
mbed_official | 76:aeb1df146756 | 1033 | */ |
mbed_official | 76:aeb1df146756 | 1034 | |
mbed_official | 76:aeb1df146756 | 1035 | /** @defgroup TIM_Legacy |
mbed_official | 76:aeb1df146756 | 1036 | * @{ |
mbed_official | 76:aeb1df146756 | 1037 | */ |
mbed_official | 76:aeb1df146756 | 1038 | |
mbed_official | 76:aeb1df146756 | 1039 | #define TIM_DMABurstLength_1Byte TIM_DMABurstLength_1Transfer |
mbed_official | 76:aeb1df146756 | 1040 | #define TIM_DMABurstLength_2Bytes TIM_DMABurstLength_2Transfers |
mbed_official | 76:aeb1df146756 | 1041 | #define TIM_DMABurstLength_3Bytes TIM_DMABurstLength_3Transfers |
mbed_official | 76:aeb1df146756 | 1042 | #define TIM_DMABurstLength_4Bytes TIM_DMABurstLength_4Transfers |
mbed_official | 76:aeb1df146756 | 1043 | #define TIM_DMABurstLength_5Bytes TIM_DMABurstLength_5Transfers |
mbed_official | 76:aeb1df146756 | 1044 | #define TIM_DMABurstLength_6Bytes TIM_DMABurstLength_6Transfers |
mbed_official | 76:aeb1df146756 | 1045 | #define TIM_DMABurstLength_7Bytes TIM_DMABurstLength_7Transfers |
mbed_official | 76:aeb1df146756 | 1046 | #define TIM_DMABurstLength_8Bytes TIM_DMABurstLength_8Transfers |
mbed_official | 76:aeb1df146756 | 1047 | #define TIM_DMABurstLength_9Bytes TIM_DMABurstLength_9Transfers |
mbed_official | 76:aeb1df146756 | 1048 | #define TIM_DMABurstLength_10Bytes TIM_DMABurstLength_10Transfers |
mbed_official | 76:aeb1df146756 | 1049 | #define TIM_DMABurstLength_11Bytes TIM_DMABurstLength_11Transfers |
mbed_official | 76:aeb1df146756 | 1050 | #define TIM_DMABurstLength_12Bytes TIM_DMABurstLength_12Transfers |
mbed_official | 76:aeb1df146756 | 1051 | #define TIM_DMABurstLength_13Bytes TIM_DMABurstLength_13Transfers |
mbed_official | 76:aeb1df146756 | 1052 | #define TIM_DMABurstLength_14Bytes TIM_DMABurstLength_14Transfers |
mbed_official | 76:aeb1df146756 | 1053 | #define TIM_DMABurstLength_15Bytes TIM_DMABurstLength_15Transfers |
mbed_official | 76:aeb1df146756 | 1054 | #define TIM_DMABurstLength_16Bytes TIM_DMABurstLength_16Transfers |
mbed_official | 76:aeb1df146756 | 1055 | #define TIM_DMABurstLength_17Bytes TIM_DMABurstLength_17Transfers |
mbed_official | 76:aeb1df146756 | 1056 | #define TIM_DMABurstLength_18Bytes TIM_DMABurstLength_18Transfers |
mbed_official | 76:aeb1df146756 | 1057 | /** |
mbed_official | 76:aeb1df146756 | 1058 | * @} |
mbed_official | 76:aeb1df146756 | 1059 | */ |
mbed_official | 76:aeb1df146756 | 1060 | |
mbed_official | 76:aeb1df146756 | 1061 | /** |
mbed_official | 76:aeb1df146756 | 1062 | * @} |
mbed_official | 76:aeb1df146756 | 1063 | */ |
mbed_official | 76:aeb1df146756 | 1064 | |
mbed_official | 76:aeb1df146756 | 1065 | /* Exported macro ------------------------------------------------------------*/ |
mbed_official | 76:aeb1df146756 | 1066 | /* Exported functions ------------------------------------------------------- */ |
mbed_official | 76:aeb1df146756 | 1067 | |
mbed_official | 76:aeb1df146756 | 1068 | /* TimeBase management ********************************************************/ |
mbed_official | 76:aeb1df146756 | 1069 | void TIM_DeInit(TIM_TypeDef* TIMx); |
mbed_official | 76:aeb1df146756 | 1070 | void TIM_TimeBaseInit(TIM_TypeDef* TIMx, TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct); |
mbed_official | 76:aeb1df146756 | 1071 | void TIM_TimeBaseStructInit(TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct); |
mbed_official | 76:aeb1df146756 | 1072 | void TIM_PrescalerConfig(TIM_TypeDef* TIMx, uint16_t Prescaler, uint16_t TIM_PSCReloadMode); |
mbed_official | 76:aeb1df146756 | 1073 | void TIM_CounterModeConfig(TIM_TypeDef* TIMx, uint16_t TIM_CounterMode); |
mbed_official | 76:aeb1df146756 | 1074 | void TIM_SetCounter(TIM_TypeDef* TIMx, uint32_t Counter); |
mbed_official | 76:aeb1df146756 | 1075 | void TIM_SetAutoreload(TIM_TypeDef* TIMx, uint32_t Autoreload); |
mbed_official | 76:aeb1df146756 | 1076 | uint32_t TIM_GetCounter(TIM_TypeDef* TIMx); |
mbed_official | 76:aeb1df146756 | 1077 | uint16_t TIM_GetPrescaler(TIM_TypeDef* TIMx); |
mbed_official | 76:aeb1df146756 | 1078 | void TIM_UpdateDisableConfig(TIM_TypeDef* TIMx, FunctionalState NewState); |
mbed_official | 76:aeb1df146756 | 1079 | void TIM_UpdateRequestConfig(TIM_TypeDef* TIMx, uint16_t TIM_UpdateSource); |
mbed_official | 76:aeb1df146756 | 1080 | void TIM_ARRPreloadConfig(TIM_TypeDef* TIMx, FunctionalState NewState); |
mbed_official | 76:aeb1df146756 | 1081 | void TIM_SelectOnePulseMode(TIM_TypeDef* TIMx, uint16_t TIM_OPMode); |
mbed_official | 76:aeb1df146756 | 1082 | void TIM_SetClockDivision(TIM_TypeDef* TIMx, uint16_t TIM_CKD); |
mbed_official | 76:aeb1df146756 | 1083 | void TIM_Cmd(TIM_TypeDef* TIMx, FunctionalState NewState); |
mbed_official | 76:aeb1df146756 | 1084 | |
mbed_official | 76:aeb1df146756 | 1085 | /* Advanced-control timers (TIM1) specific features*******************/ |
mbed_official | 76:aeb1df146756 | 1086 | void TIM_BDTRConfig(TIM_TypeDef* TIMx, TIM_BDTRInitTypeDef *TIM_BDTRInitStruct); |
mbed_official | 76:aeb1df146756 | 1087 | void TIM_BDTRStructInit(TIM_BDTRInitTypeDef* TIM_BDTRInitStruct); |
mbed_official | 76:aeb1df146756 | 1088 | void TIM_CtrlPWMOutputs(TIM_TypeDef* TIMx, FunctionalState NewState); |
mbed_official | 76:aeb1df146756 | 1089 | |
mbed_official | 76:aeb1df146756 | 1090 | /* Output Compare management **************************************************/ |
mbed_official | 76:aeb1df146756 | 1091 | void TIM_OC1Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct); |
mbed_official | 76:aeb1df146756 | 1092 | void TIM_OC2Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct); |
mbed_official | 76:aeb1df146756 | 1093 | void TIM_OC3Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct); |
mbed_official | 76:aeb1df146756 | 1094 | void TIM_OC4Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct); |
mbed_official | 76:aeb1df146756 | 1095 | void TIM_OCStructInit(TIM_OCInitTypeDef* TIM_OCInitStruct); |
mbed_official | 76:aeb1df146756 | 1096 | void TIM_SelectOCxM(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_OCMode); |
mbed_official | 76:aeb1df146756 | 1097 | void TIM_SetCompare1(TIM_TypeDef* TIMx, uint32_t Compare1); |
mbed_official | 76:aeb1df146756 | 1098 | void TIM_SetCompare2(TIM_TypeDef* TIMx, uint32_t Compare2); |
mbed_official | 76:aeb1df146756 | 1099 | void TIM_SetCompare3(TIM_TypeDef* TIMx, uint32_t Compare3); |
mbed_official | 76:aeb1df146756 | 1100 | void TIM_SetCompare4(TIM_TypeDef* TIMx, uint32_t Compare4); |
mbed_official | 76:aeb1df146756 | 1101 | void TIM_ForcedOC1Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction); |
mbed_official | 76:aeb1df146756 | 1102 | void TIM_ForcedOC2Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction); |
mbed_official | 76:aeb1df146756 | 1103 | void TIM_ForcedOC3Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction); |
mbed_official | 76:aeb1df146756 | 1104 | void TIM_ForcedOC4Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction); |
mbed_official | 76:aeb1df146756 | 1105 | void TIM_CCPreloadControl(TIM_TypeDef* TIMx, FunctionalState NewState); |
mbed_official | 76:aeb1df146756 | 1106 | void TIM_OC1PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload); |
mbed_official | 76:aeb1df146756 | 1107 | void TIM_OC2PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload); |
mbed_official | 76:aeb1df146756 | 1108 | void TIM_OC3PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload); |
mbed_official | 76:aeb1df146756 | 1109 | void TIM_OC4PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload); |
mbed_official | 76:aeb1df146756 | 1110 | void TIM_OC1FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast); |
mbed_official | 76:aeb1df146756 | 1111 | void TIM_OC2FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast); |
mbed_official | 76:aeb1df146756 | 1112 | void TIM_OC3FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast); |
mbed_official | 76:aeb1df146756 | 1113 | void TIM_OC4FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast); |
mbed_official | 76:aeb1df146756 | 1114 | void TIM_ClearOC1Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear); |
mbed_official | 76:aeb1df146756 | 1115 | void TIM_ClearOC2Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear); |
mbed_official | 76:aeb1df146756 | 1116 | void TIM_ClearOC3Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear); |
mbed_official | 76:aeb1df146756 | 1117 | void TIM_ClearOC4Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear); |
mbed_official | 76:aeb1df146756 | 1118 | void TIM_OC1PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity); |
mbed_official | 76:aeb1df146756 | 1119 | void TIM_OC1NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity); |
mbed_official | 76:aeb1df146756 | 1120 | void TIM_OC2PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity); |
mbed_official | 76:aeb1df146756 | 1121 | void TIM_OC2NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity); |
mbed_official | 76:aeb1df146756 | 1122 | void TIM_OC3PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity); |
mbed_official | 76:aeb1df146756 | 1123 | void TIM_OC3NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity); |
mbed_official | 76:aeb1df146756 | 1124 | void TIM_OC4PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity); |
mbed_official | 76:aeb1df146756 | 1125 | void TIM_SelectOCREFClear(TIM_TypeDef* TIMx, uint16_t TIM_OCReferenceClear); |
mbed_official | 76:aeb1df146756 | 1126 | void TIM_CCxCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCx); |
mbed_official | 76:aeb1df146756 | 1127 | void TIM_CCxNCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCxN); |
mbed_official | 76:aeb1df146756 | 1128 | void TIM_SelectCOM(TIM_TypeDef* TIMx, FunctionalState NewState); |
mbed_official | 76:aeb1df146756 | 1129 | |
mbed_official | 76:aeb1df146756 | 1130 | /* Input Capture management ***************************************************/ |
mbed_official | 76:aeb1df146756 | 1131 | void TIM_ICInit(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct); |
mbed_official | 76:aeb1df146756 | 1132 | void TIM_ICStructInit(TIM_ICInitTypeDef* TIM_ICInitStruct); |
mbed_official | 76:aeb1df146756 | 1133 | void TIM_PWMIConfig(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct); |
mbed_official | 76:aeb1df146756 | 1134 | uint32_t TIM_GetCapture1(TIM_TypeDef* TIMx); |
mbed_official | 76:aeb1df146756 | 1135 | uint32_t TIM_GetCapture2(TIM_TypeDef* TIMx); |
mbed_official | 76:aeb1df146756 | 1136 | uint32_t TIM_GetCapture3(TIM_TypeDef* TIMx); |
mbed_official | 76:aeb1df146756 | 1137 | uint32_t TIM_GetCapture4(TIM_TypeDef* TIMx); |
mbed_official | 76:aeb1df146756 | 1138 | void TIM_SetIC1Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC); |
mbed_official | 76:aeb1df146756 | 1139 | void TIM_SetIC2Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC); |
mbed_official | 76:aeb1df146756 | 1140 | void TIM_SetIC3Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC); |
mbed_official | 76:aeb1df146756 | 1141 | void TIM_SetIC4Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC); |
mbed_official | 76:aeb1df146756 | 1142 | |
mbed_official | 76:aeb1df146756 | 1143 | /* Interrupts, DMA and flags management ***************************************/ |
mbed_official | 76:aeb1df146756 | 1144 | void TIM_ITConfig(TIM_TypeDef* TIMx, uint16_t TIM_IT, FunctionalState NewState); |
mbed_official | 76:aeb1df146756 | 1145 | void TIM_GenerateEvent(TIM_TypeDef* TIMx, uint16_t TIM_EventSource); |
mbed_official | 76:aeb1df146756 | 1146 | FlagStatus TIM_GetFlagStatus(TIM_TypeDef* TIMx, uint16_t TIM_FLAG); |
mbed_official | 76:aeb1df146756 | 1147 | void TIM_ClearFlag(TIM_TypeDef* TIMx, uint16_t TIM_FLAG); |
mbed_official | 76:aeb1df146756 | 1148 | ITStatus TIM_GetITStatus(TIM_TypeDef* TIMx, uint16_t TIM_IT); |
mbed_official | 76:aeb1df146756 | 1149 | void TIM_ClearITPendingBit(TIM_TypeDef* TIMx, uint16_t TIM_IT); |
mbed_official | 76:aeb1df146756 | 1150 | void TIM_DMAConfig(TIM_TypeDef* TIMx, uint16_t TIM_DMABase, uint16_t TIM_DMABurstLength); |
mbed_official | 76:aeb1df146756 | 1151 | void TIM_DMACmd(TIM_TypeDef* TIMx, uint16_t TIM_DMASource, FunctionalState NewState); |
mbed_official | 76:aeb1df146756 | 1152 | void TIM_SelectCCDMA(TIM_TypeDef* TIMx, FunctionalState NewState); |
mbed_official | 76:aeb1df146756 | 1153 | |
mbed_official | 76:aeb1df146756 | 1154 | /* Clocks management **********************************************************/ |
mbed_official | 76:aeb1df146756 | 1155 | void TIM_InternalClockConfig(TIM_TypeDef* TIMx); |
mbed_official | 76:aeb1df146756 | 1156 | void TIM_ITRxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource); |
mbed_official | 76:aeb1df146756 | 1157 | void TIM_TIxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_TIxExternalCLKSource, |
mbed_official | 76:aeb1df146756 | 1158 | uint16_t TIM_ICPolarity, uint16_t ICFilter); |
mbed_official | 76:aeb1df146756 | 1159 | void TIM_ETRClockMode1Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity, |
mbed_official | 76:aeb1df146756 | 1160 | uint16_t ExtTRGFilter); |
mbed_official | 76:aeb1df146756 | 1161 | void TIM_ETRClockMode2Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, |
mbed_official | 76:aeb1df146756 | 1162 | uint16_t TIM_ExtTRGPolarity, uint16_t ExtTRGFilter); |
mbed_official | 76:aeb1df146756 | 1163 | |
mbed_official | 76:aeb1df146756 | 1164 | |
mbed_official | 76:aeb1df146756 | 1165 | /* Synchronization management *************************************************/ |
mbed_official | 76:aeb1df146756 | 1166 | void TIM_SelectInputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource); |
mbed_official | 76:aeb1df146756 | 1167 | void TIM_SelectOutputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_TRGOSource); |
mbed_official | 76:aeb1df146756 | 1168 | void TIM_SelectSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_SlaveMode); |
mbed_official | 76:aeb1df146756 | 1169 | void TIM_SelectMasterSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_MasterSlaveMode); |
mbed_official | 76:aeb1df146756 | 1170 | void TIM_ETRConfig(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity, |
mbed_official | 76:aeb1df146756 | 1171 | uint16_t ExtTRGFilter); |
mbed_official | 76:aeb1df146756 | 1172 | |
mbed_official | 76:aeb1df146756 | 1173 | /* Specific interface management **********************************************/ |
mbed_official | 76:aeb1df146756 | 1174 | void TIM_EncoderInterfaceConfig(TIM_TypeDef* TIMx, uint16_t TIM_EncoderMode, |
mbed_official | 76:aeb1df146756 | 1175 | uint16_t TIM_IC1Polarity, uint16_t TIM_IC2Polarity); |
mbed_official | 76:aeb1df146756 | 1176 | void TIM_SelectHallSensor(TIM_TypeDef* TIMx, FunctionalState NewState); |
mbed_official | 76:aeb1df146756 | 1177 | |
mbed_official | 76:aeb1df146756 | 1178 | /* Specific remapping management **********************************************/ |
mbed_official | 76:aeb1df146756 | 1179 | void TIM_RemapConfig(TIM_TypeDef* TIMx, uint16_t TIM_Remap); |
mbed_official | 76:aeb1df146756 | 1180 | |
mbed_official | 76:aeb1df146756 | 1181 | |
mbed_official | 76:aeb1df146756 | 1182 | #ifdef __cplusplus |
mbed_official | 76:aeb1df146756 | 1183 | } |
mbed_official | 76:aeb1df146756 | 1184 | #endif |
mbed_official | 76:aeb1df146756 | 1185 | |
mbed_official | 76:aeb1df146756 | 1186 | #endif /*__STM32F0XX_TIM_H */ |
mbed_official | 76:aeb1df146756 | 1187 | |
mbed_official | 76:aeb1df146756 | 1188 | /** |
mbed_official | 76:aeb1df146756 | 1189 | * @} |
mbed_official | 76:aeb1df146756 | 1190 | */ |
mbed_official | 76:aeb1df146756 | 1191 | |
mbed_official | 76:aeb1df146756 | 1192 | /** |
mbed_official | 76:aeb1df146756 | 1193 | * @} |
mbed_official | 76:aeb1df146756 | 1194 | */ |
mbed_official | 76:aeb1df146756 | 1195 | |
mbed_official | 76:aeb1df146756 | 1196 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |