Abdessamad El Abbassi / mbed-src-temp

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targets/cmsis/TARGET_STM/TARGET_NUCLEO_F030R8/stm32f0xx_spi.c@106:ced8cbb51063, 2014-02-26 (annotated)

Committer:
mbed_official
Date:
Wed Feb 26 09:45:12 2014 +0000
Revision:
106:ced8cbb51063
Parent:
76:aeb1df146756 
Synchronized with git revision 4222735eff5868389433f0e9271976b39c8115cd



Full URL: https://github.com/mbedmicro/mbed/commit/4222735eff5868389433f0e9271976b39c8115cd/



[NUCLEO_xxx] Update STM32CubeF4 driver V1.0.0 + update license

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 76:aeb1df146756 1 /**
mbed_official 76:aeb1df146756 2 ******************************************************************************
mbed_official 76:aeb1df146756 3 * @file stm32f0xx_spi.c
mbed_official 76:aeb1df146756 4 * @author MCD Application Team
mbed_official 76:aeb1df146756 5 * @version V1.3.0
mbed_official 76:aeb1df146756 6 * @date 16-January-2014
mbed_official 76:aeb1df146756 7 * @brief This file provides firmware functions to manage the following
mbed_official 76:aeb1df146756 8 * functionalities of the Serial peripheral interface (SPI):
mbed_official 76:aeb1df146756 9 * + Initialization and Configuration
mbed_official 76:aeb1df146756 10 * + Data transfers functions
mbed_official 76:aeb1df146756 11 * + Hardware CRC Calculation
mbed_official 76:aeb1df146756 12 * + DMA transfers management
mbed_official 76:aeb1df146756 13 * + Interrupts and flags management
mbed_official 76:aeb1df146756 14 *
mbed_official 76:aeb1df146756 15 * @verbatim
mbed_official 76:aeb1df146756 16
mbed_official 76:aeb1df146756 17 ===============================================================================
mbed_official 76:aeb1df146756 18 ##### How to use this driver #####
mbed_official 76:aeb1df146756 19 ===============================================================================
mbed_official 76:aeb1df146756 20 [..]
mbed_official 76:aeb1df146756 21 (#) Enable peripheral clock using RCC_APB2PeriphClockCmd(RCC_APB2Periph_SPI1, ENABLE)
mbed_official 76:aeb1df146756 22 function for SPI1 or using RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2, ENABLE)
mbed_official 76:aeb1df146756 23 function for SPI2.
mbed_official 76:aeb1df146756 24
mbed_official 76:aeb1df146756 25 (#) Enable SCK, MOSI, MISO and NSS GPIO clocks using
mbed_official 76:aeb1df146756 26 RCC_AHBPeriphClockCmd() function.
mbed_official 76:aeb1df146756 27
mbed_official 76:aeb1df146756 28 (#) Peripherals alternate function:
mbed_official 76:aeb1df146756 29 (++) Connect the pin to the desired peripherals' Alternate
mbed_official 76:aeb1df146756 30 Function (AF) using GPIO_PinAFConfig() function.
mbed_official 76:aeb1df146756 31 (++) Configure the desired pin in alternate function by:
mbed_official 76:aeb1df146756 32 GPIO_InitStruct->GPIO_Mode = GPIO_Mode_AF.
mbed_official 76:aeb1df146756 33 (++) Select the type, pull-up/pull-down and output speed via
mbed_official 76:aeb1df146756 34 GPIO_PuPd, GPIO_OType and GPIO_Speed members.
mbed_official 76:aeb1df146756 35 (++) Call GPIO_Init() function.
mbed_official 76:aeb1df146756 36
mbed_official 76:aeb1df146756 37 (#) Program the Polarity, Phase, First Data, Baud Rate Prescaler, Slave
mbed_official 76:aeb1df146756 38 Management, Peripheral Mode and CRC Polynomial values using the SPI_Init()
mbed_official 76:aeb1df146756 39 function.In I2S mode, program the Mode, Standard, Data Format, MCLK
mbed_official 76:aeb1df146756 40 Output, Audio frequency and Polarity using I2S_Init() function.
mbed_official 76:aeb1df146756 41
mbed_official 76:aeb1df146756 42 (#) Configure the FIFO threshold using SPI_RxFIFOThresholdConfig() to select
mbed_official 76:aeb1df146756 43 at which threshold the RXNE event is generated.
mbed_official 76:aeb1df146756 44
mbed_official 76:aeb1df146756 45 (#) Enable the NVIC and the corresponding interrupt using the function
mbed_official 76:aeb1df146756 46 SPI_ITConfig() if you need to use interrupt mode.
mbed_official 76:aeb1df146756 47
mbed_official 76:aeb1df146756 48 (#) When using the DMA mode
mbed_official 76:aeb1df146756 49 (++) Configure the DMA using DMA_Init() function.
mbed_official 76:aeb1df146756 50 (++) Active the needed channel Request using SPI_I2S_DMACmd() function.
mbed_official 76:aeb1df146756 51
mbed_official 76:aeb1df146756 52 (#) Enable the SPI using the SPI_Cmd() function or enable the I2S using
mbed_official 76:aeb1df146756 53 I2S_Cmd().
mbed_official 76:aeb1df146756 54
mbed_official 76:aeb1df146756 55 (#) Enable the DMA using the DMA_Cmd() function when using DMA mode.
mbed_official 76:aeb1df146756 56
mbed_official 76:aeb1df146756 57 (#) Optionally, you can enable/configure the following parameters without
mbed_official 76:aeb1df146756 58 re-initialization (i.e there is no need to call again SPI_Init() function):
mbed_official 76:aeb1df146756 59 (++) When bidirectional mode (SPI_Direction_1Line_Rx or SPI_Direction_1Line_Tx)
mbed_official 76:aeb1df146756 60 is programmed as Data direction parameter using the SPI_Init()
mbed_official 76:aeb1df146756 61 function it can be possible to switch between SPI_Direction_Tx
mbed_official 76:aeb1df146756 62 or SPI_Direction_Rx using the SPI_BiDirectionalLineConfig() function.
mbed_official 76:aeb1df146756 63 (++) When SPI_NSS_Soft is selected as Slave Select Management parameter
mbed_official 76:aeb1df146756 64 using the SPI_Init() function it can be possible to manage the
mbed_official 76:aeb1df146756 65 NSS internal signal using the SPI_NSSInternalSoftwareConfig() function.
mbed_official 76:aeb1df146756 66 (++) Reconfigure the data size using the SPI_DataSizeConfig() function.
mbed_official 76:aeb1df146756 67 (++) Enable or disable the SS output using the SPI_SSOutputCmd() function.
mbed_official 76:aeb1df146756 68
mbed_official 76:aeb1df146756 69 (#) To use the CRC Hardware calculation feature refer to the Peripheral
mbed_official 76:aeb1df146756 70 CRC hardware Calculation subsection.
mbed_official 76:aeb1df146756 71
mbed_official 76:aeb1df146756 72 @endverbatim
mbed_official 76:aeb1df146756 73 ******************************************************************************
mbed_official 76:aeb1df146756 74 * @attention
mbed_official 76:aeb1df146756 75 *
mbed_official 106:ced8cbb51063 76 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official 76:aeb1df146756 77 *
mbed_official 106:ced8cbb51063 78 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 106:ced8cbb51063 79 * are permitted provided that the following conditions are met:
mbed_official 106:ced8cbb51063 80 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 106:ced8cbb51063 81 * this list of conditions and the following disclaimer.
mbed_official 106:ced8cbb51063 82 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 106:ced8cbb51063 83 * this list of conditions and the following disclaimer in the documentation
mbed_official 106:ced8cbb51063 84 * and/or other materials provided with the distribution.
mbed_official 106:ced8cbb51063 85 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 106:ced8cbb51063 86 * may be used to endorse or promote products derived from this software
mbed_official 106:ced8cbb51063 87 * without specific prior written permission.
mbed_official 76:aeb1df146756 88 *
mbed_official 106:ced8cbb51063 89 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 106:ced8cbb51063 90 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 106:ced8cbb51063 91 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 106:ced8cbb51063 92 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 106:ced8cbb51063 93 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 106:ced8cbb51063 94 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 106:ced8cbb51063 95 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 106:ced8cbb51063 96 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 106:ced8cbb51063 97 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 106:ced8cbb51063 98 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 76:aeb1df146756 99 *
mbed_official 76:aeb1df146756 100 ******************************************************************************
mbed_official 76:aeb1df146756 101 */
mbed_official 76:aeb1df146756 102
mbed_official 76:aeb1df146756 103 /* Includes ------------------------------------------------------------------*/
mbed_official 76:aeb1df146756 104 #include "stm32f0xx_spi.h"
mbed_official 76:aeb1df146756 105 #include "stm32f0xx_rcc.h"
mbed_official 76:aeb1df146756 106
mbed_official 76:aeb1df146756 107 /** @addtogroup STM32F0xx_StdPeriph_Driver
mbed_official 76:aeb1df146756 108 * @{
mbed_official 76:aeb1df146756 109 */
mbed_official 76:aeb1df146756 110
mbed_official 76:aeb1df146756 111 /** @defgroup SPI
mbed_official 76:aeb1df146756 112 * @brief SPI driver modules
mbed_official 76:aeb1df146756 113 * @{
mbed_official 76:aeb1df146756 114 */
mbed_official 76:aeb1df146756 115
mbed_official 76:aeb1df146756 116 /* Private typedef -----------------------------------------------------------*/
mbed_official 76:aeb1df146756 117 /* Private define ------------------------------------------------------------*/
mbed_official 76:aeb1df146756 118 /* SPI registers Masks */
mbed_official 76:aeb1df146756 119 #define CR1_CLEAR_MASK ((uint16_t)0x3040)
mbed_official 76:aeb1df146756 120 #define CR1_CLEAR_MASK2 ((uint16_t)0xFFFB)
mbed_official 76:aeb1df146756 121 #define CR2_LDMA_MASK ((uint16_t)0x9FFF)
mbed_official 76:aeb1df146756 122
mbed_official 76:aeb1df146756 123 #define I2SCFGR_CLEAR_Mask ((uint16_t)0xF040)
mbed_official 76:aeb1df146756 124
mbed_official 76:aeb1df146756 125 /* Private macro -------------------------------------------------------------*/
mbed_official 76:aeb1df146756 126 /* Private variables ---------------------------------------------------------*/
mbed_official 76:aeb1df146756 127 /* Private function prototypes -----------------------------------------------*/
mbed_official 76:aeb1df146756 128 /* Private functions ---------------------------------------------------------*/
mbed_official 76:aeb1df146756 129
mbed_official 76:aeb1df146756 130 /** @defgroup SPI_Private_Functions
mbed_official 76:aeb1df146756 131 * @{
mbed_official 76:aeb1df146756 132 */
mbed_official 76:aeb1df146756 133
mbed_official 76:aeb1df146756 134 /** @defgroup SPI_Group1 Initialization and Configuration functions
mbed_official 76:aeb1df146756 135 * @brief Initialization and Configuration functions
mbed_official 76:aeb1df146756 136 *
mbed_official 76:aeb1df146756 137 @verbatim
mbed_official 76:aeb1df146756 138 ===============================================================================
mbed_official 76:aeb1df146756 139 ##### Initialization and Configuration functions #####
mbed_official 76:aeb1df146756 140 ===============================================================================
mbed_official 76:aeb1df146756 141 [..] This section provides a set of functions allowing to initialize the SPI Direction,
mbed_official 76:aeb1df146756 142 SPI Mode, SPI Data Size, SPI Polarity, SPI Phase, SPI NSS Management, SPI Baud
mbed_official 76:aeb1df146756 143 Rate Prescaler, SPI First Bit and SPI CRC Polynomial.
mbed_official 76:aeb1df146756 144
mbed_official 76:aeb1df146756 145 [..] The SPI_Init() function follows the SPI configuration procedures for Master mode
mbed_official 76:aeb1df146756 146 and Slave mode (details for these procedures are available in reference manual).
mbed_official 76:aeb1df146756 147
mbed_official 76:aeb1df146756 148 [..] When the Software NSS management (SPI_InitStruct->SPI_NSS = SPI_NSS_Soft) is selected,
mbed_official 76:aeb1df146756 149 use the following function to manage the NSS bit:
mbed_official 76:aeb1df146756 150 void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft);
mbed_official 76:aeb1df146756 151
mbed_official 76:aeb1df146756 152 [..] In Master mode, when the Hardware NSS management (SPI_InitStruct->SPI_NSS = SPI_NSS_Hard)
mbed_official 76:aeb1df146756 153 is selected, use the follwoing function to enable the NSS output feature.
mbed_official 76:aeb1df146756 154 void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState);
mbed_official 76:aeb1df146756 155
mbed_official 76:aeb1df146756 156 [..] The NSS pulse mode can be managed by the SPI TI mode when enabling it using the following function:
mbed_official 76:aeb1df146756 157 void SPI_TIModeCmd(SPI_TypeDef* SPIx, FunctionalState NewState);
mbed_official 76:aeb1df146756 158 And it can be managed by software in the SPI Motorola mode using this function:
mbed_official 76:aeb1df146756 159 void SPI_NSSPulseModeCmd(SPI_TypeDef* SPIx, FunctionalState NewState);
mbed_official 76:aeb1df146756 160
mbed_official 76:aeb1df146756 161 [..] This section provides also functions to initialize the I2S Mode, Standard,
mbed_official 76:aeb1df146756 162 Data Format, MCLK Output, Audio frequency and Polarity.
mbed_official 76:aeb1df146756 163
mbed_official 76:aeb1df146756 164 [..] The I2S_Init() function follows the I2S configuration procedures for Master mode
mbed_official 76:aeb1df146756 165 and Slave mode.
mbed_official 76:aeb1df146756 166
mbed_official 76:aeb1df146756 167 @endverbatim
mbed_official 76:aeb1df146756 168 * @{
mbed_official 76:aeb1df146756 169 */
mbed_official 76:aeb1df146756 170
mbed_official 76:aeb1df146756 171 /**
mbed_official 76:aeb1df146756 172 * @brief Deinitializes the SPIx peripheral registers to their default
mbed_official 76:aeb1df146756 173 * reset values.
mbed_official 76:aeb1df146756 174 * @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
mbed_official 76:aeb1df146756 175 * @note SPI2 is not available for STM32F031 devices.
mbed_official 76:aeb1df146756 176 * I2S mode is not supported for STM32F030 devices.
mbed_official 76:aeb1df146756 177 * @retval None
mbed_official 76:aeb1df146756 178 */
mbed_official 76:aeb1df146756 179 void SPI_I2S_DeInit(SPI_TypeDef* SPIx)
mbed_official 76:aeb1df146756 180 {
mbed_official 76:aeb1df146756 181 /* Check the parameters */
mbed_official 76:aeb1df146756 182 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 76:aeb1df146756 183
mbed_official 76:aeb1df146756 184 if (SPIx == SPI1)
mbed_official 76:aeb1df146756 185 {
mbed_official 76:aeb1df146756 186 /* Enable SPI1 reset state */
mbed_official 76:aeb1df146756 187 RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, ENABLE);
mbed_official 76:aeb1df146756 188 /* Release SPI1 from reset state */
mbed_official 76:aeb1df146756 189 RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, DISABLE);
mbed_official 76:aeb1df146756 190 }
mbed_official 76:aeb1df146756 191 else
mbed_official 76:aeb1df146756 192 {
mbed_official 76:aeb1df146756 193 if (SPIx == SPI2)
mbed_official 76:aeb1df146756 194 {
mbed_official 76:aeb1df146756 195 /* Enable SPI2 reset state */
mbed_official 76:aeb1df146756 196 RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, ENABLE);
mbed_official 76:aeb1df146756 197 /* Release SPI2 from reset state */
mbed_official 76:aeb1df146756 198 RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, DISABLE);
mbed_official 76:aeb1df146756 199 }
mbed_official 76:aeb1df146756 200 }
mbed_official 76:aeb1df146756 201 }
mbed_official 76:aeb1df146756 202
mbed_official 76:aeb1df146756 203 /**
mbed_official 76:aeb1df146756 204 * @brief Fills each SPI_InitStruct member with its default value.
mbed_official 76:aeb1df146756 205 * @param SPI_InitStruct: pointer to a SPI_InitTypeDef structure which will be initialized.
mbed_official 76:aeb1df146756 206 * @retval None
mbed_official 76:aeb1df146756 207 */
mbed_official 76:aeb1df146756 208 void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct)
mbed_official 76:aeb1df146756 209 {
mbed_official 76:aeb1df146756 210 /*--------------- Reset SPI init structure parameters values -----------------*/
mbed_official 76:aeb1df146756 211 /* Initialize the SPI_Direction member */
mbed_official 76:aeb1df146756 212 SPI_InitStruct->SPI_Direction = SPI_Direction_2Lines_FullDuplex;
mbed_official 76:aeb1df146756 213 /* Initialize the SPI_Mode member */
mbed_official 76:aeb1df146756 214 SPI_InitStruct->SPI_Mode = SPI_Mode_Slave;
mbed_official 76:aeb1df146756 215 /* Initialize the SPI_DataSize member */
mbed_official 76:aeb1df146756 216 SPI_InitStruct->SPI_DataSize = SPI_DataSize_8b;
mbed_official 76:aeb1df146756 217 /* Initialize the SPI_CPOL member */
mbed_official 76:aeb1df146756 218 SPI_InitStruct->SPI_CPOL = SPI_CPOL_Low;
mbed_official 76:aeb1df146756 219 /* Initialize the SPI_CPHA member */
mbed_official 76:aeb1df146756 220 SPI_InitStruct->SPI_CPHA = SPI_CPHA_1Edge;
mbed_official 76:aeb1df146756 221 /* Initialize the SPI_NSS member */
mbed_official 76:aeb1df146756 222 SPI_InitStruct->SPI_NSS = SPI_NSS_Hard;
mbed_official 76:aeb1df146756 223 /* Initialize the SPI_BaudRatePrescaler member */
mbed_official 76:aeb1df146756 224 SPI_InitStruct->SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_2;
mbed_official 76:aeb1df146756 225 /* Initialize the SPI_FirstBit member */
mbed_official 76:aeb1df146756 226 SPI_InitStruct->SPI_FirstBit = SPI_FirstBit_MSB;
mbed_official 76:aeb1df146756 227 /* Initialize the SPI_CRCPolynomial member */
mbed_official 76:aeb1df146756 228 SPI_InitStruct->SPI_CRCPolynomial = 7;
mbed_official 76:aeb1df146756 229 }
mbed_official 76:aeb1df146756 230
mbed_official 76:aeb1df146756 231 /**
mbed_official 76:aeb1df146756 232 * @brief Initializes the SPIx peripheral according to the specified
mbed_official 76:aeb1df146756 233 * parameters in the SPI_InitStruct.
mbed_official 76:aeb1df146756 234 * @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
mbed_official 76:aeb1df146756 235 * @note SPI2 is not available for STM32F031 devices.
mbed_official 76:aeb1df146756 236 * @param SPI_InitStruct: pointer to a SPI_InitTypeDef structure that
mbed_official 76:aeb1df146756 237 * contains the configuration information for the specified SPI peripheral.
mbed_official 76:aeb1df146756 238 * @retval None
mbed_official 76:aeb1df146756 239 */
mbed_official 76:aeb1df146756 240 void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct)
mbed_official 76:aeb1df146756 241 {
mbed_official 76:aeb1df146756 242 uint16_t tmpreg = 0;
mbed_official 76:aeb1df146756 243
mbed_official 76:aeb1df146756 244 /* check the parameters */
mbed_official 76:aeb1df146756 245 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 76:aeb1df146756 246
mbed_official 76:aeb1df146756 247 /* Check the SPI parameters */
mbed_official 76:aeb1df146756 248 assert_param(IS_SPI_DIRECTION_MODE(SPI_InitStruct->SPI_Direction));
mbed_official 76:aeb1df146756 249 assert_param(IS_SPI_MODE(SPI_InitStruct->SPI_Mode));
mbed_official 76:aeb1df146756 250 assert_param(IS_SPI_DATA_SIZE(SPI_InitStruct->SPI_DataSize));
mbed_official 76:aeb1df146756 251 assert_param(IS_SPI_CPOL(SPI_InitStruct->SPI_CPOL));
mbed_official 76:aeb1df146756 252 assert_param(IS_SPI_CPHA(SPI_InitStruct->SPI_CPHA));
mbed_official 76:aeb1df146756 253 assert_param(IS_SPI_NSS(SPI_InitStruct->SPI_NSS));
mbed_official 76:aeb1df146756 254 assert_param(IS_SPI_BAUDRATE_PRESCALER(SPI_InitStruct->SPI_BaudRatePrescaler));
mbed_official 76:aeb1df146756 255 assert_param(IS_SPI_FIRST_BIT(SPI_InitStruct->SPI_FirstBit));
mbed_official 76:aeb1df146756 256 assert_param(IS_SPI_CRC_POLYNOMIAL(SPI_InitStruct->SPI_CRCPolynomial));
mbed_official 76:aeb1df146756 257
mbed_official 76:aeb1df146756 258 /*---------------------------- SPIx CR1 Configuration ------------------------*/
mbed_official 76:aeb1df146756 259 /* Get the SPIx CR1 value */
mbed_official 76:aeb1df146756 260 tmpreg = SPIx->CR1;
mbed_official 76:aeb1df146756 261 /* Clear BIDIMode, BIDIOE, RxONLY, SSM, SSI, LSBFirst, BR, CPOL and CPHA bits */
mbed_official 76:aeb1df146756 262 tmpreg &= CR1_CLEAR_MASK;
mbed_official 76:aeb1df146756 263 /* Configure SPIx: direction, NSS management, first transmitted bit, BaudRate prescaler
mbed_official 76:aeb1df146756 264 master/slave mode, CPOL and CPHA */
mbed_official 76:aeb1df146756 265 /* Set BIDImode, BIDIOE and RxONLY bits according to SPI_Direction value */
mbed_official 76:aeb1df146756 266 /* Set SSM, SSI bit according to SPI_NSS values */
mbed_official 76:aeb1df146756 267 /* Set LSBFirst bit according to SPI_FirstBit value */
mbed_official 76:aeb1df146756 268 /* Set BR bits according to SPI_BaudRatePrescaler value */
mbed_official 76:aeb1df146756 269 /* Set CPOL bit according to SPI_CPOL value */
mbed_official 76:aeb1df146756 270 /* Set CPHA bit according to SPI_CPHA value */
mbed_official 76:aeb1df146756 271 tmpreg |= (uint16_t)((uint32_t)SPI_InitStruct->SPI_Direction | SPI_InitStruct->SPI_FirstBit |
mbed_official 76:aeb1df146756 272 SPI_InitStruct->SPI_CPOL | SPI_InitStruct->SPI_CPHA |
mbed_official 76:aeb1df146756 273 SPI_InitStruct->SPI_NSS | SPI_InitStruct->SPI_BaudRatePrescaler);
mbed_official 76:aeb1df146756 274 /* Write to SPIx CR1 */
mbed_official 76:aeb1df146756 275 SPIx->CR1 = tmpreg;
mbed_official 76:aeb1df146756 276 /*-------------------------Data Size Configuration -----------------------*/
mbed_official 76:aeb1df146756 277 /* Get the SPIx CR2 value */
mbed_official 76:aeb1df146756 278 tmpreg = SPIx->CR2;
mbed_official 76:aeb1df146756 279 /* Clear DS[3:0] bits */
mbed_official 76:aeb1df146756 280 tmpreg &=(uint16_t)~SPI_CR2_DS;
mbed_official 76:aeb1df146756 281 /* Configure SPIx: Data Size */
mbed_official 76:aeb1df146756 282 tmpreg |= (uint16_t)(SPI_InitStruct->SPI_DataSize);
mbed_official 76:aeb1df146756 283 /* Write to SPIx CR2 */
mbed_official 76:aeb1df146756 284 SPIx->CR2 = tmpreg;
mbed_official 76:aeb1df146756 285
mbed_official 76:aeb1df146756 286 /*---------------------------- SPIx CRCPOLY Configuration --------------------*/
mbed_official 76:aeb1df146756 287 /* Write to SPIx CRCPOLY */
mbed_official 76:aeb1df146756 288 SPIx->CRCPR = SPI_InitStruct->SPI_CRCPolynomial;
mbed_official 76:aeb1df146756 289
mbed_official 76:aeb1df146756 290 /*---------------------------- SPIx CR1 Configuration ------------------------*/
mbed_official 76:aeb1df146756 291 /* Get the SPIx CR1 value */
mbed_official 76:aeb1df146756 292 tmpreg = SPIx->CR1;
mbed_official 76:aeb1df146756 293 /* Clear MSTR bit */
mbed_official 76:aeb1df146756 294 tmpreg &= CR1_CLEAR_MASK2;
mbed_official 76:aeb1df146756 295 /* Configure SPIx: master/slave mode */
mbed_official 76:aeb1df146756 296 /* Set MSTR bit according to SPI_Mode */
mbed_official 76:aeb1df146756 297 tmpreg |= (uint16_t)((uint32_t)SPI_InitStruct->SPI_Mode);
mbed_official 76:aeb1df146756 298 /* Write to SPIx CR1 */
mbed_official 76:aeb1df146756 299 SPIx->CR1 = tmpreg;
mbed_official 76:aeb1df146756 300
mbed_official 76:aeb1df146756 301 /* Activate the SPI mode (Reset I2SMOD bit in I2SCFGR register) */
mbed_official 76:aeb1df146756 302 SPIx->I2SCFGR &= (uint16_t)~((uint16_t)SPI_I2SCFGR_I2SMOD);
mbed_official 76:aeb1df146756 303 }
mbed_official 76:aeb1df146756 304
mbed_official 76:aeb1df146756 305 /**
mbed_official 76:aeb1df146756 306 * @brief Fills each I2S_InitStruct member with its default value.
mbed_official 76:aeb1df146756 307 * @note This mode is not supported for STM32F030 devices.
mbed_official 76:aeb1df146756 308 * @param I2S_InitStruct: pointer to a I2S_InitTypeDef structure which will be initialized.
mbed_official 76:aeb1df146756 309 * @retval None
mbed_official 76:aeb1df146756 310 */
mbed_official 76:aeb1df146756 311 void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct)
mbed_official 76:aeb1df146756 312 {
mbed_official 76:aeb1df146756 313 /*--------------- Reset I2S init structure parameters values -----------------*/
mbed_official 76:aeb1df146756 314 /* Initialize the I2S_Mode member */
mbed_official 76:aeb1df146756 315 I2S_InitStruct->I2S_Mode = I2S_Mode_SlaveTx;
mbed_official 76:aeb1df146756 316
mbed_official 76:aeb1df146756 317 /* Initialize the I2S_Standard member */
mbed_official 76:aeb1df146756 318 I2S_InitStruct->I2S_Standard = I2S_Standard_Phillips;
mbed_official 76:aeb1df146756 319
mbed_official 76:aeb1df146756 320 /* Initialize the I2S_DataFormat member */
mbed_official 76:aeb1df146756 321 I2S_InitStruct->I2S_DataFormat = I2S_DataFormat_16b;
mbed_official 76:aeb1df146756 322
mbed_official 76:aeb1df146756 323 /* Initialize the I2S_MCLKOutput member */
mbed_official 76:aeb1df146756 324 I2S_InitStruct->I2S_MCLKOutput = I2S_MCLKOutput_Disable;
mbed_official 76:aeb1df146756 325
mbed_official 76:aeb1df146756 326 /* Initialize the I2S_AudioFreq member */
mbed_official 76:aeb1df146756 327 I2S_InitStruct->I2S_AudioFreq = I2S_AudioFreq_Default;
mbed_official 76:aeb1df146756 328
mbed_official 76:aeb1df146756 329 /* Initialize the I2S_CPOL member */
mbed_official 76:aeb1df146756 330 I2S_InitStruct->I2S_CPOL = I2S_CPOL_Low;
mbed_official 76:aeb1df146756 331 }
mbed_official 76:aeb1df146756 332
mbed_official 76:aeb1df146756 333 /**
mbed_official 76:aeb1df146756 334 * @brief Initializes the SPIx peripheral according to the specified
mbed_official 76:aeb1df146756 335 * parameters in the I2S_InitStruct.
mbed_official 76:aeb1df146756 336 * @note This mode is not supported for STM32F030 devices.
mbed_official 76:aeb1df146756 337 * @param SPIx: where x can be 1 to select the SPI peripheral (configured in I2S mode).
mbed_official 76:aeb1df146756 338 * @param I2S_InitStruct: pointer to an I2S_InitTypeDef structure that
mbed_official 76:aeb1df146756 339 * contains the configuration information for the specified SPI peripheral
mbed_official 76:aeb1df146756 340 * configured in I2S mode.
mbed_official 76:aeb1df146756 341 * @note This function calculates the optimal prescaler needed to obtain the most
mbed_official 76:aeb1df146756 342 * accurate audio frequency (depending on the I2S clock source, the PLL values
mbed_official 76:aeb1df146756 343 * and the product configuration). But in case the prescaler value is greater
mbed_official 76:aeb1df146756 344 * than 511, the default value (0x02) will be configured instead.
mbed_official 76:aeb1df146756 345 * @retval None
mbed_official 76:aeb1df146756 346 */
mbed_official 76:aeb1df146756 347 void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct)
mbed_official 76:aeb1df146756 348 {
mbed_official 76:aeb1df146756 349 uint16_t tmpreg = 0, i2sdiv = 2, i2sodd = 0, packetlength = 1;
mbed_official 76:aeb1df146756 350 uint32_t tmp = 0;
mbed_official 76:aeb1df146756 351 RCC_ClocksTypeDef RCC_Clocks;
mbed_official 76:aeb1df146756 352 uint32_t sourceclock = 0;
mbed_official 76:aeb1df146756 353
mbed_official 76:aeb1df146756 354 /* Check the I2S parameters */
mbed_official 76:aeb1df146756 355 assert_param(IS_SPI_1_PERIPH(SPIx));
mbed_official 76:aeb1df146756 356 assert_param(IS_I2S_MODE(I2S_InitStruct->I2S_Mode));
mbed_official 76:aeb1df146756 357 assert_param(IS_I2S_STANDARD(I2S_InitStruct->I2S_Standard));
mbed_official 76:aeb1df146756 358 assert_param(IS_I2S_DATA_FORMAT(I2S_InitStruct->I2S_DataFormat));
mbed_official 76:aeb1df146756 359 assert_param(IS_I2S_MCLK_OUTPUT(I2S_InitStruct->I2S_MCLKOutput));
mbed_official 76:aeb1df146756 360 assert_param(IS_I2S_AUDIO_FREQ(I2S_InitStruct->I2S_AudioFreq));
mbed_official 76:aeb1df146756 361 assert_param(IS_I2S_CPOL(I2S_InitStruct->I2S_CPOL));
mbed_official 76:aeb1df146756 362
mbed_official 76:aeb1df146756 363 /*----------------------- SPIx I2SCFGR & I2SPR Configuration -----------------*/
mbed_official 76:aeb1df146756 364 /* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */
mbed_official 76:aeb1df146756 365 SPIx->I2SCFGR &= I2SCFGR_CLEAR_Mask;
mbed_official 76:aeb1df146756 366 SPIx->I2SPR = 0x0002;
mbed_official 76:aeb1df146756 367
mbed_official 76:aeb1df146756 368 /* Get the I2SCFGR register value */
mbed_official 76:aeb1df146756 369 tmpreg = SPIx->I2SCFGR;
mbed_official 76:aeb1df146756 370
mbed_official 76:aeb1df146756 371 /* If the default value has to be written, reinitialize i2sdiv and i2sodd*/
mbed_official 76:aeb1df146756 372 if(I2S_InitStruct->I2S_AudioFreq == I2S_AudioFreq_Default)
mbed_official 76:aeb1df146756 373 {
mbed_official 76:aeb1df146756 374 i2sodd = (uint16_t)0;
mbed_official 76:aeb1df146756 375 i2sdiv = (uint16_t)2;
mbed_official 76:aeb1df146756 376 }
mbed_official 76:aeb1df146756 377 /* If the requested audio frequency is not the default, compute the prescaler */
mbed_official 76:aeb1df146756 378 else
mbed_official 76:aeb1df146756 379 {
mbed_official 76:aeb1df146756 380 /* Check the frame length (For the Prescaler computing) */
mbed_official 76:aeb1df146756 381 if(I2S_InitStruct->I2S_DataFormat == I2S_DataFormat_16b)
mbed_official 76:aeb1df146756 382 {
mbed_official 76:aeb1df146756 383 /* Packet length is 16 bits */
mbed_official 76:aeb1df146756 384 packetlength = 1;
mbed_official 76:aeb1df146756 385 }
mbed_official 76:aeb1df146756 386 else
mbed_official 76:aeb1df146756 387 {
mbed_official 76:aeb1df146756 388 /* Packet length is 32 bits */
mbed_official 76:aeb1df146756 389 packetlength = 2;
mbed_official 76:aeb1df146756 390 }
mbed_official 76:aeb1df146756 391
mbed_official 76:aeb1df146756 392 /* I2S Clock source is System clock: Get System Clock frequency */
mbed_official 76:aeb1df146756 393 RCC_GetClocksFreq(&RCC_Clocks);
mbed_official 76:aeb1df146756 394
mbed_official 76:aeb1df146756 395 /* Get the source clock value: based on System Clock value */
mbed_official 76:aeb1df146756 396 sourceclock = RCC_Clocks.SYSCLK_Frequency;
mbed_official 76:aeb1df146756 397
mbed_official 76:aeb1df146756 398 /* Compute the Real divider depending on the MCLK output state with a floating point */
mbed_official 76:aeb1df146756 399 if(I2S_InitStruct->I2S_MCLKOutput == I2S_MCLKOutput_Enable)
mbed_official 76:aeb1df146756 400 {
mbed_official 76:aeb1df146756 401 /* MCLK output is enabled */
mbed_official 76:aeb1df146756 402 tmp = (uint16_t)(((((sourceclock / 256) * 10) / I2S_InitStruct->I2S_AudioFreq)) + 5);
mbed_official 76:aeb1df146756 403 }
mbed_official 76:aeb1df146756 404 else
mbed_official 76:aeb1df146756 405 {
mbed_official 76:aeb1df146756 406 /* MCLK output is disabled */
mbed_official 76:aeb1df146756 407 tmp = (uint16_t)(((((sourceclock / (32 * packetlength)) *10 ) / I2S_InitStruct->I2S_AudioFreq)) + 5);
mbed_official 76:aeb1df146756 408 }
mbed_official 76:aeb1df146756 409
mbed_official 76:aeb1df146756 410 /* Remove the floating point */
mbed_official 76:aeb1df146756 411 tmp = tmp / 10;
mbed_official 76:aeb1df146756 412
mbed_official 76:aeb1df146756 413 /* Check the parity of the divider */
mbed_official 76:aeb1df146756 414 i2sodd = (uint16_t)(tmp & (uint16_t)0x0001);
mbed_official 76:aeb1df146756 415
mbed_official 76:aeb1df146756 416 /* Compute the i2sdiv prescaler */
mbed_official 76:aeb1df146756 417 i2sdiv = (uint16_t)((tmp - i2sodd) / 2);
mbed_official 76:aeb1df146756 418
mbed_official 76:aeb1df146756 419 /* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */
mbed_official 76:aeb1df146756 420 i2sodd = (uint16_t) (i2sodd << 8);
mbed_official 76:aeb1df146756 421 }
mbed_official 76:aeb1df146756 422
mbed_official 76:aeb1df146756 423 /* Test if the divider is 1 or 0 or greater than 0xFF */
mbed_official 76:aeb1df146756 424 if ((i2sdiv < 2) || (i2sdiv > 0xFF))
mbed_official 76:aeb1df146756 425 {
mbed_official 76:aeb1df146756 426 /* Set the default values */
mbed_official 76:aeb1df146756 427 i2sdiv = 2;
mbed_official 76:aeb1df146756 428 i2sodd = 0;
mbed_official 76:aeb1df146756 429 }
mbed_official 76:aeb1df146756 430
mbed_official 76:aeb1df146756 431 /* Write to SPIx I2SPR register the computed value */
mbed_official 76:aeb1df146756 432 SPIx->I2SPR = (uint16_t)(i2sdiv | (uint16_t)(i2sodd | (uint16_t)I2S_InitStruct->I2S_MCLKOutput));
mbed_official 76:aeb1df146756 433
mbed_official 76:aeb1df146756 434 /* Configure the I2S with the SPI_InitStruct values */
mbed_official 76:aeb1df146756 435 tmpreg |= (uint16_t)(SPI_I2SCFGR_I2SMOD | (uint16_t)(I2S_InitStruct->I2S_Mode | \
mbed_official 76:aeb1df146756 436 (uint16_t)(I2S_InitStruct->I2S_Standard | (uint16_t)(I2S_InitStruct->I2S_DataFormat | \
mbed_official 76:aeb1df146756 437 (uint16_t)I2S_InitStruct->I2S_CPOL))));
mbed_official 76:aeb1df146756 438
mbed_official 76:aeb1df146756 439 /* Write to SPIx I2SCFGR */
mbed_official 76:aeb1df146756 440 SPIx->I2SCFGR = tmpreg;
mbed_official 76:aeb1df146756 441 }
mbed_official 76:aeb1df146756 442
mbed_official 76:aeb1df146756 443 /**
mbed_official 76:aeb1df146756 444 * @brief Enables or disables the specified SPI peripheral.
mbed_official 76:aeb1df146756 445 * @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
mbed_official 76:aeb1df146756 446 * @note SPI2 is not available for STM32F031 devices.
mbed_official 76:aeb1df146756 447 * @param NewState: new state of the SPIx peripheral.
mbed_official 76:aeb1df146756 448 * This parameter can be: ENABLE or DISABLE.
mbed_official 76:aeb1df146756 449 * @retval None
mbed_official 76:aeb1df146756 450 */
mbed_official 76:aeb1df146756 451 void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState)
mbed_official 76:aeb1df146756 452 {
mbed_official 76:aeb1df146756 453 /* Check the parameters */
mbed_official 76:aeb1df146756 454 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 76:aeb1df146756 455 assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official 76:aeb1df146756 456
mbed_official 76:aeb1df146756 457 if (NewState != DISABLE)
mbed_official 76:aeb1df146756 458 {
mbed_official 76:aeb1df146756 459 /* Enable the selected SPI peripheral */
mbed_official 76:aeb1df146756 460 SPIx->CR1 |= SPI_CR1_SPE;
mbed_official 76:aeb1df146756 461 }
mbed_official 76:aeb1df146756 462 else
mbed_official 76:aeb1df146756 463 {
mbed_official 76:aeb1df146756 464 /* Disable the selected SPI peripheral */
mbed_official 76:aeb1df146756 465 SPIx->CR1 &= (uint16_t)~((uint16_t)SPI_CR1_SPE);
mbed_official 76:aeb1df146756 466 }
mbed_official 76:aeb1df146756 467 }
mbed_official 76:aeb1df146756 468
mbed_official 76:aeb1df146756 469 /**
mbed_official 76:aeb1df146756 470 * @brief Enables or disables the TI Mode.
mbed_official 76:aeb1df146756 471 *
mbed_official 76:aeb1df146756 472 * @note This function can be called only after the SPI_Init() function has
mbed_official 76:aeb1df146756 473 * been called.
mbed_official 76:aeb1df146756 474 * @note When TI mode is selected, the control bits SSM, SSI, CPOL and CPHA
mbed_official 76:aeb1df146756 475 * are not taken into consideration and are configured by hardware
mbed_official 76:aeb1df146756 476 * respectively to the TI mode requirements.
mbed_official 76:aeb1df146756 477 *
mbed_official 76:aeb1df146756 478 * @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
mbed_official 76:aeb1df146756 479 * @note SPI2 is not available for STM32F031 devices.
mbed_official 76:aeb1df146756 480 * @param NewState: new state of the selected SPI TI communication mode.
mbed_official 76:aeb1df146756 481 * This parameter can be: ENABLE or DISABLE.
mbed_official 76:aeb1df146756 482 * @retval None
mbed_official 76:aeb1df146756 483 */
mbed_official 76:aeb1df146756 484 void SPI_TIModeCmd(SPI_TypeDef* SPIx, FunctionalState NewState)
mbed_official 76:aeb1df146756 485 {
mbed_official 76:aeb1df146756 486 /* Check the parameters */
mbed_official 76:aeb1df146756 487 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 76:aeb1df146756 488 assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official 76:aeb1df146756 489
mbed_official 76:aeb1df146756 490 if (NewState != DISABLE)
mbed_official 76:aeb1df146756 491 {
mbed_official 76:aeb1df146756 492 /* Enable the TI mode for the selected SPI peripheral */
mbed_official 76:aeb1df146756 493 SPIx->CR2 |= SPI_CR2_FRF;
mbed_official 76:aeb1df146756 494 }
mbed_official 76:aeb1df146756 495 else
mbed_official 76:aeb1df146756 496 {
mbed_official 76:aeb1df146756 497 /* Disable the TI mode for the selected SPI peripheral */
mbed_official 76:aeb1df146756 498 SPIx->CR2 &= (uint16_t)~((uint16_t)SPI_CR2_FRF);
mbed_official 76:aeb1df146756 499 }
mbed_official 76:aeb1df146756 500 }
mbed_official 76:aeb1df146756 501
mbed_official 76:aeb1df146756 502 /**
mbed_official 76:aeb1df146756 503 * @brief Enables or disables the specified SPI peripheral (in I2S mode).
mbed_official 76:aeb1df146756 504 * @note This mode is not supported for STM32F030 devices.
mbed_official 76:aeb1df146756 505 * @param SPIx: where x can be 1 to select the SPI peripheral.
mbed_official 76:aeb1df146756 506 * @param NewState: new state of the SPIx peripheral.
mbed_official 76:aeb1df146756 507 * This parameter can be: ENABLE or DISABLE.
mbed_official 76:aeb1df146756 508 * @retval None
mbed_official 76:aeb1df146756 509 */
mbed_official 76:aeb1df146756 510 void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState)
mbed_official 76:aeb1df146756 511 {
mbed_official 76:aeb1df146756 512 /* Check the parameters */
mbed_official 76:aeb1df146756 513 assert_param(IS_SPI_1_PERIPH(SPIx));
mbed_official 76:aeb1df146756 514 assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official 76:aeb1df146756 515 if (NewState != DISABLE)
mbed_official 76:aeb1df146756 516 {
mbed_official 76:aeb1df146756 517 /* Enable the selected SPI peripheral in I2S mode */
mbed_official 76:aeb1df146756 518 SPIx->I2SCFGR |= SPI_I2SCFGR_I2SE;
mbed_official 76:aeb1df146756 519 }
mbed_official 76:aeb1df146756 520 else
mbed_official 76:aeb1df146756 521 {
mbed_official 76:aeb1df146756 522 /* Disable the selected SPI peripheral in I2S mode */
mbed_official 76:aeb1df146756 523 SPIx->I2SCFGR &= (uint16_t)~((uint16_t)SPI_I2SCFGR_I2SE);
mbed_official 76:aeb1df146756 524 }
mbed_official 76:aeb1df146756 525 }
mbed_official 76:aeb1df146756 526
mbed_official 76:aeb1df146756 527 /**
mbed_official 76:aeb1df146756 528 * @brief Configures the data size for the selected SPI.
mbed_official 76:aeb1df146756 529 * @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
mbed_official 76:aeb1df146756 530 * @note SPI2 is not available for STM32F031 devices.
mbed_official 76:aeb1df146756 531 * @param SPI_DataSize: specifies the SPI data size.
mbed_official 76:aeb1df146756 532 * For the SPIx peripheral this parameter can be one of the following values:
mbed_official 76:aeb1df146756 533 * @arg SPI_DataSize_4b: Set data size to 4 bits
mbed_official 76:aeb1df146756 534 * @arg SPI_DataSize_5b: Set data size to 5 bits
mbed_official 76:aeb1df146756 535 * @arg SPI_DataSize_6b: Set data size to 6 bits
mbed_official 76:aeb1df146756 536 * @arg SPI_DataSize_7b: Set data size to 7 bits
mbed_official 76:aeb1df146756 537 * @arg SPI_DataSize_8b: Set data size to 8 bits
mbed_official 76:aeb1df146756 538 * @arg SPI_DataSize_9b: Set data size to 9 bits
mbed_official 76:aeb1df146756 539 * @arg SPI_DataSize_10b: Set data size to 10 bits
mbed_official 76:aeb1df146756 540 * @arg SPI_DataSize_11b: Set data size to 11 bits
mbed_official 76:aeb1df146756 541 * @arg SPI_DataSize_12b: Set data size to 12 bits
mbed_official 76:aeb1df146756 542 * @arg SPI_DataSize_13b: Set data size to 13 bits
mbed_official 76:aeb1df146756 543 * @arg SPI_DataSize_14b: Set data size to 14 bits
mbed_official 76:aeb1df146756 544 * @arg SPI_DataSize_15b: Set data size to 15 bits
mbed_official 76:aeb1df146756 545 * @arg SPI_DataSize_16b: Set data size to 16 bits
mbed_official 76:aeb1df146756 546 * @retval None
mbed_official 76:aeb1df146756 547 */
mbed_official 76:aeb1df146756 548 void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize)
mbed_official 76:aeb1df146756 549 {
mbed_official 76:aeb1df146756 550 uint16_t tmpreg = 0;
mbed_official 76:aeb1df146756 551
mbed_official 76:aeb1df146756 552 /* Check the parameters */
mbed_official 76:aeb1df146756 553 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 76:aeb1df146756 554 assert_param(IS_SPI_DATA_SIZE(SPI_DataSize));
mbed_official 76:aeb1df146756 555 /* Read the CR2 register */
mbed_official 76:aeb1df146756 556 tmpreg = SPIx->CR2;
mbed_official 76:aeb1df146756 557 /* Clear DS[3:0] bits */
mbed_official 76:aeb1df146756 558 tmpreg &= (uint16_t)~SPI_CR2_DS;
mbed_official 76:aeb1df146756 559 /* Set new DS[3:0] bits value */
mbed_official 76:aeb1df146756 560 tmpreg |= SPI_DataSize;
mbed_official 76:aeb1df146756 561 SPIx->CR2 = tmpreg;
mbed_official 76:aeb1df146756 562 }
mbed_official 76:aeb1df146756 563
mbed_official 76:aeb1df146756 564 /**
mbed_official 76:aeb1df146756 565 * @brief Configures the FIFO reception threshold for the selected SPI.
mbed_official 76:aeb1df146756 566 * @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
mbed_official 76:aeb1df146756 567 * @note SPI2 is not available for STM32F031 devices.
mbed_official 76:aeb1df146756 568 * @param SPI_RxFIFOThreshold: specifies the FIFO reception threshold.
mbed_official 76:aeb1df146756 569 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 570 * @arg SPI_RxFIFOThreshold_HF: RXNE event is generated if the FIFO
mbed_official 76:aeb1df146756 571 * level is greater or equal to 1/2.
mbed_official 76:aeb1df146756 572 * @arg SPI_RxFIFOThreshold_QF: RXNE event is generated if the FIFO
mbed_official 76:aeb1df146756 573 * level is greater or equal to 1/4.
mbed_official 76:aeb1df146756 574 * @retval None
mbed_official 76:aeb1df146756 575 */
mbed_official 76:aeb1df146756 576 void SPI_RxFIFOThresholdConfig(SPI_TypeDef* SPIx, uint16_t SPI_RxFIFOThreshold)
mbed_official 76:aeb1df146756 577 {
mbed_official 76:aeb1df146756 578 /* Check the parameters */
mbed_official 76:aeb1df146756 579 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 76:aeb1df146756 580 assert_param(IS_SPI_RX_FIFO_THRESHOLD(SPI_RxFIFOThreshold));
mbed_official 76:aeb1df146756 581
mbed_official 76:aeb1df146756 582 /* Clear FRXTH bit */
mbed_official 76:aeb1df146756 583 SPIx->CR2 &= (uint16_t)~((uint16_t)SPI_CR2_FRXTH);
mbed_official 76:aeb1df146756 584
mbed_official 76:aeb1df146756 585 /* Set new FRXTH bit value */
mbed_official 76:aeb1df146756 586 SPIx->CR2 |= SPI_RxFIFOThreshold;
mbed_official 76:aeb1df146756 587 }
mbed_official 76:aeb1df146756 588
mbed_official 76:aeb1df146756 589 /**
mbed_official 76:aeb1df146756 590 * @brief Selects the data transfer direction in bidirectional mode for the specified SPI.
mbed_official 76:aeb1df146756 591 * @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
mbed_official 76:aeb1df146756 592 * @note SPI2 is not available for STM32F031 devices.
mbed_official 76:aeb1df146756 593 * @param SPI_Direction: specifies the data transfer direction in bidirectional mode.
mbed_official 76:aeb1df146756 594 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 595 * @arg SPI_Direction_Tx: Selects Tx transmission direction
mbed_official 76:aeb1df146756 596 * @arg SPI_Direction_Rx: Selects Rx receive direction
mbed_official 76:aeb1df146756 597 * @retval None
mbed_official 76:aeb1df146756 598 */
mbed_official 76:aeb1df146756 599 void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction)
mbed_official 76:aeb1df146756 600 {
mbed_official 76:aeb1df146756 601 /* Check the parameters */
mbed_official 76:aeb1df146756 602 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 76:aeb1df146756 603 assert_param(IS_SPI_DIRECTION(SPI_Direction));
mbed_official 76:aeb1df146756 604 if (SPI_Direction == SPI_Direction_Tx)
mbed_official 76:aeb1df146756 605 {
mbed_official 76:aeb1df146756 606 /* Set the Tx only mode */
mbed_official 76:aeb1df146756 607 SPIx->CR1 |= SPI_Direction_Tx;
mbed_official 76:aeb1df146756 608 }
mbed_official 76:aeb1df146756 609 else
mbed_official 76:aeb1df146756 610 {
mbed_official 76:aeb1df146756 611 /* Set the Rx only mode */
mbed_official 76:aeb1df146756 612 SPIx->CR1 &= SPI_Direction_Rx;
mbed_official 76:aeb1df146756 613 }
mbed_official 76:aeb1df146756 614 }
mbed_official 76:aeb1df146756 615
mbed_official 76:aeb1df146756 616 /**
mbed_official 76:aeb1df146756 617 * @brief Configures internally by software the NSS pin for the selected SPI.
mbed_official 76:aeb1df146756 618 * @note This function can be called only after the SPI_Init() function has
mbed_official 76:aeb1df146756 619 * been called.
mbed_official 76:aeb1df146756 620 * @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
mbed_official 76:aeb1df146756 621 * @note SPI2 is not available for STM32F031 devices.
mbed_official 76:aeb1df146756 622 * @param SPI_NSSInternalSoft: specifies the SPI NSS internal state.
mbed_official 76:aeb1df146756 623 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 624 * @arg SPI_NSSInternalSoft_Set: Set NSS pin internally
mbed_official 76:aeb1df146756 625 * @arg SPI_NSSInternalSoft_Reset: Reset NSS pin internally
mbed_official 76:aeb1df146756 626 * @retval None
mbed_official 76:aeb1df146756 627 */
mbed_official 76:aeb1df146756 628 void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft)
mbed_official 76:aeb1df146756 629 {
mbed_official 76:aeb1df146756 630 /* Check the parameters */
mbed_official 76:aeb1df146756 631 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 76:aeb1df146756 632 assert_param(IS_SPI_NSS_INTERNAL(SPI_NSSInternalSoft));
mbed_official 76:aeb1df146756 633
mbed_official 76:aeb1df146756 634 if (SPI_NSSInternalSoft != SPI_NSSInternalSoft_Reset)
mbed_official 76:aeb1df146756 635 {
mbed_official 76:aeb1df146756 636 /* Set NSS pin internally by software */
mbed_official 76:aeb1df146756 637 SPIx->CR1 |= SPI_NSSInternalSoft_Set;
mbed_official 76:aeb1df146756 638 }
mbed_official 76:aeb1df146756 639 else
mbed_official 76:aeb1df146756 640 {
mbed_official 76:aeb1df146756 641 /* Reset NSS pin internally by software */
mbed_official 76:aeb1df146756 642 SPIx->CR1 &= SPI_NSSInternalSoft_Reset;
mbed_official 76:aeb1df146756 643 }
mbed_official 76:aeb1df146756 644 }
mbed_official 76:aeb1df146756 645
mbed_official 76:aeb1df146756 646 /**
mbed_official 76:aeb1df146756 647 * @brief Enables or disables the SS output for the selected SPI.
mbed_official 76:aeb1df146756 648 * @note This function can be called only after the SPI_Init() function has
mbed_official 76:aeb1df146756 649 * been called and the NSS hardware management mode is selected.
mbed_official 76:aeb1df146756 650 * @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
mbed_official 76:aeb1df146756 651 * @note SPI2 is not available for STM32F031 devices.
mbed_official 76:aeb1df146756 652 * @param NewState: new state of the SPIx SS output.
mbed_official 76:aeb1df146756 653 * This parameter can be: ENABLE or DISABLE.
mbed_official 76:aeb1df146756 654 * @retval None
mbed_official 76:aeb1df146756 655 */
mbed_official 76:aeb1df146756 656 void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState)
mbed_official 76:aeb1df146756 657 {
mbed_official 76:aeb1df146756 658 /* Check the parameters */
mbed_official 76:aeb1df146756 659 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 76:aeb1df146756 660 assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official 76:aeb1df146756 661 if (NewState != DISABLE)
mbed_official 76:aeb1df146756 662 {
mbed_official 76:aeb1df146756 663 /* Enable the selected SPI SS output */
mbed_official 76:aeb1df146756 664 SPIx->CR2 |= SPI_CR2_SSOE;
mbed_official 76:aeb1df146756 665 }
mbed_official 76:aeb1df146756 666 else
mbed_official 76:aeb1df146756 667 {
mbed_official 76:aeb1df146756 668 /* Disable the selected SPI SS output */
mbed_official 76:aeb1df146756 669 SPIx->CR2 &= (uint16_t)~((uint16_t)SPI_CR2_SSOE);
mbed_official 76:aeb1df146756 670 }
mbed_official 76:aeb1df146756 671 }
mbed_official 76:aeb1df146756 672
mbed_official 76:aeb1df146756 673 /**
mbed_official 76:aeb1df146756 674 * @brief Enables or disables the NSS pulse management mode.
mbed_official 76:aeb1df146756 675 * @note This function can be called only after the SPI_Init() function has
mbed_official 76:aeb1df146756 676 * been called.
mbed_official 76:aeb1df146756 677 * @note When TI mode is selected, the control bits NSSP is not taken into
mbed_official 76:aeb1df146756 678 * consideration and are configured by hardware respectively to the
mbed_official 76:aeb1df146756 679 * TI mode requirements.
mbed_official 76:aeb1df146756 680 * @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
mbed_official 76:aeb1df146756 681 * @note SPI2 is not available for STM32F031 devices.
mbed_official 76:aeb1df146756 682 * @param NewState: new state of the NSS pulse management mode.
mbed_official 76:aeb1df146756 683 * This parameter can be: ENABLE or DISABLE.
mbed_official 76:aeb1df146756 684 * @retval None
mbed_official 76:aeb1df146756 685 */
mbed_official 76:aeb1df146756 686 void SPI_NSSPulseModeCmd(SPI_TypeDef* SPIx, FunctionalState NewState)
mbed_official 76:aeb1df146756 687 {
mbed_official 76:aeb1df146756 688 /* Check the parameters */
mbed_official 76:aeb1df146756 689 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 76:aeb1df146756 690 assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official 76:aeb1df146756 691
mbed_official 76:aeb1df146756 692 if (NewState != DISABLE)
mbed_official 76:aeb1df146756 693 {
mbed_official 76:aeb1df146756 694 /* Enable the NSS pulse management mode */
mbed_official 76:aeb1df146756 695 SPIx->CR2 |= SPI_CR2_NSSP;
mbed_official 76:aeb1df146756 696 }
mbed_official 76:aeb1df146756 697 else
mbed_official 76:aeb1df146756 698 {
mbed_official 76:aeb1df146756 699 /* Disable the NSS pulse management mode */
mbed_official 76:aeb1df146756 700 SPIx->CR2 &= (uint16_t)~((uint16_t)SPI_CR2_NSSP);
mbed_official 76:aeb1df146756 701 }
mbed_official 76:aeb1df146756 702 }
mbed_official 76:aeb1df146756 703
mbed_official 76:aeb1df146756 704 /**
mbed_official 76:aeb1df146756 705 * @}
mbed_official 76:aeb1df146756 706 */
mbed_official 76:aeb1df146756 707
mbed_official 76:aeb1df146756 708 /** @defgroup SPI_Group2 Data transfers functions
mbed_official 76:aeb1df146756 709 * @brief Data transfers functions
mbed_official 76:aeb1df146756 710 *
mbed_official 76:aeb1df146756 711 @verbatim
mbed_official 76:aeb1df146756 712 ===============================================================================
mbed_official 76:aeb1df146756 713 ##### Data transfers functions #####
mbed_official 76:aeb1df146756 714 ===============================================================================
mbed_official 76:aeb1df146756 715 [..] This section provides a set of functions allowing to manage the SPI or I2S
mbed_official 76:aeb1df146756 716 data transfers.
mbed_official 76:aeb1df146756 717
mbed_official 76:aeb1df146756 718 [..] In reception, data are received and then stored into an internal Rx buffer while
mbed_official 76:aeb1df146756 719 In transmission, data are first stored into an internal Tx buffer before being
mbed_official 76:aeb1df146756 720 transmitted.
mbed_official 76:aeb1df146756 721
mbed_official 76:aeb1df146756 722 [..] The read access of the SPI_DR register can be done using
mbed_official 76:aeb1df146756 723 SPI_ReceiveData8() (when data size is equal or inferior than 8bits) and.
mbed_official 76:aeb1df146756 724 SPI_I2S_ReceiveData16() (when data size is superior than 8bits)function
mbed_official 76:aeb1df146756 725 and returns the Rx buffered value. Whereas a write access to the SPI_DR
mbed_official 76:aeb1df146756 726 can be done using SPI_SendData8() (when data size is equal or inferior than 8bits)
mbed_official 76:aeb1df146756 727 and SPI_I2S_SendData16() (when data size is superior than 8bits) function
mbed_official 76:aeb1df146756 728 and stores the written data into Tx buffer.
mbed_official 76:aeb1df146756 729
mbed_official 76:aeb1df146756 730 @endverbatim
mbed_official 76:aeb1df146756 731 * @{
mbed_official 76:aeb1df146756 732 */
mbed_official 76:aeb1df146756 733
mbed_official 76:aeb1df146756 734 /**
mbed_official 76:aeb1df146756 735 * @brief Transmits a Data through the SPIx/I2Sx peripheral.
mbed_official 76:aeb1df146756 736 * @param SPIx: where x can be 1 or 2 in SPI mode to select the SPI peripheral.
mbed_official 76:aeb1df146756 737 * @note SPI2 is not available for STM32F031 devices.
mbed_official 76:aeb1df146756 738 * @param Data: Data to be transmitted.
mbed_official 76:aeb1df146756 739 * @retval None
mbed_official 76:aeb1df146756 740 */
mbed_official 76:aeb1df146756 741 void SPI_SendData8(SPI_TypeDef* SPIx, uint8_t Data)
mbed_official 76:aeb1df146756 742 {
mbed_official 76:aeb1df146756 743 uint32_t spixbase = 0x00;
mbed_official 76:aeb1df146756 744
mbed_official 76:aeb1df146756 745 /* Check the parameters */
mbed_official 76:aeb1df146756 746 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 76:aeb1df146756 747
mbed_official 76:aeb1df146756 748 spixbase = (uint32_t)SPIx;
mbed_official 76:aeb1df146756 749 spixbase += 0x0C;
mbed_official 76:aeb1df146756 750
mbed_official 76:aeb1df146756 751 *(__IO uint8_t *) spixbase = Data;
mbed_official 76:aeb1df146756 752 }
mbed_official 76:aeb1df146756 753
mbed_official 76:aeb1df146756 754 /**
mbed_official 76:aeb1df146756 755 * @brief Transmits a Data through the SPIx/I2Sx peripheral.
mbed_official 76:aeb1df146756 756 * @param SPIx: where x can be 1 or 2 in SPI mode or 1 in I2S mode to select
mbed_official 76:aeb1df146756 757 * the SPI peripheral.
mbed_official 76:aeb1df146756 758 * @note SPI2 is not available for STM32F031 devices.
mbed_official 76:aeb1df146756 759 * @param Data: Data to be transmitted.
mbed_official 76:aeb1df146756 760 * @retval None
mbed_official 76:aeb1df146756 761 */
mbed_official 76:aeb1df146756 762 void SPI_I2S_SendData16(SPI_TypeDef* SPIx, uint16_t Data)
mbed_official 76:aeb1df146756 763 {
mbed_official 76:aeb1df146756 764 /* Check the parameters */
mbed_official 76:aeb1df146756 765 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 76:aeb1df146756 766
mbed_official 76:aeb1df146756 767 SPIx->DR = (uint16_t)Data;
mbed_official 76:aeb1df146756 768 }
mbed_official 76:aeb1df146756 769
mbed_official 76:aeb1df146756 770 /**
mbed_official 76:aeb1df146756 771 * @brief Returns the most recent received data by the SPIx/I2Sx peripheral.
mbed_official 76:aeb1df146756 772 * @param SPIx: where x can be 1 or 2 in SPI mode to select the SPI peripheral.
mbed_official 76:aeb1df146756 773 * @note SPI2 is not available for STM32F031 devices.
mbed_official 76:aeb1df146756 774 * @retval The value of the received data.
mbed_official 76:aeb1df146756 775 */
mbed_official 76:aeb1df146756 776 uint8_t SPI_ReceiveData8(SPI_TypeDef* SPIx)
mbed_official 76:aeb1df146756 777 {
mbed_official 76:aeb1df146756 778 uint32_t spixbase = 0x00;
mbed_official 76:aeb1df146756 779
mbed_official 76:aeb1df146756 780 spixbase = (uint32_t)SPIx;
mbed_official 76:aeb1df146756 781 spixbase += 0x0C;
mbed_official 76:aeb1df146756 782
mbed_official 76:aeb1df146756 783 return *(__IO uint8_t *) spixbase;
mbed_official 76:aeb1df146756 784 }
mbed_official 76:aeb1df146756 785
mbed_official 76:aeb1df146756 786 /**
mbed_official 76:aeb1df146756 787 * @brief Returns the most recent received data by the SPIx peripheral.
mbed_official 76:aeb1df146756 788 * @param SPIx: where x can be 1 or 2 in SPI mode or 1 in I2S mode to select
mbed_official 76:aeb1df146756 789 * @note SPI2 is not available for STM32F031 devices.
mbed_official 76:aeb1df146756 790 * the SPI peripheral.
mbed_official 76:aeb1df146756 791 * @retval The value of the received data.
mbed_official 76:aeb1df146756 792 */
mbed_official 76:aeb1df146756 793 uint16_t SPI_I2S_ReceiveData16(SPI_TypeDef* SPIx)
mbed_official 76:aeb1df146756 794 {
mbed_official 76:aeb1df146756 795 return SPIx->DR;
mbed_official 76:aeb1df146756 796 }
mbed_official 76:aeb1df146756 797 /**
mbed_official 76:aeb1df146756 798 * @}
mbed_official 76:aeb1df146756 799 */
mbed_official 76:aeb1df146756 800
mbed_official 76:aeb1df146756 801 /** @defgroup SPI_Group3 Hardware CRC Calculation functions
mbed_official 76:aeb1df146756 802 * @brief Hardware CRC Calculation functions
mbed_official 76:aeb1df146756 803 *
mbed_official 76:aeb1df146756 804 @verbatim
mbed_official 76:aeb1df146756 805 ===============================================================================
mbed_official 76:aeb1df146756 806 ##### Hardware CRC Calculation functions #####
mbed_official 76:aeb1df146756 807 ===============================================================================
mbed_official 76:aeb1df146756 808 [..] This section provides a set of functions allowing to manage the SPI CRC hardware
mbed_official 76:aeb1df146756 809 calculation.SPI communication using CRC is possible through the following procedure:
mbed_official 76:aeb1df146756 810
mbed_official 76:aeb1df146756 811 (#) Program the Data direction, Polarity, Phase, First Data, Baud Rate Prescaler,
mbed_official 76:aeb1df146756 812 Slave Management, Peripheral Mode and CRC Polynomial values using the SPI_Init()
mbed_official 76:aeb1df146756 813 function.
mbed_official 76:aeb1df146756 814 (#) Enable the CRC calculation using the SPI_CalculateCRC() function.
mbed_official 76:aeb1df146756 815 (#) Enable the SPI using the SPI_Cmd() function
mbed_official 76:aeb1df146756 816 (#) Before writing the last data to the TX buffer, set the CRCNext bit using the
mbed_official 76:aeb1df146756 817 SPI_TransmitCRC() function to indicate that after transmission of the last
mbed_official 76:aeb1df146756 818 data, the CRC should be transmitted.
mbed_official 76:aeb1df146756 819 (#) After transmitting the last data, the SPI transmits the CRC. The SPI_CR1_CRCNEXT
mbed_official 76:aeb1df146756 820 bit is reset. The CRC is also received and compared against the SPI_RXCRCR
mbed_official 76:aeb1df146756 821 value.
mbed_official 76:aeb1df146756 822 If the value does not match, the SPI_FLAG_CRCERR flag is set and an interrupt
mbed_official 76:aeb1df146756 823 can be generated when the SPI_I2S_IT_ERR interrupt is enabled.
mbed_official 76:aeb1df146756 824
mbed_official 76:aeb1df146756 825 -@-
mbed_official 76:aeb1df146756 826 (+@) It is advised to don't read the calculate CRC values during the communication.
mbed_official 76:aeb1df146756 827 (+@) When the SPI is in slave mode, be careful to enable CRC calculation only
mbed_official 76:aeb1df146756 828 when the clock is stable, that is, when the clock is in the steady state.
mbed_official 76:aeb1df146756 829 If not, a wrong CRC calculation may be done. In fact, the CRC is sensitive
mbed_official 76:aeb1df146756 830 to the SCK slave input clock as soon as CRCEN is set, and this, whatever
mbed_official 76:aeb1df146756 831 the value of the SPE bit.
mbed_official 76:aeb1df146756 832 (+@) With high bitrate frequencies, be careful when transmitting the CRC.
mbed_official 76:aeb1df146756 833 As the number of used CPU cycles has to be as low as possible in the CRC
mbed_official 76:aeb1df146756 834 transfer phase, it is forbidden to call software functions in the CRC
mbed_official 76:aeb1df146756 835 transmission sequence to avoid errors in the last data and CRC reception.
mbed_official 76:aeb1df146756 836 In fact, CRCNEXT bit has to be written before the end of the transmission/reception
mbed_official 76:aeb1df146756 837 of the last data.
mbed_official 76:aeb1df146756 838 (+@) For high bit rate frequencies, it is advised to use the DMA mode to avoid the
mbed_official 76:aeb1df146756 839 degradation of the SPI speed performance due to CPU accesses impacting the
mbed_official 76:aeb1df146756 840 SPI bandwidth.
mbed_official 76:aeb1df146756 841 (+@) When the STM32F0xx are configured as slaves and the NSS hardware mode is
mbed_official 76:aeb1df146756 842 used, the NSS pin needs to be kept low between the data phase and the CRC
mbed_official 76:aeb1df146756 843 phase.
mbed_official 76:aeb1df146756 844 (+@) When the SPI is configured in slave mode with the CRC feature enabled, CRC
mbed_official 76:aeb1df146756 845 calculation takes place even if a high level is applied on the NSS pin.
mbed_official 76:aeb1df146756 846 This may happen for example in case of a multislave environment where the
mbed_official 76:aeb1df146756 847 communication master addresses slaves alternately.
mbed_official 76:aeb1df146756 848 (+@) Between a slave deselection (high level on NSS) and a new slave selection
mbed_official 76:aeb1df146756 849 (low level on NSS), the CRC value should be cleared on both master and slave
mbed_official 76:aeb1df146756 850 sides in order to resynchronize the master and slave for their respective
mbed_official 76:aeb1df146756 851 CRC calculation.
mbed_official 76:aeb1df146756 852
mbed_official 76:aeb1df146756 853 -@- To clear the CRC, follow the procedure below:
mbed_official 76:aeb1df146756 854 (#@) Disable SPI using the SPI_Cmd() function
mbed_official 76:aeb1df146756 855 (#@) Disable the CRC calculation using the SPI_CalculateCRC() function.
mbed_official 76:aeb1df146756 856 (#@) Enable the CRC calculation using the SPI_CalculateCRC() function.
mbed_official 76:aeb1df146756 857 (#@) Enable SPI using the SPI_Cmd() function.
mbed_official 76:aeb1df146756 858
mbed_official 76:aeb1df146756 859 @endverbatim
mbed_official 76:aeb1df146756 860 * @{
mbed_official 76:aeb1df146756 861 */
mbed_official 76:aeb1df146756 862
mbed_official 76:aeb1df146756 863 /**
mbed_official 76:aeb1df146756 864 * @brief Configures the CRC calculation length for the selected SPI.
mbed_official 76:aeb1df146756 865 * @note This function can be called only after the SPI_Init() function has
mbed_official 76:aeb1df146756 866 * been called.
mbed_official 76:aeb1df146756 867 * @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
mbed_official 76:aeb1df146756 868 * @note SPI2 is not available for STM32F031 devices.
mbed_official 76:aeb1df146756 869 * @param SPI_CRCLength: specifies the SPI CRC calculation length.
mbed_official 76:aeb1df146756 870 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 871 * @arg SPI_CRCLength_8b: Set CRC Calculation to 8 bits
mbed_official 76:aeb1df146756 872 * @arg SPI_CRCLength_16b: Set CRC Calculation to 16 bits
mbed_official 76:aeb1df146756 873 * @retval None
mbed_official 76:aeb1df146756 874 */
mbed_official 76:aeb1df146756 875 void SPI_CRCLengthConfig(SPI_TypeDef* SPIx, uint16_t SPI_CRCLength)
mbed_official 76:aeb1df146756 876 {
mbed_official 76:aeb1df146756 877 /* Check the parameters */
mbed_official 76:aeb1df146756 878 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 76:aeb1df146756 879 assert_param(IS_SPI_CRC_LENGTH(SPI_CRCLength));
mbed_official 76:aeb1df146756 880
mbed_official 76:aeb1df146756 881 /* Clear CRCL bit */
mbed_official 76:aeb1df146756 882 SPIx->CR1 &= (uint16_t)~((uint16_t)SPI_CR1_CRCL);
mbed_official 76:aeb1df146756 883
mbed_official 76:aeb1df146756 884 /* Set new CRCL bit value */
mbed_official 76:aeb1df146756 885 SPIx->CR1 |= SPI_CRCLength;
mbed_official 76:aeb1df146756 886 }
mbed_official 76:aeb1df146756 887
mbed_official 76:aeb1df146756 888 /**
mbed_official 76:aeb1df146756 889 * @brief Enables or disables the CRC value calculation of the transferred bytes.
mbed_official 76:aeb1df146756 890 * @note This function can be called only after the SPI_Init() function has
mbed_official 76:aeb1df146756 891 * been called.
mbed_official 76:aeb1df146756 892 * @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
mbed_official 76:aeb1df146756 893 * @note SPI2 is not available for STM32F031 devices.
mbed_official 76:aeb1df146756 894 * @param NewState: new state of the SPIx CRC value calculation.
mbed_official 76:aeb1df146756 895 * This parameter can be: ENABLE or DISABLE.
mbed_official 76:aeb1df146756 896 * @retval None
mbed_official 76:aeb1df146756 897 */
mbed_official 76:aeb1df146756 898 void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState)
mbed_official 76:aeb1df146756 899 {
mbed_official 76:aeb1df146756 900 /* Check the parameters */
mbed_official 76:aeb1df146756 901 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 76:aeb1df146756 902 assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official 76:aeb1df146756 903
mbed_official 76:aeb1df146756 904 if (NewState != DISABLE)
mbed_official 76:aeb1df146756 905 {
mbed_official 76:aeb1df146756 906 /* Enable the selected SPI CRC calculation */
mbed_official 76:aeb1df146756 907 SPIx->CR1 |= SPI_CR1_CRCEN;
mbed_official 76:aeb1df146756 908 }
mbed_official 76:aeb1df146756 909 else
mbed_official 76:aeb1df146756 910 {
mbed_official 76:aeb1df146756 911 /* Disable the selected SPI CRC calculation */
mbed_official 76:aeb1df146756 912 SPIx->CR1 &= (uint16_t)~((uint16_t)SPI_CR1_CRCEN);
mbed_official 76:aeb1df146756 913 }
mbed_official 76:aeb1df146756 914 }
mbed_official 76:aeb1df146756 915
mbed_official 76:aeb1df146756 916 /**
mbed_official 76:aeb1df146756 917 * @brief Transmit the SPIx CRC value.
mbed_official 76:aeb1df146756 918 * @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
mbed_official 76:aeb1df146756 919 * @note SPI2 is not available for STM32F031 devices.
mbed_official 76:aeb1df146756 920 * @retval None
mbed_official 76:aeb1df146756 921 */
mbed_official 76:aeb1df146756 922 void SPI_TransmitCRC(SPI_TypeDef* SPIx)
mbed_official 76:aeb1df146756 923 {
mbed_official 76:aeb1df146756 924 /* Check the parameters */
mbed_official 76:aeb1df146756 925 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 76:aeb1df146756 926
mbed_official 76:aeb1df146756 927 /* Enable the selected SPI CRC transmission */
mbed_official 76:aeb1df146756 928 SPIx->CR1 |= SPI_CR1_CRCNEXT;
mbed_official 76:aeb1df146756 929 }
mbed_official 76:aeb1df146756 930
mbed_official 76:aeb1df146756 931 /**
mbed_official 76:aeb1df146756 932 * @brief Returns the transmit or the receive CRC register value for the specified SPI.
mbed_official 76:aeb1df146756 933 * @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
mbed_official 76:aeb1df146756 934 * @note SPI2 is not available for STM32F031 devices.
mbed_official 76:aeb1df146756 935 * @param SPI_CRC: specifies the CRC register to be read.
mbed_official 76:aeb1df146756 936 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 937 * @arg SPI_CRC_Tx: Selects Tx CRC register
mbed_official 76:aeb1df146756 938 * @arg SPI_CRC_Rx: Selects Rx CRC register
mbed_official 76:aeb1df146756 939 * @retval The selected CRC register value..
mbed_official 76:aeb1df146756 940 */
mbed_official 76:aeb1df146756 941 uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC)
mbed_official 76:aeb1df146756 942 {
mbed_official 76:aeb1df146756 943 uint16_t crcreg = 0;
mbed_official 76:aeb1df146756 944 /* Check the parameters */
mbed_official 76:aeb1df146756 945 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 76:aeb1df146756 946 assert_param(IS_SPI_CRC(SPI_CRC));
mbed_official 76:aeb1df146756 947
mbed_official 76:aeb1df146756 948 if (SPI_CRC != SPI_CRC_Rx)
mbed_official 76:aeb1df146756 949 {
mbed_official 76:aeb1df146756 950 /* Get the Tx CRC register */
mbed_official 76:aeb1df146756 951 crcreg = SPIx->TXCRCR;
mbed_official 76:aeb1df146756 952 }
mbed_official 76:aeb1df146756 953 else
mbed_official 76:aeb1df146756 954 {
mbed_official 76:aeb1df146756 955 /* Get the Rx CRC register */
mbed_official 76:aeb1df146756 956 crcreg = SPIx->RXCRCR;
mbed_official 76:aeb1df146756 957 }
mbed_official 76:aeb1df146756 958 /* Return the selected CRC register */
mbed_official 76:aeb1df146756 959 return crcreg;
mbed_official 76:aeb1df146756 960 }
mbed_official 76:aeb1df146756 961
mbed_official 76:aeb1df146756 962 /**
mbed_official 76:aeb1df146756 963 * @brief Returns the CRC Polynomial register value for the specified SPI.
mbed_official 76:aeb1df146756 964 * @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
mbed_official 76:aeb1df146756 965 * @note SPI2 is not available for STM32F031 devices.
mbed_official 76:aeb1df146756 966 * @retval The CRC Polynomial register value.
mbed_official 76:aeb1df146756 967 */
mbed_official 76:aeb1df146756 968 uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx)
mbed_official 76:aeb1df146756 969 {
mbed_official 76:aeb1df146756 970 /* Check the parameters */
mbed_official 76:aeb1df146756 971 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 76:aeb1df146756 972
mbed_official 76:aeb1df146756 973 /* Return the CRC polynomial register */
mbed_official 76:aeb1df146756 974 return SPIx->CRCPR;
mbed_official 76:aeb1df146756 975 }
mbed_official 76:aeb1df146756 976
mbed_official 76:aeb1df146756 977 /**
mbed_official 76:aeb1df146756 978 * @}
mbed_official 76:aeb1df146756 979 */
mbed_official 76:aeb1df146756 980
mbed_official 76:aeb1df146756 981 /** @defgroup SPI_Group4 DMA transfers management functions
mbed_official 76:aeb1df146756 982 * @brief DMA transfers management functions
mbed_official 76:aeb1df146756 983 *
mbed_official 76:aeb1df146756 984 @verbatim
mbed_official 76:aeb1df146756 985 ===============================================================================
mbed_official 76:aeb1df146756 986 ##### DMA transfers management functions #####
mbed_official 76:aeb1df146756 987 ===============================================================================
mbed_official 76:aeb1df146756 988 [..] This section provides two functions that can be used only in DMA mode.
mbed_official 76:aeb1df146756 989
mbed_official 76:aeb1df146756 990 @endverbatim
mbed_official 76:aeb1df146756 991 * @{
mbed_official 76:aeb1df146756 992 */
mbed_official 76:aeb1df146756 993
mbed_official 76:aeb1df146756 994 /**
mbed_official 76:aeb1df146756 995 * @brief Enables or disables the SPIx/I2Sx DMA interface.
mbed_official 76:aeb1df146756 996 * @param SPIx: where x can be 1 or 2 in SPI mode or 1 in I2S mode to select
mbed_official 76:aeb1df146756 997 * the SPI peripheral.
mbed_official 76:aeb1df146756 998 * @note SPI2 is not available for STM32F031 devices.
mbed_official 76:aeb1df146756 999 * I2S mode is not supported for STM32F030 devices.
mbed_official 76:aeb1df146756 1000 * @param SPI_I2S_DMAReq: specifies the SPI DMA transfer request to be enabled or disabled.
mbed_official 76:aeb1df146756 1001 * This parameter can be any combination of the following values:
mbed_official 76:aeb1df146756 1002 * @arg SPI_I2S_DMAReq_Tx: Tx buffer DMA transfer request
mbed_official 76:aeb1df146756 1003 * @arg SPI_I2S_DMAReq_Rx: Rx buffer DMA transfer request
mbed_official 76:aeb1df146756 1004 * @param NewState: new state of the selected SPI DMA transfer request.
mbed_official 76:aeb1df146756 1005 * This parameter can be: ENABLE or DISABLE.
mbed_official 76:aeb1df146756 1006 * @retval None
mbed_official 76:aeb1df146756 1007 */
mbed_official 76:aeb1df146756 1008 void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState)
mbed_official 76:aeb1df146756 1009 {
mbed_official 76:aeb1df146756 1010 /* Check the parameters */
mbed_official 76:aeb1df146756 1011 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 76:aeb1df146756 1012 assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official 76:aeb1df146756 1013 assert_param(IS_SPI_I2S_DMA_REQ(SPI_I2S_DMAReq));
mbed_official 76:aeb1df146756 1014
mbed_official 76:aeb1df146756 1015 if (NewState != DISABLE)
mbed_official 76:aeb1df146756 1016 {
mbed_official 76:aeb1df146756 1017 /* Enable the selected SPI DMA requests */
mbed_official 76:aeb1df146756 1018 SPIx->CR2 |= SPI_I2S_DMAReq;
mbed_official 76:aeb1df146756 1019 }
mbed_official 76:aeb1df146756 1020 else
mbed_official 76:aeb1df146756 1021 {
mbed_official 76:aeb1df146756 1022 /* Disable the selected SPI DMA requests */
mbed_official 76:aeb1df146756 1023 SPIx->CR2 &= (uint16_t)~SPI_I2S_DMAReq;
mbed_official 76:aeb1df146756 1024 }
mbed_official 76:aeb1df146756 1025 }
mbed_official 76:aeb1df146756 1026
mbed_official 76:aeb1df146756 1027 /**
mbed_official 76:aeb1df146756 1028 * @brief Configures the number of data to transfer type(Even/Odd) for the DMA
mbed_official 76:aeb1df146756 1029 * last transfers and for the selected SPI.
mbed_official 76:aeb1df146756 1030 * @note This function have a meaning only if DMA mode is selected and if
mbed_official 76:aeb1df146756 1031 * the packing mode is used (data length <= 8 and DMA transfer size halfword)
mbed_official 76:aeb1df146756 1032 * @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
mbed_official 76:aeb1df146756 1033 * @note SPI2 is not available for STM32F031 devices.
mbed_official 76:aeb1df146756 1034 * @param SPI_LastDMATransfer: specifies the SPI last DMA transfers state.
mbed_official 76:aeb1df146756 1035 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 1036 * @arg SPI_LastDMATransfer_TxEvenRxEven: Number of data for transmission Even
mbed_official 76:aeb1df146756 1037 * and number of data for reception Even.
mbed_official 76:aeb1df146756 1038 * @arg SPI_LastDMATransfer_TxOddRxEven: Number of data for transmission Odd
mbed_official 76:aeb1df146756 1039 * and number of data for reception Even.
mbed_official 76:aeb1df146756 1040 * @arg SPI_LastDMATransfer_TxEvenRxOdd: Number of data for transmission Even
mbed_official 76:aeb1df146756 1041 * and number of data for reception Odd.
mbed_official 76:aeb1df146756 1042 * @arg SPI_LastDMATransfer_TxOddRxOdd: Number of data for transmission Odd
mbed_official 76:aeb1df146756 1043 * and number of data for reception Odd.
mbed_official 76:aeb1df146756 1044 * @retval None
mbed_official 76:aeb1df146756 1045 */
mbed_official 76:aeb1df146756 1046 void SPI_LastDMATransferCmd(SPI_TypeDef* SPIx, uint16_t SPI_LastDMATransfer)
mbed_official 76:aeb1df146756 1047 {
mbed_official 76:aeb1df146756 1048 /* Check the parameters */
mbed_official 76:aeb1df146756 1049 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 76:aeb1df146756 1050 assert_param(IS_SPI_LAST_DMA_TRANSFER(SPI_LastDMATransfer));
mbed_official 76:aeb1df146756 1051
mbed_official 76:aeb1df146756 1052 /* Clear LDMA_TX and LDMA_RX bits */
mbed_official 76:aeb1df146756 1053 SPIx->CR2 &= CR2_LDMA_MASK;
mbed_official 76:aeb1df146756 1054
mbed_official 76:aeb1df146756 1055 /* Set new LDMA_TX and LDMA_RX bits value */
mbed_official 76:aeb1df146756 1056 SPIx->CR2 |= SPI_LastDMATransfer;
mbed_official 76:aeb1df146756 1057 }
mbed_official 76:aeb1df146756 1058
mbed_official 76:aeb1df146756 1059 /**
mbed_official 76:aeb1df146756 1060 * @}
mbed_official 76:aeb1df146756 1061 */
mbed_official 76:aeb1df146756 1062
mbed_official 76:aeb1df146756 1063 /** @defgroup SPI_Group5 Interrupts and flags management functions
mbed_official 76:aeb1df146756 1064 * @brief Interrupts and flags management functions
mbed_official 76:aeb1df146756 1065 *
mbed_official 76:aeb1df146756 1066 @verbatim
mbed_official 76:aeb1df146756 1067 ===============================================================================
mbed_official 76:aeb1df146756 1068 ##### Interrupts and flags management functions #####
mbed_official 76:aeb1df146756 1069 ===============================================================================
mbed_official 76:aeb1df146756 1070 [..] This section provides a set of functions allowing to configure the SPI/I2S Interrupts
mbed_official 76:aeb1df146756 1071 sources and check or clear the flags or pending bits status.
mbed_official 76:aeb1df146756 1072 The user should identify which mode will be used in his application to manage
mbed_official 76:aeb1df146756 1073 the communication: Polling mode, Interrupt mode or DMA mode.
mbed_official 76:aeb1df146756 1074
mbed_official 76:aeb1df146756 1075 *** Polling Mode ***
mbed_official 76:aeb1df146756 1076 ====================
mbed_official 76:aeb1df146756 1077 [..] In Polling Mode, the SPI/I2S communication can be managed by 9 flags:
mbed_official 76:aeb1df146756 1078 (#) SPI_I2S_FLAG_TXE : to indicate the status of the transmit buffer register
mbed_official 76:aeb1df146756 1079 (#) SPI_I2S_FLAG_RXNE : to indicate the status of the receive buffer register
mbed_official 76:aeb1df146756 1080 (#) SPI_I2S_FLAG_BSY : to indicate the state of the communication layer of the SPI.
mbed_official 76:aeb1df146756 1081 (#) SPI_FLAG_CRCERR : to indicate if a CRC Calculation error occur
mbed_official 76:aeb1df146756 1082 (#) SPI_FLAG_MODF : to indicate if a Mode Fault error occur
mbed_official 76:aeb1df146756 1083 (#) SPI_I2S_FLAG_OVR : to indicate if an Overrun error occur
mbed_official 76:aeb1df146756 1084 (#) SPI_I2S_FLAG_FRE: to indicate a Frame Format error occurs.
mbed_official 76:aeb1df146756 1085 (#) I2S_FLAG_UDR: to indicate an Underrun error occurs.
mbed_official 76:aeb1df146756 1086 (#) I2S_FLAG_CHSIDE: to indicate Channel Side.
mbed_official 76:aeb1df146756 1087
mbed_official 76:aeb1df146756 1088 [..]
mbed_official 76:aeb1df146756 1089 (@)Do not use the BSY flag to handle each data transmission or reception. It is better
mbed_official 76:aeb1df146756 1090 to use the TXE and RXNE flags instead.
mbed_official 76:aeb1df146756 1091
mbed_official 76:aeb1df146756 1092 [..] In this Mode it is advised to use the following functions:
mbed_official 76:aeb1df146756 1093 (+) FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
mbed_official 76:aeb1df146756 1094 (+) void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
mbed_official 76:aeb1df146756 1095
mbed_official 76:aeb1df146756 1096 *** Interrupt Mode ***
mbed_official 76:aeb1df146756 1097 ======================
mbed_official 76:aeb1df146756 1098 [..] In Interrupt Mode, the SPI/I2S communication can be managed by 3 interrupt sources
mbed_official 76:aeb1df146756 1099 and 5 pending bits:
mbed_official 76:aeb1df146756 1100 [..] Pending Bits:
mbed_official 76:aeb1df146756 1101 (#) SPI_I2S_IT_TXE : to indicate the status of the transmit buffer register
mbed_official 76:aeb1df146756 1102 (#) SPI_I2S_IT_RXNE : to indicate the status of the receive buffer register
mbed_official 76:aeb1df146756 1103 (#) SPI_I2S_IT_OVR : to indicate if an Overrun error occur
mbed_official 76:aeb1df146756 1104 (#) I2S_IT_UDR : to indicate an Underrun Error occurs.
mbed_official 76:aeb1df146756 1105 (#) SPI_I2S_FLAG_FRE : to indicate a Frame Format error occurs.
mbed_official 76:aeb1df146756 1106
mbed_official 76:aeb1df146756 1107 [..] Interrupt Source:
mbed_official 76:aeb1df146756 1108 (#) SPI_I2S_IT_TXE: specifies the interrupt source for the Tx buffer empty
mbed_official 76:aeb1df146756 1109 interrupt.
mbed_official 76:aeb1df146756 1110 (#) SPI_I2S_IT_RXNE : specifies the interrupt source for the Rx buffer not
mbed_official 76:aeb1df146756 1111 empty interrupt.
mbed_official 76:aeb1df146756 1112 (#) SPI_I2S_IT_ERR : specifies the interrupt source for the errors interrupt.
mbed_official 76:aeb1df146756 1113
mbed_official 76:aeb1df146756 1114 [..] In this Mode it is advised to use the following functions:
mbed_official 76:aeb1df146756 1115 (+) void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState);
mbed_official 76:aeb1df146756 1116 (+) ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);
mbed_official 76:aeb1df146756 1117
mbed_official 76:aeb1df146756 1118 *** FIFO Status ***
mbed_official 76:aeb1df146756 1119 ===================
mbed_official 76:aeb1df146756 1120 [..] It is possible to monitor the FIFO status when a transfer is ongoing using the
mbed_official 76:aeb1df146756 1121 following function:
mbed_official 76:aeb1df146756 1122 (+) uint32_t SPI_GetFIFOStatus(uint8_t SPI_FIFO_Direction);
mbed_official 76:aeb1df146756 1123
mbed_official 76:aeb1df146756 1124 *** DMA Mode ***
mbed_official 76:aeb1df146756 1125 ================
mbed_official 76:aeb1df146756 1126 [..] In DMA Mode, the SPI communication can be managed by 2 DMA Channel
mbed_official 76:aeb1df146756 1127 requests:
mbed_official 76:aeb1df146756 1128 (#) SPI_I2S_DMAReq_Tx: specifies the Tx buffer DMA transfer request.
mbed_official 76:aeb1df146756 1129 (#) SPI_I2S_DMAReq_Rx: specifies the Rx buffer DMA transfer request.
mbed_official 76:aeb1df146756 1130
mbed_official 76:aeb1df146756 1131 [..] In this Mode it is advised to use the following function:
mbed_official 76:aeb1df146756 1132 (+) void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState).
mbed_official 76:aeb1df146756 1133
mbed_official 76:aeb1df146756 1134 @endverbatim
mbed_official 76:aeb1df146756 1135 * @{
mbed_official 76:aeb1df146756 1136 */
mbed_official 76:aeb1df146756 1137
mbed_official 76:aeb1df146756 1138 /**
mbed_official 76:aeb1df146756 1139 * @brief Enables or disables the specified SPI/I2S interrupts.
mbed_official 76:aeb1df146756 1140 * @param SPIx: where x can be 1 or 2 in SPI mode or 1 in I2S mode to select
mbed_official 76:aeb1df146756 1141 * the SPI peripheral.
mbed_official 76:aeb1df146756 1142 * @note SPI2 is not available for STM32F031 devices.
mbed_official 76:aeb1df146756 1143 * I2S mode is not supported for STM32F030 devices.
mbed_official 76:aeb1df146756 1144 * @param SPI_I2S_IT: specifies the SPI interrupt source to be enabled or disabled.
mbed_official 76:aeb1df146756 1145 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 1146 * @arg SPI_I2S_IT_TXE: Tx buffer empty interrupt mask
mbed_official 76:aeb1df146756 1147 * @arg SPI_I2S_IT_RXNE: Rx buffer not empty interrupt mask
mbed_official 76:aeb1df146756 1148 * @arg SPI_I2S_IT_ERR: Error interrupt mask
mbed_official 76:aeb1df146756 1149 * @param NewState: new state of the specified SPI interrupt.
mbed_official 76:aeb1df146756 1150 * This parameter can be: ENABLE or DISABLE.
mbed_official 76:aeb1df146756 1151 * @retval None
mbed_official 76:aeb1df146756 1152 */
mbed_official 76:aeb1df146756 1153 void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState)
mbed_official 76:aeb1df146756 1154 {
mbed_official 76:aeb1df146756 1155 uint16_t itpos = 0, itmask = 0 ;
mbed_official 76:aeb1df146756 1156
mbed_official 76:aeb1df146756 1157 /* Check the parameters */
mbed_official 76:aeb1df146756 1158 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 76:aeb1df146756 1159 assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official 76:aeb1df146756 1160 assert_param(IS_SPI_I2S_CONFIG_IT(SPI_I2S_IT));
mbed_official 76:aeb1df146756 1161
mbed_official 76:aeb1df146756 1162 /* Get the SPI IT index */
mbed_official 76:aeb1df146756 1163 itpos = SPI_I2S_IT >> 4;
mbed_official 76:aeb1df146756 1164
mbed_official 76:aeb1df146756 1165 /* Set the IT mask */
mbed_official 76:aeb1df146756 1166 itmask = (uint16_t)1 << (uint16_t)itpos;
mbed_official 76:aeb1df146756 1167
mbed_official 76:aeb1df146756 1168 if (NewState != DISABLE)
mbed_official 76:aeb1df146756 1169 {
mbed_official 76:aeb1df146756 1170 /* Enable the selected SPI interrupt */
mbed_official 76:aeb1df146756 1171 SPIx->CR2 |= itmask;
mbed_official 76:aeb1df146756 1172 }
mbed_official 76:aeb1df146756 1173 else
mbed_official 76:aeb1df146756 1174 {
mbed_official 76:aeb1df146756 1175 /* Disable the selected SPI interrupt */
mbed_official 76:aeb1df146756 1176 SPIx->CR2 &= (uint16_t)~itmask;
mbed_official 76:aeb1df146756 1177 }
mbed_official 76:aeb1df146756 1178 }
mbed_official 76:aeb1df146756 1179
mbed_official 76:aeb1df146756 1180 /**
mbed_official 76:aeb1df146756 1181 * @brief Returns the current SPIx Transmission FIFO filled level.
mbed_official 76:aeb1df146756 1182 * @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
mbed_official 76:aeb1df146756 1183 * @note SPI2 is not available for STM32F031 devices.
mbed_official 76:aeb1df146756 1184 * @retval The Transmission FIFO filling state.
mbed_official 76:aeb1df146756 1185 * - SPI_TransmissionFIFOStatus_Empty: when FIFO is empty
mbed_official 76:aeb1df146756 1186 * - SPI_TransmissionFIFOStatus_1QuarterFull: if more than 1 quarter-full.
mbed_official 76:aeb1df146756 1187 * - SPI_TransmissionFIFOStatus_HalfFull: if more than 1 half-full.
mbed_official 76:aeb1df146756 1188 * - SPI_TransmissionFIFOStatus_Full: when FIFO is full.
mbed_official 76:aeb1df146756 1189 */
mbed_official 76:aeb1df146756 1190 uint16_t SPI_GetTransmissionFIFOStatus(SPI_TypeDef* SPIx)
mbed_official 76:aeb1df146756 1191 {
mbed_official 76:aeb1df146756 1192 /* Get the SPIx Transmission FIFO level bits */
mbed_official 76:aeb1df146756 1193 return (uint16_t)((SPIx->SR & SPI_SR_FTLVL));
mbed_official 76:aeb1df146756 1194 }
mbed_official 76:aeb1df146756 1195
mbed_official 76:aeb1df146756 1196 /**
mbed_official 76:aeb1df146756 1197 * @brief Returns the current SPIx Reception FIFO filled level.
mbed_official 76:aeb1df146756 1198 * @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
mbed_official 76:aeb1df146756 1199 * @note SPI2 is not available for STM32F031 devices.
mbed_official 76:aeb1df146756 1200 * @retval The Reception FIFO filling state.
mbed_official 76:aeb1df146756 1201 * - SPI_ReceptionFIFOStatus_Empty: when FIFO is empty
mbed_official 76:aeb1df146756 1202 * - SPI_ReceptionFIFOStatus_1QuarterFull: if more than 1 quarter-full.
mbed_official 76:aeb1df146756 1203 * - SPI_ReceptionFIFOStatus_HalfFull: if more than 1 half-full.
mbed_official 76:aeb1df146756 1204 * - SPI_ReceptionFIFOStatus_Full: when FIFO is full.
mbed_official 76:aeb1df146756 1205 */
mbed_official 76:aeb1df146756 1206 uint16_t SPI_GetReceptionFIFOStatus(SPI_TypeDef* SPIx)
mbed_official 76:aeb1df146756 1207 {
mbed_official 76:aeb1df146756 1208 /* Get the SPIx Reception FIFO level bits */
mbed_official 76:aeb1df146756 1209 return (uint16_t)((SPIx->SR & SPI_SR_FRLVL));
mbed_official 76:aeb1df146756 1210 }
mbed_official 76:aeb1df146756 1211
mbed_official 76:aeb1df146756 1212 /**
mbed_official 76:aeb1df146756 1213 * @brief Checks whether the specified SPI flag is set or not.
mbed_official 76:aeb1df146756 1214 * @param SPIx: where x can be 1 or 2 in SPI mode or 1 in I2S mode to select
mbed_official 76:aeb1df146756 1215 * the SPI peripheral.
mbed_official 76:aeb1df146756 1216 * @note SPI2 is not available for STM32F031 devices.
mbed_official 76:aeb1df146756 1217 * I2S mode is not supported for STM32F030 devices.
mbed_official 76:aeb1df146756 1218 * @param SPI_I2S_FLAG: specifies the SPI flag to check.
mbed_official 76:aeb1df146756 1219 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 1220 * @arg SPI_I2S_FLAG_TXE: Transmit buffer empty flag.
mbed_official 76:aeb1df146756 1221 * @arg SPI_I2S_FLAG_RXNE: Receive buffer not empty flag.
mbed_official 76:aeb1df146756 1222 * @arg SPI_I2S_FLAG_BSY: Busy flag.
mbed_official 76:aeb1df146756 1223 * @arg SPI_I2S_FLAG_OVR: Overrun flag.
mbed_official 76:aeb1df146756 1224 * @arg SPI_FLAG_MODF: Mode Fault flag.
mbed_official 76:aeb1df146756 1225 * @arg SPI_FLAG_CRCERR: CRC Error flag.
mbed_official 76:aeb1df146756 1226 * @arg SPI_I2S_FLAG_FRE: TI frame format error flag.
mbed_official 76:aeb1df146756 1227 * @arg I2S_FLAG_UDR: Underrun Error flag.
mbed_official 76:aeb1df146756 1228 * @arg I2S_FLAG_CHSIDE: Channel Side flag.
mbed_official 76:aeb1df146756 1229 * @retval The new state of SPI_I2S_FLAG (SET or RESET).
mbed_official 76:aeb1df146756 1230 */
mbed_official 76:aeb1df146756 1231 FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG)
mbed_official 76:aeb1df146756 1232 {
mbed_official 76:aeb1df146756 1233 FlagStatus bitstatus = RESET;
mbed_official 76:aeb1df146756 1234 /* Check the parameters */
mbed_official 76:aeb1df146756 1235 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 76:aeb1df146756 1236 assert_param(IS_SPI_I2S_GET_FLAG(SPI_I2S_FLAG));
mbed_official 76:aeb1df146756 1237
mbed_official 76:aeb1df146756 1238 /* Check the status of the specified SPI flag */
mbed_official 76:aeb1df146756 1239 if ((SPIx->SR & SPI_I2S_FLAG) != (uint16_t)RESET)
mbed_official 76:aeb1df146756 1240 {
mbed_official 76:aeb1df146756 1241 /* SPI_I2S_FLAG is set */
mbed_official 76:aeb1df146756 1242 bitstatus = SET;
mbed_official 76:aeb1df146756 1243 }
mbed_official 76:aeb1df146756 1244 else
mbed_official 76:aeb1df146756 1245 {
mbed_official 76:aeb1df146756 1246 /* SPI_I2S_FLAG is reset */
mbed_official 76:aeb1df146756 1247 bitstatus = RESET;
mbed_official 76:aeb1df146756 1248 }
mbed_official 76:aeb1df146756 1249 /* Return the SPI_I2S_FLAG status */
mbed_official 76:aeb1df146756 1250 return bitstatus;
mbed_official 76:aeb1df146756 1251 }
mbed_official 76:aeb1df146756 1252
mbed_official 76:aeb1df146756 1253 /**
mbed_official 76:aeb1df146756 1254 * @brief Clears the SPIx CRC Error (CRCERR) flag.
mbed_official 76:aeb1df146756 1255 * @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
mbed_official 76:aeb1df146756 1256 * @note SPI2 is not available for STM32F031 devices.
mbed_official 76:aeb1df146756 1257 * I2S mode is not supported for STM32F030 devices.
mbed_official 76:aeb1df146756 1258 * @param SPI_I2S_FLAG: specifies the SPI flag to clear.
mbed_official 76:aeb1df146756 1259 * This function clears only CRCERR flag.
mbed_official 76:aeb1df146756 1260 * @note OVR (OverRun error) flag is cleared by software sequence: a read
mbed_official 76:aeb1df146756 1261 * operation to SPI_DR register (SPI_I2S_ReceiveData()) followed by
mbed_official 76:aeb1df146756 1262 * a read operation to SPI_SR register (SPI_I2S_GetFlagStatus()).
mbed_official 76:aeb1df146756 1263 * @note MODF (Mode Fault) flag is cleared by software sequence: a read/write
mbed_official 76:aeb1df146756 1264 * operation to SPI_SR register (SPI_I2S_GetFlagStatus()) followed by
mbed_official 76:aeb1df146756 1265 * a write operation to SPI_CR1 register (SPI_Cmd() to enable the SPI).
mbed_official 76:aeb1df146756 1266 * @retval None
mbed_official 76:aeb1df146756 1267 */
mbed_official 76:aeb1df146756 1268 void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG)
mbed_official 76:aeb1df146756 1269 {
mbed_official 76:aeb1df146756 1270 /* Check the parameters */
mbed_official 76:aeb1df146756 1271 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 76:aeb1df146756 1272 assert_param(IS_SPI_CLEAR_FLAG(SPI_I2S_FLAG));
mbed_official 76:aeb1df146756 1273
mbed_official 76:aeb1df146756 1274 /* Clear the selected SPI CRC Error (CRCERR) flag */
mbed_official 76:aeb1df146756 1275 SPIx->SR = (uint16_t)~SPI_I2S_FLAG;
mbed_official 76:aeb1df146756 1276 }
mbed_official 76:aeb1df146756 1277
mbed_official 76:aeb1df146756 1278 /**
mbed_official 76:aeb1df146756 1279 * @brief Checks whether the specified SPI/I2S interrupt has occurred or not.
mbed_official 76:aeb1df146756 1280 * @param SPIx: where x can be 1 or 2 in SPI mode or 1 in I2S mode to select
mbed_official 76:aeb1df146756 1281 * the SPI peripheral.
mbed_official 76:aeb1df146756 1282 * @param SPI_I2S_IT: specifies the SPI interrupt source to check.
mbed_official 76:aeb1df146756 1283 * This parameter can be one of the following values:
mbed_official 76:aeb1df146756 1284 * @arg SPI_I2S_IT_TXE: Transmit buffer empty interrupt.
mbed_official 76:aeb1df146756 1285 * @arg SPI_I2S_IT_RXNE: Receive buffer not empty interrupt.
mbed_official 76:aeb1df146756 1286 * @arg SPI_IT_MODF: Mode Fault interrupt.
mbed_official 76:aeb1df146756 1287 * @arg SPI_I2S_IT_OVR: Overrun interrupt.
mbed_official 76:aeb1df146756 1288 * @arg I2S_IT_UDR: Underrun interrupt.
mbed_official 76:aeb1df146756 1289 * @arg SPI_I2S_IT_FRE: Format Error interrupt.
mbed_official 76:aeb1df146756 1290 * @retval The new state of SPI_I2S_IT (SET or RESET).
mbed_official 76:aeb1df146756 1291 */
mbed_official 76:aeb1df146756 1292 ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT)
mbed_official 76:aeb1df146756 1293 {
mbed_official 76:aeb1df146756 1294 ITStatus bitstatus = RESET;
mbed_official 76:aeb1df146756 1295 uint16_t itpos = 0, itmask = 0, enablestatus = 0;
mbed_official 76:aeb1df146756 1296
mbed_official 76:aeb1df146756 1297 /* Check the parameters */
mbed_official 76:aeb1df146756 1298 assert_param(IS_SPI_ALL_PERIPH(SPIx));
mbed_official 76:aeb1df146756 1299 assert_param(IS_SPI_I2S_GET_IT(SPI_I2S_IT));
mbed_official 76:aeb1df146756 1300
mbed_official 76:aeb1df146756 1301 /* Get the SPI_I2S_IT index */
mbed_official 76:aeb1df146756 1302 itpos = 0x01 << (SPI_I2S_IT & 0x0F);
mbed_official 76:aeb1df146756 1303
mbed_official 76:aeb1df146756 1304 /* Get the SPI_I2S_IT IT mask */
mbed_official 76:aeb1df146756 1305 itmask = SPI_I2S_IT >> 4;
mbed_official 76:aeb1df146756 1306
mbed_official 76:aeb1df146756 1307 /* Set the IT mask */
mbed_official 76:aeb1df146756 1308 itmask = 0x01 << itmask;
mbed_official 76:aeb1df146756 1309
mbed_official 76:aeb1df146756 1310 /* Get the SPI_I2S_IT enable bit status */
mbed_official 76:aeb1df146756 1311 enablestatus = (SPIx->CR2 & itmask) ;
mbed_official 76:aeb1df146756 1312
mbed_official 76:aeb1df146756 1313 /* Check the status of the specified SPI interrupt */
mbed_official 76:aeb1df146756 1314 if (((SPIx->SR & itpos) != (uint16_t)RESET) && enablestatus)
mbed_official 76:aeb1df146756 1315 {
mbed_official 76:aeb1df146756 1316 /* SPI_I2S_IT is set */
mbed_official 76:aeb1df146756 1317 bitstatus = SET;
mbed_official 76:aeb1df146756 1318 }
mbed_official 76:aeb1df146756 1319 else
mbed_official 76:aeb1df146756 1320 {
mbed_official 76:aeb1df146756 1321 /* SPI_I2S_IT is reset */
mbed_official 76:aeb1df146756 1322 bitstatus = RESET;
mbed_official 76:aeb1df146756 1323 }
mbed_official 76:aeb1df146756 1324 /* Return the SPI_I2S_IT status */
mbed_official 76:aeb1df146756 1325 return bitstatus;
mbed_official 76:aeb1df146756 1326 }
mbed_official 76:aeb1df146756 1327
mbed_official 76:aeb1df146756 1328 /**
mbed_official 76:aeb1df146756 1329 * @}
mbed_official 76:aeb1df146756 1330 */
mbed_official 76:aeb1df146756 1331
mbed_official 76:aeb1df146756 1332 /**
mbed_official 76:aeb1df146756 1333 * @}
mbed_official 76:aeb1df146756 1334 */
mbed_official 76:aeb1df146756 1335
mbed_official 76:aeb1df146756 1336 /**
mbed_official 76:aeb1df146756 1337 * @}
mbed_official 76:aeb1df146756 1338 */
mbed_official 76:aeb1df146756 1339
mbed_official 76:aeb1df146756 1340 /**
mbed_official 76:aeb1df146756 1341 * @}
mbed_official 76:aeb1df146756 1342 */
mbed_official 76:aeb1df146756 1343
mbed_official 76:aeb1df146756 1344 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/