Piotr Woźniak / Mbed 2 deprecated KL46Z-Lab2_fullll

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Dependencies:   MAG3110 MMA8451Q SLCD- TSI USBDevice mbed

SLCD-/LCDconfig.h@0:339b7abfa147, 2014-04-16 (annotated)

Committer:
Osator
Date:
Wed Apr 16 12:20:00 2014 +0000
Revision:
0:339b7abfa147
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Who changed what in which revision?

UserRevisionLine numberNew contents of line
Osator 0:339b7abfa147 1 #include "FRDM-s401.h" // 4x7 segdisplay
Osator 0:339b7abfa147 2
Osator 0:339b7abfa147 3
Osator 0:339b7abfa147 4 #if 1 // VREF to VLL1
Osator 0:339b7abfa147 5 /* Following configuration is used for LCD default initialization */
Osator 0:339b7abfa147 6 #define _LCDRVEN (1) //
Osator 0:339b7abfa147 7 #define _LCDRVTRIM (8) // CPSEL = 1 0 -- 8000 pf 1 -- 6000 pf 2 -- 4000 pf 3 -- 2000 pf
Osator 0:339b7abfa147 8 #define _LCDCPSEL (1) // charge pump select 0 or 1
Osator 0:339b7abfa147 9 #define _LCDLOADADJUST (3) // CPSEL = 1 0 -- 8000 pf 1 -- 6000 pf 2 -- 4000 pf 3 -- 2000 pf
Osator 0:339b7abfa147 10 #define _LCDALTDIV (0) // CPSEL = 1 0 -- 8000 pf 1 -- 6000 pf 2 -- 4000 pf 3 -- 2000 pf
Osator 0:339b7abfa147 11 #define _LCDALRCLKSOURCE (0) // 0 -- External clock 1 -- Alternate clock
Osator 0:339b7abfa147 12
Osator 0:339b7abfa147 13 #define _LCDCLKPSL (0) // Clock divider to generate the LCD Waveforms
Osator 0:339b7abfa147 14 #define _LCDSUPPLY (1)
Osator 0:339b7abfa147 15 #define _LCDHREF (0) // 0 or 1
Osator 0:339b7abfa147 16 #define _LCDCLKSOURCE (1) // 0 -- External clock 1 -- Alternate clock
Osator 0:339b7abfa147 17 #define _LCDLCK (1) //Any number between 0 and 7
Osator 0:339b7abfa147 18 #define _LCDBLINKRATE (3) //Any number between 0 and 7
Osator 0:339b7abfa147 19
Osator 0:339b7abfa147 20
Osator 0:339b7abfa147 21 #else //VLL3 to VDD internally
Osator 0:339b7abfa147 22 /* Following configuration is used for LCD default initialization */
Osator 0:339b7abfa147 23 #define _LCDCLKSOURCE (1) // 0 -- External clock 1 -- Alternate clock
Osator 0:339b7abfa147 24 #define _LCDALRCLKSOURCE (0) // 0 -- External clock 1 -- Alternate clock
Osator 0:339b7abfa147 25 #define _LCDCLKPSL (0) // Clock divider to generate the LCD Waveforms
Osator 0:339b7abfa147 26 #define _LCDSUPPLY (0)
Osator 0:339b7abfa147 27 #define _LCDLOADADJUST (3) // CPSEL = 1 0 -- 8000 pf 1 -- 6000 pf 2 -- 4000 pf 3 -- 2000 pf
Osator 0:339b7abfa147 28 #define _LCDALTDIV (0) // CPSEL = 1 0 -- 8000 pf 1 -- 6000 pf 2 -- 4000 pf 3 -- 2000 pf
Osator 0:339b7abfa147 29 #define _LCDRVTRIM (0) // CPSEL = 1 0 -- 8000 pf 1 -- 6000 pf 2 -- 4000 pf 3 -- 2000 pf
Osator 0:339b7abfa147 30 #define _LCDHREF (0) // 0 or 1
Osator 0:339b7abfa147 31 #define _LCDCPSEL (1) // 0 or 1
Osator 0:339b7abfa147 32 #define _LCDRVEN (0) //
Osator 0:339b7abfa147 33 #define _LCDBLINKRATE (3) // Any number between 0 and 7
Osator 0:339b7abfa147 34 #define _LCDLCK (0) // Any number between 0 and 7
Osator 0:339b7abfa147 35
Osator 0:339b7abfa147 36 #endif
Osator 0:339b7abfa147 37
Osator 0:339b7abfa147 38
Osator 0:339b7abfa147 39
Osator 0:339b7abfa147 40
Osator 0:339b7abfa147 41 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~ LCD Control Register 0 ~|~|~|~|~|~|~|~|~|~|~|~|~*/
Osator 0:339b7abfa147 42 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/
Osator 0:339b7abfa147 43 #define _LCDINTENABLE (1)
Osator 0:339b7abfa147 44
Osator 0:339b7abfa147 45 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~ LCD Control Register 1 ~|~|~|~|~|~|~|~|~|~|~|~|~|*/
Osator 0:339b7abfa147 46 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/
Osator 0:339b7abfa147 47 #define _LCDFRAMEINTERRUPT (0) //0 Disable Frame Frequency Interrupt
Osator 0:339b7abfa147 48 //1 Enable an LCD interrupt that coincides with the LCD frame frequency
Osator 0:339b7abfa147 49 #define _LCDFULLCPLDIRIVE (0) // 0 GPIO shared with the LCD. Inputs levels and internal pullup reference to VDD
Osator 0:339b7abfa147 50 // 1 If VSUPPLY=11and RVEN=0. Inputs levels and internal pullup reference to VLL3
Osator 0:339b7abfa147 51 #define _LCDWAITMODE (0) // 0 Allows the LCD driver and charge pump to continue running during wait mode
Osator 0:339b7abfa147 52 // 1 Disable the LCD when the MCU goes into wait mode
Osator 0:339b7abfa147 53 #define _LCDSTOPMODE (0) // 0 Allows the LCD driver and charge pump to continue running during stop2 or stop3
Osator 0:339b7abfa147 54 // 1 Disable the LCD when and charge pump when the MCU goes into stop2 or stop3
Osator 0:339b7abfa147 55
Osator 0:339b7abfa147 56 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~ LCD Voltage Supply Register ~|~|~|~|~|~|~|~|~|~|~|~*/
Osator 0:339b7abfa147 57 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/
Osator 0:339b7abfa147 58 #define _LCDHIGHREF (0) //0 Divide input VIREG=1.0v
Osator 0:339b7abfa147 59 //1 Do not divide the input VIREG=1.67v
Osator 0:339b7abfa147 60 #define _LCDBBYPASS (0) //Determines whether the internal LCD op amp buffer is bypassed
Osator 0:339b7abfa147 61 //0 Buffered mode
Osator 0:339b7abfa147 62 //1 Unbuffered mode
Osator 0:339b7abfa147 63
Osator 0:339b7abfa147 64 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~ LCD Regulated Voltage Control |~|~|~|~|~|~|~|~|~|~*/
Osator 0:339b7abfa147 65 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/
Osator 0:339b7abfa147 66 #define _LCDCONTRAST (1) //Contrast by software 0 -- Disable 1-- Enable
Osator 0:339b7abfa147 67 #define _LVLCONTRAST (0) //Any number between 0 and 15, if the number is bigger the glass gets darker
Osator 0:339b7abfa147 68
Osator 0:339b7abfa147 69 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~ LCD Blink Control Register ~|~|~|~|~|~|~|~|~|~|~|~*/
Osator 0:339b7abfa147 70 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/
Osator 0:339b7abfa147 71 #define _LCDBLINKCONTROL (1) //0 Disable blink mode
Osator 0:339b7abfa147 72 //1 Enable blink mode
Osator 0:339b7abfa147 73 #define _LCDALTMODE (0) //0 Normal display
Osator 0:339b7abfa147 74 //1 Alternate display for 4 backplanes or less the LCD backplane sequencer changes to otuput an alternate display
Osator 0:339b7abfa147 75 #define _LCDBLANKDISP (0) //0 Do not blank display
Osator 0:339b7abfa147 76 //1 Blank display if you put it in 0 the text before blank is manteined
Osator 0:339b7abfa147 77 #define _LCDBLINKMODE (0) //0 Display blank during the blink period
Osator 0:339b7abfa147 78 //1 Display alternate displat during blink period (Ignored if duty is 5 or greater)
Osator 0:339b7abfa147 79
Osator 0:339b7abfa147 80
Osator 0:339b7abfa147 81 //Calculated values
Osator 0:339b7abfa147 82 #define _LCDUSEDPINS (_LCDFRONTPLANES + _LCDBACKPLANES)
Osator 0:339b7abfa147 83 #define _LCDDUTY (_LCDBACKPLANES-1) //Any number between 0 and 7
Osator 0:339b7abfa147 84 #define LCD_WF_BASE LCD->WF8B[0]
Osator 0:339b7abfa147 85
Osator 0:339b7abfa147 86 // General definitions used by the LCD library
Osator 0:339b7abfa147 87 #define LCD_WF(x) *((uint8 *)&LCD_WF_BASE + x)
Osator 0:339b7abfa147 88
Osator 0:339b7abfa147 89 /*LCD Fault Detections Consts*/
Osator 0:339b7abfa147 90 #define FP_TYPE 0x00 // pin is a Front Plane
Osator 0:339b7abfa147 91 #define BP_TYPE 0x80 // pin is Back Plane
Osator 0:339b7abfa147 92
Osator 0:339b7abfa147 93 // Fault Detect Preescaler Options
Osator 0:339b7abfa147 94 #define FDPRS_1 0
Osator 0:339b7abfa147 95 #define FDPRS_2 1
Osator 0:339b7abfa147 96 #define FDPRS_4 2
Osator 0:339b7abfa147 97 #define FDPRS_8 3
Osator 0:339b7abfa147 98 #define FDPRS_16 4
Osator 0:339b7abfa147 99 #define FDPRS_32 5
Osator 0:339b7abfa147 100 #define FDPRS_64 6
Osator 0:339b7abfa147 101 #define FDPRS_128 7
Osator 0:339b7abfa147 102
Osator 0:339b7abfa147 103 // Fault Detect Sample Window Width Values
Osator 0:339b7abfa147 104 #define FDSWW_4 0
Osator 0:339b7abfa147 105 #define FDSWW_8 1
Osator 0:339b7abfa147 106 #define FDSWW_16 2
Osator 0:339b7abfa147 107 #define FDSWW_32 3
Osator 0:339b7abfa147 108 #define FDSWW_64 4
Osator 0:339b7abfa147 109 #define FDSWW_128 5
Osator 0:339b7abfa147 110 #define FDSWW_256 6
Osator 0:339b7abfa147 111 #define FDSWW_512 7
Osator 0:339b7abfa147 112
Osator 0:339b7abfa147 113 /*
Osator 0:339b7abfa147 114 Mask Bit definitions used f
Osator 0:339b7abfa147 115 */
Osator 0:339b7abfa147 116 #define mBIT0 1
Osator 0:339b7abfa147 117 #define mBIT1 2
Osator 0:339b7abfa147 118 #define mBIT2 4
Osator 0:339b7abfa147 119 #define mBIT3 8
Osator 0:339b7abfa147 120 #define mBIT4 16
Osator 0:339b7abfa147 121 #define mBIT5 32
Osator 0:339b7abfa147 122 #define mBIT6 64
Osator 0:339b7abfa147 123 #define mBIT7 128
Osator 0:339b7abfa147 124 #define mBIT8 256
Osator 0:339b7abfa147 125 #define mBIT9 512
Osator 0:339b7abfa147 126 #define mBIT10 1024
Osator 0:339b7abfa147 127 #define mBIT11 2048
Osator 0:339b7abfa147 128 #define mBIT12 4096
Osator 0:339b7abfa147 129 #define mBIT13 8192
Osator 0:339b7abfa147 130 #define mBIT14 16384
Osator 0:339b7abfa147 131 #define mBIT15 32768
Osator 0:339b7abfa147 132 #define mBIT16 65536
Osator 0:339b7abfa147 133 #define mBIT17 131072
Osator 0:339b7abfa147 134 #define mBIT18 262144
Osator 0:339b7abfa147 135 #define mBIT19 524288
Osator 0:339b7abfa147 136 #define mBIT20 1048576
Osator 0:339b7abfa147 137 #define mBIT21 2097152
Osator 0:339b7abfa147 138 #define mBIT22 4194304
Osator 0:339b7abfa147 139 #define mBIT23 8388608
Osator 0:339b7abfa147 140 #define mBIT24 16777216
Osator 0:339b7abfa147 141 #define mBIT25 33554432
Osator 0:339b7abfa147 142 #define mBIT26 67108864
Osator 0:339b7abfa147 143 #define mBIT27 134217728
Osator 0:339b7abfa147 144 #define mBIT28 268435456
Osator 0:339b7abfa147 145 #define mBIT29 536870912
Osator 0:339b7abfa147 146 #define mBIT30 1073741824
Osator 0:339b7abfa147 147 #define mBIT31 2147483648
Osator 0:339b7abfa147 148
Osator 0:339b7abfa147 149 #define mBIT32 1
Osator 0:339b7abfa147 150 #define mBIT33 2
Osator 0:339b7abfa147 151 #define mBIT34 4
Osator 0:339b7abfa147 152 #define mBIT35 8
Osator 0:339b7abfa147 153 #define mBIT36 16
Osator 0:339b7abfa147 154 #define mBIT37 32
Osator 0:339b7abfa147 155 #define mBIT38 64
Osator 0:339b7abfa147 156 #define mBIT39 128
Osator 0:339b7abfa147 157 #define mBIT40 256
Osator 0:339b7abfa147 158 #define mBIT41 512
Osator 0:339b7abfa147 159 #define mBIT42 1024
Osator 0:339b7abfa147 160 #define mBIT43 2048
Osator 0:339b7abfa147 161 #define mBIT44 4096
Osator 0:339b7abfa147 162 #define mBIT45 8192
Osator 0:339b7abfa147 163 #define mBIT46 16384
Osator 0:339b7abfa147 164 #define mBIT47 32768
Osator 0:339b7abfa147 165 #define mBIT48 65536
Osator 0:339b7abfa147 166 #define mBIT49 131072
Osator 0:339b7abfa147 167 #define mBIT50 262144
Osator 0:339b7abfa147 168 #define mBIT51 524288
Osator 0:339b7abfa147 169 #define mBIT52 1048576
Osator 0:339b7abfa147 170 #define mBIT53 2097152
Osator 0:339b7abfa147 171 #define mBIT54 4194304
Osator 0:339b7abfa147 172 #define mBIT55 8388608
Osator 0:339b7abfa147 173 #define mBIT56 16777216
Osator 0:339b7abfa147 174 #define mBIT57 33554432
Osator 0:339b7abfa147 175 #define mBIT58 67108864
Osator 0:339b7abfa147 176 #define mBIT59 134217728
Osator 0:339b7abfa147 177 #define mBIT60 268435456
Osator 0:339b7abfa147 178 #define mBIT61 536870912
Osator 0:339b7abfa147 179 #define mBIT62 1073741824
Osator 0:339b7abfa147 180 #define mBIT63 2147483648
Osator 0:339b7abfa147 181
Osator 0:339b7abfa147 182
Osator 0:339b7abfa147 183