Piotr Woźniak / Mbed 2 deprecated KL46Z-Lab2_fullll

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Dependencies:   MAG3110 MMA8451Q SLCD- TSI USBDevice mbed

MMA8451Q/MMA8451Q.cpp@0:339b7abfa147, 2014-04-16 (annotated)

Committer:
Osator
Date:
Wed Apr 16 12:20:00 2014 +0000
Revision:
0:339b7abfa147
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Who changed what in which revision?

UserRevisionLine numberNew contents of line
Osator 0:339b7abfa147 1 /* Copyright (c) 2010-2011 mbed.org, MIT License
Osator 0:339b7abfa147 2 *
Osator 0:339b7abfa147 3 * Permission is hereby granted, free of charge, to any person obtaining a copy of this software
Osator 0:339b7abfa147 4 * and associated documentation files (the "Software"), to deal in the Software without
Osator 0:339b7abfa147 5 * restriction, including without limitation the rights to use, copy, modify, merge, publish,
Osator 0:339b7abfa147 6 * distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the
Osator 0:339b7abfa147 7 * Software is furnished to do so, subject to the following conditions:
Osator 0:339b7abfa147 8 *
Osator 0:339b7abfa147 9 * The above copyright notice and this permission notice shall be included in all copies or
Osator 0:339b7abfa147 10 * substantial portions of the Software.
Osator 0:339b7abfa147 11 *
Osator 0:339b7abfa147 12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
Osator 0:339b7abfa147 13 * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
Osator 0:339b7abfa147 14 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
Osator 0:339b7abfa147 15 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
Osator 0:339b7abfa147 16 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
Osator 0:339b7abfa147 17 */
Osator 0:339b7abfa147 18
Osator 0:339b7abfa147 19 #include "MMA8451Q.h"
Osator 0:339b7abfa147 20
Osator 0:339b7abfa147 21 #define INT_SOURCE 0x0C
Osator 0:339b7abfa147 22 #define REG_WHO_AM_I 0x0D
Osator 0:339b7abfa147 23 #define HP_FILTER_CUTOFF 0x0F
Osator 0:339b7abfa147 24 #define PULSE_CFG 0x21
Osator 0:339b7abfa147 25 #define PULSE_SRC 0x22
Osator 0:339b7abfa147 26 #define PULSE_THSX 0x23
Osator 0:339b7abfa147 27 #define PULSE_THSY 0x24
Osator 0:339b7abfa147 28 #define PULSE_THSZ 0x25
Osator 0:339b7abfa147 29 #define PULSE_TMLT 0x26
Osator 0:339b7abfa147 30 #define PULSE_LTCY 0x27
Osator 0:339b7abfa147 31 #define PULSE_WIND 0x28
Osator 0:339b7abfa147 32 #define REG_CTRL_REG_1 0x2A
Osator 0:339b7abfa147 33 #define CTRL_REG2 0x2B
Osator 0:339b7abfa147 34 #define CTRL_REG4 0x2D
Osator 0:339b7abfa147 35 #define CTRL_REG5 0x2E
Osator 0:339b7abfa147 36 #define REG_OUT_X_MSB 0x01
Osator 0:339b7abfa147 37 #define REG_OUT_Y_MSB 0x03
Osator 0:339b7abfa147 38 #define REG_OUT_Z_MSB 0x05
Osator 0:339b7abfa147 39
Osator 0:339b7abfa147 40 #define UINT14_MAX 16383
Osator 0:339b7abfa147 41
Osator 0:339b7abfa147 42 MMA8451Q::MMA8451Q(PinName sda, PinName scl, int addr) : m_i2c(sda, scl), m_addr(addr) {
Osator 0:339b7abfa147 43 // activate the peripheral
Osator 0:339b7abfa147 44 uint8_t data[2] = {REG_CTRL_REG_1, 0x01};
Osator 0:339b7abfa147 45 writeRegs(data, 2);
Osator 0:339b7abfa147 46 }
Osator 0:339b7abfa147 47
Osator 0:339b7abfa147 48 MMA8451Q::~MMA8451Q() { }
Osator 0:339b7abfa147 49
Osator 0:339b7abfa147 50 uint8_t MMA8451Q::getWhoAmI() {
Osator 0:339b7abfa147 51 uint8_t who_am_i = 0;
Osator 0:339b7abfa147 52 readRegs(REG_WHO_AM_I, &who_am_i, 1);
Osator 0:339b7abfa147 53 return who_am_i;
Osator 0:339b7abfa147 54 }
Osator 0:339b7abfa147 55
Osator 0:339b7abfa147 56 float MMA8451Q::getAccX() {
Osator 0:339b7abfa147 57 //divide by 4096 b/c MMA output is 4096 counts per g so this f outputs accelorometer value formatted to g (gravity)
Osator 0:339b7abfa147 58 return (float(getAccAxis(REG_OUT_X_MSB))/4096.0);
Osator 0:339b7abfa147 59 }
Osator 0:339b7abfa147 60
Osator 0:339b7abfa147 61 float MMA8451Q::getAccY() {
Osator 0:339b7abfa147 62 return (float(getAccAxis(REG_OUT_Y_MSB))/4096.0);
Osator 0:339b7abfa147 63 }
Osator 0:339b7abfa147 64
Osator 0:339b7abfa147 65 float MMA8451Q::getAccZ() {
Osator 0:339b7abfa147 66 return (float(getAccAxis(REG_OUT_Z_MSB))/4096.0);
Osator 0:339b7abfa147 67 }
Osator 0:339b7abfa147 68
Osator 0:339b7abfa147 69 void MMA8451Q::getAccAllAxis(float * res) {
Osator 0:339b7abfa147 70 res[0] = getAccX();
Osator 0:339b7abfa147 71 res[1] = getAccY();
Osator 0:339b7abfa147 72 res[2] = getAccZ();
Osator 0:339b7abfa147 73 }
Osator 0:339b7abfa147 74
Osator 0:339b7abfa147 75 int16_t MMA8451Q::getAccAxis(uint8_t addr) {
Osator 0:339b7abfa147 76 int16_t acc;
Osator 0:339b7abfa147 77 uint8_t res[2];
Osator 0:339b7abfa147 78 readRegs(addr, res, 2);
Osator 0:339b7abfa147 79
Osator 0:339b7abfa147 80 acc = (res[0] << 6) | (res[1] >> 2);
Osator 0:339b7abfa147 81 if (acc > UINT14_MAX/2)
Osator 0:339b7abfa147 82 acc -= UINT14_MAX;
Osator 0:339b7abfa147 83
Osator 0:339b7abfa147 84 return acc;
Osator 0:339b7abfa147 85 }
Osator 0:339b7abfa147 86
Osator 0:339b7abfa147 87 void MMA8451Q::setDoubleTap(void){
Osator 0:339b7abfa147 88 //Implemented directly from Freescale's AN4072
Osator 0:339b7abfa147 89 //Added to MMA8451Q lib
Osator 0:339b7abfa147 90
Osator 0:339b7abfa147 91 uint8_t CTRL_REG1_Data;
Osator 0:339b7abfa147 92 // int adds;
Osator 0:339b7abfa147 93 uint8_t data[2] = {REG_CTRL_REG_1, 0x08};
Osator 0:339b7abfa147 94
Osator 0:339b7abfa147 95 //400 Hz, Standby Mode
Osator 0:339b7abfa147 96 writeRegs(data,2);
Osator 0:339b7abfa147 97
Osator 0:339b7abfa147 98 //Enable X, Y and Z Double Pulse with DPA = 0 no double pulse abort
Osator 0:339b7abfa147 99 data[0]=PULSE_CFG;data[1]=0x2A;
Osator 0:339b7abfa147 100 writeRegs(data,2);
Osator 0:339b7abfa147 101
Osator 0:339b7abfa147 102 //SetThreshold 3g on X and Y and 5g on Z
Osator 0:339b7abfa147 103 //Note: Every step is 0.063g
Osator 0:339b7abfa147 104 //3 g/0.063g = 48 counts
Osator 0:339b7abfa147 105 //5g/0.063g = 79 counts
Osator 0:339b7abfa147 106 data[0]=PULSE_THSX;data[1]=0x30;
Osator 0:339b7abfa147 107 writeRegs(data,2);//Set X Threshold to 3g
Osator 0:339b7abfa147 108 data[0]=PULSE_THSY;data[1]=0x30;
Osator 0:339b7abfa147 109 writeRegs(data,2);//Set Y Threshold to 3g
Osator 0:339b7abfa147 110 data[0]=PULSE_THSZ;data[1]=0x4F;
Osator 0:339b7abfa147 111 writeRegs(data,2);//Set Z Threshold to 5g
Osator 0:339b7abfa147 112
Osator 0:339b7abfa147 113 //Set Time Limit for Tap Detection to 60 ms LP Mode
Osator 0:339b7abfa147 114 //Note: 400 Hz ODR, Time step is 1.25 ms per step
Osator 0:339b7abfa147 115 //60 ms/1.25 ms = 48 counts
Osator 0:339b7abfa147 116 data[0]=PULSE_TMLT;data[1]=0x30;
Osator 0:339b7abfa147 117 writeRegs(data,2);//60 ms
Osator 0:339b7abfa147 118
Osator 0:339b7abfa147 119 //Set Latency Time to 200 ms
Osator 0:339b7abfa147 120 //Note: 400 Hz ODR LPMode, Time step is 2.5 ms per step 00 ms/2.5 ms = 80 counts
Osator 0:339b7abfa147 121 data[0]=PULSE_LTCY;data[1]=0x50;
Osator 0:339b7abfa147 122 writeRegs(data,2);//200 ms
Osator 0:339b7abfa147 123
Osator 0:339b7abfa147 124 //Set Time Window for second tap to 300 ms
Osator 0:339b7abfa147 125 //Note: 400 Hz ODR LP Mode, Time step is 2.5 ms per step
Osator 0:339b7abfa147 126 //300 ms/2.5 ms = 120 counts
Osator 0:339b7abfa147 127 data[0]=PULSE_WIND;data[1]=0x78;
Osator 0:339b7abfa147 128 writeRegs(data,2);//300 ms
Osator 0:339b7abfa147 129
Osator 0:339b7abfa147 130 //Route INT1 to System Interrupt
Osator 0:339b7abfa147 131 data[0]=CTRL_REG4;data[1]=0x08;
Osator 0:339b7abfa147 132 writeRegs(data,2);//Enable Pulse Interrupt in System CTRL_REG4
Osator 0:339b7abfa147 133 data[0]=CTRL_REG5;data[1]=0x08;
Osator 0:339b7abfa147 134 writeRegs(data,2);//Route Pulse Interrupt to INT1 hardware Pin CTRL_REG5
Osator 0:339b7abfa147 135
Osator 0:339b7abfa147 136 //Set the device to Active Mode
Osator 0:339b7abfa147 137 readRegs(0x2A,&CTRL_REG1_Data,1);//Read out the contents of the register
Osator 0:339b7abfa147 138 CTRL_REG1_Data |= 0x01; //Change the value in the register to Active Mode.
Osator 0:339b7abfa147 139 data[0]=REG_CTRL_REG_1;
Osator 0:339b7abfa147 140 data[1]=CTRL_REG1_Data;
Osator 0:339b7abfa147 141 writeRegs(data,2);//Write in the updated value to put the device in Active Mode
Osator 0:339b7abfa147 142 }
Osator 0:339b7abfa147 143
Osator 0:339b7abfa147 144
Osator 0:339b7abfa147 145 void MMA8451Q::readRegs(int addr, uint8_t * data, int len) {
Osator 0:339b7abfa147 146 char t[1] = {addr};
Osator 0:339b7abfa147 147 m_i2c.write(m_addr, t, 1, true);
Osator 0:339b7abfa147 148 m_i2c.read(m_addr, (char *)data, len);
Osator 0:339b7abfa147 149 }
Osator 0:339b7abfa147 150
Osator 0:339b7abfa147 151
Osator 0:339b7abfa147 152
Osator 0:339b7abfa147 153 void MMA8451Q::writeRegs(uint8_t * data, int len) {
Osator 0:339b7abfa147 154 m_i2c.write(m_addr, (char *)data, len);
Osator 0:339b7abfa147 155 }