Egor Rumjantsev / mbed

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TARGET_LPC1347/PeripheralNames.h@64:e3affc9e7238, 2013-08-05 (annotated)

Committer:
bogdanm
Date:
Mon Aug 05 12:28:09 2013 +0300
Revision:
64:e3affc9e7238
Child:
66:9c8f0e3462fb
New build system structure, new target (LPC1347), bug fixes (I2C read/write errors, LPC11U24 memory map and others)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 64:e3affc9e7238 1 /* mbed Microcontroller Library
bogdanm 64:e3affc9e7238 2 * Copyright (c) 2006-2013 ARM Limited
bogdanm 64:e3affc9e7238 3 *
bogdanm 64:e3affc9e7238 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 64:e3affc9e7238 5 * you may not use this file except in compliance with the License.
bogdanm 64:e3affc9e7238 6 * You may obtain a copy of the License at
bogdanm 64:e3affc9e7238 7 *
bogdanm 64:e3affc9e7238 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 64:e3affc9e7238 9 *
bogdanm 64:e3affc9e7238 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 64:e3affc9e7238 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 64:e3affc9e7238 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 64:e3affc9e7238 13 * See the License for the specific language governing permissions and
bogdanm 64:e3affc9e7238 14 * limitations under the License.
bogdanm 64:e3affc9e7238 15 */
bogdanm 64:e3affc9e7238 16 #ifndef MBED_PERIPHERALNAMES_H
bogdanm 64:e3affc9e7238 17 #define MBED_PERIPHERALNAMES_H
bogdanm 64:e3affc9e7238 18
bogdanm 64:e3affc9e7238 19 #include "cmsis.h"
bogdanm 64:e3affc9e7238 20
bogdanm 64:e3affc9e7238 21 #ifdef __cplusplus
bogdanm 64:e3affc9e7238 22 extern "C" {
bogdanm 64:e3affc9e7238 23 #endif
bogdanm 64:e3affc9e7238 24
bogdanm 64:e3affc9e7238 25 typedef enum {
bogdanm 64:e3affc9e7238 26 UART_0 = (int)LPC_USART_BASE
bogdanm 64:e3affc9e7238 27 } UARTName;
bogdanm 64:e3affc9e7238 28
bogdanm 64:e3affc9e7238 29 typedef enum {
bogdanm 64:e3affc9e7238 30 I2C_0 = (int)LPC_I2C_BASE
bogdanm 64:e3affc9e7238 31 } I2CName;
bogdanm 64:e3affc9e7238 32
bogdanm 64:e3affc9e7238 33 typedef enum {
bogdanm 64:e3affc9e7238 34 ADC0_0 = 0,
bogdanm 64:e3affc9e7238 35 ADC0_1,
bogdanm 64:e3affc9e7238 36 ADC0_2,
bogdanm 64:e3affc9e7238 37 ADC0_3,
bogdanm 64:e3affc9e7238 38 ADC0_4,
bogdanm 64:e3affc9e7238 39 ADC0_5,
bogdanm 64:e3affc9e7238 40 ADC0_6,
bogdanm 64:e3affc9e7238 41 ADC0_7
bogdanm 64:e3affc9e7238 42 } ADCName;
bogdanm 64:e3affc9e7238 43
bogdanm 64:e3affc9e7238 44 typedef enum {
bogdanm 64:e3affc9e7238 45 SPI_0 = (int)LPC_SSP0_BASE,
bogdanm 64:e3affc9e7238 46 SPI_1 = (int)LPC_SSP1_BASE
bogdanm 64:e3affc9e7238 47 } SPIName;
bogdanm 64:e3affc9e7238 48
bogdanm 64:e3affc9e7238 49 typedef enum {
bogdanm 64:e3affc9e7238 50 PWM_1 = 0,
bogdanm 64:e3affc9e7238 51 PWM_2,
bogdanm 64:e3affc9e7238 52 PWM_3,
bogdanm 64:e3affc9e7238 53 PWM_4,
bogdanm 64:e3affc9e7238 54 PWM_5,
bogdanm 64:e3affc9e7238 55 PWM_6,
bogdanm 64:e3affc9e7238 56 PWM_7,
bogdanm 64:e3affc9e7238 57 PWM_8,
bogdanm 64:e3affc9e7238 58 PWM_9,
bogdanm 64:e3affc9e7238 59 PWM_10,
bogdanm 64:e3affc9e7238 60 PWM_11
bogdanm 64:e3affc9e7238 61 } PWMName;
bogdanm 64:e3affc9e7238 62
bogdanm 64:e3affc9e7238 63 #define STDIO_UART_TX UART_TX
bogdanm 64:e3affc9e7238 64 #define STDIO_UART_RX UART_RX
bogdanm 64:e3affc9e7238 65 #define STDIO_UART UART_0
bogdanm 64:e3affc9e7238 66
bogdanm 64:e3affc9e7238 67 #ifdef __cplusplus
bogdanm 64:e3affc9e7238 68 }
bogdanm 64:e3affc9e7238 69 #endif
bogdanm 64:e3affc9e7238 70
bogdanm 64:e3affc9e7238 71 #endif