Christian Lerche / Mbed 2 deprecated EA_DoorPlayer

EA BaseBoard, playing wav, PC see\'s SD-card through USB port.

Dependencies:   mbed

ChaNFSSD/SDFileSystem.cpp@0:fef366d2ed20, 2011-11-22 (annotated)

Committer:
Lerche
Date:
Tue Nov 22 05:45:58 2011 +0000
Revision:
0:fef366d2ed20
Thanks to those who provided EA_WavPlayer and USB_MSC

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Lerche 0:fef366d2ed20 1 /* mbed SDFileSystem Library, for providing file access to SD cards
Lerche 0:fef366d2ed20 2 * Copyright (c) 2008-2010, sford
Lerche 0:fef366d2ed20 3 *
Lerche 0:fef366d2ed20 4 * Permission is hereby granted, free of charge, to any person obtaining a copy
Lerche 0:fef366d2ed20 5 * of this software and associated documentation files (the "Software"), to deal
Lerche 0:fef366d2ed20 6 * in the Software without restriction, including without limitation the rights
Lerche 0:fef366d2ed20 7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
Lerche 0:fef366d2ed20 8 * copies of the Software, and to permit persons to whom the Software is
Lerche 0:fef366d2ed20 9 * furnished to do so, subject to the following conditions:
Lerche 0:fef366d2ed20 10 *
Lerche 0:fef366d2ed20 11 * The above copyright notice and this permission notice shall be included in
Lerche 0:fef366d2ed20 12 * all copies or substantial portions of the Software.
Lerche 0:fef366d2ed20 13 *
Lerche 0:fef366d2ed20 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
Lerche 0:fef366d2ed20 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
Lerche 0:fef366d2ed20 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
Lerche 0:fef366d2ed20 17 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
Lerche 0:fef366d2ed20 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
Lerche 0:fef366d2ed20 19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
Lerche 0:fef366d2ed20 20 * THE SOFTWARE.
Lerche 0:fef366d2ed20 21 */
Lerche 0:fef366d2ed20 22
Lerche 0:fef366d2ed20 23 /* Introduction
Lerche 0:fef366d2ed20 24 * ------------
Lerche 0:fef366d2ed20 25 * SD and MMC cards support a number of interfaces, but common to them all
Lerche 0:fef366d2ed20 26 * is one based on SPI. This is the one I'm implmenting because it means
Lerche 0:fef366d2ed20 27 * it is much more portable even though not so performant, and we already
Lerche 0:fef366d2ed20 28 * have the mbed SPI Interface!
Lerche 0:fef366d2ed20 29 *
Lerche 0:fef366d2ed20 30 * The main reference I'm using is Chapter 7, "SPI Mode" of:
Lerche 0:fef366d2ed20 31 * http://www.sdcard.org/developers/tech/sdcard/pls/Simplified_Physical_Layer_Spec.pdf
Lerche 0:fef366d2ed20 32 *
Lerche 0:fef366d2ed20 33 * SPI Startup
Lerche 0:fef366d2ed20 34 * -----------
Lerche 0:fef366d2ed20 35 * The SD card powers up in SD mode. The SPI interface mode is selected by
Lerche 0:fef366d2ed20 36 * asserting CS low and sending the reset command (CMD0). The card will
Lerche 0:fef366d2ed20 37 * respond with a (R1) response.
Lerche 0:fef366d2ed20 38 *
Lerche 0:fef366d2ed20 39 * CMD8 is optionally sent to determine the voltage range supported, and
Lerche 0:fef366d2ed20 40 * indirectly determine whether it is a version 1.x SD/non-SD card or
Lerche 0:fef366d2ed20 41 * version 2.x. I'll just ignore this for now.
Lerche 0:fef366d2ed20 42 *
Lerche 0:fef366d2ed20 43 * ACMD41 is repeatedly issued to initialise the card, until "in idle"
Lerche 0:fef366d2ed20 44 * (bit 0) of the R1 response goes to '0', indicating it is initialised.
Lerche 0:fef366d2ed20 45 *
Lerche 0:fef366d2ed20 46 * You should also indicate whether the host supports High Capicity cards,
Lerche 0:fef366d2ed20 47 * and check whether the card is high capacity - i'll also ignore this
Lerche 0:fef366d2ed20 48 *
Lerche 0:fef366d2ed20 49 * SPI Protocol
Lerche 0:fef366d2ed20 50 * ------------
Lerche 0:fef366d2ed20 51 * The SD SPI protocol is based on transactions made up of 8-bit words, with
Lerche 0:fef366d2ed20 52 * the host starting every bus transaction by asserting the CS signal low. The
Lerche 0:fef366d2ed20 53 * card always responds to commands, data blocks and errors.
Lerche 0:fef366d2ed20 54 *
Lerche 0:fef366d2ed20 55 * The protocol supports a CRC, but by default it is off (except for the
Lerche 0:fef366d2ed20 56 * first reset CMD0, where the CRC can just be pre-calculated, and CMD8)
Lerche 0:fef366d2ed20 57 * I'll leave the CRC off I think!
Lerche 0:fef366d2ed20 58 *
Lerche 0:fef366d2ed20 59 * Standard capacity cards have variable data block sizes, whereas High
Lerche 0:fef366d2ed20 60 * Capacity cards fix the size of data block to 512 bytes. I'll therefore
Lerche 0:fef366d2ed20 61 * just always use the Standard Capacity cards with a block size of 512 bytes.
Lerche 0:fef366d2ed20 62 * This is set with CMD16.
Lerche 0:fef366d2ed20 63 *
Lerche 0:fef366d2ed20 64 * You can read and write single blocks (CMD17, CMD25) or multiple blocks
Lerche 0:fef366d2ed20 65 * (CMD18, CMD25). For simplicity, I'll just use single block accesses. When
Lerche 0:fef366d2ed20 66 * the card gets a read command, it responds with a response token, and then
Lerche 0:fef366d2ed20 67 * a data token or an error.
Lerche 0:fef366d2ed20 68 *
Lerche 0:fef366d2ed20 69 * SPI Command Format
Lerche 0:fef366d2ed20 70 * ------------------
Lerche 0:fef366d2ed20 71 * Commands are 6-bytes long, containing the command, 32-bit argument, and CRC.
Lerche 0:fef366d2ed20 72 *
Lerche 0:fef366d2ed20 73 * +---------------+------------+------------+-----------+----------+--------------+
Lerche 0:fef366d2ed20 74 * | 01 | cmd[5:0] | arg[31:24] | arg[23:16] | arg[15:8] | arg[7:0] | crc[6:0] | 1 |
Lerche 0:fef366d2ed20 75 * +---------------+------------+------------+-----------+----------+--------------+
Lerche 0:fef366d2ed20 76 *
Lerche 0:fef366d2ed20 77 * As I'm not using CRC, I can fix that byte to what is needed for CMD0 (0x95)
Lerche 0:fef366d2ed20 78 *
Lerche 0:fef366d2ed20 79 * All Application Specific commands shall be preceded with APP_CMD (CMD55).
Lerche 0:fef366d2ed20 80 *
Lerche 0:fef366d2ed20 81 * SPI Response Format
Lerche 0:fef366d2ed20 82 * -------------------
Lerche 0:fef366d2ed20 83 * The main response format (R1) is a status byte (normally zero). Key flags:
Lerche 0:fef366d2ed20 84 * idle - 1 if the card is in an idle state/initialising
Lerche 0:fef366d2ed20 85 * cmd - 1 if an illegal command code was detected
Lerche 0:fef366d2ed20 86 *
Lerche 0:fef366d2ed20 87 * +-------------------------------------------------+
Lerche 0:fef366d2ed20 88 * R1 | 0 | arg | addr | seq | crc | cmd | erase | idle |
Lerche 0:fef366d2ed20 89 * +-------------------------------------------------+
Lerche 0:fef366d2ed20 90 *
Lerche 0:fef366d2ed20 91 * R1b is the same, except it is followed by a busy signal (zeros) until
Lerche 0:fef366d2ed20 92 * the first non-zero byte when it is ready again.
Lerche 0:fef366d2ed20 93 *
Lerche 0:fef366d2ed20 94 * Data Response Token
Lerche 0:fef366d2ed20 95 * -------------------
Lerche 0:fef366d2ed20 96 * Every data block written to the card is acknowledged by a byte
Lerche 0:fef366d2ed20 97 * response token
Lerche 0:fef366d2ed20 98 *
Lerche 0:fef366d2ed20 99 * +----------------------+
Lerche 0:fef366d2ed20 100 * | xxx | 0 | status | 1 |
Lerche 0:fef366d2ed20 101 * +----------------------+
Lerche 0:fef366d2ed20 102 * 010 - OK!
Lerche 0:fef366d2ed20 103 * 101 - CRC Error
Lerche 0:fef366d2ed20 104 * 110 - Write Error
Lerche 0:fef366d2ed20 105 *
Lerche 0:fef366d2ed20 106 * Single Block Read and Write
Lerche 0:fef366d2ed20 107 * ---------------------------
Lerche 0:fef366d2ed20 108 *
Lerche 0:fef366d2ed20 109 * Block transfers have a byte header, followed by the data, followed
Lerche 0:fef366d2ed20 110 * by a 16-bit CRC. In our case, the data will always be 512 bytes.
Lerche 0:fef366d2ed20 111 *
Lerche 0:fef366d2ed20 112 * +------+---------+---------+- - - -+---------+-----------+----------+
Lerche 0:fef366d2ed20 113 * | 0xFE | data[0] | data[1] | | data[n] | crc[15:8] | crc[7:0] |
Lerche 0:fef366d2ed20 114 * +------+---------+---------+- - - -+---------+-----------+----------+
Lerche 0:fef366d2ed20 115 */
Lerche 0:fef366d2ed20 116
Lerche 0:fef366d2ed20 117 #include "SDFileSystem.h"
Lerche 0:fef366d2ed20 118
Lerche 0:fef366d2ed20 119 #define SD_COMMAND_TIMEOUT 5000
Lerche 0:fef366d2ed20 120
Lerche 0:fef366d2ed20 121 SDFileSystem::SDFileSystem(PinName mosi, PinName miso, PinName sclk, PinName cs, const char* name) :
Lerche 0:fef366d2ed20 122 FATFileSystem(name), _spi(mosi, miso, sclk), _cs(cs) {
Lerche 0:fef366d2ed20 123 _cs = 1;
Lerche 0:fef366d2ed20 124 }
Lerche 0:fef366d2ed20 125
Lerche 0:fef366d2ed20 126 #define R1_IDLE_STATE (1 << 0)
Lerche 0:fef366d2ed20 127 #define R1_ERASE_RESET (1 << 1)
Lerche 0:fef366d2ed20 128 #define R1_ILLEGAL_COMMAND (1 << 2)
Lerche 0:fef366d2ed20 129 #define R1_COM_CRC_ERROR (1 << 3)
Lerche 0:fef366d2ed20 130 #define R1_ERASE_SEQUENCE_ERROR (1 << 4)
Lerche 0:fef366d2ed20 131 #define R1_ADDRESS_ERROR (1 << 5)
Lerche 0:fef366d2ed20 132 #define R1_PARAMETER_ERROR (1 << 6)
Lerche 0:fef366d2ed20 133
Lerche 0:fef366d2ed20 134 // Types
Lerche 0:fef366d2ed20 135 // - v1.x Standard Capacity
Lerche 0:fef366d2ed20 136 // - v2.x Standard Capacity
Lerche 0:fef366d2ed20 137 // - v2.x High Capacity
Lerche 0:fef366d2ed20 138 // - Not recognised as an SD Card
Lerche 0:fef366d2ed20 139
Lerche 0:fef366d2ed20 140 #define SDCARD_FAIL 0
Lerche 0:fef366d2ed20 141 #define SDCARD_V1 1
Lerche 0:fef366d2ed20 142 #define SDCARD_V2 2
Lerche 0:fef366d2ed20 143 #define SDCARD_V2HC 3
Lerche 0:fef366d2ed20 144
Lerche 0:fef366d2ed20 145 int SDFileSystem::initialise_card() {
Lerche 0:fef366d2ed20 146 // Set to 100kHz for initialisation, and clock card with cs = 1
Lerche 0:fef366d2ed20 147 _spi.frequency(100000);
Lerche 0:fef366d2ed20 148 _cs = 1;
Lerche 0:fef366d2ed20 149 for(int i=0; i<16; i++) {
Lerche 0:fef366d2ed20 150 _spi.write(0xFF);
Lerche 0:fef366d2ed20 151 }
Lerche 0:fef366d2ed20 152
Lerche 0:fef366d2ed20 153 // send CMD0, should return with all zeros except IDLE STATE set (bit 0)
Lerche 0:fef366d2ed20 154 if(_cmd(0, 0) != R1_IDLE_STATE) {
Lerche 0:fef366d2ed20 155 fprintf(stderr, "No disk, or could not put SD card in to SPI idle state\n");
Lerche 0:fef366d2ed20 156 return SDCARD_FAIL;
Lerche 0:fef366d2ed20 157 }
Lerche 0:fef366d2ed20 158
Lerche 0:fef366d2ed20 159 // send CMD8 to determine whther it is ver 2.x
Lerche 0:fef366d2ed20 160 int r = _cmd8();
Lerche 0:fef366d2ed20 161 if(r == R1_IDLE_STATE) {
Lerche 0:fef366d2ed20 162 return initialise_card_v2();
Lerche 0:fef366d2ed20 163 } else if(r == (R1_IDLE_STATE | R1_ILLEGAL_COMMAND)) {
Lerche 0:fef366d2ed20 164 return initialise_card_v1();
Lerche 0:fef366d2ed20 165 } else {
Lerche 0:fef366d2ed20 166 fprintf(stderr, "Not in idle state after sending CMD8 (not an SD card?)\n");
Lerche 0:fef366d2ed20 167 return SDCARD_FAIL;
Lerche 0:fef366d2ed20 168 }
Lerche 0:fef366d2ed20 169 }
Lerche 0:fef366d2ed20 170
Lerche 0:fef366d2ed20 171 int SDFileSystem::initialise_card_v1() {
Lerche 0:fef366d2ed20 172 for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
Lerche 0:fef366d2ed20 173 _cmd(55, 0);
Lerche 0:fef366d2ed20 174 if(_cmd(41, 0) == 0) {
Lerche 0:fef366d2ed20 175 return SDCARD_V1;
Lerche 0:fef366d2ed20 176 }
Lerche 0:fef366d2ed20 177 }
Lerche 0:fef366d2ed20 178
Lerche 0:fef366d2ed20 179 fprintf(stderr, "Timeout waiting for v1.x card\n");
Lerche 0:fef366d2ed20 180 return SDCARD_FAIL;
Lerche 0:fef366d2ed20 181 }
Lerche 0:fef366d2ed20 182
Lerche 0:fef366d2ed20 183 int SDFileSystem::initialise_card_v2() {
Lerche 0:fef366d2ed20 184
Lerche 0:fef366d2ed20 185 for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
Lerche 0:fef366d2ed20 186 _cmd(55, 0);
Lerche 0:fef366d2ed20 187 if(_cmd(41, 0) == 0) {
Lerche 0:fef366d2ed20 188 _cmd58();
Lerche 0:fef366d2ed20 189 return SDCARD_V2;
Lerche 0:fef366d2ed20 190 }
Lerche 0:fef366d2ed20 191 }
Lerche 0:fef366d2ed20 192
Lerche 0:fef366d2ed20 193 fprintf(stderr, "Timeout waiting for v2.x card\n");
Lerche 0:fef366d2ed20 194 return SDCARD_FAIL;
Lerche 0:fef366d2ed20 195 }
Lerche 0:fef366d2ed20 196
Lerche 0:fef366d2ed20 197 int SDFileSystem::disk_initialize() {
Lerche 0:fef366d2ed20 198
Lerche 0:fef366d2ed20 199 int i = initialise_card();
Lerche 0:fef366d2ed20 200 // printf("init card = %d\n", i);
Lerche 0:fef366d2ed20 201 // printf("OK\n");
Lerche 0:fef366d2ed20 202
Lerche 0:fef366d2ed20 203 _sectors = _sd_sectors();
Lerche 0:fef366d2ed20 204
Lerche 0:fef366d2ed20 205 // Set block length to 512 (CMD16)
Lerche 0:fef366d2ed20 206 if(_cmd(16, 512) != 0) {
Lerche 0:fef366d2ed20 207 fprintf(stderr, "Set 512-byte block timed out\n");
Lerche 0:fef366d2ed20 208 return 1;
Lerche 0:fef366d2ed20 209 }
Lerche 0:fef366d2ed20 210
Lerche 0:fef366d2ed20 211 _spi.frequency(1000000); // Set to 1MHz for data transfer
Lerche 0:fef366d2ed20 212 return 0;
Lerche 0:fef366d2ed20 213 }
Lerche 0:fef366d2ed20 214
Lerche 0:fef366d2ed20 215 int SDFileSystem::disk_write(const char *buffer, int block_number) {
Lerche 0:fef366d2ed20 216 // set write address for single block (CMD24)
Lerche 0:fef366d2ed20 217 if(_cmd(24, block_number * 512) != 0) {
Lerche 0:fef366d2ed20 218 return 1;
Lerche 0:fef366d2ed20 219 }
Lerche 0:fef366d2ed20 220
Lerche 0:fef366d2ed20 221 // send the data block
Lerche 0:fef366d2ed20 222 _write(buffer, 512);
Lerche 0:fef366d2ed20 223 return 0;
Lerche 0:fef366d2ed20 224 }
Lerche 0:fef366d2ed20 225
Lerche 0:fef366d2ed20 226 int SDFileSystem::disk_read(char *buffer, int block_number) {
Lerche 0:fef366d2ed20 227 // set read address for single block (CMD17)
Lerche 0:fef366d2ed20 228 if(_cmd(17, block_number * 512) != 0) {
Lerche 0:fef366d2ed20 229 return 1;
Lerche 0:fef366d2ed20 230 }
Lerche 0:fef366d2ed20 231
Lerche 0:fef366d2ed20 232 // receive the data
Lerche 0:fef366d2ed20 233 _read(buffer, 512);
Lerche 0:fef366d2ed20 234 return 0;
Lerche 0:fef366d2ed20 235 }
Lerche 0:fef366d2ed20 236
Lerche 0:fef366d2ed20 237 int SDFileSystem::disk_status() { return 0; }
Lerche 0:fef366d2ed20 238 int SDFileSystem::disk_sync() { return 0; }
Lerche 0:fef366d2ed20 239 int SDFileSystem::disk_sectors() { return _sectors; }
Lerche 0:fef366d2ed20 240
Lerche 0:fef366d2ed20 241 // PRIVATE FUNCTIONS
Lerche 0:fef366d2ed20 242
Lerche 0:fef366d2ed20 243 int SDFileSystem::_cmd(int cmd, int arg) {
Lerche 0:fef366d2ed20 244 _cs = 0;
Lerche 0:fef366d2ed20 245
Lerche 0:fef366d2ed20 246 // send a command
Lerche 0:fef366d2ed20 247 _spi.write(0x40 | cmd);
Lerche 0:fef366d2ed20 248 _spi.write(arg >> 24);
Lerche 0:fef366d2ed20 249 _spi.write(arg >> 16);
Lerche 0:fef366d2ed20 250 _spi.write(arg >> 8);
Lerche 0:fef366d2ed20 251 _spi.write(arg >> 0);
Lerche 0:fef366d2ed20 252 _spi.write(0x95);
Lerche 0:fef366d2ed20 253
Lerche 0:fef366d2ed20 254 // wait for the repsonse (response[7] == 0)
Lerche 0:fef366d2ed20 255 for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
Lerche 0:fef366d2ed20 256 int response = _spi.write(0xFF);
Lerche 0:fef366d2ed20 257 if(!(response & 0x80)) {
Lerche 0:fef366d2ed20 258 _cs = 1;
Lerche 0:fef366d2ed20 259 _spi.write(0xFF);
Lerche 0:fef366d2ed20 260 return response;
Lerche 0:fef366d2ed20 261 }
Lerche 0:fef366d2ed20 262 }
Lerche 0:fef366d2ed20 263 _cs = 1;
Lerche 0:fef366d2ed20 264 _spi.write(0xFF);
Lerche 0:fef366d2ed20 265 return -1; // timeout
Lerche 0:fef366d2ed20 266 }
Lerche 0:fef366d2ed20 267 int SDFileSystem::_cmdx(int cmd, int arg) {
Lerche 0:fef366d2ed20 268 _cs = 0;
Lerche 0:fef366d2ed20 269
Lerche 0:fef366d2ed20 270 // send a command
Lerche 0:fef366d2ed20 271 _spi.write(0x40 | cmd);
Lerche 0:fef366d2ed20 272 _spi.write(arg >> 24);
Lerche 0:fef366d2ed20 273 _spi.write(arg >> 16);
Lerche 0:fef366d2ed20 274 _spi.write(arg >> 8);
Lerche 0:fef366d2ed20 275 _spi.write(arg >> 0);
Lerche 0:fef366d2ed20 276 _spi.write(0x95);
Lerche 0:fef366d2ed20 277
Lerche 0:fef366d2ed20 278 // wait for the repsonse (response[7] == 0)
Lerche 0:fef366d2ed20 279 for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
Lerche 0:fef366d2ed20 280 int response = _spi.write(0xFF);
Lerche 0:fef366d2ed20 281 if(!(response & 0x80)) {
Lerche 0:fef366d2ed20 282 return response;
Lerche 0:fef366d2ed20 283 }
Lerche 0:fef366d2ed20 284 }
Lerche 0:fef366d2ed20 285 _cs = 1;
Lerche 0:fef366d2ed20 286 _spi.write(0xFF);
Lerche 0:fef366d2ed20 287 return -1; // timeout
Lerche 0:fef366d2ed20 288 }
Lerche 0:fef366d2ed20 289
Lerche 0:fef366d2ed20 290
Lerche 0:fef366d2ed20 291 int SDFileSystem::_cmd58() {
Lerche 0:fef366d2ed20 292 _cs = 0;
Lerche 0:fef366d2ed20 293 int arg = 0;
Lerche 0:fef366d2ed20 294
Lerche 0:fef366d2ed20 295 // send a command
Lerche 0:fef366d2ed20 296 _spi.write(0x40 | 58);
Lerche 0:fef366d2ed20 297 _spi.write(arg >> 24);
Lerche 0:fef366d2ed20 298 _spi.write(arg >> 16);
Lerche 0:fef366d2ed20 299 _spi.write(arg >> 8);
Lerche 0:fef366d2ed20 300 _spi.write(arg >> 0);
Lerche 0:fef366d2ed20 301 _spi.write(0x95);
Lerche 0:fef366d2ed20 302
Lerche 0:fef366d2ed20 303 // wait for the repsonse (response[7] == 0)
Lerche 0:fef366d2ed20 304 for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
Lerche 0:fef366d2ed20 305 int response = _spi.write(0xFF);
Lerche 0:fef366d2ed20 306 if(!(response & 0x80)) {
Lerche 0:fef366d2ed20 307 int ocr = _spi.write(0xFF) << 24;
Lerche 0:fef366d2ed20 308 ocr |= _spi.write(0xFF) << 16;
Lerche 0:fef366d2ed20 309 ocr |= _spi.write(0xFF) << 8;
Lerche 0:fef366d2ed20 310 ocr |= _spi.write(0xFF) << 0;
Lerche 0:fef366d2ed20 311 // printf("OCR = 0x%08X\n", ocr);
Lerche 0:fef366d2ed20 312 _cs = 1;
Lerche 0:fef366d2ed20 313 _spi.write(0xFF);
Lerche 0:fef366d2ed20 314 return response;
Lerche 0:fef366d2ed20 315 }
Lerche 0:fef366d2ed20 316 }
Lerche 0:fef366d2ed20 317 _cs = 1;
Lerche 0:fef366d2ed20 318 _spi.write(0xFF);
Lerche 0:fef366d2ed20 319 return -1; // timeout
Lerche 0:fef366d2ed20 320 }
Lerche 0:fef366d2ed20 321
Lerche 0:fef366d2ed20 322 int SDFileSystem::_cmd8() {
Lerche 0:fef366d2ed20 323 _cs = 0;
Lerche 0:fef366d2ed20 324
Lerche 0:fef366d2ed20 325 // send a command
Lerche 0:fef366d2ed20 326 _spi.write(0x40 | 8); // CMD8
Lerche 0:fef366d2ed20 327 _spi.write(0x00); // reserved
Lerche 0:fef366d2ed20 328 _spi.write(0x00); // reserved
Lerche 0:fef366d2ed20 329 _spi.write(0x01); // 3.3v
Lerche 0:fef366d2ed20 330 _spi.write(0xAA); // check pattern
Lerche 0:fef366d2ed20 331 _spi.write(0x87); // crc
Lerche 0:fef366d2ed20 332
Lerche 0:fef366d2ed20 333 // wait for the repsonse (response[7] == 0)
Lerche 0:fef366d2ed20 334 for(int i=0; i<SD_COMMAND_TIMEOUT * 1000; i++) {
Lerche 0:fef366d2ed20 335 char response[5];
Lerche 0:fef366d2ed20 336 response[0] = _spi.write(0xFF);
Lerche 0:fef366d2ed20 337 if(!(response[0] & 0x80)) {
Lerche 0:fef366d2ed20 338 for(int j=1; j<5; j++) {
Lerche 0:fef366d2ed20 339 response[i] = _spi.write(0xFF);
Lerche 0:fef366d2ed20 340 }
Lerche 0:fef366d2ed20 341 _cs = 1;
Lerche 0:fef366d2ed20 342 _spi.write(0xFF);
Lerche 0:fef366d2ed20 343 return response[0];
Lerche 0:fef366d2ed20 344 }
Lerche 0:fef366d2ed20 345 }
Lerche 0:fef366d2ed20 346 _cs = 1;
Lerche 0:fef366d2ed20 347 _spi.write(0xFF);
Lerche 0:fef366d2ed20 348 return -1; // timeout
Lerche 0:fef366d2ed20 349 }
Lerche 0:fef366d2ed20 350
Lerche 0:fef366d2ed20 351 int SDFileSystem::_read(char *buffer, int length) {
Lerche 0:fef366d2ed20 352 _cs = 0;
Lerche 0:fef366d2ed20 353
Lerche 0:fef366d2ed20 354 // read until start byte (0xFF)
Lerche 0:fef366d2ed20 355 while(_spi.write(0xFF) != 0xFE);
Lerche 0:fef366d2ed20 356
Lerche 0:fef366d2ed20 357 // read data
Lerche 0:fef366d2ed20 358 for(int i=0; i<length; i++) {
Lerche 0:fef366d2ed20 359 buffer[i] = _spi.write(0xFF);
Lerche 0:fef366d2ed20 360 }
Lerche 0:fef366d2ed20 361 _spi.write(0xFF); // checksum
Lerche 0:fef366d2ed20 362 _spi.write(0xFF);
Lerche 0:fef366d2ed20 363
Lerche 0:fef366d2ed20 364 _cs = 1;
Lerche 0:fef366d2ed20 365 _spi.write(0xFF);
Lerche 0:fef366d2ed20 366 return 0;
Lerche 0:fef366d2ed20 367 }
Lerche 0:fef366d2ed20 368
Lerche 0:fef366d2ed20 369 int SDFileSystem::_write(const char *buffer, int length) {
Lerche 0:fef366d2ed20 370 _cs = 0;
Lerche 0:fef366d2ed20 371
Lerche 0:fef366d2ed20 372 // indicate start of block
Lerche 0:fef366d2ed20 373 _spi.write(0xFE);
Lerche 0:fef366d2ed20 374
Lerche 0:fef366d2ed20 375 // write the data
Lerche 0:fef366d2ed20 376 for(int i=0; i<length; i++) {
Lerche 0:fef366d2ed20 377 _spi.write(buffer[i]);
Lerche 0:fef366d2ed20 378 }
Lerche 0:fef366d2ed20 379
Lerche 0:fef366d2ed20 380 // write the checksum
Lerche 0:fef366d2ed20 381 _spi.write(0xFF);
Lerche 0:fef366d2ed20 382 _spi.write(0xFF);
Lerche 0:fef366d2ed20 383
Lerche 0:fef366d2ed20 384 // check the repsonse token
Lerche 0:fef366d2ed20 385 if((_spi.write(0xFF) & 0x1F) != 0x05) {
Lerche 0:fef366d2ed20 386 _cs = 1;
Lerche 0:fef366d2ed20 387 _spi.write(0xFF);
Lerche 0:fef366d2ed20 388 return 1;
Lerche 0:fef366d2ed20 389 }
Lerche 0:fef366d2ed20 390
Lerche 0:fef366d2ed20 391 // wait for write to finish
Lerche 0:fef366d2ed20 392 while(_spi.write(0xFF) == 0);
Lerche 0:fef366d2ed20 393
Lerche 0:fef366d2ed20 394 _cs = 1;
Lerche 0:fef366d2ed20 395 _spi.write(0xFF);
Lerche 0:fef366d2ed20 396 return 0;
Lerche 0:fef366d2ed20 397 }
Lerche 0:fef366d2ed20 398
Lerche 0:fef366d2ed20 399 static int ext_bits(char *data, int msb, int lsb) {
Lerche 0:fef366d2ed20 400 int bits = 0;
Lerche 0:fef366d2ed20 401 int size = 1 + msb - lsb;
Lerche 0:fef366d2ed20 402 for(int i=0; i<size; i++) {
Lerche 0:fef366d2ed20 403 int position = lsb + i;
Lerche 0:fef366d2ed20 404 int byte = 15 - (position >> 3);
Lerche 0:fef366d2ed20 405 int bit = position & 0x7;
Lerche 0:fef366d2ed20 406 int value = (data[byte] >> bit) & 1;
Lerche 0:fef366d2ed20 407 bits |= value << i;
Lerche 0:fef366d2ed20 408 }
Lerche 0:fef366d2ed20 409 return bits;
Lerche 0:fef366d2ed20 410 }
Lerche 0:fef366d2ed20 411
Lerche 0:fef366d2ed20 412 int SDFileSystem::_sd_sectors() {
Lerche 0:fef366d2ed20 413
Lerche 0:fef366d2ed20 414 // CMD9, Response R2 (R1 byte + 16-byte block read)
Lerche 0:fef366d2ed20 415 if(_cmdx(9, 0) != 0) {
Lerche 0:fef366d2ed20 416 fprintf(stderr, "Didn't get a response from the disk\n");
Lerche 0:fef366d2ed20 417 return 0;
Lerche 0:fef366d2ed20 418 }
Lerche 0:fef366d2ed20 419
Lerche 0:fef366d2ed20 420 char csd[16];
Lerche 0:fef366d2ed20 421 if(_read(csd, 16) != 0) {
Lerche 0:fef366d2ed20 422 fprintf(stderr, "Couldn't read csd response from disk\n");
Lerche 0:fef366d2ed20 423 return 0;
Lerche 0:fef366d2ed20 424 }
Lerche 0:fef366d2ed20 425
Lerche 0:fef366d2ed20 426 // csd_structure : csd[127:126]
Lerche 0:fef366d2ed20 427 // c_size : csd[73:62]
Lerche 0:fef366d2ed20 428 // c_size_mult : csd[49:47]
Lerche 0:fef366d2ed20 429 // read_bl_len : csd[83:80] - the *maximum* read block length
Lerche 0:fef366d2ed20 430
Lerche 0:fef366d2ed20 431 int csd_structure = ext_bits(csd, 127, 126);
Lerche 0:fef366d2ed20 432 int c_size = ext_bits(csd, 73, 62);
Lerche 0:fef366d2ed20 433 int c_size_mult = ext_bits(csd, 49, 47);
Lerche 0:fef366d2ed20 434 int read_bl_len = ext_bits(csd, 83, 80);
Lerche 0:fef366d2ed20 435
Lerche 0:fef366d2ed20 436 // printf("CSD_STRUCT = %d\n", csd_structure);
Lerche 0:fef366d2ed20 437
Lerche 0:fef366d2ed20 438 if(csd_structure != 0) {
Lerche 0:fef366d2ed20 439 fprintf(stderr, "This disk tastes funny! I only know about type 0 CSD structures\n");
Lerche 0:fef366d2ed20 440 return 0;
Lerche 0:fef366d2ed20 441 }
Lerche 0:fef366d2ed20 442
Lerche 0:fef366d2ed20 443 // memory capacity = BLOCKNR * BLOCK_LEN
Lerche 0:fef366d2ed20 444 // where
Lerche 0:fef366d2ed20 445 // BLOCKNR = (C_SIZE+1) * MULT
Lerche 0:fef366d2ed20 446 // MULT = 2^(C_SIZE_MULT+2) (C_SIZE_MULT < 8)
Lerche 0:fef366d2ed20 447 // BLOCK_LEN = 2^READ_BL_LEN, (READ_BL_LEN < 12)
Lerche 0:fef366d2ed20 448
Lerche 0:fef366d2ed20 449 int block_len = 1 << read_bl_len;
Lerche 0:fef366d2ed20 450 int mult = 1 << (c_size_mult + 2);
Lerche 0:fef366d2ed20 451 int blocknr = (c_size + 1) * mult;
Lerche 0:fef366d2ed20 452 int capacity = blocknr * block_len;
Lerche 0:fef366d2ed20 453
Lerche 0:fef366d2ed20 454 int blocks = capacity / 512;
Lerche 0:fef366d2ed20 455
Lerche 0:fef366d2ed20 456 return blocks;
Lerche 0:fef366d2ed20 457 }