CK Sin / Mbed 2 deprecated Ethernetwebsocket

Ethernetwebsoc

Dependencies:   C12832_lcd LM75B WebSocketClient mbed-rtos mbed Socket lwip-eth lwip-sys lwip

mbed-rtos/rtx/rt_HAL_CM.h@0:0ed2a7c7190c, 2013-05-31 (annotated)

Committer:
GordonSin
Date:
Fri May 31 04:09:54 2013 +0000
Revision:
0:0ed2a7c7190c
31/5/2013;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
GordonSin 0:0ed2a7c7190c 1 /*----------------------------------------------------------------------------
GordonSin 0:0ed2a7c7190c 2 * RL-ARM - RTX
GordonSin 0:0ed2a7c7190c 3 *----------------------------------------------------------------------------
GordonSin 0:0ed2a7c7190c 4 * Name: RT_HAL_CM.H
GordonSin 0:0ed2a7c7190c 5 * Purpose: Hardware Abstraction Layer for Cortex-M definitions
GordonSin 0:0ed2a7c7190c 6 * Rev.: V4.50
GordonSin 0:0ed2a7c7190c 7 *----------------------------------------------------------------------------
GordonSin 0:0ed2a7c7190c 8 *
GordonSin 0:0ed2a7c7190c 9 * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
GordonSin 0:0ed2a7c7190c 10 * All rights reserved.
GordonSin 0:0ed2a7c7190c 11 * Redistribution and use in source and binary forms, with or without
GordonSin 0:0ed2a7c7190c 12 * modification, are permitted provided that the following conditions are met:
GordonSin 0:0ed2a7c7190c 13 * - Redistributions of source code must retain the above copyright
GordonSin 0:0ed2a7c7190c 14 * notice, this list of conditions and the following disclaimer.
GordonSin 0:0ed2a7c7190c 15 * - Redistributions in binary form must reproduce the above copyright
GordonSin 0:0ed2a7c7190c 16 * notice, this list of conditions and the following disclaimer in the
GordonSin 0:0ed2a7c7190c 17 * documentation and/or other materials provided with the distribution.
GordonSin 0:0ed2a7c7190c 18 * - Neither the name of ARM nor the names of its contributors may be used
GordonSin 0:0ed2a7c7190c 19 * to endorse or promote products derived from this software without
GordonSin 0:0ed2a7c7190c 20 * specific prior written permission.
GordonSin 0:0ed2a7c7190c 21 *
GordonSin 0:0ed2a7c7190c 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
GordonSin 0:0ed2a7c7190c 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
GordonSin 0:0ed2a7c7190c 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
GordonSin 0:0ed2a7c7190c 25 * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
GordonSin 0:0ed2a7c7190c 26 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
GordonSin 0:0ed2a7c7190c 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
GordonSin 0:0ed2a7c7190c 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
GordonSin 0:0ed2a7c7190c 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
GordonSin 0:0ed2a7c7190c 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
GordonSin 0:0ed2a7c7190c 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
GordonSin 0:0ed2a7c7190c 32 * POSSIBILITY OF SUCH DAMAGE.
GordonSin 0:0ed2a7c7190c 33 *---------------------------------------------------------------------------*/
GordonSin 0:0ed2a7c7190c 34
GordonSin 0:0ed2a7c7190c 35 /* Definitions */
GordonSin 0:0ed2a7c7190c 36 #define INITIAL_xPSR 0x01000000
GordonSin 0:0ed2a7c7190c 37 #define DEMCR_TRCENA 0x01000000
GordonSin 0:0ed2a7c7190c 38 #define ITM_ITMENA 0x00000001
GordonSin 0:0ed2a7c7190c 39 #define MAGIC_WORD 0xE25A2EA5
GordonSin 0:0ed2a7c7190c 40
GordonSin 0:0ed2a7c7190c 41 #if defined (__CC_ARM) /* ARM Compiler */
GordonSin 0:0ed2a7c7190c 42
GordonSin 0:0ed2a7c7190c 43 #if ((__TARGET_ARCH_7_M || __TARGET_ARCH_7E_M) && !NO_EXCLUSIVE_ACCESS)
GordonSin 0:0ed2a7c7190c 44 #define __USE_EXCLUSIVE_ACCESS
GordonSin 0:0ed2a7c7190c 45 #else
GordonSin 0:0ed2a7c7190c 46 #undef __USE_EXCLUSIVE_ACCESS
GordonSin 0:0ed2a7c7190c 47 #endif
GordonSin 0:0ed2a7c7190c 48
GordonSin 0:0ed2a7c7190c 49 #elif defined (__GNUC__) /* GNU Compiler */
GordonSin 0:0ed2a7c7190c 50
GordonSin 0:0ed2a7c7190c 51 #undef __USE_EXCLUSIVE_ACCESS
GordonSin 0:0ed2a7c7190c 52
GordonSin 0:0ed2a7c7190c 53 #if defined (__CORTEX_M0)
GordonSin 0:0ed2a7c7190c 54 #define __TARGET_ARCH_6S_M 1
GordonSin 0:0ed2a7c7190c 55 #else
GordonSin 0:0ed2a7c7190c 56 #define __TARGET_ARCH_6S_M 0
GordonSin 0:0ed2a7c7190c 57 #endif
GordonSin 0:0ed2a7c7190c 58
GordonSin 0:0ed2a7c7190c 59 #if defined (__VFP_FP__) && !defined(__SOFTFP__)
GordonSin 0:0ed2a7c7190c 60 #define __TARGET_FPU_VFP 1
GordonSin 0:0ed2a7c7190c 61 #else
GordonSin 0:0ed2a7c7190c 62 #define __TARGET_FPU_VFP 0
GordonSin 0:0ed2a7c7190c 63 #endif
GordonSin 0:0ed2a7c7190c 64
GordonSin 0:0ed2a7c7190c 65 #define __inline inline
GordonSin 0:0ed2a7c7190c 66 #define __weak __attribute__((weak))
GordonSin 0:0ed2a7c7190c 67
GordonSin 0:0ed2a7c7190c 68 #ifndef __CMSIS_GENERIC
GordonSin 0:0ed2a7c7190c 69
GordonSin 0:0ed2a7c7190c 70 __attribute__((always_inline)) static inline void __enable_irq(void)
GordonSin 0:0ed2a7c7190c 71 {
GordonSin 0:0ed2a7c7190c 72 __asm volatile ("cpsie i");
GordonSin 0:0ed2a7c7190c 73 }
GordonSin 0:0ed2a7c7190c 74
GordonSin 0:0ed2a7c7190c 75 __attribute__((always_inline)) static inline U32 __disable_irq(void)
GordonSin 0:0ed2a7c7190c 76 {
GordonSin 0:0ed2a7c7190c 77 U32 result;
GordonSin 0:0ed2a7c7190c 78
GordonSin 0:0ed2a7c7190c 79 __asm volatile ("mrs %0, primask" : "=r" (result));
GordonSin 0:0ed2a7c7190c 80 __asm volatile ("cpsid i");
GordonSin 0:0ed2a7c7190c 81 return(result & 1);
GordonSin 0:0ed2a7c7190c 82 }
GordonSin 0:0ed2a7c7190c 83
GordonSin 0:0ed2a7c7190c 84 #endif
GordonSin 0:0ed2a7c7190c 85
GordonSin 0:0ed2a7c7190c 86 __attribute__(( always_inline)) static inline U8 __clz(U32 value)
GordonSin 0:0ed2a7c7190c 87 {
GordonSin 0:0ed2a7c7190c 88 U8 result;
GordonSin 0:0ed2a7c7190c 89
GordonSin 0:0ed2a7c7190c 90 __asm volatile ("clz %0, %1" : "=r" (result) : "r" (value));
GordonSin 0:0ed2a7c7190c 91 return(result);
GordonSin 0:0ed2a7c7190c 92 }
GordonSin 0:0ed2a7c7190c 93
GordonSin 0:0ed2a7c7190c 94 #elif defined (__ICCARM__) /* IAR Compiler */
GordonSin 0:0ed2a7c7190c 95
GordonSin 0:0ed2a7c7190c 96 #undef __USE_EXCLUSIVE_ACCESS
GordonSin 0:0ed2a7c7190c 97
GordonSin 0:0ed2a7c7190c 98 #if (__CORE__ == __ARM6M__)
GordonSin 0:0ed2a7c7190c 99 #define __TARGET_ARCH_6S_M 1
GordonSin 0:0ed2a7c7190c 100 #else
GordonSin 0:0ed2a7c7190c 101 #define __TARGET_ARCH_6S_M 0
GordonSin 0:0ed2a7c7190c 102 #endif
GordonSin 0:0ed2a7c7190c 103
GordonSin 0:0ed2a7c7190c 104 #if defined __ARMVFP__
GordonSin 0:0ed2a7c7190c 105 #define __TARGET_FPU_VFP 1
GordonSin 0:0ed2a7c7190c 106 #else
GordonSin 0:0ed2a7c7190c 107 #define __TARGET_FPU_VFP 0
GordonSin 0:0ed2a7c7190c 108 #endif
GordonSin 0:0ed2a7c7190c 109
GordonSin 0:0ed2a7c7190c 110 #define __inline inline
GordonSin 0:0ed2a7c7190c 111
GordonSin 0:0ed2a7c7190c 112 #ifndef __CMSIS_GENERIC
GordonSin 0:0ed2a7c7190c 113
GordonSin 0:0ed2a7c7190c 114 static inline void __enable_irq(void)
GordonSin 0:0ed2a7c7190c 115 {
GordonSin 0:0ed2a7c7190c 116 __asm volatile ("cpsie i");
GordonSin 0:0ed2a7c7190c 117 }
GordonSin 0:0ed2a7c7190c 118
GordonSin 0:0ed2a7c7190c 119 static inline U32 __disable_irq(void)
GordonSin 0:0ed2a7c7190c 120 {
GordonSin 0:0ed2a7c7190c 121 U32 result;
GordonSin 0:0ed2a7c7190c 122
GordonSin 0:0ed2a7c7190c 123 __asm volatile ("mrs %0, primask" : "=r" (result));
GordonSin 0:0ed2a7c7190c 124 __asm volatile ("cpsid i");
GordonSin 0:0ed2a7c7190c 125 return(result & 1);
GordonSin 0:0ed2a7c7190c 126 }
GordonSin 0:0ed2a7c7190c 127
GordonSin 0:0ed2a7c7190c 128 #endif
GordonSin 0:0ed2a7c7190c 129
GordonSin 0:0ed2a7c7190c 130 static inline U8 __clz(U32 value)
GordonSin 0:0ed2a7c7190c 131 {
GordonSin 0:0ed2a7c7190c 132 U8 result;
GordonSin 0:0ed2a7c7190c 133
GordonSin 0:0ed2a7c7190c 134 __asm volatile ("clz %0, %1" : "=r" (result) : "r" (value));
GordonSin 0:0ed2a7c7190c 135 return(result);
GordonSin 0:0ed2a7c7190c 136 }
GordonSin 0:0ed2a7c7190c 137
GordonSin 0:0ed2a7c7190c 138 #endif
GordonSin 0:0ed2a7c7190c 139
GordonSin 0:0ed2a7c7190c 140 /* NVIC registers */
GordonSin 0:0ed2a7c7190c 141 #define NVIC_ST_CTRL (*((volatile U32 *)0xE000E010))
GordonSin 0:0ed2a7c7190c 142 #define NVIC_ST_RELOAD (*((volatile U32 *)0xE000E014))
GordonSin 0:0ed2a7c7190c 143 #define NVIC_ST_CURRENT (*((volatile U32 *)0xE000E018))
GordonSin 0:0ed2a7c7190c 144 #define NVIC_ISER ((volatile U32 *)0xE000E100)
GordonSin 0:0ed2a7c7190c 145 #define NVIC_ICER ((volatile U32 *)0xE000E180)
GordonSin 0:0ed2a7c7190c 146 #define NVIC_IP ((volatile U8 *)0xE000E400)
GordonSin 0:0ed2a7c7190c 147 #define NVIC_INT_CTRL (*((volatile U32 *)0xE000ED04))
GordonSin 0:0ed2a7c7190c 148 #define NVIC_AIR_CTRL (*((volatile U32 *)0xE000ED0C))
GordonSin 0:0ed2a7c7190c 149 #define NVIC_SYS_PRI2 (*((volatile U32 *)0xE000ED1C))
GordonSin 0:0ed2a7c7190c 150 #define NVIC_SYS_PRI3 (*((volatile U32 *)0xE000ED20))
GordonSin 0:0ed2a7c7190c 151
GordonSin 0:0ed2a7c7190c 152 #define OS_PEND_IRQ() NVIC_INT_CTRL = (1<<28)
GordonSin 0:0ed2a7c7190c 153 #define OS_PENDING ((NVIC_INT_CTRL >> 26) & (1<<2 | 1))
GordonSin 0:0ed2a7c7190c 154 #define OS_UNPEND(fl) NVIC_INT_CTRL = (*fl = OS_PENDING) << 25
GordonSin 0:0ed2a7c7190c 155 #define OS_PEND(fl,p) NVIC_INT_CTRL = (fl | p<<2) << 26
GordonSin 0:0ed2a7c7190c 156 #define OS_LOCK() NVIC_ST_CTRL = 0x0005
GordonSin 0:0ed2a7c7190c 157 #define OS_UNLOCK() NVIC_ST_CTRL = 0x0007
GordonSin 0:0ed2a7c7190c 158
GordonSin 0:0ed2a7c7190c 159 #define OS_X_PENDING ((NVIC_INT_CTRL >> 28) & 1)
GordonSin 0:0ed2a7c7190c 160 #define OS_X_UNPEND(fl) NVIC_INT_CTRL = (*fl = OS_X_PENDING) << 27
GordonSin 0:0ed2a7c7190c 161 #define OS_X_PEND(fl,p) NVIC_INT_CTRL = (fl | p) << 28
GordonSin 0:0ed2a7c7190c 162 #define OS_X_INIT(n) NVIC_IP[n] = 0xFF; \
GordonSin 0:0ed2a7c7190c 163 NVIC_ISER[n>>5] = 1 << (n & 0x1F)
GordonSin 0:0ed2a7c7190c 164 #define OS_X_LOCK(n) NVIC_ICER[n>>5] = 1 << (n & 0x1F)
GordonSin 0:0ed2a7c7190c 165 #define OS_X_UNLOCK(n) NVIC_ISER[n>>5] = 1 << (n & 0x1F)
GordonSin 0:0ed2a7c7190c 166
GordonSin 0:0ed2a7c7190c 167 /* Core Debug registers */
GordonSin 0:0ed2a7c7190c 168 #define DEMCR (*((volatile U32 *)0xE000EDFC))
GordonSin 0:0ed2a7c7190c 169
GordonSin 0:0ed2a7c7190c 170 /* ITM registers */
GordonSin 0:0ed2a7c7190c 171 #define ITM_CONTROL (*((volatile U32 *)0xE0000E80))
GordonSin 0:0ed2a7c7190c 172 #define ITM_ENABLE (*((volatile U32 *)0xE0000E00))
GordonSin 0:0ed2a7c7190c 173 #define ITM_PORT30_U32 (*((volatile U32 *)0xE0000078))
GordonSin 0:0ed2a7c7190c 174 #define ITM_PORT31_U32 (*((volatile U32 *)0xE000007C))
GordonSin 0:0ed2a7c7190c 175 #define ITM_PORT31_U16 (*((volatile U16 *)0xE000007C))
GordonSin 0:0ed2a7c7190c 176 #define ITM_PORT31_U8 (*((volatile U8 *)0xE000007C))
GordonSin 0:0ed2a7c7190c 177
GordonSin 0:0ed2a7c7190c 178 /* Variables */
GordonSin 0:0ed2a7c7190c 179 extern BIT dbg_msg;
GordonSin 0:0ed2a7c7190c 180
GordonSin 0:0ed2a7c7190c 181 /* Functions */
GordonSin 0:0ed2a7c7190c 182 #ifdef __USE_EXCLUSIVE_ACCESS
GordonSin 0:0ed2a7c7190c 183 #define rt_inc(p) while(__strex((__ldrex(p)+1),p))
GordonSin 0:0ed2a7c7190c 184 #define rt_dec(p) while(__strex((__ldrex(p)-1),p))
GordonSin 0:0ed2a7c7190c 185 #else
GordonSin 0:0ed2a7c7190c 186 #define rt_inc(p) __disable_irq();(*p)++;__enable_irq();
GordonSin 0:0ed2a7c7190c 187 #define rt_dec(p) __disable_irq();(*p)--;__enable_irq();
GordonSin 0:0ed2a7c7190c 188 #endif
GordonSin 0:0ed2a7c7190c 189
GordonSin 0:0ed2a7c7190c 190 __inline static U32 rt_inc_qi (U32 size, U8 *count, U8 *first) {
GordonSin 0:0ed2a7c7190c 191 U32 cnt,c2;
GordonSin 0:0ed2a7c7190c 192 #ifdef __USE_EXCLUSIVE_ACCESS
GordonSin 0:0ed2a7c7190c 193 do {
GordonSin 0:0ed2a7c7190c 194 if ((cnt = __ldrex(count)) == size) {
GordonSin 0:0ed2a7c7190c 195 __clrex();
GordonSin 0:0ed2a7c7190c 196 return (cnt); }
GordonSin 0:0ed2a7c7190c 197 } while (__strex(cnt+1, count));
GordonSin 0:0ed2a7c7190c 198 do {
GordonSin 0:0ed2a7c7190c 199 c2 = (cnt = __ldrex(first)) + 1;
GordonSin 0:0ed2a7c7190c 200 if (c2 == size) c2 = 0;
GordonSin 0:0ed2a7c7190c 201 } while (__strex(c2, first));
GordonSin 0:0ed2a7c7190c 202 #else
GordonSin 0:0ed2a7c7190c 203 __disable_irq();
GordonSin 0:0ed2a7c7190c 204 if ((cnt = *count) < size) {
GordonSin 0:0ed2a7c7190c 205 *count = cnt+1;
GordonSin 0:0ed2a7c7190c 206 c2 = (cnt = *first) + 1;
GordonSin 0:0ed2a7c7190c 207 if (c2 == size) c2 = 0;
GordonSin 0:0ed2a7c7190c 208 *first = c2;
GordonSin 0:0ed2a7c7190c 209 }
GordonSin 0:0ed2a7c7190c 210 __enable_irq ();
GordonSin 0:0ed2a7c7190c 211 #endif
GordonSin 0:0ed2a7c7190c 212 return (cnt);
GordonSin 0:0ed2a7c7190c 213 }
GordonSin 0:0ed2a7c7190c 214
GordonSin 0:0ed2a7c7190c 215 __inline static void rt_systick_init (void) {
GordonSin 0:0ed2a7c7190c 216 NVIC_ST_RELOAD = os_trv;
GordonSin 0:0ed2a7c7190c 217 NVIC_ST_CURRENT = 0;
GordonSin 0:0ed2a7c7190c 218 NVIC_ST_CTRL = 0x0007;
GordonSin 0:0ed2a7c7190c 219 NVIC_SYS_PRI3 |= 0xFF000000;
GordonSin 0:0ed2a7c7190c 220 }
GordonSin 0:0ed2a7c7190c 221
GordonSin 0:0ed2a7c7190c 222 __inline static void rt_svc_init (void) {
GordonSin 0:0ed2a7c7190c 223 #if !(__TARGET_ARCH_6S_M)
GordonSin 0:0ed2a7c7190c 224 int sh,prigroup;
GordonSin 0:0ed2a7c7190c 225 #endif
GordonSin 0:0ed2a7c7190c 226 NVIC_SYS_PRI3 |= 0x00FF0000;
GordonSin 0:0ed2a7c7190c 227 #if (__TARGET_ARCH_6S_M)
GordonSin 0:0ed2a7c7190c 228 NVIC_SYS_PRI2 |= (NVIC_SYS_PRI3<<(8+1)) & 0xFC000000;
GordonSin 0:0ed2a7c7190c 229 #else
GordonSin 0:0ed2a7c7190c 230 sh = 8 - __clz (~((NVIC_SYS_PRI3 << 8) & 0xFF000000));
GordonSin 0:0ed2a7c7190c 231 prigroup = ((NVIC_AIR_CTRL >> 8) & 0x07);
GordonSin 0:0ed2a7c7190c 232 if (prigroup >= sh) {
GordonSin 0:0ed2a7c7190c 233 sh = prigroup + 1;
GordonSin 0:0ed2a7c7190c 234 }
GordonSin 0:0ed2a7c7190c 235 NVIC_SYS_PRI2 = ((0xFEFFFFFF << sh) & 0xFF000000) | (NVIC_SYS_PRI2 & 0x00FFFFFF);
GordonSin 0:0ed2a7c7190c 236 #endif
GordonSin 0:0ed2a7c7190c 237 }
GordonSin 0:0ed2a7c7190c 238
GordonSin 0:0ed2a7c7190c 239 extern void rt_set_PSP (U32 stack);
GordonSin 0:0ed2a7c7190c 240 extern U32 rt_get_PSP (void);
GordonSin 0:0ed2a7c7190c 241 extern void os_set_env (void);
GordonSin 0:0ed2a7c7190c 242 extern void *_alloc_box (void *box_mem);
GordonSin 0:0ed2a7c7190c 243 extern int _free_box (void *box_mem, void *box);
GordonSin 0:0ed2a7c7190c 244
GordonSin 0:0ed2a7c7190c 245 extern void rt_init_stack (P_TCB p_TCB, FUNCP task_body);
GordonSin 0:0ed2a7c7190c 246 extern void rt_ret_val (P_TCB p_TCB, U32 v0);
GordonSin 0:0ed2a7c7190c 247 extern void rt_ret_val2 (P_TCB p_TCB, U32 v0, U32 v1);
GordonSin 0:0ed2a7c7190c 248
GordonSin 0:0ed2a7c7190c 249 extern void dbg_init (void);
GordonSin 0:0ed2a7c7190c 250 extern void dbg_task_notify (P_TCB p_tcb, BOOL create);
GordonSin 0:0ed2a7c7190c 251 extern void dbg_task_switch (U32 task_id);
GordonSin 0:0ed2a7c7190c 252
GordonSin 0:0ed2a7c7190c 253 #ifdef DBG_MSG
GordonSin 0:0ed2a7c7190c 254 #define DBG_INIT() dbg_init()
GordonSin 0:0ed2a7c7190c 255 #define DBG_TASK_NOTIFY(p_tcb,create) if (dbg_msg) dbg_task_notify(p_tcb,create)
GordonSin 0:0ed2a7c7190c 256 #define DBG_TASK_SWITCH(task_id) if (dbg_msg && (os_tsk.new!=os_tsk.run)) \
GordonSin 0:0ed2a7c7190c 257 dbg_task_switch(task_id)
GordonSin 0:0ed2a7c7190c 258 #else
GordonSin 0:0ed2a7c7190c 259 #define DBG_INIT()
GordonSin 0:0ed2a7c7190c 260 #define DBG_TASK_NOTIFY(p_tcb,create)
GordonSin 0:0ed2a7c7190c 261 #define DBG_TASK_SWITCH(task_id)
GordonSin 0:0ed2a7c7190c 262 #endif
GordonSin 0:0ed2a7c7190c 263
GordonSin 0:0ed2a7c7190c 264 /*----------------------------------------------------------------------------
GordonSin 0:0ed2a7c7190c 265 * end of file
GordonSin 0:0ed2a7c7190c 266 *---------------------------------------------------------------------------*/
GordonSin 0:0ed2a7c7190c 267