Callum Ellor / LCD_Wait

Wait function that uses 16 Bit Timer 1 instead of using 32 bit Timer 0 to be used in conjunction with 'TextLCD16x4_Wait' and 'PulseWidthCapture' to measure the +ve and -ve Pulsewdth of a signal

Dependents:   PulseWidthCapture_Program

LCD_Wait.h@2:46e8391685c4, 2014-12-11 (annotated)

Committer:
Ellor1
Date:
Thu Dec 11 08:59:33 2014 +0000
Revision:
2:46e8391685c4
Parent:
1:57aba608a20d 
Wait Library for TextLCD16x4;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Ellor1 0:538efd9574f7 1 #ifndef LCD_H
Ellor1 0:538efd9574f7 2 #define LCD_H
Ellor1 0:538efd9574f7 3
Ellor1 0:538efd9574f7 4 #include "mbed.h"
Ellor1 0:538efd9574f7 5
Ellor1 0:538efd9574f7 6 class LCD_Wait {
Ellor1 0:538efd9574f7 7 public:
Ellor1 0:538efd9574f7 8
Ellor1 0:538efd9574f7 9 LCD_Wait(void);
Ellor1 0:538efd9574f7 10 void Wait(float num_wait);
Ellor1 0:538efd9574f7 11
Ellor1 0:538efd9574f7 12
Ellor1 0:538efd9574f7 13 /* Private Macros ------------------------------------------------------------- */
Ellor1 0:538efd9574f7 14 /* --------------------- BIT DEFINITIONS -------------------------------------- */
Ellor1 0:538efd9574f7 15
Ellor1 2:46e8391685c4 16 /*********************************************************************//**
Ellor1 2:46e8391685c4 17 * Macro defines for CT16B1->IR Interrupt tegister
Ellor1 2:46e8391685c4 18 **********************************************************************/
Ellor1 0:538efd9574f7 19 #define CT16B1_IR_MR0INT ((uint32_t)(1<<0))
Ellor1 0:538efd9574f7 20
Ellor1 2:46e8391685c4 21 /*********************************************************************//**
Ellor1 2:46e8391685c4 22 * Macro defines for SYSCON->SYSAHBCLKDIV register bits LPC11U24 page 30
Ellor1 2:46e8391685c4 23 **********************************************************************/
Ellor1 0:538efd9574f7 24 #define CT16B1_CLK_ENABLE ((uint32_t)(1<<8))
Ellor1 0:538efd9574f7 25
Ellor1 2:46e8391685c4 26 /*********************************************************************//**
Ellor1 2:46e8391685c4 27 * Macro defines for CT16B1->TCR register bits LPC11U24 page 335
Ellor1 2:46e8391685c4 28 **********************************************************************/
Ellor1 0:538efd9574f7 29 #define CT16B1_TCR_CEN 1UL
Ellor1 0:538efd9574f7 30
Ellor1 2:46e8391685c4 31 /*********************************************************************//**
Ellor1 2:46e8391685c4 32 * Macro defines for CT16B1->MCR register bits LPC11U24 page 337
Ellor1 2:46e8391685c4 33 **********************************************************************/
Ellor1 0:538efd9574f7 34 #define CT16B1_MR0I ((uint32_t)(1<<0))
Ellor1 0:538efd9574f7 35 #define CT16B1_MR0R ((uint32_t)(1<<1))
Ellor1 0:538efd9574f7 36
Ellor1 0:538efd9574f7 37
Ellor1 0:538efd9574f7 38 };
Ellor1 0:538efd9574f7 39
Ellor1 0:538efd9574f7 40 #endif