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targets/cmsis/TARGET_STM/TARGET_STM32L1/stm32l1xx_hal_spi.c@394:83f921546702, 2014-11-07 (annotated)

Committer:: mbed_official
Date:: Fri Nov 07 15:45:07 2014 +0000
Revision:: 394:83f921546702
Parent:: targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_hal_spi.c@354:e67efb2aab0e

Synchronized with git revision aab52cb7ec5a665869e507dd988bbfd55b7e087e

Full URL: https://github.com/mbedmicro/mbed/commit/aab52cb7ec5a665869e507dd988bbfd55b7e087e/

Tests: Fix cpputest testrunner

Who changed what in which revision?

User	Revision	Line number	New contents of line
mbed_official	354:e67efb2aab0e	1	/**
mbed_official	354:e67efb2aab0e	2	******************************************************************************
mbed_official	354:e67efb2aab0e	3	* @file stm32l1xx_hal_spi.c
mbed_official	354:e67efb2aab0e	4	* @author MCD Application Team
mbed_official	354:e67efb2aab0e	5	* @version V1.0.0
mbed_official	354:e67efb2aab0e	6	* @date 5-September-2014
mbed_official	354:e67efb2aab0e	7	* @brief SPI HAL module driver.
mbed_official	354:e67efb2aab0e	8	*
mbed_official	354:e67efb2aab0e	9	* This file provides firmware functions to manage the following
mbed_official	354:e67efb2aab0e	10	* functionalities of the Serial Peripheral Interface (SPI) peripheral:
mbed_official	354:e67efb2aab0e	11	* + Initialization and de-initialization functions
mbed_official	354:e67efb2aab0e	12	* + IO operation functions
mbed_official	354:e67efb2aab0e	13	* + Peripheral Control functions
mbed_official	354:e67efb2aab0e	14	* + Peripheral State functions
mbed_official	354:e67efb2aab0e	15	@verbatim
mbed_official	354:e67efb2aab0e	16	==============================================================================
mbed_official	354:e67efb2aab0e	17	##### How to use this driver #####
mbed_official	354:e67efb2aab0e	18	==============================================================================
mbed_official	354:e67efb2aab0e	19	[..]
mbed_official	354:e67efb2aab0e	20	The SPI HAL driver can be used as follows:
mbed_official	354:e67efb2aab0e	21
mbed_official	354:e67efb2aab0e	22	(#) Declare a SPI_HandleTypeDef handle structure, for example:
mbed_official	354:e67efb2aab0e	23	SPI_HandleTypeDef hspi;
mbed_official	354:e67efb2aab0e	24
mbed_official	354:e67efb2aab0e	25	(#)Initialize the SPI low level resources by implementing the HAL_SPI_MspInit ()API:
mbed_official	354:e67efb2aab0e	26	(##) Enable the SPIx interface clock
mbed_official	354:e67efb2aab0e	27	(##) SPI pins configuration
mbed_official	354:e67efb2aab0e	28	(+++) Enable the clock for the SPI GPIOs
mbed_official	354:e67efb2aab0e	29	(+++) Configure these SPI pins as alternate function push-pull
mbed_official	354:e67efb2aab0e	30	(##) NVIC configuration if you need to use interrupt process
mbed_official	354:e67efb2aab0e	31	(+++) Configure the SPIx interrupt priority
mbed_official	354:e67efb2aab0e	32	(+++) Enable the NVIC SPI IRQ handle
mbed_official	354:e67efb2aab0e	33	(##) DMA Configuration if you need to use DMA process
mbed_official	354:e67efb2aab0e	34	(+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive Channel
mbed_official	354:e67efb2aab0e	35	(+++) Enable the DMAx clock
mbed_official	354:e67efb2aab0e	36	(+++) Configure the DMA handle parameters
mbed_official	354:e67efb2aab0e	37	(+++) Configure the DMA Tx or Rx Channel
mbed_official	354:e67efb2aab0e	38	(+++) Associate the initilalized hdma_tx(or _rx) handle to the hspi DMA Tx (or Rx) handle
mbed_official	354:e67efb2aab0e	39	(+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx or Rx Channel
mbed_official	354:e67efb2aab0e	40
mbed_official	354:e67efb2aab0e	41	(#) Program the Mode, Direction , Data size, Baudrate Prescaler, NSS
mbed_official	354:e67efb2aab0e	42	management, Clock polarity and phase, FirstBit and CRC configuration in the hspi Init structure.
mbed_official	354:e67efb2aab0e	43
mbed_official	354:e67efb2aab0e	44	(#) Initialize the SPI registers by calling the HAL_SPI_Init() API:
mbed_official	354:e67efb2aab0e	45	(++) This API configures also the low level Hardware GPIO, CLOCK, CORTEX...etc)
mbed_official	354:e67efb2aab0e	46	by calling the customed HAL_SPI_MspInit() API.
mbed_official	354:e67efb2aab0e	47	[..]
mbed_official	354:e67efb2aab0e	48	Circular mode restriction:
mbed_official	354:e67efb2aab0e	49	(#) The DMA circular mode cannot be used when the SPI is configured in these modes:
mbed_official	354:e67efb2aab0e	50	(##) Master 2Lines RxOnly
mbed_official	354:e67efb2aab0e	51	(##) Master 1Line Rx
mbed_official	354:e67efb2aab0e	52	(#) The CRC feature is not managed when the DMA circular mode is enabled
mbed_official	354:e67efb2aab0e	53	(#) When the SPI DMA Pause/Stop features are used, we must use the following APIs
mbed_official	354:e67efb2aab0e	54	the HAL_SPI_DMAPause()/ HAL_SPI_DMAStop() only under the SPI callbacks
mbed_official	354:e67efb2aab0e	55
mbed_official	354:e67efb2aab0e	56
mbed_official	354:e67efb2aab0e	57
mbed_official	354:e67efb2aab0e	58	@endverbatim
mbed_official	354:e67efb2aab0e	59	******************************************************************************
mbed_official	354:e67efb2aab0e	60	* @attention
mbed_official	354:e67efb2aab0e	61	*
mbed_official	354:e67efb2aab0e	62	* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official	354:e67efb2aab0e	63	*
mbed_official	354:e67efb2aab0e	64	* Redistribution and use in source and binary forms, with or without modification,
mbed_official	354:e67efb2aab0e	65	* are permitted provided that the following conditions are met:
mbed_official	354:e67efb2aab0e	66	* 1. Redistributions of source code must retain the above copyright notice,
mbed_official	354:e67efb2aab0e	67	* this list of conditions and the following disclaimer.
mbed_official	354:e67efb2aab0e	68	* 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official	354:e67efb2aab0e	69	* this list of conditions and the following disclaimer in the documentation
mbed_official	354:e67efb2aab0e	70	* and/or other materials provided with the distribution.
mbed_official	354:e67efb2aab0e	71	* 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official	354:e67efb2aab0e	72	* may be used to endorse or promote products derived from this software
mbed_official	354:e67efb2aab0e	73	* without specific prior written permission.
mbed_official	354:e67efb2aab0e	74	*
mbed_official	354:e67efb2aab0e	75	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official	354:e67efb2aab0e	76	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official	354:e67efb2aab0e	77	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official	354:e67efb2aab0e	78	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official	354:e67efb2aab0e	79	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official	354:e67efb2aab0e	80	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official	354:e67efb2aab0e	81	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official	354:e67efb2aab0e	82	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official	354:e67efb2aab0e	83	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official	354:e67efb2aab0e	84	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official	354:e67efb2aab0e	85	*
mbed_official	354:e67efb2aab0e	86	******************************************************************************
mbed_official	354:e67efb2aab0e	87	*/
mbed_official	354:e67efb2aab0e	88
mbed_official	354:e67efb2aab0e	89	/* Includes ------------------------------------------------------------------*/
mbed_official	354:e67efb2aab0e	90	#include "stm32l1xx_hal.h"
mbed_official	354:e67efb2aab0e	91
mbed_official	354:e67efb2aab0e	92	/** @addtogroup STM32L1xx_HAL_Driver
mbed_official	354:e67efb2aab0e	93	* @{
mbed_official	354:e67efb2aab0e	94	*/
mbed_official	354:e67efb2aab0e	95
mbed_official	354:e67efb2aab0e	96	/** @defgroup SPI SPI
mbed_official	354:e67efb2aab0e	97	* @brief SPI HAL module driver
mbed_official	354:e67efb2aab0e	98	* @{
mbed_official	354:e67efb2aab0e	99	*/
mbed_official	354:e67efb2aab0e	100
mbed_official	354:e67efb2aab0e	101	#ifdef HAL_SPI_MODULE_ENABLED
mbed_official	354:e67efb2aab0e	102
mbed_official	354:e67efb2aab0e	103	/* Private typedef -----------------------------------------------------------*/
mbed_official	354:e67efb2aab0e	104	/* Private define ------------------------------------------------------------*/
mbed_official	354:e67efb2aab0e	105	/** @defgroup SPI_Private_Constants SPI Private Constants
mbed_official	354:e67efb2aab0e	106	* @{
mbed_official	354:e67efb2aab0e	107	*/
mbed_official	354:e67efb2aab0e	108	#define SPI_TIMEOUT_VALUE 10
mbed_official	354:e67efb2aab0e	109	/**
mbed_official	354:e67efb2aab0e	110	* @}
mbed_official	354:e67efb2aab0e	111	*/
mbed_official	354:e67efb2aab0e	112
mbed_official	354:e67efb2aab0e	113	/* Private macro -------------------------------------------------------------*/
mbed_official	354:e67efb2aab0e	114	/* Private variables ---------------------------------------------------------*/
mbed_official	354:e67efb2aab0e	115	/* Private function prototypes -----------------------------------------------*/
mbed_official	354:e67efb2aab0e	116	/** @defgroup SPI_Private_Functions SPI Private Functions
mbed_official	354:e67efb2aab0e	117	* @{
mbed_official	354:e67efb2aab0e	118	*/
mbed_official	354:e67efb2aab0e	119
mbed_official	354:e67efb2aab0e	120	static void SPI_TxCloseIRQHandler(struct __SPI_HandleTypeDef *hspi);
mbed_official	354:e67efb2aab0e	121	static void SPI_TxISR(struct __SPI_HandleTypeDef *hspi);
mbed_official	354:e67efb2aab0e	122	static void SPI_RxCloseIRQHandler(struct __SPI_HandleTypeDef *hspi);
mbed_official	354:e67efb2aab0e	123	static void SPI_2LinesRxISR(struct __SPI_HandleTypeDef *hspi);
mbed_official	354:e67efb2aab0e	124	static void SPI_RxISR(struct __SPI_HandleTypeDef *hspi);
mbed_official	354:e67efb2aab0e	125	static void SPI_DMATransmitCplt(struct __DMA_HandleTypeDef *hdma);
mbed_official	354:e67efb2aab0e	126	static void SPI_DMAReceiveCplt(struct __DMA_HandleTypeDef *hdma);
mbed_official	354:e67efb2aab0e	127	static void SPI_DMATransmitReceiveCplt(struct __DMA_HandleTypeDef *hdma);
mbed_official	354:e67efb2aab0e	128	static void SPI_DMAHalfTransmitCplt(struct __DMA_HandleTypeDef *hdma);
mbed_official	354:e67efb2aab0e	129	static void SPI_DMAHalfReceiveCplt(struct __DMA_HandleTypeDef *hdma);
mbed_official	354:e67efb2aab0e	130	static void SPI_DMAHalfTransmitReceiveCplt(struct __DMA_HandleTypeDef *hdma);
mbed_official	354:e67efb2aab0e	131	static void SPI_DMAError(struct __DMA_HandleTypeDef *hdma);
mbed_official	354:e67efb2aab0e	132	static HAL_StatusTypeDef SPI_WaitOnFlagUntilTimeout(struct __SPI_HandleTypeDef *hspi, uint32_t Flag, FlagStatus Status, uint32_t Timeout);
mbed_official	354:e67efb2aab0e	133	/**
mbed_official	354:e67efb2aab0e	134	* @}
mbed_official	354:e67efb2aab0e	135	*/
mbed_official	354:e67efb2aab0e	136
mbed_official	354:e67efb2aab0e	137	/* Exported functions ---------------------------------------------------------*/
mbed_official	354:e67efb2aab0e	138
mbed_official	354:e67efb2aab0e	139	/** @defgroup SPI_Exported_Functions SPI Exported Functions
mbed_official	354:e67efb2aab0e	140	* @{
mbed_official	354:e67efb2aab0e	141	*/
mbed_official	354:e67efb2aab0e	142
mbed_official	354:e67efb2aab0e	143	/** @defgroup SPI_Exported_Functions_Group1 Initialization and de-initialization functions
mbed_official	354:e67efb2aab0e	144	* @brief Initialization and Configuration functions
mbed_official	354:e67efb2aab0e	145	*
mbed_official	354:e67efb2aab0e	146	@verbatim
mbed_official	354:e67efb2aab0e	147	===============================================================================
mbed_official	354:e67efb2aab0e	148	##### Initialization and de-initialization functions #####
mbed_official	354:e67efb2aab0e	149	===============================================================================
mbed_official	354:e67efb2aab0e	150	[..] This subsection provides a set of functions allowing to initialize and
mbed_official	354:e67efb2aab0e	151	de-initialiaze the SPIx peripheral:
mbed_official	354:e67efb2aab0e	152
mbed_official	354:e67efb2aab0e	153	(+) User must implement HAL_SPI_MspInit() function in which he configures
mbed_official	354:e67efb2aab0e	154	all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
mbed_official	354:e67efb2aab0e	155
mbed_official	354:e67efb2aab0e	156	(+) Call the function HAL_SPI_Init() to configure the selected device with
mbed_official	354:e67efb2aab0e	157	the selected configuration:
mbed_official	354:e67efb2aab0e	158	(++) Mode
mbed_official	354:e67efb2aab0e	159	(++) Direction
mbed_official	354:e67efb2aab0e	160	(++) Data Size
mbed_official	354:e67efb2aab0e	161	(++) Clock Polarity and Phase
mbed_official	354:e67efb2aab0e	162	(++) NSS Management
mbed_official	354:e67efb2aab0e	163	(++) BaudRate Prescaler
mbed_official	354:e67efb2aab0e	164	(++) FirstBit
mbed_official	354:e67efb2aab0e	165	(++) TIMode
mbed_official	354:e67efb2aab0e	166	(++) CRC Calculation
mbed_official	354:e67efb2aab0e	167	(++) CRC Polynomial if CRC enabled
mbed_official	354:e67efb2aab0e	168
mbed_official	354:e67efb2aab0e	169	(+) Call the function HAL_SPI_DeInit() to restore the default configuration
mbed_official	354:e67efb2aab0e	170	of the selected SPIx periperal.
mbed_official	354:e67efb2aab0e	171
mbed_official	354:e67efb2aab0e	172	@endverbatim
mbed_official	354:e67efb2aab0e	173	* @{
mbed_official	354:e67efb2aab0e	174	*/
mbed_official	354:e67efb2aab0e	175
mbed_official	354:e67efb2aab0e	176	/**
mbed_official	354:e67efb2aab0e	177	* @brief Initializes the SPI according to the specified parameters
mbed_official	354:e67efb2aab0e	178	* in the SPI_InitTypeDef and create the associated handle.
mbed_official	354:e67efb2aab0e	179	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	354:e67efb2aab0e	180	* the configuration information for SPI module.
mbed_official	354:e67efb2aab0e	181	* @retval HAL status
mbed_official	354:e67efb2aab0e	182	*/
mbed_official	354:e67efb2aab0e	183	__weak HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi)
mbed_official	354:e67efb2aab0e	184	{
mbed_official	354:e67efb2aab0e	185	return HAL_ERROR;
mbed_official	354:e67efb2aab0e	186	}
mbed_official	354:e67efb2aab0e	187
mbed_official	354:e67efb2aab0e	188	/**
mbed_official	354:e67efb2aab0e	189	* @brief DeInitializes the SPI peripheral
mbed_official	354:e67efb2aab0e	190	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	354:e67efb2aab0e	191	* the configuration information for SPI module.
mbed_official	354:e67efb2aab0e	192	* @retval HAL status
mbed_official	354:e67efb2aab0e	193	*/
mbed_official	354:e67efb2aab0e	194	HAL_StatusTypeDef HAL_SPI_DeInit(SPI_HandleTypeDef *hspi)
mbed_official	354:e67efb2aab0e	195	{
mbed_official	354:e67efb2aab0e	196	/* Check the SPI handle allocation */
mbed_official	354:e67efb2aab0e	197	if(hspi == HAL_NULL)
mbed_official	354:e67efb2aab0e	198	{
mbed_official	354:e67efb2aab0e	199	return HAL_ERROR;
mbed_official	354:e67efb2aab0e	200	}
mbed_official	354:e67efb2aab0e	201
mbed_official	354:e67efb2aab0e	202	/* Disable the SPI Peripheral Clock */
mbed_official	354:e67efb2aab0e	203	__HAL_SPI_DISABLE(hspi);
mbed_official	354:e67efb2aab0e	204
mbed_official	354:e67efb2aab0e	205	/* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
mbed_official	354:e67efb2aab0e	206	HAL_SPI_MspDeInit(hspi);
mbed_official	354:e67efb2aab0e	207
mbed_official	354:e67efb2aab0e	208	hspi->ErrorCode = HAL_SPI_ERROR_NONE;
mbed_official	354:e67efb2aab0e	209	hspi->State = HAL_SPI_STATE_RESET;
mbed_official	354:e67efb2aab0e	210
mbed_official	354:e67efb2aab0e	211	/* Release Lock */
mbed_official	354:e67efb2aab0e	212	__HAL_UNLOCK(hspi);
mbed_official	354:e67efb2aab0e	213
mbed_official	354:e67efb2aab0e	214	return HAL_OK;
mbed_official	354:e67efb2aab0e	215	}
mbed_official	354:e67efb2aab0e	216
mbed_official	354:e67efb2aab0e	217	/**
mbed_official	354:e67efb2aab0e	218	* @brief SPI MSP Init
mbed_official	354:e67efb2aab0e	219	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	354:e67efb2aab0e	220	* the configuration information for SPI module.
mbed_official	354:e67efb2aab0e	221	* @retval None
mbed_official	354:e67efb2aab0e	222	*/
mbed_official	354:e67efb2aab0e	223	__weak void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi)
mbed_official	354:e67efb2aab0e	224	{
mbed_official	354:e67efb2aab0e	225	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	354:e67efb2aab0e	226	the HAL_SPI_MspInit could be implenetd in the user file
mbed_official	354:e67efb2aab0e	227	*/
mbed_official	354:e67efb2aab0e	228	}
mbed_official	354:e67efb2aab0e	229
mbed_official	354:e67efb2aab0e	230	/**
mbed_official	354:e67efb2aab0e	231	* @brief SPI MSP DeInit
mbed_official	354:e67efb2aab0e	232	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	354:e67efb2aab0e	233	* the configuration information for SPI module.
mbed_official	354:e67efb2aab0e	234	* @retval None
mbed_official	354:e67efb2aab0e	235	*/
mbed_official	354:e67efb2aab0e	236	__weak void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi)
mbed_official	354:e67efb2aab0e	237	{
mbed_official	354:e67efb2aab0e	238	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	354:e67efb2aab0e	239	the HAL_SPI_MspDeInit could be implenetd in the user file
mbed_official	354:e67efb2aab0e	240	*/
mbed_official	354:e67efb2aab0e	241	}
mbed_official	354:e67efb2aab0e	242
mbed_official	354:e67efb2aab0e	243	/**
mbed_official	354:e67efb2aab0e	244	* @}
mbed_official	354:e67efb2aab0e	245	*/
mbed_official	354:e67efb2aab0e	246
mbed_official	354:e67efb2aab0e	247	/** @defgroup SPI_Exported_Functions_Group2 IO operation functions
mbed_official	354:e67efb2aab0e	248	* @brief Data transfers functions
mbed_official	354:e67efb2aab0e	249	*
mbed_official	354:e67efb2aab0e	250	@verbatim
mbed_official	354:e67efb2aab0e	251	==============================================================================
mbed_official	354:e67efb2aab0e	252	##### IO operation functions #####
mbed_official	354:e67efb2aab0e	253	===============================================================================
mbed_official	354:e67efb2aab0e	254	This subsection provides a set of functions allowing to manage the SPI
mbed_official	354:e67efb2aab0e	255	data transfers.
mbed_official	354:e67efb2aab0e	256
mbed_official	354:e67efb2aab0e	257	[..] The SPI supports master and slave mode :
mbed_official	354:e67efb2aab0e	258
mbed_official	354:e67efb2aab0e	259	(#) There are two modes of transfer:
mbed_official	354:e67efb2aab0e	260	(++) Blocking mode: The communication is performed in polling mode.
mbed_official	354:e67efb2aab0e	261	The HAL status of all data processing is returned by the same function
mbed_official	354:e67efb2aab0e	262	after finishing transfer.
mbed_official	354:e67efb2aab0e	263	(++) No-Blocking mode: The communication is performed using Interrupts
mbed_official	354:e67efb2aab0e	264	or DMA, These APIs return the HAL status.
mbed_official	354:e67efb2aab0e	265	The end of the data processing will be indicated through the
mbed_official	354:e67efb2aab0e	266	dedicated SPI IRQ when using Interrupt mode or the DMA IRQ when
mbed_official	354:e67efb2aab0e	267	using DMA mode.
mbed_official	354:e67efb2aab0e	268	The HAL_SPI_TxCpltCallback(), HAL_SPI_RxCpltCallback() and HAL_SPI_TxRxCpltCallback() user callbacks
mbed_official	354:e67efb2aab0e	269	will be executed respectivelly at the end of the transmit or Receive process
mbed_official	354:e67efb2aab0e	270	The HAL_SPI_ErrorCallback()user callback will be executed when a communication error is detected
mbed_official	354:e67efb2aab0e	271
mbed_official	354:e67efb2aab0e	272	(#) Blocking mode APIs are :
mbed_official	354:e67efb2aab0e	273	(++) HAL_SPI_Transmit()in 1Line (simplex) and 2Lines (full duplex) mode
mbed_official	354:e67efb2aab0e	274	(++) HAL_SPI_Receive() in 1Line (simplex) and 2Lines (full duplex) mode
mbed_official	354:e67efb2aab0e	275	(++) HAL_SPI_TransmitReceive() in full duplex mode
mbed_official	354:e67efb2aab0e	276
mbed_official	354:e67efb2aab0e	277	(#) Non Blocking mode API's with Interrupt are :
mbed_official	354:e67efb2aab0e	278	(++) HAL_SPI_Transmit_IT()in 1Line (simplex) and 2Lines (full duplex) mode
mbed_official	354:e67efb2aab0e	279	(++) HAL_SPI_Receive_IT() in 1Line (simplex) and 2Lines (full duplex) mode
mbed_official	354:e67efb2aab0e	280	(++) HAL_SPI_TransmitReceive_IT()in full duplex mode
mbed_official	354:e67efb2aab0e	281	(++) HAL_SPI_IRQHandler()
mbed_official	354:e67efb2aab0e	282
mbed_official	354:e67efb2aab0e	283	(#) Non Blocking mode functions with DMA are :
mbed_official	354:e67efb2aab0e	284	(++) HAL_SPI_Transmit_DMA()in 1Line (simplex) and 2Lines (full duplex) mode
mbed_official	354:e67efb2aab0e	285	(++) HAL_SPI_Receive_DMA() in 1Line (simplex) and 2Lines (full duplex) mode
mbed_official	354:e67efb2aab0e	286	(++) HAL_SPI_TransmitReceive_DMA() in full duplex mode
mbed_official	354:e67efb2aab0e	287
mbed_official	354:e67efb2aab0e	288	(#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
mbed_official	354:e67efb2aab0e	289	(++) HAL_SPI_TxCpltCallback()
mbed_official	354:e67efb2aab0e	290	(++) HAL_SPI_RxCpltCallback()
mbed_official	354:e67efb2aab0e	291	(++) HAL_SPI_TxRxCpltCallback()
mbed_official	354:e67efb2aab0e	292	(++) HAL_SPI_TxHalfCpltCallback()
mbed_official	354:e67efb2aab0e	293	(++) HAL_SPI_RxHalfCpltCallback()
mbed_official	354:e67efb2aab0e	294	(++) HAL_SPI_TxRxHalfCpltCallback()
mbed_official	354:e67efb2aab0e	295	(++) HAL_SPI_ErrorCallback()
mbed_official	354:e67efb2aab0e	296
mbed_official	354:e67efb2aab0e	297	@endverbatim
mbed_official	354:e67efb2aab0e	298	* @{
mbed_official	354:e67efb2aab0e	299	*/
mbed_official	354:e67efb2aab0e	300
mbed_official	354:e67efb2aab0e	301	/**
mbed_official	354:e67efb2aab0e	302	* @brief Transmit an amount of data in blocking mode
mbed_official	354:e67efb2aab0e	303	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	354:e67efb2aab0e	304	* the configuration information for SPI module.
mbed_official	354:e67efb2aab0e	305	* @param pData: pointer to data buffer
mbed_official	354:e67efb2aab0e	306	* @param Size: amount of data to be sent
mbed_official	354:e67efb2aab0e	307	* @param Timeout: Timeout duration
mbed_official	354:e67efb2aab0e	308	* @retval HAL status
mbed_official	354:e67efb2aab0e	309	*/
mbed_official	354:e67efb2aab0e	310	HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef hspi, uint8_t pData, uint16_t Size, uint32_t Timeout)
mbed_official	354:e67efb2aab0e	311	{
mbed_official	354:e67efb2aab0e	312
mbed_official	354:e67efb2aab0e	313	if(hspi->State == HAL_SPI_STATE_READY)
mbed_official	354:e67efb2aab0e	314	{
mbed_official	354:e67efb2aab0e	315	if((pData == HAL_NULL ) \|\| (Size == 0))
mbed_official	354:e67efb2aab0e	316	{
mbed_official	354:e67efb2aab0e	317	return HAL_ERROR;
mbed_official	354:e67efb2aab0e	318	}
mbed_official	354:e67efb2aab0e	319
mbed_official	354:e67efb2aab0e	320	/* Check the parameters */
mbed_official	354:e67efb2aab0e	321	assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
mbed_official	354:e67efb2aab0e	322
mbed_official	354:e67efb2aab0e	323	/* Process Locked */
mbed_official	354:e67efb2aab0e	324	__HAL_LOCK(hspi);
mbed_official	354:e67efb2aab0e	325
mbed_official	354:e67efb2aab0e	326	/* Configure communication */
mbed_official	354:e67efb2aab0e	327	hspi->State = HAL_SPI_STATE_BUSY_TX;
mbed_official	354:e67efb2aab0e	328	hspi->ErrorCode = HAL_SPI_ERROR_NONE;
mbed_official	354:e67efb2aab0e	329
mbed_official	354:e67efb2aab0e	330	hspi->pTxBuffPtr = pData;
mbed_official	354:e67efb2aab0e	331	hspi->TxXferSize = Size;
mbed_official	354:e67efb2aab0e	332	hspi->TxXferCount = Size;
mbed_official	354:e67efb2aab0e	333
mbed_official	354:e67efb2aab0e	334	/Init field not used in handle to zero /
mbed_official	354:e67efb2aab0e	335	hspi->TxISR = 0;
mbed_official	354:e67efb2aab0e	336	hspi->RxISR = 0;
mbed_official	354:e67efb2aab0e	337	hspi->pRxBuffPtr = HAL_NULL;
mbed_official	354:e67efb2aab0e	338	hspi->RxXferSize = 0;
mbed_official	354:e67efb2aab0e	339	hspi->RxXferCount = 0;
mbed_official	354:e67efb2aab0e	340
mbed_official	354:e67efb2aab0e	341	/* Reset CRC Calculation */
mbed_official	354:e67efb2aab0e	342	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
mbed_official	354:e67efb2aab0e	343	{
mbed_official	354:e67efb2aab0e	344	SPI_RESET_CRC(hspi);
mbed_official	354:e67efb2aab0e	345	}
mbed_official	354:e67efb2aab0e	346
mbed_official	354:e67efb2aab0e	347	if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
mbed_official	354:e67efb2aab0e	348	{
mbed_official	354:e67efb2aab0e	349	/* Configure communication direction : 1Line */
mbed_official	354:e67efb2aab0e	350	SPI_1LINE_TX(hspi);
mbed_official	354:e67efb2aab0e	351	}
mbed_official	354:e67efb2aab0e	352
mbed_official	354:e67efb2aab0e	353	/* Check if the SPI is already enabled */
mbed_official	354:e67efb2aab0e	354	if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
mbed_official	354:e67efb2aab0e	355	{
mbed_official	354:e67efb2aab0e	356	/* Enable SPI peripheral */
mbed_official	354:e67efb2aab0e	357	__HAL_SPI_ENABLE(hspi);
mbed_official	354:e67efb2aab0e	358	}
mbed_official	354:e67efb2aab0e	359
mbed_official	354:e67efb2aab0e	360	/* Transmit data in 8 Bit mode */
mbed_official	354:e67efb2aab0e	361	if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
mbed_official	354:e67efb2aab0e	362	{
mbed_official	354:e67efb2aab0e	363	if((hspi->Init.Mode == SPI_MODE_SLAVE)\|\| (hspi->TxXferCount == 0x01))
mbed_official	354:e67efb2aab0e	364	{
mbed_official	354:e67efb2aab0e	365	hspi->Instance->DR = (*hspi->pTxBuffPtr++);
mbed_official	354:e67efb2aab0e	366	hspi->TxXferCount--;
mbed_official	354:e67efb2aab0e	367	}
mbed_official	354:e67efb2aab0e	368	while(hspi->TxXferCount > 0)
mbed_official	354:e67efb2aab0e	369	{
mbed_official	354:e67efb2aab0e	370	/* Wait until TXE flag is set to send data */
mbed_official	354:e67efb2aab0e	371	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
mbed_official	354:e67efb2aab0e	372	{
mbed_official	354:e67efb2aab0e	373	return HAL_TIMEOUT;
mbed_official	354:e67efb2aab0e	374	}
mbed_official	354:e67efb2aab0e	375	hspi->Instance->DR = (*hspi->pTxBuffPtr++);
mbed_official	354:e67efb2aab0e	376	hspi->TxXferCount--;
mbed_official	354:e67efb2aab0e	377	}
mbed_official	354:e67efb2aab0e	378	/* Enable CRC Transmission */
mbed_official	354:e67efb2aab0e	379	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
mbed_official	354:e67efb2aab0e	380	{
mbed_official	354:e67efb2aab0e	381	SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
mbed_official	354:e67efb2aab0e	382	}
mbed_official	354:e67efb2aab0e	383	}
mbed_official	354:e67efb2aab0e	384	/* Transmit data in 16 Bit mode */
mbed_official	354:e67efb2aab0e	385	else
mbed_official	354:e67efb2aab0e	386	{
mbed_official	354:e67efb2aab0e	387	if((hspi->Init.Mode == SPI_MODE_SLAVE) \|\| (hspi->TxXferCount == 0x01))
mbed_official	354:e67efb2aab0e	388	{
mbed_official	354:e67efb2aab0e	389	hspi->Instance->DR = ((uint16_t)hspi->pTxBuffPtr);
mbed_official	354:e67efb2aab0e	390	hspi->pTxBuffPtr+=2;
mbed_official	354:e67efb2aab0e	391	hspi->TxXferCount--;
mbed_official	354:e67efb2aab0e	392	}
mbed_official	354:e67efb2aab0e	393	while(hspi->TxXferCount > 0)
mbed_official	354:e67efb2aab0e	394	{
mbed_official	354:e67efb2aab0e	395	/* Wait until TXE flag is set to send data */
mbed_official	354:e67efb2aab0e	396	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
mbed_official	354:e67efb2aab0e	397	{
mbed_official	354:e67efb2aab0e	398	return HAL_TIMEOUT;
mbed_official	354:e67efb2aab0e	399	}
mbed_official	354:e67efb2aab0e	400	hspi->Instance->DR = ((uint16_t)hspi->pTxBuffPtr);
mbed_official	354:e67efb2aab0e	401	hspi->pTxBuffPtr+=2;
mbed_official	354:e67efb2aab0e	402	hspi->TxXferCount--;
mbed_official	354:e67efb2aab0e	403	}
mbed_official	354:e67efb2aab0e	404	/* Enable CRC Transmission */
mbed_official	354:e67efb2aab0e	405	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
mbed_official	354:e67efb2aab0e	406	{
mbed_official	354:e67efb2aab0e	407	SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
mbed_official	354:e67efb2aab0e	408	}
mbed_official	354:e67efb2aab0e	409	}
mbed_official	354:e67efb2aab0e	410
mbed_official	354:e67efb2aab0e	411	/* Wait until TXE flag is set to send data */
mbed_official	354:e67efb2aab0e	412	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
mbed_official	354:e67efb2aab0e	413	{
mbed_official	354:e67efb2aab0e	414	SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
mbed_official	354:e67efb2aab0e	415	return HAL_TIMEOUT;
mbed_official	354:e67efb2aab0e	416	}
mbed_official	354:e67efb2aab0e	417
mbed_official	354:e67efb2aab0e	418	/* Wait until Busy flag is reset before disabling SPI */
mbed_official	354:e67efb2aab0e	419	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, Timeout) != HAL_OK)
mbed_official	354:e67efb2aab0e	420	{
mbed_official	354:e67efb2aab0e	421	SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
mbed_official	354:e67efb2aab0e	422	return HAL_TIMEOUT;
mbed_official	354:e67efb2aab0e	423	}
mbed_official	354:e67efb2aab0e	424
mbed_official	354:e67efb2aab0e	425	/* Clear OVERUN flag in 2 Lines communication mode because received is not read */
mbed_official	354:e67efb2aab0e	426	if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
mbed_official	354:e67efb2aab0e	427	{
mbed_official	354:e67efb2aab0e	428	__HAL_SPI_CLEAR_OVRFLAG(hspi);
mbed_official	354:e67efb2aab0e	429	}
mbed_official	354:e67efb2aab0e	430
mbed_official	354:e67efb2aab0e	431	hspi->State = HAL_SPI_STATE_READY;
mbed_official	354:e67efb2aab0e	432
mbed_official	354:e67efb2aab0e	433	/* Process Unlocked */
mbed_official	354:e67efb2aab0e	434	__HAL_UNLOCK(hspi);
mbed_official	354:e67efb2aab0e	435
mbed_official	354:e67efb2aab0e	436	return HAL_OK;
mbed_official	354:e67efb2aab0e	437	}
mbed_official	354:e67efb2aab0e	438	else
mbed_official	354:e67efb2aab0e	439	{
mbed_official	354:e67efb2aab0e	440	return HAL_BUSY;
mbed_official	354:e67efb2aab0e	441	}
mbed_official	354:e67efb2aab0e	442	}
mbed_official	354:e67efb2aab0e	443
mbed_official	354:e67efb2aab0e	444	/**
mbed_official	354:e67efb2aab0e	445	* @brief Receive an amount of data in blocking mode
mbed_official	354:e67efb2aab0e	446	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	354:e67efb2aab0e	447	* the configuration information for SPI module.
mbed_official	354:e67efb2aab0e	448	* @param pData: pointer to data buffer
mbed_official	354:e67efb2aab0e	449	* @param Size: amount of data to be sent
mbed_official	354:e67efb2aab0e	450	* @param Timeout: Timeout duration
mbed_official	354:e67efb2aab0e	451	* @retval HAL status
mbed_official	354:e67efb2aab0e	452	*/
mbed_official	354:e67efb2aab0e	453	HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef hspi, uint8_t pData, uint16_t Size, uint32_t Timeout)
mbed_official	354:e67efb2aab0e	454	{
mbed_official	354:e67efb2aab0e	455	__IO uint16_t tmpreg = 0;
mbed_official	354:e67efb2aab0e	456
mbed_official	354:e67efb2aab0e	457	if(hspi->State == HAL_SPI_STATE_READY)
mbed_official	354:e67efb2aab0e	458	{
mbed_official	354:e67efb2aab0e	459	if((pData == HAL_NULL ) \|\| (Size == 0))
mbed_official	354:e67efb2aab0e	460	{
mbed_official	354:e67efb2aab0e	461	return HAL_ERROR;
mbed_official	354:e67efb2aab0e	462	}
mbed_official	354:e67efb2aab0e	463
mbed_official	354:e67efb2aab0e	464	/* Process Locked */
mbed_official	354:e67efb2aab0e	465	__HAL_LOCK(hspi);
mbed_official	354:e67efb2aab0e	466
mbed_official	354:e67efb2aab0e	467	/* Configure communication */
mbed_official	354:e67efb2aab0e	468	hspi->State = HAL_SPI_STATE_BUSY_RX;
mbed_official	354:e67efb2aab0e	469	hspi->ErrorCode = HAL_SPI_ERROR_NONE;
mbed_official	354:e67efb2aab0e	470
mbed_official	354:e67efb2aab0e	471	hspi->pRxBuffPtr = pData;
mbed_official	354:e67efb2aab0e	472	hspi->RxXferSize = Size;
mbed_official	354:e67efb2aab0e	473	hspi->RxXferCount = Size;
mbed_official	354:e67efb2aab0e	474
mbed_official	354:e67efb2aab0e	475	/Init field not used in handle to zero /
mbed_official	354:e67efb2aab0e	476	hspi->RxISR = 0;
mbed_official	354:e67efb2aab0e	477	hspi->TxISR = 0;
mbed_official	354:e67efb2aab0e	478	hspi->pTxBuffPtr = HAL_NULL;
mbed_official	354:e67efb2aab0e	479	hspi->TxXferSize = 0;
mbed_official	354:e67efb2aab0e	480	hspi->TxXferCount = 0;
mbed_official	354:e67efb2aab0e	481
mbed_official	354:e67efb2aab0e	482	/* Configure communication direction : 1Line */
mbed_official	354:e67efb2aab0e	483	if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
mbed_official	354:e67efb2aab0e	484	{
mbed_official	354:e67efb2aab0e	485	SPI_1LINE_RX(hspi);
mbed_official	354:e67efb2aab0e	486	}
mbed_official	354:e67efb2aab0e	487
mbed_official	354:e67efb2aab0e	488	/* Reset CRC Calculation */
mbed_official	354:e67efb2aab0e	489	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
mbed_official	354:e67efb2aab0e	490	{
mbed_official	354:e67efb2aab0e	491	SPI_RESET_CRC(hspi);
mbed_official	354:e67efb2aab0e	492	}
mbed_official	354:e67efb2aab0e	493
mbed_official	354:e67efb2aab0e	494	if((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES))
mbed_official	354:e67efb2aab0e	495	{
mbed_official	354:e67efb2aab0e	496	/* Process Unlocked */
mbed_official	354:e67efb2aab0e	497	__HAL_UNLOCK(hspi);
mbed_official	354:e67efb2aab0e	498
mbed_official	354:e67efb2aab0e	499	/* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
mbed_official	354:e67efb2aab0e	500	return HAL_SPI_TransmitReceive(hspi, pData, pData, Size, Timeout);
mbed_official	354:e67efb2aab0e	501	}
mbed_official	354:e67efb2aab0e	502
mbed_official	354:e67efb2aab0e	503	/* Check if the SPI is already enabled */
mbed_official	354:e67efb2aab0e	504	if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
mbed_official	354:e67efb2aab0e	505	{
mbed_official	354:e67efb2aab0e	506	/* Enable SPI peripheral */
mbed_official	354:e67efb2aab0e	507	__HAL_SPI_ENABLE(hspi);
mbed_official	354:e67efb2aab0e	508	}
mbed_official	354:e67efb2aab0e	509
mbed_official	354:e67efb2aab0e	510	/* Receive data in 8 Bit mode */
mbed_official	354:e67efb2aab0e	511	if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
mbed_official	354:e67efb2aab0e	512	{
mbed_official	354:e67efb2aab0e	513	while(hspi->RxXferCount > 1)
mbed_official	354:e67efb2aab0e	514	{
mbed_official	354:e67efb2aab0e	515	/* Wait until RXNE flag is set */
mbed_official	354:e67efb2aab0e	516	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
mbed_official	354:e67efb2aab0e	517	{
mbed_official	354:e67efb2aab0e	518	return HAL_TIMEOUT;
mbed_official	354:e67efb2aab0e	519	}
mbed_official	354:e67efb2aab0e	520
mbed_official	354:e67efb2aab0e	521	(*hspi->pRxBuffPtr++) = hspi->Instance->DR;
mbed_official	354:e67efb2aab0e	522	hspi->RxXferCount--;
mbed_official	354:e67efb2aab0e	523	}
mbed_official	354:e67efb2aab0e	524	/* Enable CRC Transmission */
mbed_official	354:e67efb2aab0e	525	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
mbed_official	354:e67efb2aab0e	526	{
mbed_official	354:e67efb2aab0e	527	SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
mbed_official	354:e67efb2aab0e	528	}
mbed_official	354:e67efb2aab0e	529	}
mbed_official	354:e67efb2aab0e	530	/* Receive data in 16 Bit mode */
mbed_official	354:e67efb2aab0e	531	else
mbed_official	354:e67efb2aab0e	532	{
mbed_official	354:e67efb2aab0e	533	while(hspi->RxXferCount > 1)
mbed_official	354:e67efb2aab0e	534	{
mbed_official	354:e67efb2aab0e	535	/* Wait until RXNE flag is set to read data */
mbed_official	354:e67efb2aab0e	536	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
mbed_official	354:e67efb2aab0e	537	{
mbed_official	354:e67efb2aab0e	538	return HAL_TIMEOUT;
mbed_official	354:e67efb2aab0e	539	}
mbed_official	354:e67efb2aab0e	540
mbed_official	354:e67efb2aab0e	541	((uint16_t)hspi->pRxBuffPtr) = hspi->Instance->DR;
mbed_official	354:e67efb2aab0e	542	hspi->pRxBuffPtr+=2;
mbed_official	354:e67efb2aab0e	543	hspi->RxXferCount--;
mbed_official	354:e67efb2aab0e	544	}
mbed_official	354:e67efb2aab0e	545	/* Enable CRC Transmission */
mbed_official	354:e67efb2aab0e	546	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
mbed_official	354:e67efb2aab0e	547	{
mbed_official	354:e67efb2aab0e	548	SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
mbed_official	354:e67efb2aab0e	549	}
mbed_official	354:e67efb2aab0e	550	}
mbed_official	354:e67efb2aab0e	551
mbed_official	354:e67efb2aab0e	552	/* Wait until RXNE flag is set */
mbed_official	354:e67efb2aab0e	553	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
mbed_official	354:e67efb2aab0e	554	{
mbed_official	354:e67efb2aab0e	555	return HAL_TIMEOUT;
mbed_official	354:e67efb2aab0e	556	}
mbed_official	354:e67efb2aab0e	557
mbed_official	354:e67efb2aab0e	558	/* Receive last data in 8 Bit mode */
mbed_official	354:e67efb2aab0e	559	if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
mbed_official	354:e67efb2aab0e	560	{
mbed_official	354:e67efb2aab0e	561	(*hspi->pRxBuffPtr++) = hspi->Instance->DR;
mbed_official	354:e67efb2aab0e	562	}
mbed_official	354:e67efb2aab0e	563	/* Receive last data in 16 Bit mode */
mbed_official	354:e67efb2aab0e	564	else
mbed_official	354:e67efb2aab0e	565	{
mbed_official	354:e67efb2aab0e	566	((uint16_t)hspi->pRxBuffPtr) = hspi->Instance->DR;
mbed_official	354:e67efb2aab0e	567	hspi->pRxBuffPtr+=2;
mbed_official	354:e67efb2aab0e	568	}
mbed_official	354:e67efb2aab0e	569	hspi->RxXferCount--;
mbed_official	354:e67efb2aab0e	570
mbed_official	354:e67efb2aab0e	571	/* Wait until RXNE flag is set: CRC Received */
mbed_official	354:e67efb2aab0e	572	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
mbed_official	354:e67efb2aab0e	573	{
mbed_official	354:e67efb2aab0e	574	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
mbed_official	354:e67efb2aab0e	575	{
mbed_official	354:e67efb2aab0e	576	SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
mbed_official	354:e67efb2aab0e	577	return HAL_TIMEOUT;
mbed_official	354:e67efb2aab0e	578	}
mbed_official	354:e67efb2aab0e	579
mbed_official	354:e67efb2aab0e	580	/* Read CRC to Flush RXNE flag */
mbed_official	354:e67efb2aab0e	581	tmpreg = hspi->Instance->DR;
mbed_official	354:e67efb2aab0e	582	}
mbed_official	354:e67efb2aab0e	583
mbed_official	354:e67efb2aab0e	584	if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)\|\|(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
mbed_official	354:e67efb2aab0e	585	{
mbed_official	354:e67efb2aab0e	586	/* Disable SPI peripheral */
mbed_official	354:e67efb2aab0e	587	__HAL_SPI_DISABLE(hspi);
mbed_official	354:e67efb2aab0e	588	}
mbed_official	354:e67efb2aab0e	589
mbed_official	354:e67efb2aab0e	590	hspi->State = HAL_SPI_STATE_READY;
mbed_official	354:e67efb2aab0e	591
mbed_official	354:e67efb2aab0e	592	/* Check if CRC error occurred */
mbed_official	354:e67efb2aab0e	593	if((hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET))
mbed_official	354:e67efb2aab0e	594	{
mbed_official	354:e67efb2aab0e	595	SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
mbed_official	354:e67efb2aab0e	596
mbed_official	354:e67efb2aab0e	597	/* Reset CRC Calculation */
mbed_official	354:e67efb2aab0e	598	SPI_RESET_CRC(hspi);
mbed_official	354:e67efb2aab0e	599
mbed_official	354:e67efb2aab0e	600	/* Process Unlocked */
mbed_official	354:e67efb2aab0e	601	__HAL_UNLOCK(hspi);
mbed_official	354:e67efb2aab0e	602
mbed_official	354:e67efb2aab0e	603	return HAL_ERROR;
mbed_official	354:e67efb2aab0e	604	}
mbed_official	354:e67efb2aab0e	605
mbed_official	354:e67efb2aab0e	606	/* Process Unlocked */
mbed_official	354:e67efb2aab0e	607	__HAL_UNLOCK(hspi);
mbed_official	354:e67efb2aab0e	608
mbed_official	354:e67efb2aab0e	609	return HAL_OK;
mbed_official	354:e67efb2aab0e	610	}
mbed_official	354:e67efb2aab0e	611	else
mbed_official	354:e67efb2aab0e	612	{
mbed_official	354:e67efb2aab0e	613	return HAL_BUSY;
mbed_official	354:e67efb2aab0e	614	}
mbed_official	354:e67efb2aab0e	615	}
mbed_official	354:e67efb2aab0e	616
mbed_official	354:e67efb2aab0e	617	/**
mbed_official	354:e67efb2aab0e	618	* @brief Transmit and Receive an amount of data in blocking mode
mbed_official	354:e67efb2aab0e	619	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	354:e67efb2aab0e	620	* the configuration information for SPI module.
mbed_official	354:e67efb2aab0e	621	* @param pTxData: pointer to transmission data buffer
mbed_official	354:e67efb2aab0e	622	* @param pRxData: pointer to reception data buffer to be
mbed_official	354:e67efb2aab0e	623	* @param Size: amount of data to be sent
mbed_official	354:e67efb2aab0e	624	* @param Timeout: Timeout duration
mbed_official	354:e67efb2aab0e	625	* @retval HAL status
mbed_official	354:e67efb2aab0e	626	*/
mbed_official	354:e67efb2aab0e	627	HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef hspi, uint8_t pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout)
mbed_official	354:e67efb2aab0e	628	{
mbed_official	354:e67efb2aab0e	629	__IO uint16_t tmpreg = 0;
mbed_official	354:e67efb2aab0e	630
mbed_official	354:e67efb2aab0e	631	if((hspi->State == HAL_SPI_STATE_READY) \|\| (hspi->State == HAL_SPI_STATE_BUSY_RX))
mbed_official	354:e67efb2aab0e	632	{
mbed_official	354:e67efb2aab0e	633	if((pTxData == HAL_NULL ) \|\| (pRxData == HAL_NULL ) \|\| (Size == 0))
mbed_official	354:e67efb2aab0e	634	{
mbed_official	354:e67efb2aab0e	635	return HAL_ERROR;
mbed_official	354:e67efb2aab0e	636	}
mbed_official	354:e67efb2aab0e	637
mbed_official	354:e67efb2aab0e	638	/* Check the parameters */
mbed_official	354:e67efb2aab0e	639	assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
mbed_official	354:e67efb2aab0e	640
mbed_official	354:e67efb2aab0e	641	/* Process Locked */
mbed_official	354:e67efb2aab0e	642	__HAL_LOCK(hspi);
mbed_official	354:e67efb2aab0e	643
mbed_official	354:e67efb2aab0e	644	/* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
mbed_official	354:e67efb2aab0e	645	if(hspi->State == HAL_SPI_STATE_READY)
mbed_official	354:e67efb2aab0e	646	{
mbed_official	354:e67efb2aab0e	647	hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
mbed_official	354:e67efb2aab0e	648	}
mbed_official	354:e67efb2aab0e	649
mbed_official	354:e67efb2aab0e	650	/* Configure communication */
mbed_official	354:e67efb2aab0e	651	hspi->ErrorCode = HAL_SPI_ERROR_NONE;
mbed_official	354:e67efb2aab0e	652
mbed_official	354:e67efb2aab0e	653	hspi->pRxBuffPtr = pRxData;
mbed_official	354:e67efb2aab0e	654	hspi->RxXferSize = Size;
mbed_official	354:e67efb2aab0e	655	hspi->RxXferCount = Size;
mbed_official	354:e67efb2aab0e	656
mbed_official	354:e67efb2aab0e	657	hspi->pTxBuffPtr = pTxData;
mbed_official	354:e67efb2aab0e	658	hspi->TxXferSize = Size;
mbed_official	354:e67efb2aab0e	659	hspi->TxXferCount = Size;
mbed_official	354:e67efb2aab0e	660
mbed_official	354:e67efb2aab0e	661	/Init field not used in handle to zero /
mbed_official	354:e67efb2aab0e	662	hspi->RxISR = 0;
mbed_official	354:e67efb2aab0e	663	hspi->TxISR = 0;
mbed_official	354:e67efb2aab0e	664
mbed_official	354:e67efb2aab0e	665	/* Reset CRC Calculation */
mbed_official	354:e67efb2aab0e	666	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
mbed_official	354:e67efb2aab0e	667	{
mbed_official	354:e67efb2aab0e	668	SPI_RESET_CRC(hspi);
mbed_official	354:e67efb2aab0e	669	}
mbed_official	354:e67efb2aab0e	670
mbed_official	354:e67efb2aab0e	671	/* Check if the SPI is already enabled */
mbed_official	354:e67efb2aab0e	672	if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
mbed_official	354:e67efb2aab0e	673	{
mbed_official	354:e67efb2aab0e	674	/* Enable SPI peripheral */
mbed_official	354:e67efb2aab0e	675	__HAL_SPI_ENABLE(hspi);
mbed_official	354:e67efb2aab0e	676	}
mbed_official	354:e67efb2aab0e	677
mbed_official	354:e67efb2aab0e	678	/* Transmit and Receive data in 16 Bit mode */
mbed_official	354:e67efb2aab0e	679	if(hspi->Init.DataSize == SPI_DATASIZE_16BIT)
mbed_official	354:e67efb2aab0e	680	{
mbed_official	354:e67efb2aab0e	681	if((hspi->Init.Mode == SPI_MODE_SLAVE) \|\| ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->TxXferCount == 0x01)))
mbed_official	354:e67efb2aab0e	682	{
mbed_official	354:e67efb2aab0e	683	hspi->Instance->DR = ((uint16_t)hspi->pTxBuffPtr);
mbed_official	354:e67efb2aab0e	684	hspi->pTxBuffPtr+=2;
mbed_official	354:e67efb2aab0e	685	hspi->TxXferCount--;
mbed_official	354:e67efb2aab0e	686	}
mbed_official	354:e67efb2aab0e	687	if(hspi->TxXferCount == 0)
mbed_official	354:e67efb2aab0e	688	{
mbed_official	354:e67efb2aab0e	689	/* Enable CRC Transmission */
mbed_official	354:e67efb2aab0e	690	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
mbed_official	354:e67efb2aab0e	691	{
mbed_official	354:e67efb2aab0e	692	SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
mbed_official	354:e67efb2aab0e	693	}
mbed_official	354:e67efb2aab0e	694
mbed_official	354:e67efb2aab0e	695	/* Wait until RXNE flag is set */
mbed_official	354:e67efb2aab0e	696	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
mbed_official	354:e67efb2aab0e	697	{
mbed_official	354:e67efb2aab0e	698	return HAL_TIMEOUT;
mbed_official	354:e67efb2aab0e	699	}
mbed_official	354:e67efb2aab0e	700
mbed_official	354:e67efb2aab0e	701	((uint16_t)hspi->pRxBuffPtr) = hspi->Instance->DR;
mbed_official	354:e67efb2aab0e	702	hspi->pRxBuffPtr+=2;
mbed_official	354:e67efb2aab0e	703	hspi->RxXferCount--;
mbed_official	354:e67efb2aab0e	704	}
mbed_official	354:e67efb2aab0e	705	else
mbed_official	354:e67efb2aab0e	706	{
mbed_official	354:e67efb2aab0e	707	while(hspi->TxXferCount > 0)
mbed_official	354:e67efb2aab0e	708	{
mbed_official	354:e67efb2aab0e	709	/* Wait until TXE flag is set to send data */
mbed_official	354:e67efb2aab0e	710	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
mbed_official	354:e67efb2aab0e	711	{
mbed_official	354:e67efb2aab0e	712	return HAL_TIMEOUT;
mbed_official	354:e67efb2aab0e	713	}
mbed_official	354:e67efb2aab0e	714
mbed_official	354:e67efb2aab0e	715	hspi->Instance->DR = ((uint16_t)hspi->pTxBuffPtr);
mbed_official	354:e67efb2aab0e	716	hspi->pTxBuffPtr+=2;
mbed_official	354:e67efb2aab0e	717	hspi->TxXferCount--;
mbed_official	354:e67efb2aab0e	718
mbed_official	354:e67efb2aab0e	719	/* Enable CRC Transmission */
mbed_official	354:e67efb2aab0e	720	if((hspi->TxXferCount == 0) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED))
mbed_official	354:e67efb2aab0e	721	{
mbed_official	354:e67efb2aab0e	722	SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
mbed_official	354:e67efb2aab0e	723	}
mbed_official	354:e67efb2aab0e	724
mbed_official	354:e67efb2aab0e	725	/* Wait until RXNE flag is set */
mbed_official	354:e67efb2aab0e	726	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
mbed_official	354:e67efb2aab0e	727	{
mbed_official	354:e67efb2aab0e	728	return HAL_TIMEOUT;
mbed_official	354:e67efb2aab0e	729	}
mbed_official	354:e67efb2aab0e	730
mbed_official	354:e67efb2aab0e	731	((uint16_t)hspi->pRxBuffPtr) = hspi->Instance->DR;
mbed_official	354:e67efb2aab0e	732	hspi->pRxBuffPtr+=2;
mbed_official	354:e67efb2aab0e	733	hspi->RxXferCount--;
mbed_official	354:e67efb2aab0e	734	}
mbed_official	354:e67efb2aab0e	735	/* Receive the last byte */
mbed_official	354:e67efb2aab0e	736	if(hspi->Init.Mode == SPI_MODE_SLAVE)
mbed_official	354:e67efb2aab0e	737	{
mbed_official	354:e67efb2aab0e	738	/* Wait until RXNE flag is set */
mbed_official	354:e67efb2aab0e	739	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
mbed_official	354:e67efb2aab0e	740	{
mbed_official	354:e67efb2aab0e	741	return HAL_TIMEOUT;
mbed_official	354:e67efb2aab0e	742	}
mbed_official	354:e67efb2aab0e	743
mbed_official	354:e67efb2aab0e	744	((uint16_t)hspi->pRxBuffPtr) = hspi->Instance->DR;
mbed_official	354:e67efb2aab0e	745	hspi->pRxBuffPtr+=2;
mbed_official	354:e67efb2aab0e	746	hspi->RxXferCount--;
mbed_official	354:e67efb2aab0e	747	}
mbed_official	354:e67efb2aab0e	748	}
mbed_official	354:e67efb2aab0e	749	}
mbed_official	354:e67efb2aab0e	750	/* Transmit and Receive data in 8 Bit mode */
mbed_official	354:e67efb2aab0e	751	else
mbed_official	354:e67efb2aab0e	752	{
mbed_official	354:e67efb2aab0e	753	if((hspi->Init.Mode == SPI_MODE_SLAVE) \|\| ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->TxXferCount == 0x01)))
mbed_official	354:e67efb2aab0e	754	{
mbed_official	354:e67efb2aab0e	755	hspi->Instance->DR = (*hspi->pTxBuffPtr++);
mbed_official	354:e67efb2aab0e	756	hspi->TxXferCount--;
mbed_official	354:e67efb2aab0e	757	}
mbed_official	354:e67efb2aab0e	758	if(hspi->TxXferCount == 0)
mbed_official	354:e67efb2aab0e	759	{
mbed_official	354:e67efb2aab0e	760	/* Enable CRC Transmission */
mbed_official	354:e67efb2aab0e	761	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
mbed_official	354:e67efb2aab0e	762	{
mbed_official	354:e67efb2aab0e	763	SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
mbed_official	354:e67efb2aab0e	764	}
mbed_official	354:e67efb2aab0e	765
mbed_official	354:e67efb2aab0e	766	/* Wait until RXNE flag is set */
mbed_official	354:e67efb2aab0e	767	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
mbed_official	354:e67efb2aab0e	768	{
mbed_official	354:e67efb2aab0e	769	return HAL_TIMEOUT;
mbed_official	354:e67efb2aab0e	770	}
mbed_official	354:e67efb2aab0e	771
mbed_official	354:e67efb2aab0e	772	(*hspi->pRxBuffPtr) = hspi->Instance->DR;
mbed_official	354:e67efb2aab0e	773	hspi->RxXferCount--;
mbed_official	354:e67efb2aab0e	774	}
mbed_official	354:e67efb2aab0e	775	else
mbed_official	354:e67efb2aab0e	776	{
mbed_official	354:e67efb2aab0e	777	while(hspi->TxXferCount > 0)
mbed_official	354:e67efb2aab0e	778	{
mbed_official	354:e67efb2aab0e	779	/* Wait until TXE flag is set to send data */
mbed_official	354:e67efb2aab0e	780	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
mbed_official	354:e67efb2aab0e	781	{
mbed_official	354:e67efb2aab0e	782	return HAL_TIMEOUT;
mbed_official	354:e67efb2aab0e	783	}
mbed_official	354:e67efb2aab0e	784
mbed_official	354:e67efb2aab0e	785	hspi->Instance->DR = (*hspi->pTxBuffPtr++);
mbed_official	354:e67efb2aab0e	786	hspi->TxXferCount--;
mbed_official	354:e67efb2aab0e	787
mbed_official	354:e67efb2aab0e	788	/* Enable CRC Transmission */
mbed_official	354:e67efb2aab0e	789	if((hspi->TxXferCount == 0) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED))
mbed_official	354:e67efb2aab0e	790	{
mbed_official	354:e67efb2aab0e	791	SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
mbed_official	354:e67efb2aab0e	792	}
mbed_official	354:e67efb2aab0e	793
mbed_official	354:e67efb2aab0e	794	/* Wait until RXNE flag is set */
mbed_official	354:e67efb2aab0e	795	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
mbed_official	354:e67efb2aab0e	796	{
mbed_official	354:e67efb2aab0e	797	return HAL_TIMEOUT;
mbed_official	354:e67efb2aab0e	798	}
mbed_official	354:e67efb2aab0e	799
mbed_official	354:e67efb2aab0e	800	(*hspi->pRxBuffPtr++) = hspi->Instance->DR;
mbed_official	354:e67efb2aab0e	801	hspi->RxXferCount--;
mbed_official	354:e67efb2aab0e	802	}
mbed_official	354:e67efb2aab0e	803	if(hspi->Init.Mode == SPI_MODE_SLAVE)
mbed_official	354:e67efb2aab0e	804	{
mbed_official	354:e67efb2aab0e	805	/* Wait until RXNE flag is set */
mbed_official	354:e67efb2aab0e	806	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
mbed_official	354:e67efb2aab0e	807	{
mbed_official	354:e67efb2aab0e	808	return HAL_TIMEOUT;
mbed_official	354:e67efb2aab0e	809	}
mbed_official	354:e67efb2aab0e	810
mbed_official	354:e67efb2aab0e	811	(*hspi->pRxBuffPtr++) = hspi->Instance->DR;
mbed_official	354:e67efb2aab0e	812	hspi->RxXferCount--;
mbed_official	354:e67efb2aab0e	813	}
mbed_official	354:e67efb2aab0e	814	}
mbed_official	354:e67efb2aab0e	815	}
mbed_official	354:e67efb2aab0e	816
mbed_official	354:e67efb2aab0e	817	/* Read CRC from DR to close CRC calculation process */
mbed_official	354:e67efb2aab0e	818	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
mbed_official	354:e67efb2aab0e	819	{
mbed_official	354:e67efb2aab0e	820	/* Wait until RXNE flag is set */
mbed_official	354:e67efb2aab0e	821	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
mbed_official	354:e67efb2aab0e	822	{
mbed_official	354:e67efb2aab0e	823	SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
mbed_official	354:e67efb2aab0e	824	return HAL_TIMEOUT;
mbed_official	354:e67efb2aab0e	825	}
mbed_official	354:e67efb2aab0e	826	/* Read CRC */
mbed_official	354:e67efb2aab0e	827	tmpreg = hspi->Instance->DR;
mbed_official	354:e67efb2aab0e	828	}
mbed_official	354:e67efb2aab0e	829
mbed_official	354:e67efb2aab0e	830	/* Wait until Busy flag is reset before disabling SPI */
mbed_official	354:e67efb2aab0e	831	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, Timeout) != HAL_OK)
mbed_official	354:e67efb2aab0e	832	{
mbed_official	354:e67efb2aab0e	833	SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
mbed_official	354:e67efb2aab0e	834	return HAL_TIMEOUT;
mbed_official	354:e67efb2aab0e	835	}
mbed_official	354:e67efb2aab0e	836
mbed_official	354:e67efb2aab0e	837	hspi->State = HAL_SPI_STATE_READY;
mbed_official	354:e67efb2aab0e	838
mbed_official	354:e67efb2aab0e	839	/* Check if CRC error occurred */
mbed_official	354:e67efb2aab0e	840	if((hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET))
mbed_official	354:e67efb2aab0e	841	{
mbed_official	354:e67efb2aab0e	842	SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
mbed_official	354:e67efb2aab0e	843
mbed_official	354:e67efb2aab0e	844	/* Reset CRC Calculation */
mbed_official	354:e67efb2aab0e	845	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
mbed_official	354:e67efb2aab0e	846	{
mbed_official	354:e67efb2aab0e	847	SPI_RESET_CRC(hspi);
mbed_official	354:e67efb2aab0e	848	}
mbed_official	354:e67efb2aab0e	849
mbed_official	354:e67efb2aab0e	850	/* Process Unlocked */
mbed_official	354:e67efb2aab0e	851	__HAL_UNLOCK(hspi);
mbed_official	354:e67efb2aab0e	852
mbed_official	354:e67efb2aab0e	853	return HAL_ERROR;
mbed_official	354:e67efb2aab0e	854	}
mbed_official	354:e67efb2aab0e	855
mbed_official	354:e67efb2aab0e	856	/* Process Unlocked */
mbed_official	354:e67efb2aab0e	857	__HAL_UNLOCK(hspi);
mbed_official	354:e67efb2aab0e	858
mbed_official	354:e67efb2aab0e	859	return HAL_OK;
mbed_official	354:e67efb2aab0e	860	}
mbed_official	354:e67efb2aab0e	861	else
mbed_official	354:e67efb2aab0e	862	{
mbed_official	354:e67efb2aab0e	863	return HAL_BUSY;
mbed_official	354:e67efb2aab0e	864	}
mbed_official	354:e67efb2aab0e	865	}
mbed_official	354:e67efb2aab0e	866
mbed_official	354:e67efb2aab0e	867	/**
mbed_official	354:e67efb2aab0e	868	* @brief Transmit an amount of data in no-blocking mode with Interrupt
mbed_official	354:e67efb2aab0e	869	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	354:e67efb2aab0e	870	* the configuration information for SPI module.
mbed_official	354:e67efb2aab0e	871	* @param pData: pointer to data buffer
mbed_official	354:e67efb2aab0e	872	* @param Size: amount of data to be sent
mbed_official	354:e67efb2aab0e	873	* @retval HAL status
mbed_official	354:e67efb2aab0e	874	*/
mbed_official	354:e67efb2aab0e	875	HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef hspi, uint8_t pData, uint16_t Size)
mbed_official	354:e67efb2aab0e	876	{
mbed_official	354:e67efb2aab0e	877	if(hspi->State == HAL_SPI_STATE_READY)
mbed_official	354:e67efb2aab0e	878	{
mbed_official	354:e67efb2aab0e	879	if((pData == HAL_NULL) \|\| (Size == 0))
mbed_official	354:e67efb2aab0e	880	{
mbed_official	354:e67efb2aab0e	881	return HAL_ERROR;
mbed_official	354:e67efb2aab0e	882	}
mbed_official	354:e67efb2aab0e	883
mbed_official	354:e67efb2aab0e	884	/* Check the parameters */
mbed_official	354:e67efb2aab0e	885	assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
mbed_official	354:e67efb2aab0e	886
mbed_official	354:e67efb2aab0e	887	/* Process Locked */
mbed_official	354:e67efb2aab0e	888	__HAL_LOCK(hspi);
mbed_official	354:e67efb2aab0e	889
mbed_official	354:e67efb2aab0e	890	/* Configure communication */
mbed_official	354:e67efb2aab0e	891	hspi->State = HAL_SPI_STATE_BUSY_TX;
mbed_official	354:e67efb2aab0e	892	hspi->ErrorCode = HAL_SPI_ERROR_NONE;
mbed_official	354:e67efb2aab0e	893
mbed_official	354:e67efb2aab0e	894	hspi->TxISR = &SPI_TxISR;
mbed_official	354:e67efb2aab0e	895	hspi->pTxBuffPtr = pData;
mbed_official	354:e67efb2aab0e	896	hspi->TxXferSize = Size;
mbed_official	354:e67efb2aab0e	897	hspi->TxXferCount = Size;
mbed_official	354:e67efb2aab0e	898
mbed_official	354:e67efb2aab0e	899	/Init field not used in handle to zero /
mbed_official	354:e67efb2aab0e	900	hspi->RxISR = 0;
mbed_official	354:e67efb2aab0e	901	hspi->pRxBuffPtr = HAL_NULL;
mbed_official	354:e67efb2aab0e	902	hspi->RxXferSize = 0;
mbed_official	354:e67efb2aab0e	903	hspi->RxXferCount = 0;
mbed_official	354:e67efb2aab0e	904
mbed_official	354:e67efb2aab0e	905	/* Configure communication direction : 1Line */
mbed_official	354:e67efb2aab0e	906	if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
mbed_official	354:e67efb2aab0e	907	{
mbed_official	354:e67efb2aab0e	908	SPI_1LINE_TX(hspi);
mbed_official	354:e67efb2aab0e	909	}
mbed_official	354:e67efb2aab0e	910
mbed_official	354:e67efb2aab0e	911	/* Reset CRC Calculation */
mbed_official	354:e67efb2aab0e	912	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
mbed_official	354:e67efb2aab0e	913	{
mbed_official	354:e67efb2aab0e	914	SPI_RESET_CRC(hspi);
mbed_official	354:e67efb2aab0e	915	}
mbed_official	354:e67efb2aab0e	916
mbed_official	354:e67efb2aab0e	917	if (hspi->Init.Direction == SPI_DIRECTION_2LINES)
mbed_official	354:e67efb2aab0e	918	{
mbed_official	354:e67efb2aab0e	919	__HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE));
mbed_official	354:e67efb2aab0e	920	}else
mbed_official	354:e67efb2aab0e	921	{
mbed_official	354:e67efb2aab0e	922	/* Enable TXE and ERR interrupt */
mbed_official	354:e67efb2aab0e	923	__HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE \| SPI_IT_ERR));
mbed_official	354:e67efb2aab0e	924	}
mbed_official	354:e67efb2aab0e	925	/* Process Unlocked */
mbed_official	354:e67efb2aab0e	926	__HAL_UNLOCK(hspi);
mbed_official	354:e67efb2aab0e	927
mbed_official	354:e67efb2aab0e	928	/* Check if the SPI is already enabled */
mbed_official	354:e67efb2aab0e	929	if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
mbed_official	354:e67efb2aab0e	930	{
mbed_official	354:e67efb2aab0e	931	/* Enable SPI peripheral */
mbed_official	354:e67efb2aab0e	932	__HAL_SPI_ENABLE(hspi);
mbed_official	354:e67efb2aab0e	933	}
mbed_official	354:e67efb2aab0e	934
mbed_official	354:e67efb2aab0e	935	return HAL_OK;
mbed_official	354:e67efb2aab0e	936	}
mbed_official	354:e67efb2aab0e	937	else
mbed_official	354:e67efb2aab0e	938	{
mbed_official	354:e67efb2aab0e	939	return HAL_BUSY;
mbed_official	354:e67efb2aab0e	940	}
mbed_official	354:e67efb2aab0e	941	}
mbed_official	354:e67efb2aab0e	942
mbed_official	354:e67efb2aab0e	943	/**
mbed_official	354:e67efb2aab0e	944	* @brief Receive an amount of data in no-blocking mode with Interrupt
mbed_official	354:e67efb2aab0e	945	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	354:e67efb2aab0e	946	* the configuration information for SPI module.
mbed_official	354:e67efb2aab0e	947	* @param pData: pointer to data buffer
mbed_official	354:e67efb2aab0e	948	* @param Size: amount of data to be sent
mbed_official	354:e67efb2aab0e	949	* @retval HAL status
mbed_official	354:e67efb2aab0e	950	*/
mbed_official	354:e67efb2aab0e	951	HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef hspi, uint8_t pData, uint16_t Size)
mbed_official	354:e67efb2aab0e	952	{
mbed_official	354:e67efb2aab0e	953	if(hspi->State == HAL_SPI_STATE_READY)
mbed_official	354:e67efb2aab0e	954	{
mbed_official	354:e67efb2aab0e	955	if((pData == HAL_NULL) \|\| (Size == 0))
mbed_official	354:e67efb2aab0e	956	{
mbed_official	354:e67efb2aab0e	957	return HAL_ERROR;
mbed_official	354:e67efb2aab0e	958	}
mbed_official	354:e67efb2aab0e	959
mbed_official	354:e67efb2aab0e	960	/* Process Locked */
mbed_official	354:e67efb2aab0e	961	__HAL_LOCK(hspi);
mbed_official	354:e67efb2aab0e	962
mbed_official	354:e67efb2aab0e	963	/* Configure communication */
mbed_official	354:e67efb2aab0e	964	hspi->State = HAL_SPI_STATE_BUSY_RX;
mbed_official	354:e67efb2aab0e	965	hspi->ErrorCode = HAL_SPI_ERROR_NONE;
mbed_official	354:e67efb2aab0e	966
mbed_official	354:e67efb2aab0e	967	hspi->RxISR = &SPI_RxISR;
mbed_official	354:e67efb2aab0e	968	hspi->pRxBuffPtr = pData;
mbed_official	354:e67efb2aab0e	969	hspi->RxXferSize = Size;
mbed_official	354:e67efb2aab0e	970	hspi->RxXferCount = Size ;
mbed_official	354:e67efb2aab0e	971
mbed_official	354:e67efb2aab0e	972	/Init field not used in handle to zero /
mbed_official	354:e67efb2aab0e	973	hspi->TxISR = 0;
mbed_official	354:e67efb2aab0e	974	hspi->pTxBuffPtr = HAL_NULL;
mbed_official	354:e67efb2aab0e	975	hspi->TxXferSize = 0;
mbed_official	354:e67efb2aab0e	976	hspi->TxXferCount = 0;
mbed_official	354:e67efb2aab0e	977
mbed_official	354:e67efb2aab0e	978	/* Configure communication direction : 1Line */
mbed_official	354:e67efb2aab0e	979	if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
mbed_official	354:e67efb2aab0e	980	{
mbed_official	354:e67efb2aab0e	981	SPI_1LINE_RX(hspi);
mbed_official	354:e67efb2aab0e	982	}
mbed_official	354:e67efb2aab0e	983	else if((hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->Init.Mode == SPI_MODE_MASTER))
mbed_official	354:e67efb2aab0e	984	{
mbed_official	354:e67efb2aab0e	985	/* Process Unlocked */
mbed_official	354:e67efb2aab0e	986	__HAL_UNLOCK(hspi);
mbed_official	354:e67efb2aab0e	987
mbed_official	354:e67efb2aab0e	988	/* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
mbed_official	354:e67efb2aab0e	989	return HAL_SPI_TransmitReceive_IT(hspi, pData, pData, Size);
mbed_official	354:e67efb2aab0e	990	}
mbed_official	354:e67efb2aab0e	991
mbed_official	354:e67efb2aab0e	992	/* Reset CRC Calculation */
mbed_official	354:e67efb2aab0e	993	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
mbed_official	354:e67efb2aab0e	994	{
mbed_official	354:e67efb2aab0e	995	SPI_RESET_CRC(hspi);
mbed_official	354:e67efb2aab0e	996	}
mbed_official	354:e67efb2aab0e	997
mbed_official	354:e67efb2aab0e	998	/* Enable TXE and ERR interrupt */
mbed_official	354:e67efb2aab0e	999	__HAL_SPI_ENABLE_IT(hspi, (SPI_IT_RXNE \| SPI_IT_ERR));
mbed_official	354:e67efb2aab0e	1000
mbed_official	354:e67efb2aab0e	1001	/* Process Unlocked */
mbed_official	354:e67efb2aab0e	1002	__HAL_UNLOCK(hspi);
mbed_official	354:e67efb2aab0e	1003
mbed_official	354:e67efb2aab0e	1004	/* Note : The SPI must be enabled after unlocking current process
mbed_official	354:e67efb2aab0e	1005	to avoid the risk of SPI interrupt handle execution before current
mbed_official	354:e67efb2aab0e	1006	process unlock */
mbed_official	354:e67efb2aab0e	1007
mbed_official	354:e67efb2aab0e	1008	/* Check if the SPI is already enabled */
mbed_official	354:e67efb2aab0e	1009	if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
mbed_official	354:e67efb2aab0e	1010	{
mbed_official	354:e67efb2aab0e	1011	/* Enable SPI peripheral */
mbed_official	354:e67efb2aab0e	1012	__HAL_SPI_ENABLE(hspi);
mbed_official	354:e67efb2aab0e	1013	}
mbed_official	354:e67efb2aab0e	1014
mbed_official	354:e67efb2aab0e	1015	return HAL_OK;
mbed_official	354:e67efb2aab0e	1016	}
mbed_official	354:e67efb2aab0e	1017	else
mbed_official	354:e67efb2aab0e	1018	{
mbed_official	354:e67efb2aab0e	1019	return HAL_BUSY;
mbed_official	354:e67efb2aab0e	1020	}
mbed_official	354:e67efb2aab0e	1021	}
mbed_official	354:e67efb2aab0e	1022
mbed_official	354:e67efb2aab0e	1023	/**
mbed_official	354:e67efb2aab0e	1024	* @brief Transmit and Receive an amount of data in no-blocking mode with Interrupt
mbed_official	354:e67efb2aab0e	1025	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	354:e67efb2aab0e	1026	* the configuration information for SPI module.
mbed_official	354:e67efb2aab0e	1027	* @param pTxData: pointer to transmission data buffer
mbed_official	354:e67efb2aab0e	1028	* @param pRxData: pointer to reception data buffer to be
mbed_official	354:e67efb2aab0e	1029	* @param Size: amount of data to be sent
mbed_official	354:e67efb2aab0e	1030	* @retval HAL status
mbed_official	354:e67efb2aab0e	1031	*/
mbed_official	354:e67efb2aab0e	1032	HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef hspi, uint8_t pTxData, uint8_t *pRxData, uint16_t Size)
mbed_official	354:e67efb2aab0e	1033	{
mbed_official	354:e67efb2aab0e	1034
mbed_official	354:e67efb2aab0e	1035	if((hspi->State == HAL_SPI_STATE_READY) \|\| \
mbed_official	354:e67efb2aab0e	1036	((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->State == HAL_SPI_STATE_BUSY_RX)))
mbed_official	354:e67efb2aab0e	1037	{
mbed_official	354:e67efb2aab0e	1038	if((pTxData == HAL_NULL ) \|\| (pRxData == HAL_NULL ) \|\| (Size == 0))
mbed_official	354:e67efb2aab0e	1039	{
mbed_official	354:e67efb2aab0e	1040	return HAL_ERROR;
mbed_official	354:e67efb2aab0e	1041	}
mbed_official	354:e67efb2aab0e	1042
mbed_official	354:e67efb2aab0e	1043	/* Check the parameters */
mbed_official	354:e67efb2aab0e	1044	assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
mbed_official	354:e67efb2aab0e	1045
mbed_official	354:e67efb2aab0e	1046	/* Process locked */
mbed_official	354:e67efb2aab0e	1047	__HAL_LOCK(hspi);
mbed_official	354:e67efb2aab0e	1048
mbed_official	354:e67efb2aab0e	1049	/* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
mbed_official	354:e67efb2aab0e	1050	if(hspi->State != HAL_SPI_STATE_BUSY_RX)
mbed_official	354:e67efb2aab0e	1051	{
mbed_official	354:e67efb2aab0e	1052	hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
mbed_official	354:e67efb2aab0e	1053	}
mbed_official	354:e67efb2aab0e	1054
mbed_official	354:e67efb2aab0e	1055	/* Configure communication */
mbed_official	354:e67efb2aab0e	1056	hspi->ErrorCode = HAL_SPI_ERROR_NONE;
mbed_official	354:e67efb2aab0e	1057
mbed_official	354:e67efb2aab0e	1058	hspi->TxISR = &SPI_TxISR;
mbed_official	354:e67efb2aab0e	1059	hspi->pTxBuffPtr = pTxData;
mbed_official	354:e67efb2aab0e	1060	hspi->TxXferSize = Size;
mbed_official	354:e67efb2aab0e	1061	hspi->TxXferCount = Size;
mbed_official	354:e67efb2aab0e	1062
mbed_official	354:e67efb2aab0e	1063	hspi->RxISR = &SPI_2LinesRxISR;
mbed_official	354:e67efb2aab0e	1064	hspi->pRxBuffPtr = pRxData;
mbed_official	354:e67efb2aab0e	1065	hspi->RxXferSize = Size;
mbed_official	354:e67efb2aab0e	1066	hspi->RxXferCount = Size;
mbed_official	354:e67efb2aab0e	1067
mbed_official	354:e67efb2aab0e	1068	/* Reset CRC Calculation */
mbed_official	354:e67efb2aab0e	1069	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
mbed_official	354:e67efb2aab0e	1070	{
mbed_official	354:e67efb2aab0e	1071	SPI_RESET_CRC(hspi);
mbed_official	354:e67efb2aab0e	1072	}
mbed_official	354:e67efb2aab0e	1073
mbed_official	354:e67efb2aab0e	1074	/* Enable TXE, RXNE and ERR interrupt */
mbed_official	354:e67efb2aab0e	1075	__HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE \| SPI_IT_RXNE \| SPI_IT_ERR));
mbed_official	354:e67efb2aab0e	1076
mbed_official	354:e67efb2aab0e	1077	/* Process Unlocked */
mbed_official	354:e67efb2aab0e	1078	__HAL_UNLOCK(hspi);
mbed_official	354:e67efb2aab0e	1079
mbed_official	354:e67efb2aab0e	1080	/* Check if the SPI is already enabled */
mbed_official	354:e67efb2aab0e	1081	if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
mbed_official	354:e67efb2aab0e	1082	{
mbed_official	354:e67efb2aab0e	1083	/* Enable SPI peripheral */
mbed_official	354:e67efb2aab0e	1084	__HAL_SPI_ENABLE(hspi);
mbed_official	354:e67efb2aab0e	1085	}
mbed_official	354:e67efb2aab0e	1086
mbed_official	354:e67efb2aab0e	1087	return HAL_OK;
mbed_official	354:e67efb2aab0e	1088	}
mbed_official	354:e67efb2aab0e	1089	else
mbed_official	354:e67efb2aab0e	1090	{
mbed_official	354:e67efb2aab0e	1091	return HAL_BUSY;
mbed_official	354:e67efb2aab0e	1092	}
mbed_official	354:e67efb2aab0e	1093	}
mbed_official	354:e67efb2aab0e	1094
mbed_official	354:e67efb2aab0e	1095	/**
mbed_official	354:e67efb2aab0e	1096	* @brief Transmit an amount of data in no-blocking mode with DMA
mbed_official	354:e67efb2aab0e	1097	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	354:e67efb2aab0e	1098	* the configuration information for SPI module.
mbed_official	354:e67efb2aab0e	1099	* @param pData: pointer to data buffer
mbed_official	354:e67efb2aab0e	1100	* @param Size: amount of data to be sent
mbed_official	354:e67efb2aab0e	1101	* @retval HAL status
mbed_official	354:e67efb2aab0e	1102	*/
mbed_official	354:e67efb2aab0e	1103	HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef hspi, uint8_t pData, uint16_t Size)
mbed_official	354:e67efb2aab0e	1104	{
mbed_official	354:e67efb2aab0e	1105	if(hspi->State == HAL_SPI_STATE_READY)
mbed_official	354:e67efb2aab0e	1106	{
mbed_official	354:e67efb2aab0e	1107	if((pData == HAL_NULL) \|\| (Size == 0))
mbed_official	354:e67efb2aab0e	1108	{
mbed_official	354:e67efb2aab0e	1109	return HAL_ERROR;
mbed_official	354:e67efb2aab0e	1110	}
mbed_official	354:e67efb2aab0e	1111
mbed_official	354:e67efb2aab0e	1112	/* Check the parameters */
mbed_official	354:e67efb2aab0e	1113	assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
mbed_official	354:e67efb2aab0e	1114
mbed_official	354:e67efb2aab0e	1115	/* Process Locked */
mbed_official	354:e67efb2aab0e	1116	__HAL_LOCK(hspi);
mbed_official	354:e67efb2aab0e	1117
mbed_official	354:e67efb2aab0e	1118	/* Configure communication */
mbed_official	354:e67efb2aab0e	1119	hspi->State = HAL_SPI_STATE_BUSY_TX;
mbed_official	354:e67efb2aab0e	1120	hspi->ErrorCode = HAL_SPI_ERROR_NONE;
mbed_official	354:e67efb2aab0e	1121
mbed_official	354:e67efb2aab0e	1122	hspi->pTxBuffPtr = pData;
mbed_official	354:e67efb2aab0e	1123	hspi->TxXferSize = Size;
mbed_official	354:e67efb2aab0e	1124	hspi->TxXferCount = Size;
mbed_official	354:e67efb2aab0e	1125
mbed_official	354:e67efb2aab0e	1126	/Init field not used in handle to zero /
mbed_official	354:e67efb2aab0e	1127	hspi->TxISR = 0;
mbed_official	354:e67efb2aab0e	1128	hspi->RxISR = 0;
mbed_official	354:e67efb2aab0e	1129	hspi->pRxBuffPtr = HAL_NULL;
mbed_official	354:e67efb2aab0e	1130	hspi->RxXferSize = 0;
mbed_official	354:e67efb2aab0e	1131	hspi->RxXferCount = 0;
mbed_official	354:e67efb2aab0e	1132
mbed_official	354:e67efb2aab0e	1133	/* Configure communication direction : 1Line */
mbed_official	354:e67efb2aab0e	1134	if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
mbed_official	354:e67efb2aab0e	1135	{
mbed_official	354:e67efb2aab0e	1136	SPI_1LINE_TX(hspi);
mbed_official	354:e67efb2aab0e	1137	}
mbed_official	354:e67efb2aab0e	1138
mbed_official	354:e67efb2aab0e	1139	/* Reset CRC Calculation */
mbed_official	354:e67efb2aab0e	1140	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
mbed_official	354:e67efb2aab0e	1141	{
mbed_official	354:e67efb2aab0e	1142	SPI_RESET_CRC(hspi);
mbed_official	354:e67efb2aab0e	1143	}
mbed_official	354:e67efb2aab0e	1144
mbed_official	354:e67efb2aab0e	1145	/* Set the SPI TxDMA Half transfer complete callback */
mbed_official	354:e67efb2aab0e	1146	hspi->hdmatx->XferHalfCpltCallback = SPI_DMAHalfTransmitCplt;
mbed_official	354:e67efb2aab0e	1147
mbed_official	354:e67efb2aab0e	1148	/* Set the SPI TxDMA transfer complete callback */
mbed_official	354:e67efb2aab0e	1149	hspi->hdmatx->XferCpltCallback = SPI_DMATransmitCplt;
mbed_official	354:e67efb2aab0e	1150
mbed_official	354:e67efb2aab0e	1151	/* Set the DMA error callback */
mbed_official	354:e67efb2aab0e	1152	hspi->hdmatx->XferErrorCallback = SPI_DMAError;
mbed_official	354:e67efb2aab0e	1153
mbed_official	354:e67efb2aab0e	1154	/* Enable the Tx DMA Channel */
mbed_official	354:e67efb2aab0e	1155	HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR, hspi->TxXferCount);
mbed_official	354:e67efb2aab0e	1156
mbed_official	354:e67efb2aab0e	1157	/* Enable Tx DMA Request */
mbed_official	354:e67efb2aab0e	1158	SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
mbed_official	354:e67efb2aab0e	1159
mbed_official	354:e67efb2aab0e	1160	/* Process Unlocked */
mbed_official	354:e67efb2aab0e	1161	__HAL_UNLOCK(hspi);
mbed_official	354:e67efb2aab0e	1162
mbed_official	354:e67efb2aab0e	1163	/* Check if the SPI is already enabled */
mbed_official	354:e67efb2aab0e	1164	if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
mbed_official	354:e67efb2aab0e	1165	{
mbed_official	354:e67efb2aab0e	1166	/* Enable SPI peripheral */
mbed_official	354:e67efb2aab0e	1167	__HAL_SPI_ENABLE(hspi);
mbed_official	354:e67efb2aab0e	1168	}
mbed_official	354:e67efb2aab0e	1169
mbed_official	354:e67efb2aab0e	1170	return HAL_OK;
mbed_official	354:e67efb2aab0e	1171	}
mbed_official	354:e67efb2aab0e	1172	else
mbed_official	354:e67efb2aab0e	1173	{
mbed_official	354:e67efb2aab0e	1174	return HAL_BUSY;
mbed_official	354:e67efb2aab0e	1175	}
mbed_official	354:e67efb2aab0e	1176	}
mbed_official	354:e67efb2aab0e	1177
mbed_official	354:e67efb2aab0e	1178	/**
mbed_official	354:e67efb2aab0e	1179	* @brief Receive an amount of data in no-blocking mode with DMA
mbed_official	354:e67efb2aab0e	1180	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	354:e67efb2aab0e	1181	* the configuration information for SPI module.
mbed_official	354:e67efb2aab0e	1182	* @param pData: pointer to data buffer
mbed_official	354:e67efb2aab0e	1183	* @note When the CRC feature is enabled the pData Length must be Size + 1.
mbed_official	354:e67efb2aab0e	1184	* @param Size: amount of data to be sent
mbed_official	354:e67efb2aab0e	1185	* @retval HAL status
mbed_official	354:e67efb2aab0e	1186	*/
mbed_official	354:e67efb2aab0e	1187	HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef hspi, uint8_t pData, uint16_t Size)
mbed_official	354:e67efb2aab0e	1188	{
mbed_official	354:e67efb2aab0e	1189	if(hspi->State == HAL_SPI_STATE_READY)
mbed_official	354:e67efb2aab0e	1190	{
mbed_official	354:e67efb2aab0e	1191	if((pData == HAL_NULL) \|\| (Size == 0))
mbed_official	354:e67efb2aab0e	1192	{
mbed_official	354:e67efb2aab0e	1193	return HAL_ERROR;
mbed_official	354:e67efb2aab0e	1194	}
mbed_official	354:e67efb2aab0e	1195
mbed_official	354:e67efb2aab0e	1196	/* Process Locked */
mbed_official	354:e67efb2aab0e	1197	__HAL_LOCK(hspi);
mbed_official	354:e67efb2aab0e	1198
mbed_official	354:e67efb2aab0e	1199	/* Configure communication */
mbed_official	354:e67efb2aab0e	1200	hspi->State = HAL_SPI_STATE_BUSY_RX;
mbed_official	354:e67efb2aab0e	1201	hspi->ErrorCode = HAL_SPI_ERROR_NONE;
mbed_official	354:e67efb2aab0e	1202
mbed_official	354:e67efb2aab0e	1203	hspi->pRxBuffPtr = pData;
mbed_official	354:e67efb2aab0e	1204	hspi->RxXferSize = Size;
mbed_official	354:e67efb2aab0e	1205	hspi->RxXferCount = Size;
mbed_official	354:e67efb2aab0e	1206
mbed_official	354:e67efb2aab0e	1207	/Init field not used in handle to zero /
mbed_official	354:e67efb2aab0e	1208	hspi->RxISR = 0;
mbed_official	354:e67efb2aab0e	1209	hspi->TxISR = 0;
mbed_official	354:e67efb2aab0e	1210	hspi->pTxBuffPtr = HAL_NULL;
mbed_official	354:e67efb2aab0e	1211	hspi->TxXferSize = 0;
mbed_official	354:e67efb2aab0e	1212	hspi->TxXferCount = 0;
mbed_official	354:e67efb2aab0e	1213
mbed_official	354:e67efb2aab0e	1214	/* Configure communication direction : 1Line */
mbed_official	354:e67efb2aab0e	1215	if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
mbed_official	354:e67efb2aab0e	1216	{
mbed_official	354:e67efb2aab0e	1217	SPI_1LINE_RX(hspi);
mbed_official	354:e67efb2aab0e	1218	}
mbed_official	354:e67efb2aab0e	1219	else if((hspi->Init.Direction == SPI_DIRECTION_2LINES)&&(hspi->Init.Mode == SPI_MODE_MASTER))
mbed_official	354:e67efb2aab0e	1220	{
mbed_official	354:e67efb2aab0e	1221	/* Process Unlocked */
mbed_official	354:e67efb2aab0e	1222	__HAL_UNLOCK(hspi);
mbed_official	354:e67efb2aab0e	1223
mbed_official	354:e67efb2aab0e	1224	/* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
mbed_official	354:e67efb2aab0e	1225	return HAL_SPI_TransmitReceive_DMA(hspi, pData, pData, Size);
mbed_official	354:e67efb2aab0e	1226	}
mbed_official	354:e67efb2aab0e	1227
mbed_official	354:e67efb2aab0e	1228	/* Reset CRC Calculation */
mbed_official	354:e67efb2aab0e	1229	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
mbed_official	354:e67efb2aab0e	1230	{
mbed_official	354:e67efb2aab0e	1231	SPI_RESET_CRC(hspi);
mbed_official	354:e67efb2aab0e	1232	}
mbed_official	354:e67efb2aab0e	1233
mbed_official	354:e67efb2aab0e	1234	/* Set the SPI RxDMA Half transfer complete callback */
mbed_official	354:e67efb2aab0e	1235	hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfReceiveCplt;
mbed_official	354:e67efb2aab0e	1236
mbed_official	354:e67efb2aab0e	1237	/* Set the SPI Rx DMA transfer complete callback */
mbed_official	354:e67efb2aab0e	1238	hspi->hdmarx->XferCpltCallback = SPI_DMAReceiveCplt;
mbed_official	354:e67efb2aab0e	1239
mbed_official	354:e67efb2aab0e	1240	/* Set the DMA error callback */
mbed_official	354:e67efb2aab0e	1241	hspi->hdmarx->XferErrorCallback = SPI_DMAError;
mbed_official	354:e67efb2aab0e	1242
mbed_official	354:e67efb2aab0e	1243	/* Enable the Rx DMA Channel */
mbed_official	354:e67efb2aab0e	1244	HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t)hspi->pRxBuffPtr, hspi->RxXferCount);
mbed_official	354:e67efb2aab0e	1245
mbed_official	354:e67efb2aab0e	1246	/* Enable Rx DMA Request */
mbed_official	354:e67efb2aab0e	1247	SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
mbed_official	354:e67efb2aab0e	1248
mbed_official	354:e67efb2aab0e	1249	/* Process Unlocked */
mbed_official	354:e67efb2aab0e	1250	__HAL_UNLOCK(hspi);
mbed_official	354:e67efb2aab0e	1251
mbed_official	354:e67efb2aab0e	1252	/* Check if the SPI is already enabled */
mbed_official	354:e67efb2aab0e	1253	if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
mbed_official	354:e67efb2aab0e	1254	{
mbed_official	354:e67efb2aab0e	1255	/* Enable SPI peripheral */
mbed_official	354:e67efb2aab0e	1256	__HAL_SPI_ENABLE(hspi);
mbed_official	354:e67efb2aab0e	1257	}
mbed_official	354:e67efb2aab0e	1258
mbed_official	354:e67efb2aab0e	1259	return HAL_OK;
mbed_official	354:e67efb2aab0e	1260	}
mbed_official	354:e67efb2aab0e	1261	else
mbed_official	354:e67efb2aab0e	1262	{
mbed_official	354:e67efb2aab0e	1263	return HAL_BUSY;
mbed_official	354:e67efb2aab0e	1264	}
mbed_official	354:e67efb2aab0e	1265	}
mbed_official	354:e67efb2aab0e	1266
mbed_official	354:e67efb2aab0e	1267	/**
mbed_official	354:e67efb2aab0e	1268	* @brief Transmit and Receive an amount of data in no-blocking mode with DMA
mbed_official	354:e67efb2aab0e	1269	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	354:e67efb2aab0e	1270	* the configuration information for SPI module.
mbed_official	354:e67efb2aab0e	1271	* @param pTxData: pointer to transmission data buffer
mbed_official	354:e67efb2aab0e	1272	* @param pRxData: pointer to reception data buffer
mbed_official	354:e67efb2aab0e	1273	* @note When the CRC feature is enabled the pRxData Length must be Size + 1
mbed_official	354:e67efb2aab0e	1274	* @param Size: amount of data to be sent
mbed_official	354:e67efb2aab0e	1275	* @retval HAL status
mbed_official	354:e67efb2aab0e	1276	*/
mbed_official	354:e67efb2aab0e	1277	HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef hspi, uint8_t pTxData, uint8_t *pRxData, uint16_t Size)
mbed_official	354:e67efb2aab0e	1278	{
mbed_official	354:e67efb2aab0e	1279	if((hspi->State == HAL_SPI_STATE_READY) \|\| \
mbed_official	354:e67efb2aab0e	1280	((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->State == HAL_SPI_STATE_BUSY_RX)))
mbed_official	354:e67efb2aab0e	1281	{
mbed_official	354:e67efb2aab0e	1282	if((pTxData == HAL_NULL ) \|\| (pRxData == HAL_NULL ) \|\| (Size == 0))
mbed_official	354:e67efb2aab0e	1283	{
mbed_official	354:e67efb2aab0e	1284	return HAL_ERROR;
mbed_official	354:e67efb2aab0e	1285	}
mbed_official	354:e67efb2aab0e	1286
mbed_official	354:e67efb2aab0e	1287	/* Check the parameters */
mbed_official	354:e67efb2aab0e	1288	assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
mbed_official	354:e67efb2aab0e	1289
mbed_official	354:e67efb2aab0e	1290	/* Process locked */
mbed_official	354:e67efb2aab0e	1291	__HAL_LOCK(hspi);
mbed_official	354:e67efb2aab0e	1292
mbed_official	354:e67efb2aab0e	1293	/* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
mbed_official	354:e67efb2aab0e	1294	if(hspi->State != HAL_SPI_STATE_BUSY_RX)
mbed_official	354:e67efb2aab0e	1295	{
mbed_official	354:e67efb2aab0e	1296	hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
mbed_official	354:e67efb2aab0e	1297	}
mbed_official	354:e67efb2aab0e	1298
mbed_official	354:e67efb2aab0e	1299	/* Configure communication */
mbed_official	354:e67efb2aab0e	1300	hspi->ErrorCode = HAL_SPI_ERROR_NONE;
mbed_official	354:e67efb2aab0e	1301
mbed_official	354:e67efb2aab0e	1302	hspi->pTxBuffPtr = (uint8_t*)pTxData;
mbed_official	354:e67efb2aab0e	1303	hspi->TxXferSize = Size;
mbed_official	354:e67efb2aab0e	1304	hspi->TxXferCount = Size;
mbed_official	354:e67efb2aab0e	1305
mbed_official	354:e67efb2aab0e	1306	hspi->pRxBuffPtr = (uint8_t*)pRxData;
mbed_official	354:e67efb2aab0e	1307	hspi->RxXferSize = Size;
mbed_official	354:e67efb2aab0e	1308	hspi->RxXferCount = Size;
mbed_official	354:e67efb2aab0e	1309
mbed_official	354:e67efb2aab0e	1310	/Init field not used in handle to zero /
mbed_official	354:e67efb2aab0e	1311	hspi->RxISR = 0;
mbed_official	354:e67efb2aab0e	1312	hspi->TxISR = 0;
mbed_official	354:e67efb2aab0e	1313
mbed_official	354:e67efb2aab0e	1314	/* Reset CRC Calculation */
mbed_official	354:e67efb2aab0e	1315	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
mbed_official	354:e67efb2aab0e	1316	{
mbed_official	354:e67efb2aab0e	1317	SPI_RESET_CRC(hspi);
mbed_official	354:e67efb2aab0e	1318	}
mbed_official	354:e67efb2aab0e	1319
mbed_official	354:e67efb2aab0e	1320	/* Check if we are in Rx only or in Rx/Tx Mode and configure the DMA transfer complete callback */
mbed_official	354:e67efb2aab0e	1321	if(hspi->State == HAL_SPI_STATE_BUSY_RX)
mbed_official	354:e67efb2aab0e	1322	{
mbed_official	354:e67efb2aab0e	1323	/* Set the SPI Rx DMA Half transfer complete callback */
mbed_official	354:e67efb2aab0e	1324	hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfReceiveCplt;
mbed_official	354:e67efb2aab0e	1325
mbed_official	354:e67efb2aab0e	1326	hspi->hdmarx->XferCpltCallback = SPI_DMAReceiveCplt;
mbed_official	354:e67efb2aab0e	1327	}
mbed_official	354:e67efb2aab0e	1328	else
mbed_official	354:e67efb2aab0e	1329	{
mbed_official	354:e67efb2aab0e	1330	/* Set the SPI Tx/Rx DMA Half transfer complete callback */
mbed_official	354:e67efb2aab0e	1331	hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfTransmitReceiveCplt;
mbed_official	354:e67efb2aab0e	1332
mbed_official	354:e67efb2aab0e	1333	hspi->hdmarx->XferCpltCallback = SPI_DMATransmitReceiveCplt;
mbed_official	354:e67efb2aab0e	1334	}
mbed_official	354:e67efb2aab0e	1335
mbed_official	354:e67efb2aab0e	1336	/* Set the DMA error callback */
mbed_official	354:e67efb2aab0e	1337	hspi->hdmarx->XferErrorCallback = SPI_DMAError;
mbed_official	354:e67efb2aab0e	1338
mbed_official	354:e67efb2aab0e	1339	/* Enable the Rx DMA Channel */
mbed_official	354:e67efb2aab0e	1340	HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t)hspi->pRxBuffPtr, hspi->RxXferCount);
mbed_official	354:e67efb2aab0e	1341
mbed_official	354:e67efb2aab0e	1342	/* Enable Rx DMA Request */
mbed_official	354:e67efb2aab0e	1343	SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
mbed_official	354:e67efb2aab0e	1344
mbed_official	354:e67efb2aab0e	1345	/* Set the SPI Tx DMA transfer complete callback as HAL_NULL because the communication closing
mbed_official	354:e67efb2aab0e	1346	is performed in DMA reception complete callback */
mbed_official	354:e67efb2aab0e	1347	if(hspi->State == HAL_SPI_STATE_BUSY_TX_RX)
mbed_official	354:e67efb2aab0e	1348	{
mbed_official	354:e67efb2aab0e	1349	/* Set the DMA error callback */
mbed_official	354:e67efb2aab0e	1350	hspi->hdmatx->XferErrorCallback = SPI_DMAError;
mbed_official	354:e67efb2aab0e	1351	}
mbed_official	354:e67efb2aab0e	1352	else
mbed_official	354:e67efb2aab0e	1353	{
mbed_official	354:e67efb2aab0e	1354	hspi->hdmatx->XferErrorCallback = HAL_NULL;
mbed_official	354:e67efb2aab0e	1355	}
mbed_official	354:e67efb2aab0e	1356
mbed_official	354:e67efb2aab0e	1357	/* Enable the Tx DMA Channel */
mbed_official	354:e67efb2aab0e	1358	HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR, hspi->TxXferCount);
mbed_official	354:e67efb2aab0e	1359
mbed_official	354:e67efb2aab0e	1360	/* Check if the SPI is already enabled */
mbed_official	354:e67efb2aab0e	1361	if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
mbed_official	354:e67efb2aab0e	1362	{
mbed_official	354:e67efb2aab0e	1363	/* Enable SPI peripheral */
mbed_official	354:e67efb2aab0e	1364	__HAL_SPI_ENABLE(hspi);
mbed_official	354:e67efb2aab0e	1365	}
mbed_official	354:e67efb2aab0e	1366
mbed_official	354:e67efb2aab0e	1367	/* Enable Tx DMA Request */
mbed_official	354:e67efb2aab0e	1368	SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
mbed_official	354:e67efb2aab0e	1369
mbed_official	354:e67efb2aab0e	1370	/* Process Unlocked */
mbed_official	354:e67efb2aab0e	1371	__HAL_UNLOCK(hspi);
mbed_official	354:e67efb2aab0e	1372
mbed_official	354:e67efb2aab0e	1373	return HAL_OK;
mbed_official	354:e67efb2aab0e	1374	}
mbed_official	354:e67efb2aab0e	1375	else
mbed_official	354:e67efb2aab0e	1376	{
mbed_official	354:e67efb2aab0e	1377	return HAL_BUSY;
mbed_official	354:e67efb2aab0e	1378	}
mbed_official	354:e67efb2aab0e	1379	}
mbed_official	354:e67efb2aab0e	1380
mbed_official	354:e67efb2aab0e	1381
mbed_official	354:e67efb2aab0e	1382	/**
mbed_official	354:e67efb2aab0e	1383	* @brief Pauses the DMA Transfer.
mbed_official	354:e67efb2aab0e	1384	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	354:e67efb2aab0e	1385	* the configuration information for the specified SPI module.
mbed_official	354:e67efb2aab0e	1386	* @retval HAL status
mbed_official	354:e67efb2aab0e	1387	*/
mbed_official	354:e67efb2aab0e	1388	HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi)
mbed_official	354:e67efb2aab0e	1389	{
mbed_official	354:e67efb2aab0e	1390	/* Process Locked */
mbed_official	354:e67efb2aab0e	1391	__HAL_LOCK(hspi);
mbed_official	354:e67efb2aab0e	1392
mbed_official	354:e67efb2aab0e	1393	/* Disable the SPI DMA Tx & Rx requests */
mbed_official	354:e67efb2aab0e	1394	CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
mbed_official	354:e67efb2aab0e	1395	CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
mbed_official	354:e67efb2aab0e	1396
mbed_official	354:e67efb2aab0e	1397	/* Process Unlocked */
mbed_official	354:e67efb2aab0e	1398	__HAL_UNLOCK(hspi);
mbed_official	354:e67efb2aab0e	1399
mbed_official	354:e67efb2aab0e	1400	return HAL_OK;
mbed_official	354:e67efb2aab0e	1401	}
mbed_official	354:e67efb2aab0e	1402
mbed_official	354:e67efb2aab0e	1403	/**
mbed_official	354:e67efb2aab0e	1404	* @brief Resumes the DMA Transfer.
mbed_official	354:e67efb2aab0e	1405	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	354:e67efb2aab0e	1406	* the configuration information for the specified SPI module.
mbed_official	354:e67efb2aab0e	1407	* @retval HAL status
mbed_official	354:e67efb2aab0e	1408	*/
mbed_official	354:e67efb2aab0e	1409	HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi)
mbed_official	354:e67efb2aab0e	1410	{
mbed_official	354:e67efb2aab0e	1411	/* Process Locked */
mbed_official	354:e67efb2aab0e	1412	__HAL_LOCK(hspi);
mbed_official	354:e67efb2aab0e	1413
mbed_official	354:e67efb2aab0e	1414	/* Enable the SPI DMA Tx & Rx requests */
mbed_official	354:e67efb2aab0e	1415	SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
mbed_official	354:e67efb2aab0e	1416	SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
mbed_official	354:e67efb2aab0e	1417
mbed_official	354:e67efb2aab0e	1418	/* Process Unlocked */
mbed_official	354:e67efb2aab0e	1419	__HAL_UNLOCK(hspi);
mbed_official	354:e67efb2aab0e	1420
mbed_official	354:e67efb2aab0e	1421	return HAL_OK;
mbed_official	354:e67efb2aab0e	1422	}
mbed_official	354:e67efb2aab0e	1423
mbed_official	354:e67efb2aab0e	1424	/**
mbed_official	354:e67efb2aab0e	1425	* @brief Stops the DMA Transfer.
mbed_official	354:e67efb2aab0e	1426	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	354:e67efb2aab0e	1427	* the configuration information for the specified UART module.
mbed_official	354:e67efb2aab0e	1428	* @retval HAL status
mbed_official	354:e67efb2aab0e	1429	*/
mbed_official	354:e67efb2aab0e	1430	HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi)
mbed_official	354:e67efb2aab0e	1431	{
mbed_official	354:e67efb2aab0e	1432	/* The Lock is not implemented on this API to allow the user application
mbed_official	354:e67efb2aab0e	1433	to call the HAL SPI API under callbacks HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback():
mbed_official	354:e67efb2aab0e	1434	when calling HAL_DMA_Abort() API the DMA TX/RX Transfer complete interrupt is generated
mbed_official	354:e67efb2aab0e	1435	and the correspond call back is executed HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback()
mbed_official	354:e67efb2aab0e	1436	*/
mbed_official	354:e67efb2aab0e	1437
mbed_official	354:e67efb2aab0e	1438	/* Abort the SPI DMA tx Channel */
mbed_official	354:e67efb2aab0e	1439	if(hspi->hdmatx != HAL_NULL)
mbed_official	354:e67efb2aab0e	1440	{
mbed_official	354:e67efb2aab0e	1441	HAL_DMA_Abort(hspi->hdmatx);
mbed_official	354:e67efb2aab0e	1442	}
mbed_official	354:e67efb2aab0e	1443	/* Abort the SPI DMA rx Channel */
mbed_official	354:e67efb2aab0e	1444	if(hspi->hdmarx != HAL_NULL)
mbed_official	354:e67efb2aab0e	1445	{
mbed_official	354:e67efb2aab0e	1446	HAL_DMA_Abort(hspi->hdmarx);
mbed_official	354:e67efb2aab0e	1447	}
mbed_official	354:e67efb2aab0e	1448
mbed_official	354:e67efb2aab0e	1449	/* Disable the SPI DMA Tx & Rx requests */
mbed_official	354:e67efb2aab0e	1450	CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
mbed_official	354:e67efb2aab0e	1451	CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
mbed_official	354:e67efb2aab0e	1452
mbed_official	354:e67efb2aab0e	1453	hspi->State = HAL_SPI_STATE_READY;
mbed_official	354:e67efb2aab0e	1454
mbed_official	354:e67efb2aab0e	1455	return HAL_OK;
mbed_official	354:e67efb2aab0e	1456	}
mbed_official	354:e67efb2aab0e	1457
mbed_official	354:e67efb2aab0e	1458	/**
mbed_official	354:e67efb2aab0e	1459	* @brief This function handles SPI interrupt request.
mbed_official	354:e67efb2aab0e	1460	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	354:e67efb2aab0e	1461	* the configuration information for SPI module.
mbed_official	354:e67efb2aab0e	1462	* @retval HAL status
mbed_official	354:e67efb2aab0e	1463	*/
mbed_official	354:e67efb2aab0e	1464	void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi)
mbed_official	354:e67efb2aab0e	1465	{
mbed_official	354:e67efb2aab0e	1466	/* SPI in mode Receiver and Overrun not occurred ---------------------------*/
mbed_official	354:e67efb2aab0e	1467	if((__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_RXNE) != RESET) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE) != RESET) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_OVR) == RESET))
mbed_official	354:e67efb2aab0e	1468	{
mbed_official	354:e67efb2aab0e	1469	hspi->RxISR(hspi);
mbed_official	354:e67efb2aab0e	1470	return;
mbed_official	354:e67efb2aab0e	1471	}
mbed_official	354:e67efb2aab0e	1472
mbed_official	354:e67efb2aab0e	1473	/* SPI in mode Tramitter ---------------------------------------------------*/
mbed_official	354:e67efb2aab0e	1474	if((__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_TXE) != RESET) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE) != RESET))
mbed_official	354:e67efb2aab0e	1475	{
mbed_official	354:e67efb2aab0e	1476	hspi->TxISR(hspi);
mbed_official	354:e67efb2aab0e	1477	return;
mbed_official	354:e67efb2aab0e	1478	}
mbed_official	354:e67efb2aab0e	1479
mbed_official	354:e67efb2aab0e	1480	if(__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_ERR) != RESET)
mbed_official	354:e67efb2aab0e	1481	{
mbed_official	354:e67efb2aab0e	1482	/* SPI CRC error interrupt occurred ---------------------------------------*/
mbed_official	354:e67efb2aab0e	1483	if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
mbed_official	354:e67efb2aab0e	1484	{
mbed_official	354:e67efb2aab0e	1485	SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
mbed_official	354:e67efb2aab0e	1486	__HAL_SPI_CLEAR_CRCERRFLAG(hspi);
mbed_official	354:e67efb2aab0e	1487	}
mbed_official	354:e67efb2aab0e	1488	/* SPI Mode Fault error interrupt occurred --------------------------------*/
mbed_official	354:e67efb2aab0e	1489	if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_MODF) != RESET)
mbed_official	354:e67efb2aab0e	1490	{
mbed_official	354:e67efb2aab0e	1491	SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_MODF);
mbed_official	354:e67efb2aab0e	1492	__HAL_SPI_CLEAR_MODFFLAG(hspi);
mbed_official	354:e67efb2aab0e	1493	}
mbed_official	354:e67efb2aab0e	1494
mbed_official	354:e67efb2aab0e	1495	/* SPI Overrun error interrupt occurred -----------------------------------*/
mbed_official	354:e67efb2aab0e	1496	if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_OVR) != RESET)
mbed_official	354:e67efb2aab0e	1497	{
mbed_official	354:e67efb2aab0e	1498	if(hspi->State != HAL_SPI_STATE_BUSY_TX)
mbed_official	354:e67efb2aab0e	1499	{
mbed_official	354:e67efb2aab0e	1500	SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_OVR);
mbed_official	354:e67efb2aab0e	1501	__HAL_SPI_CLEAR_OVRFLAG(hspi);
mbed_official	354:e67efb2aab0e	1502	}
mbed_official	354:e67efb2aab0e	1503	}
mbed_official	354:e67efb2aab0e	1504
mbed_official	354:e67efb2aab0e	1505	/* SPI Frame error interrupt occurred -------------------------------------*/
mbed_official	354:e67efb2aab0e	1506	if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_FRE) != RESET)
mbed_official	354:e67efb2aab0e	1507	{
mbed_official	354:e67efb2aab0e	1508	SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FRE);
mbed_official	354:e67efb2aab0e	1509	__HAL_SPI_CLEAR_FREFLAG(hspi);
mbed_official	354:e67efb2aab0e	1510	}
mbed_official	354:e67efb2aab0e	1511
mbed_official	354:e67efb2aab0e	1512	/* Call the Error call Back in case of Errors */
mbed_official	354:e67efb2aab0e	1513	if(hspi->ErrorCode!=HAL_SPI_ERROR_NONE)
mbed_official	354:e67efb2aab0e	1514	{
mbed_official	354:e67efb2aab0e	1515	__HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE \| SPI_IT_TXE \| SPI_IT_ERR);
mbed_official	354:e67efb2aab0e	1516	hspi->State = HAL_SPI_STATE_READY;
mbed_official	354:e67efb2aab0e	1517	HAL_SPI_ErrorCallback(hspi);
mbed_official	354:e67efb2aab0e	1518	}
mbed_official	354:e67efb2aab0e	1519	}
mbed_official	354:e67efb2aab0e	1520	}
mbed_official	354:e67efb2aab0e	1521
mbed_official	354:e67efb2aab0e	1522	/**
mbed_official	354:e67efb2aab0e	1523	* @brief Tx Transfer completed callbacks
mbed_official	354:e67efb2aab0e	1524	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	354:e67efb2aab0e	1525	* the configuration information for SPI module.
mbed_official	354:e67efb2aab0e	1526	* @retval None
mbed_official	354:e67efb2aab0e	1527	*/
mbed_official	354:e67efb2aab0e	1528	__weak void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi)
mbed_official	354:e67efb2aab0e	1529	{
mbed_official	354:e67efb2aab0e	1530	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	354:e67efb2aab0e	1531	the HAL_SPI_TxCpltCallback could be implenetd in the user file
mbed_official	354:e67efb2aab0e	1532	*/
mbed_official	354:e67efb2aab0e	1533	}
mbed_official	354:e67efb2aab0e	1534
mbed_official	354:e67efb2aab0e	1535	/**
mbed_official	354:e67efb2aab0e	1536	* @brief Rx Transfer completed callbacks
mbed_official	354:e67efb2aab0e	1537	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	354:e67efb2aab0e	1538	* the configuration information for SPI module.
mbed_official	354:e67efb2aab0e	1539	* @retval None
mbed_official	354:e67efb2aab0e	1540	*/
mbed_official	354:e67efb2aab0e	1541	__weak void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi)
mbed_official	354:e67efb2aab0e	1542	{
mbed_official	354:e67efb2aab0e	1543	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	354:e67efb2aab0e	1544	the HAL_SPI_RxCpltCallback() could be implenetd in the user file
mbed_official	354:e67efb2aab0e	1545	*/
mbed_official	354:e67efb2aab0e	1546	}
mbed_official	354:e67efb2aab0e	1547
mbed_official	354:e67efb2aab0e	1548	/**
mbed_official	354:e67efb2aab0e	1549	* @brief Tx and Rx Transfer completed callbacks
mbed_official	354:e67efb2aab0e	1550	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	354:e67efb2aab0e	1551	* the configuration information for SPI module.
mbed_official	354:e67efb2aab0e	1552	* @retval None
mbed_official	354:e67efb2aab0e	1553	*/
mbed_official	354:e67efb2aab0e	1554	__weak void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi)
mbed_official	354:e67efb2aab0e	1555	{
mbed_official	354:e67efb2aab0e	1556	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	354:e67efb2aab0e	1557	the HAL_SPI_TxRxCpltCallback() could be implenetd in the user file
mbed_official	354:e67efb2aab0e	1558	*/
mbed_official	354:e67efb2aab0e	1559	}
mbed_official	354:e67efb2aab0e	1560
mbed_official	354:e67efb2aab0e	1561	/**
mbed_official	354:e67efb2aab0e	1562	* @brief Tx Half Transfer completed callbacks
mbed_official	354:e67efb2aab0e	1563	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	354:e67efb2aab0e	1564	* the configuration information for SPI module.
mbed_official	354:e67efb2aab0e	1565	* @retval None
mbed_official	354:e67efb2aab0e	1566	*/
mbed_official	354:e67efb2aab0e	1567	__weak void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi)
mbed_official	354:e67efb2aab0e	1568	{
mbed_official	354:e67efb2aab0e	1569	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	354:e67efb2aab0e	1570	the HAL_SPI_TxHalfCpltCallback could be implenetd in the user file
mbed_official	354:e67efb2aab0e	1571	*/
mbed_official	354:e67efb2aab0e	1572	}
mbed_official	354:e67efb2aab0e	1573
mbed_official	354:e67efb2aab0e	1574	/**
mbed_official	354:e67efb2aab0e	1575	* @brief Rx Half Transfer completed callbacks
mbed_official	354:e67efb2aab0e	1576	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	354:e67efb2aab0e	1577	* the configuration information for SPI module.
mbed_official	354:e67efb2aab0e	1578	* @retval None
mbed_official	354:e67efb2aab0e	1579	*/
mbed_official	354:e67efb2aab0e	1580	__weak void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi)
mbed_official	354:e67efb2aab0e	1581	{
mbed_official	354:e67efb2aab0e	1582	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	354:e67efb2aab0e	1583	the HAL_SPI_RxHalfCpltCallback() could be implenetd in the user file
mbed_official	354:e67efb2aab0e	1584	*/
mbed_official	354:e67efb2aab0e	1585	}
mbed_official	354:e67efb2aab0e	1586
mbed_official	354:e67efb2aab0e	1587	/**
mbed_official	354:e67efb2aab0e	1588	* @brief Tx and Rx Transfer completed callbacks
mbed_official	354:e67efb2aab0e	1589	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	354:e67efb2aab0e	1590	* the configuration information for SPI module.
mbed_official	354:e67efb2aab0e	1591	* @retval None
mbed_official	354:e67efb2aab0e	1592	*/
mbed_official	354:e67efb2aab0e	1593	__weak void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi)
mbed_official	354:e67efb2aab0e	1594	{
mbed_official	354:e67efb2aab0e	1595	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	354:e67efb2aab0e	1596	the HAL_SPI_TxRxHalfCpltCallback() could be implenetd in the user file
mbed_official	354:e67efb2aab0e	1597	*/
mbed_official	354:e67efb2aab0e	1598	}
mbed_official	354:e67efb2aab0e	1599
mbed_official	354:e67efb2aab0e	1600	/**
mbed_official	354:e67efb2aab0e	1601	* @brief SPI error callbacks
mbed_official	354:e67efb2aab0e	1602	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	354:e67efb2aab0e	1603	* the configuration information for SPI module.
mbed_official	354:e67efb2aab0e	1604	* @retval None
mbed_official	354:e67efb2aab0e	1605	*/
mbed_official	354:e67efb2aab0e	1606	__weak void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi)
mbed_official	354:e67efb2aab0e	1607	{
mbed_official	354:e67efb2aab0e	1608	/* NOTE : - This function Should not be modified, when the callback is needed,
mbed_official	354:e67efb2aab0e	1609	the HAL_SPI_ErrorCallback() could be implenetd in the user file.
mbed_official	354:e67efb2aab0e	1610	- The ErrorCode parameter in the hspi handle is updated by the SPI processes
mbed_official	354:e67efb2aab0e	1611	and user can use HAL_SPI_GetError() API to check the latest error occurred.
mbed_official	354:e67efb2aab0e	1612	*/
mbed_official	354:e67efb2aab0e	1613	}
mbed_official	354:e67efb2aab0e	1614
mbed_official	354:e67efb2aab0e	1615	/**
mbed_official	354:e67efb2aab0e	1616	* @}
mbed_official	354:e67efb2aab0e	1617	*/
mbed_official	354:e67efb2aab0e	1618
mbed_official	354:e67efb2aab0e	1619	/** @defgroup SPI_Exported_Functions_Group3 Peripheral State and Errors functions
mbed_official	354:e67efb2aab0e	1620	* @brief SPI control functions
mbed_official	354:e67efb2aab0e	1621	*
mbed_official	354:e67efb2aab0e	1622	@verbatim
mbed_official	354:e67efb2aab0e	1623	===============================================================================
mbed_official	354:e67efb2aab0e	1624	##### Peripheral State and Errors functions #####
mbed_official	354:e67efb2aab0e	1625	===============================================================================
mbed_official	354:e67efb2aab0e	1626	[..]
mbed_official	354:e67efb2aab0e	1627	This subsection provides a set of functions allowing to control the SPI.
mbed_official	354:e67efb2aab0e	1628	(+) HAL_SPI_GetState() API can be helpful to check in run-time the state of the SPI peripheral
mbed_official	354:e67efb2aab0e	1629	(+) HAL_SPI_GetError() check in run-time Errors occurring during communication
mbed_official	354:e67efb2aab0e	1630	@endverbatim
mbed_official	354:e67efb2aab0e	1631	* @{
mbed_official	354:e67efb2aab0e	1632	*/
mbed_official	354:e67efb2aab0e	1633
mbed_official	354:e67efb2aab0e	1634	/**
mbed_official	354:e67efb2aab0e	1635	* @brief Return the SPI state
mbed_official	354:e67efb2aab0e	1636	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	354:e67efb2aab0e	1637	* the configuration information for SPI module.
mbed_official	354:e67efb2aab0e	1638	* @retval HAL state
mbed_official	354:e67efb2aab0e	1639	*/
mbed_official	354:e67efb2aab0e	1640	HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi)
mbed_official	354:e67efb2aab0e	1641	{
mbed_official	354:e67efb2aab0e	1642	return hspi->State;
mbed_official	354:e67efb2aab0e	1643	}
mbed_official	354:e67efb2aab0e	1644
mbed_official	354:e67efb2aab0e	1645	/**
mbed_official	354:e67efb2aab0e	1646	* @brief Return the SPI error code
mbed_official	354:e67efb2aab0e	1647	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	354:e67efb2aab0e	1648	* the configuration information for SPI module.
mbed_official	354:e67efb2aab0e	1649	* @retval SPI Error Code
mbed_official	354:e67efb2aab0e	1650	*/
mbed_official	354:e67efb2aab0e	1651	HAL_SPI_ErrorTypeDef HAL_SPI_GetError(SPI_HandleTypeDef *hspi)
mbed_official	354:e67efb2aab0e	1652	{
mbed_official	354:e67efb2aab0e	1653	return hspi->ErrorCode;
mbed_official	354:e67efb2aab0e	1654	}
mbed_official	354:e67efb2aab0e	1655
mbed_official	354:e67efb2aab0e	1656	/**
mbed_official	354:e67efb2aab0e	1657	* @}
mbed_official	354:e67efb2aab0e	1658	*/
mbed_official	354:e67efb2aab0e	1659
mbed_official	354:e67efb2aab0e	1660	/**
mbed_official	354:e67efb2aab0e	1661	* @}
mbed_official	354:e67efb2aab0e	1662	*/
mbed_official	354:e67efb2aab0e	1663
mbed_official	354:e67efb2aab0e	1664
mbed_official	354:e67efb2aab0e	1665
mbed_official	354:e67efb2aab0e	1666	/** @addtogroup SPI_Private_Functions
mbed_official	354:e67efb2aab0e	1667	* @{
mbed_official	354:e67efb2aab0e	1668	*/
mbed_official	354:e67efb2aab0e	1669
mbed_official	354:e67efb2aab0e	1670
mbed_official	354:e67efb2aab0e	1671	/**
mbed_official	354:e67efb2aab0e	1672	* @brief Interrupt Handler to close Tx transfer
mbed_official	354:e67efb2aab0e	1673	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	354:e67efb2aab0e	1674	* the configuration information for SPI module.
mbed_official	354:e67efb2aab0e	1675	* @retval void
mbed_official	354:e67efb2aab0e	1676	*/
mbed_official	354:e67efb2aab0e	1677	static void SPI_TxCloseIRQHandler(struct __SPI_HandleTypeDef *hspi)
mbed_official	354:e67efb2aab0e	1678	{
mbed_official	354:e67efb2aab0e	1679	/* Wait until TXE flag is set to send data */
mbed_official	354:e67efb2aab0e	1680	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
mbed_official	354:e67efb2aab0e	1681	{
mbed_official	354:e67efb2aab0e	1682	SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
mbed_official	354:e67efb2aab0e	1683	}
mbed_official	354:e67efb2aab0e	1684
mbed_official	354:e67efb2aab0e	1685	/* Disable TXE interrupt */
mbed_official	354:e67efb2aab0e	1686	__HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE ));
mbed_official	354:e67efb2aab0e	1687
mbed_official	354:e67efb2aab0e	1688	/* Disable ERR interrupt if Receive process is finished */
mbed_official	354:e67efb2aab0e	1689	if(__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_RXNE) == RESET)
mbed_official	354:e67efb2aab0e	1690	{
mbed_official	354:e67efb2aab0e	1691	__HAL_SPI_DISABLE_IT(hspi, (SPI_IT_ERR));
mbed_official	354:e67efb2aab0e	1692
mbed_official	354:e67efb2aab0e	1693	/* Wait until Busy flag is reset before disabling SPI */
mbed_official	354:e67efb2aab0e	1694	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
mbed_official	354:e67efb2aab0e	1695	{
mbed_official	354:e67efb2aab0e	1696	SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
mbed_official	354:e67efb2aab0e	1697	}
mbed_official	354:e67efb2aab0e	1698
mbed_official	354:e67efb2aab0e	1699	/* Clear OVERUN flag in 2 Lines communication mode because received is not read */
mbed_official	354:e67efb2aab0e	1700	if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
mbed_official	354:e67efb2aab0e	1701	{
mbed_official	354:e67efb2aab0e	1702	__HAL_SPI_CLEAR_OVRFLAG(hspi);
mbed_official	354:e67efb2aab0e	1703	}
mbed_official	354:e67efb2aab0e	1704
mbed_official	354:e67efb2aab0e	1705	/* Check if Errors has been detected during transfer */
mbed_official	354:e67efb2aab0e	1706	if(hspi->ErrorCode == HAL_SPI_ERROR_NONE)
mbed_official	354:e67efb2aab0e	1707	{
mbed_official	354:e67efb2aab0e	1708	/* Check if we are in Tx or in Rx/Tx Mode */
mbed_official	354:e67efb2aab0e	1709	if(hspi->State == HAL_SPI_STATE_BUSY_TX_RX)
mbed_official	354:e67efb2aab0e	1710	{
mbed_official	354:e67efb2aab0e	1711	/* Set state to READY before run the Callback Complete */
mbed_official	354:e67efb2aab0e	1712	hspi->State = HAL_SPI_STATE_READY;
mbed_official	354:e67efb2aab0e	1713	HAL_SPI_TxRxCpltCallback(hspi);
mbed_official	354:e67efb2aab0e	1714	}
mbed_official	354:e67efb2aab0e	1715	else
mbed_official	354:e67efb2aab0e	1716	{
mbed_official	354:e67efb2aab0e	1717	/* Set state to READY before run the Callback Complete */
mbed_official	354:e67efb2aab0e	1718	hspi->State = HAL_SPI_STATE_READY;
mbed_official	354:e67efb2aab0e	1719	HAL_SPI_TxCpltCallback(hspi);
mbed_official	354:e67efb2aab0e	1720	}
mbed_official	354:e67efb2aab0e	1721	}
mbed_official	354:e67efb2aab0e	1722	else
mbed_official	354:e67efb2aab0e	1723	{
mbed_official	354:e67efb2aab0e	1724	/* Set state to READY before run the Callback Complete */
mbed_official	354:e67efb2aab0e	1725	hspi->State = HAL_SPI_STATE_READY;
mbed_official	354:e67efb2aab0e	1726	/* Call Error call back in case of Error */
mbed_official	354:e67efb2aab0e	1727	HAL_SPI_ErrorCallback(hspi);
mbed_official	354:e67efb2aab0e	1728	}
mbed_official	354:e67efb2aab0e	1729	}
mbed_official	354:e67efb2aab0e	1730	}
mbed_official	354:e67efb2aab0e	1731
mbed_official	354:e67efb2aab0e	1732	/**
mbed_official	354:e67efb2aab0e	1733	* @brief Interrupt Handler to transmit amount of data in no-blocking mode
mbed_official	354:e67efb2aab0e	1734	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	354:e67efb2aab0e	1735	* the configuration information for SPI module.
mbed_official	354:e67efb2aab0e	1736	* @retval void
mbed_official	354:e67efb2aab0e	1737	*/
mbed_official	354:e67efb2aab0e	1738	static void SPI_TxISR(struct __SPI_HandleTypeDef *hspi)
mbed_official	354:e67efb2aab0e	1739	{
mbed_official	354:e67efb2aab0e	1740	/* Transmit data in 8 Bit mode */
mbed_official	354:e67efb2aab0e	1741	if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
mbed_official	354:e67efb2aab0e	1742	{
mbed_official	354:e67efb2aab0e	1743	hspi->Instance->DR = (*hspi->pTxBuffPtr++);
mbed_official	354:e67efb2aab0e	1744	}
mbed_official	354:e67efb2aab0e	1745	/* Transmit data in 16 Bit mode */
mbed_official	354:e67efb2aab0e	1746	else
mbed_official	354:e67efb2aab0e	1747	{
mbed_official	354:e67efb2aab0e	1748	hspi->Instance->DR = ((uint16_t)hspi->pTxBuffPtr);
mbed_official	354:e67efb2aab0e	1749	hspi->pTxBuffPtr+=2;
mbed_official	354:e67efb2aab0e	1750	}
mbed_official	354:e67efb2aab0e	1751	hspi->TxXferCount--;
mbed_official	354:e67efb2aab0e	1752
mbed_official	354:e67efb2aab0e	1753	if(hspi->TxXferCount == 0)
mbed_official	354:e67efb2aab0e	1754	{
mbed_official	354:e67efb2aab0e	1755	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
mbed_official	354:e67efb2aab0e	1756	{
mbed_official	354:e67efb2aab0e	1757	/* calculate and transfer CRC on Tx line */
mbed_official	354:e67efb2aab0e	1758	SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
mbed_official	354:e67efb2aab0e	1759	}
mbed_official	354:e67efb2aab0e	1760	SPI_TxCloseIRQHandler(hspi);
mbed_official	354:e67efb2aab0e	1761	}
mbed_official	354:e67efb2aab0e	1762	}
mbed_official	354:e67efb2aab0e	1763
mbed_official	354:e67efb2aab0e	1764	/**
mbed_official	354:e67efb2aab0e	1765	* @brief Interrupt Handler to close Rx transfer
mbed_official	354:e67efb2aab0e	1766	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	354:e67efb2aab0e	1767	* the configuration information for SPI module.
mbed_official	354:e67efb2aab0e	1768	* @retval void
mbed_official	354:e67efb2aab0e	1769	*/
mbed_official	354:e67efb2aab0e	1770	static void SPI_RxCloseIRQHandler(struct __SPI_HandleTypeDef *hspi)
mbed_official	354:e67efb2aab0e	1771	{
mbed_official	354:e67efb2aab0e	1772	__IO uint16_t tmpreg = 0;
mbed_official	354:e67efb2aab0e	1773
mbed_official	354:e67efb2aab0e	1774	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
mbed_official	354:e67efb2aab0e	1775	{
mbed_official	354:e67efb2aab0e	1776	/* Wait until RXNE flag is set to send data */
mbed_official	354:e67efb2aab0e	1777	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
mbed_official	354:e67efb2aab0e	1778	{
mbed_official	354:e67efb2aab0e	1779	SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
mbed_official	354:e67efb2aab0e	1780	}
mbed_official	354:e67efb2aab0e	1781
mbed_official	354:e67efb2aab0e	1782	/* Read CRC to reset RXNE flag */
mbed_official	354:e67efb2aab0e	1783	tmpreg = hspi->Instance->DR;
mbed_official	354:e67efb2aab0e	1784
mbed_official	354:e67efb2aab0e	1785	/* Wait until RXNE flag is set to send data */
mbed_official	354:e67efb2aab0e	1786	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
mbed_official	354:e67efb2aab0e	1787	{
mbed_official	354:e67efb2aab0e	1788	SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
mbed_official	354:e67efb2aab0e	1789	}
mbed_official	354:e67efb2aab0e	1790
mbed_official	354:e67efb2aab0e	1791	/* Check if CRC error occurred */
mbed_official	354:e67efb2aab0e	1792	if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
mbed_official	354:e67efb2aab0e	1793	{
mbed_official	354:e67efb2aab0e	1794	SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
mbed_official	354:e67efb2aab0e	1795
mbed_official	354:e67efb2aab0e	1796	/* Reset CRC Calculation */
mbed_official	354:e67efb2aab0e	1797	SPI_RESET_CRC(hspi);
mbed_official	354:e67efb2aab0e	1798	}
mbed_official	354:e67efb2aab0e	1799	}
mbed_official	354:e67efb2aab0e	1800
mbed_official	354:e67efb2aab0e	1801	/* Disable RXNE interrupt */
mbed_official	354:e67efb2aab0e	1802	__HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE));
mbed_official	354:e67efb2aab0e	1803
mbed_official	354:e67efb2aab0e	1804	/* if Transmit process is finished */
mbed_official	354:e67efb2aab0e	1805	if(__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_TXE) == RESET)
mbed_official	354:e67efb2aab0e	1806	{
mbed_official	354:e67efb2aab0e	1807	/* Disable ERR interrupt */
mbed_official	354:e67efb2aab0e	1808	__HAL_SPI_DISABLE_IT(hspi, (SPI_IT_ERR));
mbed_official	354:e67efb2aab0e	1809
mbed_official	354:e67efb2aab0e	1810	if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)\|\|(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
mbed_official	354:e67efb2aab0e	1811	{
mbed_official	354:e67efb2aab0e	1812	/* Disable SPI peripheral */
mbed_official	354:e67efb2aab0e	1813	__HAL_SPI_DISABLE(hspi);
mbed_official	354:e67efb2aab0e	1814	}
mbed_official	354:e67efb2aab0e	1815
mbed_official	354:e67efb2aab0e	1816	/* Check if Errors has been detected during transfer */
mbed_official	354:e67efb2aab0e	1817	if(hspi->ErrorCode == HAL_SPI_ERROR_NONE)
mbed_official	354:e67efb2aab0e	1818	{
mbed_official	354:e67efb2aab0e	1819	/* Check if we are in Rx or in Rx/Tx Mode */
mbed_official	354:e67efb2aab0e	1820	if(hspi->State == HAL_SPI_STATE_BUSY_TX_RX)
mbed_official	354:e67efb2aab0e	1821	{
mbed_official	354:e67efb2aab0e	1822	/* Set state to READY before run the Callback Complete */
mbed_official	354:e67efb2aab0e	1823	hspi->State = HAL_SPI_STATE_READY;
mbed_official	354:e67efb2aab0e	1824	HAL_SPI_TxRxCpltCallback(hspi);
mbed_official	354:e67efb2aab0e	1825	}
mbed_official	354:e67efb2aab0e	1826	else
mbed_official	354:e67efb2aab0e	1827	{
mbed_official	354:e67efb2aab0e	1828	/* Set state to READY before run the Callback Complete */
mbed_official	354:e67efb2aab0e	1829	hspi->State = HAL_SPI_STATE_READY;
mbed_official	354:e67efb2aab0e	1830	HAL_SPI_RxCpltCallback(hspi);
mbed_official	354:e67efb2aab0e	1831	}
mbed_official	354:e67efb2aab0e	1832	}
mbed_official	354:e67efb2aab0e	1833	else
mbed_official	354:e67efb2aab0e	1834	{
mbed_official	354:e67efb2aab0e	1835	/* Set state to READY before run the Callback Complete */
mbed_official	354:e67efb2aab0e	1836	hspi->State = HAL_SPI_STATE_READY;
mbed_official	354:e67efb2aab0e	1837	/* Call Error call back in case of Error */
mbed_official	354:e67efb2aab0e	1838	HAL_SPI_ErrorCallback(hspi);
mbed_official	354:e67efb2aab0e	1839	}
mbed_official	354:e67efb2aab0e	1840	}
mbed_official	354:e67efb2aab0e	1841	}
mbed_official	354:e67efb2aab0e	1842
mbed_official	354:e67efb2aab0e	1843	/**
mbed_official	354:e67efb2aab0e	1844	* @brief Interrupt Handler to receive amount of data in 2Lines mode
mbed_official	354:e67efb2aab0e	1845	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	354:e67efb2aab0e	1846	* the configuration information for SPI module.
mbed_official	354:e67efb2aab0e	1847	* @retval void
mbed_official	354:e67efb2aab0e	1848	*/
mbed_official	354:e67efb2aab0e	1849	static void SPI_2LinesRxISR(struct __SPI_HandleTypeDef *hspi)
mbed_official	354:e67efb2aab0e	1850	{
mbed_official	354:e67efb2aab0e	1851	/* Receive data in 8 Bit mode */
mbed_official	354:e67efb2aab0e	1852	if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
mbed_official	354:e67efb2aab0e	1853	{
mbed_official	354:e67efb2aab0e	1854	(*hspi->pRxBuffPtr++) = hspi->Instance->DR;
mbed_official	354:e67efb2aab0e	1855	}
mbed_official	354:e67efb2aab0e	1856	/* Receive data in 16 Bit mode */
mbed_official	354:e67efb2aab0e	1857	else
mbed_official	354:e67efb2aab0e	1858	{
mbed_official	354:e67efb2aab0e	1859	((uint16_t)hspi->pRxBuffPtr) = hspi->Instance->DR;
mbed_official	354:e67efb2aab0e	1860	hspi->pRxBuffPtr+=2;
mbed_official	354:e67efb2aab0e	1861	}
mbed_official	354:e67efb2aab0e	1862	hspi->RxXferCount--;
mbed_official	354:e67efb2aab0e	1863
mbed_official	354:e67efb2aab0e	1864	if(hspi->RxXferCount==0)
mbed_official	354:e67efb2aab0e	1865	{
mbed_official	354:e67efb2aab0e	1866	SPI_RxCloseIRQHandler(hspi);
mbed_official	354:e67efb2aab0e	1867	}
mbed_official	354:e67efb2aab0e	1868	}
mbed_official	354:e67efb2aab0e	1869
mbed_official	354:e67efb2aab0e	1870	/**
mbed_official	354:e67efb2aab0e	1871	* @brief Interrupt Handler to receive amount of data in no-blocking mode
mbed_official	354:e67efb2aab0e	1872	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	354:e67efb2aab0e	1873	* the configuration information for SPI module.
mbed_official	354:e67efb2aab0e	1874	* @retval void
mbed_official	354:e67efb2aab0e	1875	*/
mbed_official	354:e67efb2aab0e	1876	static void SPI_RxISR(struct __SPI_HandleTypeDef *hspi)
mbed_official	354:e67efb2aab0e	1877	{
mbed_official	354:e67efb2aab0e	1878	/* Receive data in 8 Bit mode */
mbed_official	354:e67efb2aab0e	1879	if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
mbed_official	354:e67efb2aab0e	1880	{
mbed_official	354:e67efb2aab0e	1881	(*hspi->pRxBuffPtr++) = hspi->Instance->DR;
mbed_official	354:e67efb2aab0e	1882	}
mbed_official	354:e67efb2aab0e	1883	/* Receive data in 16 Bit mode */
mbed_official	354:e67efb2aab0e	1884	else
mbed_official	354:e67efb2aab0e	1885	{
mbed_official	354:e67efb2aab0e	1886	((uint16_t)hspi->pRxBuffPtr) = hspi->Instance->DR;
mbed_official	354:e67efb2aab0e	1887	hspi->pRxBuffPtr+=2;
mbed_official	354:e67efb2aab0e	1888	}
mbed_official	354:e67efb2aab0e	1889	hspi->RxXferCount--;
mbed_official	354:e67efb2aab0e	1890
mbed_official	354:e67efb2aab0e	1891	/* Enable CRC Transmission */
mbed_official	354:e67efb2aab0e	1892	if((hspi->RxXferCount == 1) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED))
mbed_official	354:e67efb2aab0e	1893	{
mbed_official	354:e67efb2aab0e	1894	/* Set CRC Next to calculate CRC on Rx side */
mbed_official	354:e67efb2aab0e	1895	SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
mbed_official	354:e67efb2aab0e	1896	}
mbed_official	354:e67efb2aab0e	1897
mbed_official	354:e67efb2aab0e	1898	if(hspi->RxXferCount == 0)
mbed_official	354:e67efb2aab0e	1899	{
mbed_official	354:e67efb2aab0e	1900	SPI_RxCloseIRQHandler(hspi);
mbed_official	354:e67efb2aab0e	1901	}
mbed_official	354:e67efb2aab0e	1902	}
mbed_official	354:e67efb2aab0e	1903
mbed_official	354:e67efb2aab0e	1904	/**
mbed_official	354:e67efb2aab0e	1905	* @brief DMA SPI transmit process complete callback
mbed_official	354:e67efb2aab0e	1906	* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official	354:e67efb2aab0e	1907	* the configuration information for the specified DMA module.
mbed_official	354:e67efb2aab0e	1908	* @retval None
mbed_official	354:e67efb2aab0e	1909	*/
mbed_official	354:e67efb2aab0e	1910	static void SPI_DMATransmitCplt(struct __DMA_HandleTypeDef *hdma)
mbed_official	354:e67efb2aab0e	1911	{
mbed_official	354:e67efb2aab0e	1912	SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official	354:e67efb2aab0e	1913
mbed_official	354:e67efb2aab0e	1914	/* DMA Normal Mode */
mbed_official	354:e67efb2aab0e	1915	if((hdma->Instance->CCR & DMA_CIRCULAR) == 0)
mbed_official	354:e67efb2aab0e	1916	{
mbed_official	354:e67efb2aab0e	1917	/* Wait until TXE flag is set to send data */
mbed_official	354:e67efb2aab0e	1918	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
mbed_official	354:e67efb2aab0e	1919	{
mbed_official	354:e67efb2aab0e	1920	SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
mbed_official	354:e67efb2aab0e	1921	}
mbed_official	354:e67efb2aab0e	1922
mbed_official	354:e67efb2aab0e	1923	/* Disable Tx DMA Request */
mbed_official	354:e67efb2aab0e	1924	CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
mbed_official	354:e67efb2aab0e	1925
mbed_official	354:e67efb2aab0e	1926	/* Wait until Busy flag is reset before disabling SPI */
mbed_official	354:e67efb2aab0e	1927	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
mbed_official	354:e67efb2aab0e	1928	{
mbed_official	354:e67efb2aab0e	1929	SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
mbed_official	354:e67efb2aab0e	1930	}
mbed_official	354:e67efb2aab0e	1931
mbed_official	354:e67efb2aab0e	1932	hspi->TxXferCount = 0;
mbed_official	354:e67efb2aab0e	1933	hspi->State = HAL_SPI_STATE_READY;
mbed_official	354:e67efb2aab0e	1934	}
mbed_official	354:e67efb2aab0e	1935
mbed_official	354:e67efb2aab0e	1936	/* Clear OVERUN flag in 2 Lines communication mode because received is not read */
mbed_official	354:e67efb2aab0e	1937	if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
mbed_official	354:e67efb2aab0e	1938	{
mbed_official	354:e67efb2aab0e	1939	__HAL_SPI_CLEAR_OVRFLAG(hspi);
mbed_official	354:e67efb2aab0e	1940	}
mbed_official	354:e67efb2aab0e	1941
mbed_official	354:e67efb2aab0e	1942	/* Check if Errors has been detected during transfer */
mbed_official	354:e67efb2aab0e	1943	if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
mbed_official	354:e67efb2aab0e	1944	{
mbed_official	354:e67efb2aab0e	1945	HAL_SPI_ErrorCallback(hspi);
mbed_official	354:e67efb2aab0e	1946	}
mbed_official	354:e67efb2aab0e	1947	else
mbed_official	354:e67efb2aab0e	1948	{
mbed_official	354:e67efb2aab0e	1949	HAL_SPI_TxCpltCallback(hspi);
mbed_official	354:e67efb2aab0e	1950	}
mbed_official	354:e67efb2aab0e	1951	}
mbed_official	354:e67efb2aab0e	1952
mbed_official	354:e67efb2aab0e	1953	/**
mbed_official	354:e67efb2aab0e	1954	* @brief DMA SPI receive process complete callback
mbed_official	354:e67efb2aab0e	1955	* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official	354:e67efb2aab0e	1956	* the configuration information for the specified DMA module.
mbed_official	354:e67efb2aab0e	1957	* @retval None
mbed_official	354:e67efb2aab0e	1958	*/
mbed_official	354:e67efb2aab0e	1959	static void SPI_DMAReceiveCplt(struct __DMA_HandleTypeDef *hdma)
mbed_official	354:e67efb2aab0e	1960	{
mbed_official	354:e67efb2aab0e	1961	__IO uint16_t tmpreg = 0;
mbed_official	354:e67efb2aab0e	1962
mbed_official	354:e67efb2aab0e	1963	SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official	354:e67efb2aab0e	1964
mbed_official	354:e67efb2aab0e	1965	/* DMA Normal mode */
mbed_official	354:e67efb2aab0e	1966	if((hdma->Instance->CCR & DMA_CIRCULAR) == 0)
mbed_official	354:e67efb2aab0e	1967	{
mbed_official	354:e67efb2aab0e	1968	if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)\|\|(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
mbed_official	354:e67efb2aab0e	1969	{
mbed_official	354:e67efb2aab0e	1970	/* Disable SPI peripheral */
mbed_official	354:e67efb2aab0e	1971	__HAL_SPI_DISABLE(hspi);
mbed_official	354:e67efb2aab0e	1972	}
mbed_official	354:e67efb2aab0e	1973
mbed_official	354:e67efb2aab0e	1974	/* Disable Rx DMA Request */
mbed_official	354:e67efb2aab0e	1975	CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
mbed_official	354:e67efb2aab0e	1976
mbed_official	354:e67efb2aab0e	1977	/* Disable Tx DMA Request (done by default to handle the case Master RX direction 2 lines) */
mbed_official	354:e67efb2aab0e	1978	CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
mbed_official	354:e67efb2aab0e	1979
mbed_official	354:e67efb2aab0e	1980	/* Reset CRC Calculation */
mbed_official	354:e67efb2aab0e	1981	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
mbed_official	354:e67efb2aab0e	1982	{
mbed_official	354:e67efb2aab0e	1983	/* Wait until RXNE flag is set to send data */
mbed_official	354:e67efb2aab0e	1984	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
mbed_official	354:e67efb2aab0e	1985	{
mbed_official	354:e67efb2aab0e	1986	SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
mbed_official	354:e67efb2aab0e	1987	}
mbed_official	354:e67efb2aab0e	1988
mbed_official	354:e67efb2aab0e	1989	/* Read CRC */
mbed_official	354:e67efb2aab0e	1990	tmpreg = hspi->Instance->DR;
mbed_official	354:e67efb2aab0e	1991
mbed_official	354:e67efb2aab0e	1992	/* Wait until RXNE flag is set */
mbed_official	354:e67efb2aab0e	1993	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
mbed_official	354:e67efb2aab0e	1994	{
mbed_official	354:e67efb2aab0e	1995	SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
mbed_official	354:e67efb2aab0e	1996	}
mbed_official	354:e67efb2aab0e	1997
mbed_official	354:e67efb2aab0e	1998	/* Check if CRC error occurred */
mbed_official	354:e67efb2aab0e	1999	if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
mbed_official	354:e67efb2aab0e	2000	{
mbed_official	354:e67efb2aab0e	2001	SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
mbed_official	354:e67efb2aab0e	2002	__HAL_SPI_CLEAR_CRCERRFLAG(hspi);
mbed_official	354:e67efb2aab0e	2003	}
mbed_official	354:e67efb2aab0e	2004	}
mbed_official	354:e67efb2aab0e	2005
mbed_official	354:e67efb2aab0e	2006	hspi->RxXferCount = 0;
mbed_official	354:e67efb2aab0e	2007	hspi->State = HAL_SPI_STATE_READY;
mbed_official	354:e67efb2aab0e	2008
mbed_official	354:e67efb2aab0e	2009	/* Check if Errors has been detected during transfer */
mbed_official	354:e67efb2aab0e	2010	if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
mbed_official	354:e67efb2aab0e	2011	{
mbed_official	354:e67efb2aab0e	2012	HAL_SPI_ErrorCallback(hspi);
mbed_official	354:e67efb2aab0e	2013	}
mbed_official	354:e67efb2aab0e	2014	else
mbed_official	354:e67efb2aab0e	2015	{
mbed_official	354:e67efb2aab0e	2016	HAL_SPI_RxCpltCallback(hspi);
mbed_official	354:e67efb2aab0e	2017	}
mbed_official	354:e67efb2aab0e	2018	}
mbed_official	354:e67efb2aab0e	2019	else
mbed_official	354:e67efb2aab0e	2020	{
mbed_official	354:e67efb2aab0e	2021	HAL_SPI_RxCpltCallback(hspi);
mbed_official	354:e67efb2aab0e	2022	}
mbed_official	354:e67efb2aab0e	2023	}
mbed_official	354:e67efb2aab0e	2024
mbed_official	354:e67efb2aab0e	2025	/**
mbed_official	354:e67efb2aab0e	2026	* @brief DMA SPI transmit receive process complete callback
mbed_official	354:e67efb2aab0e	2027	* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official	354:e67efb2aab0e	2028	* the configuration information for the specified DMA module.
mbed_official	354:e67efb2aab0e	2029	* @retval None
mbed_official	354:e67efb2aab0e	2030	*/
mbed_official	354:e67efb2aab0e	2031	static void SPI_DMATransmitReceiveCplt(struct __DMA_HandleTypeDef *hdma)
mbed_official	354:e67efb2aab0e	2032	{
mbed_official	354:e67efb2aab0e	2033	__IO uint16_t tmpreg = 0;
mbed_official	354:e67efb2aab0e	2034
mbed_official	354:e67efb2aab0e	2035	SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official	354:e67efb2aab0e	2036
mbed_official	354:e67efb2aab0e	2037	if((hdma->Instance->CCR & DMA_CIRCULAR) == 0)
mbed_official	354:e67efb2aab0e	2038	{
mbed_official	354:e67efb2aab0e	2039	/* Reset CRC Calculation */
mbed_official	354:e67efb2aab0e	2040	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
mbed_official	354:e67efb2aab0e	2041	{
mbed_official	354:e67efb2aab0e	2042	/* Check if CRC is done on going (RXNE flag set) */
mbed_official	354:e67efb2aab0e	2043	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_TIMEOUT_VALUE) == HAL_OK)
mbed_official	354:e67efb2aab0e	2044	{
mbed_official	354:e67efb2aab0e	2045	/* Wait until RXNE flag is set to send data */
mbed_official	354:e67efb2aab0e	2046	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
mbed_official	354:e67efb2aab0e	2047	{
mbed_official	354:e67efb2aab0e	2048	SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
mbed_official	354:e67efb2aab0e	2049	}
mbed_official	354:e67efb2aab0e	2050	}
mbed_official	354:e67efb2aab0e	2051	/* Read CRC */
mbed_official	354:e67efb2aab0e	2052	tmpreg = hspi->Instance->DR;
mbed_official	354:e67efb2aab0e	2053
mbed_official	354:e67efb2aab0e	2054	/* Check if CRC error occurred */
mbed_official	354:e67efb2aab0e	2055	if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
mbed_official	354:e67efb2aab0e	2056	{
mbed_official	354:e67efb2aab0e	2057	SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
mbed_official	354:e67efb2aab0e	2058	__HAL_SPI_CLEAR_CRCERRFLAG(hspi);
mbed_official	354:e67efb2aab0e	2059	}
mbed_official	354:e67efb2aab0e	2060	}
mbed_official	354:e67efb2aab0e	2061
mbed_official	354:e67efb2aab0e	2062	/* Wait until TXE flag is set to send data */
mbed_official	354:e67efb2aab0e	2063	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
mbed_official	354:e67efb2aab0e	2064	{
mbed_official	354:e67efb2aab0e	2065	SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
mbed_official	354:e67efb2aab0e	2066	}
mbed_official	354:e67efb2aab0e	2067
mbed_official	354:e67efb2aab0e	2068	/* Disable Tx DMA Request */
mbed_official	354:e67efb2aab0e	2069	CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
mbed_official	354:e67efb2aab0e	2070
mbed_official	354:e67efb2aab0e	2071	/* Wait until Busy flag is reset before disabling SPI */
mbed_official	354:e67efb2aab0e	2072	if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
mbed_official	354:e67efb2aab0e	2073	{
mbed_official	354:e67efb2aab0e	2074	SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
mbed_official	354:e67efb2aab0e	2075	}
mbed_official	354:e67efb2aab0e	2076
mbed_official	354:e67efb2aab0e	2077	/* Disable Rx DMA Request */
mbed_official	354:e67efb2aab0e	2078	CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
mbed_official	354:e67efb2aab0e	2079
mbed_official	354:e67efb2aab0e	2080	hspi->TxXferCount = 0;
mbed_official	354:e67efb2aab0e	2081	hspi->RxXferCount = 0;
mbed_official	354:e67efb2aab0e	2082
mbed_official	354:e67efb2aab0e	2083	hspi->State = HAL_SPI_STATE_READY;
mbed_official	354:e67efb2aab0e	2084
mbed_official	354:e67efb2aab0e	2085	/* Check if Errors has been detected during transfer */
mbed_official	354:e67efb2aab0e	2086	if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
mbed_official	354:e67efb2aab0e	2087	{
mbed_official	354:e67efb2aab0e	2088	HAL_SPI_ErrorCallback(hspi);
mbed_official	354:e67efb2aab0e	2089	}
mbed_official	354:e67efb2aab0e	2090	else
mbed_official	354:e67efb2aab0e	2091	{
mbed_official	354:e67efb2aab0e	2092	HAL_SPI_TxRxCpltCallback(hspi);
mbed_official	354:e67efb2aab0e	2093	}
mbed_official	354:e67efb2aab0e	2094	}
mbed_official	354:e67efb2aab0e	2095	else
mbed_official	354:e67efb2aab0e	2096	{
mbed_official	354:e67efb2aab0e	2097	HAL_SPI_TxRxCpltCallback(hspi);
mbed_official	354:e67efb2aab0e	2098	}
mbed_official	354:e67efb2aab0e	2099	}
mbed_official	354:e67efb2aab0e	2100
mbed_official	354:e67efb2aab0e	2101	/**
mbed_official	354:e67efb2aab0e	2102	* @brief DMA SPI half transmit process complete callback
mbed_official	354:e67efb2aab0e	2103	* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official	354:e67efb2aab0e	2104	* the configuration information for the specified DMA module.
mbed_official	354:e67efb2aab0e	2105	* @retval None
mbed_official	354:e67efb2aab0e	2106	*/
mbed_official	354:e67efb2aab0e	2107	static void SPI_DMAHalfTransmitCplt(struct __DMA_HandleTypeDef *hdma)
mbed_official	354:e67efb2aab0e	2108	{
mbed_official	354:e67efb2aab0e	2109	SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official	354:e67efb2aab0e	2110
mbed_official	354:e67efb2aab0e	2111	HAL_SPI_TxHalfCpltCallback(hspi);
mbed_official	354:e67efb2aab0e	2112	}
mbed_official	354:e67efb2aab0e	2113
mbed_official	354:e67efb2aab0e	2114	/**
mbed_official	354:e67efb2aab0e	2115	* @brief DMA SPI half receive process complete callback
mbed_official	354:e67efb2aab0e	2116	* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official	354:e67efb2aab0e	2117	* the configuration information for the specified DMA module.
mbed_official	354:e67efb2aab0e	2118	* @retval None
mbed_official	354:e67efb2aab0e	2119	*/
mbed_official	354:e67efb2aab0e	2120	static void SPI_DMAHalfReceiveCplt(struct __DMA_HandleTypeDef *hdma)
mbed_official	354:e67efb2aab0e	2121	{
mbed_official	354:e67efb2aab0e	2122	SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official	354:e67efb2aab0e	2123
mbed_official	354:e67efb2aab0e	2124	HAL_SPI_RxHalfCpltCallback(hspi);
mbed_official	354:e67efb2aab0e	2125	}
mbed_official	354:e67efb2aab0e	2126
mbed_official	354:e67efb2aab0e	2127	/**
mbed_official	354:e67efb2aab0e	2128	* @brief DMA SPI Half transmit receive process complete callback
mbed_official	354:e67efb2aab0e	2129	* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official	354:e67efb2aab0e	2130	* the configuration information for the specified DMA module.
mbed_official	354:e67efb2aab0e	2131	* @retval None
mbed_official	354:e67efb2aab0e	2132	*/
mbed_official	354:e67efb2aab0e	2133	static void SPI_DMAHalfTransmitReceiveCplt(struct __DMA_HandleTypeDef *hdma)
mbed_official	354:e67efb2aab0e	2134	{
mbed_official	354:e67efb2aab0e	2135	SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official	354:e67efb2aab0e	2136
mbed_official	354:e67efb2aab0e	2137	HAL_SPI_TxRxHalfCpltCallback(hspi);
mbed_official	354:e67efb2aab0e	2138	}
mbed_official	354:e67efb2aab0e	2139
mbed_official	354:e67efb2aab0e	2140	/**
mbed_official	354:e67efb2aab0e	2141	* @brief DMA SPI communication error callback
mbed_official	354:e67efb2aab0e	2142	* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official	354:e67efb2aab0e	2143	* the configuration information for the specified DMA module.
mbed_official	354:e67efb2aab0e	2144	* @retval None
mbed_official	354:e67efb2aab0e	2145	*/
mbed_official	354:e67efb2aab0e	2146	static void SPI_DMAError(DMA_HandleTypeDef *hdma)
mbed_official	354:e67efb2aab0e	2147	{
mbed_official	354:e67efb2aab0e	2148	SPI_HandleTypeDef* hspi = (SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official	354:e67efb2aab0e	2149	hspi->TxXferCount = 0;
mbed_official	354:e67efb2aab0e	2150	hspi->RxXferCount = 0;
mbed_official	354:e67efb2aab0e	2151	hspi->State= HAL_SPI_STATE_READY;
mbed_official	354:e67efb2aab0e	2152	SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA);
mbed_official	354:e67efb2aab0e	2153	HAL_SPI_ErrorCallback(hspi);
mbed_official	354:e67efb2aab0e	2154	}
mbed_official	354:e67efb2aab0e	2155
mbed_official	354:e67efb2aab0e	2156	/**
mbed_official	354:e67efb2aab0e	2157	* @brief This function handles SPI Communication Timeout.
mbed_official	354:e67efb2aab0e	2158	* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
mbed_official	354:e67efb2aab0e	2159	* the configuration information for SPI module.
mbed_official	354:e67efb2aab0e	2160	* @param Flag: SPI flag to check
mbed_official	354:e67efb2aab0e	2161	* @param Status: Flag status to check: RESET or set
mbed_official	354:e67efb2aab0e	2162	* @param Timeout: Timeout duration
mbed_official	354:e67efb2aab0e	2163	* @retval HAL status
mbed_official	354:e67efb2aab0e	2164	*/
mbed_official	354:e67efb2aab0e	2165	static HAL_StatusTypeDef SPI_WaitOnFlagUntilTimeout(struct __SPI_HandleTypeDef *hspi, uint32_t Flag, FlagStatus Status, uint32_t Timeout)
mbed_official	354:e67efb2aab0e	2166	{
mbed_official	354:e67efb2aab0e	2167	uint32_t tickstart = 0;
mbed_official	354:e67efb2aab0e	2168
mbed_official	354:e67efb2aab0e	2169	/* Get tick */
mbed_official	354:e67efb2aab0e	2170	tickstart = HAL_GetTick();
mbed_official	354:e67efb2aab0e	2171
mbed_official	354:e67efb2aab0e	2172	/* Wait until flag is set */
mbed_official	354:e67efb2aab0e	2173	if(Status == RESET)
mbed_official	354:e67efb2aab0e	2174	{
mbed_official	354:e67efb2aab0e	2175	while(__HAL_SPI_GET_FLAG(hspi, Flag) == RESET)
mbed_official	354:e67efb2aab0e	2176	{
mbed_official	354:e67efb2aab0e	2177	if(Timeout != HAL_MAX_DELAY)
mbed_official	354:e67efb2aab0e	2178	{
mbed_official	354:e67efb2aab0e	2179	if((Timeout == 0) \|\| ((HAL_GetTick() - tickstart ) > Timeout))
mbed_official	354:e67efb2aab0e	2180	{
mbed_official	354:e67efb2aab0e	2181	/* Disable the SPI and reset the CRC: the CRC value should be cleared
mbed_official	354:e67efb2aab0e	2182	on both master and slave sides in order to resynchronize the master
mbed_official	354:e67efb2aab0e	2183	and slave for their respective CRC calculation */
mbed_official	354:e67efb2aab0e	2184
mbed_official	354:e67efb2aab0e	2185	/* Disable TXE, RXNE and ERR interrupts for the interrupt process */
mbed_official	354:e67efb2aab0e	2186	__HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE \| SPI_IT_RXNE \| SPI_IT_ERR));
mbed_official	354:e67efb2aab0e	2187
mbed_official	354:e67efb2aab0e	2188	/* Disable SPI peripheral */
mbed_official	354:e67efb2aab0e	2189	__HAL_SPI_DISABLE(hspi);
mbed_official	354:e67efb2aab0e	2190
mbed_official	354:e67efb2aab0e	2191	/* Reset CRC Calculation */
mbed_official	354:e67efb2aab0e	2192	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
mbed_official	354:e67efb2aab0e	2193	{
mbed_official	354:e67efb2aab0e	2194	SPI_RESET_CRC(hspi);
mbed_official	354:e67efb2aab0e	2195	}
mbed_official	354:e67efb2aab0e	2196
mbed_official	354:e67efb2aab0e	2197	hspi->State= HAL_SPI_STATE_READY;
mbed_official	354:e67efb2aab0e	2198
mbed_official	354:e67efb2aab0e	2199	/* Process Unlocked */
mbed_official	354:e67efb2aab0e	2200	__HAL_UNLOCK(hspi);
mbed_official	354:e67efb2aab0e	2201
mbed_official	354:e67efb2aab0e	2202	return HAL_TIMEOUT;
mbed_official	354:e67efb2aab0e	2203	}
mbed_official	354:e67efb2aab0e	2204	}
mbed_official	354:e67efb2aab0e	2205	}
mbed_official	354:e67efb2aab0e	2206	}
mbed_official	354:e67efb2aab0e	2207	else
mbed_official	354:e67efb2aab0e	2208	{
mbed_official	354:e67efb2aab0e	2209	while(__HAL_SPI_GET_FLAG(hspi, Flag) != RESET)
mbed_official	354:e67efb2aab0e	2210	{
mbed_official	354:e67efb2aab0e	2211	if(Timeout != HAL_MAX_DELAY)
mbed_official	354:e67efb2aab0e	2212	{
mbed_official	354:e67efb2aab0e	2213	if((Timeout == 0) \|\| ((HAL_GetTick() - tickstart ) > Timeout))
mbed_official	354:e67efb2aab0e	2214	{
mbed_official	354:e67efb2aab0e	2215	/* Disable the SPI and reset the CRC: the CRC value should be cleared
mbed_official	354:e67efb2aab0e	2216	on both master and slave sides in order to resynchronize the master
mbed_official	354:e67efb2aab0e	2217	and slave for their respective CRC calculation */
mbed_official	354:e67efb2aab0e	2218
mbed_official	354:e67efb2aab0e	2219	/* Disable TXE, RXNE and ERR interrupts for the interrupt process */
mbed_official	354:e67efb2aab0e	2220	__HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE \| SPI_IT_RXNE \| SPI_IT_ERR));
mbed_official	354:e67efb2aab0e	2221
mbed_official	354:e67efb2aab0e	2222	/* Disable SPI peripheral */
mbed_official	354:e67efb2aab0e	2223	__HAL_SPI_DISABLE(hspi);
mbed_official	354:e67efb2aab0e	2224
mbed_official	354:e67efb2aab0e	2225	/* Reset CRC Calculation */
mbed_official	354:e67efb2aab0e	2226	if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLED)
mbed_official	354:e67efb2aab0e	2227	{
mbed_official	354:e67efb2aab0e	2228	SPI_RESET_CRC(hspi);
mbed_official	354:e67efb2aab0e	2229	}
mbed_official	354:e67efb2aab0e	2230
mbed_official	354:e67efb2aab0e	2231	hspi->State= HAL_SPI_STATE_READY;
mbed_official	354:e67efb2aab0e	2232
mbed_official	354:e67efb2aab0e	2233	/* Process Unlocked */
mbed_official	354:e67efb2aab0e	2234	__HAL_UNLOCK(hspi);
mbed_official	354:e67efb2aab0e	2235
mbed_official	354:e67efb2aab0e	2236	return HAL_TIMEOUT;
mbed_official	354:e67efb2aab0e	2237	}
mbed_official	354:e67efb2aab0e	2238	}
mbed_official	354:e67efb2aab0e	2239	}
mbed_official	354:e67efb2aab0e	2240	}
mbed_official	354:e67efb2aab0e	2241	return HAL_OK;
mbed_official	354:e67efb2aab0e	2242	}
mbed_official	354:e67efb2aab0e	2243	/**
mbed_official	354:e67efb2aab0e	2244	* @}
mbed_official	354:e67efb2aab0e	2245	*/
mbed_official	354:e67efb2aab0e	2246
mbed_official	354:e67efb2aab0e	2247	#endif /* HAL_SPI_MODULE_ENABLED */
mbed_official	354:e67efb2aab0e	2248	/**
mbed_official	354:e67efb2aab0e	2249	* @}
mbed_official	354:e67efb2aab0e	2250	*/
mbed_official	354:e67efb2aab0e	2251
mbed_official	354:e67efb2aab0e	2252	/**
mbed_official	354:e67efb2aab0e	2253	* @}
mbed_official	354:e67efb2aab0e	2254	*/
mbed_official	354:e67efb2aab0e	2255
mbed_official	354:e67efb2aab0e	2256	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Type:	Library
Created:	15 Nov 2014
Imports:	9
Forks:	0
Commits:	401
Dependents:	0
Dependencies:	0
Followers:	3

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Stuart Northfield

Tony Engeham

targets/cmsis/TARGET_STM/TARGET_STM32L1/stm32l1xx_hal_spi.c@394:83f921546702, 2014-11-07 (annotated)

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