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targets/cmsis/TARGET_STM/TARGET_DISCO_F334C8/stm32f3xx_hal_hrtim.c@381:5460fc57b6e4, 2014-11-03 (annotated)

Committer:: mbed_official
Date:: Mon Nov 03 10:30:07 2014 +0000
Revision:: 381:5460fc57b6e4

Synchronized with git revision 02478cd1f27fc7b9643486472635eb515b2bca81

Full URL: https://github.com/mbedmicro/mbed/commit/02478cd1f27fc7b9643486472635eb515b2bca81/

Target: LPC1549 - Fix serial interrupt issues (issue report #616)

Who changed what in which revision?

User	Revision	Line number	New contents of line
mbed_official	381:5460fc57b6e4	1	/**
mbed_official	381:5460fc57b6e4	2	******************************************************************************
mbed_official	381:5460fc57b6e4	3	* @file stm32f3xx_hal_hrtim.c
mbed_official	381:5460fc57b6e4	4	* @author MCD Application Team
mbed_official	381:5460fc57b6e4	5	* @version V1.1.0
mbed_official	381:5460fc57b6e4	6	* @date 12-Sept-2014
mbed_official	381:5460fc57b6e4	7	* @brief TIM HAL module driver.
mbed_official	381:5460fc57b6e4	8	* This file provides firmware functions to manage the following
mbed_official	381:5460fc57b6e4	9	* functionalities of the High Resolution Timer (HRTIM) peripheral:
mbed_official	381:5460fc57b6e4	10	* + HRTIM Initialization
mbed_official	381:5460fc57b6e4	11	* + DLL Calibration Start
mbed_official	381:5460fc57b6e4	12	* + Timer Time Base Unit Configuration
mbed_official	381:5460fc57b6e4	13	* + Simple Time Base Start/Stop
mbed_official	381:5460fc57b6e4	14	* + Simple Time Base Start/Stop Interrupt
mbed_official	381:5460fc57b6e4	15	* + Simple Time Base Start/Stop DMA Request
mbed_official	381:5460fc57b6e4	16	* + Simple Output Compare/PWM Channel Configuration
mbed_official	381:5460fc57b6e4	17	* + Simple Output Compare/PWM Channel Start/Stop Interrupt
mbed_official	381:5460fc57b6e4	18	* + Simple Output Compare/PWM Channel Start/Stop DMA Request
mbed_official	381:5460fc57b6e4	19	* + Simple Input Capture Channel Configuration
mbed_official	381:5460fc57b6e4	20	* + Simple Input Capture Channel Start/Stop Interrupt
mbed_official	381:5460fc57b6e4	21	* + Simple Input Capture Channel Start/Stop DMA Request
mbed_official	381:5460fc57b6e4	22	* + Simple One Pulse Channel Configuration
mbed_official	381:5460fc57b6e4	23	* + Simple One Pulse Channel Start/Stop Interrupt
mbed_official	381:5460fc57b6e4	24	* + HRTIM External Synchronization Configuration
mbed_official	381:5460fc57b6e4	25	* + HRTIM Burst Mode Controller Configuration
mbed_official	381:5460fc57b6e4	26	* + HRTIM Burst Mode Controller Enabling
mbed_official	381:5460fc57b6e4	27	* + HRTIM External Events Conditioning Configuration
mbed_official	381:5460fc57b6e4	28	* + HRTIM Faults Conditioning Configuration
mbed_official	381:5460fc57b6e4	29	* + HRTIM Faults Enabling
mbed_official	381:5460fc57b6e4	30	* + HRTIM ADC trigger Configuration
mbed_official	381:5460fc57b6e4	31	* + Waveform Timer Configuration
mbed_official	381:5460fc57b6e4	32	* + Waveform Event Filtering Configuration
mbed_official	381:5460fc57b6e4	33	* + Waveform Dead Time Insertion Configuration
mbed_official	381:5460fc57b6e4	34	* + Waveform Chopper Mode Configuration
mbed_official	381:5460fc57b6e4	35	* + Waveform Compare Unit Configuration
mbed_official	381:5460fc57b6e4	36	* + Waveform Capture Unit Configuration
mbed_official	381:5460fc57b6e4	37	* + Waveform Output Configuration
mbed_official	381:5460fc57b6e4	38	* + Waveform Counter Start/Stop
mbed_official	381:5460fc57b6e4	39	* + Waveform Counter Start/Stop Interrupt
mbed_official	381:5460fc57b6e4	40	* + Waveform Counter Start/Stop DMA Request
mbed_official	381:5460fc57b6e4	41	* + Waveform Output Enabling
mbed_official	381:5460fc57b6e4	42	* + Waveform Output Level Set/Get
mbed_official	381:5460fc57b6e4	43	* + Waveform Output State Get
mbed_official	381:5460fc57b6e4	44	* + Waveform Burst DMA Operation Configuration
mbed_official	381:5460fc57b6e4	45	* + Waveform Burst DMA Operation Start
mbed_official	381:5460fc57b6e4	46	* + Waveform Timer Counter Software Reset
mbed_official	381:5460fc57b6e4	47	* + Waveform Capture Software Trigger
mbed_official	381:5460fc57b6e4	48	* + Waveform Burst Mode Controller Software Trigger
mbed_official	381:5460fc57b6e4	49	* + Waveform Timer Pre-loadable Registers Update Enabling
mbed_official	381:5460fc57b6e4	50	* + Waveform Timer Pre-loadable Registers Software Update
mbed_official	381:5460fc57b6e4	51	* + Waveform Timer Delayed Protection Status Get
mbed_official	381:5460fc57b6e4	52	* + Waveform Timer Burst Status Get
mbed_official	381:5460fc57b6e4	53	* + Waveform Timer Push-Pull Status Get
mbed_official	381:5460fc57b6e4	54	* + Peripheral State Get
mbed_official	381:5460fc57b6e4	55	@verbatim
mbed_official	381:5460fc57b6e4	56	==============================================================================
mbed_official	381:5460fc57b6e4	57	##### Simple mode v.s. waveform mode #####
mbed_official	381:5460fc57b6e4	58	==============================================================================
mbed_official	381:5460fc57b6e4	59	[..] The HRTIM HAL API is split into 2 categories:
mbed_official	381:5460fc57b6e4	60	(#)Simple functions: these functions allow for using a HRTIM timer as a
mbed_official	381:5460fc57b6e4	61	general purpose timer with high resolution capabilities.
mbed_official	381:5460fc57b6e4	62	Following simple modes are proposed:
mbed_official	381:5460fc57b6e4	63	(+)Output compare mode
mbed_official	381:5460fc57b6e4	64	(+)PWM output mode
mbed_official	381:5460fc57b6e4	65	(+)Input capture mode
mbed_official	381:5460fc57b6e4	66	(+)One pulse mode
mbed_official	381:5460fc57b6e4	67	HRTIM simple modes are managed through the set of functions named
mbed_official	381:5460fc57b6e4	68	HAL_HRTIM_Simple<Function>. These functions are similar in name and usage
mbed_official	381:5460fc57b6e4	69	to the one defined for the TIM peripheral. When a HRTIM timer operates in
mbed_official	381:5460fc57b6e4	70	simple mode, only a very limited set of HRTIM features are used.
mbed_official	381:5460fc57b6e4	71	(#)Waveform functions: These functions allow taking advantage of the HRTIM
mbed_official	381:5460fc57b6e4	72	flexibility to produce numerous types of control signal. When a HRTIM timer
mbed_official	381:5460fc57b6e4	73	operates in waveform mode, all the HRTIM features are accessible without
mbed_official	381:5460fc57b6e4	74	any restriction. HRTIM waveform modes are managed through the set of
mbed_official	381:5460fc57b6e4	75	functions named HAL_HRTIM_Waveform<Function>
mbed_official	381:5460fc57b6e4	76
mbed_official	381:5460fc57b6e4	77	==============================================================================
mbed_official	381:5460fc57b6e4	78	##### How to use this driver #####
mbed_official	381:5460fc57b6e4	79	==============================================================================
mbed_official	381:5460fc57b6e4	80	[..]
mbed_official	381:5460fc57b6e4	81	(#)Initialize the HRTIM low level resources by implementing the
mbed_official	381:5460fc57b6e4	82	HAL_HRTIM_MspInit() function:
mbed_official	381:5460fc57b6e4	83	(##)Enable the HRTIM clock source using __HRTIMx_CLK_ENABLE()
mbed_official	381:5460fc57b6e4	84	(##)Connect HRTIM pins to MCU I/Os
mbed_official	381:5460fc57b6e4	85	(+++) Enable the clock for the HRTIM GPIOs using the following
mbed_official	381:5460fc57b6e4	86	function: __GPIOx_CLK_ENABLE()
mbed_official	381:5460fc57b6e4	87	(+++) Configure these GPIO pins in Alternate Function mode using
mbed_official	381:5460fc57b6e4	88	HAL_GPIO_Init()
mbed_official	381:5460fc57b6e4	89	(##)When using DMA to control data transfer (e.g HAL_HRTIM_SimpleBaseStart_DMA())
mbed_official	381:5460fc57b6e4	90	(+++)Enable the DMAx interface clock using __DMAx_CLK_ENABLE()
mbed_official	381:5460fc57b6e4	91	(+++)Initialize the DMA handle
mbed_official	381:5460fc57b6e4	92	(+++)Associate the initialized DMA handle to the appropriate DMA
mbed_official	381:5460fc57b6e4	93	handle of the HRTIM handle using __HAL_LINKDMA()
mbed_official	381:5460fc57b6e4	94	(+++)Initialize the DMA channel using HAL_DMA_Init()
mbed_official	381:5460fc57b6e4	95	(+++)Configure the priority and enable the NVIC for the transfer
mbed_official	381:5460fc57b6e4	96	complete interrupt on the DMA channel using HAL_NVIC_SetPriority()
mbed_official	381:5460fc57b6e4	97	and HAL_NVIC_EnableIRQ()
mbed_official	381:5460fc57b6e4	98	(##)In case of using interrupt mode (e.g HAL_HRTIM_SimpleBaseStart_IT())
mbed_official	381:5460fc57b6e4	99	(+++)Configure the priority and enable the NVIC for the concerned
mbed_official	381:5460fc57b6e4	100	HRTIM interrupt using HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ()
mbed_official	381:5460fc57b6e4	101
mbed_official	381:5460fc57b6e4	102	(#)Initialize the HRTIM HAL using HAL_HRTIM_Init(). The HRTIM configuration
mbed_official	381:5460fc57b6e4	103	structure (field of the HRTIM handle) specifies which global interrupt of
mbed_official	381:5460fc57b6e4	104	whole HRTIM must be enabled (Burst mode period, System fault, Faults).
mbed_official	381:5460fc57b6e4	105	It also contains the HRTIM external synchronization configuration. HRTIM
mbed_official	381:5460fc57b6e4	106	can act as a master (generating a synchronization signal) or as a slave
mbed_official	381:5460fc57b6e4	107	(waiting for a trigger to be synchronized).
mbed_official	381:5460fc57b6e4	108
mbed_official	381:5460fc57b6e4	109	(#)Start the high resolution unit using HAL_HRTIM_DLLCalibrationStart(). DLL
mbed_official	381:5460fc57b6e4	110	calibration is executed periodically and compensate for potential voltage
mbed_official	381:5460fc57b6e4	111	and temperature drifts. DLL calibration period is specified by the
mbed_official	381:5460fc57b6e4	112	CalibrationRate argument.
mbed_official	381:5460fc57b6e4	113
mbed_official	381:5460fc57b6e4	114	(#)HRTIM timers cannot be used until the high resolution unit is ready. This
mbed_official	381:5460fc57b6e4	115	can be checked using HAL_HRTIM_PollForDLLCalibration(): this function returns
mbed_official	381:5460fc57b6e4	116	HAL_OK if DLL calibration is completed or HAL_TIMEOUT if the DLL calibration
mbed_official	381:5460fc57b6e4	117	is still going on when timeout given is argument expires. DLL calibration
mbed_official	381:5460fc57b6e4	118	can also be started in interrupt mode using HAL_HRTIM_DLLCalibrationStart_IT().
mbed_official	381:5460fc57b6e4	119	In that case an interrupt is generated when the DLL calibration is completed.
mbed_official	381:5460fc57b6e4	120	Note that as DLL calibration is executed on a periodic basis an interrupt
mbed_official	381:5460fc57b6e4	121	will be generated at the end of every DLL calibration operation
mbed_official	381:5460fc57b6e4	122	(worst case: one interrupt every 14 micro seconds !).
mbed_official	381:5460fc57b6e4	123
mbed_official	381:5460fc57b6e4	124	(#) Configure HRTIM resources shared by all HRTIM timers
mbed_official	381:5460fc57b6e4	125	(##)Burst Mode Controller:
mbed_official	381:5460fc57b6e4	126	(+++)HAL_HRTIM_BurstModeConfig(): configures the HRTIM burst mode
mbed_official	381:5460fc57b6e4	127	controller: operating mode (continuous or -shot mode), clock
mbed_official	381:5460fc57b6e4	128	(source, prescaler) , trigger(s), period, idle duration.
mbed_official	381:5460fc57b6e4	129	(##)External Events Conditionning:
mbed_official	381:5460fc57b6e4	130	(+++)HAL_HRTIM_EventConfig(): configures the conditioning of an
mbed_official	381:5460fc57b6e4	131	external event channel: source, polarity, edge-sensitivity.
mbed_official	381:5460fc57b6e4	132	External event can be used as triggers (timer reset, input
mbed_official	381:5460fc57b6e4	133	capture, burst mode, ADC triggers, delayed protection, )
mbed_official	381:5460fc57b6e4	134	They can also be used to set or reset timer outputs. Up to
mbed_official	381:5460fc57b6e4	135	10 event channels are available.
mbed_official	381:5460fc57b6e4	136	(+++)HAL_HRTIM_EventPrescalerConfig(): configures the external
mbed_official	381:5460fc57b6e4	137	event sampling clock (used for digital filtering).
mbed_official	381:5460fc57b6e4	138	(##)Fault Conditionning:
mbed_official	381:5460fc57b6e4	139	(+++)HAL_HRTIM_FaultConfig(): configures the conditioning of a
mbed_official	381:5460fc57b6e4	140	fault channel: source, polarity, edge-sensitivity. Fault
mbed_official	381:5460fc57b6e4	141	channels are used to disable the outputs in case of an
mbed_official	381:5460fc57b6e4	142	abnormal operation. Up to 5 fault channels are available.
mbed_official	381:5460fc57b6e4	143	(+++)HAL_HRTIM_FaultPrescalerConfig(): configures the fault
mbed_official	381:5460fc57b6e4	144	sampling clock (used for digital filtering).
mbed_official	381:5460fc57b6e4	145	(+++)HAL_HRTIM_FaultModeCtl(): Enables or disables fault input(s)
mbed_official	381:5460fc57b6e4	146	circuitry. By default all fault inputs are disabled.
mbed_official	381:5460fc57b6e4	147	(##)ADC trigger:
mbed_official	381:5460fc57b6e4	148	(+++)HAL_HRTIM_ADCTriggerConfig(): configures the source triggering
mbed_official	381:5460fc57b6e4	149	the update of the ADC trigger register and the ADC trigger.
mbed_official	381:5460fc57b6e4	150	4 independent triggers are available to start both the regular
mbed_official	381:5460fc57b6e4	151	and the injected sequencers of the 2 ADCs
mbed_official	381:5460fc57b6e4	152
mbed_official	381:5460fc57b6e4	153	(#) Configure HRTIM timer time base using HAL_HRTIM_TimeBaseConfig(). This
mbed_official	381:5460fc57b6e4	154	function must be called whatever the HRTIM timer operating mode is
mbed_official	381:5460fc57b6e4	155	(simple v.s. waveform). It configures mainly:
mbed_official	381:5460fc57b6e4	156	(##)The HRTIM timer counter operating mode (continuous, one shot)
mbed_official	381:5460fc57b6e4	157	(##)The HRTIM timer clock prescaler
mbed_official	381:5460fc57b6e4	158	(##)The HRTIM timer period
mbed_official	381:5460fc57b6e4	159	(##)The HRTIM timer repetition counter
mbed_official	381:5460fc57b6e4	160
mbed_official	381:5460fc57b6e4	161	(#) If the HRTIM timer operates in simple mode:
mbed_official	381:5460fc57b6e4	162	(##)Simple time base: HAL_HRTIM_SimpleBaseStart(),HAL_HRTIM_SimpleBaseStop(),
mbed_official	381:5460fc57b6e4	163	HAL_HRTIM_SimpleBaseStart_IT(),HAL_HRTIM_SimpleBaseStop_IT(),
mbed_official	381:5460fc57b6e4	164	HAL_HRTIM_SimpleBaseStart_DMA(),HAL_HRTIM_SimpleBaseStop_DMA().
mbed_official	381:5460fc57b6e4	165	(##)Simple output compare: HAL_HRTIM_SimpleOCChannelConfig(),
mbed_official	381:5460fc57b6e4	166	HAL_HRTIM_SimpleOCStart(),HAL_HRTIM_SimpleOCStop(),
mbed_official	381:5460fc57b6e4	167	HAL_HRTIM_SimpleOCStart_IT(),HAL_HRTIM_SimpleOCStop_IT(),
mbed_official	381:5460fc57b6e4	168	HAL_HRTIM_SimpleOCStart_DMA(),HAL_HRTIM_SimpleOCStop_DMA(),
mbed_official	381:5460fc57b6e4	169	(##)Simple PWM output: HAL_HRTIM_SimplePWMChannelConfig(),
mbed_official	381:5460fc57b6e4	170	HAL_HRTIM_SimplePWMStart(),HAL_HRTIM_SimplePWMStop(),
mbed_official	381:5460fc57b6e4	171	HAL_HRTIM_SimplePWMStart_IT(),HAL_HRTIM_SimplePWMStop_IT(),
mbed_official	381:5460fc57b6e4	172	HAL_HRTIM_SimplePWMStart_DMA(),HAL_HRTIM_SimplePWMStop_DMA(),
mbed_official	381:5460fc57b6e4	173	(##)Simple input capture: HAL_HRTIM_SimpleCaptureChannelConfig(),
mbed_official	381:5460fc57b6e4	174	HAL_HRTIM_SimpleCaptureStart(),HAL_HRTIM_SimpleCaptureStop(),
mbed_official	381:5460fc57b6e4	175	HAL_HRTIM_SimpleCaptureStart_IT(),HAL_HRTIM_SimpleCaptureStop_IT(),
mbed_official	381:5460fc57b6e4	176	HAL_HRTIM_SimpleCaptureStart_DMA(),HAL_HRTIM_SimpleCaptureStop_DMA().
mbed_official	381:5460fc57b6e4	177	(##)Simple one pulse: HAL_HRTIM_SimpleOnePulseChannelConfig(),
mbed_official	381:5460fc57b6e4	178	HAL_HRTIM_SimpleOnePulseStart(),HAL_HRTIM_SimpleOnePulseStop(),
mbed_official	381:5460fc57b6e4	179	HAL_HRTIM_SimpleOnePulseStart_IT(),HAL_HRTIM_SimpleOnePulseStop_It().
mbed_official	381:5460fc57b6e4	180
mbed_official	381:5460fc57b6e4	181	(#) If the HRTIM timer operates in waveform mode:
mbed_official	381:5460fc57b6e4	182	(##)Completes waveform timer configuration
mbed_official	381:5460fc57b6e4	183	(+++)HAL_HRTIM_WaveformTimerConfig(): configuration of a HRTIM
mbed_official	381:5460fc57b6e4	184	timer operating in wave form mode mainly consists in:
mbed_official	381:5460fc57b6e4	185	- Enabling the HRTIM timer interrupts and DMA requests,
mbed_official	381:5460fc57b6e4	186	- Enabling the half mode for the HRTIM timer,
mbed_official	381:5460fc57b6e4	187	- Defining how the HRTIM timer reacts to external
mbed_official	381:5460fc57b6e4	188	synchronization input,
mbed_official	381:5460fc57b6e4	189	- Enabling the push-pull mode for the HRTIM timer,
mbed_official	381:5460fc57b6e4	190	- Enabling the fault channels for the HRTIM timer,
mbed_official	381:5460fc57b6e4	191	- Enabling the deadtime insertion for the HRTIM timer,
mbed_official	381:5460fc57b6e4	192	- Setting the delayed protection mode for the HRTIM timer
mbed_official	381:5460fc57b6e4	193	(source and outputs on which the delayed protection are applied),
mbed_official	381:5460fc57b6e4	194	- Specifying the HRTIM timer update and reset triggers,
mbed_official	381:5460fc57b6e4	195	- Specifying the HRTIM timer registers update policy (preload enabling, ).
mbed_official	381:5460fc57b6e4	196	(+++)HAL_HRTIM_TimerEventFilteringConfig(): configures external
mbed_official	381:5460fc57b6e4	197	event blanking and windowingcircuitry of a HRTIM timer:
mbed_official	381:5460fc57b6e4	198	- Blanking: to mask external events during a defined
mbed_official	381:5460fc57b6e4	199	time period
mbed_official	381:5460fc57b6e4	200	- Windowing: to enable external events only during
mbed_official	381:5460fc57b6e4	201	a defined time period
mbed_official	381:5460fc57b6e4	202	(+++)HAL_HRTIM_DeadTimeConfig(): configures the deadtime insertion
mbed_official	381:5460fc57b6e4	203	unit for a HRTIM timer. Allows to generate a couple of
mbed_official	381:5460fc57b6e4	204	complementary signals from a single reference waveform,
mbed_official	381:5460fc57b6e4	205	with programmable delays between active state.
mbed_official	381:5460fc57b6e4	206	(+++)HAL_HRTIM_ChopperModeConfig(): configures the parameters of
mbed_official	381:5460fc57b6e4	207	the high-frequency carrier signal added on top of the timing
mbed_official	381:5460fc57b6e4	208	unit output. Chopper mode can be enabled or disabled for each
mbed_official	381:5460fc57b6e4	209	timer output separately (see HAL_HRTIM_WaveformOutputConfig()).
mbed_official	381:5460fc57b6e4	210	(+++)HAL_HRTIM_BurstDMAConfig(): configures the burst DMA burst
mbed_official	381:5460fc57b6e4	211	controller. Allows having multiple HRTIM registers updated
mbed_official	381:5460fc57b6e4	212	with a single DMA request. The burst DMA operation is started
mbed_official	381:5460fc57b6e4	213	by calling HAL_HRTIM_BurstDMATransfer().
mbed_official	381:5460fc57b6e4	214	(+++)HAL_HRTIM_WaveformCompareConfig():configures the compare unit
mbed_official	381:5460fc57b6e4	215	of a HRTIM timer. This operation consists in setting the
mbed_official	381:5460fc57b6e4	216	compare value and possibly specifying the auto delayed mode
mbed_official	381:5460fc57b6e4	217	for compare units 2 and 4 (allows to have compare events
mbed_official	381:5460fc57b6e4	218	generated relatively to capture events). Note that when auto
mbed_official	381:5460fc57b6e4	219	delayed mode is needed, the capture unit associated to the
mbed_official	381:5460fc57b6e4	220	compare unit must be configured separately.
mbed_official	381:5460fc57b6e4	221	(+++)HAL_HRTIM_WaveformCaptureConfig(): configures the capture unit
mbed_official	381:5460fc57b6e4	222	of a HRTIM timer. This operation consists in specifying the
mbed_official	381:5460fc57b6e4	223	source(s) triggering the capture (timer register update event,
mbed_official	381:5460fc57b6e4	224	external event, timer output set/reset event, other HRTIM
mbed_official	381:5460fc57b6e4	225	timer related events).
mbed_official	381:5460fc57b6e4	226	(+++)HAL_HRTIM_WaveformOutputConfig(): configuration HRTIM timer
mbed_official	381:5460fc57b6e4	227	output manly consists in:
mbed_official	381:5460fc57b6e4	228	- Setting the output polarity (active high or active low),
mbed_official	381:5460fc57b6e4	229	- Defining the set/reset crossbar for the output,
mbed_official	381:5460fc57b6e4	230	- Specifying the fault level (active or inactive) in IDLE
mbed_official	381:5460fc57b6e4	231	and FAULT states.,
mbed_official	381:5460fc57b6e4	232	(##)Set waveform timer output(s) level
mbed_official	381:5460fc57b6e4	233	(+++)HAL_HRTIM_WaveformSetOutputLevel(): forces the output to its
mbed_official	381:5460fc57b6e4	234	active or inactive level. For example, when deadtime insertion
mbed_official	381:5460fc57b6e4	235	is enabled it is necessary to force the output level by software
mbed_official	381:5460fc57b6e4	236	to have the outputs in a complementary state as soon as the RUN mode is entered.
mbed_official	381:5460fc57b6e4	237	(##)Enable/Disable waveform timer output(s)
mbed_official	381:5460fc57b6e4	238	(+++)HAL_HRTIM_WaveformOutputStart(),HAL_HRTIM_WaveformOutputStop().
mbed_official	381:5460fc57b6e4	239	(##)Start/Stop waveform HRTIM timer(s).
mbed_official	381:5460fc57b6e4	240	(+++)HAL_HRTIM_WaveformCounterStart(),HAL_HRTIM_WaveformCounterStop(),
mbed_official	381:5460fc57b6e4	241	(+++)HAL_HRTIM_WaveformCounterStart_IT(),HAL_HRTIM_WaveformCounterStop_IT(),
mbed_official	381:5460fc57b6e4	242	(+++)HAL_HRTIM_WaveformCounterStart()_DMA,HAL_HRTIM_WaveformCounterStop_DMA(),
mbed_official	381:5460fc57b6e4	243
mbed_official	381:5460fc57b6e4	244	(##)Burst mode controller enabling:
mbed_official	381:5460fc57b6e4	245	(+++)HAL_HRTIM_BurstModeCtl(): activates or de-activates the
mbed_official	381:5460fc57b6e4	246	burst mode controller.
mbed_official	381:5460fc57b6e4	247
mbed_official	381:5460fc57b6e4	248	(##)Some HRTIM operations can be triggered by software:
mbed_official	381:5460fc57b6e4	249	(+++)HAL_HRTIM_BurstModeSoftwareTrigger(): calling this function
mbed_official	381:5460fc57b6e4	250	trigs the burst operation.
mbed_official	381:5460fc57b6e4	251	(+++)HAL_HRTIM_SoftwareCapture(): calling this function trigs the
mbed_official	381:5460fc57b6e4	252	capture of the HRTIM timer counter.
mbed_official	381:5460fc57b6e4	253	(+++)HAL_HRTIM_SoftwareUpdate(): calling this function trigs the
mbed_official	381:5460fc57b6e4	254	update of the pre-loadable registers of the HRTIM timer ()
mbed_official	381:5460fc57b6e4	255	(+++)HAL_HRTIM_SoftwareReset():calling this function resets the
mbed_official	381:5460fc57b6e4	256	HRTIM timer counter.
mbed_official	381:5460fc57b6e4	257
mbed_official	381:5460fc57b6e4	258	(##)Some functions can be used anytime to retrieve HRTIM timer related
mbed_official	381:5460fc57b6e4	259	information
mbed_official	381:5460fc57b6e4	260	(+++)HAL_HRTIM_GetCapturedValue(): returns actual value of the
mbed_official	381:5460fc57b6e4	261	capture register of the designated capture unit.
mbed_official	381:5460fc57b6e4	262	(+++)HAL_HRTIM_WaveformGetOutputLevel(): returns actual level
mbed_official	381:5460fc57b6e4	263	(ACTIVE/INACTIVE) of the designated timer output.
mbed_official	381:5460fc57b6e4	264	(+++)HAL_HRTIM_WaveformGetOutputState():returns actual state
mbed_official	381:5460fc57b6e4	265	(IDLE/RUN/FAULT) of the designated timer output.
mbed_official	381:5460fc57b6e4	266	(+++)HAL_HRTIM_GetDelayedProtectionStatus():returns actual level
mbed_official	381:5460fc57b6e4	267	(ACTIVE/INACTIVE) of the designated output when the delayed
mbed_official	381:5460fc57b6e4	268	protection was triggered.
mbed_official	381:5460fc57b6e4	269	(+++)HAL_HRTIM_GetBurstStatus(): returns the actual status
mbed_official	381:5460fc57b6e4	270	(ACTIVE/INACTIVE) of the burst mode controller.
mbed_official	381:5460fc57b6e4	271	(+++)HAL_HRTIM_GetCurrentPushPullStatus(): when the push-pull mode
mbed_official	381:5460fc57b6e4	272	is enabled for the HRTIM timer (see HAL_HRTIM_WaveformTimerConfig()),
mbed_official	381:5460fc57b6e4	273	the push-pull indicates on which output the signal is currently
mbed_official	381:5460fc57b6e4	274	active (e.g signal applied on output 1 and output 2 forced
mbed_official	381:5460fc57b6e4	275	inactive or vice versa).
mbed_official	381:5460fc57b6e4	276	(+++)HAL_HRTIM_GetIdlePushPullStatus(): when the push-pull mode
mbed_official	381:5460fc57b6e4	277	is enabled for the HRTIM timer (see HAL_HRTIM_WaveformTimerConfig()),
mbed_official	381:5460fc57b6e4	278	the idle push-pull status indicates during which period the
mbed_official	381:5460fc57b6e4	279	delayed protection request occurred (e.g. protection occurred
mbed_official	381:5460fc57b6e4	280	when the output 1 was active and output 2 forced inactive or
mbed_official	381:5460fc57b6e4	281	vice versa).
mbed_official	381:5460fc57b6e4	282
mbed_official	381:5460fc57b6e4	283	(##)Some functions can be used anytime to retrieve actual HRTIM status
mbed_official	381:5460fc57b6e4	284	(+++)HAL_HRTIM_GetState(): returns actual HRTIM instance HAL state.
mbed_official	381:5460fc57b6e4	285
mbed_official	381:5460fc57b6e4	286	@endverbatim
mbed_official	381:5460fc57b6e4	287
mbed_official	381:5460fc57b6e4	288	******************************************************************************
mbed_official	381:5460fc57b6e4	289	* @attention
mbed_official	381:5460fc57b6e4	290	*
mbed_official	381:5460fc57b6e4	291	* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official	381:5460fc57b6e4	292	*
mbed_official	381:5460fc57b6e4	293	* Redistribution and use in source and binary forms, with or without modification,
mbed_official	381:5460fc57b6e4	294	* are permitted provided that the following conditions are met:
mbed_official	381:5460fc57b6e4	295	* 1. Redistributions of source code must retain the above copyright notice,
mbed_official	381:5460fc57b6e4	296	* this list of conditions and the following disclaimer.
mbed_official	381:5460fc57b6e4	297	* 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official	381:5460fc57b6e4	298	* this list of conditions and the following disclaimer in the documentation
mbed_official	381:5460fc57b6e4	299	* and/or other materials provided with the distribution.
mbed_official	381:5460fc57b6e4	300	* 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official	381:5460fc57b6e4	301	* may be used to endorse or promote products derived from this software
mbed_official	381:5460fc57b6e4	302	* without specific prior written permission.
mbed_official	381:5460fc57b6e4	303	*
mbed_official	381:5460fc57b6e4	304	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official	381:5460fc57b6e4	305	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official	381:5460fc57b6e4	306	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official	381:5460fc57b6e4	307	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official	381:5460fc57b6e4	308	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official	381:5460fc57b6e4	309	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official	381:5460fc57b6e4	310	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official	381:5460fc57b6e4	311	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official	381:5460fc57b6e4	312	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official	381:5460fc57b6e4	313	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official	381:5460fc57b6e4	314	*
mbed_official	381:5460fc57b6e4	315	******************************************************************************
mbed_official	381:5460fc57b6e4	316	*/
mbed_official	381:5460fc57b6e4	317
mbed_official	381:5460fc57b6e4	318	/* Includes ------------------------------------------------------------------*/
mbed_official	381:5460fc57b6e4	319	#include "stm32f3xx_hal.h"
mbed_official	381:5460fc57b6e4	320
mbed_official	381:5460fc57b6e4	321	/** @addtogroup STM32F3xx_HAL_Driver
mbed_official	381:5460fc57b6e4	322	* @{
mbed_official	381:5460fc57b6e4	323	*/
mbed_official	381:5460fc57b6e4	324
mbed_official	381:5460fc57b6e4	325	#ifdef HAL_HRTIM_MODULE_ENABLED
mbed_official	381:5460fc57b6e4	326
mbed_official	381:5460fc57b6e4	327	#if defined(STM32F334x8)
mbed_official	381:5460fc57b6e4	328
mbed_official	381:5460fc57b6e4	329	/** @defgroup HRTIM HRTIM HAL module driver
mbed_official	381:5460fc57b6e4	330	* @brief HRTIM HAL module driver
mbed_official	381:5460fc57b6e4	331	* @{
mbed_official	381:5460fc57b6e4	332	*/
mbed_official	381:5460fc57b6e4	333
mbed_official	381:5460fc57b6e4	334	/* Private typedef -----------------------------------------------------------*/
mbed_official	381:5460fc57b6e4	335	/* Private define ------------------------------------------------------------*/
mbed_official	381:5460fc57b6e4	336	/** @defgroup HRTIM_Private_Defines HRTIM Private Define
mbed_official	381:5460fc57b6e4	337	* @{
mbed_official	381:5460fc57b6e4	338	*/
mbed_official	381:5460fc57b6e4	339	#define HRTIM_FLTR_FLTxEN (HRTIM_FLTR_FLT1EN \|\
mbed_official	381:5460fc57b6e4	340	HRTIM_FLTR_FLT2EN \|\
mbed_official	381:5460fc57b6e4	341	HRTIM_FLTR_FLT3EN \|\
mbed_official	381:5460fc57b6e4	342	HRTIM_FLTR_FLT4EN \| \
mbed_official	381:5460fc57b6e4	343	HRTIM_FLTR_FLT5EN)
mbed_official	381:5460fc57b6e4	344
mbed_official	381:5460fc57b6e4	345	#define HRTIM_TIMCR_TIMUPDATETRIGGER (HRTIM_TIMUPDATETRIGGER_MASTER \|\
mbed_official	381:5460fc57b6e4	346	HRTIM_TIMUPDATETRIGGER_TIMER_A \|\
mbed_official	381:5460fc57b6e4	347	HRTIM_TIMUPDATETRIGGER_TIMER_B \|\
mbed_official	381:5460fc57b6e4	348	HRTIM_TIMUPDATETRIGGER_TIMER_C \|\
mbed_official	381:5460fc57b6e4	349	HRTIM_TIMUPDATETRIGGER_TIMER_D \|\
mbed_official	381:5460fc57b6e4	350	HRTIM_TIMUPDATETRIGGER_TIMER_E)
mbed_official	381:5460fc57b6e4	351	/**
mbed_official	381:5460fc57b6e4	352	* @}
mbed_official	381:5460fc57b6e4	353	*/
mbed_official	381:5460fc57b6e4	354
mbed_official	381:5460fc57b6e4	355	/* Private macro -------------------------------------------------------------*/
mbed_official	381:5460fc57b6e4	356	/* Private variables ---------------------------------------------------------*/
mbed_official	381:5460fc57b6e4	357	/** @defgroup HRTIM_Private_Variables HRTIM Private Variables
mbed_official	381:5460fc57b6e4	358	* @{
mbed_official	381:5460fc57b6e4	359	*/
mbed_official	381:5460fc57b6e4	360	static uint32_t TimerIdxToTimerId[] =
mbed_official	381:5460fc57b6e4	361	{
mbed_official	381:5460fc57b6e4	362	HRTIM_TIMERID_TIMER_A,
mbed_official	381:5460fc57b6e4	363	HRTIM_TIMERID_TIMER_B,
mbed_official	381:5460fc57b6e4	364	HRTIM_TIMERID_TIMER_C,
mbed_official	381:5460fc57b6e4	365	HRTIM_TIMERID_TIMER_D,
mbed_official	381:5460fc57b6e4	366	HRTIM_TIMERID_TIMER_E,
mbed_official	381:5460fc57b6e4	367	HRTIM_TIMERID_MASTER,
mbed_official	381:5460fc57b6e4	368	};
mbed_official	381:5460fc57b6e4	369	/**
mbed_official	381:5460fc57b6e4	370	* @}
mbed_official	381:5460fc57b6e4	371	*/
mbed_official	381:5460fc57b6e4	372
mbed_official	381:5460fc57b6e4	373	/* Private function prototypes -----------------------------------------------*/
mbed_official	381:5460fc57b6e4	374	/** @defgroup HRTIM_Private_Functions HRTIM Private Functions
mbed_official	381:5460fc57b6e4	375	* @{
mbed_official	381:5460fc57b6e4	376	*/
mbed_official	381:5460fc57b6e4	377	static void HRTIM_MasterBase_Config(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	378	HRTIM_TimeBaseCfgTypeDef * pTimeBaseCfg);
mbed_official	381:5460fc57b6e4	379
mbed_official	381:5460fc57b6e4	380	static void HRTIM_TimingUnitBase_Config(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	381	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	382	HRTIM_TimeBaseCfgTypeDef * pTimeBaseCfg);
mbed_official	381:5460fc57b6e4	383
mbed_official	381:5460fc57b6e4	384	static void HRTIM_MasterWaveform_Config(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	385	HRTIM_TimerCfgTypeDef * pTimerCfg);
mbed_official	381:5460fc57b6e4	386
mbed_official	381:5460fc57b6e4	387	static void HRTIM_TimingUnitWaveform_Config(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	388	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	389	HRTIM_TimerCfgTypeDef * pTimerCfg);
mbed_official	381:5460fc57b6e4	390
mbed_official	381:5460fc57b6e4	391	static void HRTIM_CompareUnitConfig(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	392	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	393	uint32_t CompareUnit,
mbed_official	381:5460fc57b6e4	394	HRTIM_CompareCfgTypeDef * pCompareCfg);
mbed_official	381:5460fc57b6e4	395
mbed_official	381:5460fc57b6e4	396	static void HRTIM_CaptureUnitConfig(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	397	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	398	uint32_t CaptureUnit,
mbed_official	381:5460fc57b6e4	399	uint32_t Event);
mbed_official	381:5460fc57b6e4	400
mbed_official	381:5460fc57b6e4	401	static void HRTIM_OutputConfig(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	402	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	403	uint32_t Output,
mbed_official	381:5460fc57b6e4	404	HRTIM_OutputCfgTypeDef * pOutputCfg);
mbed_official	381:5460fc57b6e4	405
mbed_official	381:5460fc57b6e4	406	static void HRTIM_EventConfig(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	407	uint32_t Event,
mbed_official	381:5460fc57b6e4	408	HRTIM_EventCfgTypeDef * pEventCfg);
mbed_official	381:5460fc57b6e4	409
mbed_official	381:5460fc57b6e4	410	static void HRTIM_TIM_ResetConfig(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	411	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	412	uint32_t Event);
mbed_official	381:5460fc57b6e4	413
mbed_official	381:5460fc57b6e4	414	static uint32_t HRTIM_GetITFromOCMode(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	415	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	416	uint32_t OCChannel);
mbed_official	381:5460fc57b6e4	417
mbed_official	381:5460fc57b6e4	418	static uint32_t HRTIM_GetDMAFromOCMode(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	419	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	420	uint32_t OCChannel);
mbed_official	381:5460fc57b6e4	421
mbed_official	381:5460fc57b6e4	422	static DMA_HandleTypeDef * HRTIM_GetDMAHandleFromTimerIdx(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	423	uint32_t TimerIdx);
mbed_official	381:5460fc57b6e4	424
mbed_official	381:5460fc57b6e4	425	static uint32_t GetTimerIdxFromDMAHandle(DMA_HandleTypeDef *hdma);
mbed_official	381:5460fc57b6e4	426
mbed_official	381:5460fc57b6e4	427	static void HRTIM_ForceRegistersUpdate(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	428	uint32_t TimerIdx);
mbed_official	381:5460fc57b6e4	429
mbed_official	381:5460fc57b6e4	430	static void HRTIM_HRTIM_ISR(HRTIM_HandleTypeDef * hhrtim);
mbed_official	381:5460fc57b6e4	431
mbed_official	381:5460fc57b6e4	432	static void HRTIM_Master_ISR(HRTIM_HandleTypeDef * hhrtim);
mbed_official	381:5460fc57b6e4	433
mbed_official	381:5460fc57b6e4	434	static void HRTIM_Timer_ISR(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	435	uint32_t TimerIdx);
mbed_official	381:5460fc57b6e4	436
mbed_official	381:5460fc57b6e4	437	static void HRTIM_DMAMasterCplt(DMA_HandleTypeDef *hdma);
mbed_official	381:5460fc57b6e4	438
mbed_official	381:5460fc57b6e4	439	static void HRTIM_DMATimerxCplt(DMA_HandleTypeDef *hdma);
mbed_official	381:5460fc57b6e4	440
mbed_official	381:5460fc57b6e4	441	static void HRTIM_DMAError(DMA_HandleTypeDef *hdma);
mbed_official	381:5460fc57b6e4	442
mbed_official	381:5460fc57b6e4	443	static void HRTIM_BurstDMACplt(DMA_HandleTypeDef *hdma);
mbed_official	381:5460fc57b6e4	444	/**
mbed_official	381:5460fc57b6e4	445	* @}
mbed_official	381:5460fc57b6e4	446	*/
mbed_official	381:5460fc57b6e4	447
mbed_official	381:5460fc57b6e4	448	/* Exported functions ---------------------------------------------------------*/
mbed_official	381:5460fc57b6e4	449	/** @defgroup HRTIM_Exported_Functions HRTIM Exported Functions
mbed_official	381:5460fc57b6e4	450	* @{
mbed_official	381:5460fc57b6e4	451	*/
mbed_official	381:5460fc57b6e4	452
mbed_official	381:5460fc57b6e4	453	/** @defgroup HRTIM_Exported_Functions_Group1 Initialization and de-initialization functions
mbed_official	381:5460fc57b6e4	454	* @brief Initialization and Configuration functions
mbed_official	381:5460fc57b6e4	455	*
mbed_official	381:5460fc57b6e4	456	@verbatim
mbed_official	381:5460fc57b6e4	457	===============================================================================
mbed_official	381:5460fc57b6e4	458	##### Initialization and Time Base Configuration functions #####
mbed_official	381:5460fc57b6e4	459	===============================================================================
mbed_official	381:5460fc57b6e4	460	[..] This section provides functions allowing to:
mbed_official	381:5460fc57b6e4	461	(+) Initialize a HRTIM instance
mbed_official	381:5460fc57b6e4	462	(+) De-initialize a HRTIM instance
mbed_official	381:5460fc57b6e4	463	(+) Initialize the HRTIM MSP
mbed_official	381:5460fc57b6e4	464	(+) De-initialize the HRTIM MSP
mbed_official	381:5460fc57b6e4	465	(+) Start the high-resolution unit (start DLL calibration)
mbed_official	381:5460fc57b6e4	466	(+) Check that the high resolution unit is ready (DLL calibration done)
mbed_official	381:5460fc57b6e4	467	(+) Configure the time base unit of a HRTIM timer
mbed_official	381:5460fc57b6e4	468
mbed_official	381:5460fc57b6e4	469	@endverbatim
mbed_official	381:5460fc57b6e4	470	* @{
mbed_official	381:5460fc57b6e4	471	*/
mbed_official	381:5460fc57b6e4	472
mbed_official	381:5460fc57b6e4	473	/**
mbed_official	381:5460fc57b6e4	474	* @brief Initializes a HRTIM instance
mbed_official	381:5460fc57b6e4	475	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	476	* @retval HAL status
mbed_official	381:5460fc57b6e4	477	*/
mbed_official	381:5460fc57b6e4	478	HAL_StatusTypeDef HAL_HRTIM_Init(HRTIM_HandleTypeDef * hhrtim)
mbed_official	381:5460fc57b6e4	479	{
mbed_official	381:5460fc57b6e4	480	uint8_t timer_idx;
mbed_official	381:5460fc57b6e4	481	uint32_t hrtim_mcr;
mbed_official	381:5460fc57b6e4	482
mbed_official	381:5460fc57b6e4	483	/* Check the HRTIM handle allocation */
mbed_official	381:5460fc57b6e4	484	if(hhrtim == HAL_NULL)
mbed_official	381:5460fc57b6e4	485	{
mbed_official	381:5460fc57b6e4	486	return HAL_ERROR;
mbed_official	381:5460fc57b6e4	487	}
mbed_official	381:5460fc57b6e4	488
mbed_official	381:5460fc57b6e4	489	/* Check the parameters */
mbed_official	381:5460fc57b6e4	490	assert_param(IS_HRTIM_ALL_INSTANCE(hhrtim->Instance));
mbed_official	381:5460fc57b6e4	491	assert_param(IS_HRTIM_IT(hhrtim->Init.HRTIMInterruptResquests));
mbed_official	381:5460fc57b6e4	492
mbed_official	381:5460fc57b6e4	493	/* Set the HRTIM state */
mbed_official	381:5460fc57b6e4	494	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	495
mbed_official	381:5460fc57b6e4	496	/* Initialize the DMA handles */
mbed_official	381:5460fc57b6e4	497	hhrtim->hdmaMaster = (DMA_HandleTypeDef *)HAL_NULL;
mbed_official	381:5460fc57b6e4	498	hhrtim->hdmaTimerA = (DMA_HandleTypeDef *)HAL_NULL;
mbed_official	381:5460fc57b6e4	499	hhrtim->hdmaTimerB = (DMA_HandleTypeDef *)HAL_NULL;
mbed_official	381:5460fc57b6e4	500	hhrtim->hdmaTimerC = (DMA_HandleTypeDef *)HAL_NULL;
mbed_official	381:5460fc57b6e4	501	hhrtim->hdmaTimerD = (DMA_HandleTypeDef *)HAL_NULL;
mbed_official	381:5460fc57b6e4	502	hhrtim->hdmaTimerE = (DMA_HandleTypeDef *)HAL_NULL;
mbed_official	381:5460fc57b6e4	503
mbed_official	381:5460fc57b6e4	504	/* HRTIM output synchronization configuration (if required) */
mbed_official	381:5460fc57b6e4	505	if ((hhrtim->Init.SyncOptions & HRTIM_SYNCOPTION_MASTER) != RESET)
mbed_official	381:5460fc57b6e4	506	{
mbed_official	381:5460fc57b6e4	507	/* Check parameters */
mbed_official	381:5460fc57b6e4	508	assert_param(IS_HRTIM_SYNCOUTPUTSOURCE(hhrtim->Init.SyncOutputSource));
mbed_official	381:5460fc57b6e4	509	assert_param(IS_HRTIM_SYNCOUTPUTPOLARITY(hhrtim->Init.SyncOutputPolarity));
mbed_official	381:5460fc57b6e4	510
mbed_official	381:5460fc57b6e4	511	/* The synchronization output initialization procedure must be done prior
mbed_official	381:5460fc57b6e4	512	to the configuration of the MCU outputs (done within HAL_HRTIM_MspInit)
mbed_official	381:5460fc57b6e4	513	*/
mbed_official	381:5460fc57b6e4	514	if (hhrtim->Instance == HRTIM1)
mbed_official	381:5460fc57b6e4	515	{
mbed_official	381:5460fc57b6e4	516	/* Enable the HRTIM peripheral clock */
mbed_official	381:5460fc57b6e4	517	__HRTIM1_CLK_ENABLE();
mbed_official	381:5460fc57b6e4	518	}
mbed_official	381:5460fc57b6e4	519
mbed_official	381:5460fc57b6e4	520	hrtim_mcr = hhrtim->Instance->sMasterRegs.MCR;
mbed_official	381:5460fc57b6e4	521
mbed_official	381:5460fc57b6e4	522	/* Set the event to be sent on the synchronization output */
mbed_official	381:5460fc57b6e4	523	hrtim_mcr &= ~(HRTIM_MCR_SYNC_SRC);
mbed_official	381:5460fc57b6e4	524	hrtim_mcr \|= (hhrtim->Init.SyncOutputSource & HRTIM_MCR_SYNC_SRC);
mbed_official	381:5460fc57b6e4	525
mbed_official	381:5460fc57b6e4	526	/* Set the polarity of the synchronization output */
mbed_official	381:5460fc57b6e4	527	hrtim_mcr &= ~(HRTIM_MCR_SYNC_OUT);
mbed_official	381:5460fc57b6e4	528	hrtim_mcr \|= (hhrtim->Init.SyncOutputPolarity & HRTIM_MCR_SYNC_OUT);
mbed_official	381:5460fc57b6e4	529
mbed_official	381:5460fc57b6e4	530	/* Update the HRTIM registers */
mbed_official	381:5460fc57b6e4	531	hhrtim->Instance->sMasterRegs.MCR = hrtim_mcr;
mbed_official	381:5460fc57b6e4	532	}
mbed_official	381:5460fc57b6e4	533
mbed_official	381:5460fc57b6e4	534	/* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
mbed_official	381:5460fc57b6e4	535	HAL_HRTIM_MspInit(hhrtim);
mbed_official	381:5460fc57b6e4	536
mbed_official	381:5460fc57b6e4	537	/* HRTIM input synchronization configuration (if required) */
mbed_official	381:5460fc57b6e4	538	if ((hhrtim->Init.SyncOptions & HRTIM_SYNCOPTION_SLAVE) != RESET)
mbed_official	381:5460fc57b6e4	539	{
mbed_official	381:5460fc57b6e4	540	/* Check parameters */
mbed_official	381:5460fc57b6e4	541	assert_param(IS_HRTIM_SYNCINPUTSOURCE(hhrtim->Init.SyncInputSource));
mbed_official	381:5460fc57b6e4	542
mbed_official	381:5460fc57b6e4	543	hrtim_mcr = hhrtim->Instance->sMasterRegs.MCR;
mbed_official	381:5460fc57b6e4	544
mbed_official	381:5460fc57b6e4	545	/* Set the synchronization input source */
mbed_official	381:5460fc57b6e4	546	hrtim_mcr &= ~(HRTIM_MCR_SYNC_IN);
mbed_official	381:5460fc57b6e4	547	hrtim_mcr \|= (hhrtim->Init.SyncInputSource & HRTIM_MCR_SYNC_IN);
mbed_official	381:5460fc57b6e4	548
mbed_official	381:5460fc57b6e4	549	/* Update the HRTIM registers */
mbed_official	381:5460fc57b6e4	550	hhrtim->Instance->sMasterRegs.MCR = hrtim_mcr;
mbed_official	381:5460fc57b6e4	551	}
mbed_official	381:5460fc57b6e4	552
mbed_official	381:5460fc57b6e4	553	/* Initialize the HRTIM state*/
mbed_official	381:5460fc57b6e4	554	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	555
mbed_official	381:5460fc57b6e4	556	/* Initialize the lock status of the HRTIM HAL API */
mbed_official	381:5460fc57b6e4	557	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	558
mbed_official	381:5460fc57b6e4	559	/* Tnitialize timer related parameters */
mbed_official	381:5460fc57b6e4	560	for (timer_idx = HRTIM_TIMERINDEX_TIMER_A ;
mbed_official	381:5460fc57b6e4	561	timer_idx <= HRTIM_TIMERINDEX_MASTER ;
mbed_official	381:5460fc57b6e4	562	timer_idx++)
mbed_official	381:5460fc57b6e4	563	{
mbed_official	381:5460fc57b6e4	564	hhrtim->TimerParam[timer_idx].CaptureTrigger1 = HRTIM_CAPTURETRIGGER_NONE;
mbed_official	381:5460fc57b6e4	565	hhrtim->TimerParam[timer_idx].CaptureTrigger2 = HRTIM_CAPTURETRIGGER_NONE;
mbed_official	381:5460fc57b6e4	566	hhrtim->TimerParam[timer_idx].InterruptRequests = HRTIM_IT_NONE;
mbed_official	381:5460fc57b6e4	567	hhrtim->TimerParam[timer_idx].DMARequests = HRTIM_IT_NONE;
mbed_official	381:5460fc57b6e4	568	hhrtim->TimerParam[timer_idx].DMASrcAddress = 0;
mbed_official	381:5460fc57b6e4	569	hhrtim->TimerParam[timer_idx].DMASize = 0;
mbed_official	381:5460fc57b6e4	570	}
mbed_official	381:5460fc57b6e4	571
mbed_official	381:5460fc57b6e4	572	return HAL_OK;
mbed_official	381:5460fc57b6e4	573	}
mbed_official	381:5460fc57b6e4	574
mbed_official	381:5460fc57b6e4	575	/**
mbed_official	381:5460fc57b6e4	576	* @brief De-initializes a timer operating in waveform mode
mbed_official	381:5460fc57b6e4	577	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	578	* @retval HAL status
mbed_official	381:5460fc57b6e4	579	*/
mbed_official	381:5460fc57b6e4	580	HAL_StatusTypeDef HAL_HRTIM_DeInit (HRTIM_HandleTypeDef * hhrtim)
mbed_official	381:5460fc57b6e4	581	{
mbed_official	381:5460fc57b6e4	582	/* Check the HRTIM handle allocation */
mbed_official	381:5460fc57b6e4	583	if(hhrtim == HAL_NULL)
mbed_official	381:5460fc57b6e4	584	{
mbed_official	381:5460fc57b6e4	585	return HAL_ERROR;
mbed_official	381:5460fc57b6e4	586	}
mbed_official	381:5460fc57b6e4	587
mbed_official	381:5460fc57b6e4	588	/* Check the parameters */
mbed_official	381:5460fc57b6e4	589	assert_param(IS_HRTIM_ALL_INSTANCE(hhrtim->Instance));
mbed_official	381:5460fc57b6e4	590
mbed_official	381:5460fc57b6e4	591	/* Set the HRTIM state */
mbed_official	381:5460fc57b6e4	592	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	593
mbed_official	381:5460fc57b6e4	594	/* DeInit the low level hardware */
mbed_official	381:5460fc57b6e4	595	HAL_HRTIM_MspDeInit(hhrtim);
mbed_official	381:5460fc57b6e4	596
mbed_official	381:5460fc57b6e4	597	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	598
mbed_official	381:5460fc57b6e4	599	return HAL_OK;
mbed_official	381:5460fc57b6e4	600	}
mbed_official	381:5460fc57b6e4	601
mbed_official	381:5460fc57b6e4	602	/**
mbed_official	381:5460fc57b6e4	603	* @brief MSP initialization for a HRTIM instance
mbed_official	381:5460fc57b6e4	604	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	605	* @retval None
mbed_official	381:5460fc57b6e4	606	*/
mbed_official	381:5460fc57b6e4	607	__weak void HAL_HRTIM_MspInit(HRTIM_HandleTypeDef * hhrtim)
mbed_official	381:5460fc57b6e4	608	{
mbed_official	381:5460fc57b6e4	609	/* NOTE: This function should not be modified, when the callback is needed,
mbed_official	381:5460fc57b6e4	610	the HAL_HRTIM_MspInit could be implemented in the user file
mbed_official	381:5460fc57b6e4	611	*/
mbed_official	381:5460fc57b6e4	612	}
mbed_official	381:5460fc57b6e4	613
mbed_official	381:5460fc57b6e4	614	/**
mbed_official	381:5460fc57b6e4	615	* @brief MSP initialization for a for a HRTIM instance
mbed_official	381:5460fc57b6e4	616	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	617	* @retval None
mbed_official	381:5460fc57b6e4	618	*/
mbed_official	381:5460fc57b6e4	619	__weak void HAL_HRTIM_MspDeInit(HRTIM_HandleTypeDef * hhrtim)
mbed_official	381:5460fc57b6e4	620	{
mbed_official	381:5460fc57b6e4	621	/* NOTE: This function should not be modified, when the callback is needed,
mbed_official	381:5460fc57b6e4	622	the HAL_HRTIM_MspDeInit could be implemented in the user file
mbed_official	381:5460fc57b6e4	623	*/
mbed_official	381:5460fc57b6e4	624	}
mbed_official	381:5460fc57b6e4	625
mbed_official	381:5460fc57b6e4	626	/**
mbed_official	381:5460fc57b6e4	627	* @brief Starts the DLL calibration
mbed_official	381:5460fc57b6e4	628	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	629	* @param CalibrationRate: DLL calibration period
mbed_official	381:5460fc57b6e4	630	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	631	* @arg HRTIM_SINGLE_CALIBRATION: One shot DLL calibration
mbed_official	381:5460fc57b6e4	632	* @arg HRTIM_CALIBRATIONRATE_7300: Periodic DLL calibration. T=7.3 ms
mbed_official	381:5460fc57b6e4	633	* @arg HRTIM_CALIBRATIONRATE_910: Periodic DLL calibration. T=910 us
mbed_official	381:5460fc57b6e4	634	* @arg HRTIM_CALIBRATIONRATE_114: Periodic DLL calibration. T=114 us
mbed_official	381:5460fc57b6e4	635	* @arg HRTIM_CALIBRATIONRATE_14: Periodic DLL calibration. T=14 us
mbed_official	381:5460fc57b6e4	636	* @retval HAL status
mbed_official	381:5460fc57b6e4	637	* @note This function locks the HRTIM instance. HRTIM instance is unlocked
mbed_official	381:5460fc57b6e4	638	* within the HAL_HRTIM_PollForDLLCalibration function, just before
mbed_official	381:5460fc57b6e4	639	* exiting the function.
mbed_official	381:5460fc57b6e4	640	*/
mbed_official	381:5460fc57b6e4	641	HAL_StatusTypeDef HAL_HRTIM_DLLCalibrationStart(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	642	uint32_t CalibrationRate)
mbed_official	381:5460fc57b6e4	643	{
mbed_official	381:5460fc57b6e4	644	uint32_t hrtim_dllcr;
mbed_official	381:5460fc57b6e4	645
mbed_official	381:5460fc57b6e4	646	/* Check the parameters */
mbed_official	381:5460fc57b6e4	647	assert_param(IS_HRTIM_CALIBRATIONRATE(CalibrationRate));
mbed_official	381:5460fc57b6e4	648
mbed_official	381:5460fc57b6e4	649	/* Process Locked */
mbed_official	381:5460fc57b6e4	650	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	651
mbed_official	381:5460fc57b6e4	652	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	653
mbed_official	381:5460fc57b6e4	654	/* Configure DLL Calibration */
mbed_official	381:5460fc57b6e4	655	hrtim_dllcr = hhrtim->Instance->sCommonRegs.DLLCR;
mbed_official	381:5460fc57b6e4	656
mbed_official	381:5460fc57b6e4	657	if (CalibrationRate == HRTIM_SINGLE_CALIBRATION)
mbed_official	381:5460fc57b6e4	658	{
mbed_official	381:5460fc57b6e4	659	/* One shot DLL calibration */
mbed_official	381:5460fc57b6e4	660	hrtim_dllcr &= ~(HRTIM_DLLCR_CALEN);
mbed_official	381:5460fc57b6e4	661	hrtim_dllcr \|= HRTIM_DLLCR_CAL;
mbed_official	381:5460fc57b6e4	662	}
mbed_official	381:5460fc57b6e4	663	else
mbed_official	381:5460fc57b6e4	664	{
mbed_official	381:5460fc57b6e4	665	/* Periodic DLL calibration */
mbed_official	381:5460fc57b6e4	666	hrtim_dllcr &= ~(HRTIM_DLLCR_CALRTE \| HRTIM_DLLCR_CAL);
mbed_official	381:5460fc57b6e4	667	hrtim_dllcr \|= (CalibrationRate \| HRTIM_DLLCR_CALEN);
mbed_official	381:5460fc57b6e4	668	}
mbed_official	381:5460fc57b6e4	669
mbed_official	381:5460fc57b6e4	670	/* Update HRTIM register */
mbed_official	381:5460fc57b6e4	671	hhrtim->Instance->sCommonRegs.DLLCR = hrtim_dllcr;
mbed_official	381:5460fc57b6e4	672
mbed_official	381:5460fc57b6e4	673	return HAL_OK;
mbed_official	381:5460fc57b6e4	674	}
mbed_official	381:5460fc57b6e4	675
mbed_official	381:5460fc57b6e4	676	/**
mbed_official	381:5460fc57b6e4	677	* @brief Starts the DLL calibration
mbed_official	381:5460fc57b6e4	678	* DLL ready interrupt is enabled
mbed_official	381:5460fc57b6e4	679	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	680	* @param CalibrationRate: DLL calibration period
mbed_official	381:5460fc57b6e4	681	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	682	* @arg HRTIM_SINGLE_CALIBRATION: One shot DLL calibration
mbed_official	381:5460fc57b6e4	683	* @arg HRTIM_CALIBRATIONRATE_7300: Periodic DLL calibration. T=7.3 ms
mbed_official	381:5460fc57b6e4	684	* @arg HRTIM_CALIBRATIONRATE_910: Periodic DLL calibration. T=910 us
mbed_official	381:5460fc57b6e4	685	* @arg HRTIM_CALIBRATIONRATE_114: Periodic DLL calibration. T=114 us
mbed_official	381:5460fc57b6e4	686	* @arg HRTIM_CALIBRATIONRATE_14: Periodic DLL calibration. T=14 us
mbed_official	381:5460fc57b6e4	687	* @retval HAL status
mbed_official	381:5460fc57b6e4	688	* @note This function locks the HRTIM instance. HRTIM instance is unlocked
mbed_official	381:5460fc57b6e4	689	* within the IRQ processing function when processing the DLL ready
mbed_official	381:5460fc57b6e4	690	* interrupt.
mbed_official	381:5460fc57b6e4	691	* @note If this function is called for periodic calibration, the DLLRDY
mbed_official	381:5460fc57b6e4	692	* interrupt is generated every time the calibration completes which
mbed_official	381:5460fc57b6e4	693	* will significantly increases the overall interrupt rate.
mbed_official	381:5460fc57b6e4	694	*/
mbed_official	381:5460fc57b6e4	695	HAL_StatusTypeDef HAL_HRTIM_DLLCalibrationStart_IT(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	696	uint32_t CalibrationRate)
mbed_official	381:5460fc57b6e4	697	{
mbed_official	381:5460fc57b6e4	698	uint32_t hrtim_dllcr;
mbed_official	381:5460fc57b6e4	699
mbed_official	381:5460fc57b6e4	700	/* Check the parameters */
mbed_official	381:5460fc57b6e4	701	assert_param(IS_HRTIM_CALIBRATIONRATE(CalibrationRate));
mbed_official	381:5460fc57b6e4	702
mbed_official	381:5460fc57b6e4	703	/* Process Locked */
mbed_official	381:5460fc57b6e4	704	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	705
mbed_official	381:5460fc57b6e4	706	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	707
mbed_official	381:5460fc57b6e4	708	/* Enable DLL Ready interrupt flag */
mbed_official	381:5460fc57b6e4	709	__HAL_HRTIM_ENABLE_IT(hhrtim, HRTIM_IT_DLLRDY);
mbed_official	381:5460fc57b6e4	710
mbed_official	381:5460fc57b6e4	711	/* Configure DLL Calibration */
mbed_official	381:5460fc57b6e4	712	hrtim_dllcr = hhrtim->Instance->sCommonRegs.DLLCR;
mbed_official	381:5460fc57b6e4	713
mbed_official	381:5460fc57b6e4	714	if (CalibrationRate == HRTIM_SINGLE_CALIBRATION)
mbed_official	381:5460fc57b6e4	715	{
mbed_official	381:5460fc57b6e4	716	/* One shot DLL calibration */
mbed_official	381:5460fc57b6e4	717	hrtim_dllcr &= ~(HRTIM_DLLCR_CALEN);
mbed_official	381:5460fc57b6e4	718	hrtim_dllcr \|= HRTIM_DLLCR_CAL;
mbed_official	381:5460fc57b6e4	719	}
mbed_official	381:5460fc57b6e4	720	else
mbed_official	381:5460fc57b6e4	721	{
mbed_official	381:5460fc57b6e4	722	/* Periodic DLL calibration */
mbed_official	381:5460fc57b6e4	723	hrtim_dllcr &= ~(HRTIM_DLLCR_CALRTE \| HRTIM_DLLCR_CAL);
mbed_official	381:5460fc57b6e4	724	hrtim_dllcr \|= (CalibrationRate \| HRTIM_DLLCR_CALEN);
mbed_official	381:5460fc57b6e4	725	}
mbed_official	381:5460fc57b6e4	726
mbed_official	381:5460fc57b6e4	727	/* Update HRTIM register */
mbed_official	381:5460fc57b6e4	728	hhrtim->Instance->sCommonRegs.DLLCR = hrtim_dllcr;
mbed_official	381:5460fc57b6e4	729
mbed_official	381:5460fc57b6e4	730	return HAL_OK;
mbed_official	381:5460fc57b6e4	731	}
mbed_official	381:5460fc57b6e4	732
mbed_official	381:5460fc57b6e4	733	/**
mbed_official	381:5460fc57b6e4	734	* @brief Polls the DLL calibration ready flag and returns when the flag is
mbed_official	381:5460fc57b6e4	735	* set (DLL calibration completed) or upon timeout expiration
mbed_official	381:5460fc57b6e4	736	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	737	* @param Timeout: Timeout duration in millisecond
mbed_official	381:5460fc57b6e4	738	* @retval HAL status
mbed_official	381:5460fc57b6e4	739	*/
mbed_official	381:5460fc57b6e4	740	HAL_StatusTypeDef HAL_HRTIM_PollForDLLCalibration(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	741	uint32_t Timeout)
mbed_official	381:5460fc57b6e4	742	{
mbed_official	381:5460fc57b6e4	743	uint32_t tickstart=0;
mbed_official	381:5460fc57b6e4	744
mbed_official	381:5460fc57b6e4	745	tickstart = HAL_GetTick();
mbed_official	381:5460fc57b6e4	746
mbed_official	381:5460fc57b6e4	747	/* Check End of conversion flag */
mbed_official	381:5460fc57b6e4	748	while(__HAL_HRTIM_GET_FLAG(hhrtim, HRTIM_IT_DLLRDY) == RESET)
mbed_official	381:5460fc57b6e4	749	{
mbed_official	381:5460fc57b6e4	750	if (Timeout != HAL_MAX_DELAY)
mbed_official	381:5460fc57b6e4	751	{
mbed_official	381:5460fc57b6e4	752	if((Timeout == 0) \|\| ((HAL_GetTick()-tickstart) > Timeout))
mbed_official	381:5460fc57b6e4	753	{
mbed_official	381:5460fc57b6e4	754	hhrtim->State = HAL_HRTIM_STATE_ERROR;
mbed_official	381:5460fc57b6e4	755	return HAL_TIMEOUT;
mbed_official	381:5460fc57b6e4	756	}
mbed_official	381:5460fc57b6e4	757	}
mbed_official	381:5460fc57b6e4	758	}
mbed_official	381:5460fc57b6e4	759
mbed_official	381:5460fc57b6e4	760	/* Set HRTIM State */
mbed_official	381:5460fc57b6e4	761	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	762
mbed_official	381:5460fc57b6e4	763	/* Process unlocked */
mbed_official	381:5460fc57b6e4	764	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	765
mbed_official	381:5460fc57b6e4	766	return HAL_OK;
mbed_official	381:5460fc57b6e4	767	}
mbed_official	381:5460fc57b6e4	768
mbed_official	381:5460fc57b6e4	769	/**
mbed_official	381:5460fc57b6e4	770	* @brief Configures the time base unit of a timer
mbed_official	381:5460fc57b6e4	771	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	772	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	773	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	774	* @arg HRTIM_TIMERINDEX_MASTER for master timer
mbed_official	381:5460fc57b6e4	775	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	776	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	777	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	778	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	779	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	780	* @param pTimeBaseCfg: pointer to the time base configuration structure
mbed_official	381:5460fc57b6e4	781	* @note This function must be called prior starting the timer
mbed_official	381:5460fc57b6e4	782	* @note The time-base unit initialization parameters specify:
mbed_official	381:5460fc57b6e4	783	* The timer counter operating mode (continuous, one shot)
mbed_official	381:5460fc57b6e4	784	* The timer clock prescaler
mbed_official	381:5460fc57b6e4	785	* The timer period
mbed_official	381:5460fc57b6e4	786	* The timer repetition counter.
mbed_official	381:5460fc57b6e4	787	* @retval HAL status
mbed_official	381:5460fc57b6e4	788	*/
mbed_official	381:5460fc57b6e4	789	HAL_StatusTypeDef HAL_HRTIM_TimeBaseConfig(HRTIM_HandleTypeDef *hhrtim,
mbed_official	381:5460fc57b6e4	790	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	791	HRTIM_TimeBaseCfgTypeDef * pTimeBaseCfg)
mbed_official	381:5460fc57b6e4	792	{
mbed_official	381:5460fc57b6e4	793	/* Check the parameters */
mbed_official	381:5460fc57b6e4	794	assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
mbed_official	381:5460fc57b6e4	795	assert_param(IS_HRTIM_PRESCALERRATIO(pTimeBaseCfg->PrescalerRatio));
mbed_official	381:5460fc57b6e4	796	assert_param(IS_HRTIM_MODE(pTimeBaseCfg->Mode));
mbed_official	381:5460fc57b6e4	797
mbed_official	381:5460fc57b6e4	798	if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
mbed_official	381:5460fc57b6e4	799	{
mbed_official	381:5460fc57b6e4	800	return HAL_BUSY;
mbed_official	381:5460fc57b6e4	801	}
mbed_official	381:5460fc57b6e4	802
mbed_official	381:5460fc57b6e4	803	/* Set the HRTIM state */
mbed_official	381:5460fc57b6e4	804	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	805
mbed_official	381:5460fc57b6e4	806	if (TimerIdx == HRTIM_TIMERINDEX_MASTER)
mbed_official	381:5460fc57b6e4	807	{
mbed_official	381:5460fc57b6e4	808	/* Configure master timer time base unit */
mbed_official	381:5460fc57b6e4	809	HRTIM_MasterBase_Config(hhrtim, pTimeBaseCfg);
mbed_official	381:5460fc57b6e4	810	}
mbed_official	381:5460fc57b6e4	811	else
mbed_official	381:5460fc57b6e4	812	{
mbed_official	381:5460fc57b6e4	813	/* Configure timing unit time base unit */
mbed_official	381:5460fc57b6e4	814	HRTIM_TimingUnitBase_Config(hhrtim, TimerIdx, pTimeBaseCfg);
mbed_official	381:5460fc57b6e4	815	}
mbed_official	381:5460fc57b6e4	816
mbed_official	381:5460fc57b6e4	817	/* Set HRTIM state */
mbed_official	381:5460fc57b6e4	818	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	819
mbed_official	381:5460fc57b6e4	820	return HAL_OK;
mbed_official	381:5460fc57b6e4	821	}
mbed_official	381:5460fc57b6e4	822
mbed_official	381:5460fc57b6e4	823	/**
mbed_official	381:5460fc57b6e4	824	* @}
mbed_official	381:5460fc57b6e4	825	*/
mbed_official	381:5460fc57b6e4	826
mbed_official	381:5460fc57b6e4	827	/** @defgroup HRTIM_Exported_Functions_Group2 Simple time base mode functions
mbed_official	381:5460fc57b6e4	828	* @brief When à HRTIM timer operates in simple time base mode, the
mbed_official	381:5460fc57b6e4	829	* timer counter counts from 0 to the period value.
mbed_official	381:5460fc57b6e4	830	*
mbed_official	381:5460fc57b6e4	831	@verbatim
mbed_official	381:5460fc57b6e4	832	===============================================================================
mbed_official	381:5460fc57b6e4	833	##### Simple time base mode functions #####
mbed_official	381:5460fc57b6e4	834	===============================================================================
mbed_official	381:5460fc57b6e4	835	[..] This section provides functions allowing to:
mbed_official	381:5460fc57b6e4	836	(+) Start simple time base
mbed_official	381:5460fc57b6e4	837	(+) Stop simple time base
mbed_official	381:5460fc57b6e4	838	(+) Start simple time base and enable interrupt
mbed_official	381:5460fc57b6e4	839	(+) Stop simple time base and disable interrupt
mbed_official	381:5460fc57b6e4	840	(+) Start simple time base and enable DMA transfer
mbed_official	381:5460fc57b6e4	841	(+) Stop simple time base and disable DMA transfer
mbed_official	381:5460fc57b6e4	842
mbed_official	381:5460fc57b6e4	843	@endverbatim
mbed_official	381:5460fc57b6e4	844	* @{
mbed_official	381:5460fc57b6e4	845	*/
mbed_official	381:5460fc57b6e4	846
mbed_official	381:5460fc57b6e4	847	/**
mbed_official	381:5460fc57b6e4	848	* @brief Starts the counter of a timer operating in basic time base mode
mbed_official	381:5460fc57b6e4	849	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	850	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	851	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	852	* @arg HRTIM_TIMERINDEX_MASTER for master timer
mbed_official	381:5460fc57b6e4	853	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	854	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	855	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	856	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	857	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	858	* @retval HAL status
mbed_official	381:5460fc57b6e4	859	*/
mbed_official	381:5460fc57b6e4	860	HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStart(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	861	uint32_t TimerIdx)
mbed_official	381:5460fc57b6e4	862	{
mbed_official	381:5460fc57b6e4	863	/* Check the parameters */
mbed_official	381:5460fc57b6e4	864	assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
mbed_official	381:5460fc57b6e4	865
mbed_official	381:5460fc57b6e4	866	/* Process Locked */
mbed_official	381:5460fc57b6e4	867	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	868
mbed_official	381:5460fc57b6e4	869	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	870
mbed_official	381:5460fc57b6e4	871	/* Enable the timer counter */
mbed_official	381:5460fc57b6e4	872	__HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
mbed_official	381:5460fc57b6e4	873
mbed_official	381:5460fc57b6e4	874	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	875
mbed_official	381:5460fc57b6e4	876	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	877	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	878
mbed_official	381:5460fc57b6e4	879	return HAL_OK;
mbed_official	381:5460fc57b6e4	880	}
mbed_official	381:5460fc57b6e4	881
mbed_official	381:5460fc57b6e4	882	/**
mbed_official	381:5460fc57b6e4	883	* @brief Stops the counter of a timer operating in basic time base mode
mbed_official	381:5460fc57b6e4	884	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	885	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	886	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	887	* @arg HRTIM_TIMERINDEX_MASTER for master timer
mbed_official	381:5460fc57b6e4	888	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	889	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	890	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	891	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	892	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	893	* @retval HAL status
mbed_official	381:5460fc57b6e4	894	*/
mbed_official	381:5460fc57b6e4	895	HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStop(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	896	uint32_t TimerIdx)
mbed_official	381:5460fc57b6e4	897	{
mbed_official	381:5460fc57b6e4	898	/* Check the parameters */
mbed_official	381:5460fc57b6e4	899	assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
mbed_official	381:5460fc57b6e4	900
mbed_official	381:5460fc57b6e4	901	/* Process Locked */
mbed_official	381:5460fc57b6e4	902	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	903
mbed_official	381:5460fc57b6e4	904	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	905
mbed_official	381:5460fc57b6e4	906	/* Disable the timer counter */
mbed_official	381:5460fc57b6e4	907	__HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
mbed_official	381:5460fc57b6e4	908
mbed_official	381:5460fc57b6e4	909	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	910
mbed_official	381:5460fc57b6e4	911	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	912	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	913
mbed_official	381:5460fc57b6e4	914	return HAL_OK;
mbed_official	381:5460fc57b6e4	915	}
mbed_official	381:5460fc57b6e4	916
mbed_official	381:5460fc57b6e4	917	/**
mbed_official	381:5460fc57b6e4	918	* @brief Starts the counter of a timer operating in basic time base mode
mbed_official	381:5460fc57b6e4	919	* Timer repetition interrupt is enabled.
mbed_official	381:5460fc57b6e4	920	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	921	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	922	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	923	* @arg HRTIM_TIMERINDEX_MASTER for master timer
mbed_official	381:5460fc57b6e4	924	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	925	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	926	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	927	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	928	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	929	* @retval HAL status
mbed_official	381:5460fc57b6e4	930	*/
mbed_official	381:5460fc57b6e4	931	HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStart_IT(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	932	uint32_t TimerIdx)
mbed_official	381:5460fc57b6e4	933	{
mbed_official	381:5460fc57b6e4	934	/* Check the parameters */
mbed_official	381:5460fc57b6e4	935	assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
mbed_official	381:5460fc57b6e4	936
mbed_official	381:5460fc57b6e4	937	/* Process Locked */
mbed_official	381:5460fc57b6e4	938	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	939
mbed_official	381:5460fc57b6e4	940	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	941
mbed_official	381:5460fc57b6e4	942	/* Enable the repetition interrupt */
mbed_official	381:5460fc57b6e4	943	if (TimerIdx == HRTIM_TIMERINDEX_MASTER)
mbed_official	381:5460fc57b6e4	944	{
mbed_official	381:5460fc57b6e4	945	__HAL_HRTIM_MASTER_ENABLE_IT(hhrtim, HRTIM_MASTER_IT_MREP);
mbed_official	381:5460fc57b6e4	946	}
mbed_official	381:5460fc57b6e4	947	else
mbed_official	381:5460fc57b6e4	948	{
mbed_official	381:5460fc57b6e4	949	__HAL_HRTIM_TIMER_ENABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_REP);
mbed_official	381:5460fc57b6e4	950	}
mbed_official	381:5460fc57b6e4	951
mbed_official	381:5460fc57b6e4	952	/* Enable the timer counter */
mbed_official	381:5460fc57b6e4	953	__HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
mbed_official	381:5460fc57b6e4	954
mbed_official	381:5460fc57b6e4	955	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	956
mbed_official	381:5460fc57b6e4	957	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	958	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	959
mbed_official	381:5460fc57b6e4	960	return HAL_OK;
mbed_official	381:5460fc57b6e4	961	}
mbed_official	381:5460fc57b6e4	962
mbed_official	381:5460fc57b6e4	963	/**
mbed_official	381:5460fc57b6e4	964	* @brief Starts the counter of a timer operating in basic time base mode
mbed_official	381:5460fc57b6e4	965	* Timer repetition interrupt is disabled.
mbed_official	381:5460fc57b6e4	966	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	967	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	968	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	969	* @arg HRTIM_TIMERINDEX_MASTER for master timer
mbed_official	381:5460fc57b6e4	970	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	971	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	972	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	973	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	974	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	975	* @retval HAL status
mbed_official	381:5460fc57b6e4	976	*/
mbed_official	381:5460fc57b6e4	977	HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStop_IT(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	978	uint32_t TimerIdx)
mbed_official	381:5460fc57b6e4	979	{
mbed_official	381:5460fc57b6e4	980	/* Check the parameters */
mbed_official	381:5460fc57b6e4	981	assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
mbed_official	381:5460fc57b6e4	982
mbed_official	381:5460fc57b6e4	983	/* Process Locked */
mbed_official	381:5460fc57b6e4	984	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	985
mbed_official	381:5460fc57b6e4	986	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	987
mbed_official	381:5460fc57b6e4	988	/* Disable the repetition interrupt */
mbed_official	381:5460fc57b6e4	989	if (TimerIdx == HRTIM_TIMERINDEX_MASTER)
mbed_official	381:5460fc57b6e4	990	{
mbed_official	381:5460fc57b6e4	991	__HAL_HRTIM_MASTER_DISABLE_IT(hhrtim, HRTIM_MASTER_IT_MREP);
mbed_official	381:5460fc57b6e4	992	}
mbed_official	381:5460fc57b6e4	993	else
mbed_official	381:5460fc57b6e4	994	{
mbed_official	381:5460fc57b6e4	995	__HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_REP);
mbed_official	381:5460fc57b6e4	996	}
mbed_official	381:5460fc57b6e4	997
mbed_official	381:5460fc57b6e4	998	/* Disable the timer counter */
mbed_official	381:5460fc57b6e4	999	__HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
mbed_official	381:5460fc57b6e4	1000
mbed_official	381:5460fc57b6e4	1001	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	1002
mbed_official	381:5460fc57b6e4	1003	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	1004	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	1005
mbed_official	381:5460fc57b6e4	1006	return HAL_OK;
mbed_official	381:5460fc57b6e4	1007	}
mbed_official	381:5460fc57b6e4	1008
mbed_official	381:5460fc57b6e4	1009	/**
mbed_official	381:5460fc57b6e4	1010	* @brief Starts the counter of a timer operating in basic time base mode
mbed_official	381:5460fc57b6e4	1011	* Timer repetition DMA request is enabled.
mbed_official	381:5460fc57b6e4	1012	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	1013	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	1014	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	1015	* @arg HRTIM_TIMERINDEX_MASTER for master timer
mbed_official	381:5460fc57b6e4	1016	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	1017	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	1018	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	1019	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	1020	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	1021	* @param SrcAddr: DMA transfer source address
mbed_official	381:5460fc57b6e4	1022	* @param DestAddr: DMA transfer destination address
mbed_official	381:5460fc57b6e4	1023	* @param Length: The length of data items (data size) to be transferred
mbed_official	381:5460fc57b6e4	1024	* from source to destination
mbed_official	381:5460fc57b6e4	1025	*/
mbed_official	381:5460fc57b6e4	1026	HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStart_DMA(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	1027	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	1028	uint32_t SrcAddr,
mbed_official	381:5460fc57b6e4	1029	uint32_t DestAddr,
mbed_official	381:5460fc57b6e4	1030	uint32_t Length)
mbed_official	381:5460fc57b6e4	1031	{
mbed_official	381:5460fc57b6e4	1032	DMA_HandleTypeDef * hdma;
mbed_official	381:5460fc57b6e4	1033
mbed_official	381:5460fc57b6e4	1034	/* Check the parameters */
mbed_official	381:5460fc57b6e4	1035	assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
mbed_official	381:5460fc57b6e4	1036
mbed_official	381:5460fc57b6e4	1037	if((hhrtim->State == HAL_HRTIM_STATE_BUSY))
mbed_official	381:5460fc57b6e4	1038	{
mbed_official	381:5460fc57b6e4	1039	return HAL_BUSY;
mbed_official	381:5460fc57b6e4	1040	}
mbed_official	381:5460fc57b6e4	1041	if((hhrtim->State == HAL_HRTIM_STATE_READY))
mbed_official	381:5460fc57b6e4	1042	{
mbed_official	381:5460fc57b6e4	1043	if((SrcAddr == 0 ) \|\| (DestAddr == 0 ) \|\| (Length == 0))
mbed_official	381:5460fc57b6e4	1044	{
mbed_official	381:5460fc57b6e4	1045	return HAL_ERROR;
mbed_official	381:5460fc57b6e4	1046	}
mbed_official	381:5460fc57b6e4	1047	else
mbed_official	381:5460fc57b6e4	1048	{
mbed_official	381:5460fc57b6e4	1049	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	1050	}
mbed_official	381:5460fc57b6e4	1051	}
mbed_official	381:5460fc57b6e4	1052
mbed_official	381:5460fc57b6e4	1053	/* Process Locked */
mbed_official	381:5460fc57b6e4	1054	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	1055
mbed_official	381:5460fc57b6e4	1056	/* Get the timer DMA handler */
mbed_official	381:5460fc57b6e4	1057	hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx);
mbed_official	381:5460fc57b6e4	1058
mbed_official	381:5460fc57b6e4	1059	/* Set the DMA transfer completed callback */
mbed_official	381:5460fc57b6e4	1060	if (TimerIdx == HRTIM_TIMERINDEX_MASTER)
mbed_official	381:5460fc57b6e4	1061	{
mbed_official	381:5460fc57b6e4	1062	hdma->XferCpltCallback = HRTIM_DMAMasterCplt;
mbed_official	381:5460fc57b6e4	1063	}
mbed_official	381:5460fc57b6e4	1064	else
mbed_official	381:5460fc57b6e4	1065	{
mbed_official	381:5460fc57b6e4	1066	hdma->XferCpltCallback = HRTIM_DMATimerxCplt;
mbed_official	381:5460fc57b6e4	1067	}
mbed_official	381:5460fc57b6e4	1068
mbed_official	381:5460fc57b6e4	1069	/* Set the DMA error callback */
mbed_official	381:5460fc57b6e4	1070	hdma->XferErrorCallback = HRTIM_DMAError ;
mbed_official	381:5460fc57b6e4	1071
mbed_official	381:5460fc57b6e4	1072	/* Enable the DMA channel */
mbed_official	381:5460fc57b6e4	1073	HAL_DMA_Start_IT(hdma, SrcAddr, DestAddr, Length);
mbed_official	381:5460fc57b6e4	1074
mbed_official	381:5460fc57b6e4	1075	/* Enable the timer repetition DMA request */
mbed_official	381:5460fc57b6e4	1076	if (TimerIdx == HRTIM_TIMERINDEX_MASTER)
mbed_official	381:5460fc57b6e4	1077	{
mbed_official	381:5460fc57b6e4	1078	__HAL_HRTIM_MASTER_ENABLE_DMA(hhrtim, HRTIM_MASTER_DMA_MREP);
mbed_official	381:5460fc57b6e4	1079	}
mbed_official	381:5460fc57b6e4	1080	else
mbed_official	381:5460fc57b6e4	1081	{
mbed_official	381:5460fc57b6e4	1082	__HAL_HRTIM_TIMER_ENABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_REP);
mbed_official	381:5460fc57b6e4	1083	}
mbed_official	381:5460fc57b6e4	1084
mbed_official	381:5460fc57b6e4	1085	/* Enable the timer counter */
mbed_official	381:5460fc57b6e4	1086	__HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
mbed_official	381:5460fc57b6e4	1087
mbed_official	381:5460fc57b6e4	1088	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	1089
mbed_official	381:5460fc57b6e4	1090	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	1091	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	1092
mbed_official	381:5460fc57b6e4	1093	return HAL_OK;
mbed_official	381:5460fc57b6e4	1094	}
mbed_official	381:5460fc57b6e4	1095
mbed_official	381:5460fc57b6e4	1096	/**
mbed_official	381:5460fc57b6e4	1097	* @brief Starts the counter of a timer operating in basic time base mode
mbed_official	381:5460fc57b6e4	1098	* Timer repetition DMA request is disabled.
mbed_official	381:5460fc57b6e4	1099	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	1100	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	1101	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	1102	* @arg HRTIM_TIMERINDEX_MASTER for master timer
mbed_official	381:5460fc57b6e4	1103	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	1104	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	1105	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	1106	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	1107	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	1108	* @retval HAL status
mbed_official	381:5460fc57b6e4	1109	*/
mbed_official	381:5460fc57b6e4	1110	HAL_StatusTypeDef HAL_HRTIM_SimpleBaseStop_DMA(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	1111	uint32_t TimerIdx)
mbed_official	381:5460fc57b6e4	1112	{
mbed_official	381:5460fc57b6e4	1113	DMA_HandleTypeDef * hdma;
mbed_official	381:5460fc57b6e4	1114
mbed_official	381:5460fc57b6e4	1115	/* Check the parameters */
mbed_official	381:5460fc57b6e4	1116	assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
mbed_official	381:5460fc57b6e4	1117
mbed_official	381:5460fc57b6e4	1118	/* Process Locked */
mbed_official	381:5460fc57b6e4	1119	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	1120
mbed_official	381:5460fc57b6e4	1121	if (TimerIdx == HRTIM_TIMERINDEX_MASTER)
mbed_official	381:5460fc57b6e4	1122	{
mbed_official	381:5460fc57b6e4	1123	/* Disable the DMA */
mbed_official	381:5460fc57b6e4	1124	HAL_DMA_Abort(hhrtim->hdmaMaster);
mbed_official	381:5460fc57b6e4	1125
mbed_official	381:5460fc57b6e4	1126	/* Disable the timer repetition DMA request */
mbed_official	381:5460fc57b6e4	1127	__HAL_HRTIM_MASTER_DISABLE_DMA(hhrtim, HRTIM_MASTER_DMA_MREP);
mbed_official	381:5460fc57b6e4	1128	}
mbed_official	381:5460fc57b6e4	1129	else
mbed_official	381:5460fc57b6e4	1130	{
mbed_official	381:5460fc57b6e4	1131	/* Get the timer DMA handler */
mbed_official	381:5460fc57b6e4	1132	hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx);
mbed_official	381:5460fc57b6e4	1133
mbed_official	381:5460fc57b6e4	1134	/* Disable the DMA */
mbed_official	381:5460fc57b6e4	1135	HAL_DMA_Abort(hdma);
mbed_official	381:5460fc57b6e4	1136
mbed_official	381:5460fc57b6e4	1137	/* Disable the timer repetition DMA request */
mbed_official	381:5460fc57b6e4	1138	__HAL_HRTIM_TIMER_DISABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_REP);
mbed_official	381:5460fc57b6e4	1139	}
mbed_official	381:5460fc57b6e4	1140
mbed_official	381:5460fc57b6e4	1141	/* Disable the timer counter */
mbed_official	381:5460fc57b6e4	1142	__HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
mbed_official	381:5460fc57b6e4	1143
mbed_official	381:5460fc57b6e4	1144	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	1145
mbed_official	381:5460fc57b6e4	1146	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	1147	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	1148
mbed_official	381:5460fc57b6e4	1149	return HAL_OK;
mbed_official	381:5460fc57b6e4	1150	}
mbed_official	381:5460fc57b6e4	1151
mbed_official	381:5460fc57b6e4	1152	/**
mbed_official	381:5460fc57b6e4	1153	* @}
mbed_official	381:5460fc57b6e4	1154	*/
mbed_official	381:5460fc57b6e4	1155
mbed_official	381:5460fc57b6e4	1156	/** @defgroup HRTIM_Exported_Functions_Group3 Simple output compare mode functions
mbed_official	381:5460fc57b6e4	1157	* @brief When a HRTIM timer operates in simple output compare mode
mbed_official	381:5460fc57b6e4	1158	* the output level is set to a programmable value when a match
mbed_official	381:5460fc57b6e4	1159	* is found between the compare register and the counter.
mbed_official	381:5460fc57b6e4	1160	* Compare unit 1 is automatically associated to output 1
mbed_official	381:5460fc57b6e4	1161	* Compare unit 2 is automatically associated to output 2
mbed_official	381:5460fc57b6e4	1162	*
mbed_official	381:5460fc57b6e4	1163	@verbatim
mbed_official	381:5460fc57b6e4	1164	===============================================================================
mbed_official	381:5460fc57b6e4	1165	##### Simple output compare functions #####
mbed_official	381:5460fc57b6e4	1166	===============================================================================
mbed_official	381:5460fc57b6e4	1167	[..] This section provides functions allowing to:
mbed_official	381:5460fc57b6e4	1168	(+) Configure simple output channel
mbed_official	381:5460fc57b6e4	1169	(+) Start simple output compare
mbed_official	381:5460fc57b6e4	1170	(+) Stop simple output compare
mbed_official	381:5460fc57b6e4	1171	(+) Start simple output compare and enable interrupt
mbed_official	381:5460fc57b6e4	1172	(+) Stop simple output compare and disable interrupt
mbed_official	381:5460fc57b6e4	1173	(+) Start simple output compare and enable DMA transfer
mbed_official	381:5460fc57b6e4	1174	(+) Stop simple output compare and disable DMA transfer
mbed_official	381:5460fc57b6e4	1175
mbed_official	381:5460fc57b6e4	1176	@endverbatim
mbed_official	381:5460fc57b6e4	1177	* @{
mbed_official	381:5460fc57b6e4	1178	*/
mbed_official	381:5460fc57b6e4	1179
mbed_official	381:5460fc57b6e4	1180	/**
mbed_official	381:5460fc57b6e4	1181	* @brief Configures an output in basic output compare mode
mbed_official	381:5460fc57b6e4	1182	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	1183	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	1184	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	1185	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	1186	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	1187	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	1188	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	1189	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	1190	* @param OCChannel: Timer output
mbed_official	381:5460fc57b6e4	1191	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	1192	* @arg HRTIM_OUTPUT_TA1: Timer A - Ouput 1
mbed_official	381:5460fc57b6e4	1193	* @arg HRTIM_OUTPUT_TA2: Timer A - Ouput 2
mbed_official	381:5460fc57b6e4	1194	* @arg HRTIM_OUTPUT_TB1: Timer B - Ouput 1
mbed_official	381:5460fc57b6e4	1195	* @arg HRTIM_OUTPUT_TB2: Timer B - Ouput 2
mbed_official	381:5460fc57b6e4	1196	* @arg HRTIM_OUTPUT_TC1: Timer C - Ouput 1
mbed_official	381:5460fc57b6e4	1197	* @arg HRTIM_OUTPUT_TC2: Timer C - Ouput 2
mbed_official	381:5460fc57b6e4	1198	* @arg HRTIM_OUTPUT_TD1: Timer D - Ouput 1
mbed_official	381:5460fc57b6e4	1199	* @arg HRTIM_OUTPUT_TD2: Timer D - Ouput 2
mbed_official	381:5460fc57b6e4	1200	* @arg HRTIM_OUTPUT_TE1: Timer E - Ouput 1
mbed_official	381:5460fc57b6e4	1201	* @arg HRTIM_OUTPUT_TE2: Timer E - Ouput 2
mbed_official	381:5460fc57b6e4	1202	* @param pSimpleOCChannelCfg: pointer to the basic output compare output configuration structure
mbed_official	381:5460fc57b6e4	1203	* @note When the timer operates in basic output compare mode:
mbed_official	381:5460fc57b6e4	1204	* Output 1 is implicitely controled by the compare unit 1
mbed_official	381:5460fc57b6e4	1205	* Output 2 is implicitely controled by the compare unit 2
mbed_official	381:5460fc57b6e4	1206	* Output Set/Reset crossbar is set according to the selected output compare mode:
mbed_official	381:5460fc57b6e4	1207	* Toggle: SETxyR = RSTxyR = CMPy
mbed_official	381:5460fc57b6e4	1208	* Active: SETxyR = CMPy, RSTxyR = 0
mbed_official	381:5460fc57b6e4	1209	* Inactive: SETxy =0, RSTxy = CMPy
mbed_official	381:5460fc57b6e4	1210	* @retval HAL status
mbed_official	381:5460fc57b6e4	1211	*/
mbed_official	381:5460fc57b6e4	1212	HAL_StatusTypeDef HAL_HRTIM_SimpleOCChannelConfig(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	1213	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	1214	uint32_t OCChannel,
mbed_official	381:5460fc57b6e4	1215	HRTIM_SimpleOCChannelCfgTypeDef* pSimpleOCChannelCfg)
mbed_official	381:5460fc57b6e4	1216	{
mbed_official	381:5460fc57b6e4	1217	uint32_t CompareUnit = 0xFFFFFFFF;
mbed_official	381:5460fc57b6e4	1218	HRTIM_CompareCfgTypeDef CompareCfg;
mbed_official	381:5460fc57b6e4	1219	HRTIM_OutputCfgTypeDef OutputCfg;
mbed_official	381:5460fc57b6e4	1220
mbed_official	381:5460fc57b6e4	1221	/* Check parameters */
mbed_official	381:5460fc57b6e4	1222	assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel));
mbed_official	381:5460fc57b6e4	1223	assert_param(IS_HRTIM_BASICOCMODE(pSimpleOCChannelCfg->Mode));
mbed_official	381:5460fc57b6e4	1224	assert_param(IS_HRTIM_OUTPUTPOLARITY(pSimpleOCChannelCfg->Polarity));
mbed_official	381:5460fc57b6e4	1225	assert_param(IS_HRTIM_OUTPUTIDLELEVEL(pSimpleOCChannelCfg->IdleLevel));
mbed_official	381:5460fc57b6e4	1226
mbed_official	381:5460fc57b6e4	1227	if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
mbed_official	381:5460fc57b6e4	1228	{
mbed_official	381:5460fc57b6e4	1229	return HAL_BUSY;
mbed_official	381:5460fc57b6e4	1230	}
mbed_official	381:5460fc57b6e4	1231
mbed_official	381:5460fc57b6e4	1232	/* Set HRTIM state */
mbed_official	381:5460fc57b6e4	1233	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	1234
mbed_official	381:5460fc57b6e4	1235	/* Configure timer compare unit */
mbed_official	381:5460fc57b6e4	1236	switch (OCChannel)
mbed_official	381:5460fc57b6e4	1237	{
mbed_official	381:5460fc57b6e4	1238	case HRTIM_OUTPUT_TA1:
mbed_official	381:5460fc57b6e4	1239	case HRTIM_OUTPUT_TB1:
mbed_official	381:5460fc57b6e4	1240	case HRTIM_OUTPUT_TC1:
mbed_official	381:5460fc57b6e4	1241	case HRTIM_OUTPUT_TD1:
mbed_official	381:5460fc57b6e4	1242	case HRTIM_OUTPUT_TE1:
mbed_official	381:5460fc57b6e4	1243	{
mbed_official	381:5460fc57b6e4	1244	CompareUnit = HRTIM_COMPAREUNIT_1;
mbed_official	381:5460fc57b6e4	1245	}
mbed_official	381:5460fc57b6e4	1246	break;
mbed_official	381:5460fc57b6e4	1247	case HRTIM_OUTPUT_TA2:
mbed_official	381:5460fc57b6e4	1248	case HRTIM_OUTPUT_TB2:
mbed_official	381:5460fc57b6e4	1249	case HRTIM_OUTPUT_TC2:
mbed_official	381:5460fc57b6e4	1250	case HRTIM_OUTPUT_TD2:
mbed_official	381:5460fc57b6e4	1251	case HRTIM_OUTPUT_TE2:
mbed_official	381:5460fc57b6e4	1252	{
mbed_official	381:5460fc57b6e4	1253	CompareUnit = HRTIM_COMPAREUNIT_2;
mbed_official	381:5460fc57b6e4	1254	}
mbed_official	381:5460fc57b6e4	1255	break;
mbed_official	381:5460fc57b6e4	1256	}
mbed_official	381:5460fc57b6e4	1257
mbed_official	381:5460fc57b6e4	1258	CompareCfg.CompareValue = pSimpleOCChannelCfg->Pulse;
mbed_official	381:5460fc57b6e4	1259	CompareCfg.AutoDelayedMode = HRTIM_AUTODELAYEDMODE_REGULAR;
mbed_official	381:5460fc57b6e4	1260	CompareCfg.AutoDelayedTimeout = 0;
mbed_official	381:5460fc57b6e4	1261
mbed_official	381:5460fc57b6e4	1262	HRTIM_CompareUnitConfig(hhrtim,
mbed_official	381:5460fc57b6e4	1263	TimerIdx,
mbed_official	381:5460fc57b6e4	1264	CompareUnit,
mbed_official	381:5460fc57b6e4	1265	&CompareCfg);
mbed_official	381:5460fc57b6e4	1266
mbed_official	381:5460fc57b6e4	1267	/* Configure timer output */
mbed_official	381:5460fc57b6e4	1268	OutputCfg.Polarity = pSimpleOCChannelCfg->Polarity;
mbed_official	381:5460fc57b6e4	1269	OutputCfg.IdleLevel = pSimpleOCChannelCfg->IdleLevel;
mbed_official	381:5460fc57b6e4	1270	OutputCfg.FaultLevel = HRTIM_OUTPUTFAULTLEVEL_NONE;
mbed_official	381:5460fc57b6e4	1271	OutputCfg.IdleMode = HRTIM_OUTPUTIDLEMODE_NONE;
mbed_official	381:5460fc57b6e4	1272	OutputCfg.ChopperModeEnable = HRTIM_OUTPUTCHOPPERMODE_DISABLED;
mbed_official	381:5460fc57b6e4	1273	OutputCfg.BurstModeEntryDelayed = HRTIM_OUTPUTBURSTMODEENTRY_REGULAR;
mbed_official	381:5460fc57b6e4	1274
mbed_official	381:5460fc57b6e4	1275	switch (pSimpleOCChannelCfg->Mode)
mbed_official	381:5460fc57b6e4	1276	{
mbed_official	381:5460fc57b6e4	1277	case HRTIM_BASICOCMODE_TOGGLE:
mbed_official	381:5460fc57b6e4	1278	{
mbed_official	381:5460fc57b6e4	1279	if (CompareUnit == HRTIM_COMPAREUNIT_1)
mbed_official	381:5460fc57b6e4	1280	{
mbed_official	381:5460fc57b6e4	1281	OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP1;
mbed_official	381:5460fc57b6e4	1282	}
mbed_official	381:5460fc57b6e4	1283	else
mbed_official	381:5460fc57b6e4	1284	{
mbed_official	381:5460fc57b6e4	1285	OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP2;
mbed_official	381:5460fc57b6e4	1286	}
mbed_official	381:5460fc57b6e4	1287	OutputCfg.ResetSource = OutputCfg.SetSource;
mbed_official	381:5460fc57b6e4	1288	}
mbed_official	381:5460fc57b6e4	1289	break;
mbed_official	381:5460fc57b6e4	1290	case HRTIM_BASICOCMODE_ACTIVE:
mbed_official	381:5460fc57b6e4	1291	{
mbed_official	381:5460fc57b6e4	1292	if (CompareUnit == HRTIM_COMPAREUNIT_1)
mbed_official	381:5460fc57b6e4	1293	{
mbed_official	381:5460fc57b6e4	1294	OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP1;
mbed_official	381:5460fc57b6e4	1295	}
mbed_official	381:5460fc57b6e4	1296	else
mbed_official	381:5460fc57b6e4	1297	{
mbed_official	381:5460fc57b6e4	1298	OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP2;
mbed_official	381:5460fc57b6e4	1299	}
mbed_official	381:5460fc57b6e4	1300	OutputCfg.ResetSource = HRTIM_OUTPUTRESET_NONE;
mbed_official	381:5460fc57b6e4	1301	}
mbed_official	381:5460fc57b6e4	1302	break;
mbed_official	381:5460fc57b6e4	1303	case HRTIM_BASICOCMODE_INACTIVE:
mbed_official	381:5460fc57b6e4	1304	{
mbed_official	381:5460fc57b6e4	1305	if (CompareUnit == HRTIM_COMPAREUNIT_1)
mbed_official	381:5460fc57b6e4	1306	{
mbed_official	381:5460fc57b6e4	1307	OutputCfg.ResetSource = HRTIM_OUTPUTRESET_TIMCMP1;
mbed_official	381:5460fc57b6e4	1308	}
mbed_official	381:5460fc57b6e4	1309	else
mbed_official	381:5460fc57b6e4	1310	{
mbed_official	381:5460fc57b6e4	1311	OutputCfg.ResetSource = HRTIM_OUTPUTRESET_TIMCMP2;
mbed_official	381:5460fc57b6e4	1312	}
mbed_official	381:5460fc57b6e4	1313	OutputCfg.SetSource = HRTIM_OUTPUTSET_NONE;
mbed_official	381:5460fc57b6e4	1314	}
mbed_official	381:5460fc57b6e4	1315	break;
mbed_official	381:5460fc57b6e4	1316	}
mbed_official	381:5460fc57b6e4	1317
mbed_official	381:5460fc57b6e4	1318	HRTIM_OutputConfig(hhrtim,
mbed_official	381:5460fc57b6e4	1319	TimerIdx,
mbed_official	381:5460fc57b6e4	1320	OCChannel,
mbed_official	381:5460fc57b6e4	1321	&OutputCfg);
mbed_official	381:5460fc57b6e4	1322
mbed_official	381:5460fc57b6e4	1323	/* Set HRTIM state */
mbed_official	381:5460fc57b6e4	1324	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	1325
mbed_official	381:5460fc57b6e4	1326	return HAL_OK;
mbed_official	381:5460fc57b6e4	1327	}
mbed_official	381:5460fc57b6e4	1328
mbed_official	381:5460fc57b6e4	1329	/**
mbed_official	381:5460fc57b6e4	1330	* @brief Starts the output compare signal generation on the designed timer output
mbed_official	381:5460fc57b6e4	1331	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	1332	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	1333	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	1334	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	1335	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	1336	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	1337	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	1338	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	1339	* @param OCChannel: Timer output
mbed_official	381:5460fc57b6e4	1340	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	1341	* @arg HRTIM_OUTPUT_TA1: Timer A - Ouput 1
mbed_official	381:5460fc57b6e4	1342	* @arg HRTIM_OUTPUT_TA2: Timer A - Ouput 2
mbed_official	381:5460fc57b6e4	1343	* @arg HRTIM_OUTPUT_TB1: Timer B - Ouput 1
mbed_official	381:5460fc57b6e4	1344	* @arg HRTIM_OUTPUT_TB2: Timer B - Ouput 2
mbed_official	381:5460fc57b6e4	1345	* @arg HRTIM_OUTPUT_TC1: Timer C - Ouput 1
mbed_official	381:5460fc57b6e4	1346	* @arg HRTIM_OUTPUT_TC2: Timer C - Ouput 2
mbed_official	381:5460fc57b6e4	1347	* @arg HRTIM_OUTPUT_TD1: Timer D - Ouput 1
mbed_official	381:5460fc57b6e4	1348	* @arg HRTIM_OUTPUT_TD2: Timer D - Ouput 2
mbed_official	381:5460fc57b6e4	1349	* @arg HRTIM_OUTPUT_TE1: Timer E - Ouput 1
mbed_official	381:5460fc57b6e4	1350	* @arg HRTIM_OUTPUT_TE2: Timer E - Ouput 2
mbed_official	381:5460fc57b6e4	1351	* @retval HAL status
mbed_official	381:5460fc57b6e4	1352	*/
mbed_official	381:5460fc57b6e4	1353	HAL_StatusTypeDef HAL_HRTIM_SimpleOCStart(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	1354	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	1355	uint32_t OCChannel)
mbed_official	381:5460fc57b6e4	1356	{
mbed_official	381:5460fc57b6e4	1357	/* Check the parameters */
mbed_official	381:5460fc57b6e4	1358	assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel));
mbed_official	381:5460fc57b6e4	1359
mbed_official	381:5460fc57b6e4	1360	/* Process Locked */
mbed_official	381:5460fc57b6e4	1361	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	1362
mbed_official	381:5460fc57b6e4	1363	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	1364
mbed_official	381:5460fc57b6e4	1365	/* Enable the timer output */
mbed_official	381:5460fc57b6e4	1366	hhrtim->Instance->sCommonRegs.OENR \|= OCChannel;
mbed_official	381:5460fc57b6e4	1367
mbed_official	381:5460fc57b6e4	1368	/* Enable the timer counter */
mbed_official	381:5460fc57b6e4	1369	__HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
mbed_official	381:5460fc57b6e4	1370
mbed_official	381:5460fc57b6e4	1371	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	1372
mbed_official	381:5460fc57b6e4	1373	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	1374	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	1375
mbed_official	381:5460fc57b6e4	1376	return HAL_OK;
mbed_official	381:5460fc57b6e4	1377	}
mbed_official	381:5460fc57b6e4	1378
mbed_official	381:5460fc57b6e4	1379	/**
mbed_official	381:5460fc57b6e4	1380	* @brief Stops the output compare signal generation on the designed timer output
mbed_official	381:5460fc57b6e4	1381	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	1382	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	1383	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	1384	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	1385	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	1386	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	1387	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	1388	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	1389	* @param OCChannel: Timer output
mbed_official	381:5460fc57b6e4	1390	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	1391	* @arg HRTIM_OUTPUT_TA1: Timer A - Ouput 1
mbed_official	381:5460fc57b6e4	1392	* @arg HRTIM_OUTPUT_TA2: Timer A - Ouput 2
mbed_official	381:5460fc57b6e4	1393	* @arg HRTIM_OUTPUT_TB1: Timer B - Ouput 1
mbed_official	381:5460fc57b6e4	1394	* @arg HRTIM_OUTPUT_TB2: Timer B - Ouput 2
mbed_official	381:5460fc57b6e4	1395	* @arg HRTIM_OUTPUT_TC1: Timer C - Ouput 1
mbed_official	381:5460fc57b6e4	1396	* @arg HRTIM_OUTPUT_TC2: Timer C - Ouput 2
mbed_official	381:5460fc57b6e4	1397	* @arg HRTIM_OUTPUT_TD1: Timer D - Ouput 1
mbed_official	381:5460fc57b6e4	1398	* @arg HRTIM_OUTPUT_TD2: Timer D - Ouput 2
mbed_official	381:5460fc57b6e4	1399	* @arg HRTIM_OUTPUT_TE1: Timer E - Ouput 1
mbed_official	381:5460fc57b6e4	1400	* @arg HRTIM_OUTPUT_TE2: Timer E - Ouput 2
mbed_official	381:5460fc57b6e4	1401	* @retval HAL status
mbed_official	381:5460fc57b6e4	1402	*/
mbed_official	381:5460fc57b6e4	1403	HAL_StatusTypeDef HAL_HRTIM_SimpleOCStop(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	1404	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	1405	uint32_t OCChannel)
mbed_official	381:5460fc57b6e4	1406	{
mbed_official	381:5460fc57b6e4	1407	/* Check the parameters */
mbed_official	381:5460fc57b6e4	1408	assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel));
mbed_official	381:5460fc57b6e4	1409
mbed_official	381:5460fc57b6e4	1410	/* Process Locked */
mbed_official	381:5460fc57b6e4	1411	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	1412
mbed_official	381:5460fc57b6e4	1413	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	1414
mbed_official	381:5460fc57b6e4	1415	/* Disable the timer output */
mbed_official	381:5460fc57b6e4	1416	hhrtim->Instance->sCommonRegs.ODISR \|= OCChannel;
mbed_official	381:5460fc57b6e4	1417
mbed_official	381:5460fc57b6e4	1418	/* Disable the timer counter */
mbed_official	381:5460fc57b6e4	1419	__HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
mbed_official	381:5460fc57b6e4	1420
mbed_official	381:5460fc57b6e4	1421	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	1422
mbed_official	381:5460fc57b6e4	1423	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	1424	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	1425
mbed_official	381:5460fc57b6e4	1426	return HAL_OK;
mbed_official	381:5460fc57b6e4	1427	}
mbed_official	381:5460fc57b6e4	1428
mbed_official	381:5460fc57b6e4	1429	/**
mbed_official	381:5460fc57b6e4	1430	* @brief Starts the output compare signal generation on the designed timer output
mbed_official	381:5460fc57b6e4	1431	* Interrupt is enabled (see note below)
mbed_official	381:5460fc57b6e4	1432	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	1433	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	1434	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	1435	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	1436	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	1437	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	1438	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	1439	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	1440	* @param OCChannel: Timer output
mbed_official	381:5460fc57b6e4	1441	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	1442	* @arg HRTIM_OUTPUT_TA1: Timer A - Ouput 1
mbed_official	381:5460fc57b6e4	1443	* @arg HRTIM_OUTPUT_TA2: Timer A - Ouput 2
mbed_official	381:5460fc57b6e4	1444	* @arg HRTIM_OUTPUT_TB1: Timer B - Ouput 1
mbed_official	381:5460fc57b6e4	1445	* @arg HRTIM_OUTPUT_TB2: Timer B - Ouput 2
mbed_official	381:5460fc57b6e4	1446	* @arg HRTIM_OUTPUT_TC1: Timer C - Ouput 1
mbed_official	381:5460fc57b6e4	1447	* @arg HRTIM_OUTPUT_TC2: Timer C - Ouput 2
mbed_official	381:5460fc57b6e4	1448	* @arg HRTIM_OUTPUT_TD1: Timer D - Ouput 1
mbed_official	381:5460fc57b6e4	1449	* @arg HRTIM_OUTPUT_TD2: Timer D - Ouput 2
mbed_official	381:5460fc57b6e4	1450	* @arg HRTIM_OUTPUT_TE1: Timer E - Ouput 1
mbed_official	381:5460fc57b6e4	1451	* @arg HRTIM_OUTPUT_TE2: Timer E - Ouput 2
mbed_official	381:5460fc57b6e4	1452	* @note Interrupt enabling depends on the chosen output compare mode
mbed_official	381:5460fc57b6e4	1453	* Output toggle: compare match interrupt is enabled
mbed_official	381:5460fc57b6e4	1454	* Output set active: output set interrupt is enabled
mbed_official	381:5460fc57b6e4	1455	* Output set inactive: output reset interrupt is enabled
mbed_official	381:5460fc57b6e4	1456	* @retval HAL status
mbed_official	381:5460fc57b6e4	1457	*/
mbed_official	381:5460fc57b6e4	1458	HAL_StatusTypeDef HAL_HRTIM_SimpleOCStart_IT(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	1459	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	1460	uint32_t OCChannel)
mbed_official	381:5460fc57b6e4	1461	{
mbed_official	381:5460fc57b6e4	1462	uint32_t interrupt;
mbed_official	381:5460fc57b6e4	1463
mbed_official	381:5460fc57b6e4	1464	/* Check the parameters */
mbed_official	381:5460fc57b6e4	1465	assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel));
mbed_official	381:5460fc57b6e4	1466
mbed_official	381:5460fc57b6e4	1467	/* Process Locked */
mbed_official	381:5460fc57b6e4	1468	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	1469
mbed_official	381:5460fc57b6e4	1470	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	1471
mbed_official	381:5460fc57b6e4	1472	/* Get the interrupt to enable (depends on the output compare mode) */
mbed_official	381:5460fc57b6e4	1473	interrupt = HRTIM_GetITFromOCMode(hhrtim, TimerIdx, OCChannel);
mbed_official	381:5460fc57b6e4	1474
mbed_official	381:5460fc57b6e4	1475	/* Enable the timer output */
mbed_official	381:5460fc57b6e4	1476	hhrtim->Instance->sCommonRegs.OENR \|= OCChannel;
mbed_official	381:5460fc57b6e4	1477
mbed_official	381:5460fc57b6e4	1478	/* Enable the timer interrupt (depends on the output compare mode) */
mbed_official	381:5460fc57b6e4	1479	__HAL_HRTIM_TIMER_ENABLE_IT(hhrtim, TimerIdx, interrupt);
mbed_official	381:5460fc57b6e4	1480
mbed_official	381:5460fc57b6e4	1481	/* Enable the timer counter */
mbed_official	381:5460fc57b6e4	1482	__HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
mbed_official	381:5460fc57b6e4	1483
mbed_official	381:5460fc57b6e4	1484	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	1485
mbed_official	381:5460fc57b6e4	1486	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	1487	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	1488
mbed_official	381:5460fc57b6e4	1489	return HAL_OK;
mbed_official	381:5460fc57b6e4	1490	}
mbed_official	381:5460fc57b6e4	1491
mbed_official	381:5460fc57b6e4	1492	/**
mbed_official	381:5460fc57b6e4	1493	* @brief Stops the output compare signal generation on the designed timer output
mbed_official	381:5460fc57b6e4	1494	* Interrupt is disabled
mbed_official	381:5460fc57b6e4	1495	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	1496	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	1497	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	1498	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	1499	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	1500	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	1501	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	1502	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	1503	* @param OCChannel: Timer output
mbed_official	381:5460fc57b6e4	1504	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	1505	* @arg HRTIM_OUTPUT_TA1: Timer A - Ouput 1
mbed_official	381:5460fc57b6e4	1506	* @arg HRTIM_OUTPUT_TA2: Timer A - Ouput 2
mbed_official	381:5460fc57b6e4	1507	* @arg HRTIM_OUTPUT_TB1: Timer B - Ouput 1
mbed_official	381:5460fc57b6e4	1508	* @arg HRTIM_OUTPUT_TB2: Timer B - Ouput 2
mbed_official	381:5460fc57b6e4	1509	* @arg HRTIM_OUTPUT_TC1: Timer C - Ouput 1
mbed_official	381:5460fc57b6e4	1510	* @arg HRTIM_OUTPUT_TC2: Timer C - Ouput 2
mbed_official	381:5460fc57b6e4	1511	* @arg HRTIM_OUTPUT_TD1: Timer D - Ouput 1
mbed_official	381:5460fc57b6e4	1512	* @arg HRTIM_OUTPUT_TD2: Timer D - Ouput 2
mbed_official	381:5460fc57b6e4	1513	* @arg HRTIM_OUTPUT_TE1: Timer E - Ouput 1
mbed_official	381:5460fc57b6e4	1514	* @arg HRTIM_OUTPUT_TE2: Timer E - Ouput 2
mbed_official	381:5460fc57b6e4	1515	* @retval HAL status
mbed_official	381:5460fc57b6e4	1516	*/
mbed_official	381:5460fc57b6e4	1517	HAL_StatusTypeDef HAL_HRTIM_SimpleOCStop_IT(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	1518	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	1519	uint32_t OCChannel)
mbed_official	381:5460fc57b6e4	1520	{
mbed_official	381:5460fc57b6e4	1521	uint32_t interrupt;
mbed_official	381:5460fc57b6e4	1522
mbed_official	381:5460fc57b6e4	1523	/* Check the parameters */
mbed_official	381:5460fc57b6e4	1524	assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel));
mbed_official	381:5460fc57b6e4	1525
mbed_official	381:5460fc57b6e4	1526	/* Process Locked */
mbed_official	381:5460fc57b6e4	1527	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	1528
mbed_official	381:5460fc57b6e4	1529	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	1530
mbed_official	381:5460fc57b6e4	1531	/* Disable the timer output */
mbed_official	381:5460fc57b6e4	1532	hhrtim->Instance->sCommonRegs.ODISR \|= OCChannel;
mbed_official	381:5460fc57b6e4	1533
mbed_official	381:5460fc57b6e4	1534	/* Get the interrupt to disable (depends on the output compare mode) */
mbed_official	381:5460fc57b6e4	1535	interrupt = HRTIM_GetITFromOCMode(hhrtim, TimerIdx, OCChannel);
mbed_official	381:5460fc57b6e4	1536
mbed_official	381:5460fc57b6e4	1537	/* Disable the timer interrupt */
mbed_official	381:5460fc57b6e4	1538	__HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, TimerIdx, interrupt);
mbed_official	381:5460fc57b6e4	1539
mbed_official	381:5460fc57b6e4	1540	/* Disable the timer counter */
mbed_official	381:5460fc57b6e4	1541	__HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
mbed_official	381:5460fc57b6e4	1542
mbed_official	381:5460fc57b6e4	1543	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	1544
mbed_official	381:5460fc57b6e4	1545	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	1546	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	1547
mbed_official	381:5460fc57b6e4	1548	return HAL_OK;
mbed_official	381:5460fc57b6e4	1549	}
mbed_official	381:5460fc57b6e4	1550
mbed_official	381:5460fc57b6e4	1551	/**
mbed_official	381:5460fc57b6e4	1552	* @brief Starts the output compare signal generation on the designed timer output
mbed_official	381:5460fc57b6e4	1553	* DMA request is enabled (see note below)
mbed_official	381:5460fc57b6e4	1554	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	1555	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	1556	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	1557	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	1558	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	1559	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	1560	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	1561	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	1562	* @param OCChannel: Timer output
mbed_official	381:5460fc57b6e4	1563	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	1564	* @arg HRTIM_OUTPUT_TA1: Timer A - Ouput 1
mbed_official	381:5460fc57b6e4	1565	* @arg HRTIM_OUTPUT_TA2: Timer A - Ouput 2
mbed_official	381:5460fc57b6e4	1566	* @arg HRTIM_OUTPUT_TB1: Timer B - Ouput 1
mbed_official	381:5460fc57b6e4	1567	* @arg HRTIM_OUTPUT_TB2: Timer B - Ouput 2
mbed_official	381:5460fc57b6e4	1568	* @arg HRTIM_OUTPUT_TC1: Timer C - Ouput 1
mbed_official	381:5460fc57b6e4	1569	* @arg HRTIM_OUTPUT_TC2: Timer C - Ouput 2
mbed_official	381:5460fc57b6e4	1570	* @arg HRTIM_OUTPUT_TD1: Timer D - Ouput 1
mbed_official	381:5460fc57b6e4	1571	* @arg HRTIM_OUTPUT_TD2: Timer D - Ouput 2
mbed_official	381:5460fc57b6e4	1572	* @arg HRTIM_OUTPUT_TE1: Timer E - Ouput 1
mbed_official	381:5460fc57b6e4	1573	* @arg HRTIM_OUTPUT_TE2: Timer E - Ouput 2
mbed_official	381:5460fc57b6e4	1574	* @param SrcAddr: DMA transfer source address
mbed_official	381:5460fc57b6e4	1575	* @param DestAddr: DMA transfer destination address
mbed_official	381:5460fc57b6e4	1576	* @param Length: The length of data items (data size) to be transferred
mbed_official	381:5460fc57b6e4	1577	* from source to destination
mbed_official	381:5460fc57b6e4	1578	* @note DMA request enabling depends on the chosen output compare mode
mbed_official	381:5460fc57b6e4	1579	* Output toggle: compare match DMA request is enabled
mbed_official	381:5460fc57b6e4	1580	* Output set active: output set DMA request is enabled
mbed_official	381:5460fc57b6e4	1581	* Output set inactive: output reset DMA request is enabled
mbed_official	381:5460fc57b6e4	1582	* @retval HAL status
mbed_official	381:5460fc57b6e4	1583	*/
mbed_official	381:5460fc57b6e4	1584	HAL_StatusTypeDef HAL_HRTIM_SimpleOCStart_DMA(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	1585	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	1586	uint32_t OCChannel,
mbed_official	381:5460fc57b6e4	1587	uint32_t SrcAddr,
mbed_official	381:5460fc57b6e4	1588	uint32_t DestAddr,
mbed_official	381:5460fc57b6e4	1589	uint32_t Length)
mbed_official	381:5460fc57b6e4	1590	{
mbed_official	381:5460fc57b6e4	1591	DMA_HandleTypeDef * hdma;
mbed_official	381:5460fc57b6e4	1592	uint32_t dma_request;
mbed_official	381:5460fc57b6e4	1593
mbed_official	381:5460fc57b6e4	1594	/* Check the parameters */
mbed_official	381:5460fc57b6e4	1595	assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel));
mbed_official	381:5460fc57b6e4	1596
mbed_official	381:5460fc57b6e4	1597	if((hhrtim->State == HAL_HRTIM_STATE_BUSY))
mbed_official	381:5460fc57b6e4	1598	{
mbed_official	381:5460fc57b6e4	1599	return HAL_BUSY;
mbed_official	381:5460fc57b6e4	1600	}
mbed_official	381:5460fc57b6e4	1601	if((hhrtim->State == HAL_HRTIM_STATE_READY))
mbed_official	381:5460fc57b6e4	1602	{
mbed_official	381:5460fc57b6e4	1603	if((SrcAddr == 0 ) \|\| (DestAddr == 0 ) \|\| (Length == 0))
mbed_official	381:5460fc57b6e4	1604	{
mbed_official	381:5460fc57b6e4	1605	return HAL_ERROR;
mbed_official	381:5460fc57b6e4	1606	}
mbed_official	381:5460fc57b6e4	1607	else
mbed_official	381:5460fc57b6e4	1608	{
mbed_official	381:5460fc57b6e4	1609	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	1610	}
mbed_official	381:5460fc57b6e4	1611	}
mbed_official	381:5460fc57b6e4	1612
mbed_official	381:5460fc57b6e4	1613	/* Process Locked */
mbed_official	381:5460fc57b6e4	1614	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	1615
mbed_official	381:5460fc57b6e4	1616	/* Enable the timer output */
mbed_official	381:5460fc57b6e4	1617	hhrtim->Instance->sCommonRegs.OENR \|= OCChannel;
mbed_official	381:5460fc57b6e4	1618
mbed_official	381:5460fc57b6e4	1619	/* Get the DMA request to enable */
mbed_official	381:5460fc57b6e4	1620	dma_request = HRTIM_GetDMAFromOCMode(hhrtim, TimerIdx, OCChannel);
mbed_official	381:5460fc57b6e4	1621
mbed_official	381:5460fc57b6e4	1622	/* Get the timer DMA handler */
mbed_official	381:5460fc57b6e4	1623	hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx);
mbed_official	381:5460fc57b6e4	1624
mbed_official	381:5460fc57b6e4	1625	/* Set the DMA error callback */
mbed_official	381:5460fc57b6e4	1626	hdma->XferErrorCallback = HRTIM_DMAError ;
mbed_official	381:5460fc57b6e4	1627
mbed_official	381:5460fc57b6e4	1628	/* Set the DMA transfer completed callback */
mbed_official	381:5460fc57b6e4	1629	hdma->XferCpltCallback = HRTIM_DMATimerxCplt;
mbed_official	381:5460fc57b6e4	1630
mbed_official	381:5460fc57b6e4	1631	/* Enable the DMA channel */
mbed_official	381:5460fc57b6e4	1632	HAL_DMA_Start_IT(hdma, SrcAddr, DestAddr, Length);
mbed_official	381:5460fc57b6e4	1633
mbed_official	381:5460fc57b6e4	1634	/* Enable the timer DMA request */
mbed_official	381:5460fc57b6e4	1635	__HAL_HRTIM_TIMER_ENABLE_DMA(hhrtim, TimerIdx, dma_request);
mbed_official	381:5460fc57b6e4	1636
mbed_official	381:5460fc57b6e4	1637	/* Enable the timer counter */
mbed_official	381:5460fc57b6e4	1638	__HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
mbed_official	381:5460fc57b6e4	1639
mbed_official	381:5460fc57b6e4	1640	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	1641
mbed_official	381:5460fc57b6e4	1642	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	1643	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	1644
mbed_official	381:5460fc57b6e4	1645	return HAL_OK;
mbed_official	381:5460fc57b6e4	1646	}
mbed_official	381:5460fc57b6e4	1647
mbed_official	381:5460fc57b6e4	1648	/**
mbed_official	381:5460fc57b6e4	1649	* @brief Stops the output compare signal generation on the designed timer output
mbed_official	381:5460fc57b6e4	1650	* DMA request is disabled
mbed_official	381:5460fc57b6e4	1651	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	1652	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	1653	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	1654	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	1655	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	1656	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	1657	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	1658	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	1659	* @param OCChannel: Timer output
mbed_official	381:5460fc57b6e4	1660	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	1661	* @arg HRTIM_OUTPUT_TA1: Timer A - Ouput 1
mbed_official	381:5460fc57b6e4	1662	* @arg HRTIM_OUTPUT_TA2: Timer A - Ouput 2
mbed_official	381:5460fc57b6e4	1663	* @arg HRTIM_OUTPUT_TB1: Timer B - Ouput 1
mbed_official	381:5460fc57b6e4	1664	* @arg HRTIM_OUTPUT_TB2: Timer B - Ouput 2
mbed_official	381:5460fc57b6e4	1665	* @arg HRTIM_OUTPUT_TC1: Timer C - Ouput 1
mbed_official	381:5460fc57b6e4	1666	* @arg HRTIM_OUTPUT_TC2: Timer C - Ouput 2
mbed_official	381:5460fc57b6e4	1667	* @arg HRTIM_OUTPUT_TD1: Timer D - Ouput 1
mbed_official	381:5460fc57b6e4	1668	* @arg HRTIM_OUTPUT_TD2: Timer D - Ouput 2
mbed_official	381:5460fc57b6e4	1669	* @arg HRTIM_OUTPUT_TE1: Timer E - Ouput 1
mbed_official	381:5460fc57b6e4	1670	* @arg HRTIM_OUTPUT_TE2: Timer E - Ouput 2
mbed_official	381:5460fc57b6e4	1671	* @retval HAL status
mbed_official	381:5460fc57b6e4	1672	*/
mbed_official	381:5460fc57b6e4	1673	HAL_StatusTypeDef HAL_HRTIM_SimpleOCStop_DMA(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	1674	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	1675	uint32_t OCChannel)
mbed_official	381:5460fc57b6e4	1676	{
mbed_official	381:5460fc57b6e4	1677	DMA_HandleTypeDef * hdma;
mbed_official	381:5460fc57b6e4	1678	uint32_t dma_request;
mbed_official	381:5460fc57b6e4	1679
mbed_official	381:5460fc57b6e4	1680	/* Check the parameters */
mbed_official	381:5460fc57b6e4	1681	assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel));
mbed_official	381:5460fc57b6e4	1682
mbed_official	381:5460fc57b6e4	1683	/* Process Locked */
mbed_official	381:5460fc57b6e4	1684	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	1685
mbed_official	381:5460fc57b6e4	1686	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	1687
mbed_official	381:5460fc57b6e4	1688	/* Disable the timer output */
mbed_official	381:5460fc57b6e4	1689	hhrtim->Instance->sCommonRegs.ODISR \|= OCChannel;
mbed_official	381:5460fc57b6e4	1690
mbed_official	381:5460fc57b6e4	1691	/* Get the timer DMA handler */
mbed_official	381:5460fc57b6e4	1692	hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx);
mbed_official	381:5460fc57b6e4	1693
mbed_official	381:5460fc57b6e4	1694	/* Disable the DMA */
mbed_official	381:5460fc57b6e4	1695	HAL_DMA_Abort(hdma);
mbed_official	381:5460fc57b6e4	1696
mbed_official	381:5460fc57b6e4	1697	/* Get the DMA request to disable */
mbed_official	381:5460fc57b6e4	1698	dma_request = HRTIM_GetDMAFromOCMode(hhrtim, TimerIdx, OCChannel);
mbed_official	381:5460fc57b6e4	1699
mbed_official	381:5460fc57b6e4	1700	/* Disable the timer DMA request */
mbed_official	381:5460fc57b6e4	1701	__HAL_HRTIM_TIMER_DISABLE_DMA(hhrtim, TimerIdx, dma_request);
mbed_official	381:5460fc57b6e4	1702
mbed_official	381:5460fc57b6e4	1703	/* Disable the timer counter */
mbed_official	381:5460fc57b6e4	1704	__HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
mbed_official	381:5460fc57b6e4	1705
mbed_official	381:5460fc57b6e4	1706	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	1707
mbed_official	381:5460fc57b6e4	1708	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	1709	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	1710
mbed_official	381:5460fc57b6e4	1711	return HAL_OK;
mbed_official	381:5460fc57b6e4	1712	}
mbed_official	381:5460fc57b6e4	1713
mbed_official	381:5460fc57b6e4	1714	/**
mbed_official	381:5460fc57b6e4	1715	* @}
mbed_official	381:5460fc57b6e4	1716	*/
mbed_official	381:5460fc57b6e4	1717
mbed_official	381:5460fc57b6e4	1718	/** @defgroup HRTIM_Exported_Functions_Group4 Simple PWM output mode functions
mbed_official	381:5460fc57b6e4	1719	* @brief When a HRTIM timer operates in simple PWM output mode
mbed_official	381:5460fc57b6e4	1720	* the output level is set to a programmable value when a match is
mbed_official	381:5460fc57b6e4	1721	* found between the compare register and the counter and reset when
mbed_official	381:5460fc57b6e4	1722	* the timer period is reached. Duty cycle is determined by the
mbed_official	381:5460fc57b6e4	1723	* comparison value.
mbed_official	381:5460fc57b6e4	1724	* Compare unit 1 is automatically associated to output 1
mbed_official	381:5460fc57b6e4	1725	* Compare unit 2 is automatically associated to output 2
mbed_official	381:5460fc57b6e4	1726	*
mbed_official	381:5460fc57b6e4	1727	@verbatim
mbed_official	381:5460fc57b6e4	1728	===============================================================================
mbed_official	381:5460fc57b6e4	1729	##### Simple PWM output functions #####
mbed_official	381:5460fc57b6e4	1730	===============================================================================
mbed_official	381:5460fc57b6e4	1731	[..] This section provides functions allowing to:
mbed_official	381:5460fc57b6e4	1732	(+) Configure simple PWM output channel
mbed_official	381:5460fc57b6e4	1733	(+) Start simple PWM output
mbed_official	381:5460fc57b6e4	1734	(+) Stop simple PWM output
mbed_official	381:5460fc57b6e4	1735	(+) Start simple PWM output and enable interrupt
mbed_official	381:5460fc57b6e4	1736	(+) Stop simple PWM output and disable interrupt
mbed_official	381:5460fc57b6e4	1737	(+) Start simple PWM output and enable DMA transfer
mbed_official	381:5460fc57b6e4	1738	(+) Stop simple PWM output and disable DMA transfer
mbed_official	381:5460fc57b6e4	1739
mbed_official	381:5460fc57b6e4	1740	@endverbatim
mbed_official	381:5460fc57b6e4	1741	* @{
mbed_official	381:5460fc57b6e4	1742	*/
mbed_official	381:5460fc57b6e4	1743
mbed_official	381:5460fc57b6e4	1744	/**
mbed_official	381:5460fc57b6e4	1745	* @brief Configures an output in basic PWM mode
mbed_official	381:5460fc57b6e4	1746	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	1747	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	1748	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	1749	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	1750	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	1751	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	1752	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	1753	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	1754	* @param PWMChannel: Timer output
mbed_official	381:5460fc57b6e4	1755	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	1756	* @arg HRTIM_OUTPUT_TA1: Timer A - Ouput 1
mbed_official	381:5460fc57b6e4	1757	* @arg HRTIM_OUTPUT_TA2: Timer A - Ouput 2
mbed_official	381:5460fc57b6e4	1758	* @arg HRTIM_OUTPUT_TB1: Timer B - Ouput 1
mbed_official	381:5460fc57b6e4	1759	* @arg HRTIM_OUTPUT_TB2: Timer B - Ouput 2
mbed_official	381:5460fc57b6e4	1760	* @arg HRTIM_OUTPUT_TC1: Timer C - Ouput 1
mbed_official	381:5460fc57b6e4	1761	* @arg HRTIM_OUTPUT_TC2: Timer C - Ouput 2
mbed_official	381:5460fc57b6e4	1762	* @arg HRTIM_OUTPUT_TD1: Timer D - Ouput 1
mbed_official	381:5460fc57b6e4	1763	* @arg HRTIM_OUTPUT_TD2: Timer D - Ouput 2
mbed_official	381:5460fc57b6e4	1764	* @arg HRTIM_OUTPUT_TE1: Timer E - Ouput 1
mbed_official	381:5460fc57b6e4	1765	* @arg HRTIM_OUTPUT_TE2: Timer E - Ouput 2
mbed_official	381:5460fc57b6e4	1766	* @param pSimplePWMChannelCfg: pointer to the basic PWM output configuration structure
mbed_official	381:5460fc57b6e4	1767	* @note When the timer operates in basic PWM output mode:
mbed_official	381:5460fc57b6e4	1768	* Output 1 is implicitely controled by the compare unit 1
mbed_official	381:5460fc57b6e4	1769	* Output 2 is implicitely controled by the compare unit 2
mbed_official	381:5460fc57b6e4	1770	* Output Set/Reset crossbar is set as follows:
mbed_official	381:5460fc57b6e4	1771	* Ouput 1: SETx1R = CMP1, RSTx1R = PER
mbed_official	381:5460fc57b6e4	1772	* Output 2: SETx2R = CMP2, RST2R = PER
mbed_official	381:5460fc57b6e4	1773	* @note When Simple PWM mode is used the registers preload mechanism is
mbed_official	381:5460fc57b6e4	1774	* enabled (otherwise the behavior is not guaranteed).
mbed_official	381:5460fc57b6e4	1775	* @retval HAL status
mbed_official	381:5460fc57b6e4	1776	*/
mbed_official	381:5460fc57b6e4	1777	HAL_StatusTypeDef HAL_HRTIM_SimplePWMChannelConfig(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	1778	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	1779	uint32_t PWMChannel,
mbed_official	381:5460fc57b6e4	1780	HRTIM_SimplePWMChannelCfgTypeDef* pSimplePWMChannelCfg)
mbed_official	381:5460fc57b6e4	1781	{
mbed_official	381:5460fc57b6e4	1782	uint32_t CompareUnit = 0xFFFFFFFF;
mbed_official	381:5460fc57b6e4	1783	HRTIM_CompareCfgTypeDef CompareCfg;
mbed_official	381:5460fc57b6e4	1784	HRTIM_OutputCfgTypeDef OutputCfg;
mbed_official	381:5460fc57b6e4	1785	uint32_t hrtim_timcr;
mbed_official	381:5460fc57b6e4	1786
mbed_official	381:5460fc57b6e4	1787	/* Check parameters */
mbed_official	381:5460fc57b6e4	1788	assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel));
mbed_official	381:5460fc57b6e4	1789	assert_param(IS_HRTIM_OUTPUTPOLARITY(pSimplePWMChannelCfg->Polarity));
mbed_official	381:5460fc57b6e4	1790	assert_param(IS_HRTIM_OUTPUTIDLELEVEL(pSimplePWMChannelCfg->IdleLevel));
mbed_official	381:5460fc57b6e4	1791
mbed_official	381:5460fc57b6e4	1792	if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
mbed_official	381:5460fc57b6e4	1793	{
mbed_official	381:5460fc57b6e4	1794	return HAL_BUSY;
mbed_official	381:5460fc57b6e4	1795	}
mbed_official	381:5460fc57b6e4	1796
mbed_official	381:5460fc57b6e4	1797	/* Process Locked */
mbed_official	381:5460fc57b6e4	1798	__HAL_LOCK(hhrtim); hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	1799
mbed_official	381:5460fc57b6e4	1800	/* Configure timer compare unit */
mbed_official	381:5460fc57b6e4	1801	switch (PWMChannel)
mbed_official	381:5460fc57b6e4	1802	{
mbed_official	381:5460fc57b6e4	1803	case HRTIM_OUTPUT_TA1:
mbed_official	381:5460fc57b6e4	1804	case HRTIM_OUTPUT_TB1:
mbed_official	381:5460fc57b6e4	1805	case HRTIM_OUTPUT_TC1:
mbed_official	381:5460fc57b6e4	1806	case HRTIM_OUTPUT_TD1:
mbed_official	381:5460fc57b6e4	1807	case HRTIM_OUTPUT_TE1:
mbed_official	381:5460fc57b6e4	1808	{
mbed_official	381:5460fc57b6e4	1809	CompareUnit = HRTIM_COMPAREUNIT_1;
mbed_official	381:5460fc57b6e4	1810	}
mbed_official	381:5460fc57b6e4	1811	break;
mbed_official	381:5460fc57b6e4	1812	case HRTIM_OUTPUT_TA2:
mbed_official	381:5460fc57b6e4	1813	case HRTIM_OUTPUT_TB2:
mbed_official	381:5460fc57b6e4	1814	case HRTIM_OUTPUT_TC2:
mbed_official	381:5460fc57b6e4	1815	case HRTIM_OUTPUT_TD2:
mbed_official	381:5460fc57b6e4	1816	case HRTIM_OUTPUT_TE2:
mbed_official	381:5460fc57b6e4	1817	{
mbed_official	381:5460fc57b6e4	1818	CompareUnit = HRTIM_COMPAREUNIT_2;
mbed_official	381:5460fc57b6e4	1819	}
mbed_official	381:5460fc57b6e4	1820	break;
mbed_official	381:5460fc57b6e4	1821	}
mbed_official	381:5460fc57b6e4	1822
mbed_official	381:5460fc57b6e4	1823	CompareCfg.CompareValue = pSimplePWMChannelCfg->Pulse;
mbed_official	381:5460fc57b6e4	1824	CompareCfg.AutoDelayedMode = HRTIM_AUTODELAYEDMODE_REGULAR;
mbed_official	381:5460fc57b6e4	1825	CompareCfg.AutoDelayedTimeout = 0;
mbed_official	381:5460fc57b6e4	1826
mbed_official	381:5460fc57b6e4	1827	HRTIM_CompareUnitConfig(hhrtim,
mbed_official	381:5460fc57b6e4	1828	TimerIdx,
mbed_official	381:5460fc57b6e4	1829	CompareUnit,
mbed_official	381:5460fc57b6e4	1830	&CompareCfg);
mbed_official	381:5460fc57b6e4	1831
mbed_official	381:5460fc57b6e4	1832	/* Configure timer output */
mbed_official	381:5460fc57b6e4	1833	OutputCfg.Polarity = pSimplePWMChannelCfg->Polarity;
mbed_official	381:5460fc57b6e4	1834	OutputCfg.IdleLevel = pSimplePWMChannelCfg->IdleLevel;
mbed_official	381:5460fc57b6e4	1835	OutputCfg.FaultLevel = HRTIM_OUTPUTFAULTLEVEL_NONE;
mbed_official	381:5460fc57b6e4	1836	OutputCfg.IdleMode = HRTIM_OUTPUTIDLEMODE_NONE;
mbed_official	381:5460fc57b6e4	1837	OutputCfg.ChopperModeEnable = HRTIM_OUTPUTCHOPPERMODE_DISABLED;
mbed_official	381:5460fc57b6e4	1838	OutputCfg.BurstModeEntryDelayed = HRTIM_OUTPUTBURSTMODEENTRY_REGULAR;
mbed_official	381:5460fc57b6e4	1839
mbed_official	381:5460fc57b6e4	1840	if (CompareUnit == HRTIM_COMPAREUNIT_1)
mbed_official	381:5460fc57b6e4	1841	{
mbed_official	381:5460fc57b6e4	1842	OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP1;
mbed_official	381:5460fc57b6e4	1843	}
mbed_official	381:5460fc57b6e4	1844	else
mbed_official	381:5460fc57b6e4	1845	{
mbed_official	381:5460fc57b6e4	1846	OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP2;
mbed_official	381:5460fc57b6e4	1847	}
mbed_official	381:5460fc57b6e4	1848	OutputCfg.ResetSource = HRTIM_OUTPUTSET_TIMPER;
mbed_official	381:5460fc57b6e4	1849
mbed_official	381:5460fc57b6e4	1850	HRTIM_OutputConfig(hhrtim,
mbed_official	381:5460fc57b6e4	1851	TimerIdx,
mbed_official	381:5460fc57b6e4	1852	PWMChannel,
mbed_official	381:5460fc57b6e4	1853	&OutputCfg);
mbed_official	381:5460fc57b6e4	1854
mbed_official	381:5460fc57b6e4	1855	/* Enable the registers preload mechanism */
mbed_official	381:5460fc57b6e4	1856	hrtim_timcr = hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR;
mbed_official	381:5460fc57b6e4	1857	hrtim_timcr \|= HRTIM_TIMCR_PREEN;
mbed_official	381:5460fc57b6e4	1858	hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR = hrtim_timcr;
mbed_official	381:5460fc57b6e4	1859
mbed_official	381:5460fc57b6e4	1860	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	1861
mbed_official	381:5460fc57b6e4	1862	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	1863	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	1864
mbed_official	381:5460fc57b6e4	1865	return HAL_OK;
mbed_official	381:5460fc57b6e4	1866	}
mbed_official	381:5460fc57b6e4	1867
mbed_official	381:5460fc57b6e4	1868	/**
mbed_official	381:5460fc57b6e4	1869	* @brief Starts the PWM output signal generation on the designed timer output
mbed_official	381:5460fc57b6e4	1870	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	1871	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	1872	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	1873	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	1874	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	1875	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	1876	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	1877	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	1878	* @param PWMChannel: Timer output
mbed_official	381:5460fc57b6e4	1879	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	1880	* @arg HRTIM_OUTPUT_TA1: Timer A - Ouput 1
mbed_official	381:5460fc57b6e4	1881	* @arg HRTIM_OUTPUT_TA2: Timer A - Ouput 2
mbed_official	381:5460fc57b6e4	1882	* @arg HRTIM_OUTPUT_TB1: Timer B - Ouput 1
mbed_official	381:5460fc57b6e4	1883	* @arg HRTIM_OUTPUT_TB2: Timer B - Ouput 2
mbed_official	381:5460fc57b6e4	1884	* @arg HRTIM_OUTPUT_TC1: Timer C - Ouput 1
mbed_official	381:5460fc57b6e4	1885	* @arg HRTIM_OUTPUT_TC2: Timer C - Ouput 2
mbed_official	381:5460fc57b6e4	1886	* @arg HRTIM_OUTPUT_TD1: Timer D - Ouput 1
mbed_official	381:5460fc57b6e4	1887	* @arg HRTIM_OUTPUT_TD2: Timer D - Ouput 2
mbed_official	381:5460fc57b6e4	1888	* @arg HRTIM_OUTPUT_TE1: Timer E - Ouput 1
mbed_official	381:5460fc57b6e4	1889	* @arg HRTIM_OUTPUT_TE2: Timer E - Ouput 2
mbed_official	381:5460fc57b6e4	1890	* @retval HAL status
mbed_official	381:5460fc57b6e4	1891	*/
mbed_official	381:5460fc57b6e4	1892	HAL_StatusTypeDef HAL_HRTIM_SimplePWMStart(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	1893	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	1894	uint32_t PWMChannel)
mbed_official	381:5460fc57b6e4	1895	{
mbed_official	381:5460fc57b6e4	1896	/* Check the parameters */
mbed_official	381:5460fc57b6e4	1897	assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel));
mbed_official	381:5460fc57b6e4	1898
mbed_official	381:5460fc57b6e4	1899	/* Process Locked */
mbed_official	381:5460fc57b6e4	1900	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	1901
mbed_official	381:5460fc57b6e4	1902	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	1903
mbed_official	381:5460fc57b6e4	1904	/* Enable the timer output */
mbed_official	381:5460fc57b6e4	1905	hhrtim->Instance->sCommonRegs.OENR \|= PWMChannel;
mbed_official	381:5460fc57b6e4	1906
mbed_official	381:5460fc57b6e4	1907	/* Enable the timer counter */
mbed_official	381:5460fc57b6e4	1908	__HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
mbed_official	381:5460fc57b6e4	1909
mbed_official	381:5460fc57b6e4	1910	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	1911
mbed_official	381:5460fc57b6e4	1912	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	1913	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	1914
mbed_official	381:5460fc57b6e4	1915	return HAL_OK;
mbed_official	381:5460fc57b6e4	1916	}
mbed_official	381:5460fc57b6e4	1917
mbed_official	381:5460fc57b6e4	1918	/**
mbed_official	381:5460fc57b6e4	1919	* @brief Stops the PWM output signal generation on the designed timer output
mbed_official	381:5460fc57b6e4	1920	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	1921	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	1922	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	1923	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	1924	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	1925	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	1926	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	1927	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	1928	* @param PWMChannel: Timer output
mbed_official	381:5460fc57b6e4	1929	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	1930	* @arg HRTIM_OUTPUT_TA1: Timer A - Ouput 1
mbed_official	381:5460fc57b6e4	1931	* @arg HRTIM_OUTPUT_TA2: Timer A - Ouput 2
mbed_official	381:5460fc57b6e4	1932	* @arg HRTIM_OUTPUT_TB1: Timer B - Ouput 1
mbed_official	381:5460fc57b6e4	1933	* @arg HRTIM_OUTPUT_TB2: Timer B - Ouput 2
mbed_official	381:5460fc57b6e4	1934	* @arg HRTIM_OUTPUT_TC1: Timer C - Ouput 1
mbed_official	381:5460fc57b6e4	1935	* @arg HRTIM_OUTPUT_TC2: Timer C - Ouput 2
mbed_official	381:5460fc57b6e4	1936	* @arg HRTIM_OUTPUT_TD1: Timer D - Ouput 1
mbed_official	381:5460fc57b6e4	1937	* @arg HRTIM_OUTPUT_TD2: Timer D - Ouput 2
mbed_official	381:5460fc57b6e4	1938	* @arg HRTIM_OUTPUT_TE1: Timer E - Ouput 1
mbed_official	381:5460fc57b6e4	1939	* @arg HRTIM_OUTPUT_TE2: Timer E - Ouput 2
mbed_official	381:5460fc57b6e4	1940	* @retval HAL status
mbed_official	381:5460fc57b6e4	1941	*/
mbed_official	381:5460fc57b6e4	1942	HAL_StatusTypeDef HAL_HRTIM_SimplePWMStop(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	1943	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	1944	uint32_t PWMChannel)
mbed_official	381:5460fc57b6e4	1945	{
mbed_official	381:5460fc57b6e4	1946	/* Check the parameters */
mbed_official	381:5460fc57b6e4	1947	assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel));
mbed_official	381:5460fc57b6e4	1948
mbed_official	381:5460fc57b6e4	1949	/* Process Locked */
mbed_official	381:5460fc57b6e4	1950	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	1951
mbed_official	381:5460fc57b6e4	1952	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	1953
mbed_official	381:5460fc57b6e4	1954	/* Disable the timer output */
mbed_official	381:5460fc57b6e4	1955	hhrtim->Instance->sCommonRegs.ODISR \|= PWMChannel;
mbed_official	381:5460fc57b6e4	1956
mbed_official	381:5460fc57b6e4	1957	/* Disable the timer counter */
mbed_official	381:5460fc57b6e4	1958	__HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
mbed_official	381:5460fc57b6e4	1959
mbed_official	381:5460fc57b6e4	1960	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	1961
mbed_official	381:5460fc57b6e4	1962	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	1963	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	1964
mbed_official	381:5460fc57b6e4	1965	return HAL_OK;
mbed_official	381:5460fc57b6e4	1966	}
mbed_official	381:5460fc57b6e4	1967
mbed_official	381:5460fc57b6e4	1968	/**
mbed_official	381:5460fc57b6e4	1969	* @brief Starts the PWM output signal generation on the designed timer output
mbed_official	381:5460fc57b6e4	1970	* The compare interrupt is enabled.
mbed_official	381:5460fc57b6e4	1971	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	1972	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	1973	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	1974	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	1975	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	1976	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	1977	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	1978	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	1979	* @param PWMChannel: Timer output
mbed_official	381:5460fc57b6e4	1980	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	1981	* @arg HRTIM_OUTPUT_TA1: Timer A - Ouput 1
mbed_official	381:5460fc57b6e4	1982	* @arg HRTIM_OUTPUT_TA2: Timer A - Ouput 2
mbed_official	381:5460fc57b6e4	1983	* @arg HRTIM_OUTPUT_TB1: Timer B - Ouput 1
mbed_official	381:5460fc57b6e4	1984	* @arg HRTIM_OUTPUT_TB2: Timer B - Ouput 2
mbed_official	381:5460fc57b6e4	1985	* @arg HRTIM_OUTPUT_TC1: Timer C - Ouput 1
mbed_official	381:5460fc57b6e4	1986	* @arg HRTIM_OUTPUT_TC2: Timer C - Ouput 2
mbed_official	381:5460fc57b6e4	1987	* @arg HRTIM_OUTPUT_TD1: Timer D - Ouput 1
mbed_official	381:5460fc57b6e4	1988	* @arg HRTIM_OUTPUT_TD2: Timer D - Ouput 2
mbed_official	381:5460fc57b6e4	1989	* @arg HRTIM_OUTPUT_TE1: Timer E - Ouput 1
mbed_official	381:5460fc57b6e4	1990	* @arg HRTIM_OUTPUT_TE2: Timer E - Ouput 2
mbed_official	381:5460fc57b6e4	1991	* @retval HAL status
mbed_official	381:5460fc57b6e4	1992	*/
mbed_official	381:5460fc57b6e4	1993	HAL_StatusTypeDef HAL_HRTIM_SimplePWMStart_IT(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	1994	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	1995	uint32_t PWMChannel)
mbed_official	381:5460fc57b6e4	1996	{
mbed_official	381:5460fc57b6e4	1997	/* Check the parameters */
mbed_official	381:5460fc57b6e4	1998	assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel));
mbed_official	381:5460fc57b6e4	1999
mbed_official	381:5460fc57b6e4	2000	/* Process Locked */
mbed_official	381:5460fc57b6e4	2001	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	2002
mbed_official	381:5460fc57b6e4	2003	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	2004
mbed_official	381:5460fc57b6e4	2005	/* Enable the timer output */
mbed_official	381:5460fc57b6e4	2006	hhrtim->Instance->sCommonRegs.OENR \|= PWMChannel;
mbed_official	381:5460fc57b6e4	2007
mbed_official	381:5460fc57b6e4	2008	/* Enable the timer interrupt (depends on the PWM output) */
mbed_official	381:5460fc57b6e4	2009	switch (PWMChannel)
mbed_official	381:5460fc57b6e4	2010	{
mbed_official	381:5460fc57b6e4	2011	case HRTIM_OUTPUT_TA1:
mbed_official	381:5460fc57b6e4	2012	case HRTIM_OUTPUT_TB1:
mbed_official	381:5460fc57b6e4	2013	case HRTIM_OUTPUT_TC1:
mbed_official	381:5460fc57b6e4	2014	case HRTIM_OUTPUT_TD1:
mbed_official	381:5460fc57b6e4	2015	case HRTIM_OUTPUT_TE1:
mbed_official	381:5460fc57b6e4	2016	{
mbed_official	381:5460fc57b6e4	2017	__HAL_HRTIM_TIMER_ENABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP1);
mbed_official	381:5460fc57b6e4	2018	}
mbed_official	381:5460fc57b6e4	2019	break;
mbed_official	381:5460fc57b6e4	2020	case HRTIM_OUTPUT_TA2:
mbed_official	381:5460fc57b6e4	2021	case HRTIM_OUTPUT_TB2:
mbed_official	381:5460fc57b6e4	2022	case HRTIM_OUTPUT_TC2:
mbed_official	381:5460fc57b6e4	2023	case HRTIM_OUTPUT_TD2:
mbed_official	381:5460fc57b6e4	2024	case HRTIM_OUTPUT_TE2:
mbed_official	381:5460fc57b6e4	2025	{
mbed_official	381:5460fc57b6e4	2026	__HAL_HRTIM_TIMER_ENABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP2);
mbed_official	381:5460fc57b6e4	2027	}
mbed_official	381:5460fc57b6e4	2028	break;
mbed_official	381:5460fc57b6e4	2029	}
mbed_official	381:5460fc57b6e4	2030
mbed_official	381:5460fc57b6e4	2031	/* Enable the timer counter */
mbed_official	381:5460fc57b6e4	2032	__HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
mbed_official	381:5460fc57b6e4	2033
mbed_official	381:5460fc57b6e4	2034	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	2035
mbed_official	381:5460fc57b6e4	2036	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	2037	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	2038
mbed_official	381:5460fc57b6e4	2039	return HAL_OK;
mbed_official	381:5460fc57b6e4	2040	}
mbed_official	381:5460fc57b6e4	2041
mbed_official	381:5460fc57b6e4	2042	/**
mbed_official	381:5460fc57b6e4	2043	* @brief Stops the PWM output signal generation on the designed timer output
mbed_official	381:5460fc57b6e4	2044	* The compare interrupt is disabled.
mbed_official	381:5460fc57b6e4	2045	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	2046	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	2047	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	2048	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	2049	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	2050	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	2051	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	2052	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	2053	* @param PWMChannel: Timer output
mbed_official	381:5460fc57b6e4	2054	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	2055	* @arg HRTIM_OUTPUT_TA1: Timer A - Ouput 1
mbed_official	381:5460fc57b6e4	2056	* @arg HRTIM_OUTPUT_TA2: Timer A - Ouput 2
mbed_official	381:5460fc57b6e4	2057	* @arg HRTIM_OUTPUT_TB1: Timer B - Ouput 1
mbed_official	381:5460fc57b6e4	2058	* @arg HRTIM_OUTPUT_TB2: Timer B - Ouput 2
mbed_official	381:5460fc57b6e4	2059	* @arg HRTIM_OUTPUT_TC1: Timer C - Ouput 1
mbed_official	381:5460fc57b6e4	2060	* @arg HRTIM_OUTPUT_TC2: Timer C - Ouput 2
mbed_official	381:5460fc57b6e4	2061	* @arg HRTIM_OUTPUT_TD1: Timer D - Ouput 1
mbed_official	381:5460fc57b6e4	2062	* @arg HRTIM_OUTPUT_TD2: Timer D - Ouput 2
mbed_official	381:5460fc57b6e4	2063	* @arg HRTIM_OUTPUT_TE1: Timer E - Ouput 1
mbed_official	381:5460fc57b6e4	2064	* @arg HRTIM_OUTPUT_TE2: Timer E - Ouput 2
mbed_official	381:5460fc57b6e4	2065	* @retval HAL status
mbed_official	381:5460fc57b6e4	2066	*/
mbed_official	381:5460fc57b6e4	2067	HAL_StatusTypeDef HAL_HRTIM_SimplePWMStop_IT(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	2068	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	2069	uint32_t PWMChannel)
mbed_official	381:5460fc57b6e4	2070	{
mbed_official	381:5460fc57b6e4	2071	/* Check the parameters */
mbed_official	381:5460fc57b6e4	2072	assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel));
mbed_official	381:5460fc57b6e4	2073
mbed_official	381:5460fc57b6e4	2074	/* Process Locked */
mbed_official	381:5460fc57b6e4	2075	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	2076
mbed_official	381:5460fc57b6e4	2077	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	2078
mbed_official	381:5460fc57b6e4	2079	/* Disable the timer output */
mbed_official	381:5460fc57b6e4	2080	hhrtim->Instance->sCommonRegs.ODISR \|= PWMChannel;
mbed_official	381:5460fc57b6e4	2081
mbed_official	381:5460fc57b6e4	2082	/* Disable the timer interrupt (depends on the PWM output) */
mbed_official	381:5460fc57b6e4	2083	switch (PWMChannel)
mbed_official	381:5460fc57b6e4	2084	{
mbed_official	381:5460fc57b6e4	2085	case HRTIM_OUTPUT_TA1:
mbed_official	381:5460fc57b6e4	2086	case HRTIM_OUTPUT_TB1:
mbed_official	381:5460fc57b6e4	2087	case HRTIM_OUTPUT_TC1:
mbed_official	381:5460fc57b6e4	2088	case HRTIM_OUTPUT_TD1:
mbed_official	381:5460fc57b6e4	2089	case HRTIM_OUTPUT_TE1:
mbed_official	381:5460fc57b6e4	2090	{
mbed_official	381:5460fc57b6e4	2091	__HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP1);
mbed_official	381:5460fc57b6e4	2092	}
mbed_official	381:5460fc57b6e4	2093	break;
mbed_official	381:5460fc57b6e4	2094	case HRTIM_OUTPUT_TA2:
mbed_official	381:5460fc57b6e4	2095	case HRTIM_OUTPUT_TB2:
mbed_official	381:5460fc57b6e4	2096	case HRTIM_OUTPUT_TC2:
mbed_official	381:5460fc57b6e4	2097	case HRTIM_OUTPUT_TD2:
mbed_official	381:5460fc57b6e4	2098	case HRTIM_OUTPUT_TE2:
mbed_official	381:5460fc57b6e4	2099	{
mbed_official	381:5460fc57b6e4	2100	__HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP2);
mbed_official	381:5460fc57b6e4	2101	}
mbed_official	381:5460fc57b6e4	2102	break;
mbed_official	381:5460fc57b6e4	2103	}
mbed_official	381:5460fc57b6e4	2104
mbed_official	381:5460fc57b6e4	2105	/* Disable the timer counter */
mbed_official	381:5460fc57b6e4	2106	__HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
mbed_official	381:5460fc57b6e4	2107
mbed_official	381:5460fc57b6e4	2108	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	2109
mbed_official	381:5460fc57b6e4	2110	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	2111	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	2112
mbed_official	381:5460fc57b6e4	2113	return HAL_OK;
mbed_official	381:5460fc57b6e4	2114	}
mbed_official	381:5460fc57b6e4	2115
mbed_official	381:5460fc57b6e4	2116	/**
mbed_official	381:5460fc57b6e4	2117	* @brief Starts the PWM output signal generation on the designed timer output
mbed_official	381:5460fc57b6e4	2118	* The compare DMA request is enabled.
mbed_official	381:5460fc57b6e4	2119	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	2120	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	2121	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	2122	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	2123	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	2124	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	2125	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	2126	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	2127	* @param PWMChannel: Timer output
mbed_official	381:5460fc57b6e4	2128	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	2129	* @arg HRTIM_OUTPUT_TA1: Timer A - Ouput 1
mbed_official	381:5460fc57b6e4	2130	* @arg HRTIM_OUTPUT_TA2: Timer A - Ouput 2
mbed_official	381:5460fc57b6e4	2131	* @arg HRTIM_OUTPUT_TB1: Timer B - Ouput 1
mbed_official	381:5460fc57b6e4	2132	* @arg HRTIM_OUTPUT_TB2: Timer B - Ouput 2
mbed_official	381:5460fc57b6e4	2133	* @arg HRTIM_OUTPUT_TC1: Timer C - Ouput 1
mbed_official	381:5460fc57b6e4	2134	* @arg HRTIM_OUTPUT_TC2: Timer C - Ouput 2
mbed_official	381:5460fc57b6e4	2135	* @arg HRTIM_OUTPUT_TD1: Timer D - Ouput 1
mbed_official	381:5460fc57b6e4	2136	* @arg HRTIM_OUTPUT_TD2: Timer D - Ouput 2
mbed_official	381:5460fc57b6e4	2137	* @arg HRTIM_OUTPUT_TE1: Timer E - Ouput 1
mbed_official	381:5460fc57b6e4	2138	* @arg HRTIM_OUTPUT_TE2: Timer E - Ouput 2
mbed_official	381:5460fc57b6e4	2139	* @param SrcAddr: DMA transfer source address
mbed_official	381:5460fc57b6e4	2140	* @param DestAddr: DMA transfer destination address
mbed_official	381:5460fc57b6e4	2141	* @param Length: The length of data items (data size) to be transferred
mbed_official	381:5460fc57b6e4	2142	* from source to destination
mbed_official	381:5460fc57b6e4	2143	* @retval HAL status
mbed_official	381:5460fc57b6e4	2144	*/
mbed_official	381:5460fc57b6e4	2145	HAL_StatusTypeDef HAL_HRTIM_SimplePWMStart_DMA(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	2146	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	2147	uint32_t PWMChannel,
mbed_official	381:5460fc57b6e4	2148	uint32_t SrcAddr,
mbed_official	381:5460fc57b6e4	2149	uint32_t DestAddr,
mbed_official	381:5460fc57b6e4	2150	uint32_t Length)
mbed_official	381:5460fc57b6e4	2151	{
mbed_official	381:5460fc57b6e4	2152	DMA_HandleTypeDef * hdma;
mbed_official	381:5460fc57b6e4	2153
mbed_official	381:5460fc57b6e4	2154	/* Check the parameters */
mbed_official	381:5460fc57b6e4	2155	assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel));
mbed_official	381:5460fc57b6e4	2156
mbed_official	381:5460fc57b6e4	2157	if((hhrtim->State == HAL_HRTIM_STATE_BUSY))
mbed_official	381:5460fc57b6e4	2158	{
mbed_official	381:5460fc57b6e4	2159	return HAL_BUSY;
mbed_official	381:5460fc57b6e4	2160	}
mbed_official	381:5460fc57b6e4	2161	if((hhrtim->State == HAL_HRTIM_STATE_READY))
mbed_official	381:5460fc57b6e4	2162	{
mbed_official	381:5460fc57b6e4	2163	if((SrcAddr == 0 ) \|\| (DestAddr == 0 ) \|\| (Length == 0))
mbed_official	381:5460fc57b6e4	2164	{
mbed_official	381:5460fc57b6e4	2165	return HAL_ERROR;
mbed_official	381:5460fc57b6e4	2166	}
mbed_official	381:5460fc57b6e4	2167	else
mbed_official	381:5460fc57b6e4	2168	{
mbed_official	381:5460fc57b6e4	2169	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	2170	}
mbed_official	381:5460fc57b6e4	2171	}
mbed_official	381:5460fc57b6e4	2172
mbed_official	381:5460fc57b6e4	2173	/* Process Locked */
mbed_official	381:5460fc57b6e4	2174	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	2175
mbed_official	381:5460fc57b6e4	2176	/* Enable the timer output */
mbed_official	381:5460fc57b6e4	2177	hhrtim->Instance->sCommonRegs.OENR \|= PWMChannel;
mbed_official	381:5460fc57b6e4	2178
mbed_official	381:5460fc57b6e4	2179	/* Get the timer DMA handler */
mbed_official	381:5460fc57b6e4	2180	hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx);
mbed_official	381:5460fc57b6e4	2181
mbed_official	381:5460fc57b6e4	2182	/* Set the DMA error callback */
mbed_official	381:5460fc57b6e4	2183	hdma->XferErrorCallback = HRTIM_DMAError ;
mbed_official	381:5460fc57b6e4	2184
mbed_official	381:5460fc57b6e4	2185	/* Set the DMA transfer completed callback */
mbed_official	381:5460fc57b6e4	2186	hdma->XferCpltCallback = HRTIM_DMATimerxCplt;
mbed_official	381:5460fc57b6e4	2187
mbed_official	381:5460fc57b6e4	2188	/* Enable the DMA channel */
mbed_official	381:5460fc57b6e4	2189	HAL_DMA_Start_IT(hdma, SrcAddr, DestAddr, Length);
mbed_official	381:5460fc57b6e4	2190
mbed_official	381:5460fc57b6e4	2191	/* Enable the timer DMA request */
mbed_official	381:5460fc57b6e4	2192	switch (PWMChannel)
mbed_official	381:5460fc57b6e4	2193	{
mbed_official	381:5460fc57b6e4	2194	case HRTIM_OUTPUT_TA1:
mbed_official	381:5460fc57b6e4	2195	case HRTIM_OUTPUT_TB1:
mbed_official	381:5460fc57b6e4	2196	case HRTIM_OUTPUT_TC1:
mbed_official	381:5460fc57b6e4	2197	case HRTIM_OUTPUT_TD1:
mbed_official	381:5460fc57b6e4	2198	case HRTIM_OUTPUT_TE1:
mbed_official	381:5460fc57b6e4	2199	{
mbed_official	381:5460fc57b6e4	2200	__HAL_HRTIM_TIMER_ENABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_CMP1);
mbed_official	381:5460fc57b6e4	2201	}
mbed_official	381:5460fc57b6e4	2202	break;
mbed_official	381:5460fc57b6e4	2203	case HRTIM_OUTPUT_TA2:
mbed_official	381:5460fc57b6e4	2204	case HRTIM_OUTPUT_TB2:
mbed_official	381:5460fc57b6e4	2205	case HRTIM_OUTPUT_TC2:
mbed_official	381:5460fc57b6e4	2206	case HRTIM_OUTPUT_TD2:
mbed_official	381:5460fc57b6e4	2207	case HRTIM_OUTPUT_TE2:
mbed_official	381:5460fc57b6e4	2208	{
mbed_official	381:5460fc57b6e4	2209	__HAL_HRTIM_TIMER_ENABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_CMP2);
mbed_official	381:5460fc57b6e4	2210	}
mbed_official	381:5460fc57b6e4	2211	break;
mbed_official	381:5460fc57b6e4	2212	}
mbed_official	381:5460fc57b6e4	2213
mbed_official	381:5460fc57b6e4	2214	/* Enable the timer counter */
mbed_official	381:5460fc57b6e4	2215	__HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
mbed_official	381:5460fc57b6e4	2216
mbed_official	381:5460fc57b6e4	2217	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	2218
mbed_official	381:5460fc57b6e4	2219	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	2220	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	2221
mbed_official	381:5460fc57b6e4	2222	return HAL_OK;
mbed_official	381:5460fc57b6e4	2223	}
mbed_official	381:5460fc57b6e4	2224
mbed_official	381:5460fc57b6e4	2225	/**
mbed_official	381:5460fc57b6e4	2226	* @brief Stops the PWM output signal generation on the designed timer output
mbed_official	381:5460fc57b6e4	2227	* The compare DMA request is disabled.
mbed_official	381:5460fc57b6e4	2228	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	2229	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	2230	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	2231	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	2232	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	2233	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	2234	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	2235	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	2236	* @param PWMChannel: Timer output
mbed_official	381:5460fc57b6e4	2237	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	2238	* @arg HRTIM_OUTPUT_TA1: Timer A - Ouput 1
mbed_official	381:5460fc57b6e4	2239	* @arg HRTIM_OUTPUT_TA2: Timer A - Ouput 2
mbed_official	381:5460fc57b6e4	2240	* @arg HRTIM_OUTPUT_TB1: Timer B - Ouput 1
mbed_official	381:5460fc57b6e4	2241	* @arg HRTIM_OUTPUT_TB2: Timer B - Ouput 2
mbed_official	381:5460fc57b6e4	2242	* @arg HRTIM_OUTPUT_TC1: Timer C - Ouput 1
mbed_official	381:5460fc57b6e4	2243	* @arg HRTIM_OUTPUT_TC2: Timer C - Ouput 2
mbed_official	381:5460fc57b6e4	2244	* @arg HRTIM_OUTPUT_TD1: Timer D - Ouput 1
mbed_official	381:5460fc57b6e4	2245	* @arg HRTIM_OUTPUT_TD2: Timer D - Ouput 2
mbed_official	381:5460fc57b6e4	2246	* @arg HRTIM_OUTPUT_TE1: Timer E - Ouput 1
mbed_official	381:5460fc57b6e4	2247	* @arg HRTIM_OUTPUT_TE2: Timer E - Ouput 2
mbed_official	381:5460fc57b6e4	2248	* @retval HAL status
mbed_official	381:5460fc57b6e4	2249	*/
mbed_official	381:5460fc57b6e4	2250	HAL_StatusTypeDef HAL_HRTIM_SimplePWMStop_DMA(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	2251	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	2252	uint32_t PWMChannel)
mbed_official	381:5460fc57b6e4	2253	{
mbed_official	381:5460fc57b6e4	2254	DMA_HandleTypeDef * hdma;
mbed_official	381:5460fc57b6e4	2255
mbed_official	381:5460fc57b6e4	2256	/* Check the parameters */
mbed_official	381:5460fc57b6e4	2257	assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel));
mbed_official	381:5460fc57b6e4	2258
mbed_official	381:5460fc57b6e4	2259	/* Process Locked */
mbed_official	381:5460fc57b6e4	2260	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	2261
mbed_official	381:5460fc57b6e4	2262	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	2263
mbed_official	381:5460fc57b6e4	2264	/* Disable the timer output */
mbed_official	381:5460fc57b6e4	2265	hhrtim->Instance->sCommonRegs.ODISR \|= PWMChannel;
mbed_official	381:5460fc57b6e4	2266
mbed_official	381:5460fc57b6e4	2267	/* Get the timer DMA handler */
mbed_official	381:5460fc57b6e4	2268	hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx);
mbed_official	381:5460fc57b6e4	2269
mbed_official	381:5460fc57b6e4	2270	/* Disable the DMA */
mbed_official	381:5460fc57b6e4	2271	HAL_DMA_Abort(hdma);
mbed_official	381:5460fc57b6e4	2272
mbed_official	381:5460fc57b6e4	2273	/* Disable the timer DMA request */
mbed_official	381:5460fc57b6e4	2274	switch (PWMChannel)
mbed_official	381:5460fc57b6e4	2275	{
mbed_official	381:5460fc57b6e4	2276	case HRTIM_OUTPUT_TA1:
mbed_official	381:5460fc57b6e4	2277	case HRTIM_OUTPUT_TB1:
mbed_official	381:5460fc57b6e4	2278	case HRTIM_OUTPUT_TC1:
mbed_official	381:5460fc57b6e4	2279	case HRTIM_OUTPUT_TD1:
mbed_official	381:5460fc57b6e4	2280	case HRTIM_OUTPUT_TE1:
mbed_official	381:5460fc57b6e4	2281	{
mbed_official	381:5460fc57b6e4	2282	__HAL_HRTIM_TIMER_DISABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_CMP1);
mbed_official	381:5460fc57b6e4	2283	}
mbed_official	381:5460fc57b6e4	2284	break;
mbed_official	381:5460fc57b6e4	2285	case HRTIM_OUTPUT_TA2:
mbed_official	381:5460fc57b6e4	2286	case HRTIM_OUTPUT_TB2:
mbed_official	381:5460fc57b6e4	2287	case HRTIM_OUTPUT_TC2:
mbed_official	381:5460fc57b6e4	2288	case HRTIM_OUTPUT_TD2:
mbed_official	381:5460fc57b6e4	2289	case HRTIM_OUTPUT_TE2:
mbed_official	381:5460fc57b6e4	2290	{
mbed_official	381:5460fc57b6e4	2291	__HAL_HRTIM_TIMER_DISABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_CMP2);
mbed_official	381:5460fc57b6e4	2292	}
mbed_official	381:5460fc57b6e4	2293	break;
mbed_official	381:5460fc57b6e4	2294	}
mbed_official	381:5460fc57b6e4	2295
mbed_official	381:5460fc57b6e4	2296	/* Disable the timer counter */
mbed_official	381:5460fc57b6e4	2297	__HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
mbed_official	381:5460fc57b6e4	2298
mbed_official	381:5460fc57b6e4	2299	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	2300
mbed_official	381:5460fc57b6e4	2301	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	2302	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	2303
mbed_official	381:5460fc57b6e4	2304	return HAL_OK;
mbed_official	381:5460fc57b6e4	2305	}
mbed_official	381:5460fc57b6e4	2306
mbed_official	381:5460fc57b6e4	2307	/**
mbed_official	381:5460fc57b6e4	2308	* @}
mbed_official	381:5460fc57b6e4	2309	*/
mbed_official	381:5460fc57b6e4	2310
mbed_official	381:5460fc57b6e4	2311	/** @defgroup HRTIM_Exported_Functions_Group5 Simple input capture functions
mbed_official	381:5460fc57b6e4	2312	* @brief When a HRTIM timer operates in simple input capture mode
mbed_official	381:5460fc57b6e4	2313	* the Capture Register (HRTIM_CPT1/2xR) is used to latch the
mbed_official	381:5460fc57b6e4	2314	* value of the timer counter counter after a transition detected
mbed_official	381:5460fc57b6e4	2315	* on a given external event input.
mbed_official	381:5460fc57b6e4	2316	*
mbed_official	381:5460fc57b6e4	2317	@verbatim
mbed_official	381:5460fc57b6e4	2318	===============================================================================
mbed_official	381:5460fc57b6e4	2319	##### Simple input capture functions #####
mbed_official	381:5460fc57b6e4	2320	===============================================================================
mbed_official	381:5460fc57b6e4	2321	[..] This section provides functions allowing to:
mbed_official	381:5460fc57b6e4	2322	(+) Configure simple input capture channel
mbed_official	381:5460fc57b6e4	2323	(+) Start simple input capture
mbed_official	381:5460fc57b6e4	2324	(+) Stop simple input capture
mbed_official	381:5460fc57b6e4	2325	(+) Start simple input capture and enable interrupt
mbed_official	381:5460fc57b6e4	2326	(+) Stop simple input capture and disable interrupt
mbed_official	381:5460fc57b6e4	2327	(+) Start simple input capture and enable DMA transfer
mbed_official	381:5460fc57b6e4	2328	(+) Stop simple input capture and disable DMA transfer
mbed_official	381:5460fc57b6e4	2329
mbed_official	381:5460fc57b6e4	2330	@endverbatim
mbed_official	381:5460fc57b6e4	2331	* @{
mbed_official	381:5460fc57b6e4	2332	*/
mbed_official	381:5460fc57b6e4	2333
mbed_official	381:5460fc57b6e4	2334	/**
mbed_official	381:5460fc57b6e4	2335	* @brief Configures a basic capture
mbed_official	381:5460fc57b6e4	2336	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	2337	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	2338	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	2339	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	2340	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	2341	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	2342	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	2343	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	2344	* @param CaptureChannel: Capture unit
mbed_official	381:5460fc57b6e4	2345	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	2346	* @arg HRTIM_CAPTUREUNIT_1: Capture unit 1
mbed_official	381:5460fc57b6e4	2347	* @arg HRTIM_CAPTUREUNIT_2: Capture unit 2
mbed_official	381:5460fc57b6e4	2348	* @param pSimpleCaptureChannelCfg: pointer to the basic capture configuration structure
mbed_official	381:5460fc57b6e4	2349	* @note When the timer operates in basic capture mode the capture is trigerred
mbed_official	381:5460fc57b6e4	2350	* by the designated external event and GPIO input is implicitely used as event source.
mbed_official	381:5460fc57b6e4	2351	* The cature can be triggered by a rising edge, a falling edge or both
mbed_official	381:5460fc57b6e4	2352	* edges on event channel.
mbed_official	381:5460fc57b6e4	2353	* @retval HAL status
mbed_official	381:5460fc57b6e4	2354	*/
mbed_official	381:5460fc57b6e4	2355	HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureChannelConfig(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	2356	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	2357	uint32_t CaptureChannel,
mbed_official	381:5460fc57b6e4	2358	HRTIM_SimpleCaptureChannelCfgTypeDef* pSimpleCaptureChannelCfg)
mbed_official	381:5460fc57b6e4	2359	{
mbed_official	381:5460fc57b6e4	2360	HRTIM_EventCfgTypeDef EventCfg;
mbed_official	381:5460fc57b6e4	2361
mbed_official	381:5460fc57b6e4	2362	/* Check parameters */
mbed_official	381:5460fc57b6e4	2363	assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
mbed_official	381:5460fc57b6e4	2364	assert_param(IS_HRTIM_CAPTUREUNIT(CaptureChannel));
mbed_official	381:5460fc57b6e4	2365	assert_param(IS_HRTIM_EVENT(pSimpleCaptureChannelCfg->Event));
mbed_official	381:5460fc57b6e4	2366	assert_param(IS_HRTIM_EVENTPOLARITY(pSimpleCaptureChannelCfg->EventSensitivity,
mbed_official	381:5460fc57b6e4	2367	pSimpleCaptureChannelCfg->EventPolarity));
mbed_official	381:5460fc57b6e4	2368	assert_param(IS_HRTIM_EVENTSENSITIVITY(pSimpleCaptureChannelCfg->EventSensitivity));
mbed_official	381:5460fc57b6e4	2369	assert_param(IS_HRTIM_EVENTFILTER(pSimpleCaptureChannelCfg->Event,
mbed_official	381:5460fc57b6e4	2370	pSimpleCaptureChannelCfg->EventFilter));
mbed_official	381:5460fc57b6e4	2371
mbed_official	381:5460fc57b6e4	2372	if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
mbed_official	381:5460fc57b6e4	2373	{
mbed_official	381:5460fc57b6e4	2374	return HAL_BUSY;
mbed_official	381:5460fc57b6e4	2375	}
mbed_official	381:5460fc57b6e4	2376
mbed_official	381:5460fc57b6e4	2377	/* Process Locked */
mbed_official	381:5460fc57b6e4	2378	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	2379
mbed_official	381:5460fc57b6e4	2380	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	2381
mbed_official	381:5460fc57b6e4	2382	/* Configure external event channel */
mbed_official	381:5460fc57b6e4	2383	EventCfg.FastMode = HRTIM_EVENTFASTMODE_DISABLE;
mbed_official	381:5460fc57b6e4	2384	EventCfg.Filter = pSimpleCaptureChannelCfg->EventFilter;
mbed_official	381:5460fc57b6e4	2385	EventCfg.Polarity = pSimpleCaptureChannelCfg->EventPolarity;
mbed_official	381:5460fc57b6e4	2386	EventCfg.Sensitivity = pSimpleCaptureChannelCfg->EventSensitivity;
mbed_official	381:5460fc57b6e4	2387	EventCfg.Source = HRTIM_EVENTSRC_1;
mbed_official	381:5460fc57b6e4	2388
mbed_official	381:5460fc57b6e4	2389	HRTIM_EventConfig(hhrtim,
mbed_official	381:5460fc57b6e4	2390	pSimpleCaptureChannelCfg->Event,
mbed_official	381:5460fc57b6e4	2391	&EventCfg);
mbed_official	381:5460fc57b6e4	2392
mbed_official	381:5460fc57b6e4	2393	/* Memorize capture trigger (will be configured when the capture is started */
mbed_official	381:5460fc57b6e4	2394	HRTIM_CaptureUnitConfig(hhrtim,
mbed_official	381:5460fc57b6e4	2395	TimerIdx,
mbed_official	381:5460fc57b6e4	2396	CaptureChannel,
mbed_official	381:5460fc57b6e4	2397	pSimpleCaptureChannelCfg->Event);
mbed_official	381:5460fc57b6e4	2398
mbed_official	381:5460fc57b6e4	2399	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	2400
mbed_official	381:5460fc57b6e4	2401	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	2402	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	2403
mbed_official	381:5460fc57b6e4	2404	return HAL_OK;
mbed_official	381:5460fc57b6e4	2405	}
mbed_official	381:5460fc57b6e4	2406
mbed_official	381:5460fc57b6e4	2407	/**
mbed_official	381:5460fc57b6e4	2408	* @brief Enables a basic capture on the designed capture unit
mbed_official	381:5460fc57b6e4	2409	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	2410	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	2411	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	2412	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	2413	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	2414	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	2415	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	2416	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	2417	* @param CaptureChannel: Timer output
mbed_official	381:5460fc57b6e4	2418	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	2419	* @arg HRTIM_CAPTUREUNIT_1: Capture unit 1
mbed_official	381:5460fc57b6e4	2420	* @arg HRTIM_CAPTUREUNIT_2: Capture unit 2
mbed_official	381:5460fc57b6e4	2421	* @retval HAL status
mbed_official	381:5460fc57b6e4	2422	* @note The external event triggering the capture is available for all timing
mbed_official	381:5460fc57b6e4	2423	* units. It can be used directly and is active as soon as the timing
mbed_official	381:5460fc57b6e4	2424	* unit counter is enabled.
mbed_official	381:5460fc57b6e4	2425	*/
mbed_official	381:5460fc57b6e4	2426	HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStart(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	2427	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	2428	uint32_t CaptureChannel)
mbed_official	381:5460fc57b6e4	2429	{
mbed_official	381:5460fc57b6e4	2430	/* Check the parameters */
mbed_official	381:5460fc57b6e4	2431	assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
mbed_official	381:5460fc57b6e4	2432	assert_param(IS_HRTIM_CAPTUREUNIT(CaptureChannel));
mbed_official	381:5460fc57b6e4	2433
mbed_official	381:5460fc57b6e4	2434	/* Process Locked */
mbed_official	381:5460fc57b6e4	2435	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	2436
mbed_official	381:5460fc57b6e4	2437	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	2438
mbed_official	381:5460fc57b6e4	2439	/* Set the capture unit trigger */
mbed_official	381:5460fc57b6e4	2440	switch (CaptureChannel)
mbed_official	381:5460fc57b6e4	2441	{
mbed_official	381:5460fc57b6e4	2442	case HRTIM_CAPTUREUNIT_1:
mbed_official	381:5460fc57b6e4	2443	{
mbed_official	381:5460fc57b6e4	2444	hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR = hhrtim->TimerParam[TimerIdx].CaptureTrigger1;
mbed_official	381:5460fc57b6e4	2445	}
mbed_official	381:5460fc57b6e4	2446	break;
mbed_official	381:5460fc57b6e4	2447	case HRTIM_CAPTUREUNIT_2:
mbed_official	381:5460fc57b6e4	2448	{
mbed_official	381:5460fc57b6e4	2449	hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR = hhrtim->TimerParam[TimerIdx].CaptureTrigger2;
mbed_official	381:5460fc57b6e4	2450	}
mbed_official	381:5460fc57b6e4	2451	break;
mbed_official	381:5460fc57b6e4	2452	}
mbed_official	381:5460fc57b6e4	2453
mbed_official	381:5460fc57b6e4	2454	/* Enable the timer counter */
mbed_official	381:5460fc57b6e4	2455	__HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
mbed_official	381:5460fc57b6e4	2456
mbed_official	381:5460fc57b6e4	2457	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	2458
mbed_official	381:5460fc57b6e4	2459	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	2460	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	2461
mbed_official	381:5460fc57b6e4	2462	return HAL_OK;
mbed_official	381:5460fc57b6e4	2463	}
mbed_official	381:5460fc57b6e4	2464
mbed_official	381:5460fc57b6e4	2465	/**
mbed_official	381:5460fc57b6e4	2466	* @brief Disables a basic capture on the designed capture unit
mbed_official	381:5460fc57b6e4	2467	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	2468	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	2469	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	2470	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	2471	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	2472	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	2473	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	2474	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	2475	* @param CaptureChannel: Timer output
mbed_official	381:5460fc57b6e4	2476	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	2477	* @arg HRTIM_CAPTUREUNIT_1: Capture unit 1
mbed_official	381:5460fc57b6e4	2478	* @arg HRTIM_CAPTUREUNIT_2: Capture unit 2
mbed_official	381:5460fc57b6e4	2479	* @retval HAL status
mbed_official	381:5460fc57b6e4	2480	*/
mbed_official	381:5460fc57b6e4	2481	HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStop(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	2482	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	2483	uint32_t CaptureChannel)
mbed_official	381:5460fc57b6e4	2484	{
mbed_official	381:5460fc57b6e4	2485	/* Check the parameters */
mbed_official	381:5460fc57b6e4	2486	assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
mbed_official	381:5460fc57b6e4	2487	assert_param(IS_HRTIM_CAPTUREUNIT(CaptureChannel));
mbed_official	381:5460fc57b6e4	2488
mbed_official	381:5460fc57b6e4	2489	/* Process Locked */
mbed_official	381:5460fc57b6e4	2490	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	2491
mbed_official	381:5460fc57b6e4	2492	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	2493
mbed_official	381:5460fc57b6e4	2494	/* Set the capture unit trigger */
mbed_official	381:5460fc57b6e4	2495	switch (CaptureChannel)
mbed_official	381:5460fc57b6e4	2496	{
mbed_official	381:5460fc57b6e4	2497	case HRTIM_CAPTUREUNIT_1:
mbed_official	381:5460fc57b6e4	2498	{
mbed_official	381:5460fc57b6e4	2499	hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR = HRTIM_CAPTURETRIGGER_NONE;
mbed_official	381:5460fc57b6e4	2500	}
mbed_official	381:5460fc57b6e4	2501	break;
mbed_official	381:5460fc57b6e4	2502	case HRTIM_CAPTUREUNIT_2:
mbed_official	381:5460fc57b6e4	2503	{
mbed_official	381:5460fc57b6e4	2504	hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR = HRTIM_CAPTURETRIGGER_NONE;
mbed_official	381:5460fc57b6e4	2505	}
mbed_official	381:5460fc57b6e4	2506	break;
mbed_official	381:5460fc57b6e4	2507	}
mbed_official	381:5460fc57b6e4	2508
mbed_official	381:5460fc57b6e4	2509	/* Disable the timer counter */
mbed_official	381:5460fc57b6e4	2510	if ((hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR == HRTIM_CAPTURETRIGGER_NONE) &&
mbed_official	381:5460fc57b6e4	2511	(hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR == HRTIM_CAPTURETRIGGER_NONE))
mbed_official	381:5460fc57b6e4	2512	{
mbed_official	381:5460fc57b6e4	2513	__HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
mbed_official	381:5460fc57b6e4	2514	}
mbed_official	381:5460fc57b6e4	2515
mbed_official	381:5460fc57b6e4	2516	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	2517
mbed_official	381:5460fc57b6e4	2518	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	2519	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	2520
mbed_official	381:5460fc57b6e4	2521	return HAL_OK;
mbed_official	381:5460fc57b6e4	2522	}
mbed_official	381:5460fc57b6e4	2523
mbed_official	381:5460fc57b6e4	2524	/**
mbed_official	381:5460fc57b6e4	2525	* @brief Enables a basic capture on the designed capture unit
mbed_official	381:5460fc57b6e4	2526	* Capture interrupt is enabled
mbed_official	381:5460fc57b6e4	2527	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	2528	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	2529	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	2530	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	2531	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	2532	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	2533	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	2534	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	2535	* @param CaptureChannel: Timer output
mbed_official	381:5460fc57b6e4	2536	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	2537	* @arg HRTIM_CAPTUREUNIT_1: Capture unit 1
mbed_official	381:5460fc57b6e4	2538	* @arg HRTIM_CAPTUREUNIT_2: Capture unit 2
mbed_official	381:5460fc57b6e4	2539	* @retval HAL status
mbed_official	381:5460fc57b6e4	2540	*/
mbed_official	381:5460fc57b6e4	2541	HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStart_IT(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	2542	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	2543	uint32_t CaptureChannel)
mbed_official	381:5460fc57b6e4	2544	{
mbed_official	381:5460fc57b6e4	2545	/* Check the parameters */
mbed_official	381:5460fc57b6e4	2546	assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
mbed_official	381:5460fc57b6e4	2547	assert_param(IS_HRTIM_CAPTUREUNIT(CaptureChannel));
mbed_official	381:5460fc57b6e4	2548
mbed_official	381:5460fc57b6e4	2549	/* Process Locked */
mbed_official	381:5460fc57b6e4	2550	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	2551
mbed_official	381:5460fc57b6e4	2552	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	2553
mbed_official	381:5460fc57b6e4	2554	/* Set the capture unit trigger */
mbed_official	381:5460fc57b6e4	2555	switch (CaptureChannel)
mbed_official	381:5460fc57b6e4	2556	{
mbed_official	381:5460fc57b6e4	2557	case HRTIM_CAPTUREUNIT_1:
mbed_official	381:5460fc57b6e4	2558	{
mbed_official	381:5460fc57b6e4	2559	hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR = hhrtim->TimerParam[TimerIdx].CaptureTrigger1;
mbed_official	381:5460fc57b6e4	2560
mbed_official	381:5460fc57b6e4	2561	/* Enable the capture unit 1 interrupt */
mbed_official	381:5460fc57b6e4	2562	__HAL_HRTIM_TIMER_ENABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CPT1);
mbed_official	381:5460fc57b6e4	2563	}
mbed_official	381:5460fc57b6e4	2564	break;
mbed_official	381:5460fc57b6e4	2565	case HRTIM_CAPTUREUNIT_2:
mbed_official	381:5460fc57b6e4	2566	{
mbed_official	381:5460fc57b6e4	2567	hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR = hhrtim->TimerParam[TimerIdx].CaptureTrigger2;
mbed_official	381:5460fc57b6e4	2568
mbed_official	381:5460fc57b6e4	2569	/* Enable the capture unit 2 interrupt */
mbed_official	381:5460fc57b6e4	2570	__HAL_HRTIM_TIMER_ENABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CPT2);
mbed_official	381:5460fc57b6e4	2571	}
mbed_official	381:5460fc57b6e4	2572	break;
mbed_official	381:5460fc57b6e4	2573	}
mbed_official	381:5460fc57b6e4	2574
mbed_official	381:5460fc57b6e4	2575	/* Enable the timer counter */
mbed_official	381:5460fc57b6e4	2576	__HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
mbed_official	381:5460fc57b6e4	2577
mbed_official	381:5460fc57b6e4	2578	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	2579
mbed_official	381:5460fc57b6e4	2580	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	2581	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	2582
mbed_official	381:5460fc57b6e4	2583	return HAL_OK;
mbed_official	381:5460fc57b6e4	2584	}
mbed_official	381:5460fc57b6e4	2585
mbed_official	381:5460fc57b6e4	2586	/**
mbed_official	381:5460fc57b6e4	2587	* @brief Disables a basic capture on the designed capture unit
mbed_official	381:5460fc57b6e4	2588	* Capture interrupt is disabled
mbed_official	381:5460fc57b6e4	2589	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	2590	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	2591	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	2592	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	2593	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	2594	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	2595	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	2596	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	2597	* @param CaptureChannel: Timer output
mbed_official	381:5460fc57b6e4	2598	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	2599	* @arg HRTIM_CAPTUREUNIT_1: Capture unit 1
mbed_official	381:5460fc57b6e4	2600	* @arg HRTIM_CAPTUREUNIT_2: Capture unit 2
mbed_official	381:5460fc57b6e4	2601	* @retval HAL status
mbed_official	381:5460fc57b6e4	2602	*/
mbed_official	381:5460fc57b6e4	2603	HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStop_IT(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	2604	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	2605	uint32_t CaptureChannel)
mbed_official	381:5460fc57b6e4	2606	{
mbed_official	381:5460fc57b6e4	2607	/* Check the parameters */
mbed_official	381:5460fc57b6e4	2608	assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
mbed_official	381:5460fc57b6e4	2609	assert_param(IS_HRTIM_CAPTUREUNIT(CaptureChannel));
mbed_official	381:5460fc57b6e4	2610
mbed_official	381:5460fc57b6e4	2611	/* Process Locked */
mbed_official	381:5460fc57b6e4	2612	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	2613
mbed_official	381:5460fc57b6e4	2614	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	2615
mbed_official	381:5460fc57b6e4	2616	/* Set the capture unit trigger */
mbed_official	381:5460fc57b6e4	2617	switch (CaptureChannel)
mbed_official	381:5460fc57b6e4	2618	{
mbed_official	381:5460fc57b6e4	2619	case HRTIM_CAPTUREUNIT_1:
mbed_official	381:5460fc57b6e4	2620	{
mbed_official	381:5460fc57b6e4	2621	hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR = HRTIM_CAPTURETRIGGER_NONE;
mbed_official	381:5460fc57b6e4	2622
mbed_official	381:5460fc57b6e4	2623	/* Disable the capture unit 1 interrupt */
mbed_official	381:5460fc57b6e4	2624	__HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CPT1);
mbed_official	381:5460fc57b6e4	2625	}
mbed_official	381:5460fc57b6e4	2626	break;
mbed_official	381:5460fc57b6e4	2627	case HRTIM_CAPTUREUNIT_2:
mbed_official	381:5460fc57b6e4	2628	{
mbed_official	381:5460fc57b6e4	2629	hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR = HRTIM_CAPTURETRIGGER_NONE;
mbed_official	381:5460fc57b6e4	2630
mbed_official	381:5460fc57b6e4	2631	/* Disable the capture unit 2 interrupt */
mbed_official	381:5460fc57b6e4	2632	__HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CPT2);
mbed_official	381:5460fc57b6e4	2633	}
mbed_official	381:5460fc57b6e4	2634	break;
mbed_official	381:5460fc57b6e4	2635	}
mbed_official	381:5460fc57b6e4	2636
mbed_official	381:5460fc57b6e4	2637	/* Disable the timer counter */
mbed_official	381:5460fc57b6e4	2638	if ((hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR == HRTIM_CAPTURETRIGGER_NONE) &&
mbed_official	381:5460fc57b6e4	2639	(hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR == HRTIM_CAPTURETRIGGER_NONE))
mbed_official	381:5460fc57b6e4	2640	{
mbed_official	381:5460fc57b6e4	2641	__HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
mbed_official	381:5460fc57b6e4	2642	}
mbed_official	381:5460fc57b6e4	2643
mbed_official	381:5460fc57b6e4	2644	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	2645
mbed_official	381:5460fc57b6e4	2646	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	2647	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	2648
mbed_official	381:5460fc57b6e4	2649	return HAL_OK;
mbed_official	381:5460fc57b6e4	2650	}
mbed_official	381:5460fc57b6e4	2651
mbed_official	381:5460fc57b6e4	2652	/**
mbed_official	381:5460fc57b6e4	2653	* @brief Enables a basic capture on the designed capture unit
mbed_official	381:5460fc57b6e4	2654	* Capture DMA request is enabled
mbed_official	381:5460fc57b6e4	2655	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	2656	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	2657	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	2658	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	2659	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	2660	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	2661	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	2662	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	2663	* @param CaptureChannel: Timer output
mbed_official	381:5460fc57b6e4	2664	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	2665	* @arg HRTIM_CAPTUREUNIT_1: Capture unit 1
mbed_official	381:5460fc57b6e4	2666	* @arg HRTIM_CAPTUREUNIT_2: Capture unit 2
mbed_official	381:5460fc57b6e4	2667	* @param SrcAddr: DMA transfer source address
mbed_official	381:5460fc57b6e4	2668	* @param DestAddr: DMA transfer destination address
mbed_official	381:5460fc57b6e4	2669	* @param Length: The length of data items (data size) to be transferred
mbed_official	381:5460fc57b6e4	2670	* from source to destination
mbed_official	381:5460fc57b6e4	2671	* @retval HAL status
mbed_official	381:5460fc57b6e4	2672	*/
mbed_official	381:5460fc57b6e4	2673	HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStart_DMA(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	2674	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	2675	uint32_t CaptureChannel,
mbed_official	381:5460fc57b6e4	2676	uint32_t SrcAddr,
mbed_official	381:5460fc57b6e4	2677	uint32_t DestAddr,
mbed_official	381:5460fc57b6e4	2678	uint32_t Length)
mbed_official	381:5460fc57b6e4	2679	{
mbed_official	381:5460fc57b6e4	2680	DMA_HandleTypeDef * hdma;
mbed_official	381:5460fc57b6e4	2681
mbed_official	381:5460fc57b6e4	2682	/* Check the parameters */
mbed_official	381:5460fc57b6e4	2683	assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
mbed_official	381:5460fc57b6e4	2684	assert_param(IS_HRTIM_CAPTUREUNIT(CaptureChannel));
mbed_official	381:5460fc57b6e4	2685
mbed_official	381:5460fc57b6e4	2686	/* Process Locked */
mbed_official	381:5460fc57b6e4	2687	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	2688
mbed_official	381:5460fc57b6e4	2689	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	2690
mbed_official	381:5460fc57b6e4	2691	/* Get the timer DMA handler */
mbed_official	381:5460fc57b6e4	2692	hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx);
mbed_official	381:5460fc57b6e4	2693
mbed_official	381:5460fc57b6e4	2694	/* Set the DMA error callback */
mbed_official	381:5460fc57b6e4	2695	hdma->XferErrorCallback = HRTIM_DMAError ;
mbed_official	381:5460fc57b6e4	2696
mbed_official	381:5460fc57b6e4	2697	/* Set the DMA transfer completed callback */
mbed_official	381:5460fc57b6e4	2698	hdma->XferCpltCallback = HRTIM_DMATimerxCplt;
mbed_official	381:5460fc57b6e4	2699
mbed_official	381:5460fc57b6e4	2700	/* Enable the DMA channel */
mbed_official	381:5460fc57b6e4	2701	HAL_DMA_Start_IT(hdma, SrcAddr, DestAddr, Length);
mbed_official	381:5460fc57b6e4	2702
mbed_official	381:5460fc57b6e4	2703	switch (CaptureChannel)
mbed_official	381:5460fc57b6e4	2704	{
mbed_official	381:5460fc57b6e4	2705	case HRTIM_CAPTUREUNIT_1:
mbed_official	381:5460fc57b6e4	2706	{
mbed_official	381:5460fc57b6e4	2707	/* Set the capture unit trigger */
mbed_official	381:5460fc57b6e4	2708	hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR = hhrtim->TimerParam[TimerIdx].CaptureTrigger1;
mbed_official	381:5460fc57b6e4	2709
mbed_official	381:5460fc57b6e4	2710	__HAL_HRTIM_TIMER_ENABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_CPT1);
mbed_official	381:5460fc57b6e4	2711	}
mbed_official	381:5460fc57b6e4	2712	break;
mbed_official	381:5460fc57b6e4	2713	case HRTIM_CAPTUREUNIT_2:
mbed_official	381:5460fc57b6e4	2714	{
mbed_official	381:5460fc57b6e4	2715	/* Set the capture unit trigger */
mbed_official	381:5460fc57b6e4	2716	hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR = hhrtim->TimerParam[TimerIdx].CaptureTrigger2;
mbed_official	381:5460fc57b6e4	2717
mbed_official	381:5460fc57b6e4	2718	/* Enable the timer DMA request */
mbed_official	381:5460fc57b6e4	2719	__HAL_HRTIM_TIMER_ENABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_CPT2);
mbed_official	381:5460fc57b6e4	2720	}
mbed_official	381:5460fc57b6e4	2721	break;
mbed_official	381:5460fc57b6e4	2722	}
mbed_official	381:5460fc57b6e4	2723
mbed_official	381:5460fc57b6e4	2724	/* Enable the timer counter */
mbed_official	381:5460fc57b6e4	2725	__HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
mbed_official	381:5460fc57b6e4	2726
mbed_official	381:5460fc57b6e4	2727	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	2728
mbed_official	381:5460fc57b6e4	2729	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	2730	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	2731
mbed_official	381:5460fc57b6e4	2732	return HAL_OK;
mbed_official	381:5460fc57b6e4	2733	}
mbed_official	381:5460fc57b6e4	2734
mbed_official	381:5460fc57b6e4	2735	/**
mbed_official	381:5460fc57b6e4	2736	* @brief Disables a basic capture on the designed capture unit
mbed_official	381:5460fc57b6e4	2737	* Capture DMA request is disabled
mbed_official	381:5460fc57b6e4	2738	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	2739	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	2740	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	2741	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	2742	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	2743	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	2744	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	2745	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	2746	* @param CaptureChannel: Timer output
mbed_official	381:5460fc57b6e4	2747	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	2748	* @arg HRTIM_CAPTUREUNIT_1: Capture unit 1
mbed_official	381:5460fc57b6e4	2749	* @arg HRTIM_CAPTUREUNIT_2: Capture unit 2
mbed_official	381:5460fc57b6e4	2750	* @retval HAL status
mbed_official	381:5460fc57b6e4	2751	*/
mbed_official	381:5460fc57b6e4	2752	HAL_StatusTypeDef HAL_HRTIM_SimpleCaptureStop_DMA(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	2753	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	2754	uint32_t CaptureChannel)
mbed_official	381:5460fc57b6e4	2755	{
mbed_official	381:5460fc57b6e4	2756	DMA_HandleTypeDef * hdma;
mbed_official	381:5460fc57b6e4	2757
mbed_official	381:5460fc57b6e4	2758	/* Check the parameters */
mbed_official	381:5460fc57b6e4	2759	assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
mbed_official	381:5460fc57b6e4	2760	assert_param(IS_HRTIM_CAPTUREUNIT(CaptureChannel));
mbed_official	381:5460fc57b6e4	2761
mbed_official	381:5460fc57b6e4	2762	/* Process Locked */
mbed_official	381:5460fc57b6e4	2763	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	2764
mbed_official	381:5460fc57b6e4	2765	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	2766
mbed_official	381:5460fc57b6e4	2767	/* Get the timer DMA handler */
mbed_official	381:5460fc57b6e4	2768	hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx);
mbed_official	381:5460fc57b6e4	2769
mbed_official	381:5460fc57b6e4	2770	/* Disable the DMA */
mbed_official	381:5460fc57b6e4	2771	HAL_DMA_Abort(hdma);
mbed_official	381:5460fc57b6e4	2772
mbed_official	381:5460fc57b6e4	2773	switch (CaptureChannel)
mbed_official	381:5460fc57b6e4	2774	{
mbed_official	381:5460fc57b6e4	2775	case HRTIM_CAPTUREUNIT_1:
mbed_official	381:5460fc57b6e4	2776	{
mbed_official	381:5460fc57b6e4	2777	/* Reset the capture unit trigger */
mbed_official	381:5460fc57b6e4	2778	hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR = HRTIM_CAPTURETRIGGER_NONE;
mbed_official	381:5460fc57b6e4	2779
mbed_official	381:5460fc57b6e4	2780	/* Disable the capture unit 1 DMA request */
mbed_official	381:5460fc57b6e4	2781	__HAL_HRTIM_TIMER_DISABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_CPT1);
mbed_official	381:5460fc57b6e4	2782	}
mbed_official	381:5460fc57b6e4	2783	break;
mbed_official	381:5460fc57b6e4	2784	case HRTIM_CAPTUREUNIT_2:
mbed_official	381:5460fc57b6e4	2785	{
mbed_official	381:5460fc57b6e4	2786	/* Reset the capture unit trigger */
mbed_official	381:5460fc57b6e4	2787	hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR = HRTIM_CAPTURETRIGGER_NONE;
mbed_official	381:5460fc57b6e4	2788
mbed_official	381:5460fc57b6e4	2789	/* Disable the capture unit 2 DMA request */
mbed_official	381:5460fc57b6e4	2790	__HAL_HRTIM_TIMER_DISABLE_DMA(hhrtim, TimerIdx, HRTIM_TIM_DMA_CPT2);
mbed_official	381:5460fc57b6e4	2791	}
mbed_official	381:5460fc57b6e4	2792	break;
mbed_official	381:5460fc57b6e4	2793	}
mbed_official	381:5460fc57b6e4	2794
mbed_official	381:5460fc57b6e4	2795	/* Disable the timer counter */
mbed_official	381:5460fc57b6e4	2796	if ((hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR == HRTIM_CAPTURETRIGGER_NONE) &&
mbed_official	381:5460fc57b6e4	2797	(hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR == HRTIM_CAPTURETRIGGER_NONE))
mbed_official	381:5460fc57b6e4	2798	{
mbed_official	381:5460fc57b6e4	2799	__HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
mbed_official	381:5460fc57b6e4	2800	}
mbed_official	381:5460fc57b6e4	2801
mbed_official	381:5460fc57b6e4	2802	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	2803
mbed_official	381:5460fc57b6e4	2804	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	2805	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	2806
mbed_official	381:5460fc57b6e4	2807	return HAL_OK;
mbed_official	381:5460fc57b6e4	2808	}
mbed_official	381:5460fc57b6e4	2809
mbed_official	381:5460fc57b6e4	2810	/**
mbed_official	381:5460fc57b6e4	2811	* @}
mbed_official	381:5460fc57b6e4	2812	*/
mbed_official	381:5460fc57b6e4	2813
mbed_official	381:5460fc57b6e4	2814	/** @defgroup HRTIM_Exported_Functions_Group6 Simple one pulse functions
mbed_official	381:5460fc57b6e4	2815	* @brief When a HRTIM timer operates in simple one pulse mode
mbed_official	381:5460fc57b6e4	2816	* the timer counter is started in response to transition detected
mbed_official	381:5460fc57b6e4	2817	* on a given external event input to generate a pulse with a
mbed_official	381:5460fc57b6e4	2818	* programmable length after a programmable delay.
mbed_official	381:5460fc57b6e4	2819	*
mbed_official	381:5460fc57b6e4	2820	@verbatim
mbed_official	381:5460fc57b6e4	2821	===============================================================================
mbed_official	381:5460fc57b6e4	2822	##### Simple one pulse functions #####
mbed_official	381:5460fc57b6e4	2823	===============================================================================
mbed_official	381:5460fc57b6e4	2824	[..] This section provides functions allowing to:
mbed_official	381:5460fc57b6e4	2825	(+) Configure one pulse channel
mbed_official	381:5460fc57b6e4	2826	(+) Start one pulse generation
mbed_official	381:5460fc57b6e4	2827	(+) Stop one pulse generation
mbed_official	381:5460fc57b6e4	2828	(+) Start one pulse generation and enable interrupt
mbed_official	381:5460fc57b6e4	2829	(+) Stop one pulse generation and disable interrupt
mbed_official	381:5460fc57b6e4	2830
mbed_official	381:5460fc57b6e4	2831	@endverbatim
mbed_official	381:5460fc57b6e4	2832	* @{
mbed_official	381:5460fc57b6e4	2833	*/
mbed_official	381:5460fc57b6e4	2834
mbed_official	381:5460fc57b6e4	2835	/**
mbed_official	381:5460fc57b6e4	2836	* @brief Configures an output basic one pulse mode
mbed_official	381:5460fc57b6e4	2837	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	2838	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	2839	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	2840	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	2841	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	2842	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	2843	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	2844	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	2845	* @param OnePulseChannel: Timer output
mbed_official	381:5460fc57b6e4	2846	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	2847	* @arg HRTIM_OUTPUT_TA1: Timer A - Ouput 1
mbed_official	381:5460fc57b6e4	2848	* @arg HRTIM_OUTPUT_TA2: Timer A - Ouput 2
mbed_official	381:5460fc57b6e4	2849	* @arg HRTIM_OUTPUT_TB1: Timer B - Ouput 1
mbed_official	381:5460fc57b6e4	2850	* @arg HRTIM_OUTPUT_TB2: Timer B - Ouput 2
mbed_official	381:5460fc57b6e4	2851	* @arg HRTIM_OUTPUT_TC1: Timer C - Ouput 1
mbed_official	381:5460fc57b6e4	2852	* @arg HRTIM_OUTPUT_TC2: Timer C - Ouput 2
mbed_official	381:5460fc57b6e4	2853	* @arg HRTIM_OUTPUT_TD1: Timer D - Ouput 1
mbed_official	381:5460fc57b6e4	2854	* @arg HRTIM_OUTPUT_TD2: Timer D - Ouput 2
mbed_official	381:5460fc57b6e4	2855	* @arg HRTIM_OUTPUT_TE1: Timer E - Ouput 1
mbed_official	381:5460fc57b6e4	2856	* @arg HRTIM_OUTPUT_TE2: Timer E - Ouput 2
mbed_official	381:5460fc57b6e4	2857	* @param pSimpleOnePulseChannelCfg: pointer to the basic one pulse output configuration structure
mbed_official	381:5460fc57b6e4	2858	* @note When the timer operates in basic one pulse mode:
mbed_official	381:5460fc57b6e4	2859	* the timer counter is implicitely started by the reset event,
mbed_official	381:5460fc57b6e4	2860	* the reset of the timer counter is triggered by the designated external event
mbed_official	381:5460fc57b6e4	2861	* GPIO input is implicitely used as event source,
mbed_official	381:5460fc57b6e4	2862	* Output 1 is implicitely controled by the compare unit 1,
mbed_official	381:5460fc57b6e4	2863	* Output 2 is implicitely controled by the compare unit 2.
mbed_official	381:5460fc57b6e4	2864	* Output Set/Reset crossbar is set as follows:
mbed_official	381:5460fc57b6e4	2865	* Ouput 1: SETx1R = CMP1, RSTx1R = PER
mbed_official	381:5460fc57b6e4	2866	* Output 2: SETx2R = CMP2, RST2R = PER
mbed_official	381:5460fc57b6e4	2867	* @retval HAL status
mbed_official	381:5460fc57b6e4	2868	* @note If HAL_HRTIM_SimpleOnePulseChannelConfig is called for both timer
mbed_official	381:5460fc57b6e4	2869	* outputs, the reset event related configuration data provided in the
mbed_official	381:5460fc57b6e4	2870	* second call will override the reset event related configuration data
mbed_official	381:5460fc57b6e4	2871	* provided in the first call.
mbed_official	381:5460fc57b6e4	2872	*/
mbed_official	381:5460fc57b6e4	2873	HAL_StatusTypeDef HAL_HRTIM_SimpleOnePulseChannelConfig(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	2874	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	2875	uint32_t OnePulseChannel,
mbed_official	381:5460fc57b6e4	2876	HRTIM_SimpleOnePulseChannelCfgTypeDef* pSimpleOnePulseChannelCfg)
mbed_official	381:5460fc57b6e4	2877	{
mbed_official	381:5460fc57b6e4	2878	uint32_t CompareUnit = 0xFFFFFFFF;
mbed_official	381:5460fc57b6e4	2879	HRTIM_CompareCfgTypeDef CompareCfg;
mbed_official	381:5460fc57b6e4	2880	HRTIM_OutputCfgTypeDef OutputCfg;
mbed_official	381:5460fc57b6e4	2881	HRTIM_EventCfgTypeDef EventCfg;
mbed_official	381:5460fc57b6e4	2882
mbed_official	381:5460fc57b6e4	2883	/* Check parameters */
mbed_official	381:5460fc57b6e4	2884	assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OnePulseChannel));
mbed_official	381:5460fc57b6e4	2885	assert_param(IS_HRTIM_OUTPUTPOLARITY(pSimpleOnePulseChannelCfg->OutputPolarity));
mbed_official	381:5460fc57b6e4	2886	assert_param(IS_HRTIM_OUTPUTIDLELEVEL(pSimpleOnePulseChannelCfg->OutputIdleLevel));
mbed_official	381:5460fc57b6e4	2887	assert_param(IS_HRTIM_EVENT(pSimpleOnePulseChannelCfg->Event));
mbed_official	381:5460fc57b6e4	2888	assert_param(IS_HRTIM_EVENTPOLARITY(pSimpleOnePulseChannelCfg->EventSensitivity,
mbed_official	381:5460fc57b6e4	2889	pSimpleOnePulseChannelCfg->EventPolarity));
mbed_official	381:5460fc57b6e4	2890	assert_param(IS_HRTIM_EVENTSENSITIVITY(pSimpleOnePulseChannelCfg->EventSensitivity));
mbed_official	381:5460fc57b6e4	2891	assert_param(IS_HRTIM_EVENTFILTER(pSimpleOnePulseChannelCfg->Event,
mbed_official	381:5460fc57b6e4	2892	pSimpleOnePulseChannelCfg->EventFilter));
mbed_official	381:5460fc57b6e4	2893
mbed_official	381:5460fc57b6e4	2894	if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
mbed_official	381:5460fc57b6e4	2895	{
mbed_official	381:5460fc57b6e4	2896	return HAL_BUSY;
mbed_official	381:5460fc57b6e4	2897	}
mbed_official	381:5460fc57b6e4	2898
mbed_official	381:5460fc57b6e4	2899	/* Process Locked */
mbed_official	381:5460fc57b6e4	2900	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	2901
mbed_official	381:5460fc57b6e4	2902	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	2903
mbed_official	381:5460fc57b6e4	2904	/* Configure timer compare unit */
mbed_official	381:5460fc57b6e4	2905	switch (OnePulseChannel)
mbed_official	381:5460fc57b6e4	2906	{
mbed_official	381:5460fc57b6e4	2907	case HRTIM_OUTPUT_TA1:
mbed_official	381:5460fc57b6e4	2908	case HRTIM_OUTPUT_TB1:
mbed_official	381:5460fc57b6e4	2909	case HRTIM_OUTPUT_TC1:
mbed_official	381:5460fc57b6e4	2910	case HRTIM_OUTPUT_TD1:
mbed_official	381:5460fc57b6e4	2911	case HRTIM_OUTPUT_TE1:
mbed_official	381:5460fc57b6e4	2912	{
mbed_official	381:5460fc57b6e4	2913	CompareUnit = HRTIM_COMPAREUNIT_1;
mbed_official	381:5460fc57b6e4	2914	}
mbed_official	381:5460fc57b6e4	2915	break;
mbed_official	381:5460fc57b6e4	2916	case HRTIM_OUTPUT_TA2:
mbed_official	381:5460fc57b6e4	2917	case HRTIM_OUTPUT_TB2:
mbed_official	381:5460fc57b6e4	2918	case HRTIM_OUTPUT_TC2:
mbed_official	381:5460fc57b6e4	2919	case HRTIM_OUTPUT_TD2:
mbed_official	381:5460fc57b6e4	2920	case HRTIM_OUTPUT_TE2:
mbed_official	381:5460fc57b6e4	2921	{
mbed_official	381:5460fc57b6e4	2922	CompareUnit = HRTIM_COMPAREUNIT_2;
mbed_official	381:5460fc57b6e4	2923	}
mbed_official	381:5460fc57b6e4	2924	break;
mbed_official	381:5460fc57b6e4	2925	}
mbed_official	381:5460fc57b6e4	2926
mbed_official	381:5460fc57b6e4	2927	CompareCfg.CompareValue = pSimpleOnePulseChannelCfg->Pulse;
mbed_official	381:5460fc57b6e4	2928	CompareCfg.AutoDelayedMode = HRTIM_AUTODELAYEDMODE_REGULAR;
mbed_official	381:5460fc57b6e4	2929	CompareCfg.AutoDelayedTimeout = 0;
mbed_official	381:5460fc57b6e4	2930
mbed_official	381:5460fc57b6e4	2931	HRTIM_CompareUnitConfig(hhrtim,
mbed_official	381:5460fc57b6e4	2932	TimerIdx,
mbed_official	381:5460fc57b6e4	2933	CompareUnit,
mbed_official	381:5460fc57b6e4	2934	&CompareCfg);
mbed_official	381:5460fc57b6e4	2935
mbed_official	381:5460fc57b6e4	2936	/* Configure timer output */
mbed_official	381:5460fc57b6e4	2937	OutputCfg.Polarity = pSimpleOnePulseChannelCfg->OutputPolarity;
mbed_official	381:5460fc57b6e4	2938	OutputCfg.IdleLevel = pSimpleOnePulseChannelCfg->OutputIdleLevel;
mbed_official	381:5460fc57b6e4	2939	OutputCfg.FaultLevel = HRTIM_OUTPUTFAULTLEVEL_NONE;
mbed_official	381:5460fc57b6e4	2940	OutputCfg.IdleMode = HRTIM_OUTPUTIDLEMODE_NONE;
mbed_official	381:5460fc57b6e4	2941	OutputCfg.ChopperModeEnable = HRTIM_OUTPUTCHOPPERMODE_DISABLED;
mbed_official	381:5460fc57b6e4	2942	OutputCfg.BurstModeEntryDelayed = HRTIM_OUTPUTBURSTMODEENTRY_REGULAR;
mbed_official	381:5460fc57b6e4	2943
mbed_official	381:5460fc57b6e4	2944	if (CompareUnit == HRTIM_COMPAREUNIT_1)
mbed_official	381:5460fc57b6e4	2945	{
mbed_official	381:5460fc57b6e4	2946	OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP1;
mbed_official	381:5460fc57b6e4	2947	}
mbed_official	381:5460fc57b6e4	2948	else
mbed_official	381:5460fc57b6e4	2949	{
mbed_official	381:5460fc57b6e4	2950	OutputCfg.SetSource = HRTIM_OUTPUTSET_TIMCMP2;
mbed_official	381:5460fc57b6e4	2951	}
mbed_official	381:5460fc57b6e4	2952	OutputCfg.ResetSource = HRTIM_OUTPUTSET_TIMPER;
mbed_official	381:5460fc57b6e4	2953
mbed_official	381:5460fc57b6e4	2954	HRTIM_OutputConfig(hhrtim,
mbed_official	381:5460fc57b6e4	2955	TimerIdx,
mbed_official	381:5460fc57b6e4	2956	OnePulseChannel,
mbed_official	381:5460fc57b6e4	2957	&OutputCfg);
mbed_official	381:5460fc57b6e4	2958
mbed_official	381:5460fc57b6e4	2959	/* Configure external event channel */
mbed_official	381:5460fc57b6e4	2960	EventCfg.FastMode = HRTIM_EVENTFASTMODE_DISABLE;
mbed_official	381:5460fc57b6e4	2961	EventCfg.Filter = pSimpleOnePulseChannelCfg->EventFilter;
mbed_official	381:5460fc57b6e4	2962	EventCfg.Polarity = pSimpleOnePulseChannelCfg->EventPolarity;
mbed_official	381:5460fc57b6e4	2963	EventCfg.Sensitivity = pSimpleOnePulseChannelCfg->EventSensitivity;
mbed_official	381:5460fc57b6e4	2964	EventCfg.Source = HRTIM_EVENTSRC_1;
mbed_official	381:5460fc57b6e4	2965
mbed_official	381:5460fc57b6e4	2966	HRTIM_EventConfig(hhrtim,
mbed_official	381:5460fc57b6e4	2967	pSimpleOnePulseChannelCfg->Event,
mbed_official	381:5460fc57b6e4	2968	&EventCfg);
mbed_official	381:5460fc57b6e4	2969
mbed_official	381:5460fc57b6e4	2970	/* Configure the timer reset register */
mbed_official	381:5460fc57b6e4	2971	HRTIM_TIM_ResetConfig(hhrtim,
mbed_official	381:5460fc57b6e4	2972	TimerIdx,
mbed_official	381:5460fc57b6e4	2973	pSimpleOnePulseChannelCfg->Event);
mbed_official	381:5460fc57b6e4	2974
mbed_official	381:5460fc57b6e4	2975	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	2976
mbed_official	381:5460fc57b6e4	2977	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	2978	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	2979
mbed_official	381:5460fc57b6e4	2980	return HAL_OK;
mbed_official	381:5460fc57b6e4	2981	}
mbed_official	381:5460fc57b6e4	2982
mbed_official	381:5460fc57b6e4	2983	/**
mbed_official	381:5460fc57b6e4	2984	* @brief Enables the basic one pulse signal generation on the designed output
mbed_official	381:5460fc57b6e4	2985	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	2986	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	2987	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	2988	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	2989	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	2990	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	2991	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	2992	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	2993	* @param OnePulseChannel: Timer output
mbed_official	381:5460fc57b6e4	2994	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	2995	* @arg HRTIM_OUTPUT_TA1: Timer A - Ouput 1
mbed_official	381:5460fc57b6e4	2996	* @arg HRTIM_OUTPUT_TA2: Timer A - Ouput 2
mbed_official	381:5460fc57b6e4	2997	* @arg HRTIM_OUTPUT_TB1: Timer B - Ouput 1
mbed_official	381:5460fc57b6e4	2998	* @arg HRTIM_OUTPUT_TB2: Timer B - Ouput 2
mbed_official	381:5460fc57b6e4	2999	* @arg HRTIM_OUTPUT_TC1: Timer C - Ouput 1
mbed_official	381:5460fc57b6e4	3000	* @arg HRTIM_OUTPUT_TC2: Timer C - Ouput 2
mbed_official	381:5460fc57b6e4	3001	* @arg HRTIM_OUTPUT_TD1: Timer D - Ouput 1
mbed_official	381:5460fc57b6e4	3002	* @arg HRTIM_OUTPUT_TD2: Timer D - Ouput 2
mbed_official	381:5460fc57b6e4	3003	* @arg HRTIM_OUTPUT_TE1: Timer E - Ouput 1
mbed_official	381:5460fc57b6e4	3004	* @arg HRTIM_OUTPUT_TE2: Timer E - Ouput 2
mbed_official	381:5460fc57b6e4	3005	* @retval HAL status
mbed_official	381:5460fc57b6e4	3006	*/
mbed_official	381:5460fc57b6e4	3007	HAL_StatusTypeDef HAL_HRTIM_SimpleOnePulseStart(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	3008	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	3009	uint32_t OnePulseChannel)
mbed_official	381:5460fc57b6e4	3010	{
mbed_official	381:5460fc57b6e4	3011	/* Check the parameters */
mbed_official	381:5460fc57b6e4	3012	assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OnePulseChannel));
mbed_official	381:5460fc57b6e4	3013
mbed_official	381:5460fc57b6e4	3014	/* Process Locked */
mbed_official	381:5460fc57b6e4	3015	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	3016
mbed_official	381:5460fc57b6e4	3017	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	3018
mbed_official	381:5460fc57b6e4	3019	/* Enable the timer output */
mbed_official	381:5460fc57b6e4	3020	hhrtim->Instance->sCommonRegs.OENR \|= OnePulseChannel;
mbed_official	381:5460fc57b6e4	3021
mbed_official	381:5460fc57b6e4	3022	/* Enable the timer counter */
mbed_official	381:5460fc57b6e4	3023	__HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
mbed_official	381:5460fc57b6e4	3024
mbed_official	381:5460fc57b6e4	3025	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	3026
mbed_official	381:5460fc57b6e4	3027	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	3028	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	3029
mbed_official	381:5460fc57b6e4	3030	return HAL_OK;
mbed_official	381:5460fc57b6e4	3031	}
mbed_official	381:5460fc57b6e4	3032
mbed_official	381:5460fc57b6e4	3033	/**
mbed_official	381:5460fc57b6e4	3034	* @brief Disables the basic one pulse signal generation on the designed output
mbed_official	381:5460fc57b6e4	3035	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	3036	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	3037	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	3038	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	3039	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	3040	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	3041	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	3042	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	3043	* @param OnePulseChannel: Timer output
mbed_official	381:5460fc57b6e4	3044	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	3045	* @arg HRTIM_OUTPUT_TA1: Timer A - Ouput 1
mbed_official	381:5460fc57b6e4	3046	* @arg HRTIM_OUTPUT_TA2: Timer A - Ouput 2
mbed_official	381:5460fc57b6e4	3047	* @arg HRTIM_OUTPUT_TB1: Timer B - Ouput 1
mbed_official	381:5460fc57b6e4	3048	* @arg HRTIM_OUTPUT_TB2: Timer B - Ouput 2
mbed_official	381:5460fc57b6e4	3049	* @arg HRTIM_OUTPUT_TC1: Timer C - Ouput 1
mbed_official	381:5460fc57b6e4	3050	* @arg HRTIM_OUTPUT_TC2: Timer C - Ouput 2
mbed_official	381:5460fc57b6e4	3051	* @arg HRTIM_OUTPUT_TD1: Timer D - Ouput 1
mbed_official	381:5460fc57b6e4	3052	* @arg HRTIM_OUTPUT_TD2: Timer D - Ouput 2
mbed_official	381:5460fc57b6e4	3053	* @arg HRTIM_OUTPUT_TE1: Timer E - Ouput 1
mbed_official	381:5460fc57b6e4	3054	* @arg HRTIM_OUTPUT_TE2: Timer E - Ouput 2
mbed_official	381:5460fc57b6e4	3055	* @retval HAL status
mbed_official	381:5460fc57b6e4	3056	*/
mbed_official	381:5460fc57b6e4	3057	HAL_StatusTypeDef HAL_HRTIM_SimpleOnePulseStop(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	3058	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	3059	uint32_t OnePulseChannel)
mbed_official	381:5460fc57b6e4	3060	{
mbed_official	381:5460fc57b6e4	3061	/* Check the parameters */
mbed_official	381:5460fc57b6e4	3062	assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OnePulseChannel));
mbed_official	381:5460fc57b6e4	3063
mbed_official	381:5460fc57b6e4	3064	/* Process Locked */
mbed_official	381:5460fc57b6e4	3065	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	3066
mbed_official	381:5460fc57b6e4	3067	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	3068
mbed_official	381:5460fc57b6e4	3069	/* Disable the timer output */
mbed_official	381:5460fc57b6e4	3070	hhrtim->Instance->sCommonRegs.ODISR \|= OnePulseChannel;
mbed_official	381:5460fc57b6e4	3071
mbed_official	381:5460fc57b6e4	3072	/* Disable the timer counter */
mbed_official	381:5460fc57b6e4	3073	__HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
mbed_official	381:5460fc57b6e4	3074
mbed_official	381:5460fc57b6e4	3075	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	3076
mbed_official	381:5460fc57b6e4	3077	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	3078	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	3079
mbed_official	381:5460fc57b6e4	3080	return HAL_OK;
mbed_official	381:5460fc57b6e4	3081	}
mbed_official	381:5460fc57b6e4	3082
mbed_official	381:5460fc57b6e4	3083	/**
mbed_official	381:5460fc57b6e4	3084	* @brief Enables the basic one pulse signal generation on the designed output
mbed_official	381:5460fc57b6e4	3085	* The compare interrupt is enabled (pulse start)
mbed_official	381:5460fc57b6e4	3086	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	3087	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	3088	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	3089	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	3090	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	3091	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	3092	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	3093	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	3094	* @param OnePulseChannel: Timer output
mbed_official	381:5460fc57b6e4	3095	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	3096	* @arg HRTIM_OUTPUT_TA1: Timer A - Ouput 1
mbed_official	381:5460fc57b6e4	3097	* @arg HRTIM_OUTPUT_TA2: Timer A - Ouput 2
mbed_official	381:5460fc57b6e4	3098	* @arg HRTIM_OUTPUT_TB1: Timer B - Ouput 1
mbed_official	381:5460fc57b6e4	3099	* @arg HRTIM_OUTPUT_TB2: Timer B - Ouput 2
mbed_official	381:5460fc57b6e4	3100	* @arg HRTIM_OUTPUT_TC1: Timer C - Ouput 1
mbed_official	381:5460fc57b6e4	3101	* @arg HRTIM_OUTPUT_TC2: Timer C - Ouput 2
mbed_official	381:5460fc57b6e4	3102	* @arg HRTIM_OUTPUT_TD1: Timer D - Ouput 1
mbed_official	381:5460fc57b6e4	3103	* @arg HRTIM_OUTPUT_TD2: Timer D - Ouput 2
mbed_official	381:5460fc57b6e4	3104	* @arg HRTIM_OUTPUT_TE1: Timer E - Ouput 1
mbed_official	381:5460fc57b6e4	3105	* @arg HRTIM_OUTPUT_TE2: Timer E - Ouput 2
mbed_official	381:5460fc57b6e4	3106	* @retval HAL status
mbed_official	381:5460fc57b6e4	3107	*/
mbed_official	381:5460fc57b6e4	3108	HAL_StatusTypeDef HAL_HRTIM_SimpleOnePulseStart_IT(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	3109	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	3110	uint32_t OnePulseChannel)
mbed_official	381:5460fc57b6e4	3111	{
mbed_official	381:5460fc57b6e4	3112	/* Check the parameters */
mbed_official	381:5460fc57b6e4	3113	assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OnePulseChannel));
mbed_official	381:5460fc57b6e4	3114
mbed_official	381:5460fc57b6e4	3115	/* Process Locked */
mbed_official	381:5460fc57b6e4	3116	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	3117
mbed_official	381:5460fc57b6e4	3118	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	3119
mbed_official	381:5460fc57b6e4	3120	/* Enable the timer output */
mbed_official	381:5460fc57b6e4	3121	hhrtim->Instance->sCommonRegs.OENR \|= OnePulseChannel;
mbed_official	381:5460fc57b6e4	3122
mbed_official	381:5460fc57b6e4	3123	/* Enable the timer interrupt (depends on the OnePulse output) */
mbed_official	381:5460fc57b6e4	3124	switch (OnePulseChannel)
mbed_official	381:5460fc57b6e4	3125	{
mbed_official	381:5460fc57b6e4	3126	case HRTIM_OUTPUT_TA1:
mbed_official	381:5460fc57b6e4	3127	case HRTIM_OUTPUT_TB1:
mbed_official	381:5460fc57b6e4	3128	case HRTIM_OUTPUT_TC1:
mbed_official	381:5460fc57b6e4	3129	case HRTIM_OUTPUT_TD1:
mbed_official	381:5460fc57b6e4	3130	case HRTIM_OUTPUT_TE1:
mbed_official	381:5460fc57b6e4	3131	{
mbed_official	381:5460fc57b6e4	3132	__HAL_HRTIM_TIMER_ENABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP1);
mbed_official	381:5460fc57b6e4	3133	}
mbed_official	381:5460fc57b6e4	3134	break;
mbed_official	381:5460fc57b6e4	3135	case HRTIM_OUTPUT_TA2:
mbed_official	381:5460fc57b6e4	3136	case HRTIM_OUTPUT_TB2:
mbed_official	381:5460fc57b6e4	3137	case HRTIM_OUTPUT_TC2:
mbed_official	381:5460fc57b6e4	3138	case HRTIM_OUTPUT_TD2:
mbed_official	381:5460fc57b6e4	3139	case HRTIM_OUTPUT_TE2:
mbed_official	381:5460fc57b6e4	3140	{
mbed_official	381:5460fc57b6e4	3141	__HAL_HRTIM_TIMER_ENABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP2);
mbed_official	381:5460fc57b6e4	3142	}
mbed_official	381:5460fc57b6e4	3143	break;
mbed_official	381:5460fc57b6e4	3144	}
mbed_official	381:5460fc57b6e4	3145
mbed_official	381:5460fc57b6e4	3146	/* Enable the timer counter */
mbed_official	381:5460fc57b6e4	3147	__HAL_HRTIM_ENABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
mbed_official	381:5460fc57b6e4	3148
mbed_official	381:5460fc57b6e4	3149	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	3150
mbed_official	381:5460fc57b6e4	3151	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	3152	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	3153
mbed_official	381:5460fc57b6e4	3154	return HAL_OK;
mbed_official	381:5460fc57b6e4	3155	}
mbed_official	381:5460fc57b6e4	3156
mbed_official	381:5460fc57b6e4	3157	/**
mbed_official	381:5460fc57b6e4	3158	* @brief Disables the basic one pulse signal generation on the designed output
mbed_official	381:5460fc57b6e4	3159	* The compare interrupt is disabled
mbed_official	381:5460fc57b6e4	3160	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	3161	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	3162	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	3163	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	3164	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	3165	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	3166	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	3167	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	3168	* @param OnePulseChannel: Timer output
mbed_official	381:5460fc57b6e4	3169	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	3170	* @arg HRTIM_OUTPUT_TA1: Timer A - Ouput 1
mbed_official	381:5460fc57b6e4	3171	* @arg HRTIM_OUTPUT_TA2: Timer A - Ouput 2
mbed_official	381:5460fc57b6e4	3172	* @arg HRTIM_OUTPUT_TB1: Timer B - Ouput 1
mbed_official	381:5460fc57b6e4	3173	* @arg HRTIM_OUTPUT_TB2: Timer B - Ouput 2
mbed_official	381:5460fc57b6e4	3174	* @arg HRTIM_OUTPUT_TC1: Timer C - Ouput 1
mbed_official	381:5460fc57b6e4	3175	* @arg HRTIM_OUTPUT_TC2: Timer C - Ouput 2
mbed_official	381:5460fc57b6e4	3176	* @arg HRTIM_OUTPUT_TD1: Timer D - Ouput 1
mbed_official	381:5460fc57b6e4	3177	* @arg HRTIM_OUTPUT_TD2: Timer D - Ouput 2
mbed_official	381:5460fc57b6e4	3178	* @arg HRTIM_OUTPUT_TE1: Timer E - Ouput 1
mbed_official	381:5460fc57b6e4	3179	* @arg HRTIM_OUTPUT_TE2: Timer E - Ouput 2
mbed_official	381:5460fc57b6e4	3180	* @retval HAL status
mbed_official	381:5460fc57b6e4	3181	*/
mbed_official	381:5460fc57b6e4	3182	HAL_StatusTypeDef HAL_HRTIM_SimpleOnePulseStop_IT(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	3183	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	3184	uint32_t OnePulseChannel)
mbed_official	381:5460fc57b6e4	3185	{
mbed_official	381:5460fc57b6e4	3186	/* Check the parameters */
mbed_official	381:5460fc57b6e4	3187	assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OnePulseChannel));
mbed_official	381:5460fc57b6e4	3188
mbed_official	381:5460fc57b6e4	3189	/* Process Locked */
mbed_official	381:5460fc57b6e4	3190	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	3191
mbed_official	381:5460fc57b6e4	3192	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	3193
mbed_official	381:5460fc57b6e4	3194	/* Disable the timer output */
mbed_official	381:5460fc57b6e4	3195	hhrtim->Instance->sCommonRegs.ODISR \|= OnePulseChannel;
mbed_official	381:5460fc57b6e4	3196
mbed_official	381:5460fc57b6e4	3197	/* Disable the timer interrupt (depends on the OnePulse output) */
mbed_official	381:5460fc57b6e4	3198	switch (OnePulseChannel)
mbed_official	381:5460fc57b6e4	3199	{
mbed_official	381:5460fc57b6e4	3200	case HRTIM_OUTPUT_TA1:
mbed_official	381:5460fc57b6e4	3201	case HRTIM_OUTPUT_TB1:
mbed_official	381:5460fc57b6e4	3202	case HRTIM_OUTPUT_TC1:
mbed_official	381:5460fc57b6e4	3203	case HRTIM_OUTPUT_TD1:
mbed_official	381:5460fc57b6e4	3204	case HRTIM_OUTPUT_TE1:
mbed_official	381:5460fc57b6e4	3205	{
mbed_official	381:5460fc57b6e4	3206	__HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP1);
mbed_official	381:5460fc57b6e4	3207	}
mbed_official	381:5460fc57b6e4	3208	break;
mbed_official	381:5460fc57b6e4	3209	case HRTIM_OUTPUT_TA2:
mbed_official	381:5460fc57b6e4	3210	case HRTIM_OUTPUT_TB2:
mbed_official	381:5460fc57b6e4	3211	case HRTIM_OUTPUT_TC2:
mbed_official	381:5460fc57b6e4	3212	case HRTIM_OUTPUT_TD2:
mbed_official	381:5460fc57b6e4	3213	case HRTIM_OUTPUT_TE2:
mbed_official	381:5460fc57b6e4	3214	{
mbed_official	381:5460fc57b6e4	3215	__HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP2);
mbed_official	381:5460fc57b6e4	3216	}
mbed_official	381:5460fc57b6e4	3217	break;
mbed_official	381:5460fc57b6e4	3218	}
mbed_official	381:5460fc57b6e4	3219
mbed_official	381:5460fc57b6e4	3220	/* Disable the timer counter */
mbed_official	381:5460fc57b6e4	3221	__HAL_HRTIM_DISABLE(hhrtim, TimerIdxToTimerId[TimerIdx]);
mbed_official	381:5460fc57b6e4	3222
mbed_official	381:5460fc57b6e4	3223	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	3224
mbed_official	381:5460fc57b6e4	3225	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	3226	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	3227
mbed_official	381:5460fc57b6e4	3228	return HAL_OK;
mbed_official	381:5460fc57b6e4	3229	}
mbed_official	381:5460fc57b6e4	3230
mbed_official	381:5460fc57b6e4	3231	/**
mbed_official	381:5460fc57b6e4	3232	* @}
mbed_official	381:5460fc57b6e4	3233	*/
mbed_official	381:5460fc57b6e4	3234
mbed_official	381:5460fc57b6e4	3235	/** @defgroup HRTIM_Exported_Functions_Group7 Configuration functions
mbed_official	381:5460fc57b6e4	3236	* @brief Functions configuring the HRTIM resources shared by all the
mbed_official	381:5460fc57b6e4	3237	* HRTIM timers operating in waveform mode.
mbed_official	381:5460fc57b6e4	3238	*
mbed_official	381:5460fc57b6e4	3239	@verbatim
mbed_official	381:5460fc57b6e4	3240	===============================================================================
mbed_official	381:5460fc57b6e4	3241	##### HRTIM configuration functions #####
mbed_official	381:5460fc57b6e4	3242	===============================================================================
mbed_official	381:5460fc57b6e4	3243	[..] This section provides functions allowing to:
mbed_official	381:5460fc57b6e4	3244	(+) Configure the burst mode controller
mbed_official	381:5460fc57b6e4	3245	(+) Configure an external event conditionning
mbed_official	381:5460fc57b6e4	3246	(+) Configure the external events sampling clock
mbed_official	381:5460fc57b6e4	3247	(+) Configure a fault conditionning
mbed_official	381:5460fc57b6e4	3248	(+) Enable or disable fault inputs
mbed_official	381:5460fc57b6e4	3249	(+) Configure the faults sampling clock
mbed_official	381:5460fc57b6e4	3250	(+) Configure an ADC trigger
mbed_official	381:5460fc57b6e4	3251
mbed_official	381:5460fc57b6e4	3252	@endverbatim
mbed_official	381:5460fc57b6e4	3253	* @{
mbed_official	381:5460fc57b6e4	3254	*/
mbed_official	381:5460fc57b6e4	3255
mbed_official	381:5460fc57b6e4	3256	/**
mbed_official	381:5460fc57b6e4	3257	* @brief Configures the burst mode feature of the HRTIM
mbed_official	381:5460fc57b6e4	3258	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	3259	* @param pBurstModeCfg: pointer to the burst mode configuration structure
mbed_official	381:5460fc57b6e4	3260	* @retval HAL status
mbed_official	381:5460fc57b6e4	3261	* @note This function must be called before starting the burst mode
mbed_official	381:5460fc57b6e4	3262	* controller
mbed_official	381:5460fc57b6e4	3263	*/
mbed_official	381:5460fc57b6e4	3264	HAL_StatusTypeDef HAL_HRTIM_BurstModeConfig(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	3265	HRTIM_BurstModeCfgTypeDef* pBurstModeCfg)
mbed_official	381:5460fc57b6e4	3266	{
mbed_official	381:5460fc57b6e4	3267	uint32_t hrtim_bmcr;
mbed_official	381:5460fc57b6e4	3268
mbed_official	381:5460fc57b6e4	3269	/* Check parameters */
mbed_official	381:5460fc57b6e4	3270	assert_param(IS_HRTIM_BURSTMODE(pBurstModeCfg->Mode));
mbed_official	381:5460fc57b6e4	3271	assert_param(IS_HRTIM_BURSTMODECLOCKSOURCE(pBurstModeCfg->ClockSource));
mbed_official	381:5460fc57b6e4	3272	assert_param(IS_HRTIM_HRTIM_BURSTMODEPRESCALER(pBurstModeCfg->Prescaler));
mbed_official	381:5460fc57b6e4	3273	assert_param(IS_HRTIM_BURSTMODEPRELOAD(pBurstModeCfg->PreloadEnable));
mbed_official	381:5460fc57b6e4	3274
mbed_official	381:5460fc57b6e4	3275	if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
mbed_official	381:5460fc57b6e4	3276	{
mbed_official	381:5460fc57b6e4	3277	return HAL_BUSY;
mbed_official	381:5460fc57b6e4	3278	}
mbed_official	381:5460fc57b6e4	3279
mbed_official	381:5460fc57b6e4	3280	/* Process Locked */
mbed_official	381:5460fc57b6e4	3281	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	3282
mbed_official	381:5460fc57b6e4	3283	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	3284
mbed_official	381:5460fc57b6e4	3285	hrtim_bmcr = hhrtim->Instance->sCommonRegs.BMCR;
mbed_official	381:5460fc57b6e4	3286
mbed_official	381:5460fc57b6e4	3287	/* Set the burst mode operating mode */
mbed_official	381:5460fc57b6e4	3288	hrtim_bmcr &= ~(HRTIM_BMCR_BMOM);
mbed_official	381:5460fc57b6e4	3289	hrtim_bmcr \|= pBurstModeCfg->Mode;
mbed_official	381:5460fc57b6e4	3290
mbed_official	381:5460fc57b6e4	3291	/* Set the burst mode clock source */
mbed_official	381:5460fc57b6e4	3292	hrtim_bmcr &= ~(HRTIM_BMCR_BMCLK);
mbed_official	381:5460fc57b6e4	3293	hrtim_bmcr \|= pBurstModeCfg->ClockSource;
mbed_official	381:5460fc57b6e4	3294
mbed_official	381:5460fc57b6e4	3295	/* Set the burst mode prescaler */
mbed_official	381:5460fc57b6e4	3296	hrtim_bmcr &= ~(HRTIM_BMCR_BMPRSC);
mbed_official	381:5460fc57b6e4	3297	hrtim_bmcr \|= pBurstModeCfg->Prescaler;
mbed_official	381:5460fc57b6e4	3298
mbed_official	381:5460fc57b6e4	3299	/* Enable/disable burst mode registers preload */
mbed_official	381:5460fc57b6e4	3300	hrtim_bmcr &= ~(HRTIM_BMCR_BMPREN);
mbed_official	381:5460fc57b6e4	3301	hrtim_bmcr \|= pBurstModeCfg->PreloadEnable;
mbed_official	381:5460fc57b6e4	3302
mbed_official	381:5460fc57b6e4	3303	/* Set the burst mode trigger */
mbed_official	381:5460fc57b6e4	3304	hhrtim->Instance->sCommonRegs.BMTRGR = pBurstModeCfg->Trigger;
mbed_official	381:5460fc57b6e4	3305
mbed_official	381:5460fc57b6e4	3306	/* Set the burst mode compare value */
mbed_official	381:5460fc57b6e4	3307	hhrtim->Instance->sCommonRegs.BMCMPR = pBurstModeCfg->IdleDuration;
mbed_official	381:5460fc57b6e4	3308
mbed_official	381:5460fc57b6e4	3309	/* Set the burst mode period */
mbed_official	381:5460fc57b6e4	3310	hhrtim->Instance->sCommonRegs.BMPER = pBurstModeCfg->Period;
mbed_official	381:5460fc57b6e4	3311
mbed_official	381:5460fc57b6e4	3312	/* Update the HRTIM registers */
mbed_official	381:5460fc57b6e4	3313	hhrtim->Instance->sCommonRegs.BMCR = hrtim_bmcr;
mbed_official	381:5460fc57b6e4	3314
mbed_official	381:5460fc57b6e4	3315	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	3316
mbed_official	381:5460fc57b6e4	3317	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	3318	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	3319
mbed_official	381:5460fc57b6e4	3320	return HAL_OK;
mbed_official	381:5460fc57b6e4	3321	}
mbed_official	381:5460fc57b6e4	3322
mbed_official	381:5460fc57b6e4	3323	/**
mbed_official	381:5460fc57b6e4	3324	* @brief Configures the conditioning of an external event
mbed_official	381:5460fc57b6e4	3325	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	3326	* @param Event: external event to configure
mbed_official	381:5460fc57b6e4	3327	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	3328	* @arg HRTIM_EVENT_1: External event 1
mbed_official	381:5460fc57b6e4	3329	* @arg HRTIM_EVENT_2: External event 2
mbed_official	381:5460fc57b6e4	3330	* @arg HRTIM_EVENT_3: External event 3
mbed_official	381:5460fc57b6e4	3331	* @arg HRTIM_EVENT_4: External event 4
mbed_official	381:5460fc57b6e4	3332	* @arg HRTIM_EVENT_5: External event 5
mbed_official	381:5460fc57b6e4	3333	* @arg HRTIM_EVENT_6: External event 6
mbed_official	381:5460fc57b6e4	3334	* @arg HRTIM_EVENT_7: External event 7
mbed_official	381:5460fc57b6e4	3335	* @arg HRTIM_EVENT_8: External event 8
mbed_official	381:5460fc57b6e4	3336	* @arg HRTIM_EVENT_9: External event 9
mbed_official	381:5460fc57b6e4	3337	* @arg HRTIM_EVENT_10: External event 10
mbed_official	381:5460fc57b6e4	3338	* @param pEventCfg: pointer to the event conditioning configuration structure
mbed_official	381:5460fc57b6e4	3339	* @note This function must be called before starting the timer
mbed_official	381:5460fc57b6e4	3340	* @retval HAL status
mbed_official	381:5460fc57b6e4	3341	*/
mbed_official	381:5460fc57b6e4	3342	HAL_StatusTypeDef HAL_HRTIM_EventConfig(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	3343	uint32_t Event,
mbed_official	381:5460fc57b6e4	3344	HRTIM_EventCfgTypeDef* pEventCfg)
mbed_official	381:5460fc57b6e4	3345	{
mbed_official	381:5460fc57b6e4	3346	/* Check parameters */
mbed_official	381:5460fc57b6e4	3347	assert_param(IS_HRTIM_EVENTSRC(pEventCfg->Source));
mbed_official	381:5460fc57b6e4	3348	assert_param(IS_HRTIM_EVENTPOLARITY(pEventCfg->Sensitivity, pEventCfg->Polarity));
mbed_official	381:5460fc57b6e4	3349	assert_param(IS_HRTIM_EVENTSENSITIVITY(pEventCfg->Sensitivity));
mbed_official	381:5460fc57b6e4	3350	assert_param(IS_HRTIM_EVENTFASTMODE(Event, pEventCfg->FastMode));
mbed_official	381:5460fc57b6e4	3351	assert_param(IS_HRTIM_EVENTFILTER(Event, pEventCfg->Filter));
mbed_official	381:5460fc57b6e4	3352
mbed_official	381:5460fc57b6e4	3353	if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
mbed_official	381:5460fc57b6e4	3354	{
mbed_official	381:5460fc57b6e4	3355	return HAL_BUSY;
mbed_official	381:5460fc57b6e4	3356	}
mbed_official	381:5460fc57b6e4	3357
mbed_official	381:5460fc57b6e4	3358	/* Process Locked */
mbed_official	381:5460fc57b6e4	3359	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	3360
mbed_official	381:5460fc57b6e4	3361	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	3362
mbed_official	381:5460fc57b6e4	3363	/* Configure the event channel */
mbed_official	381:5460fc57b6e4	3364	HRTIM_EventConfig(hhrtim, Event, pEventCfg);
mbed_official	381:5460fc57b6e4	3365
mbed_official	381:5460fc57b6e4	3366	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	3367
mbed_official	381:5460fc57b6e4	3368	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	3369	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	3370
mbed_official	381:5460fc57b6e4	3371	return HAL_OK;
mbed_official	381:5460fc57b6e4	3372	}
mbed_official	381:5460fc57b6e4	3373
mbed_official	381:5460fc57b6e4	3374	/**
mbed_official	381:5460fc57b6e4	3375	* @brief Configures the external event conditioning block prescaler
mbed_official	381:5460fc57b6e4	3376	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	3377	* @param Prescaler: Prescaler value
mbed_official	381:5460fc57b6e4	3378	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	3379	* @arg HRTIM_EVENTPRESCALER_DIV1: fEEVS=fHRTIM
mbed_official	381:5460fc57b6e4	3380	* @arg HRTIM_EVENTPRESCALER_DIV2: fEEVS=fHRTIM / 2
mbed_official	381:5460fc57b6e4	3381	* @arg HRTIM_EVENTPRESCALER_DIV4: fEEVS=fHRTIM / 4
mbed_official	381:5460fc57b6e4	3382	* @arg HRTIM_EVENTPRESCALER_DIV8: fEEVS=fHRTIM / 8
mbed_official	381:5460fc57b6e4	3383	* @note This function must be called before starting the timer
mbed_official	381:5460fc57b6e4	3384	* @retval HAL status
mbed_official	381:5460fc57b6e4	3385	*/
mbed_official	381:5460fc57b6e4	3386	HAL_StatusTypeDef HAL_HRTIM_EventPrescalerConfig(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	3387	uint32_t Prescaler)
mbed_official	381:5460fc57b6e4	3388	{
mbed_official	381:5460fc57b6e4	3389	uint32_t hrtim_eecr3;
mbed_official	381:5460fc57b6e4	3390
mbed_official	381:5460fc57b6e4	3391	/* Check parameters */
mbed_official	381:5460fc57b6e4	3392	assert_param(IS_HRTIM_EVENTPRESCALER(Prescaler));
mbed_official	381:5460fc57b6e4	3393
mbed_official	381:5460fc57b6e4	3394	if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
mbed_official	381:5460fc57b6e4	3395	{
mbed_official	381:5460fc57b6e4	3396	return HAL_BUSY;
mbed_official	381:5460fc57b6e4	3397	}
mbed_official	381:5460fc57b6e4	3398
mbed_official	381:5460fc57b6e4	3399	/* Process Locked */
mbed_official	381:5460fc57b6e4	3400	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	3401
mbed_official	381:5460fc57b6e4	3402	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	3403
mbed_official	381:5460fc57b6e4	3404	/* Set the external event prescaler */
mbed_official	381:5460fc57b6e4	3405	hrtim_eecr3 = hhrtim->Instance->sCommonRegs.EECR3;
mbed_official	381:5460fc57b6e4	3406	hrtim_eecr3 &= ~(HRTIM_EECR3_EEVSD);
mbed_official	381:5460fc57b6e4	3407	hrtim_eecr3 \|= Prescaler;
mbed_official	381:5460fc57b6e4	3408
mbed_official	381:5460fc57b6e4	3409	/* Update the HRTIM registers */
mbed_official	381:5460fc57b6e4	3410	hhrtim->Instance->sCommonRegs.EECR3 = hrtim_eecr3;
mbed_official	381:5460fc57b6e4	3411
mbed_official	381:5460fc57b6e4	3412	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	3413
mbed_official	381:5460fc57b6e4	3414	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	3415	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	3416
mbed_official	381:5460fc57b6e4	3417	return HAL_OK;
mbed_official	381:5460fc57b6e4	3418	}
mbed_official	381:5460fc57b6e4	3419
mbed_official	381:5460fc57b6e4	3420	/**
mbed_official	381:5460fc57b6e4	3421	* @brief Configures the conditioning of fault input
mbed_official	381:5460fc57b6e4	3422	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	3423	* @param Fault: fault input to configure
mbed_official	381:5460fc57b6e4	3424	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	3425	* @arg HRTIM_FAULT_1: Fault input 1
mbed_official	381:5460fc57b6e4	3426	* @arg HRTIM_FAULT_2: Fault input 2
mbed_official	381:5460fc57b6e4	3427	* @arg HRTIM_FAULT_3: Fault input 3
mbed_official	381:5460fc57b6e4	3428	* @arg HRTIM_FAULT_4: Fault input 4
mbed_official	381:5460fc57b6e4	3429	* @arg HRTIM_FAULT_5: Fault input 5
mbed_official	381:5460fc57b6e4	3430	* @param pFaultCfg: pointer to the fault conditioning configuration structure
mbed_official	381:5460fc57b6e4	3431	* @note This function must be called before starting the timer and before
mbed_official	381:5460fc57b6e4	3432	* enabling faults inputs
mbed_official	381:5460fc57b6e4	3433	* @retval HAL status
mbed_official	381:5460fc57b6e4	3434	*/
mbed_official	381:5460fc57b6e4	3435	HAL_StatusTypeDef HAL_HRTIM_FaultConfig(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	3436	uint32_t Fault,
mbed_official	381:5460fc57b6e4	3437	HRTIM_FaultCfgTypeDef* pFaultCfg)
mbed_official	381:5460fc57b6e4	3438	{
mbed_official	381:5460fc57b6e4	3439	uint32_t hrtim_fltinr1;
mbed_official	381:5460fc57b6e4	3440	uint32_t hrtim_fltinr2;
mbed_official	381:5460fc57b6e4	3441
mbed_official	381:5460fc57b6e4	3442	/* Check parameters */
mbed_official	381:5460fc57b6e4	3443	assert_param(IS_HRTIM_FAULT(Fault));
mbed_official	381:5460fc57b6e4	3444	assert_param(IS_HRTIM_FAULTSOURCE(pFaultCfg->Source));
mbed_official	381:5460fc57b6e4	3445	assert_param(IS_HRTIM_FAULTPOLARITY(pFaultCfg->Polarity));
mbed_official	381:5460fc57b6e4	3446	assert_param(IS_HRTIM_FAULTFILTER(pFaultCfg->Filter));
mbed_official	381:5460fc57b6e4	3447	assert_param(IS_HRTIM_FAULTLOCK(pFaultCfg->Lock));
mbed_official	381:5460fc57b6e4	3448
mbed_official	381:5460fc57b6e4	3449	if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
mbed_official	381:5460fc57b6e4	3450	{
mbed_official	381:5460fc57b6e4	3451	return HAL_BUSY;
mbed_official	381:5460fc57b6e4	3452	}
mbed_official	381:5460fc57b6e4	3453
mbed_official	381:5460fc57b6e4	3454	/* Process Locked */
mbed_official	381:5460fc57b6e4	3455	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	3456
mbed_official	381:5460fc57b6e4	3457	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	3458
mbed_official	381:5460fc57b6e4	3459	/* Configure fault channel */
mbed_official	381:5460fc57b6e4	3460	hrtim_fltinr1 = hhrtim->Instance->sCommonRegs.FLTINR1;
mbed_official	381:5460fc57b6e4	3461	hrtim_fltinr2 = hhrtim->Instance->sCommonRegs.FLTINR2;
mbed_official	381:5460fc57b6e4	3462
mbed_official	381:5460fc57b6e4	3463	switch (Fault)
mbed_official	381:5460fc57b6e4	3464	{
mbed_official	381:5460fc57b6e4	3465	case HRTIM_FAULT_1:
mbed_official	381:5460fc57b6e4	3466	{
mbed_official	381:5460fc57b6e4	3467	hrtim_fltinr1 &= ~(HRTIM_FLTINR1_FLT1P \| HRTIM_FLTINR1_FLT1SRC \| HRTIM_FLTINR1_FLT1F \| HRTIM_FLTINR1_FLT1LCK);
mbed_official	381:5460fc57b6e4	3468	hrtim_fltinr1 \|= pFaultCfg->Polarity;
mbed_official	381:5460fc57b6e4	3469	hrtim_fltinr1 \|= pFaultCfg->Source;
mbed_official	381:5460fc57b6e4	3470	hrtim_fltinr1 \|= pFaultCfg->Filter;
mbed_official	381:5460fc57b6e4	3471	hrtim_fltinr1 \|= pFaultCfg->Lock;
mbed_official	381:5460fc57b6e4	3472	}
mbed_official	381:5460fc57b6e4	3473	break;
mbed_official	381:5460fc57b6e4	3474	case HRTIM_FAULT_2:
mbed_official	381:5460fc57b6e4	3475	{
mbed_official	381:5460fc57b6e4	3476	hrtim_fltinr1 &= ~(HRTIM_FLTINR1_FLT2P \| HRTIM_FLTINR1_FLT2SRC \| HRTIM_FLTINR1_FLT2F \| HRTIM_FLTINR1_FLT2LCK);
mbed_official	381:5460fc57b6e4	3477	hrtim_fltinr1 \|= (pFaultCfg->Polarity << 8);
mbed_official	381:5460fc57b6e4	3478	hrtim_fltinr1 \|= (pFaultCfg->Source << 8);
mbed_official	381:5460fc57b6e4	3479	hrtim_fltinr1 \|= (pFaultCfg->Filter << 8);
mbed_official	381:5460fc57b6e4	3480	hrtim_fltinr1 \|= (pFaultCfg->Lock << 8);
mbed_official	381:5460fc57b6e4	3481	}
mbed_official	381:5460fc57b6e4	3482	break;
mbed_official	381:5460fc57b6e4	3483	case HRTIM_FAULT_3:
mbed_official	381:5460fc57b6e4	3484	{
mbed_official	381:5460fc57b6e4	3485	hrtim_fltinr1 &= ~(HRTIM_FLTINR1_FLT3P \| HRTIM_FLTINR1_FLT3SRC \| HRTIM_FLTINR1_FLT3F \| HRTIM_FLTINR1_FLT3LCK);
mbed_official	381:5460fc57b6e4	3486	hrtim_fltinr1 \|= (pFaultCfg->Polarity << 16);
mbed_official	381:5460fc57b6e4	3487	hrtim_fltinr1 \|= (pFaultCfg->Source << 16);
mbed_official	381:5460fc57b6e4	3488	hrtim_fltinr1 \|= (pFaultCfg->Filter << 16);
mbed_official	381:5460fc57b6e4	3489	hrtim_fltinr1 \|= (pFaultCfg->Lock << 16);
mbed_official	381:5460fc57b6e4	3490	}
mbed_official	381:5460fc57b6e4	3491	break;
mbed_official	381:5460fc57b6e4	3492	case HRTIM_FAULT_4:
mbed_official	381:5460fc57b6e4	3493	{
mbed_official	381:5460fc57b6e4	3494	hrtim_fltinr1 &= ~(HRTIM_FLTINR1_FLT4P \| HRTIM_FLTINR1_FLT4SRC \| HRTIM_FLTINR1_FLT4F \| HRTIM_FLTINR1_FLT4LCK);
mbed_official	381:5460fc57b6e4	3495	hrtim_fltinr1 \|= (pFaultCfg->Polarity << 24);
mbed_official	381:5460fc57b6e4	3496	hrtim_fltinr1 \|= (pFaultCfg->Source << 24);
mbed_official	381:5460fc57b6e4	3497	hrtim_fltinr1 \|= (pFaultCfg->Filter << 24);
mbed_official	381:5460fc57b6e4	3498	hrtim_fltinr1 \|= (pFaultCfg->Lock << 24);
mbed_official	381:5460fc57b6e4	3499	}
mbed_official	381:5460fc57b6e4	3500	break;
mbed_official	381:5460fc57b6e4	3501	case HRTIM_FAULT_5:
mbed_official	381:5460fc57b6e4	3502	{
mbed_official	381:5460fc57b6e4	3503	hrtim_fltinr2 &= ~(HRTIM_FLTINR2_FLT5P \| HRTIM_FLTINR2_FLT5SRC \| HRTIM_FLTINR2_FLT5F \| HRTIM_FLTINR2_FLT5LCK);
mbed_official	381:5460fc57b6e4	3504	hrtim_fltinr2 \|= pFaultCfg->Polarity;
mbed_official	381:5460fc57b6e4	3505	hrtim_fltinr2 \|= pFaultCfg->Source;
mbed_official	381:5460fc57b6e4	3506	hrtim_fltinr2 \|= pFaultCfg->Filter;
mbed_official	381:5460fc57b6e4	3507	hrtim_fltinr2 \|= pFaultCfg->Lock;
mbed_official	381:5460fc57b6e4	3508	}
mbed_official	381:5460fc57b6e4	3509	break;
mbed_official	381:5460fc57b6e4	3510	default:
mbed_official	381:5460fc57b6e4	3511	break;
mbed_official	381:5460fc57b6e4	3512	}
mbed_official	381:5460fc57b6e4	3513
mbed_official	381:5460fc57b6e4	3514	/* Update the HRTIM registers */
mbed_official	381:5460fc57b6e4	3515	hhrtim->Instance->sCommonRegs.FLTINR1 = hrtim_fltinr1;
mbed_official	381:5460fc57b6e4	3516	hhrtim->Instance->sCommonRegs.FLTINR2 = hrtim_fltinr2;
mbed_official	381:5460fc57b6e4	3517
mbed_official	381:5460fc57b6e4	3518	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	3519
mbed_official	381:5460fc57b6e4	3520	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	3521	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	3522
mbed_official	381:5460fc57b6e4	3523	return HAL_OK;
mbed_official	381:5460fc57b6e4	3524	}
mbed_official	381:5460fc57b6e4	3525
mbed_official	381:5460fc57b6e4	3526	/**
mbed_official	381:5460fc57b6e4	3527	* @brief Configures the fault conditioning block prescaler
mbed_official	381:5460fc57b6e4	3528	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	3529	* @param Prescaler: Prescaler value
mbed_official	381:5460fc57b6e4	3530	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	3531	* @arg HRTIM_FAULTPRESCALER_DIV1: fFLTS=fHRTIM
mbed_official	381:5460fc57b6e4	3532	* @arg HRTIM_FAULTPRESCALER_DIV2: fFLTS=fHRTIM / 2
mbed_official	381:5460fc57b6e4	3533	* @arg HRTIM_FAULTPRESCALER_DIV4: fFLTS=fHRTIM / 4
mbed_official	381:5460fc57b6e4	3534	* @arg HRTIM_FAULTPRESCALER_DIV8: fFLTS=fHRTIM / 8
mbed_official	381:5460fc57b6e4	3535	* @retval HAL status
mbed_official	381:5460fc57b6e4	3536	* @note This function must be called before starting the timer and before
mbed_official	381:5460fc57b6e4	3537	* enabling faults inputs
mbed_official	381:5460fc57b6e4	3538	*/
mbed_official	381:5460fc57b6e4	3539	HAL_StatusTypeDef HAL_HRTIM_FaultPrescalerConfig(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	3540	uint32_t Prescaler)
mbed_official	381:5460fc57b6e4	3541	{
mbed_official	381:5460fc57b6e4	3542	uint32_t hrtim_fltinr2;
mbed_official	381:5460fc57b6e4	3543
mbed_official	381:5460fc57b6e4	3544	/* Check parameters */
mbed_official	381:5460fc57b6e4	3545	assert_param(IS_HRTIM_FAULTPRESCALER(Prescaler));
mbed_official	381:5460fc57b6e4	3546
mbed_official	381:5460fc57b6e4	3547	if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
mbed_official	381:5460fc57b6e4	3548	{
mbed_official	381:5460fc57b6e4	3549	return HAL_BUSY;
mbed_official	381:5460fc57b6e4	3550	}
mbed_official	381:5460fc57b6e4	3551
mbed_official	381:5460fc57b6e4	3552	/* Process Locked */
mbed_official	381:5460fc57b6e4	3553	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	3554
mbed_official	381:5460fc57b6e4	3555	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	3556
mbed_official	381:5460fc57b6e4	3557	/* Set the external event prescaler */
mbed_official	381:5460fc57b6e4	3558	hrtim_fltinr2 = hhrtim->Instance->sCommonRegs.FLTINR2;
mbed_official	381:5460fc57b6e4	3559	hrtim_fltinr2 &= ~(HRTIM_FLTINR2_FLTSD);
mbed_official	381:5460fc57b6e4	3560	hrtim_fltinr2 \|= Prescaler;
mbed_official	381:5460fc57b6e4	3561
mbed_official	381:5460fc57b6e4	3562	/* Update the HRTIM registers */
mbed_official	381:5460fc57b6e4	3563	hhrtim->Instance->sCommonRegs.FLTINR2 = hrtim_fltinr2;
mbed_official	381:5460fc57b6e4	3564
mbed_official	381:5460fc57b6e4	3565	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	3566
mbed_official	381:5460fc57b6e4	3567	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	3568	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	3569
mbed_official	381:5460fc57b6e4	3570	return HAL_OK;
mbed_official	381:5460fc57b6e4	3571	}
mbed_official	381:5460fc57b6e4	3572
mbed_official	381:5460fc57b6e4	3573	/**
mbed_official	381:5460fc57b6e4	3574	* @brief Enables or disables the HRTIMx Fault mode.
mbed_official	381:5460fc57b6e4	3575	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	3576	* @param Faults: fault input(s) to enable or disable
mbed_official	381:5460fc57b6e4	3577	* This parameter can be any combination of the following values:
mbed_official	381:5460fc57b6e4	3578	* @arg HRTIM_FAULT_1: Fault input 1
mbed_official	381:5460fc57b6e4	3579	* @arg HRTIM_FAULT_2: Fault input 2
mbed_official	381:5460fc57b6e4	3580	* @arg HRTIM_FAULT_3: Fault input 3
mbed_official	381:5460fc57b6e4	3581	* @arg HRTIM_FAULT_4: Fault input 4
mbed_official	381:5460fc57b6e4	3582	* @arg HRTIM_FAULT_5: Fault input 5
mbed_official	381:5460fc57b6e4	3583	* @param Enable: Fault(s) enabling
mbed_official	381:5460fc57b6e4	3584	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	3585	* @arg HRTIM_FAULTMODECTL_ENABLED: Fault(s) enabled
mbed_official	381:5460fc57b6e4	3586	* @arg HRTIM_FAULTMODECTL_DISABLED: Fault(s) disabled
mbed_official	381:5460fc57b6e4	3587	* @retval None
mbed_official	381:5460fc57b6e4	3588	*/
mbed_official	381:5460fc57b6e4	3589	void HAL_HRTIM_FaultModeCtl(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	3590	uint32_t Faults,
mbed_official	381:5460fc57b6e4	3591	uint32_t Enable)
mbed_official	381:5460fc57b6e4	3592	{
mbed_official	381:5460fc57b6e4	3593	uint32_t hrtim_fltinr1;
mbed_official	381:5460fc57b6e4	3594	uint32_t hrtim_fltinr2;
mbed_official	381:5460fc57b6e4	3595
mbed_official	381:5460fc57b6e4	3596	/* Check parameters */
mbed_official	381:5460fc57b6e4	3597	assert_param(IS_HRTIM_FAULT(Faults));
mbed_official	381:5460fc57b6e4	3598	assert_param(IS_HRTIM_FAULTMODECTL(Enable));
mbed_official	381:5460fc57b6e4	3599
mbed_official	381:5460fc57b6e4	3600	/* Configure fault channel */
mbed_official	381:5460fc57b6e4	3601	hrtim_fltinr1 = hhrtim->Instance->sCommonRegs.FLTINR1;
mbed_official	381:5460fc57b6e4	3602	hrtim_fltinr2 = hhrtim->Instance->sCommonRegs.FLTINR2;
mbed_official	381:5460fc57b6e4	3603
mbed_official	381:5460fc57b6e4	3604	if ((Faults & HRTIM_FAULT_1) != RESET)
mbed_official	381:5460fc57b6e4	3605	{
mbed_official	381:5460fc57b6e4	3606	hrtim_fltinr1 &= ~HRTIM_FLTINR1_FLT1E;
mbed_official	381:5460fc57b6e4	3607	hrtim_fltinr1 \|= Enable;
mbed_official	381:5460fc57b6e4	3608	}
mbed_official	381:5460fc57b6e4	3609	if ((Faults & HRTIM_FAULT_2) != RESET)
mbed_official	381:5460fc57b6e4	3610	{
mbed_official	381:5460fc57b6e4	3611	hrtim_fltinr1 &= ~HRTIM_FLTINR1_FLT2E;
mbed_official	381:5460fc57b6e4	3612	hrtim_fltinr1 \|= (Enable << 8);
mbed_official	381:5460fc57b6e4	3613	}
mbed_official	381:5460fc57b6e4	3614	if ((Faults & HRTIM_FAULT_3) != RESET)
mbed_official	381:5460fc57b6e4	3615	{
mbed_official	381:5460fc57b6e4	3616	hrtim_fltinr1 &= ~HRTIM_FLTINR1_FLT3E;
mbed_official	381:5460fc57b6e4	3617	hrtim_fltinr1 \|= (Enable << 16);
mbed_official	381:5460fc57b6e4	3618	}
mbed_official	381:5460fc57b6e4	3619	if ((Faults & HRTIM_FAULT_4) != RESET)
mbed_official	381:5460fc57b6e4	3620	{
mbed_official	381:5460fc57b6e4	3621	hrtim_fltinr1 &= ~HRTIM_FLTINR1_FLT4E;
mbed_official	381:5460fc57b6e4	3622	hrtim_fltinr1 \|= (Enable << 24);
mbed_official	381:5460fc57b6e4	3623	}
mbed_official	381:5460fc57b6e4	3624	if ((Faults & HRTIM_FAULT_5) != RESET)
mbed_official	381:5460fc57b6e4	3625	{
mbed_official	381:5460fc57b6e4	3626	hrtim_fltinr2 &= ~HRTIM_FLTINR2_FLT5E;
mbed_official	381:5460fc57b6e4	3627	hrtim_fltinr2 \|= Enable;
mbed_official	381:5460fc57b6e4	3628	}
mbed_official	381:5460fc57b6e4	3629
mbed_official	381:5460fc57b6e4	3630	/* Update the HRTIMx registers */
mbed_official	381:5460fc57b6e4	3631	hhrtim->Instance->sCommonRegs.FLTINR1 = hrtim_fltinr1;
mbed_official	381:5460fc57b6e4	3632	hhrtim->Instance->sCommonRegs.FLTINR2 = hrtim_fltinr2;
mbed_official	381:5460fc57b6e4	3633	}
mbed_official	381:5460fc57b6e4	3634
mbed_official	381:5460fc57b6e4	3635	/**
mbed_official	381:5460fc57b6e4	3636	* @brief Configures both the ADC trigger register update source and the ADC
mbed_official	381:5460fc57b6e4	3637	* trigger source.
mbed_official	381:5460fc57b6e4	3638	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	3639	* @param ADCTrigger: ADC trigger to configure
mbed_official	381:5460fc57b6e4	3640	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	3641	* @arg HRTIM_ADCTRIGGER_1: ADC trigger 1
mbed_official	381:5460fc57b6e4	3642	* @arg HRTIM_ADCTRIGGER_2: ADC trigger 2
mbed_official	381:5460fc57b6e4	3643	* @arg HRTIM_ADCTRIGGER_3: ADC trigger 3
mbed_official	381:5460fc57b6e4	3644	* @arg HRTIM_ADCTRIGGER_4: ADC trigger 4
mbed_official	381:5460fc57b6e4	3645	* @param pADCTriggerCfg: pointer to the ADC trigger configuration structure
mbed_official	381:5460fc57b6e4	3646	* @retval HAL status
mbed_official	381:5460fc57b6e4	3647	* @note This function must be called before starting the timer
mbed_official	381:5460fc57b6e4	3648	*/
mbed_official	381:5460fc57b6e4	3649	HAL_StatusTypeDef HAL_HRTIM_ADCTriggerConfig(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	3650	uint32_t ADCTrigger,
mbed_official	381:5460fc57b6e4	3651	HRTIM_ADCTriggerCfgTypeDef* pADCTriggerCfg)
mbed_official	381:5460fc57b6e4	3652	{
mbed_official	381:5460fc57b6e4	3653	uint32_t hrtim_cr1;
mbed_official	381:5460fc57b6e4	3654
mbed_official	381:5460fc57b6e4	3655	/* Check parameters */
mbed_official	381:5460fc57b6e4	3656	assert_param(IS_HRTIM_ADCTRIGGER(ADCTrigger));
mbed_official	381:5460fc57b6e4	3657	assert_param(IS_HRTIM_ADCTRIGGERUPDATE(pADCTriggerCfg->UpdateSource));
mbed_official	381:5460fc57b6e4	3658
mbed_official	381:5460fc57b6e4	3659	if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
mbed_official	381:5460fc57b6e4	3660	{
mbed_official	381:5460fc57b6e4	3661	return HAL_BUSY;
mbed_official	381:5460fc57b6e4	3662	}
mbed_official	381:5460fc57b6e4	3663
mbed_official	381:5460fc57b6e4	3664	/* Process Locked */
mbed_official	381:5460fc57b6e4	3665	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	3666
mbed_official	381:5460fc57b6e4	3667	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	3668
mbed_official	381:5460fc57b6e4	3669	/* Set the ADC trigger update source */
mbed_official	381:5460fc57b6e4	3670	hrtim_cr1 = hhrtim->Instance->sCommonRegs.CR1;
mbed_official	381:5460fc57b6e4	3671
mbed_official	381:5460fc57b6e4	3672	switch (ADCTrigger)
mbed_official	381:5460fc57b6e4	3673	{
mbed_official	381:5460fc57b6e4	3674	case HRTIM_ADCTRIGGER_1:
mbed_official	381:5460fc57b6e4	3675	{
mbed_official	381:5460fc57b6e4	3676	hrtim_cr1 &= ~(HRTIM_CR1_ADC1USRC);
mbed_official	381:5460fc57b6e4	3677	hrtim_cr1 \|= (pADCTriggerCfg->UpdateSource & HRTIM_CR1_ADC1USRC);
mbed_official	381:5460fc57b6e4	3678
mbed_official	381:5460fc57b6e4	3679	/* Set the ADC trigger 1 source */
mbed_official	381:5460fc57b6e4	3680	hhrtim->Instance->sCommonRegs.ADC1R = pADCTriggerCfg->Trigger;
mbed_official	381:5460fc57b6e4	3681	}
mbed_official	381:5460fc57b6e4	3682	break;
mbed_official	381:5460fc57b6e4	3683	case HRTIM_ADCTRIGGER_2:
mbed_official	381:5460fc57b6e4	3684	{
mbed_official	381:5460fc57b6e4	3685	hrtim_cr1 &= ~(HRTIM_CR1_ADC2USRC);
mbed_official	381:5460fc57b6e4	3686	hrtim_cr1 \|= ((pADCTriggerCfg->UpdateSource << 3) & HRTIM_CR1_ADC2USRC);
mbed_official	381:5460fc57b6e4	3687
mbed_official	381:5460fc57b6e4	3688	/* Set the ADC trigger 2 source */
mbed_official	381:5460fc57b6e4	3689	hhrtim->Instance->sCommonRegs.ADC2R = pADCTriggerCfg->Trigger;
mbed_official	381:5460fc57b6e4	3690	}
mbed_official	381:5460fc57b6e4	3691	break;
mbed_official	381:5460fc57b6e4	3692	case HRTIM_ADCTRIGGER_3:
mbed_official	381:5460fc57b6e4	3693	{
mbed_official	381:5460fc57b6e4	3694	hrtim_cr1 &= ~(HRTIM_CR1_ADC3USRC);
mbed_official	381:5460fc57b6e4	3695	hrtim_cr1 \|= ((pADCTriggerCfg->UpdateSource << 6) & HRTIM_CR1_ADC3USRC);
mbed_official	381:5460fc57b6e4	3696
mbed_official	381:5460fc57b6e4	3697	/* Set the ADC trigger 3 source */
mbed_official	381:5460fc57b6e4	3698	hhrtim->Instance->sCommonRegs.ADC3R = pADCTriggerCfg->Trigger;
mbed_official	381:5460fc57b6e4	3699	}
mbed_official	381:5460fc57b6e4	3700	break;
mbed_official	381:5460fc57b6e4	3701	case HRTIM_ADCTRIGGER_4:
mbed_official	381:5460fc57b6e4	3702	{
mbed_official	381:5460fc57b6e4	3703	hrtim_cr1 &= ~(HRTIM_CR1_ADC4USRC);
mbed_official	381:5460fc57b6e4	3704	hrtim_cr1 \|= ((pADCTriggerCfg->UpdateSource << 9) & HRTIM_CR1_ADC4USRC);
mbed_official	381:5460fc57b6e4	3705
mbed_official	381:5460fc57b6e4	3706	/* Set the ADC trigger 4 source */
mbed_official	381:5460fc57b6e4	3707	hhrtim->Instance->sCommonRegs.ADC4R = pADCTriggerCfg->Trigger;
mbed_official	381:5460fc57b6e4	3708	}
mbed_official	381:5460fc57b6e4	3709	break;
mbed_official	381:5460fc57b6e4	3710	}
mbed_official	381:5460fc57b6e4	3711
mbed_official	381:5460fc57b6e4	3712	/* Update the HRTIM registers */
mbed_official	381:5460fc57b6e4	3713	hhrtim->Instance->sCommonRegs.CR1 = hrtim_cr1;
mbed_official	381:5460fc57b6e4	3714
mbed_official	381:5460fc57b6e4	3715	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	3716
mbed_official	381:5460fc57b6e4	3717	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	3718	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	3719
mbed_official	381:5460fc57b6e4	3720	return HAL_OK;
mbed_official	381:5460fc57b6e4	3721	}
mbed_official	381:5460fc57b6e4	3722
mbed_official	381:5460fc57b6e4	3723	/**
mbed_official	381:5460fc57b6e4	3724	* @}
mbed_official	381:5460fc57b6e4	3725	*/
mbed_official	381:5460fc57b6e4	3726
mbed_official	381:5460fc57b6e4	3727	/** @defgroup HRTIM_Exported_Functions_Group8 Timer waveform configuration and functions
mbed_official	381:5460fc57b6e4	3728	* @brief Functions used to configure and control a HRTIM timer
mbed_official	381:5460fc57b6e4	3729	* operating in waveform mode.
mbed_official	381:5460fc57b6e4	3730	*
mbed_official	381:5460fc57b6e4	3731	@verbatim
mbed_official	381:5460fc57b6e4	3732	===============================================================================
mbed_official	381:5460fc57b6e4	3733	##### HRTIM timer configuration and control functions #####
mbed_official	381:5460fc57b6e4	3734	===============================================================================
mbed_official	381:5460fc57b6e4	3735	[..] This section provides functions allowing to:
mbed_official	381:5460fc57b6e4	3736	(+) Configure HRTIM timer general behavior
mbed_official	381:5460fc57b6e4	3737	(+) Configure HRTIM timer event filtering
mbed_official	381:5460fc57b6e4	3738	(+) Configure HRTIM timer deadtime insertion
mbed_official	381:5460fc57b6e4	3739	(+) Configure HRTIM timer chopper mode
mbed_official	381:5460fc57b6e4	3740	(+) Configure HRTIM timer burst DMA
mbed_official	381:5460fc57b6e4	3741	(+) Configure HRTIM timer compare unit
mbed_official	381:5460fc57b6e4	3742	(+) Configure HRTIM timer capture unit
mbed_official	381:5460fc57b6e4	3743	(+) Configure HRTIM timer output
mbed_official	381:5460fc57b6e4	3744	(+) Set HRTIM timer output level
mbed_official	381:5460fc57b6e4	3745	(+) Enable HRTIM timer output
mbed_official	381:5460fc57b6e4	3746	(+) Disable HRTIM timer output
mbed_official	381:5460fc57b6e4	3747	(+) Start HRTIM timer
mbed_official	381:5460fc57b6e4	3748	(+) Stop HRTIM timer
mbed_official	381:5460fc57b6e4	3749	(+) Start HRTIM timer and enable interrupt
mbed_official	381:5460fc57b6e4	3750	(+) Stop HRTIM timer and disable interrupt
mbed_official	381:5460fc57b6e4	3751	(+) Start HRTIM timer and enable DMA transfer
mbed_official	381:5460fc57b6e4	3752	(+) Stop HRTIM timer and disable DMA transfer
mbed_official	381:5460fc57b6e4	3753	(+) Enable or disable the burst mode controller
mbed_official	381:5460fc57b6e4	3754	(+) Start the burst mode controller (by software)
mbed_official	381:5460fc57b6e4	3755	(+) Trigger a Capture (by software)
mbed_official	381:5460fc57b6e4	3756	(+) Update the HRTIM timer preloadable registers (by software)
mbed_official	381:5460fc57b6e4	3757	(+) Reset the HRTIM timer counter (by software)
mbed_official	381:5460fc57b6e4	3758	(+) Start a burst DMA transfer
mbed_official	381:5460fc57b6e4	3759	(+) Enable timer register update
mbed_official	381:5460fc57b6e4	3760	(+) Disable timer register update
mbed_official	381:5460fc57b6e4	3761
mbed_official	381:5460fc57b6e4	3762	@endverbatim
mbed_official	381:5460fc57b6e4	3763	* @{
mbed_official	381:5460fc57b6e4	3764	*/
mbed_official	381:5460fc57b6e4	3765
mbed_official	381:5460fc57b6e4	3766	/**
mbed_official	381:5460fc57b6e4	3767	* @brief Configures the general behavior of a timer operating in waveform mode
mbed_official	381:5460fc57b6e4	3768	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	3769	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	3770	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	3771	* @arg HRTIM_TIMERINDEX_MASTER for master timer
mbed_official	381:5460fc57b6e4	3772	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	3773	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	3774	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	3775	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	3776	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	3777	* @param pTimerCfg: pointer to the timer configuration structure
mbed_official	381:5460fc57b6e4	3778	* @note When the timer operates in waveform mode, all the features supported by
mbed_official	381:5460fc57b6e4	3779	* the HRTIM are available without any limitation.
mbed_official	381:5460fc57b6e4	3780	* @retval HAL status
mbed_official	381:5460fc57b6e4	3781	* @note This function must be called before starting the timer
mbed_official	381:5460fc57b6e4	3782	*/
mbed_official	381:5460fc57b6e4	3783	HAL_StatusTypeDef HAL_HRTIM_WaveformTimerConfig(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	3784	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	3785	HRTIM_TimerCfgTypeDef * pTimerCfg)
mbed_official	381:5460fc57b6e4	3786	{
mbed_official	381:5460fc57b6e4	3787	/* Check parameters */
mbed_official	381:5460fc57b6e4	3788	assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
mbed_official	381:5460fc57b6e4	3789
mbed_official	381:5460fc57b6e4	3790	/* Relevant for all HRTIM timers, including the master */
mbed_official	381:5460fc57b6e4	3791	assert_param(IS_HRTIM_HALFMODE(pTimerCfg->HalfModeEnable));
mbed_official	381:5460fc57b6e4	3792	assert_param(IS_HRTIM_SYNCSTART(pTimerCfg->StartOnSync));
mbed_official	381:5460fc57b6e4	3793	assert_param(IS_HRTIM_SYNCRESET(pTimerCfg->ResetOnSync));
mbed_official	381:5460fc57b6e4	3794	assert_param(IS_HHRTIM_DACSYNC(pTimerCfg->DACSynchro));
mbed_official	381:5460fc57b6e4	3795	assert_param(IS_HRTIM_PRELOAD(pTimerCfg->PreloadEnable));
mbed_official	381:5460fc57b6e4	3796	assert_param(IS_HRTIM_TIMERBURSTMODE(pTimerCfg->BurstMode));
mbed_official	381:5460fc57b6e4	3797	assert_param(IS_HRTIM_UPDATEONREPETITION(pTimerCfg->RepetitionUpdate));
mbed_official	381:5460fc57b6e4	3798
mbed_official	381:5460fc57b6e4	3799	if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
mbed_official	381:5460fc57b6e4	3800	{
mbed_official	381:5460fc57b6e4	3801	return HAL_BUSY;
mbed_official	381:5460fc57b6e4	3802	}
mbed_official	381:5460fc57b6e4	3803
mbed_official	381:5460fc57b6e4	3804	/* Process Locked */
mbed_official	381:5460fc57b6e4	3805	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	3806
mbed_official	381:5460fc57b6e4	3807	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	3808
mbed_official	381:5460fc57b6e4	3809	if (TimerIdx == HRTIM_TIMERINDEX_MASTER)
mbed_official	381:5460fc57b6e4	3810	{
mbed_official	381:5460fc57b6e4	3811	/* Check parameters */
mbed_official	381:5460fc57b6e4	3812	assert_param(IS_HRTIM_UPDATEGATING_MASTER(pTimerCfg->UpdateGating));
mbed_official	381:5460fc57b6e4	3813	assert_param(IS_HRTIM_MASTER_IT(pTimerCfg->InterruptRequests));
mbed_official	381:5460fc57b6e4	3814	assert_param(IS_HRTIM_MASTER_DMA(pTimerCfg->DMARequests));
mbed_official	381:5460fc57b6e4	3815
mbed_official	381:5460fc57b6e4	3816	/* Configure master timer */
mbed_official	381:5460fc57b6e4	3817	HRTIM_MasterWaveform_Config(hhrtim, pTimerCfg);
mbed_official	381:5460fc57b6e4	3818	}
mbed_official	381:5460fc57b6e4	3819	else
mbed_official	381:5460fc57b6e4	3820	{
mbed_official	381:5460fc57b6e4	3821	/* Check parameters */
mbed_official	381:5460fc57b6e4	3822	assert_param(IS_HRTIM_UPDATEGATING_TIM(pTimerCfg->UpdateGating));
mbed_official	381:5460fc57b6e4	3823	assert_param(IS_HRTIM_TIM_IT(pTimerCfg->InterruptRequests));
mbed_official	381:5460fc57b6e4	3824	assert_param(IS_HRTIM_TIM_DMA(pTimerCfg->DMARequests));
mbed_official	381:5460fc57b6e4	3825	assert_param(IS_HRTIM_TIMPUSHPULLMODE(pTimerCfg->PushPull));
mbed_official	381:5460fc57b6e4	3826	assert_param(IS_HRTIM_TIMFAULTENABLE(pTimerCfg->FaultEnable));
mbed_official	381:5460fc57b6e4	3827	assert_param(IS_HRTIM_TIMFAULTLOCK(pTimerCfg->FaultLock));
mbed_official	381:5460fc57b6e4	3828	assert_param(IS_HRTIM_TIMDEADTIMEINSERTION(pTimerCfg->PushPull,
mbed_official	381:5460fc57b6e4	3829	pTimerCfg->DeadTimeInsertion));
mbed_official	381:5460fc57b6e4	3830	assert_param(IS_HRTIM_TIMDELAYEDPROTECTION(pTimerCfg->PushPull,
mbed_official	381:5460fc57b6e4	3831	pTimerCfg->DelayedProtectionMode));
mbed_official	381:5460fc57b6e4	3832	assert_param(IS_HRTIM_TIMUPDATETRIGGER(pTimerCfg->UpdateTrigger));
mbed_official	381:5460fc57b6e4	3833	assert_param(IS_HRTIM_TIMRESETTRIGGER(pTimerCfg->ResetTrigger));
mbed_official	381:5460fc57b6e4	3834	assert_param(IS_HRTIM_TIMUPDATEONRESET(pTimerCfg->ResetUpdate));
mbed_official	381:5460fc57b6e4	3835
mbed_official	381:5460fc57b6e4	3836	/* Configure timing unit */
mbed_official	381:5460fc57b6e4	3837	HRTIM_TimingUnitWaveform_Config(hhrtim, TimerIdx, pTimerCfg);
mbed_official	381:5460fc57b6e4	3838	}
mbed_official	381:5460fc57b6e4	3839
mbed_official	381:5460fc57b6e4	3840	/* Update timer parameters */
mbed_official	381:5460fc57b6e4	3841	hhrtim->TimerParam[TimerIdx].InterruptRequests = pTimerCfg->InterruptRequests;
mbed_official	381:5460fc57b6e4	3842	hhrtim->TimerParam[TimerIdx].DMARequests = pTimerCfg->DMARequests;
mbed_official	381:5460fc57b6e4	3843	hhrtim->TimerParam[TimerIdx].DMASrcAddress = pTimerCfg->DMASrcAddress;
mbed_official	381:5460fc57b6e4	3844	hhrtim->TimerParam[TimerIdx].DMADstAddress = pTimerCfg->DMADstAddress;
mbed_official	381:5460fc57b6e4	3845	hhrtim->TimerParam[TimerIdx].DMASize = pTimerCfg->DMASize;
mbed_official	381:5460fc57b6e4	3846
mbed_official	381:5460fc57b6e4	3847	/* Force a software update */
mbed_official	381:5460fc57b6e4	3848	HRTIM_ForceRegistersUpdate(hhrtim, TimerIdx);
mbed_official	381:5460fc57b6e4	3849
mbed_official	381:5460fc57b6e4	3850	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	3851
mbed_official	381:5460fc57b6e4	3852	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	3853	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	3854
mbed_official	381:5460fc57b6e4	3855	return HAL_OK;
mbed_official	381:5460fc57b6e4	3856	}
mbed_official	381:5460fc57b6e4	3857
mbed_official	381:5460fc57b6e4	3858	/**
mbed_official	381:5460fc57b6e4	3859	* @brief Configures the event filtering capabilities of a timer (blanking, windowing)
mbed_official	381:5460fc57b6e4	3860	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	3861	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	3862	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	3863	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	3864	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	3865	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	3866	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	3867	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	3868	* @param Event: external event for which timer event filtering must be configured
mbed_official	381:5460fc57b6e4	3869	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	3870	* @arg HRTIM_EVENT_NONE: Reset timer event filtering configuration
mbed_official	381:5460fc57b6e4	3871	* @arg HRTIM_EVENT_1: External event 1
mbed_official	381:5460fc57b6e4	3872	* @arg HRTIM_EVENT_2: External event 2
mbed_official	381:5460fc57b6e4	3873	* @arg HRTIM_EVENT_3: External event 3
mbed_official	381:5460fc57b6e4	3874	* @arg HRTIM_EVENT_4: External event 4
mbed_official	381:5460fc57b6e4	3875	* @arg HRTIM_EVENT_5: External event 5
mbed_official	381:5460fc57b6e4	3876	* @arg HRTIM_EVENT_6: External event 6
mbed_official	381:5460fc57b6e4	3877	* @arg HRTIM_EVENT_7: External event 7
mbed_official	381:5460fc57b6e4	3878	* @arg HRTIM_EVENT_8: External event 8
mbed_official	381:5460fc57b6e4	3879	* @arg HRTIM_EVENT_9: External event 9
mbed_official	381:5460fc57b6e4	3880	* @arg HRTIM_EVENT_10: External event 10
mbed_official	381:5460fc57b6e4	3881	* @param pTimerEventFilteringCfg: pointer to the timer event filtering configuration structure
mbed_official	381:5460fc57b6e4	3882	* @note This function must be called before starting the timer
mbed_official	381:5460fc57b6e4	3883	* @retval HAL status
mbed_official	381:5460fc57b6e4	3884	*/
mbed_official	381:5460fc57b6e4	3885	HAL_StatusTypeDef HAL_HRTIM_TimerEventFilteringConfig(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	3886	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	3887	uint32_t Event,
mbed_official	381:5460fc57b6e4	3888	HRTIM_TimerEventFilteringCfgTypeDef* pTimerEventFilteringCfg)
mbed_official	381:5460fc57b6e4	3889	{
mbed_official	381:5460fc57b6e4	3890	uint32_t hrtim_eefr;
mbed_official	381:5460fc57b6e4	3891
mbed_official	381:5460fc57b6e4	3892	/* Check parameters */
mbed_official	381:5460fc57b6e4	3893	assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
mbed_official	381:5460fc57b6e4	3894	assert_param(IS_HRTIM_EVENT(Event));
mbed_official	381:5460fc57b6e4	3895	assert_param(IS_HRTIM_TIMEVENTFILTER(pTimerEventFilteringCfg->Filter));
mbed_official	381:5460fc57b6e4	3896	assert_param(IS_HRTIM_TIMEVENTLATCH(pTimerEventFilteringCfg->Latch));
mbed_official	381:5460fc57b6e4	3897
mbed_official	381:5460fc57b6e4	3898	if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
mbed_official	381:5460fc57b6e4	3899	{
mbed_official	381:5460fc57b6e4	3900	return HAL_BUSY;
mbed_official	381:5460fc57b6e4	3901	}
mbed_official	381:5460fc57b6e4	3902
mbed_official	381:5460fc57b6e4	3903	/* Process Locked */
mbed_official	381:5460fc57b6e4	3904	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	3905
mbed_official	381:5460fc57b6e4	3906	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	3907
mbed_official	381:5460fc57b6e4	3908	/* Configure timer event filtering capabilities */
mbed_official	381:5460fc57b6e4	3909	switch (Event)
mbed_official	381:5460fc57b6e4	3910	{
mbed_official	381:5460fc57b6e4	3911	case HRTIM_EVENT_NONE:
mbed_official	381:5460fc57b6e4	3912	{
mbed_official	381:5460fc57b6e4	3913	hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR1 = 0;
mbed_official	381:5460fc57b6e4	3914	hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR2 = 0;
mbed_official	381:5460fc57b6e4	3915	}
mbed_official	381:5460fc57b6e4	3916	break;
mbed_official	381:5460fc57b6e4	3917	case HRTIM_EVENT_1:
mbed_official	381:5460fc57b6e4	3918	{
mbed_official	381:5460fc57b6e4	3919	hrtim_eefr = hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR1;
mbed_official	381:5460fc57b6e4	3920	hrtim_eefr &= ~(HRTIM_EEFR1_EE1FLTR \| HRTIM_EEFR1_EE1LTCH);
mbed_official	381:5460fc57b6e4	3921	hrtim_eefr \|= (pTimerEventFilteringCfg->Filter \| pTimerEventFilteringCfg->Latch);
mbed_official	381:5460fc57b6e4	3922	hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR1 = hrtim_eefr;
mbed_official	381:5460fc57b6e4	3923	}
mbed_official	381:5460fc57b6e4	3924	break;
mbed_official	381:5460fc57b6e4	3925	case HRTIM_EVENT_2:
mbed_official	381:5460fc57b6e4	3926	{
mbed_official	381:5460fc57b6e4	3927	hrtim_eefr = hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR1;
mbed_official	381:5460fc57b6e4	3928	hrtim_eefr &= ~(HRTIM_EEFR1_EE2FLTR \| HRTIM_EEFR1_EE2LTCH);
mbed_official	381:5460fc57b6e4	3929	hrtim_eefr \|= ((pTimerEventFilteringCfg->Filter \| pTimerEventFilteringCfg->Latch) << 6);
mbed_official	381:5460fc57b6e4	3930	hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR1 = hrtim_eefr;
mbed_official	381:5460fc57b6e4	3931	}
mbed_official	381:5460fc57b6e4	3932	break;
mbed_official	381:5460fc57b6e4	3933	case HRTIM_EVENT_3:
mbed_official	381:5460fc57b6e4	3934	{
mbed_official	381:5460fc57b6e4	3935	hrtim_eefr = hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR1;
mbed_official	381:5460fc57b6e4	3936	hrtim_eefr &= ~(HRTIM_EEFR1_EE3FLTR \| HRTIM_EEFR1_EE3LTCH);
mbed_official	381:5460fc57b6e4	3937	hrtim_eefr \|= ((pTimerEventFilteringCfg->Filter \| pTimerEventFilteringCfg->Latch) << 12);
mbed_official	381:5460fc57b6e4	3938	hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR1 = hrtim_eefr;
mbed_official	381:5460fc57b6e4	3939	}
mbed_official	381:5460fc57b6e4	3940	break;
mbed_official	381:5460fc57b6e4	3941	case HRTIM_EVENT_4:
mbed_official	381:5460fc57b6e4	3942	{
mbed_official	381:5460fc57b6e4	3943	hrtim_eefr = hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR1;
mbed_official	381:5460fc57b6e4	3944	hrtim_eefr &= ~(HRTIM_EEFR1_EE4FLTR \| HRTIM_EEFR1_EE4LTCH);
mbed_official	381:5460fc57b6e4	3945	hrtim_eefr \|= ((pTimerEventFilteringCfg->Filter \| pTimerEventFilteringCfg->Latch) << 18);
mbed_official	381:5460fc57b6e4	3946	hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR1 = hrtim_eefr;
mbed_official	381:5460fc57b6e4	3947	}
mbed_official	381:5460fc57b6e4	3948	break;
mbed_official	381:5460fc57b6e4	3949	case HRTIM_EVENT_5:
mbed_official	381:5460fc57b6e4	3950	{
mbed_official	381:5460fc57b6e4	3951	hrtim_eefr = hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR1;
mbed_official	381:5460fc57b6e4	3952	hrtim_eefr &= ~(HRTIM_EEFR1_EE5FLTR \| HRTIM_EEFR1_EE5LTCH);
mbed_official	381:5460fc57b6e4	3953	hrtim_eefr \|= ((pTimerEventFilteringCfg->Filter \| pTimerEventFilteringCfg->Latch) << 24);
mbed_official	381:5460fc57b6e4	3954	hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR1 = hrtim_eefr;
mbed_official	381:5460fc57b6e4	3955	}
mbed_official	381:5460fc57b6e4	3956	break;
mbed_official	381:5460fc57b6e4	3957	case HRTIM_EVENT_6:
mbed_official	381:5460fc57b6e4	3958	{
mbed_official	381:5460fc57b6e4	3959	hrtim_eefr = hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR2;
mbed_official	381:5460fc57b6e4	3960	hrtim_eefr &= ~(HRTIM_EEFR2_EE6FLTR \| HRTIM_EEFR2_EE6LTCH);
mbed_official	381:5460fc57b6e4	3961	hrtim_eefr \|= (pTimerEventFilteringCfg->Filter \| pTimerEventFilteringCfg->Latch);
mbed_official	381:5460fc57b6e4	3962	hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR2 = hrtim_eefr;
mbed_official	381:5460fc57b6e4	3963	}
mbed_official	381:5460fc57b6e4	3964	break;
mbed_official	381:5460fc57b6e4	3965	case HRTIM_EVENT_7:
mbed_official	381:5460fc57b6e4	3966	{
mbed_official	381:5460fc57b6e4	3967	hrtim_eefr = hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR2;
mbed_official	381:5460fc57b6e4	3968	hrtim_eefr &= ~(HRTIM_EEFR2_EE7FLTR \| HRTIM_EEFR2_EE7LTCH);
mbed_official	381:5460fc57b6e4	3969	hrtim_eefr \|= ((pTimerEventFilteringCfg->Filter \| pTimerEventFilteringCfg->Latch) << 6);
mbed_official	381:5460fc57b6e4	3970	hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR2 = hrtim_eefr;
mbed_official	381:5460fc57b6e4	3971	}
mbed_official	381:5460fc57b6e4	3972	break;
mbed_official	381:5460fc57b6e4	3973	case HRTIM_EVENT_8:
mbed_official	381:5460fc57b6e4	3974	{
mbed_official	381:5460fc57b6e4	3975	hrtim_eefr = hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR2;
mbed_official	381:5460fc57b6e4	3976	hrtim_eefr &= ~(HRTIM_EEFR2_EE8FLTR \| HRTIM_EEFR2_EE8LTCH);
mbed_official	381:5460fc57b6e4	3977	hrtim_eefr \|= ((pTimerEventFilteringCfg->Filter \| pTimerEventFilteringCfg->Latch) << 12);
mbed_official	381:5460fc57b6e4	3978	hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR2 = hrtim_eefr;
mbed_official	381:5460fc57b6e4	3979	}
mbed_official	381:5460fc57b6e4	3980	break;
mbed_official	381:5460fc57b6e4	3981	case HRTIM_EVENT_9:
mbed_official	381:5460fc57b6e4	3982	{
mbed_official	381:5460fc57b6e4	3983	hrtim_eefr = hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR2;
mbed_official	381:5460fc57b6e4	3984	hrtim_eefr &= ~(HRTIM_EEFR2_EE9FLTR \| HRTIM_EEFR2_EE9LTCH);
mbed_official	381:5460fc57b6e4	3985	hrtim_eefr \|= ((pTimerEventFilteringCfg->Filter \| pTimerEventFilteringCfg->Latch) << 18);
mbed_official	381:5460fc57b6e4	3986	hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR2 = hrtim_eefr;
mbed_official	381:5460fc57b6e4	3987	}
mbed_official	381:5460fc57b6e4	3988	break;
mbed_official	381:5460fc57b6e4	3989	case HRTIM_EVENT_10:
mbed_official	381:5460fc57b6e4	3990	{
mbed_official	381:5460fc57b6e4	3991	hrtim_eefr = hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR2;
mbed_official	381:5460fc57b6e4	3992	hrtim_eefr &= ~(HRTIM_EEFR2_EE10FLTR \| HRTIM_EEFR2_EE10LTCH);
mbed_official	381:5460fc57b6e4	3993	hrtim_eefr \|= ((pTimerEventFilteringCfg->Filter \| pTimerEventFilteringCfg->Latch) << 24);
mbed_official	381:5460fc57b6e4	3994	hhrtim->Instance->sTimerxRegs[TimerIdx].EEFxR2 = hrtim_eefr;
mbed_official	381:5460fc57b6e4	3995	}
mbed_official	381:5460fc57b6e4	3996	break;
mbed_official	381:5460fc57b6e4	3997	}
mbed_official	381:5460fc57b6e4	3998
mbed_official	381:5460fc57b6e4	3999	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	4000
mbed_official	381:5460fc57b6e4	4001	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	4002	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	4003
mbed_official	381:5460fc57b6e4	4004	return HAL_OK;
mbed_official	381:5460fc57b6e4	4005	}
mbed_official	381:5460fc57b6e4	4006
mbed_official	381:5460fc57b6e4	4007	/**
mbed_official	381:5460fc57b6e4	4008	* @brief Configures the deadtime insertion feature for a timer
mbed_official	381:5460fc57b6e4	4009	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	4010	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	4011	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	4012	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	4013	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	4014	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	4015	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	4016	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	4017	* @param pDeadTimeCfg: pointer to the deadtime insertion configuration structure
mbed_official	381:5460fc57b6e4	4018	* @retval HAL status
mbed_official	381:5460fc57b6e4	4019	* @note This function must be called before starting the timer
mbed_official	381:5460fc57b6e4	4020	*/
mbed_official	381:5460fc57b6e4	4021	HAL_StatusTypeDef HAL_HRTIM_DeadTimeConfig(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	4022	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	4023	HRTIM_DeadTimeCfgTypeDef* pDeadTimeCfg)
mbed_official	381:5460fc57b6e4	4024	{
mbed_official	381:5460fc57b6e4	4025	uint32_t hrtim_dtr;
mbed_official	381:5460fc57b6e4	4026
mbed_official	381:5460fc57b6e4	4027	/* Check parameters */
mbed_official	381:5460fc57b6e4	4028	assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
mbed_official	381:5460fc57b6e4	4029	assert_param(IS_HRTIM_TIMDEADTIME_PRESCALERRATIO(pDeadTimeCfg->Prescaler));
mbed_official	381:5460fc57b6e4	4030	assert_param(IS_HRTIM_TIMDEADTIME_RISINGSIGN(pDeadTimeCfg->RisingSign));
mbed_official	381:5460fc57b6e4	4031	assert_param(IS_HRTIM_TIMDEADTIME_RISINGLOCK(pDeadTimeCfg->RisingLock));
mbed_official	381:5460fc57b6e4	4032	assert_param(IS_HRTIM_TIMDEADTIME_RISINGSIGNLOCK(pDeadTimeCfg->RisingSignLock));
mbed_official	381:5460fc57b6e4	4033	assert_param(IS_HRTIM_TIMDEADTIME_FALLINGSIGN(pDeadTimeCfg->FallingSign));
mbed_official	381:5460fc57b6e4	4034	assert_param(IS_HRTIM_TIMDEADTIME_FALLINGLOCK(pDeadTimeCfg->FallingLock));
mbed_official	381:5460fc57b6e4	4035	assert_param(IS_HRTIM_TIMDEADTIME_FALLINGSIGNLOCK(pDeadTimeCfg->FallingSignLock));
mbed_official	381:5460fc57b6e4	4036
mbed_official	381:5460fc57b6e4	4037	if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
mbed_official	381:5460fc57b6e4	4038	{
mbed_official	381:5460fc57b6e4	4039	return HAL_BUSY;
mbed_official	381:5460fc57b6e4	4040	}
mbed_official	381:5460fc57b6e4	4041
mbed_official	381:5460fc57b6e4	4042	/* Process Locked */
mbed_official	381:5460fc57b6e4	4043	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	4044
mbed_official	381:5460fc57b6e4	4045	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	4046
mbed_official	381:5460fc57b6e4	4047	hrtim_dtr = hhrtim->Instance->sTimerxRegs[TimerIdx].DTxR;
mbed_official	381:5460fc57b6e4	4048
mbed_official	381:5460fc57b6e4	4049	/* Clear timer deadtime configuration */
mbed_official	381:5460fc57b6e4	4050	hrtim_dtr &= ~(HRTIM_DTR_DTR \| HRTIM_DTR_SDTR \| HRTIM_DTR_DTPRSC \|
mbed_official	381:5460fc57b6e4	4051	HRTIM_DTR_DTRSLK \| HRTIM_DTR_DTRLK \| HRTIM_DTR_DTF \|
mbed_official	381:5460fc57b6e4	4052	HRTIM_DTR_SDTF \| HRTIM_DTR_DTFSLK \| HRTIM_DTR_DTFLK);
mbed_official	381:5460fc57b6e4	4053
mbed_official	381:5460fc57b6e4	4054	/* Set timer deadtime configuration */
mbed_official	381:5460fc57b6e4	4055	hrtim_dtr \|= pDeadTimeCfg->Prescaler;
mbed_official	381:5460fc57b6e4	4056	hrtim_dtr \|= pDeadTimeCfg->RisingValue;
mbed_official	381:5460fc57b6e4	4057	hrtim_dtr \|= pDeadTimeCfg->RisingSign;
mbed_official	381:5460fc57b6e4	4058	hrtim_dtr \|= pDeadTimeCfg->RisingSignLock;
mbed_official	381:5460fc57b6e4	4059	hrtim_dtr \|= pDeadTimeCfg->RisingLock;
mbed_official	381:5460fc57b6e4	4060	hrtim_dtr \|= (pDeadTimeCfg->FallingValue << 16);
mbed_official	381:5460fc57b6e4	4061	hrtim_dtr \|= pDeadTimeCfg->FallingSign;
mbed_official	381:5460fc57b6e4	4062	hrtim_dtr \|= pDeadTimeCfg->FallingSignLock;
mbed_official	381:5460fc57b6e4	4063	hrtim_dtr \|= pDeadTimeCfg->FallingLock;
mbed_official	381:5460fc57b6e4	4064
mbed_official	381:5460fc57b6e4	4065	/* Update the HRTIM registers */
mbed_official	381:5460fc57b6e4	4066	hhrtim->Instance->sTimerxRegs[TimerIdx].DTxR = hrtim_dtr;
mbed_official	381:5460fc57b6e4	4067
mbed_official	381:5460fc57b6e4	4068	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	4069
mbed_official	381:5460fc57b6e4	4070	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	4071	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	4072
mbed_official	381:5460fc57b6e4	4073	return HAL_OK;
mbed_official	381:5460fc57b6e4	4074	}
mbed_official	381:5460fc57b6e4	4075
mbed_official	381:5460fc57b6e4	4076	/**
mbed_official	381:5460fc57b6e4	4077	* @brief Configures the chopper mode feature for a timer
mbed_official	381:5460fc57b6e4	4078	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	4079	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	4080	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	4081	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	4082	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	4083	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	4084	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	4085	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	4086	* @param pChopperModeCfg: pointer to the chopper mode configuration structure
mbed_official	381:5460fc57b6e4	4087	* @retval HAL status
mbed_official	381:5460fc57b6e4	4088	* @note This function must be called before configuring the timer output(s)
mbed_official	381:5460fc57b6e4	4089	*/
mbed_official	381:5460fc57b6e4	4090	HAL_StatusTypeDef HAL_HRTIM_ChopperModeConfig(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	4091	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	4092	HRTIM_ChopperModeCfgTypeDef* pChopperModeCfg)
mbed_official	381:5460fc57b6e4	4093	{
mbed_official	381:5460fc57b6e4	4094	uint32_t hrtim_chpr;
mbed_official	381:5460fc57b6e4	4095
mbed_official	381:5460fc57b6e4	4096	/* Check parameters */
mbed_official	381:5460fc57b6e4	4097	assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
mbed_official	381:5460fc57b6e4	4098	assert_param(IS_HRTIM_CHOPPER_PRESCALERRATIO(pChopperModeCfg->CarrierFreq));
mbed_official	381:5460fc57b6e4	4099	assert_param(IS_HRTIM_CHOPPER_DUTYCYCLE(pChopperModeCfg->DutyCycle));
mbed_official	381:5460fc57b6e4	4100	assert_param(IS_HRTIM_CHOPPER_PULSEWIDTH(pChopperModeCfg->StartPulse));
mbed_official	381:5460fc57b6e4	4101
mbed_official	381:5460fc57b6e4	4102	if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
mbed_official	381:5460fc57b6e4	4103	{
mbed_official	381:5460fc57b6e4	4104	return HAL_BUSY;
mbed_official	381:5460fc57b6e4	4105	}
mbed_official	381:5460fc57b6e4	4106
mbed_official	381:5460fc57b6e4	4107	/* Process Locked */
mbed_official	381:5460fc57b6e4	4108	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	4109
mbed_official	381:5460fc57b6e4	4110	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	4111
mbed_official	381:5460fc57b6e4	4112	hrtim_chpr = hhrtim->Instance->sTimerxRegs[TimerIdx].CHPxR;
mbed_official	381:5460fc57b6e4	4113
mbed_official	381:5460fc57b6e4	4114	/* Clear timer chopper mode configuration */
mbed_official	381:5460fc57b6e4	4115	hrtim_chpr &= ~(HRTIM_CHPR_CARFRQ \| HRTIM_CHPR_CARDTY \| HRTIM_CHPR_STRPW);
mbed_official	381:5460fc57b6e4	4116
mbed_official	381:5460fc57b6e4	4117	/* Set timer choppe mode configuration */
mbed_official	381:5460fc57b6e4	4118	hrtim_chpr \|= pChopperModeCfg->CarrierFreq;
mbed_official	381:5460fc57b6e4	4119	hrtim_chpr \|= (pChopperModeCfg->DutyCycle);
mbed_official	381:5460fc57b6e4	4120	hrtim_chpr \|= (pChopperModeCfg->StartPulse);
mbed_official	381:5460fc57b6e4	4121
mbed_official	381:5460fc57b6e4	4122	/* Update the HRTIM registers */
mbed_official	381:5460fc57b6e4	4123	hhrtim->Instance->sTimerxRegs[TimerIdx].CHPxR = hrtim_chpr;
mbed_official	381:5460fc57b6e4	4124
mbed_official	381:5460fc57b6e4	4125	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	4126
mbed_official	381:5460fc57b6e4	4127	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	4128	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	4129
mbed_official	381:5460fc57b6e4	4130	return HAL_OK;
mbed_official	381:5460fc57b6e4	4131	}
mbed_official	381:5460fc57b6e4	4132
mbed_official	381:5460fc57b6e4	4133	/**
mbed_official	381:5460fc57b6e4	4134	* @brief Configures the burst DMA controller for a timer
mbed_official	381:5460fc57b6e4	4135	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	4136	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	4137	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	4138	* @arg HRTIM_TIMERINDEX_MASTER for master timer
mbed_official	381:5460fc57b6e4	4139	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	4140	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	4141	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	4142	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	4143	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	4144	* @param RegistersToUpdate: registers to be written by DMA
mbed_official	381:5460fc57b6e4	4145	* This parameter can be any combination of the following values:
mbed_official	381:5460fc57b6e4	4146	* @arg HRTIM_BURSTDMA_CR: HRTIM_MCR or HRTIM_TIMxCR
mbed_official	381:5460fc57b6e4	4147	* @arg HRTIM_BURSTDMA_ICR: HRTIM_MICR or HRTIM_TIMxICR
mbed_official	381:5460fc57b6e4	4148	* @arg HRTIM_BURSTDMA_DIER: HRTIM_MDIER or HRTIM_TIMxDIER
mbed_official	381:5460fc57b6e4	4149	* @arg HRTIM_BURSTDMA_CNT: HRTIM_MCNT or HRTIM_TIMxCNT
mbed_official	381:5460fc57b6e4	4150	* @arg HRTIM_BURSTDMA_PER: HRTIM_MPER or HRTIM_TIMxPER
mbed_official	381:5460fc57b6e4	4151	* @arg HRTIM_BURSTDMA_REP: HRTIM_MREP or HRTIM_TIMxREP
mbed_official	381:5460fc57b6e4	4152	* @arg HRTIM_BURSTDMA_CMP1: HRTIM_MCMP1 or HRTIM_TIMxCMP1
mbed_official	381:5460fc57b6e4	4153	* @arg HRTIM_BURSTDMA_CMP2: HRTIM_MCMP2 or HRTIM_TIMxCMP2
mbed_official	381:5460fc57b6e4	4154	* @arg HRTIM_BURSTDMA_CMP3: HRTIM_MCMP3 or HRTIM_TIMxCMP3
mbed_official	381:5460fc57b6e4	4155	* @arg HRTIM_BURSTDMA_CMP4: HRTIM_MCMP4 or HRTIM_TIMxCMP4
mbed_official	381:5460fc57b6e4	4156	* @arg HRTIM_BURSTDMA_DTR: HRTIM_TIMxDTR
mbed_official	381:5460fc57b6e4	4157	* @arg HRTIM_BURSTDMA_SET1R: HRTIM_TIMxSET1R
mbed_official	381:5460fc57b6e4	4158	* @arg HRTIM_BURSTDMA_RST1R: HRTIM_TIMxRST1R
mbed_official	381:5460fc57b6e4	4159	* @arg HRTIM_BURSTDMA_SET2R: HRTIM_TIMxSET2R
mbed_official	381:5460fc57b6e4	4160	* @arg HRTIM_BURSTDMA_RST2R: HRTIM_TIMxRST2R
mbed_official	381:5460fc57b6e4	4161	* @arg HRTIM_BURSTDMA_EEFR1: HRTIM_TIMxEEFR1
mbed_official	381:5460fc57b6e4	4162	* @arg HRTIM_BURSTDMA_EEFR2: HRTIM_TIMxEEFR2
mbed_official	381:5460fc57b6e4	4163	* @arg HRTIM_BURSTDMA_RSTR: HRTIM_TIMxRSTR
mbed_official	381:5460fc57b6e4	4164	* @arg HRTIM_BURSTDMA_CHPR: HRTIM_TIMxCHPR
mbed_official	381:5460fc57b6e4	4165	* @arg HRTIM_BURSTDMA_OUTR: HRTIM_TIMxOUTR
mbed_official	381:5460fc57b6e4	4166	* @arg HRTIM_BURSTDMA_FLTR: HRTIM_TIMxFLTR
mbed_official	381:5460fc57b6e4	4167	* @retval HAL status
mbed_official	381:5460fc57b6e4	4168	* @note This function must be called before starting the timer
mbed_official	381:5460fc57b6e4	4169	*/
mbed_official	381:5460fc57b6e4	4170	HAL_StatusTypeDef HAL_HRTIM_BurstDMAConfig(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	4171	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	4172	uint32_t RegistersToUpdate)
mbed_official	381:5460fc57b6e4	4173	{
mbed_official	381:5460fc57b6e4	4174	/* Check parameters */
mbed_official	381:5460fc57b6e4	4175	assert_param(IS_HRTIM_TIMER_BURSTDMA(TimerIdx, RegistersToUpdate));
mbed_official	381:5460fc57b6e4	4176
mbed_official	381:5460fc57b6e4	4177	if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
mbed_official	381:5460fc57b6e4	4178	{
mbed_official	381:5460fc57b6e4	4179	return HAL_BUSY;
mbed_official	381:5460fc57b6e4	4180	}
mbed_official	381:5460fc57b6e4	4181
mbed_official	381:5460fc57b6e4	4182	/* Process Locked */
mbed_official	381:5460fc57b6e4	4183	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	4184
mbed_official	381:5460fc57b6e4	4185	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	4186
mbed_official	381:5460fc57b6e4	4187	/* Set the burst DMA timer update register */
mbed_official	381:5460fc57b6e4	4188	switch (TimerIdx)
mbed_official	381:5460fc57b6e4	4189	{
mbed_official	381:5460fc57b6e4	4190	case HRTIM_TIMERINDEX_TIMER_A:
mbed_official	381:5460fc57b6e4	4191	{
mbed_official	381:5460fc57b6e4	4192	hhrtim->Instance->sCommonRegs.BDTAUPR = RegistersToUpdate;
mbed_official	381:5460fc57b6e4	4193	}
mbed_official	381:5460fc57b6e4	4194	break;
mbed_official	381:5460fc57b6e4	4195	case HRTIM_TIMERINDEX_TIMER_B:
mbed_official	381:5460fc57b6e4	4196	{
mbed_official	381:5460fc57b6e4	4197	hhrtim->Instance->sCommonRegs.BDTBUPR = RegistersToUpdate;
mbed_official	381:5460fc57b6e4	4198	}
mbed_official	381:5460fc57b6e4	4199	break;
mbed_official	381:5460fc57b6e4	4200	case HRTIM_TIMERINDEX_TIMER_C:
mbed_official	381:5460fc57b6e4	4201	{
mbed_official	381:5460fc57b6e4	4202	hhrtim->Instance->sCommonRegs.BDTCUPR = RegistersToUpdate;
mbed_official	381:5460fc57b6e4	4203	}
mbed_official	381:5460fc57b6e4	4204	break;
mbed_official	381:5460fc57b6e4	4205	case HRTIM_TIMERINDEX_TIMER_D:
mbed_official	381:5460fc57b6e4	4206	{
mbed_official	381:5460fc57b6e4	4207	hhrtim->Instance->sCommonRegs.BDTDUPR = RegistersToUpdate;
mbed_official	381:5460fc57b6e4	4208	}
mbed_official	381:5460fc57b6e4	4209	break;
mbed_official	381:5460fc57b6e4	4210	case HRTIM_TIMERINDEX_TIMER_E:
mbed_official	381:5460fc57b6e4	4211	{
mbed_official	381:5460fc57b6e4	4212	hhrtim->Instance->sCommonRegs.BDTEUPR = RegistersToUpdate;
mbed_official	381:5460fc57b6e4	4213	}
mbed_official	381:5460fc57b6e4	4214	break;
mbed_official	381:5460fc57b6e4	4215	case HRTIM_TIMERINDEX_MASTER:
mbed_official	381:5460fc57b6e4	4216	{
mbed_official	381:5460fc57b6e4	4217	hhrtim->Instance->sCommonRegs.BDMUPR = RegistersToUpdate;
mbed_official	381:5460fc57b6e4	4218	}
mbed_official	381:5460fc57b6e4	4219	break;
mbed_official	381:5460fc57b6e4	4220	}
mbed_official	381:5460fc57b6e4	4221
mbed_official	381:5460fc57b6e4	4222	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	4223
mbed_official	381:5460fc57b6e4	4224	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	4225	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	4226
mbed_official	381:5460fc57b6e4	4227	return HAL_OK;
mbed_official	381:5460fc57b6e4	4228	}
mbed_official	381:5460fc57b6e4	4229
mbed_official	381:5460fc57b6e4	4230	/**
mbed_official	381:5460fc57b6e4	4231	* @brief Configures the compare unit of a timer operating in waveform mode
mbed_official	381:5460fc57b6e4	4232	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	4233	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	4234	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	4235	* @arg HRTIM_TIMERINDEX_MASTER for master timer
mbed_official	381:5460fc57b6e4	4236	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	4237	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	4238	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	4239	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	4240	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	4241	* @param CompareUnit: Compare unit to configure
mbed_official	381:5460fc57b6e4	4242	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	4243	* @arg HRTIM_COMPAREUNIT_1: Compare unit 1
mbed_official	381:5460fc57b6e4	4244	* @arg HRTIM_COMPAREUNIT_2: Compare unit 2
mbed_official	381:5460fc57b6e4	4245	* @arg HRTIM_COMPAREUNIT_3: Compare unit 3
mbed_official	381:5460fc57b6e4	4246	* @arg HRTIM_COMPAREUNIT_4: Compare unit 4
mbed_official	381:5460fc57b6e4	4247	* @param pCompareCfg: pointer to the compare unit configuration structure
mbed_official	381:5460fc57b6e4	4248	* @note When auto delayed mode is required for compare unit 2 or compare unit 4,
mbed_official	381:5460fc57b6e4	4249	* application has to configure separately the capture unit. Capture unit
mbed_official	381:5460fc57b6e4	4250	* to configure in that case depends on the compare unit auto delayed mode
mbed_official	381:5460fc57b6e4	4251	* is applied to (see below):
mbed_official	381:5460fc57b6e4	4252	* Auto delayed on output compare 2: capture unit 1 must be configured
mbed_official	381:5460fc57b6e4	4253	* Auto delayed on output compare 4: capture unit 2 must be configured
mbed_official	381:5460fc57b6e4	4254	* @retval HAL status
mbed_official	381:5460fc57b6e4	4255	* @note This function must be called before starting the timer
mbed_official	381:5460fc57b6e4	4256	*/
mbed_official	381:5460fc57b6e4	4257	HAL_StatusTypeDef HAL_HRTIM_WaveformCompareConfig(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	4258	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	4259	uint32_t CompareUnit,
mbed_official	381:5460fc57b6e4	4260	HRTIM_CompareCfgTypeDef* pCompareCfg)
mbed_official	381:5460fc57b6e4	4261	{
mbed_official	381:5460fc57b6e4	4262	/* Check parameters */
mbed_official	381:5460fc57b6e4	4263	assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
mbed_official	381:5460fc57b6e4	4264
mbed_official	381:5460fc57b6e4	4265	if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
mbed_official	381:5460fc57b6e4	4266	{
mbed_official	381:5460fc57b6e4	4267	return HAL_BUSY;
mbed_official	381:5460fc57b6e4	4268	}
mbed_official	381:5460fc57b6e4	4269
mbed_official	381:5460fc57b6e4	4270	/* Process Locked */
mbed_official	381:5460fc57b6e4	4271	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	4272
mbed_official	381:5460fc57b6e4	4273	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	4274
mbed_official	381:5460fc57b6e4	4275	/* Configure the compare unit */
mbed_official	381:5460fc57b6e4	4276	if (TimerIdx == HRTIM_TIMERINDEX_MASTER)
mbed_official	381:5460fc57b6e4	4277	{
mbed_official	381:5460fc57b6e4	4278	switch (CompareUnit)
mbed_official	381:5460fc57b6e4	4279	{
mbed_official	381:5460fc57b6e4	4280	case HRTIM_COMPAREUNIT_1:
mbed_official	381:5460fc57b6e4	4281	{
mbed_official	381:5460fc57b6e4	4282	hhrtim->Instance->sMasterRegs.MCMP1R = pCompareCfg->CompareValue;
mbed_official	381:5460fc57b6e4	4283	}
mbed_official	381:5460fc57b6e4	4284	break;
mbed_official	381:5460fc57b6e4	4285	case HRTIM_COMPAREUNIT_2:
mbed_official	381:5460fc57b6e4	4286	{
mbed_official	381:5460fc57b6e4	4287	hhrtim->Instance->sMasterRegs.MCMP2R = pCompareCfg->CompareValue;
mbed_official	381:5460fc57b6e4	4288	}
mbed_official	381:5460fc57b6e4	4289	break;
mbed_official	381:5460fc57b6e4	4290	case HRTIM_COMPAREUNIT_3:
mbed_official	381:5460fc57b6e4	4291	{
mbed_official	381:5460fc57b6e4	4292	hhrtim->Instance->sMasterRegs.MCMP3R = pCompareCfg->CompareValue;
mbed_official	381:5460fc57b6e4	4293	}
mbed_official	381:5460fc57b6e4	4294	break;
mbed_official	381:5460fc57b6e4	4295	case HRTIM_COMPAREUNIT_4:
mbed_official	381:5460fc57b6e4	4296	{
mbed_official	381:5460fc57b6e4	4297	hhrtim->Instance->sMasterRegs.MCMP4R = pCompareCfg->CompareValue;
mbed_official	381:5460fc57b6e4	4298	}
mbed_official	381:5460fc57b6e4	4299	break;
mbed_official	381:5460fc57b6e4	4300	}
mbed_official	381:5460fc57b6e4	4301	}
mbed_official	381:5460fc57b6e4	4302	else
mbed_official	381:5460fc57b6e4	4303	{
mbed_official	381:5460fc57b6e4	4304	switch (CompareUnit)
mbed_official	381:5460fc57b6e4	4305	{
mbed_official	381:5460fc57b6e4	4306	case HRTIM_COMPAREUNIT_1:
mbed_official	381:5460fc57b6e4	4307	{
mbed_official	381:5460fc57b6e4	4308	/* Set the compare value */
mbed_official	381:5460fc57b6e4	4309	hhrtim->Instance->sTimerxRegs[TimerIdx].CMP1xR = pCompareCfg->CompareValue;
mbed_official	381:5460fc57b6e4	4310	}
mbed_official	381:5460fc57b6e4	4311	break;
mbed_official	381:5460fc57b6e4	4312	case HRTIM_COMPAREUNIT_2:
mbed_official	381:5460fc57b6e4	4313	{
mbed_official	381:5460fc57b6e4	4314	/* Check parameters */
mbed_official	381:5460fc57b6e4	4315	assert_param(IS_HRTIM_COMPAREUNIT_AUTODELAYEDMODE(CompareUnit, pCompareCfg->AutoDelayedMode));
mbed_official	381:5460fc57b6e4	4316
mbed_official	381:5460fc57b6e4	4317	/* Set the compare value */
mbed_official	381:5460fc57b6e4	4318	hhrtim->Instance->sTimerxRegs[TimerIdx].CMP2xR = pCompareCfg->CompareValue;
mbed_official	381:5460fc57b6e4	4319
mbed_official	381:5460fc57b6e4	4320	if (pCompareCfg->AutoDelayedMode != HRTIM_AUTODELAYEDMODE_REGULAR)
mbed_official	381:5460fc57b6e4	4321	{
mbed_official	381:5460fc57b6e4	4322	/* Configure auto-delayed mode */
mbed_official	381:5460fc57b6e4	4323	/* DELCMP2 bitfield must be reset when reprogrammed from one value */
mbed_official	381:5460fc57b6e4	4324	/* to the other to reinitialize properly the auto-delayed mechanism */
mbed_official	381:5460fc57b6e4	4325	hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR &= ~HRTIM_TIMCR_DELCMP2;
mbed_official	381:5460fc57b6e4	4326	hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR \|= pCompareCfg->AutoDelayedMode;
mbed_official	381:5460fc57b6e4	4327
mbed_official	381:5460fc57b6e4	4328	/* Set the compare value for timeout compare unit (if any) */
mbed_official	381:5460fc57b6e4	4329	if (pCompareCfg->AutoDelayedMode == HRTIM_AUTODELAYEDMODE_AUTODELAYED_TIMEOUTCMP1)
mbed_official	381:5460fc57b6e4	4330	{
mbed_official	381:5460fc57b6e4	4331	hhrtim->Instance->sTimerxRegs[TimerIdx].CMP1xR = pCompareCfg->AutoDelayedTimeout;
mbed_official	381:5460fc57b6e4	4332	}
mbed_official	381:5460fc57b6e4	4333	else if (pCompareCfg->AutoDelayedMode == HRTIM_AUTODELAYEDMODE_AUTODELAYED_TIMEOUTCMP3)
mbed_official	381:5460fc57b6e4	4334	{
mbed_official	381:5460fc57b6e4	4335	hhrtim->Instance->sTimerxRegs[TimerIdx].CMP3xR = pCompareCfg->AutoDelayedTimeout;
mbed_official	381:5460fc57b6e4	4336	}
mbed_official	381:5460fc57b6e4	4337	}
mbed_official	381:5460fc57b6e4	4338	}
mbed_official	381:5460fc57b6e4	4339	break;
mbed_official	381:5460fc57b6e4	4340	case HRTIM_COMPAREUNIT_3:
mbed_official	381:5460fc57b6e4	4341	{
mbed_official	381:5460fc57b6e4	4342	/* Set the compare value */
mbed_official	381:5460fc57b6e4	4343	hhrtim->Instance->sTimerxRegs[TimerIdx].CMP3xR = pCompareCfg->CompareValue;
mbed_official	381:5460fc57b6e4	4344	}
mbed_official	381:5460fc57b6e4	4345	break;
mbed_official	381:5460fc57b6e4	4346	case HRTIM_COMPAREUNIT_4:
mbed_official	381:5460fc57b6e4	4347	{
mbed_official	381:5460fc57b6e4	4348	/* Check parameters */
mbed_official	381:5460fc57b6e4	4349	assert_param(IS_HRTIM_COMPAREUNIT_AUTODELAYEDMODE(CompareUnit, pCompareCfg->AutoDelayedMode));
mbed_official	381:5460fc57b6e4	4350
mbed_official	381:5460fc57b6e4	4351	/* Set the compare value */
mbed_official	381:5460fc57b6e4	4352	hhrtim->Instance->sTimerxRegs[TimerIdx].CMP4xR = pCompareCfg->CompareValue;
mbed_official	381:5460fc57b6e4	4353
mbed_official	381:5460fc57b6e4	4354	if (pCompareCfg->AutoDelayedMode != HRTIM_AUTODELAYEDMODE_REGULAR)
mbed_official	381:5460fc57b6e4	4355	{
mbed_official	381:5460fc57b6e4	4356	/* Configure auto-delayed mode */
mbed_official	381:5460fc57b6e4	4357	/* DELCMP4 bitfield must be reset when reprogrammed from one value */
mbed_official	381:5460fc57b6e4	4358	/* to the other to reinitialize properly the auto-delayed mechanism */
mbed_official	381:5460fc57b6e4	4359	hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR &= ~HRTIM_TIMCR_DELCMP4;
mbed_official	381:5460fc57b6e4	4360	hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR \|= (pCompareCfg->AutoDelayedMode << 2);
mbed_official	381:5460fc57b6e4	4361
mbed_official	381:5460fc57b6e4	4362	/* Set the compare value for timeout compare unit (if any) */
mbed_official	381:5460fc57b6e4	4363	if (pCompareCfg->AutoDelayedMode == HRTIM_AUTODELAYEDMODE_AUTODELAYED_TIMEOUTCMP1)
mbed_official	381:5460fc57b6e4	4364	{
mbed_official	381:5460fc57b6e4	4365	hhrtim->Instance->sTimerxRegs[TimerIdx].CMP1xR = pCompareCfg->AutoDelayedTimeout;
mbed_official	381:5460fc57b6e4	4366	}
mbed_official	381:5460fc57b6e4	4367	else if (pCompareCfg->AutoDelayedMode == HRTIM_AUTODELAYEDMODE_AUTODELAYED_TIMEOUTCMP3)
mbed_official	381:5460fc57b6e4	4368	{
mbed_official	381:5460fc57b6e4	4369	hhrtim->Instance->sTimerxRegs[TimerIdx].CMP3xR = pCompareCfg->AutoDelayedTimeout;
mbed_official	381:5460fc57b6e4	4370	}
mbed_official	381:5460fc57b6e4	4371	}
mbed_official	381:5460fc57b6e4	4372	}
mbed_official	381:5460fc57b6e4	4373	break;
mbed_official	381:5460fc57b6e4	4374	}
mbed_official	381:5460fc57b6e4	4375	}
mbed_official	381:5460fc57b6e4	4376	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	4377
mbed_official	381:5460fc57b6e4	4378	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	4379	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	4380
mbed_official	381:5460fc57b6e4	4381	return HAL_OK;
mbed_official	381:5460fc57b6e4	4382	}
mbed_official	381:5460fc57b6e4	4383
mbed_official	381:5460fc57b6e4	4384	/**
mbed_official	381:5460fc57b6e4	4385	* @brief Configures the cature unit of a timer operating in waveform mode
mbed_official	381:5460fc57b6e4	4386	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	4387	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	4388	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	4389	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	4390	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	4391	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	4392	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	4393	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	4394	* @param CaptureUnit: Capture unit to configure
mbed_official	381:5460fc57b6e4	4395	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	4396	* @arg HRTIM_CAPTUREUNIT_1: Capture unit 1
mbed_official	381:5460fc57b6e4	4397	* @arg HRTIM_CAPTUREUNIT_2: Capture unit 2
mbed_official	381:5460fc57b6e4	4398	* @param pCaptureCfg: pointer to the compare unit configuration structure
mbed_official	381:5460fc57b6e4	4399	* @retval HAL status
mbed_official	381:5460fc57b6e4	4400	* @note This function must be called before starting the timer
mbed_official	381:5460fc57b6e4	4401	*/
mbed_official	381:5460fc57b6e4	4402	HAL_StatusTypeDef HAL_HRTIM_WaveformCaptureConfig(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	4403	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	4404	uint32_t CaptureUnit,
mbed_official	381:5460fc57b6e4	4405	HRTIM_CaptureCfgTypeDef* pCaptureCfg)
mbed_official	381:5460fc57b6e4	4406	{
mbed_official	381:5460fc57b6e4	4407	/* Check parameters */
mbed_official	381:5460fc57b6e4	4408	assert_param(IS_HRTIM_TIMER_CAPTURETRIGGER(TimerIdx, pCaptureCfg->Trigger));
mbed_official	381:5460fc57b6e4	4409
mbed_official	381:5460fc57b6e4	4410	if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
mbed_official	381:5460fc57b6e4	4411	{
mbed_official	381:5460fc57b6e4	4412	return HAL_BUSY;
mbed_official	381:5460fc57b6e4	4413	}
mbed_official	381:5460fc57b6e4	4414
mbed_official	381:5460fc57b6e4	4415	/* Process Locked */
mbed_official	381:5460fc57b6e4	4416	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	4417
mbed_official	381:5460fc57b6e4	4418	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	4419
mbed_official	381:5460fc57b6e4	4420	/* Configure the capture unit */
mbed_official	381:5460fc57b6e4	4421	switch (CaptureUnit)
mbed_official	381:5460fc57b6e4	4422	{
mbed_official	381:5460fc57b6e4	4423	case HRTIM_CAPTUREUNIT_1:
mbed_official	381:5460fc57b6e4	4424	{
mbed_official	381:5460fc57b6e4	4425	hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR = pCaptureCfg->Trigger;
mbed_official	381:5460fc57b6e4	4426	}
mbed_official	381:5460fc57b6e4	4427	break;
mbed_official	381:5460fc57b6e4	4428	case HRTIM_CAPTUREUNIT_2:
mbed_official	381:5460fc57b6e4	4429	{
mbed_official	381:5460fc57b6e4	4430	hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR = pCaptureCfg->Trigger;
mbed_official	381:5460fc57b6e4	4431	}
mbed_official	381:5460fc57b6e4	4432	break;
mbed_official	381:5460fc57b6e4	4433	}
mbed_official	381:5460fc57b6e4	4434
mbed_official	381:5460fc57b6e4	4435	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	4436
mbed_official	381:5460fc57b6e4	4437	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	4438	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	4439
mbed_official	381:5460fc57b6e4	4440	return HAL_OK;
mbed_official	381:5460fc57b6e4	4441	}
mbed_official	381:5460fc57b6e4	4442
mbed_official	381:5460fc57b6e4	4443	/**
mbed_official	381:5460fc57b6e4	4444	* @brief Configures the output of a timer operating in waveform mode
mbed_official	381:5460fc57b6e4	4445	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	4446	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	4447	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	4448	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	4449	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	4450	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	4451	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	4452	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	4453	* @param Output: Timer output
mbed_official	381:5460fc57b6e4	4454	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	4455	* @arg HRTIM_OUTPUT_TA1: Timer A - Ouput 1
mbed_official	381:5460fc57b6e4	4456	* @arg HRTIM_OUTPUT_TA2: Timer A - Ouput 2
mbed_official	381:5460fc57b6e4	4457	* @arg HRTIM_OUTPUT_TB1: Timer B - Ouput 1
mbed_official	381:5460fc57b6e4	4458	* @arg HRTIM_OUTPUT_TB2: Timer B - Ouput 2
mbed_official	381:5460fc57b6e4	4459	* @arg HRTIM_OUTPUT_TC1: Timer C - Ouput 1
mbed_official	381:5460fc57b6e4	4460	* @arg HRTIM_OUTPUT_TC2: Timer C - Ouput 2
mbed_official	381:5460fc57b6e4	4461	* @arg HRTIM_OUTPUT_TD1: Timer D - Ouput 1
mbed_official	381:5460fc57b6e4	4462	* @arg HRTIM_OUTPUT_TD2: Timer D - Ouput 2
mbed_official	381:5460fc57b6e4	4463	* @arg HRTIM_OUTPUT_TE1: Timer E - Ouput 1
mbed_official	381:5460fc57b6e4	4464	* @arg HRTIM_OUTPUT_TE2: Timer E - Ouput 2
mbed_official	381:5460fc57b6e4	4465	* @param pOutputCfg: pointer to the timer output configuration structure
mbed_official	381:5460fc57b6e4	4466	* @retval HAL status
mbed_official	381:5460fc57b6e4	4467	* @note This function must be called before configuring the timer and after
mbed_official	381:5460fc57b6e4	4468	* configuring the deadtime insertion feature (if required).
mbed_official	381:5460fc57b6e4	4469	*/
mbed_official	381:5460fc57b6e4	4470	HAL_StatusTypeDef HAL_HRTIM_WaveformOutputConfig(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	4471	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	4472	uint32_t Output,
mbed_official	381:5460fc57b6e4	4473	HRTIM_OutputCfgTypeDef * pOutputCfg)
mbed_official	381:5460fc57b6e4	4474	{
mbed_official	381:5460fc57b6e4	4475	/* Check parameters */
mbed_official	381:5460fc57b6e4	4476	assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, Output));
mbed_official	381:5460fc57b6e4	4477	assert_param(IS_HRTIM_OUTPUTPOLARITY(pOutputCfg->Polarity));
mbed_official	381:5460fc57b6e4	4478	assert_param(IS_HRTIM_OUTPUTIDLELEVEL(pOutputCfg->IdleLevel));
mbed_official	381:5460fc57b6e4	4479	assert_param(IS_HRTIM_OUTPUTIDLEMODE(pOutputCfg->IdleMode));
mbed_official	381:5460fc57b6e4	4480	assert_param(IS_HRTIM_OUTPUTFAULTLEVEL(pOutputCfg->FaultLevel));
mbed_official	381:5460fc57b6e4	4481	assert_param(IS_HRTIM_OUTPUTCHOPPERMODE(pOutputCfg->ChopperModeEnable));
mbed_official	381:5460fc57b6e4	4482	assert_param(IS_HRTIM_OUTPUTBURSTMODEENTRY(pOutputCfg->BurstModeEntryDelayed));
mbed_official	381:5460fc57b6e4	4483
mbed_official	381:5460fc57b6e4	4484	if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
mbed_official	381:5460fc57b6e4	4485	{
mbed_official	381:5460fc57b6e4	4486	return HAL_BUSY;
mbed_official	381:5460fc57b6e4	4487	}
mbed_official	381:5460fc57b6e4	4488
mbed_official	381:5460fc57b6e4	4489	/* Process Locked */
mbed_official	381:5460fc57b6e4	4490	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	4491
mbed_official	381:5460fc57b6e4	4492	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	4493
mbed_official	381:5460fc57b6e4	4494	/* Configure the timer output */
mbed_official	381:5460fc57b6e4	4495	HRTIM_OutputConfig(hhrtim,
mbed_official	381:5460fc57b6e4	4496	TimerIdx,
mbed_official	381:5460fc57b6e4	4497	Output,
mbed_official	381:5460fc57b6e4	4498	pOutputCfg);
mbed_official	381:5460fc57b6e4	4499
mbed_official	381:5460fc57b6e4	4500	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	4501
mbed_official	381:5460fc57b6e4	4502	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	4503	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	4504
mbed_official	381:5460fc57b6e4	4505	return HAL_OK;
mbed_official	381:5460fc57b6e4	4506	}
mbed_official	381:5460fc57b6e4	4507
mbed_official	381:5460fc57b6e4	4508	/**
mbed_official	381:5460fc57b6e4	4509	* @brief Forces the timer output to its active or inactive state
mbed_official	381:5460fc57b6e4	4510	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	4511	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	4512	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	4513	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	4514	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	4515	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	4516	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	4517	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	4518	* @param Output: Timer output
mbed_official	381:5460fc57b6e4	4519	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	4520	* @arg HRTIM_OUTPUT_TA1: Timer A - Ouput 1
mbed_official	381:5460fc57b6e4	4521	* @arg HRTIM_OUTPUT_TA2: Timer A - Ouput 2
mbed_official	381:5460fc57b6e4	4522	* @arg HRTIM_OUTPUT_TB1: Timer B - Ouput 1
mbed_official	381:5460fc57b6e4	4523	* @arg HRTIM_OUTPUT_TB2: Timer B - Ouput 2
mbed_official	381:5460fc57b6e4	4524	* @arg HRTIM_OUTPUT_TC1: Timer C - Ouput 1
mbed_official	381:5460fc57b6e4	4525	* @arg HRTIM_OUTPUT_TC2: Timer C - Ouput 2
mbed_official	381:5460fc57b6e4	4526	* @arg HRTIM_OUTPUT_TD1: Timer D - Ouput 1
mbed_official	381:5460fc57b6e4	4527	* @arg HRTIM_OUTPUT_TD2: Timer D - Ouput 2
mbed_official	381:5460fc57b6e4	4528	* @arg HRTIM_OUTPUT_TE1: Timer E - Ouput 1
mbed_official	381:5460fc57b6e4	4529	* @arg HRTIM_OUTPUT_TE2: Timer E - Ouput 2
mbed_official	381:5460fc57b6e4	4530	* @param OutputLevel: indicates whether the output is forced to its active or inactive level
mbed_official	381:5460fc57b6e4	4531	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	4532	* @arg HRTIM_OUTPUTLEVEL_ACTIVE: output is forced to its active level
mbed_official	381:5460fc57b6e4	4533	* @arg HRTIM_OUTPUTLEVEL_INACTIVE: output is forced to its inactive level
mbed_official	381:5460fc57b6e4	4534	* @retval HAL status
mbed_official	381:5460fc57b6e4	4535	* @note The 'software set/reset trigger' bit in the output set/reset registers
mbed_official	381:5460fc57b6e4	4536	* is automatically reset by hardware
mbed_official	381:5460fc57b6e4	4537	*/
mbed_official	381:5460fc57b6e4	4538	HAL_StatusTypeDef HAL_HRTIM_WaveformSetOutputLevel(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	4539	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	4540	uint32_t Output,
mbed_official	381:5460fc57b6e4	4541	uint32_t OutputLevel)
mbed_official	381:5460fc57b6e4	4542	{
mbed_official	381:5460fc57b6e4	4543	/* Check parameters */
mbed_official	381:5460fc57b6e4	4544	assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, Output));
mbed_official	381:5460fc57b6e4	4545	assert_param(IS_HRTIM_OUTPUTLEVEL(OutputLevel));
mbed_official	381:5460fc57b6e4	4546
mbed_official	381:5460fc57b6e4	4547	if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
mbed_official	381:5460fc57b6e4	4548	{
mbed_official	381:5460fc57b6e4	4549	return HAL_BUSY;
mbed_official	381:5460fc57b6e4	4550	}
mbed_official	381:5460fc57b6e4	4551
mbed_official	381:5460fc57b6e4	4552	/* Process Locked */
mbed_official	381:5460fc57b6e4	4553	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	4554
mbed_official	381:5460fc57b6e4	4555	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	4556
mbed_official	381:5460fc57b6e4	4557	/* Force timer output level */
mbed_official	381:5460fc57b6e4	4558	switch (Output)
mbed_official	381:5460fc57b6e4	4559	{
mbed_official	381:5460fc57b6e4	4560	case HRTIM_OUTPUT_TA1:
mbed_official	381:5460fc57b6e4	4561	case HRTIM_OUTPUT_TB1:
mbed_official	381:5460fc57b6e4	4562	case HRTIM_OUTPUT_TC1:
mbed_official	381:5460fc57b6e4	4563	case HRTIM_OUTPUT_TD1:
mbed_official	381:5460fc57b6e4	4564	case HRTIM_OUTPUT_TE1:
mbed_official	381:5460fc57b6e4	4565	{
mbed_official	381:5460fc57b6e4	4566	if (OutputLevel == HRTIM_OUTPUTLEVEL_ACTIVE)
mbed_official	381:5460fc57b6e4	4567	{
mbed_official	381:5460fc57b6e4	4568	/* Force output to its active state */
mbed_official	381:5460fc57b6e4	4569	hhrtim->Instance->sTimerxRegs[TimerIdx].SETx1R \|= HRTIM_SET1R_SST;
mbed_official	381:5460fc57b6e4	4570	}
mbed_official	381:5460fc57b6e4	4571	else
mbed_official	381:5460fc57b6e4	4572	{
mbed_official	381:5460fc57b6e4	4573	/* Force output to its inactive state */
mbed_official	381:5460fc57b6e4	4574	hhrtim->Instance->sTimerxRegs[TimerIdx].RSTx1R \|= HRTIM_RST1R_SRT;
mbed_official	381:5460fc57b6e4	4575	}
mbed_official	381:5460fc57b6e4	4576	}
mbed_official	381:5460fc57b6e4	4577	break;
mbed_official	381:5460fc57b6e4	4578	case HRTIM_OUTPUT_TA2:
mbed_official	381:5460fc57b6e4	4579	case HRTIM_OUTPUT_TB2:
mbed_official	381:5460fc57b6e4	4580	case HRTIM_OUTPUT_TC2:
mbed_official	381:5460fc57b6e4	4581	case HRTIM_OUTPUT_TD2:
mbed_official	381:5460fc57b6e4	4582	case HRTIM_OUTPUT_TE2:
mbed_official	381:5460fc57b6e4	4583	{
mbed_official	381:5460fc57b6e4	4584	if (OutputLevel == HRTIM_OUTPUTLEVEL_ACTIVE)
mbed_official	381:5460fc57b6e4	4585	{
mbed_official	381:5460fc57b6e4	4586	/* Force output to its active state */
mbed_official	381:5460fc57b6e4	4587	hhrtim->Instance->sTimerxRegs[TimerIdx].SETx2R \|= HRTIM_SET2R_SST;
mbed_official	381:5460fc57b6e4	4588	}
mbed_official	381:5460fc57b6e4	4589	else
mbed_official	381:5460fc57b6e4	4590	{
mbed_official	381:5460fc57b6e4	4591	/* Force output to its inactive state */
mbed_official	381:5460fc57b6e4	4592	hhrtim->Instance->sTimerxRegs[TimerIdx].RSTx2R \|= HRTIM_RST2R_SRT;
mbed_official	381:5460fc57b6e4	4593	}
mbed_official	381:5460fc57b6e4	4594	}
mbed_official	381:5460fc57b6e4	4595	break;
mbed_official	381:5460fc57b6e4	4596	}
mbed_official	381:5460fc57b6e4	4597
mbed_official	381:5460fc57b6e4	4598	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	4599
mbed_official	381:5460fc57b6e4	4600	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	4601	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	4602
mbed_official	381:5460fc57b6e4	4603	return HAL_OK;
mbed_official	381:5460fc57b6e4	4604	}
mbed_official	381:5460fc57b6e4	4605
mbed_official	381:5460fc57b6e4	4606	/**
mbed_official	381:5460fc57b6e4	4607	* @brief Enables the generation of the waveform signal on the designated output(s)
mbed_official	381:5460fc57b6e4	4608	* Ouputs can becombined (ORed) to allow for simultaneous output enabling
mbed_official	381:5460fc57b6e4	4609	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	4610	* @param OutputsToStart: Timer output(s) to enable
mbed_official	381:5460fc57b6e4	4611	* This parameter can be any combination of the following values:
mbed_official	381:5460fc57b6e4	4612	* @arg HRTIM_OUTPUT_TA1: Timer A - Ouput 1
mbed_official	381:5460fc57b6e4	4613	* @arg HRTIM_OUTPUT_TA2: Timer A - Ouput 2
mbed_official	381:5460fc57b6e4	4614	* @arg HRTIM_OUTPUT_TB1: Timer B - Ouput 1
mbed_official	381:5460fc57b6e4	4615	* @arg HRTIM_OUTPUT_TB2: Timer B - Ouput 2
mbed_official	381:5460fc57b6e4	4616	* @arg HRTIM_OUTPUT_TC1: Timer C - Ouput 1
mbed_official	381:5460fc57b6e4	4617	* @arg HRTIM_OUTPUT_TC2: Timer C - Ouput 2
mbed_official	381:5460fc57b6e4	4618	* @arg HRTIM_OUTPUT_TD1: Timer D - Ouput 1
mbed_official	381:5460fc57b6e4	4619	* @arg HRTIM_OUTPUT_TD2: Timer D - Ouput 2
mbed_official	381:5460fc57b6e4	4620	* @arg HRTIM_OUTPUT_TE1: Timer E - Ouput 1
mbed_official	381:5460fc57b6e4	4621	* @arg HRTIM_OUTPUT_TE2: Timer E - Ouput 2
mbed_official	381:5460fc57b6e4	4622	* @retval HAL status
mbed_official	381:5460fc57b6e4	4623	*/
mbed_official	381:5460fc57b6e4	4624	HAL_StatusTypeDef HAL_HRTIM_WaveformOutputStart(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	4625	uint32_t OutputsToStart)
mbed_official	381:5460fc57b6e4	4626	{
mbed_official	381:5460fc57b6e4	4627	/* Check the parameters */
mbed_official	381:5460fc57b6e4	4628	assert_param(IS_HRTIM_OUTPUT(OutputsToStart));
mbed_official	381:5460fc57b6e4	4629
mbed_official	381:5460fc57b6e4	4630	/* Process Locked */
mbed_official	381:5460fc57b6e4	4631	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	4632
mbed_official	381:5460fc57b6e4	4633	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	4634
mbed_official	381:5460fc57b6e4	4635	/* Enable the HRTIM outputs */
mbed_official	381:5460fc57b6e4	4636	hhrtim->Instance->sCommonRegs.OENR \|= (OutputsToStart);
mbed_official	381:5460fc57b6e4	4637
mbed_official	381:5460fc57b6e4	4638	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	4639
mbed_official	381:5460fc57b6e4	4640	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	4641	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	4642
mbed_official	381:5460fc57b6e4	4643	return HAL_OK;
mbed_official	381:5460fc57b6e4	4644	}
mbed_official	381:5460fc57b6e4	4645
mbed_official	381:5460fc57b6e4	4646	/**
mbed_official	381:5460fc57b6e4	4647	* @brief Disables the generation of the waveform signal on the designated output(s)
mbed_official	381:5460fc57b6e4	4648	* Ouputs can becombined (ORed) to allow for simultaneous output disabling
mbed_official	381:5460fc57b6e4	4649	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	4650	* @param OutputsToStop: Timer output(s) to disable
mbed_official	381:5460fc57b6e4	4651	* This parameter can be any combination of the following values:
mbed_official	381:5460fc57b6e4	4652	* @arg HRTIM_OUTPUT_TA1: Timer A - Ouput 1
mbed_official	381:5460fc57b6e4	4653	* @arg HRTIM_OUTPUT_TA2: Timer A - Ouput 2
mbed_official	381:5460fc57b6e4	4654	* @arg HRTIM_OUTPUT_TB1: Timer B - Ouput 1
mbed_official	381:5460fc57b6e4	4655	* @arg HRTIM_OUTPUT_TB2: Timer B - Ouput 2
mbed_official	381:5460fc57b6e4	4656	* @arg HRTIM_OUTPUT_TC1: Timer C - Ouput 1
mbed_official	381:5460fc57b6e4	4657	* @arg HRTIM_OUTPUT_TC2: Timer C - Ouput 2
mbed_official	381:5460fc57b6e4	4658	* @arg HRTIM_OUTPUT_TD1: Timer D - Ouput 1
mbed_official	381:5460fc57b6e4	4659	* @arg HRTIM_OUTPUT_TD2: Timer D - Ouput 2
mbed_official	381:5460fc57b6e4	4660	* @arg HRTIM_OUTPUT_TE1: Timer E - Ouput 1
mbed_official	381:5460fc57b6e4	4661	* @arg HRTIM_OUTPUT_TE2: Timer E - Ouput 2
mbed_official	381:5460fc57b6e4	4662	* @retval HAL status
mbed_official	381:5460fc57b6e4	4663	*/
mbed_official	381:5460fc57b6e4	4664	HAL_StatusTypeDef HAL_HRTIM_WaveformOutputStop(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	4665	uint32_t OutputsToStop)
mbed_official	381:5460fc57b6e4	4666	{
mbed_official	381:5460fc57b6e4	4667	/* Check the parameters */
mbed_official	381:5460fc57b6e4	4668	assert_param(IS_HRTIM_OUTPUT(OutputsToStop));
mbed_official	381:5460fc57b6e4	4669
mbed_official	381:5460fc57b6e4	4670	/* Process Locked */
mbed_official	381:5460fc57b6e4	4671	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	4672
mbed_official	381:5460fc57b6e4	4673	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	4674
mbed_official	381:5460fc57b6e4	4675	/* Enable the HRTIM outputs */
mbed_official	381:5460fc57b6e4	4676	hhrtim->Instance->sCommonRegs.ODISR \|= (OutputsToStop);
mbed_official	381:5460fc57b6e4	4677
mbed_official	381:5460fc57b6e4	4678	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	4679
mbed_official	381:5460fc57b6e4	4680	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	4681	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	4682
mbed_official	381:5460fc57b6e4	4683	return HAL_OK;
mbed_official	381:5460fc57b6e4	4684	}
mbed_official	381:5460fc57b6e4	4685
mbed_official	381:5460fc57b6e4	4686	/**
mbed_official	381:5460fc57b6e4	4687	* @brief Starts the counter of the designated timer(s) operating in waveform mode
mbed_official	381:5460fc57b6e4	4688	* Timers can be combined (ORed) to allow for simultaneous counter start
mbed_official	381:5460fc57b6e4	4689	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	4690	* @param Timers: Timer counter(s) to start
mbed_official	381:5460fc57b6e4	4691	* This parameter can be any combination of the following values:
mbed_official	381:5460fc57b6e4	4692	* @arg HRTIM_TIMERID_MASTER
mbed_official	381:5460fc57b6e4	4693	* @arg HRTIM_TIMERID_TIMER_A
mbed_official	381:5460fc57b6e4	4694	* @arg HRTIM_TIMERID_TIMER_B
mbed_official	381:5460fc57b6e4	4695	* @arg HRTIM_TIMERID_TIMER_C
mbed_official	381:5460fc57b6e4	4696	* @arg HRTIM_TIMERID_TIMER_D
mbed_official	381:5460fc57b6e4	4697	* @arg HRTIM_TIMERID_TIMER_E
mbed_official	381:5460fc57b6e4	4698	* @retval HAL status
mbed_official	381:5460fc57b6e4	4699	*/
mbed_official	381:5460fc57b6e4	4700	HAL_StatusTypeDef HAL_HRTIM_WaveformCounterStart(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	4701	uint32_t Timers)
mbed_official	381:5460fc57b6e4	4702	{
mbed_official	381:5460fc57b6e4	4703	/* Check the parameters */
mbed_official	381:5460fc57b6e4	4704	assert_param(IS_HRTIM_TIMERID(Timers));
mbed_official	381:5460fc57b6e4	4705
mbed_official	381:5460fc57b6e4	4706	/* Process Locked */
mbed_official	381:5460fc57b6e4	4707	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	4708
mbed_official	381:5460fc57b6e4	4709	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	4710
mbed_official	381:5460fc57b6e4	4711	/* Enable timer(s) counter */
mbed_official	381:5460fc57b6e4	4712	hhrtim->Instance->sMasterRegs.MCR \|= (Timers);
mbed_official	381:5460fc57b6e4	4713
mbed_official	381:5460fc57b6e4	4714	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	4715
mbed_official	381:5460fc57b6e4	4716	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	4717	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	4718
mbed_official	381:5460fc57b6e4	4719	return HAL_OK;
mbed_official	381:5460fc57b6e4	4720	}
mbed_official	381:5460fc57b6e4	4721
mbed_official	381:5460fc57b6e4	4722	/**
mbed_official	381:5460fc57b6e4	4723	* @brief Stops the counter of the designated timer(s) operating in waveform mode
mbed_official	381:5460fc57b6e4	4724	* Timers can be combined (ORed) to allow for simultaneous counter stop
mbed_official	381:5460fc57b6e4	4725	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	4726	* @param Timers: Timer counter(s) to stop
mbed_official	381:5460fc57b6e4	4727	* This parameter can be any combination of the following values:
mbed_official	381:5460fc57b6e4	4728	* @arg HRTIM_TIMER_MASTER
mbed_official	381:5460fc57b6e4	4729	* @arg HRTIM_TIMER_A
mbed_official	381:5460fc57b6e4	4730	* @arg HRTIM_TIMER_B
mbed_official	381:5460fc57b6e4	4731	* @arg HRTIM_TIMER_C
mbed_official	381:5460fc57b6e4	4732	* @arg HRTIM_TIMER_D
mbed_official	381:5460fc57b6e4	4733	* @arg HRTIM_TIMER_E
mbed_official	381:5460fc57b6e4	4734	* @retval HAL status
mbed_official	381:5460fc57b6e4	4735	* @note The counter of a timer is stopped only if all timer outputs are disabled
mbed_official	381:5460fc57b6e4	4736	*/
mbed_official	381:5460fc57b6e4	4737	HAL_StatusTypeDef HAL_HRTIM_WaveformCounterStop(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	4738	uint32_t Timers)
mbed_official	381:5460fc57b6e4	4739	{
mbed_official	381:5460fc57b6e4	4740	/* Check the parameters */
mbed_official	381:5460fc57b6e4	4741	assert_param(IS_HRTIM_TIMERID(Timers));
mbed_official	381:5460fc57b6e4	4742
mbed_official	381:5460fc57b6e4	4743	/* Process Locked */
mbed_official	381:5460fc57b6e4	4744	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	4745
mbed_official	381:5460fc57b6e4	4746	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	4747
mbed_official	381:5460fc57b6e4	4748	/* Disable timer(s) counter */
mbed_official	381:5460fc57b6e4	4749	hhrtim->Instance->sMasterRegs.MCR &= ~(Timers);
mbed_official	381:5460fc57b6e4	4750
mbed_official	381:5460fc57b6e4	4751	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	4752
mbed_official	381:5460fc57b6e4	4753	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	4754	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	4755
mbed_official	381:5460fc57b6e4	4756	return HAL_OK;
mbed_official	381:5460fc57b6e4	4757	}
mbed_official	381:5460fc57b6e4	4758
mbed_official	381:5460fc57b6e4	4759	/**
mbed_official	381:5460fc57b6e4	4760	* @brief Starts the counter of the designated timer(s) operating in waveform mode
mbed_official	381:5460fc57b6e4	4761	* Timers can be combined (ORed) to allow for simultaneous counter start
mbed_official	381:5460fc57b6e4	4762	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	4763	* @param Timers: Timer counter(s) to start
mbed_official	381:5460fc57b6e4	4764	* This parameter can be any combination of the following values:
mbed_official	381:5460fc57b6e4	4765	* @arg HRTIM_TIMERID_MASTER
mbed_official	381:5460fc57b6e4	4766	* @arg HRTIM_TIMERID_A
mbed_official	381:5460fc57b6e4	4767	* @arg HRTIM_TIMERID_B
mbed_official	381:5460fc57b6e4	4768	* @arg HRTIM_TIMERID_C
mbed_official	381:5460fc57b6e4	4769	* @arg HRTIM_TIMERID_D
mbed_official	381:5460fc57b6e4	4770	* @arg HRTIM_TIMERID_E
mbed_official	381:5460fc57b6e4	4771	* @note HRTIM interrupts (e.g. faults interrupts) and interrupts related
mbed_official	381:5460fc57b6e4	4772	* to the timers to start are enabled within this function.
mbed_official	381:5460fc57b6e4	4773	* Interrupts to enable are selected through HAL_HRTIM_WaveformTimerConfig
mbed_official	381:5460fc57b6e4	4774	* function.
mbed_official	381:5460fc57b6e4	4775	* @retval HAL status
mbed_official	381:5460fc57b6e4	4776	*/
mbed_official	381:5460fc57b6e4	4777	HAL_StatusTypeDef HAL_HRTIM_WaveformCounterStart_IT(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	4778	uint32_t Timers)
mbed_official	381:5460fc57b6e4	4779	{
mbed_official	381:5460fc57b6e4	4780	uint8_t timer_idx;
mbed_official	381:5460fc57b6e4	4781
mbed_official	381:5460fc57b6e4	4782	/* Check the parameters */
mbed_official	381:5460fc57b6e4	4783	assert_param(IS_HRTIM_TIMERID(Timers));
mbed_official	381:5460fc57b6e4	4784
mbed_official	381:5460fc57b6e4	4785	/* Process Locked */
mbed_official	381:5460fc57b6e4	4786	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	4787
mbed_official	381:5460fc57b6e4	4788	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	4789
mbed_official	381:5460fc57b6e4	4790	/* Enable HRTIM interrupts (if required) */
mbed_official	381:5460fc57b6e4	4791	__HAL_HRTIM_ENABLE_IT(hhrtim, hhrtim->Init.HRTIMInterruptResquests);
mbed_official	381:5460fc57b6e4	4792
mbed_official	381:5460fc57b6e4	4793	/* Enable master timer related interrupts (if required) */
mbed_official	381:5460fc57b6e4	4794	if ((Timers & HRTIM_TIMERID_MASTER) != RESET)
mbed_official	381:5460fc57b6e4	4795	{
mbed_official	381:5460fc57b6e4	4796	__HAL_HRTIM_MASTER_ENABLE_IT(hhrtim,
mbed_official	381:5460fc57b6e4	4797	hhrtim->TimerParam[HRTIM_TIMERINDEX_MASTER].InterruptRequests);
mbed_official	381:5460fc57b6e4	4798	}
mbed_official	381:5460fc57b6e4	4799
mbed_official	381:5460fc57b6e4	4800	/* Enable timing unit related interrupts (if required) */
mbed_official	381:5460fc57b6e4	4801	for (timer_idx = HRTIM_TIMERINDEX_TIMER_A ;
mbed_official	381:5460fc57b6e4	4802	timer_idx < HRTIM_TIMERINDEX_MASTER ;
mbed_official	381:5460fc57b6e4	4803	timer_idx++)
mbed_official	381:5460fc57b6e4	4804	{
mbed_official	381:5460fc57b6e4	4805	if ((Timers & TimerIdxToTimerId[timer_idx]) != RESET)
mbed_official	381:5460fc57b6e4	4806	{
mbed_official	381:5460fc57b6e4	4807	__HAL_HRTIM_TIMER_ENABLE_IT(hhrtim,
mbed_official	381:5460fc57b6e4	4808	timer_idx,
mbed_official	381:5460fc57b6e4	4809	hhrtim->TimerParam[timer_idx].InterruptRequests);
mbed_official	381:5460fc57b6e4	4810	}
mbed_official	381:5460fc57b6e4	4811	}
mbed_official	381:5460fc57b6e4	4812
mbed_official	381:5460fc57b6e4	4813	/* Enable timer(s) counter */
mbed_official	381:5460fc57b6e4	4814	hhrtim->Instance->sMasterRegs.MCR \|= (Timers);
mbed_official	381:5460fc57b6e4	4815
mbed_official	381:5460fc57b6e4	4816	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	4817
mbed_official	381:5460fc57b6e4	4818	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	4819	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	4820
mbed_official	381:5460fc57b6e4	4821	return HAL_OK;}
mbed_official	381:5460fc57b6e4	4822
mbed_official	381:5460fc57b6e4	4823	/**
mbed_official	381:5460fc57b6e4	4824	* @brief Stops the counter of the designated timer(s) operating in waveform mode
mbed_official	381:5460fc57b6e4	4825	* Timers can be combined (ORed) to allow for simultaneous counter stop
mbed_official	381:5460fc57b6e4	4826	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	4827	* @param Timers: Timer counter(s) to stop
mbed_official	381:5460fc57b6e4	4828	* This parameter can be any combination of the following values:
mbed_official	381:5460fc57b6e4	4829	* @arg HRTIM_TIMER_MASTER
mbed_official	381:5460fc57b6e4	4830	* @arg HRTIM_TIMER_A
mbed_official	381:5460fc57b6e4	4831	* @arg HRTIM_TIMER_B
mbed_official	381:5460fc57b6e4	4832	* @arg HRTIM_TIMER_C
mbed_official	381:5460fc57b6e4	4833	* @arg HRTIM_TIMER_D
mbed_official	381:5460fc57b6e4	4834	* @arg HRTIM_TIMER_E
mbed_official	381:5460fc57b6e4	4835	* @retval HAL status
mbed_official	381:5460fc57b6e4	4836	* @note The counter of a timer is stopped only if all timer outputs are disabled
mbed_official	381:5460fc57b6e4	4837	* @note All enabled timer related interrupts are disabled.
mbed_official	381:5460fc57b6e4	4838	*/
mbed_official	381:5460fc57b6e4	4839	HAL_StatusTypeDef HAL_HRTIM_WaveformCounterStop_IT(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	4840	uint32_t Timers)
mbed_official	381:5460fc57b6e4	4841	{
mbed_official	381:5460fc57b6e4	4842	/* ++ WA */
mbed_official	381:5460fc57b6e4	4843	__IO uint32_t delai = (uint32_t)(0x17F);
mbed_official	381:5460fc57b6e4	4844	/* -- WA */
mbed_official	381:5460fc57b6e4	4845
mbed_official	381:5460fc57b6e4	4846	uint8_t timer_idx;
mbed_official	381:5460fc57b6e4	4847
mbed_official	381:5460fc57b6e4	4848	/* Check the parameters */
mbed_official	381:5460fc57b6e4	4849	assert_param(IS_HRTIM_TIMERID(Timers));
mbed_official	381:5460fc57b6e4	4850
mbed_official	381:5460fc57b6e4	4851	/* Process Locked */
mbed_official	381:5460fc57b6e4	4852	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	4853
mbed_official	381:5460fc57b6e4	4854	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	4855
mbed_official	381:5460fc57b6e4	4856	/* Disable HRTIM interrupts (if required) */
mbed_official	381:5460fc57b6e4	4857	__HAL_HRTIM_DISABLE_IT(hhrtim, hhrtim->Init.HRTIMInterruptResquests);
mbed_official	381:5460fc57b6e4	4858
mbed_official	381:5460fc57b6e4	4859	/* Disable master timer related interrupts (if required) */
mbed_official	381:5460fc57b6e4	4860	if ((Timers & HRTIM_TIMERID_MASTER) != RESET)
mbed_official	381:5460fc57b6e4	4861	{
mbed_official	381:5460fc57b6e4	4862	/* Interrupts enable flag must be cleared one by one */
mbed_official	381:5460fc57b6e4	4863	__HAL_HRTIM_MASTER_DISABLE_IT(hhrtim, hhrtim->TimerParam[HRTIM_TIMERINDEX_MASTER].InterruptRequests);
mbed_official	381:5460fc57b6e4	4864	}
mbed_official	381:5460fc57b6e4	4865
mbed_official	381:5460fc57b6e4	4866	/* Disable timing unit related interrupts (if required) */
mbed_official	381:5460fc57b6e4	4867	for (timer_idx = HRTIM_TIMERINDEX_TIMER_A ;
mbed_official	381:5460fc57b6e4	4868	timer_idx < HRTIM_TIMERINDEX_MASTER ;
mbed_official	381:5460fc57b6e4	4869	timer_idx++)
mbed_official	381:5460fc57b6e4	4870	{
mbed_official	381:5460fc57b6e4	4871	if ((Timers & TimerIdxToTimerId[timer_idx]) != RESET)
mbed_official	381:5460fc57b6e4	4872	{
mbed_official	381:5460fc57b6e4	4873	__HAL_HRTIM_TIMER_DISABLE_IT(hhrtim, timer_idx, hhrtim->TimerParam[timer_idx].InterruptRequests);
mbed_official	381:5460fc57b6e4	4874	}
mbed_official	381:5460fc57b6e4	4875	}
mbed_official	381:5460fc57b6e4	4876
mbed_official	381:5460fc57b6e4	4877	/* ++ WA */
mbed_official	381:5460fc57b6e4	4878	do { delai--; } while (delai != 0);
mbed_official	381:5460fc57b6e4	4879	/* -- WA */
mbed_official	381:5460fc57b6e4	4880
mbed_official	381:5460fc57b6e4	4881	/* Disable timer(s) counter */
mbed_official	381:5460fc57b6e4	4882	hhrtim->Instance->sMasterRegs.MCR &= ~(Timers);
mbed_official	381:5460fc57b6e4	4883
mbed_official	381:5460fc57b6e4	4884	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	4885
mbed_official	381:5460fc57b6e4	4886	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	4887	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	4888
mbed_official	381:5460fc57b6e4	4889	return HAL_OK;
mbed_official	381:5460fc57b6e4	4890	}
mbed_official	381:5460fc57b6e4	4891
mbed_official	381:5460fc57b6e4	4892	/**
mbed_official	381:5460fc57b6e4	4893	* @brief Starts the counter of the designated timer(s) operating in waveform mode
mbed_official	381:5460fc57b6e4	4894	* Timers can be combined (ORed) to allow for simultaneous counter start
mbed_official	381:5460fc57b6e4	4895	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	4896	* @param Timers: Timer counter(s) to start
mbed_official	381:5460fc57b6e4	4897	* This parameter can be any combination of the following values:
mbed_official	381:5460fc57b6e4	4898	* HRTIM_TIMER_MASTER
mbed_official	381:5460fc57b6e4	4899	* @arg HRTIM_TIMER_A
mbed_official	381:5460fc57b6e4	4900	* @arg HRTIM_TIMER_B
mbed_official	381:5460fc57b6e4	4901	* @arg HRTIM_TIMER_C
mbed_official	381:5460fc57b6e4	4902	* @arg HRTIM_TIMER_D
mbed_official	381:5460fc57b6e4	4903	* @arg HRTIM_TIMER_E
mbed_official	381:5460fc57b6e4	4904	* @retval HAL status
mbed_official	381:5460fc57b6e4	4905	* @note This function enables the dma request(s) mentionned in the timer
mbed_official	381:5460fc57b6e4	4906	* configuration data structure for every timers to start.
mbed_official	381:5460fc57b6e4	4907	* @note The source memory address, the destination memory address and the
mbed_official	381:5460fc57b6e4	4908	* size of each DMA transfer are specified at timer configuration time
mbed_official	381:5460fc57b6e4	4909	* (see HAL_HRTIM_WaveformTimerConfig)
mbed_official	381:5460fc57b6e4	4910	*/
mbed_official	381:5460fc57b6e4	4911	HAL_StatusTypeDef HAL_HRTIM_WaveformCounterStart_DMA(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	4912	uint32_t Timers)
mbed_official	381:5460fc57b6e4	4913	{
mbed_official	381:5460fc57b6e4	4914	uint8_t timer_idx;
mbed_official	381:5460fc57b6e4	4915	DMA_HandleTypeDef * hdma;
mbed_official	381:5460fc57b6e4	4916
mbed_official	381:5460fc57b6e4	4917	/* Check the parameters */
mbed_official	381:5460fc57b6e4	4918	assert_param(IS_HRTIM_TIMERID(Timers));
mbed_official	381:5460fc57b6e4	4919
mbed_official	381:5460fc57b6e4	4920	if((hhrtim->State == HAL_HRTIM_STATE_BUSY))
mbed_official	381:5460fc57b6e4	4921	{
mbed_official	381:5460fc57b6e4	4922	return HAL_BUSY;
mbed_official	381:5460fc57b6e4	4923	}
mbed_official	381:5460fc57b6e4	4924
mbed_official	381:5460fc57b6e4	4925	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	4926
mbed_official	381:5460fc57b6e4	4927	/* Process Locked */
mbed_official	381:5460fc57b6e4	4928	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	4929
mbed_official	381:5460fc57b6e4	4930	if (((Timers & HRTIM_TIMERID_MASTER) != RESET) &&
mbed_official	381:5460fc57b6e4	4931	(hhrtim->TimerParam[HRTIM_TIMERINDEX_MASTER].DMARequests != 0))
mbed_official	381:5460fc57b6e4	4932	{
mbed_official	381:5460fc57b6e4	4933	/* Set the DMA error callback */
mbed_official	381:5460fc57b6e4	4934	hhrtim->hdmaMaster->XferErrorCallback = HRTIM_DMAError ;
mbed_official	381:5460fc57b6e4	4935
mbed_official	381:5460fc57b6e4	4936	/* Set the DMA transfer completed callback */
mbed_official	381:5460fc57b6e4	4937	hhrtim->hdmaMaster->XferCpltCallback = HRTIM_DMAMasterCplt;
mbed_official	381:5460fc57b6e4	4938
mbed_official	381:5460fc57b6e4	4939	/* Enable the DMA channel */
mbed_official	381:5460fc57b6e4	4940	HAL_DMA_Start_IT(hhrtim->hdmaMaster,
mbed_official	381:5460fc57b6e4	4941	hhrtim->TimerParam[HRTIM_TIMERINDEX_MASTER].DMASrcAddress,
mbed_official	381:5460fc57b6e4	4942	hhrtim->TimerParam[HRTIM_TIMERINDEX_MASTER].DMADstAddress,
mbed_official	381:5460fc57b6e4	4943	hhrtim->TimerParam[HRTIM_TIMERINDEX_MASTER].DMASize);
mbed_official	381:5460fc57b6e4	4944
mbed_official	381:5460fc57b6e4	4945	/* Enable the timer DMA request */
mbed_official	381:5460fc57b6e4	4946	__HAL_HRTIM_MASTER_ENABLE_DMA(hhrtim,
mbed_official	381:5460fc57b6e4	4947	hhrtim->TimerParam[HRTIM_TIMERINDEX_MASTER].DMARequests);
mbed_official	381:5460fc57b6e4	4948	}
mbed_official	381:5460fc57b6e4	4949
mbed_official	381:5460fc57b6e4	4950	for (timer_idx = HRTIM_TIMERINDEX_TIMER_A ;
mbed_official	381:5460fc57b6e4	4951	timer_idx < HRTIM_TIMERINDEX_MASTER ;
mbed_official	381:5460fc57b6e4	4952	timer_idx++)
mbed_official	381:5460fc57b6e4	4953	{
mbed_official	381:5460fc57b6e4	4954	if (((Timers & TimerIdxToTimerId[timer_idx]) != RESET) &&
mbed_official	381:5460fc57b6e4	4955	(hhrtim->TimerParam[timer_idx].DMARequests != 0))
mbed_official	381:5460fc57b6e4	4956	{
mbed_official	381:5460fc57b6e4	4957	/* Get the timer DMA handler */
mbed_official	381:5460fc57b6e4	4958	hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, timer_idx);
mbed_official	381:5460fc57b6e4	4959
mbed_official	381:5460fc57b6e4	4960	/* Set the DMA error callback */
mbed_official	381:5460fc57b6e4	4961	hdma->XferErrorCallback = HRTIM_DMAError ;
mbed_official	381:5460fc57b6e4	4962
mbed_official	381:5460fc57b6e4	4963	/* Set the DMA transfer completed callback */
mbed_official	381:5460fc57b6e4	4964	hdma->XferCpltCallback = HRTIM_DMATimerxCplt;
mbed_official	381:5460fc57b6e4	4965
mbed_official	381:5460fc57b6e4	4966	/* Enable the DMA channel */
mbed_official	381:5460fc57b6e4	4967	HAL_DMA_Start_IT(hdma,
mbed_official	381:5460fc57b6e4	4968	hhrtim->TimerParam[timer_idx].DMASrcAddress,
mbed_official	381:5460fc57b6e4	4969	hhrtim->TimerParam[timer_idx].DMADstAddress,
mbed_official	381:5460fc57b6e4	4970	hhrtim->TimerParam[timer_idx].DMASize);
mbed_official	381:5460fc57b6e4	4971
mbed_official	381:5460fc57b6e4	4972	/* Enable the timer DMA request */
mbed_official	381:5460fc57b6e4	4973	__HAL_HRTIM_TIMER_ENABLE_DMA(hhrtim,
mbed_official	381:5460fc57b6e4	4974	timer_idx,
mbed_official	381:5460fc57b6e4	4975	hhrtim->TimerParam[timer_idx].DMARequests);
mbed_official	381:5460fc57b6e4	4976	}
mbed_official	381:5460fc57b6e4	4977	}
mbed_official	381:5460fc57b6e4	4978
mbed_official	381:5460fc57b6e4	4979	/* Enable the timer counter */
mbed_official	381:5460fc57b6e4	4980	__HAL_HRTIM_ENABLE(hhrtim, Timers);
mbed_official	381:5460fc57b6e4	4981
mbed_official	381:5460fc57b6e4	4982	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	4983
mbed_official	381:5460fc57b6e4	4984	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	4985	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	4986
mbed_official	381:5460fc57b6e4	4987	return HAL_OK;
mbed_official	381:5460fc57b6e4	4988	}
mbed_official	381:5460fc57b6e4	4989
mbed_official	381:5460fc57b6e4	4990	/**
mbed_official	381:5460fc57b6e4	4991	* @brief Stops the counter of the designated timer(s) operating in waveform mode
mbed_official	381:5460fc57b6e4	4992	* Timers can be combined (ORed) to allow for simultaneous counter stop
mbed_official	381:5460fc57b6e4	4993	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	4994	* @param Timers: Timer counter(s) to stop
mbed_official	381:5460fc57b6e4	4995	* This parameter can be any combination of the following values:
mbed_official	381:5460fc57b6e4	4996	* @arg HRTIM_TIMER_MASTER
mbed_official	381:5460fc57b6e4	4997	* @arg HRTIM_TIMER_A
mbed_official	381:5460fc57b6e4	4998	* @arg HRTIM_TIMER_B
mbed_official	381:5460fc57b6e4	4999	* @arg HRTIM_TIMER_C
mbed_official	381:5460fc57b6e4	5000	* @arg HRTIM_TIMER_D
mbed_official	381:5460fc57b6e4	5001	* @arg HRTIM_TIMER_E
mbed_official	381:5460fc57b6e4	5002	* @retval HAL status
mbed_official	381:5460fc57b6e4	5003	* @note The counter of a timer is stopped only if all timer outputs are disabled
mbed_official	381:5460fc57b6e4	5004	* @note All enabled timer related DMA requests are disabled.
mbed_official	381:5460fc57b6e4	5005	*/
mbed_official	381:5460fc57b6e4	5006	HAL_StatusTypeDef HAL_HRTIM_WaveformCounterStop_DMA(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	5007	uint32_t Timers)
mbed_official	381:5460fc57b6e4	5008	{
mbed_official	381:5460fc57b6e4	5009	uint8_t timer_idx;
mbed_official	381:5460fc57b6e4	5010	DMA_HandleTypeDef * hdma;
mbed_official	381:5460fc57b6e4	5011
mbed_official	381:5460fc57b6e4	5012	/* Check the parameters */
mbed_official	381:5460fc57b6e4	5013	assert_param(IS_HRTIM_TIMERID(Timers));
mbed_official	381:5460fc57b6e4	5014
mbed_official	381:5460fc57b6e4	5015	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	5016
mbed_official	381:5460fc57b6e4	5017	if (((Timers & HRTIM_TIMERID_MASTER) != RESET) &&
mbed_official	381:5460fc57b6e4	5018	(hhrtim->TimerParam[HRTIM_TIMERINDEX_MASTER].DMARequests != 0))
mbed_official	381:5460fc57b6e4	5019	{
mbed_official	381:5460fc57b6e4	5020	/* Disable the DMA */
mbed_official	381:5460fc57b6e4	5021	HAL_DMA_Abort(hhrtim->hdmaMaster);
mbed_official	381:5460fc57b6e4	5022
mbed_official	381:5460fc57b6e4	5023	/* Disable the DMA request(s) */
mbed_official	381:5460fc57b6e4	5024	__HAL_HRTIM_MASTER_DISABLE_DMA(hhrtim,
mbed_official	381:5460fc57b6e4	5025	hhrtim->TimerParam[HRTIM_TIMERINDEX_MASTER].DMARequests);
mbed_official	381:5460fc57b6e4	5026	}
mbed_official	381:5460fc57b6e4	5027
mbed_official	381:5460fc57b6e4	5028	for (timer_idx = HRTIM_TIMERINDEX_TIMER_A ;
mbed_official	381:5460fc57b6e4	5029	timer_idx < HRTIM_TIMERINDEX_MASTER ;
mbed_official	381:5460fc57b6e4	5030	timer_idx++)
mbed_official	381:5460fc57b6e4	5031	{
mbed_official	381:5460fc57b6e4	5032	if (((Timers & TimerIdxToTimerId[timer_idx]) != RESET) &&
mbed_official	381:5460fc57b6e4	5033	(hhrtim->TimerParam[timer_idx].DMARequests != 0))
mbed_official	381:5460fc57b6e4	5034	{
mbed_official	381:5460fc57b6e4	5035	/* Get the timer DMA handler */
mbed_official	381:5460fc57b6e4	5036	hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, timer_idx);
mbed_official	381:5460fc57b6e4	5037
mbed_official	381:5460fc57b6e4	5038	/* Disable the DMA */
mbed_official	381:5460fc57b6e4	5039	HAL_DMA_Abort(hdma);
mbed_official	381:5460fc57b6e4	5040
mbed_official	381:5460fc57b6e4	5041	/* Disable the DMA request(s) */
mbed_official	381:5460fc57b6e4	5042	__HAL_HRTIM_TIMER_DISABLE_DMA(hhrtim,
mbed_official	381:5460fc57b6e4	5043	timer_idx,
mbed_official	381:5460fc57b6e4	5044	hhrtim->TimerParam[timer_idx].DMARequests);
mbed_official	381:5460fc57b6e4	5045	}
mbed_official	381:5460fc57b6e4	5046	}
mbed_official	381:5460fc57b6e4	5047
mbed_official	381:5460fc57b6e4	5048	/* Disable the timer counter */
mbed_official	381:5460fc57b6e4	5049	__HAL_HRTIM_DISABLE(hhrtim, Timers);
mbed_official	381:5460fc57b6e4	5050
mbed_official	381:5460fc57b6e4	5051	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	5052
mbed_official	381:5460fc57b6e4	5053	return HAL_OK;
mbed_official	381:5460fc57b6e4	5054	}
mbed_official	381:5460fc57b6e4	5055
mbed_official	381:5460fc57b6e4	5056	/**
mbed_official	381:5460fc57b6e4	5057	* @brief Enables or disables the HRTIM burst mode controller.
mbed_official	381:5460fc57b6e4	5058	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	5059	* @param Enable: Burst mode controller enabling
mbed_official	381:5460fc57b6e4	5060	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	5061	* @arg HRTIM_BURSTMODECTL_ENABLED: Burst mode enabled
mbed_official	381:5460fc57b6e4	5062	* @arg HRTIM_BURSTMODECTL_DISABLED: Burst mode disabled
mbed_official	381:5460fc57b6e4	5063	* @retval HAL status
mbed_official	381:5460fc57b6e4	5064	* @note This function must be called after starting the timer(s)
mbed_official	381:5460fc57b6e4	5065	*/
mbed_official	381:5460fc57b6e4	5066	HAL_StatusTypeDef HAL_HRTIM_BurstModeCtl(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	5067	uint32_t Enable)
mbed_official	381:5460fc57b6e4	5068	{
mbed_official	381:5460fc57b6e4	5069	uint32_t hrtim_bmcr;
mbed_official	381:5460fc57b6e4	5070
mbed_official	381:5460fc57b6e4	5071	/* Check parameters */
mbed_official	381:5460fc57b6e4	5072	assert_param(IS_HRTIM_BURSTMODECTL(Enable));
mbed_official	381:5460fc57b6e4	5073
mbed_official	381:5460fc57b6e4	5074	if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
mbed_official	381:5460fc57b6e4	5075	{
mbed_official	381:5460fc57b6e4	5076	return HAL_BUSY;
mbed_official	381:5460fc57b6e4	5077	}
mbed_official	381:5460fc57b6e4	5078
mbed_official	381:5460fc57b6e4	5079	/* Process Locked */
mbed_official	381:5460fc57b6e4	5080	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	5081
mbed_official	381:5460fc57b6e4	5082	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	5083
mbed_official	381:5460fc57b6e4	5084	/* Enable/Disable the burst mode controller */
mbed_official	381:5460fc57b6e4	5085	hrtim_bmcr = hhrtim->Instance->sCommonRegs.BMCR;
mbed_official	381:5460fc57b6e4	5086	hrtim_bmcr &= ~(HRTIM_BMCR_BME);
mbed_official	381:5460fc57b6e4	5087	hrtim_bmcr \|= Enable;
mbed_official	381:5460fc57b6e4	5088
mbed_official	381:5460fc57b6e4	5089	/* Update the HRTIM registers */
mbed_official	381:5460fc57b6e4	5090	hhrtim->Instance->sCommonRegs.BMCR = hrtim_bmcr;
mbed_official	381:5460fc57b6e4	5091
mbed_official	381:5460fc57b6e4	5092	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	5093
mbed_official	381:5460fc57b6e4	5094	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	5095	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	5096
mbed_official	381:5460fc57b6e4	5097	return HAL_OK;
mbed_official	381:5460fc57b6e4	5098	}
mbed_official	381:5460fc57b6e4	5099
mbed_official	381:5460fc57b6e4	5100	/**
mbed_official	381:5460fc57b6e4	5101	* @brief Triggers the burst mode operation.
mbed_official	381:5460fc57b6e4	5102	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	5103	* @retval HAL status
mbed_official	381:5460fc57b6e4	5104	*/
mbed_official	381:5460fc57b6e4	5105	HAL_StatusTypeDef HAL_HRTIM_BurstModeSoftwareTrigger(HRTIM_HandleTypeDef *hhrtim)
mbed_official	381:5460fc57b6e4	5106	{
mbed_official	381:5460fc57b6e4	5107	if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
mbed_official	381:5460fc57b6e4	5108	{
mbed_official	381:5460fc57b6e4	5109	return HAL_BUSY;
mbed_official	381:5460fc57b6e4	5110	}
mbed_official	381:5460fc57b6e4	5111
mbed_official	381:5460fc57b6e4	5112	/* Process Locked */
mbed_official	381:5460fc57b6e4	5113	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	5114
mbed_official	381:5460fc57b6e4	5115	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	5116
mbed_official	381:5460fc57b6e4	5117	/* Software trigger of the burst mode controller */
mbed_official	381:5460fc57b6e4	5118	hhrtim->Instance->sCommonRegs.BMTRGR \|= HRTIM_BMTRGR_SW;
mbed_official	381:5460fc57b6e4	5119
mbed_official	381:5460fc57b6e4	5120	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	5121
mbed_official	381:5460fc57b6e4	5122	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	5123	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	5124
mbed_official	381:5460fc57b6e4	5125	return HAL_OK;
mbed_official	381:5460fc57b6e4	5126	}
mbed_official	381:5460fc57b6e4	5127
mbed_official	381:5460fc57b6e4	5128	/**
mbed_official	381:5460fc57b6e4	5129	* @brief Triggers a software capture on the designed capture unit
mbed_official	381:5460fc57b6e4	5130	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	5131	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	5132	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	5133	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	5134	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	5135	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	5136	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	5137	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	5138	* @param CaptureUnit: Capture unit to trig
mbed_official	381:5460fc57b6e4	5139	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	5140	* @arg HRTIM_CAPTUREUNIT_1: Capture unit 1
mbed_official	381:5460fc57b6e4	5141	* @arg HRTIM_CAPTUREUNIT_2: Capture unit 2
mbed_official	381:5460fc57b6e4	5142	* @retval HAL status
mbed_official	381:5460fc57b6e4	5143	* @note The 'software capture' bit in the capure configuration register is
mbed_official	381:5460fc57b6e4	5144	* automatically reset by hardware
mbed_official	381:5460fc57b6e4	5145	*/
mbed_official	381:5460fc57b6e4	5146	HAL_StatusTypeDef HAL_HRTIM_SoftwareCapture(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	5147	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	5148	uint32_t CaptureUnit)
mbed_official	381:5460fc57b6e4	5149	{
mbed_official	381:5460fc57b6e4	5150	/* Check parameters */
mbed_official	381:5460fc57b6e4	5151	assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
mbed_official	381:5460fc57b6e4	5152	assert_param(IS_HRTIM_CAPTUREUNIT(CaptureUnit));
mbed_official	381:5460fc57b6e4	5153
mbed_official	381:5460fc57b6e4	5154	if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
mbed_official	381:5460fc57b6e4	5155	{
mbed_official	381:5460fc57b6e4	5156	return HAL_BUSY;
mbed_official	381:5460fc57b6e4	5157	}
mbed_official	381:5460fc57b6e4	5158
mbed_official	381:5460fc57b6e4	5159	/* Process Locked */
mbed_official	381:5460fc57b6e4	5160	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	5161
mbed_official	381:5460fc57b6e4	5162	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	5163
mbed_official	381:5460fc57b6e4	5164	/* Force a software capture on concerned capture unit */
mbed_official	381:5460fc57b6e4	5165	switch (CaptureUnit)
mbed_official	381:5460fc57b6e4	5166	{
mbed_official	381:5460fc57b6e4	5167	case HRTIM_CAPTUREUNIT_1:
mbed_official	381:5460fc57b6e4	5168	{
mbed_official	381:5460fc57b6e4	5169	hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xCR \|= HRTIM_CPT1CR_SWCPT;
mbed_official	381:5460fc57b6e4	5170	}
mbed_official	381:5460fc57b6e4	5171	break;
mbed_official	381:5460fc57b6e4	5172	case HRTIM_CAPTUREUNIT_2:
mbed_official	381:5460fc57b6e4	5173	{
mbed_official	381:5460fc57b6e4	5174	hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xCR \|= HRTIM_CPT2CR_SWCPT;
mbed_official	381:5460fc57b6e4	5175	}
mbed_official	381:5460fc57b6e4	5176	break;
mbed_official	381:5460fc57b6e4	5177	}
mbed_official	381:5460fc57b6e4	5178
mbed_official	381:5460fc57b6e4	5179	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	5180
mbed_official	381:5460fc57b6e4	5181	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	5182	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	5183
mbed_official	381:5460fc57b6e4	5184	return HAL_OK;
mbed_official	381:5460fc57b6e4	5185	}
mbed_official	381:5460fc57b6e4	5186
mbed_official	381:5460fc57b6e4	5187	/**
mbed_official	381:5460fc57b6e4	5188	* @brief Triggers the update of the registers of one or several timers
mbed_official	381:5460fc57b6e4	5189	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	5190	* @param Timers: timers concerned with the software register update
mbed_official	381:5460fc57b6e4	5191	* This parameter can be any combination of the following values:
mbed_official	381:5460fc57b6e4	5192	* @arg HRTIM_TIMERUPDATE_MASTER
mbed_official	381:5460fc57b6e4	5193	* @arg HRTIM_TIMERUPDATE_A
mbed_official	381:5460fc57b6e4	5194	* @arg HRTIM_TIMERUPDATE_B
mbed_official	381:5460fc57b6e4	5195	* @arg HRTIM_TIMERUPDATE_C
mbed_official	381:5460fc57b6e4	5196	* @arg HRTIM_TIMERUPDATE_D
mbed_official	381:5460fc57b6e4	5197	* @arg HRTIM_TIMERUPDATE_E
mbed_official	381:5460fc57b6e4	5198	* @retval HAL status
mbed_official	381:5460fc57b6e4	5199	* @note The 'software update' bits in the HRTIM conrol register 2 register are
mbed_official	381:5460fc57b6e4	5200	* automatically reset by hardware
mbed_official	381:5460fc57b6e4	5201	*/
mbed_official	381:5460fc57b6e4	5202	HAL_StatusTypeDef HAL_HRTIM_SoftwareUpdate(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	5203	uint32_t Timers)
mbed_official	381:5460fc57b6e4	5204	{
mbed_official	381:5460fc57b6e4	5205	/* Check parameters */
mbed_official	381:5460fc57b6e4	5206	assert_param(IS_HRTIM_TIMERUPDATE(Timers));
mbed_official	381:5460fc57b6e4	5207
mbed_official	381:5460fc57b6e4	5208	if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
mbed_official	381:5460fc57b6e4	5209	{
mbed_official	381:5460fc57b6e4	5210	return HAL_BUSY;
mbed_official	381:5460fc57b6e4	5211	}
mbed_official	381:5460fc57b6e4	5212
mbed_official	381:5460fc57b6e4	5213	/* Process Locked */
mbed_official	381:5460fc57b6e4	5214	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	5215
mbed_official	381:5460fc57b6e4	5216	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	5217
mbed_official	381:5460fc57b6e4	5218	/* Force timer(s) registers update */
mbed_official	381:5460fc57b6e4	5219	hhrtim->Instance->sCommonRegs.CR2 \|= Timers;
mbed_official	381:5460fc57b6e4	5220
mbed_official	381:5460fc57b6e4	5221	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	5222
mbed_official	381:5460fc57b6e4	5223	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	5224	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	5225
mbed_official	381:5460fc57b6e4	5226	return HAL_OK;
mbed_official	381:5460fc57b6e4	5227	}
mbed_official	381:5460fc57b6e4	5228
mbed_official	381:5460fc57b6e4	5229	/**
mbed_official	381:5460fc57b6e4	5230	* @brief Triggers the reset of one or several timers
mbed_official	381:5460fc57b6e4	5231	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	5232	* @param Timers: timers concerned with the software counter reset
mbed_official	381:5460fc57b6e4	5233	* This parameter can be any combination of the following values:
mbed_official	381:5460fc57b6e4	5234	* @arg HRTIM_TIMERRESET_MASTER
mbed_official	381:5460fc57b6e4	5235	* @arg HRTIM_TIMERRESET_TIMER_A
mbed_official	381:5460fc57b6e4	5236	* @arg HRTIM_TIMERRESET_TIMER_B
mbed_official	381:5460fc57b6e4	5237	* @arg HRTIM_TIMERRESET_TIMER_C
mbed_official	381:5460fc57b6e4	5238	* @arg HRTIM_TIMERRESET_TIMER_D
mbed_official	381:5460fc57b6e4	5239	* @arg HRTIM_TIMERRESET_TIMER_E
mbed_official	381:5460fc57b6e4	5240	* @retval HAL status
mbed_official	381:5460fc57b6e4	5241	* @note The 'software reset' bits in the HRTIM conrol register 2 are
mbed_official	381:5460fc57b6e4	5242	* automatically reset by hardware
mbed_official	381:5460fc57b6e4	5243	*/
mbed_official	381:5460fc57b6e4	5244	HAL_StatusTypeDef HAL_HRTIM_SoftwareReset(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	5245	uint32_t Timers)
mbed_official	381:5460fc57b6e4	5246	{
mbed_official	381:5460fc57b6e4	5247	/* Check parameters */
mbed_official	381:5460fc57b6e4	5248	assert_param(IS_HRTIM_TIMERRESET(Timers));
mbed_official	381:5460fc57b6e4	5249
mbed_official	381:5460fc57b6e4	5250	if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
mbed_official	381:5460fc57b6e4	5251	{
mbed_official	381:5460fc57b6e4	5252	return HAL_BUSY;
mbed_official	381:5460fc57b6e4	5253	}
mbed_official	381:5460fc57b6e4	5254
mbed_official	381:5460fc57b6e4	5255	/* Process Locked */
mbed_official	381:5460fc57b6e4	5256	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	5257
mbed_official	381:5460fc57b6e4	5258	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	5259
mbed_official	381:5460fc57b6e4	5260	/* Force timer(s) registers reset */
mbed_official	381:5460fc57b6e4	5261	hhrtim->Instance->sCommonRegs.CR2 = Timers;
mbed_official	381:5460fc57b6e4	5262
mbed_official	381:5460fc57b6e4	5263	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	5264
mbed_official	381:5460fc57b6e4	5265	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	5266	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	5267
mbed_official	381:5460fc57b6e4	5268	return HAL_OK;
mbed_official	381:5460fc57b6e4	5269	}
mbed_official	381:5460fc57b6e4	5270
mbed_official	381:5460fc57b6e4	5271	/**
mbed_official	381:5460fc57b6e4	5272	* @brief Starts a burst DMA operation to update HRTIM control registers content
mbed_official	381:5460fc57b6e4	5273	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	5274	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	5275	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	5276	* @arg HRTIM_TIMERINDEX_MASTER for master timer
mbed_official	381:5460fc57b6e4	5277	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	5278	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	5279	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	5280	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	5281	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	5282	* @param BurstBufferAddress: address of the buffer the HRTIM control registers
mbed_official	381:5460fc57b6e4	5283	* content will be updated from.
mbed_official	381:5460fc57b6e4	5284	* @param BurstBufferLength: size (in WORDS) of the burst buffer.
mbed_official	381:5460fc57b6e4	5285	* @retval HAL status
mbed_official	381:5460fc57b6e4	5286	* @note The TimerIdx parameter determines the dma channel to be used by the
mbed_official	381:5460fc57b6e4	5287	* DMA burst controller (see below)
mbed_official	381:5460fc57b6e4	5288	* HRTIM_TIMERINDEX_MASTER: DMA channel 2 is used by the DMA burst controller
mbed_official	381:5460fc57b6e4	5289	* HRTIM_TIMERINDEX_TIMER_A: DMA channel 3 is used by the DMA burst controller
mbed_official	381:5460fc57b6e4	5290	* HRTIM_TIMERINDEX_TIMER_B: DMA channel 4 is used by the DMA burst controller
mbed_official	381:5460fc57b6e4	5291	* HRTIM_TIMERINDEX_TIMER_C: DMA channel 5 is used by the DMA burst controller
mbed_official	381:5460fc57b6e4	5292	* HRTIM_TIMERINDEX_TIMER_D: DMA channel 6 is used by the DMA burst controller
mbed_official	381:5460fc57b6e4	5293	* HRTIM_TIMERINDEX_TIMER_E: DMA channel 7 is used by the DMA burst controller
mbed_official	381:5460fc57b6e4	5294	*/
mbed_official	381:5460fc57b6e4	5295	HAL_StatusTypeDef HAL_HRTIM_BurstDMATransfer(HRTIM_HandleTypeDef *hhrtim,
mbed_official	381:5460fc57b6e4	5296	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	5297	uint32_t BurstBufferAddress,
mbed_official	381:5460fc57b6e4	5298	uint32_t BurstBufferLength)
mbed_official	381:5460fc57b6e4	5299	{
mbed_official	381:5460fc57b6e4	5300	DMA_HandleTypeDef * hdma;
mbed_official	381:5460fc57b6e4	5301
mbed_official	381:5460fc57b6e4	5302	/* Check the parameters */
mbed_official	381:5460fc57b6e4	5303	assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
mbed_official	381:5460fc57b6e4	5304
mbed_official	381:5460fc57b6e4	5305	if((hhrtim->State == HAL_HRTIM_STATE_BUSY))
mbed_official	381:5460fc57b6e4	5306	{
mbed_official	381:5460fc57b6e4	5307	return HAL_BUSY;
mbed_official	381:5460fc57b6e4	5308	}
mbed_official	381:5460fc57b6e4	5309	if((hhrtim->State == HAL_HRTIM_STATE_READY))
mbed_official	381:5460fc57b6e4	5310	{
mbed_official	381:5460fc57b6e4	5311	if((BurstBufferAddress == 0 ) \|\| (BurstBufferLength == 0))
mbed_official	381:5460fc57b6e4	5312	{
mbed_official	381:5460fc57b6e4	5313	return HAL_ERROR;
mbed_official	381:5460fc57b6e4	5314	}
mbed_official	381:5460fc57b6e4	5315	else
mbed_official	381:5460fc57b6e4	5316	{
mbed_official	381:5460fc57b6e4	5317	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	5318	}
mbed_official	381:5460fc57b6e4	5319	}
mbed_official	381:5460fc57b6e4	5320
mbed_official	381:5460fc57b6e4	5321	/* Process Locked */
mbed_official	381:5460fc57b6e4	5322	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	5323
mbed_official	381:5460fc57b6e4	5324	/* Get the timer DMA handler */
mbed_official	381:5460fc57b6e4	5325	hdma = HRTIM_GetDMAHandleFromTimerIdx(hhrtim, TimerIdx);
mbed_official	381:5460fc57b6e4	5326
mbed_official	381:5460fc57b6e4	5327	/* Set the DMA transfer completed callback */
mbed_official	381:5460fc57b6e4	5328	hdma->XferCpltCallback = HRTIM_BurstDMACplt;
mbed_official	381:5460fc57b6e4	5329
mbed_official	381:5460fc57b6e4	5330	/* Set the DMA error callback */
mbed_official	381:5460fc57b6e4	5331	hdma->XferErrorCallback = HRTIM_DMAError ;
mbed_official	381:5460fc57b6e4	5332
mbed_official	381:5460fc57b6e4	5333	/* Enable the DMA channel */
mbed_official	381:5460fc57b6e4	5334	HAL_DMA_Start_IT(hdma,
mbed_official	381:5460fc57b6e4	5335	BurstBufferAddress,
mbed_official	381:5460fc57b6e4	5336	(uint32_t)&(hhrtim->Instance->sCommonRegs.BDMADR),
mbed_official	381:5460fc57b6e4	5337	BurstBufferLength);
mbed_official	381:5460fc57b6e4	5338
mbed_official	381:5460fc57b6e4	5339	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	5340
mbed_official	381:5460fc57b6e4	5341	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	5342	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	5343
mbed_official	381:5460fc57b6e4	5344	return HAL_OK;
mbed_official	381:5460fc57b6e4	5345	}
mbed_official	381:5460fc57b6e4	5346
mbed_official	381:5460fc57b6e4	5347	/**
mbed_official	381:5460fc57b6e4	5348	* @brief Enables the transfer from preload to active registers for one
mbed_official	381:5460fc57b6e4	5349	* or several timing units (including master timer)
mbed_official	381:5460fc57b6e4	5350	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	5351	* @param Timers: Timer(s) concerned by the register preload enabling command
mbed_official	381:5460fc57b6e4	5352	* This parameter can be any combination of the following values:
mbed_official	381:5460fc57b6e4	5353	* @arg HRTIM_TIMERUPDATE_MASTER
mbed_official	381:5460fc57b6e4	5354	* @arg HRTIM_TIMERUPDATE_A
mbed_official	381:5460fc57b6e4	5355	* @arg HRTIM_TIMERUPDATE_B
mbed_official	381:5460fc57b6e4	5356	* @arg HRTIM_TIMERUPDATE_C
mbed_official	381:5460fc57b6e4	5357	* @arg HRTIM_TIMERUPDATE_D
mbed_official	381:5460fc57b6e4	5358	* @arg HRTIM_TIMERUPDATE_E
mbed_official	381:5460fc57b6e4	5359	* @retval HAL status
mbed_official	381:5460fc57b6e4	5360	*/
mbed_official	381:5460fc57b6e4	5361	HAL_StatusTypeDef HAL_HRTIM_UpdateEnable(HRTIM_HandleTypeDef *hhrtim,
mbed_official	381:5460fc57b6e4	5362	uint32_t Timers)
mbed_official	381:5460fc57b6e4	5363	{
mbed_official	381:5460fc57b6e4	5364	/* Check the parameters */
mbed_official	381:5460fc57b6e4	5365	assert_param(IS_HRTIM_TIMERUPDATE(Timers));
mbed_official	381:5460fc57b6e4	5366
mbed_official	381:5460fc57b6e4	5367	/* Process Locked */
mbed_official	381:5460fc57b6e4	5368	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	5369
mbed_official	381:5460fc57b6e4	5370	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	5371
mbed_official	381:5460fc57b6e4	5372	/* Enable timer(s) registers update */
mbed_official	381:5460fc57b6e4	5373	hhrtim->Instance->sCommonRegs.CR1 &= ~(Timers);
mbed_official	381:5460fc57b6e4	5374
mbed_official	381:5460fc57b6e4	5375	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	5376
mbed_official	381:5460fc57b6e4	5377	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	5378	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	5379
mbed_official	381:5460fc57b6e4	5380	return HAL_OK;
mbed_official	381:5460fc57b6e4	5381	}
mbed_official	381:5460fc57b6e4	5382
mbed_official	381:5460fc57b6e4	5383	/**
mbed_official	381:5460fc57b6e4	5384	* @brief Disables the transfer from preload to active registers for one
mbed_official	381:5460fc57b6e4	5385	* or several timing units (including master timer)
mbed_official	381:5460fc57b6e4	5386	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	5387	* @param Timers: Timer(s) concerned by the register preload disabling command
mbed_official	381:5460fc57b6e4	5388	* This parameter can be any combination of the following values:
mbed_official	381:5460fc57b6e4	5389	* @arg HRTIM_TIMERUPDATE_MASTER
mbed_official	381:5460fc57b6e4	5390	* @arg HRTIM_TIMERUPDATE_A
mbed_official	381:5460fc57b6e4	5391	* @arg HRTIM_TIMERUPDATE_B
mbed_official	381:5460fc57b6e4	5392	* @arg HRTIM_TIMERUPDATE_C
mbed_official	381:5460fc57b6e4	5393	* @arg HRTIM_TIMERUPDATE_D
mbed_official	381:5460fc57b6e4	5394	* @arg HRTIM_TIMERUPDATE_E
mbed_official	381:5460fc57b6e4	5395	* @retval HAL status
mbed_official	381:5460fc57b6e4	5396	*/
mbed_official	381:5460fc57b6e4	5397	HAL_StatusTypeDef HAL_HRTIM_UpdateDisable(HRTIM_HandleTypeDef *hhrtim,
mbed_official	381:5460fc57b6e4	5398	uint32_t Timers)
mbed_official	381:5460fc57b6e4	5399	{
mbed_official	381:5460fc57b6e4	5400	/* Check the parameters */
mbed_official	381:5460fc57b6e4	5401	assert_param(IS_HRTIM_TIMERUPDATE(Timers));
mbed_official	381:5460fc57b6e4	5402
mbed_official	381:5460fc57b6e4	5403	/* Process Locked */
mbed_official	381:5460fc57b6e4	5404	__HAL_LOCK(hhrtim);
mbed_official	381:5460fc57b6e4	5405
mbed_official	381:5460fc57b6e4	5406	hhrtim->State = HAL_HRTIM_STATE_BUSY;
mbed_official	381:5460fc57b6e4	5407
mbed_official	381:5460fc57b6e4	5408	/* Enable timer(s) registers update */
mbed_official	381:5460fc57b6e4	5409	hhrtim->Instance->sCommonRegs.CR1 \|= (Timers);
mbed_official	381:5460fc57b6e4	5410
mbed_official	381:5460fc57b6e4	5411	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	5412
mbed_official	381:5460fc57b6e4	5413	/* Process Unlocked */
mbed_official	381:5460fc57b6e4	5414	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	5415
mbed_official	381:5460fc57b6e4	5416	return HAL_OK;
mbed_official	381:5460fc57b6e4	5417	}
mbed_official	381:5460fc57b6e4	5418
mbed_official	381:5460fc57b6e4	5419	/**
mbed_official	381:5460fc57b6e4	5420	* @}
mbed_official	381:5460fc57b6e4	5421	*/
mbed_official	381:5460fc57b6e4	5422
mbed_official	381:5460fc57b6e4	5423	/** @defgroup HRTIM_Exported_Functions_Group9 Peripheral state functions
mbed_official	381:5460fc57b6e4	5424	* @brief Functions used to get HRTIM or HRTIM timer specific
mbed_official	381:5460fc57b6e4	5425	* information.
mbed_official	381:5460fc57b6e4	5426	*
mbed_official	381:5460fc57b6e4	5427	@verbatim
mbed_official	381:5460fc57b6e4	5428	===============================================================================
mbed_official	381:5460fc57b6e4	5429	##### Peripheral State functions #####
mbed_official	381:5460fc57b6e4	5430	===============================================================================
mbed_official	381:5460fc57b6e4	5431	[..] This section provides functions allowing to:
mbed_official	381:5460fc57b6e4	5432	(+) Get HRTIM HAL state
mbed_official	381:5460fc57b6e4	5433	(+) Get captured value
mbed_official	381:5460fc57b6e4	5434	(+) Get HRTIM timer output level
mbed_official	381:5460fc57b6e4	5435	(+) Get HRTIM timer output state
mbed_official	381:5460fc57b6e4	5436	(+) Get delayed protection status
mbed_official	381:5460fc57b6e4	5437	(+) Get burst status
mbed_official	381:5460fc57b6e4	5438	(+) Get current push-pull status
mbed_official	381:5460fc57b6e4	5439	(+) Get idle push-pull status
mbed_official	381:5460fc57b6e4	5440
mbed_official	381:5460fc57b6e4	5441	@endverbatim
mbed_official	381:5460fc57b6e4	5442	* @{
mbed_official	381:5460fc57b6e4	5443	*/
mbed_official	381:5460fc57b6e4	5444
mbed_official	381:5460fc57b6e4	5445	/**
mbed_official	381:5460fc57b6e4	5446	* @brief return the HRTIM HAL state
mbed_official	381:5460fc57b6e4	5447	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	5448	* @retval HAL state
mbed_official	381:5460fc57b6e4	5449	*/
mbed_official	381:5460fc57b6e4	5450	HAL_HRTIM_StateTypeDef HAL_HRTIM_GetState(HRTIM_HandleTypeDef* hhrtim)
mbed_official	381:5460fc57b6e4	5451	{
mbed_official	381:5460fc57b6e4	5452	/* Return ADC state */
mbed_official	381:5460fc57b6e4	5453	return hhrtim->State;
mbed_official	381:5460fc57b6e4	5454	}
mbed_official	381:5460fc57b6e4	5455
mbed_official	381:5460fc57b6e4	5456	/**
mbed_official	381:5460fc57b6e4	5457	* @brief Returns actual value of the capture register of the designated capture unit
mbed_official	381:5460fc57b6e4	5458	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	5459	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	5460	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	5461	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	5462	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	5463	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	5464	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	5465	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	5466	* @param CaptureUnit: Capture unit to trig
mbed_official	381:5460fc57b6e4	5467	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	5468	* @arg HRTIM_CAPTUREUNIT_1: Capture unit 1
mbed_official	381:5460fc57b6e4	5469	* @arg HRTIM_CAPTUREUNIT_2: Capture unit 2
mbed_official	381:5460fc57b6e4	5470	* @retval Captured value
mbed_official	381:5460fc57b6e4	5471	*/
mbed_official	381:5460fc57b6e4	5472	uint32_t HAL_HRTIM_GetCapturedValue(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	5473	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	5474	uint32_t CaptureUnit)
mbed_official	381:5460fc57b6e4	5475	{
mbed_official	381:5460fc57b6e4	5476	uint32_t captured_value = 0;
mbed_official	381:5460fc57b6e4	5477
mbed_official	381:5460fc57b6e4	5478	/* Check parameters */
mbed_official	381:5460fc57b6e4	5479	assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
mbed_official	381:5460fc57b6e4	5480	assert_param(IS_HRTIM_CAPTUREUNIT(CaptureUnit));
mbed_official	381:5460fc57b6e4	5481
mbed_official	381:5460fc57b6e4	5482	/* Read captured value */
mbed_official	381:5460fc57b6e4	5483	switch (CaptureUnit)
mbed_official	381:5460fc57b6e4	5484	{
mbed_official	381:5460fc57b6e4	5485	case HRTIM_CAPTUREUNIT_1:
mbed_official	381:5460fc57b6e4	5486	{
mbed_official	381:5460fc57b6e4	5487	captured_value = hhrtim->Instance->sTimerxRegs[TimerIdx].CPT1xR;
mbed_official	381:5460fc57b6e4	5488	}
mbed_official	381:5460fc57b6e4	5489	break;
mbed_official	381:5460fc57b6e4	5490	case HRTIM_CAPTUREUNIT_2:
mbed_official	381:5460fc57b6e4	5491	{
mbed_official	381:5460fc57b6e4	5492	captured_value = hhrtim->Instance->sTimerxRegs[TimerIdx].CPT2xR;
mbed_official	381:5460fc57b6e4	5493	}
mbed_official	381:5460fc57b6e4	5494	break;
mbed_official	381:5460fc57b6e4	5495	}
mbed_official	381:5460fc57b6e4	5496
mbed_official	381:5460fc57b6e4	5497	return captured_value;
mbed_official	381:5460fc57b6e4	5498	}
mbed_official	381:5460fc57b6e4	5499
mbed_official	381:5460fc57b6e4	5500	/**
mbed_official	381:5460fc57b6e4	5501	* @brief Returns actual level (active or inactive) of the designated output
mbed_official	381:5460fc57b6e4	5502	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	5503	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	5504	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	5505	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	5506	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	5507	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	5508	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	5509	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	5510	* @param Output: Timer output
mbed_official	381:5460fc57b6e4	5511	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	5512	* @arg HRTIM_OUTPUT_TA1: Timer A - Ouput 1
mbed_official	381:5460fc57b6e4	5513	* @arg HRTIM_OUTPUT_TA2: Timer A - Ouput 2
mbed_official	381:5460fc57b6e4	5514	* @arg HRTIM_OUTPUT_TB1: Timer B - Ouput 1
mbed_official	381:5460fc57b6e4	5515	* @arg HRTIM_OUTPUT_TB2: Timer B - Ouput 2
mbed_official	381:5460fc57b6e4	5516	* @arg HRTIM_OUTPUT_TC1: Timer C - Ouput 1
mbed_official	381:5460fc57b6e4	5517	* @arg HRTIM_OUTPUT_TC2: Timer C - Ouput 2
mbed_official	381:5460fc57b6e4	5518	* @arg HRTIM_OUTPUT_TD1: Timer D - Ouput 1
mbed_official	381:5460fc57b6e4	5519	* @arg HRTIM_OUTPUT_TD2: Timer D - Ouput 2
mbed_official	381:5460fc57b6e4	5520	* @arg HRTIM_OUTPUT_TE1: Timer E - Ouput 1
mbed_official	381:5460fc57b6e4	5521	* @arg HRTIM_OUTPUT_TE2: Timer E - Ouput 2
mbed_official	381:5460fc57b6e4	5522	* @retval Output level
mbed_official	381:5460fc57b6e4	5523	* @note Returned output level is taken before the output stage (chopper,
mbed_official	381:5460fc57b6e4	5524	* polarity).
mbed_official	381:5460fc57b6e4	5525	*/
mbed_official	381:5460fc57b6e4	5526	uint32_t HAL_HRTIM_WaveformGetOutputLevel(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	5527	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	5528	uint32_t Output)
mbed_official	381:5460fc57b6e4	5529	{
mbed_official	381:5460fc57b6e4	5530	uint32_t output_level = HRTIM_OUTPUTLEVEL_INACTIVE;
mbed_official	381:5460fc57b6e4	5531
mbed_official	381:5460fc57b6e4	5532	/* Check parameters */
mbed_official	381:5460fc57b6e4	5533	assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, Output));
mbed_official	381:5460fc57b6e4	5534
mbed_official	381:5460fc57b6e4	5535	/* Read the output level */
mbed_official	381:5460fc57b6e4	5536	switch (Output)
mbed_official	381:5460fc57b6e4	5537	{
mbed_official	381:5460fc57b6e4	5538	case HRTIM_OUTPUT_TA1:
mbed_official	381:5460fc57b6e4	5539	case HRTIM_OUTPUT_TB1:
mbed_official	381:5460fc57b6e4	5540	case HRTIM_OUTPUT_TC1:
mbed_official	381:5460fc57b6e4	5541	case HRTIM_OUTPUT_TD1:
mbed_official	381:5460fc57b6e4	5542	case HRTIM_OUTPUT_TE1:
mbed_official	381:5460fc57b6e4	5543	{
mbed_official	381:5460fc57b6e4	5544	if ((hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxISR & HRTIM_TIMISR_O1CPY) != RESET)
mbed_official	381:5460fc57b6e4	5545	{
mbed_official	381:5460fc57b6e4	5546	output_level = HRTIM_OUTPUTLEVEL_ACTIVE;
mbed_official	381:5460fc57b6e4	5547	}
mbed_official	381:5460fc57b6e4	5548	else
mbed_official	381:5460fc57b6e4	5549	{
mbed_official	381:5460fc57b6e4	5550	output_level = HRTIM_OUTPUTLEVEL_INACTIVE;
mbed_official	381:5460fc57b6e4	5551	}
mbed_official	381:5460fc57b6e4	5552	}
mbed_official	381:5460fc57b6e4	5553	break;
mbed_official	381:5460fc57b6e4	5554	case HRTIM_OUTPUT_TA2:
mbed_official	381:5460fc57b6e4	5555	case HRTIM_OUTPUT_TB2:
mbed_official	381:5460fc57b6e4	5556	case HRTIM_OUTPUT_TC2:
mbed_official	381:5460fc57b6e4	5557	case HRTIM_OUTPUT_TD2:
mbed_official	381:5460fc57b6e4	5558	case HRTIM_OUTPUT_TE2:
mbed_official	381:5460fc57b6e4	5559	{
mbed_official	381:5460fc57b6e4	5560	if ((hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxISR & HRTIM_TIMISR_O2CPY) != RESET)
mbed_official	381:5460fc57b6e4	5561	{
mbed_official	381:5460fc57b6e4	5562	output_level = HRTIM_OUTPUTLEVEL_ACTIVE;
mbed_official	381:5460fc57b6e4	5563	}
mbed_official	381:5460fc57b6e4	5564	else
mbed_official	381:5460fc57b6e4	5565	{
mbed_official	381:5460fc57b6e4	5566	output_level = HRTIM_OUTPUTLEVEL_INACTIVE;
mbed_official	381:5460fc57b6e4	5567	}
mbed_official	381:5460fc57b6e4	5568	}
mbed_official	381:5460fc57b6e4	5569	break;
mbed_official	381:5460fc57b6e4	5570	}
mbed_official	381:5460fc57b6e4	5571
mbed_official	381:5460fc57b6e4	5572	return output_level;
mbed_official	381:5460fc57b6e4	5573	}
mbed_official	381:5460fc57b6e4	5574
mbed_official	381:5460fc57b6e4	5575	/**
mbed_official	381:5460fc57b6e4	5576	* @brief Returns actual state (RUN, IDLE, FAULT) of the designated output
mbed_official	381:5460fc57b6e4	5577	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	5578	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	5579	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	5580	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	5581	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	5582	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	5583	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	5584	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	5585	* @param Output: Timer output
mbed_official	381:5460fc57b6e4	5586	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	5587	* @arg HRTIM_OUTPUT_TA1: Timer A - Ouput 1
mbed_official	381:5460fc57b6e4	5588	* @arg HRTIM_OUTPUT_TA2: Timer A - Ouput 2
mbed_official	381:5460fc57b6e4	5589	* @arg HRTIM_OUTPUT_TB1: Timer B - Ouput 1
mbed_official	381:5460fc57b6e4	5590	* @arg HRTIM_OUTPUT_TB2: Timer B - Ouput 2
mbed_official	381:5460fc57b6e4	5591	* @arg HRTIM_OUTPUT_TC1: Timer C - Ouput 1
mbed_official	381:5460fc57b6e4	5592	* @arg HRTIM_OUTPUT_TC2: Timer C - Ouput 2
mbed_official	381:5460fc57b6e4	5593	* @arg HRTIM_OUTPUT_TD1: Timer D - Ouput 1
mbed_official	381:5460fc57b6e4	5594	* @arg HRTIM_OUTPUT_TD2: Timer D - Ouput 2
mbed_official	381:5460fc57b6e4	5595	* @arg HRTIM_OUTPUT_TE1: Timer E - Ouput 1
mbed_official	381:5460fc57b6e4	5596	* @arg HRTIM_OUTPUT_TE2: Timer E - Ouput 2
mbed_official	381:5460fc57b6e4	5597	* @retval Output state
mbed_official	381:5460fc57b6e4	5598	*/
mbed_official	381:5460fc57b6e4	5599	uint32_t HAL_HRTIM_WaveformGetOutputState(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	5600	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	5601	uint32_t Output)
mbed_official	381:5460fc57b6e4	5602	{
mbed_official	381:5460fc57b6e4	5603	uint32_t output_bit = 0;
mbed_official	381:5460fc57b6e4	5604	uint32_t output_state = HRTIM_OUTPUTSTATE_IDLE;
mbed_official	381:5460fc57b6e4	5605
mbed_official	381:5460fc57b6e4	5606	/* Check parameters */
mbed_official	381:5460fc57b6e4	5607	assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, Output));
mbed_official	381:5460fc57b6e4	5608
mbed_official	381:5460fc57b6e4	5609	/* Set output state according to output control status and output disable status */
mbed_official	381:5460fc57b6e4	5610	switch (Output)
mbed_official	381:5460fc57b6e4	5611	{
mbed_official	381:5460fc57b6e4	5612	case HRTIM_OUTPUT_TA1:
mbed_official	381:5460fc57b6e4	5613	{
mbed_official	381:5460fc57b6e4	5614	output_bit = HRTIM_OENR_TA1OEN;
mbed_official	381:5460fc57b6e4	5615	}
mbed_official	381:5460fc57b6e4	5616	break;
mbed_official	381:5460fc57b6e4	5617	case HRTIM_OUTPUT_TA2:
mbed_official	381:5460fc57b6e4	5618	{
mbed_official	381:5460fc57b6e4	5619	output_bit = HRTIM_OENR_TA2OEN;
mbed_official	381:5460fc57b6e4	5620	}
mbed_official	381:5460fc57b6e4	5621	break;
mbed_official	381:5460fc57b6e4	5622	case HRTIM_OUTPUT_TB1:
mbed_official	381:5460fc57b6e4	5623	{
mbed_official	381:5460fc57b6e4	5624	output_bit = HRTIM_OENR_TB1OEN;
mbed_official	381:5460fc57b6e4	5625	}
mbed_official	381:5460fc57b6e4	5626	break;
mbed_official	381:5460fc57b6e4	5627	case HRTIM_OUTPUT_TB2:
mbed_official	381:5460fc57b6e4	5628	{
mbed_official	381:5460fc57b6e4	5629	output_bit = HRTIM_OENR_TB2OEN;
mbed_official	381:5460fc57b6e4	5630	}
mbed_official	381:5460fc57b6e4	5631	break;
mbed_official	381:5460fc57b6e4	5632	case HRTIM_OUTPUT_TC1:
mbed_official	381:5460fc57b6e4	5633	{
mbed_official	381:5460fc57b6e4	5634	output_bit = HRTIM_OENR_TC1OEN;
mbed_official	381:5460fc57b6e4	5635	}
mbed_official	381:5460fc57b6e4	5636	break;
mbed_official	381:5460fc57b6e4	5637	case HRTIM_OUTPUT_TC2:
mbed_official	381:5460fc57b6e4	5638	{
mbed_official	381:5460fc57b6e4	5639	output_bit = HRTIM_OENR_TC2OEN;
mbed_official	381:5460fc57b6e4	5640	}
mbed_official	381:5460fc57b6e4	5641	break;
mbed_official	381:5460fc57b6e4	5642	case HRTIM_OUTPUT_TD1:
mbed_official	381:5460fc57b6e4	5643	{
mbed_official	381:5460fc57b6e4	5644	output_bit = HRTIM_OENR_TD1OEN;
mbed_official	381:5460fc57b6e4	5645	}
mbed_official	381:5460fc57b6e4	5646	break;
mbed_official	381:5460fc57b6e4	5647	case HRTIM_OUTPUT_TD2:
mbed_official	381:5460fc57b6e4	5648	{
mbed_official	381:5460fc57b6e4	5649	output_bit = HRTIM_OENR_TD2OEN;
mbed_official	381:5460fc57b6e4	5650	}
mbed_official	381:5460fc57b6e4	5651	break;
mbed_official	381:5460fc57b6e4	5652	case HRTIM_OUTPUT_TE1:
mbed_official	381:5460fc57b6e4	5653	{
mbed_official	381:5460fc57b6e4	5654	output_bit = HRTIM_OENR_TE1OEN;
mbed_official	381:5460fc57b6e4	5655	}
mbed_official	381:5460fc57b6e4	5656	break;
mbed_official	381:5460fc57b6e4	5657	case HRTIM_OUTPUT_TE2:
mbed_official	381:5460fc57b6e4	5658	{
mbed_official	381:5460fc57b6e4	5659	output_bit = HRTIM_OENR_TE2OEN;
mbed_official	381:5460fc57b6e4	5660	}
mbed_official	381:5460fc57b6e4	5661	break;
mbed_official	381:5460fc57b6e4	5662	}
mbed_official	381:5460fc57b6e4	5663
mbed_official	381:5460fc57b6e4	5664	if ((hhrtim->Instance->sCommonRegs.OENR & output_bit) != RESET)
mbed_official	381:5460fc57b6e4	5665	{
mbed_official	381:5460fc57b6e4	5666	/* Output is enabled: output in RUN state (whatever ouput disable status is)*/
mbed_official	381:5460fc57b6e4	5667	output_state = HRTIM_OUTPUTSTATE_RUN;
mbed_official	381:5460fc57b6e4	5668	}
mbed_official	381:5460fc57b6e4	5669	else
mbed_official	381:5460fc57b6e4	5670	{
mbed_official	381:5460fc57b6e4	5671	if ((hhrtim->Instance->sCommonRegs.ODSR & output_bit) != RESET)
mbed_official	381:5460fc57b6e4	5672	{
mbed_official	381:5460fc57b6e4	5673	/* Output is disabled: output in FAULT state */
mbed_official	381:5460fc57b6e4	5674	output_state = HRTIM_OUTPUTSTATE_FAULT;
mbed_official	381:5460fc57b6e4	5675	}
mbed_official	381:5460fc57b6e4	5676	else
mbed_official	381:5460fc57b6e4	5677	{
mbed_official	381:5460fc57b6e4	5678	/* Output is disabled: output in IDLE state */
mbed_official	381:5460fc57b6e4	5679	output_state = HRTIM_OUTPUTSTATE_IDLE;
mbed_official	381:5460fc57b6e4	5680	}
mbed_official	381:5460fc57b6e4	5681	}
mbed_official	381:5460fc57b6e4	5682
mbed_official	381:5460fc57b6e4	5683	return(output_state);
mbed_official	381:5460fc57b6e4	5684	}
mbed_official	381:5460fc57b6e4	5685
mbed_official	381:5460fc57b6e4	5686	/**
mbed_official	381:5460fc57b6e4	5687	* @brief Returns the level (active or inactive) of the designated output
mbed_official	381:5460fc57b6e4	5688	* when the delayed protection was triggered
mbed_official	381:5460fc57b6e4	5689	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	5690	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	5691	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	5692	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	5693	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	5694	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	5695	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	5696	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	5697	* @param Output: Timer output
mbed_official	381:5460fc57b6e4	5698	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	5699	* @arg HRTIM_OUTPUT_TA1: Timer A - Ouput 1
mbed_official	381:5460fc57b6e4	5700	* @arg HRTIM_OUTPUT_TA2: Timer A - Ouput 2
mbed_official	381:5460fc57b6e4	5701	* @arg HRTIM_OUTPUT_TB1: Timer B - Ouput 1
mbed_official	381:5460fc57b6e4	5702	* @arg HRTIM_OUTPUT_TB2: Timer B - Ouput 2
mbed_official	381:5460fc57b6e4	5703	* @arg HRTIM_OUTPUT_TC1: Timer C - Ouput 1
mbed_official	381:5460fc57b6e4	5704	* @arg HRTIM_OUTPUT_TC2: Timer C - Ouput 2
mbed_official	381:5460fc57b6e4	5705	* @arg HRTIM_OUTPUT_TD1: Timer D - Ouput 1
mbed_official	381:5460fc57b6e4	5706	* @arg HRTIM_OUTPUT_TD2: Timer D - Ouput 2
mbed_official	381:5460fc57b6e4	5707	* @arg HRTIM_OUTPUT_TD1: Timer E - Ouput 1
mbed_official	381:5460fc57b6e4	5708	* @arg HRTIM_OUTPUT_TD2: Timer E - Ouput 2
mbed_official	381:5460fc57b6e4	5709	* @retval Delayed protection status
mbed_official	381:5460fc57b6e4	5710	*/
mbed_official	381:5460fc57b6e4	5711	uint32_t HAL_HRTIM_GetDelayedProtectionStatus(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	5712	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	5713	uint32_t Output)
mbed_official	381:5460fc57b6e4	5714	{
mbed_official	381:5460fc57b6e4	5715	uint32_t delayed_protection_status = HRTIM_OUTPUTLEVEL_INACTIVE;
mbed_official	381:5460fc57b6e4	5716
mbed_official	381:5460fc57b6e4	5717	/* Check parameters */
mbed_official	381:5460fc57b6e4	5718	assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, Output));
mbed_official	381:5460fc57b6e4	5719
mbed_official	381:5460fc57b6e4	5720	/* Read the delayed protection status */
mbed_official	381:5460fc57b6e4	5721	switch (Output)
mbed_official	381:5460fc57b6e4	5722	{
mbed_official	381:5460fc57b6e4	5723	case HRTIM_OUTPUT_TA1:
mbed_official	381:5460fc57b6e4	5724	case HRTIM_OUTPUT_TB1:
mbed_official	381:5460fc57b6e4	5725	case HRTIM_OUTPUT_TC1:
mbed_official	381:5460fc57b6e4	5726	case HRTIM_OUTPUT_TD1:
mbed_official	381:5460fc57b6e4	5727	case HRTIM_OUTPUT_TE1:
mbed_official	381:5460fc57b6e4	5728	{
mbed_official	381:5460fc57b6e4	5729	if ((hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxISR & HRTIM_TIMISR_O1STAT) != RESET)
mbed_official	381:5460fc57b6e4	5730	{
mbed_official	381:5460fc57b6e4	5731	/* Output 1 was active when the delayed idle protection was triggered */
mbed_official	381:5460fc57b6e4	5732	delayed_protection_status = HRTIM_OUTPUTLEVEL_ACTIVE;
mbed_official	381:5460fc57b6e4	5733	}
mbed_official	381:5460fc57b6e4	5734	else
mbed_official	381:5460fc57b6e4	5735	{
mbed_official	381:5460fc57b6e4	5736	/* Output 1 was inactive when the delayed idle protection was triggered */
mbed_official	381:5460fc57b6e4	5737	delayed_protection_status = HRTIM_OUTPUTLEVEL_INACTIVE;
mbed_official	381:5460fc57b6e4	5738	}
mbed_official	381:5460fc57b6e4	5739	}
mbed_official	381:5460fc57b6e4	5740	break;
mbed_official	381:5460fc57b6e4	5741	case HRTIM_OUTPUT_TA2:
mbed_official	381:5460fc57b6e4	5742	case HRTIM_OUTPUT_TB2:
mbed_official	381:5460fc57b6e4	5743	case HRTIM_OUTPUT_TC2:
mbed_official	381:5460fc57b6e4	5744	case HRTIM_OUTPUT_TD2:
mbed_official	381:5460fc57b6e4	5745	case HRTIM_OUTPUT_TE2:
mbed_official	381:5460fc57b6e4	5746	{
mbed_official	381:5460fc57b6e4	5747	if ((hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxISR & HRTIM_TIMISR_O2STAT) != RESET)
mbed_official	381:5460fc57b6e4	5748	{
mbed_official	381:5460fc57b6e4	5749	/* Output 2 was active when the delayed idle protection was triggered */
mbed_official	381:5460fc57b6e4	5750	delayed_protection_status = HRTIM_OUTPUTLEVEL_ACTIVE;
mbed_official	381:5460fc57b6e4	5751	}
mbed_official	381:5460fc57b6e4	5752	else
mbed_official	381:5460fc57b6e4	5753	{
mbed_official	381:5460fc57b6e4	5754	/* Output 2 was inactive when the delayed idle protection was triggered */
mbed_official	381:5460fc57b6e4	5755	delayed_protection_status = HRTIM_OUTPUTLEVEL_INACTIVE;
mbed_official	381:5460fc57b6e4	5756	}
mbed_official	381:5460fc57b6e4	5757	}
mbed_official	381:5460fc57b6e4	5758	break;
mbed_official	381:5460fc57b6e4	5759	}
mbed_official	381:5460fc57b6e4	5760
mbed_official	381:5460fc57b6e4	5761	return delayed_protection_status;
mbed_official	381:5460fc57b6e4	5762	}
mbed_official	381:5460fc57b6e4	5763
mbed_official	381:5460fc57b6e4	5764	/**
mbed_official	381:5460fc57b6e4	5765	* @brief Returns the actual status (active or inactive) of the burst mode controller
mbed_official	381:5460fc57b6e4	5766	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	5767	* @retval Burst mode controller status
mbed_official	381:5460fc57b6e4	5768	*/
mbed_official	381:5460fc57b6e4	5769	uint32_t HAL_HRTIM_GetBurstStatus(HRTIM_HandleTypeDef * hhrtim)
mbed_official	381:5460fc57b6e4	5770	{
mbed_official	381:5460fc57b6e4	5771	uint32_t burst_mode_status;
mbed_official	381:5460fc57b6e4	5772
mbed_official	381:5460fc57b6e4	5773	/* Read burst mode status */
mbed_official	381:5460fc57b6e4	5774	burst_mode_status = (hhrtim->Instance->sCommonRegs.BMCR & HRTIM_BMCR_BMSTAT);
mbed_official	381:5460fc57b6e4	5775
mbed_official	381:5460fc57b6e4	5776	return burst_mode_status;
mbed_official	381:5460fc57b6e4	5777	}
mbed_official	381:5460fc57b6e4	5778
mbed_official	381:5460fc57b6e4	5779	/**
mbed_official	381:5460fc57b6e4	5780	* @brief Indicates on which output the signal is currently active (when the
mbed_official	381:5460fc57b6e4	5781	* push pull mode is enabled)
mbed_official	381:5460fc57b6e4	5782	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	5783	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	5784	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	5785	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	5786	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	5787	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	5788	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	5789	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	5790	* @retval Burst mode controller status
mbed_official	381:5460fc57b6e4	5791	*/
mbed_official	381:5460fc57b6e4	5792	uint32_t HAL_HRTIM_GetCurrentPushPullStatus(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	5793	uint32_t TimerIdx)
mbed_official	381:5460fc57b6e4	5794	{
mbed_official	381:5460fc57b6e4	5795	uint32_t current_pushpull_status;
mbed_official	381:5460fc57b6e4	5796
mbed_official	381:5460fc57b6e4	5797	/* Check the parameters */
mbed_official	381:5460fc57b6e4	5798	assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
mbed_official	381:5460fc57b6e4	5799
mbed_official	381:5460fc57b6e4	5800	/* Read current push pull status */
mbed_official	381:5460fc57b6e4	5801	current_pushpull_status = (hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxISR & HRTIM_TIMISR_CPPSTAT);
mbed_official	381:5460fc57b6e4	5802
mbed_official	381:5460fc57b6e4	5803	return current_pushpull_status;
mbed_official	381:5460fc57b6e4	5804	}
mbed_official	381:5460fc57b6e4	5805
mbed_official	381:5460fc57b6e4	5806
mbed_official	381:5460fc57b6e4	5807	/**
mbed_official	381:5460fc57b6e4	5808	* @brief Indicates on which output the signal was applied, in push-pull mode
mbed_official	381:5460fc57b6e4	5809	balanced fault mode or delayed idle mode, when the protection was triggered
mbed_official	381:5460fc57b6e4	5810	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	5811	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	5812	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	5813	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	5814	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	5815	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	5816	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	5817	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	5818	* @retval Idle Push Pull Status
mbed_official	381:5460fc57b6e4	5819	*/
mbed_official	381:5460fc57b6e4	5820	uint32_t HAL_HRTIM_GetIdlePushPullStatus(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	5821	uint32_t TimerIdx)
mbed_official	381:5460fc57b6e4	5822	{
mbed_official	381:5460fc57b6e4	5823	uint32_t idle_pushpull_status;
mbed_official	381:5460fc57b6e4	5824
mbed_official	381:5460fc57b6e4	5825	/* Check the parameters */
mbed_official	381:5460fc57b6e4	5826	assert_param(IS_HRTIM_TIMING_UNIT(TimerIdx));
mbed_official	381:5460fc57b6e4	5827
mbed_official	381:5460fc57b6e4	5828	/* Read current push pull status */
mbed_official	381:5460fc57b6e4	5829	idle_pushpull_status = (hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxISR & HRTIM_TIMISR_IPPSTAT);
mbed_official	381:5460fc57b6e4	5830
mbed_official	381:5460fc57b6e4	5831	return idle_pushpull_status;
mbed_official	381:5460fc57b6e4	5832	}
mbed_official	381:5460fc57b6e4	5833
mbed_official	381:5460fc57b6e4	5834	/**
mbed_official	381:5460fc57b6e4	5835	* @}
mbed_official	381:5460fc57b6e4	5836	*/
mbed_official	381:5460fc57b6e4	5837
mbed_official	381:5460fc57b6e4	5838	/** @defgroup HRTIM_Exported_Functions_Group10 Interrupts handling
mbed_official	381:5460fc57b6e4	5839	* @brief Functions called when HRTIM generates an interrupt
mbed_official	381:5460fc57b6e4	5840	* 7 interrupts can be generated by the master timer:
mbed_official	381:5460fc57b6e4	5841	* - Master timer registers update
mbed_official	381:5460fc57b6e4	5842	* - Synchronization event received
mbed_official	381:5460fc57b6e4	5843	* - Master timer repetition event
mbed_official	381:5460fc57b6e4	5844	* - Master Compare 1 to 4 event
mbed_official	381:5460fc57b6e4	5845	* 14 interrupts can be generated by each timing unit:
mbed_official	381:5460fc57b6e4	5846	* - Delayed protection triggered
mbed_official	381:5460fc57b6e4	5847	* - Counter reset or roll-over event
mbed_official	381:5460fc57b6e4	5848	* - Output 1 and output 2 reset (transition active to inactive)
mbed_official	381:5460fc57b6e4	5849	* - Output 1 and output 2 set (transition inactive to active)
mbed_official	381:5460fc57b6e4	5850	* - Capture 1 and 2 events
mbed_official	381:5460fc57b6e4	5851	* - Timing unit registers update
mbed_official	381:5460fc57b6e4	5852	* - Repetition event
mbed_official	381:5460fc57b6e4	5853	* - Compare 1 to 4 event
mbed_official	381:5460fc57b6e4	5854	* 8 global interrupts are generated for the whole HRTIM:
mbed_official	381:5460fc57b6e4	5855	* - System fault and Fault 1 to 5 (regardless of the timing unit attribution)
mbed_official	381:5460fc57b6e4	5856	* - DLL calibration done
mbed_official	381:5460fc57b6e4	5857	* - Burst mode period completed
mbed_official	381:5460fc57b6e4	5858	*
mbed_official	381:5460fc57b6e4	5859	@verbatim
mbed_official	381:5460fc57b6e4	5860	===============================================================================
mbed_official	381:5460fc57b6e4	5861	##### HRTIM interrupts handling #####
mbed_official	381:5460fc57b6e4	5862	===============================================================================
mbed_official	381:5460fc57b6e4	5863	[..]
mbed_official	381:5460fc57b6e4	5864	This subsection provides a set of functions allowing to manage the HRTIM
mbed_official	381:5460fc57b6e4	5865	interrupts
mbed_official	381:5460fc57b6e4	5866	(+) HRTIM interrupt handler
mbed_official	381:5460fc57b6e4	5867	(+) Callback function called when Fault1 interrupt occurs
mbed_official	381:5460fc57b6e4	5868	(+) Callback function called when Fault2 interrupt occurs
mbed_official	381:5460fc57b6e4	5869	(+) Callback function called when Fault3 interrupt occurs
mbed_official	381:5460fc57b6e4	5870	(+) Callback function called when Fault4 interrupt occurs
mbed_official	381:5460fc57b6e4	5871	(+) Callback function called when Fault5 interrupt occurs
mbed_official	381:5460fc57b6e4	5872	(+) Callback function called when system Fault interrupt occurs
mbed_official	381:5460fc57b6e4	5873	(+) Callback function called when DLL ready interrupt occurs
mbed_official	381:5460fc57b6e4	5874	(+) Callback function called when burst mode period interrupt occurs
mbed_official	381:5460fc57b6e4	5875	(+) Callback function called when synchronization input interrupt occurs
mbed_official	381:5460fc57b6e4	5876	(+) Callback function called when a timer register update interrupt occurs
mbed_official	381:5460fc57b6e4	5877	(+) Callback function called when a timer repetition interrupt occurs
mbed_official	381:5460fc57b6e4	5878	(+) Callback function called when a compare 1 match interrupt occurs
mbed_official	381:5460fc57b6e4	5879	(+) Callback function called when a compare 2 match interrupt occurs
mbed_official	381:5460fc57b6e4	5880	(+) Callback function called when a compare 3 match interrupt occurs
mbed_official	381:5460fc57b6e4	5881	(+) Callback function called when a compare 4 match interrupt occurs
mbed_official	381:5460fc57b6e4	5882	(+) Callback function called when a capture 1 interrupt occurs
mbed_official	381:5460fc57b6e4	5883	(+) Callback function called when a capture 2 interrupt occurs
mbed_official	381:5460fc57b6e4	5884	(+) Callback function called when a delayed protection interrupt occurs
mbed_official	381:5460fc57b6e4	5885	(+) Callback function called when a timer counter reset interrupt occurs
mbed_official	381:5460fc57b6e4	5886	(+) Callback function called when a timer output 1 set interrupt occurs
mbed_official	381:5460fc57b6e4	5887	(+) Callback function called when a timer output 1 reset interrupt occurs
mbed_official	381:5460fc57b6e4	5888	(+) Callback function called when a timer output 2 set interrupt occurs
mbed_official	381:5460fc57b6e4	5889	(+) Callback function called when a timer output 2 reset interrupt occurs
mbed_official	381:5460fc57b6e4	5890	(+) Callback function called when a timer output 2 reset interrupt occurs
mbed_official	381:5460fc57b6e4	5891	(+) Callback function called upon completion of a burst DMA transfer
mbed_official	381:5460fc57b6e4	5892
mbed_official	381:5460fc57b6e4	5893	@endverbatim
mbed_official	381:5460fc57b6e4	5894	* @{
mbed_official	381:5460fc57b6e4	5895	*/
mbed_official	381:5460fc57b6e4	5896
mbed_official	381:5460fc57b6e4	5897	/**
mbed_official	381:5460fc57b6e4	5898	* @brief This function handles HRTIM interrupt request.
mbed_official	381:5460fc57b6e4	5899	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	5900	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	5901	* This parameter can be any value of @ref HRTIM_Timer_Index
mbed_official	381:5460fc57b6e4	5902	* @retval None
mbed_official	381:5460fc57b6e4	5903	*/
mbed_official	381:5460fc57b6e4	5904	void HAL_HRTIM_IRQHandler(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	5905	uint32_t TimerIdx)
mbed_official	381:5460fc57b6e4	5906	{
mbed_official	381:5460fc57b6e4	5907	/* HRTIM interrupts handling */
mbed_official	381:5460fc57b6e4	5908	if (TimerIdx == HRTIM_TIMERINDEX_COMMON)
mbed_official	381:5460fc57b6e4	5909	{
mbed_official	381:5460fc57b6e4	5910	HRTIM_HRTIM_ISR(hhrtim);
mbed_official	381:5460fc57b6e4	5911	}
mbed_official	381:5460fc57b6e4	5912	else if (TimerIdx == HRTIM_TIMERINDEX_MASTER)
mbed_official	381:5460fc57b6e4	5913	{
mbed_official	381:5460fc57b6e4	5914	/* Master related interrupts handling */
mbed_official	381:5460fc57b6e4	5915	HRTIM_Master_ISR(hhrtim);
mbed_official	381:5460fc57b6e4	5916	}
mbed_official	381:5460fc57b6e4	5917	else
mbed_official	381:5460fc57b6e4	5918	{
mbed_official	381:5460fc57b6e4	5919	/* Timing unit related interrupts handling */
mbed_official	381:5460fc57b6e4	5920	HRTIM_Timer_ISR(hhrtim, TimerIdx);
mbed_official	381:5460fc57b6e4	5921	}
mbed_official	381:5460fc57b6e4	5922
mbed_official	381:5460fc57b6e4	5923	}
mbed_official	381:5460fc57b6e4	5924
mbed_official	381:5460fc57b6e4	5925	/**
mbed_official	381:5460fc57b6e4	5926	* @brief Callback function invoked when a fault 1 interrupt occured
mbed_official	381:5460fc57b6e4	5927	* @param hhrtim: pointer to HAL HRTIM handle * @retval None
mbed_official	381:5460fc57b6e4	5928	* @retval None
mbed_official	381:5460fc57b6e4	5929	*/
mbed_official	381:5460fc57b6e4	5930	__weak void HAL_HRTIM_Fault1Callback(HRTIM_HandleTypeDef * hhrtim)
mbed_official	381:5460fc57b6e4	5931	{
mbed_official	381:5460fc57b6e4	5932	/* NOTE : This function should not be modified, when the callback is needed,
mbed_official	381:5460fc57b6e4	5933	the HAL_HRTIM_Fault1Callback could be implenetd in the user file
mbed_official	381:5460fc57b6e4	5934	*/
mbed_official	381:5460fc57b6e4	5935	}
mbed_official	381:5460fc57b6e4	5936
mbed_official	381:5460fc57b6e4	5937	/**
mbed_official	381:5460fc57b6e4	5938	* @brief Callback function invoked when a fault 2 interrupt occured
mbed_official	381:5460fc57b6e4	5939	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	5940	* @retval None
mbed_official	381:5460fc57b6e4	5941	*/
mbed_official	381:5460fc57b6e4	5942	__weak void HAL_HRTIM_Fault2Callback(HRTIM_HandleTypeDef * hhrtim)
mbed_official	381:5460fc57b6e4	5943	{
mbed_official	381:5460fc57b6e4	5944	/* NOTE : This function should not be modified, when the callback is needed,
mbed_official	381:5460fc57b6e4	5945	the HAL_HRTIM_Fault2Callback could be implenetd in the user file
mbed_official	381:5460fc57b6e4	5946	*/
mbed_official	381:5460fc57b6e4	5947	}
mbed_official	381:5460fc57b6e4	5948
mbed_official	381:5460fc57b6e4	5949	/**
mbed_official	381:5460fc57b6e4	5950	* @brief Callback function invoked when a fault 3 interrupt occured
mbed_official	381:5460fc57b6e4	5951	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	5952	* @retval None
mbed_official	381:5460fc57b6e4	5953	*/
mbed_official	381:5460fc57b6e4	5954	__weak void HAL_HRTIM_Fault3Callback(HRTIM_HandleTypeDef * hhrtim)
mbed_official	381:5460fc57b6e4	5955	{
mbed_official	381:5460fc57b6e4	5956	/* NOTE : This function should not be modified, when the callback is needed,
mbed_official	381:5460fc57b6e4	5957	the HAL_HRTIM_Fault3Callback could be implenetd in the user file
mbed_official	381:5460fc57b6e4	5958	*/
mbed_official	381:5460fc57b6e4	5959	}
mbed_official	381:5460fc57b6e4	5960
mbed_official	381:5460fc57b6e4	5961	/**
mbed_official	381:5460fc57b6e4	5962	* @brief Callback function invoked when a fault 4 interrupt occured
mbed_official	381:5460fc57b6e4	5963	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	5964	* @retval None
mbed_official	381:5460fc57b6e4	5965	*/
mbed_official	381:5460fc57b6e4	5966	__weak void HAL_HRTIM_Fault4Callback(HRTIM_HandleTypeDef * hhrtim)
mbed_official	381:5460fc57b6e4	5967	{
mbed_official	381:5460fc57b6e4	5968	/* NOTE : This function should not be modified, when the callback is needed,
mbed_official	381:5460fc57b6e4	5969	the HAL_HRTIM_Fault4Callback could be implenetd in the user file
mbed_official	381:5460fc57b6e4	5970	*/
mbed_official	381:5460fc57b6e4	5971	}
mbed_official	381:5460fc57b6e4	5972
mbed_official	381:5460fc57b6e4	5973	/**
mbed_official	381:5460fc57b6e4	5974	* @brief Callback function invoked when a fault 5 interrupt occured
mbed_official	381:5460fc57b6e4	5975	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	5976	* @retval None
mbed_official	381:5460fc57b6e4	5977	*/
mbed_official	381:5460fc57b6e4	5978	__weak void HAL_HRTIM_Fault5Callback(HRTIM_HandleTypeDef * hhrtim)
mbed_official	381:5460fc57b6e4	5979	{
mbed_official	381:5460fc57b6e4	5980	/* NOTE : This function should not be modified, when the callback is needed,
mbed_official	381:5460fc57b6e4	5981	the HAL_HRTIM_Fault5Callback could be implenetd in the user file
mbed_official	381:5460fc57b6e4	5982	*/
mbed_official	381:5460fc57b6e4	5983	}
mbed_official	381:5460fc57b6e4	5984
mbed_official	381:5460fc57b6e4	5985	/**
mbed_official	381:5460fc57b6e4	5986	* @brief Callback function invoked when a system fault interrupt occured
mbed_official	381:5460fc57b6e4	5987	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	5988	* @retval None
mbed_official	381:5460fc57b6e4	5989	*/
mbed_official	381:5460fc57b6e4	5990	__weak void HAL_HRTIM_SystemFaultCallback(HRTIM_HandleTypeDef * hhrtim)
mbed_official	381:5460fc57b6e4	5991	{
mbed_official	381:5460fc57b6e4	5992	/* NOTE : This function should not be modified, when the callback is needed,
mbed_official	381:5460fc57b6e4	5993	the HAL_HRTIM_SystemFaultCallback could be implenetd in the user file
mbed_official	381:5460fc57b6e4	5994	*/
mbed_official	381:5460fc57b6e4	5995	}
mbed_official	381:5460fc57b6e4	5996
mbed_official	381:5460fc57b6e4	5997	/**
mbed_official	381:5460fc57b6e4	5998	* @brief Callback function invoked when a the DLL calibration is completed
mbed_official	381:5460fc57b6e4	5999	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	6000	* @retval None
mbed_official	381:5460fc57b6e4	6001	*/
mbed_official	381:5460fc57b6e4	6002	__weak void HAL_HRTIM_DLLCalbrationReadyCallback(HRTIM_HandleTypeDef * hhrtim)
mbed_official	381:5460fc57b6e4	6003	{
mbed_official	381:5460fc57b6e4	6004	/* NOTE : This function should not be modified, when the callback is needed,
mbed_official	381:5460fc57b6e4	6005	the HAL_HRTIM_DLLCalbrationCallback could be implenetd in the user file
mbed_official	381:5460fc57b6e4	6006	*/
mbed_official	381:5460fc57b6e4	6007	}
mbed_official	381:5460fc57b6e4	6008
mbed_official	381:5460fc57b6e4	6009	/**
mbed_official	381:5460fc57b6e4	6010	* @brief Callback function invoked when the end of the burst mode period is reached
mbed_official	381:5460fc57b6e4	6011	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	6012	* @retval None
mbed_official	381:5460fc57b6e4	6013	*/
mbed_official	381:5460fc57b6e4	6014	__weak void HAL_HRTIM_BurstModePeriodCallback(HRTIM_HandleTypeDef * hhrtim)
mbed_official	381:5460fc57b6e4	6015	{
mbed_official	381:5460fc57b6e4	6016	/* NOTE : This function should not be modified, when the callback is needed,
mbed_official	381:5460fc57b6e4	6017	the HAL_HRTIM_BurstModeCallback could be implenetd in the user file
mbed_official	381:5460fc57b6e4	6018	*/
mbed_official	381:5460fc57b6e4	6019	}
mbed_official	381:5460fc57b6e4	6020
mbed_official	381:5460fc57b6e4	6021	/**
mbed_official	381:5460fc57b6e4	6022	* @brief Callback function invoked when a synchronization input event is received
mbed_official	381:5460fc57b6e4	6023	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	6024	* @retval None
mbed_official	381:5460fc57b6e4	6025	*/
mbed_official	381:5460fc57b6e4	6026	__weak void HAL_HRTIM_SynchronizationEventCallback(HRTIM_HandleTypeDef * hhrtim)
mbed_official	381:5460fc57b6e4	6027	{
mbed_official	381:5460fc57b6e4	6028	/* NOTE : This function should not be modified, when the callback is needed,
mbed_official	381:5460fc57b6e4	6029	the HAL_HRTIM_Master_SynchronizationEventCallback could be implenetd in the user file
mbed_official	381:5460fc57b6e4	6030	*/
mbed_official	381:5460fc57b6e4	6031	}
mbed_official	381:5460fc57b6e4	6032
mbed_official	381:5460fc57b6e4	6033	/**
mbed_official	381:5460fc57b6e4	6034	* @brief Callback function invoked when timer registers are updated
mbed_official	381:5460fc57b6e4	6035	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	6036	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	6037	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	6038	* @arg HRTIM_TIMERINDEX_MASTER for master timer
mbed_official	381:5460fc57b6e4	6039	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	6040	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	6041	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	6042	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	6043	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	6044	* @retval None
mbed_official	381:5460fc57b6e4	6045	*/
mbed_official	381:5460fc57b6e4	6046	__weak void HAL_HRTIM_RegistersUpdateCallback(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	6047	uint32_t TimerIdx)
mbed_official	381:5460fc57b6e4	6048	{
mbed_official	381:5460fc57b6e4	6049	/* NOTE : This function should not be modified, when the callback is needed,
mbed_official	381:5460fc57b6e4	6050	the HAL_HRTIM_Master_RegistersUpdateCallback could be implenetd in the user file
mbed_official	381:5460fc57b6e4	6051	*/
mbed_official	381:5460fc57b6e4	6052	}
mbed_official	381:5460fc57b6e4	6053
mbed_official	381:5460fc57b6e4	6054	/**
mbed_official	381:5460fc57b6e4	6055	* @brief Callback function invoked when timer repetition period has elapsed
mbed_official	381:5460fc57b6e4	6056	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	6057	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	6058	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	6059	* @arg HRTIM_TIMERINDEX_MASTER for master timer
mbed_official	381:5460fc57b6e4	6060	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	6061	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	6062	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	6063	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	6064	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	6065	* @retval None
mbed_official	381:5460fc57b6e4	6066	*/
mbed_official	381:5460fc57b6e4	6067	__weak void HAL_HRTIM_RepetitionEventCallback(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	6068	uint32_t TimerIdx)
mbed_official	381:5460fc57b6e4	6069	{
mbed_official	381:5460fc57b6e4	6070	/* NOTE : This function should not be modified, when the callback is needed,
mbed_official	381:5460fc57b6e4	6071	the HAL_HRTIM_Master_RepetitionEventCallback could be implenetd in the user file
mbed_official	381:5460fc57b6e4	6072	*/
mbed_official	381:5460fc57b6e4	6073	}
mbed_official	381:5460fc57b6e4	6074
mbed_official	381:5460fc57b6e4	6075	/**
mbed_official	381:5460fc57b6e4	6076	* @brief Callback function invoked when the timer counter matches the value
mbed_official	381:5460fc57b6e4	6077	* programmed in the compare 1 register
mbed_official	381:5460fc57b6e4	6078	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	6079	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	6080	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	6081	* @arg HRTIM_TIMERINDEX_MASTER for master timer
mbed_official	381:5460fc57b6e4	6082	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	6083	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	6084	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	6085	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	6086	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	6087	* @retval None
mbed_official	381:5460fc57b6e4	6088	*/
mbed_official	381:5460fc57b6e4	6089	__weak void HAL_HRTIM_Compare1EventCallback(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	6090	uint32_t TimerIdx)
mbed_official	381:5460fc57b6e4	6091	{
mbed_official	381:5460fc57b6e4	6092	/* NOTE : This function should not be modified, when the callback is needed,
mbed_official	381:5460fc57b6e4	6093	the HAL_HRTIM_Master_Compare1EventCallback could be implenetd in the user file
mbed_official	381:5460fc57b6e4	6094	*/
mbed_official	381:5460fc57b6e4	6095	}
mbed_official	381:5460fc57b6e4	6096
mbed_official	381:5460fc57b6e4	6097	/**
mbed_official	381:5460fc57b6e4	6098	* @brief Callback function invoked when the timer counter matches the value
mbed_official	381:5460fc57b6e4	6099	* programmed in the compare 2 register
mbed_official	381:5460fc57b6e4	6100	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	6101	* @retval None
mbed_official	381:5460fc57b6e4	6102	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	6103	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	6104	* @arg HRTIM_TIMERINDEX_MASTER for master timer
mbed_official	381:5460fc57b6e4	6105	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	6106	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	6107	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	6108	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	6109	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	6110	*/
mbed_official	381:5460fc57b6e4	6111	__weak void HAL_HRTIM_Compare2EventCallback(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	6112	uint32_t TimerIdx)
mbed_official	381:5460fc57b6e4	6113	{
mbed_official	381:5460fc57b6e4	6114	/* NOTE : This function should not be modified, when the callback is needed,
mbed_official	381:5460fc57b6e4	6115	the HAL_HRTIM_Master_Compare2EventCallback could be implenetd in the user file
mbed_official	381:5460fc57b6e4	6116	*/
mbed_official	381:5460fc57b6e4	6117	}
mbed_official	381:5460fc57b6e4	6118
mbed_official	381:5460fc57b6e4	6119	/**
mbed_official	381:5460fc57b6e4	6120	* @brief Callback function invoked when the timer counter matches the value
mbed_official	381:5460fc57b6e4	6121	* programmed in the compare 3 register
mbed_official	381:5460fc57b6e4	6122	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	6123	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	6124	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	6125	* @arg HRTIM_TIMERINDEX_MASTER for master timer
mbed_official	381:5460fc57b6e4	6126	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	6127	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	6128	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	6129	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	6130	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	6131	* @retval None
mbed_official	381:5460fc57b6e4	6132	*/
mbed_official	381:5460fc57b6e4	6133	__weak void HAL_HRTIM_Compare3EventCallback(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	6134	uint32_t TimerIdx)
mbed_official	381:5460fc57b6e4	6135	{
mbed_official	381:5460fc57b6e4	6136	/* NOTE : This function should not be modified, when the callback is needed,
mbed_official	381:5460fc57b6e4	6137	the HAL_HRTIM_Master_Compare3EventCallback could be implenetd in the user file
mbed_official	381:5460fc57b6e4	6138	*/
mbed_official	381:5460fc57b6e4	6139	}
mbed_official	381:5460fc57b6e4	6140
mbed_official	381:5460fc57b6e4	6141	/**
mbed_official	381:5460fc57b6e4	6142	* @brief Callback function invoked when the timer counter matches the value
mbed_official	381:5460fc57b6e4	6143	* programmed in the compare 4 register
mbed_official	381:5460fc57b6e4	6144	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	6145	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	6146	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	6147	* @arg HRTIM_TIMERINDEX_MASTER for master timer
mbed_official	381:5460fc57b6e4	6148	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	6149	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	6150	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	6151	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	6152	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	6153	* @retval None
mbed_official	381:5460fc57b6e4	6154	*/
mbed_official	381:5460fc57b6e4	6155	__weak void HAL_HRTIM_Compare4EventCallback(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	6156	uint32_t TimerIdx)
mbed_official	381:5460fc57b6e4	6157	{
mbed_official	381:5460fc57b6e4	6158	/* NOTE : This function should not be modified, when the callback is needed,
mbed_official	381:5460fc57b6e4	6159	the HAL_HRTIM_Master_Compare4EventCallback could be implenetd in the user file
mbed_official	381:5460fc57b6e4	6160	*/
mbed_official	381:5460fc57b6e4	6161	}
mbed_official	381:5460fc57b6e4	6162
mbed_official	381:5460fc57b6e4	6163	/**
mbed_official	381:5460fc57b6e4	6164	* @brief Callback function invoked when the timer x capture 1 event occurs
mbed_official	381:5460fc57b6e4	6165	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	6166	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	6167	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	6168	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	6169	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	6170	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	6171	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	6172	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	6173	* @retval None
mbed_official	381:5460fc57b6e4	6174	*/
mbed_official	381:5460fc57b6e4	6175	__weak void HAL_HRTIM_Capture1EventCallback(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	6176	uint32_t TimerIdx)
mbed_official	381:5460fc57b6e4	6177	{
mbed_official	381:5460fc57b6e4	6178	/* NOTE : This function should not be modified, when the callback is needed,
mbed_official	381:5460fc57b6e4	6179	the HAL_HRTIM_Timer_Capture1EventCallback could be implenetd in the user file
mbed_official	381:5460fc57b6e4	6180	*/
mbed_official	381:5460fc57b6e4	6181	}
mbed_official	381:5460fc57b6e4	6182
mbed_official	381:5460fc57b6e4	6183	/**
mbed_official	381:5460fc57b6e4	6184	* @brief Callback function invoked when the timer x capture 2 event occurs
mbed_official	381:5460fc57b6e4	6185	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	6186	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	6187	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	6188	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	6189	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	6190	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	6191	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	6192	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	6193	* @retval None
mbed_official	381:5460fc57b6e4	6194	*/
mbed_official	381:5460fc57b6e4	6195	__weak void HAL_HRTIM_Capture2EventCallback(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	6196	uint32_t TimerIdx)
mbed_official	381:5460fc57b6e4	6197	{
mbed_official	381:5460fc57b6e4	6198	/* NOTE : This function should not be modified, when the callback is needed,
mbed_official	381:5460fc57b6e4	6199	the HAL_HRTIM_Timer_Capture2EventCallback could be implenetd in the user file
mbed_official	381:5460fc57b6e4	6200	*/
mbed_official	381:5460fc57b6e4	6201	}
mbed_official	381:5460fc57b6e4	6202
mbed_official	381:5460fc57b6e4	6203	/**
mbed_official	381:5460fc57b6e4	6204	* @brief Callback function invoked when the delayed idle or balanced idle mode is
mbed_official	381:5460fc57b6e4	6205	* entered
mbed_official	381:5460fc57b6e4	6206	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	6207	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	6208	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	6209	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	6210	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	6211	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	6212	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	6213	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	6214	* @retval None
mbed_official	381:5460fc57b6e4	6215	*/
mbed_official	381:5460fc57b6e4	6216	__weak void HAL_HRTIM_DelayedProtectionCallback(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	6217	uint32_t TimerIdx)
mbed_official	381:5460fc57b6e4	6218	{
mbed_official	381:5460fc57b6e4	6219	/* NOTE : This function should not be modified, when the callback is needed,
mbed_official	381:5460fc57b6e4	6220	the HAL_HRTIM_Timer_DelayedProtectionCallback could be implenetd in the user file
mbed_official	381:5460fc57b6e4	6221	*/
mbed_official	381:5460fc57b6e4	6222	}
mbed_official	381:5460fc57b6e4	6223
mbed_official	381:5460fc57b6e4	6224	/**
mbed_official	381:5460fc57b6e4	6225	* @brief Callback function invoked when the timer x counter reset/roll-over
mbed_official	381:5460fc57b6e4	6226	* event occurs
mbed_official	381:5460fc57b6e4	6227	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	6228	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	6229	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	6230	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	6231	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	6232	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	6233	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	6234	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	6235	* @retval None
mbed_official	381:5460fc57b6e4	6236	*/
mbed_official	381:5460fc57b6e4	6237	__weak void HAL_HRTIM_CounterResetCallback(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	6238	uint32_t TimerIdx)
mbed_official	381:5460fc57b6e4	6239	{
mbed_official	381:5460fc57b6e4	6240	/* NOTE : This function should not be modified, when the callback is needed,
mbed_official	381:5460fc57b6e4	6241	the HAL_HRTIM_Timer_CounterResetCallback could be implenetd in the user file
mbed_official	381:5460fc57b6e4	6242	*/
mbed_official	381:5460fc57b6e4	6243	}
mbed_official	381:5460fc57b6e4	6244
mbed_official	381:5460fc57b6e4	6245	/**
mbed_official	381:5460fc57b6e4	6246	* @brief Callback function invoked when the timer x output 1 is set
mbed_official	381:5460fc57b6e4	6247	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	6248	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	6249	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	6250	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	6251	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	6252	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	6253	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	6254	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	6255	* @retval None
mbed_official	381:5460fc57b6e4	6256	*/
mbed_official	381:5460fc57b6e4	6257	__weak void HAL_HRTIM_Output1SetCallback(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	6258	uint32_t TimerIdx)
mbed_official	381:5460fc57b6e4	6259	{
mbed_official	381:5460fc57b6e4	6260	/* NOTE : This function should not be modified, when the callback is needed,
mbed_official	381:5460fc57b6e4	6261	the HAL_HRTIM_Timer_Output1SetCallback could be implenetd in the user file
mbed_official	381:5460fc57b6e4	6262	*/
mbed_official	381:5460fc57b6e4	6263	}
mbed_official	381:5460fc57b6e4	6264
mbed_official	381:5460fc57b6e4	6265	/**
mbed_official	381:5460fc57b6e4	6266	* @brief Callback function invoked when the timer x output 1 is reset
mbed_official	381:5460fc57b6e4	6267	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	6268	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	6269	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	6270	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	6271	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	6272	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	6273	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	6274	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	6275	* @retval None
mbed_official	381:5460fc57b6e4	6276	*/
mbed_official	381:5460fc57b6e4	6277	__weak void HAL_HRTIM_Output1ResetCallback(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	6278	uint32_t TimerIdx)
mbed_official	381:5460fc57b6e4	6279	{
mbed_official	381:5460fc57b6e4	6280	/* NOTE : This function should not be modified, when the callback is needed,
mbed_official	381:5460fc57b6e4	6281	the HAL_HRTIM_Timer_Output1ResetCallback could be implenetd in the user file
mbed_official	381:5460fc57b6e4	6282	*/
mbed_official	381:5460fc57b6e4	6283	}
mbed_official	381:5460fc57b6e4	6284
mbed_official	381:5460fc57b6e4	6285	/**
mbed_official	381:5460fc57b6e4	6286	* @brief Callback function invoked when the timer x output 2 is set
mbed_official	381:5460fc57b6e4	6287	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	6288	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	6289	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	6290	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	6291	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	6292	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	6293	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	6294	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	6295	* @retval None
mbed_official	381:5460fc57b6e4	6296	*/
mbed_official	381:5460fc57b6e4	6297	__weak void HAL_HRTIM_Output2SetCallback(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	6298	uint32_t TimerIdx)
mbed_official	381:5460fc57b6e4	6299	{
mbed_official	381:5460fc57b6e4	6300	/* NOTE : This function should not be modified, when the callback is needed,
mbed_official	381:5460fc57b6e4	6301	the HAL_HRTIM_Timer_Output2SetCallback could be implenetd in the user file
mbed_official	381:5460fc57b6e4	6302	*/
mbed_official	381:5460fc57b6e4	6303	}
mbed_official	381:5460fc57b6e4	6304
mbed_official	381:5460fc57b6e4	6305	/**
mbed_official	381:5460fc57b6e4	6306	* @brief Callback function invoked when the timer x output 2 is reset
mbed_official	381:5460fc57b6e4	6307	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	6308	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	6309	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	6310	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	6311	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	6312	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	6313	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	6314	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	6315	* @retval None
mbed_official	381:5460fc57b6e4	6316	*/
mbed_official	381:5460fc57b6e4	6317	__weak void HAL_HRTIM_Output2ResetCallback(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	6318	uint32_t TimerIdx)
mbed_official	381:5460fc57b6e4	6319	{
mbed_official	381:5460fc57b6e4	6320	/* NOTE : This function should not be modified, when the callback is needed,
mbed_official	381:5460fc57b6e4	6321	the HAL_HRTIM_Timer_Output2ResetCallback could be implenetd in the user file
mbed_official	381:5460fc57b6e4	6322	*/
mbed_official	381:5460fc57b6e4	6323	}
mbed_official	381:5460fc57b6e4	6324
mbed_official	381:5460fc57b6e4	6325	/**
mbed_official	381:5460fc57b6e4	6326	* @brief Callback function invoked when a DMA burst transfer is completed
mbed_official	381:5460fc57b6e4	6327	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	6328	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	6329	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	6330	* @arg HRTIM_TIMERINDEX_MASTER for master timer
mbed_official	381:5460fc57b6e4	6331	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	6332	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	6333	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	6334	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	6335	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	6336	* @retval None
mbed_official	381:5460fc57b6e4	6337	*/
mbed_official	381:5460fc57b6e4	6338	__weak void HAL_HRTIM_BurstDMATransferCallback(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	6339	uint32_t TimerIdx)
mbed_official	381:5460fc57b6e4	6340	{
mbed_official	381:5460fc57b6e4	6341	/* NOTE : This function should not be modified, when the callback is needed,
mbed_official	381:5460fc57b6e4	6342	the HAL_HRTIM_BurstDMATransferCallback could be implenetd in the user file
mbed_official	381:5460fc57b6e4	6343	*/
mbed_official	381:5460fc57b6e4	6344	}
mbed_official	381:5460fc57b6e4	6345
mbed_official	381:5460fc57b6e4	6346	/**
mbed_official	381:5460fc57b6e4	6347	* @brief Callback function invoked when a DMA error occurs
mbed_official	381:5460fc57b6e4	6348	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	6349	* @retval None
mbed_official	381:5460fc57b6e4	6350	*/
mbed_official	381:5460fc57b6e4	6351	__weak void HAL_HRTIM_ErrorCallback(HRTIM_HandleTypeDef *hhrtim)
mbed_official	381:5460fc57b6e4	6352	{
mbed_official	381:5460fc57b6e4	6353	/* NOTE : This function should not be modified, when the callback is needed,
mbed_official	381:5460fc57b6e4	6354	the HAL_HRTIM_ErrorCallback could be implenetd in the user file
mbed_official	381:5460fc57b6e4	6355	*/
mbed_official	381:5460fc57b6e4	6356	}
mbed_official	381:5460fc57b6e4	6357
mbed_official	381:5460fc57b6e4	6358	/**
mbed_official	381:5460fc57b6e4	6359	* @}
mbed_official	381:5460fc57b6e4	6360	*/
mbed_official	381:5460fc57b6e4	6361
mbed_official	381:5460fc57b6e4	6362	/**
mbed_official	381:5460fc57b6e4	6363	* @}
mbed_official	381:5460fc57b6e4	6364	*/
mbed_official	381:5460fc57b6e4	6365
mbed_official	381:5460fc57b6e4	6366	/** @addtogroup HRTIM_Private_Functions HRTIM Private Functions
mbed_official	381:5460fc57b6e4	6367	* @{
mbed_official	381:5460fc57b6e4	6368	*/
mbed_official	381:5460fc57b6e4	6369
mbed_official	381:5460fc57b6e4	6370	/**
mbed_official	381:5460fc57b6e4	6371	* @brief Configures the master timer time base
mbed_official	381:5460fc57b6e4	6372	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	6373	* @param pTimeBaseCfg: pointer to the time base configuration structure
mbed_official	381:5460fc57b6e4	6374	* @retval None
mbed_official	381:5460fc57b6e4	6375	*/
mbed_official	381:5460fc57b6e4	6376	static void HRTIM_MasterBase_Config(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	6377	HRTIM_TimeBaseCfgTypeDef * pTimeBaseCfg)
mbed_official	381:5460fc57b6e4	6378	{
mbed_official	381:5460fc57b6e4	6379	uint32_t hrtim_mcr;
mbed_official	381:5460fc57b6e4	6380
mbed_official	381:5460fc57b6e4	6381	/* Configure master timer */
mbed_official	381:5460fc57b6e4	6382	hrtim_mcr = hhrtim->Instance->sMasterRegs.MCR;
mbed_official	381:5460fc57b6e4	6383
mbed_official	381:5460fc57b6e4	6384	/* Set the prescaler ratio */
mbed_official	381:5460fc57b6e4	6385	hrtim_mcr &= (uint32_t) ~(HRTIM_MCR_CK_PSC);
mbed_official	381:5460fc57b6e4	6386	hrtim_mcr \|= (uint32_t)pTimeBaseCfg->PrescalerRatio;
mbed_official	381:5460fc57b6e4	6387
mbed_official	381:5460fc57b6e4	6388	/* Set the operating mode */
mbed_official	381:5460fc57b6e4	6389	hrtim_mcr &= (uint32_t) ~(HRTIM_MCR_CONT \| HRTIM_MCR_RETRIG);
mbed_official	381:5460fc57b6e4	6390	hrtim_mcr \|= (uint32_t)pTimeBaseCfg->Mode;
mbed_official	381:5460fc57b6e4	6391
mbed_official	381:5460fc57b6e4	6392	/* Update the HRTIM registers */
mbed_official	381:5460fc57b6e4	6393	hhrtim->Instance->sMasterRegs.MCR = hrtim_mcr;
mbed_official	381:5460fc57b6e4	6394	hhrtim->Instance->sMasterRegs.MPER = pTimeBaseCfg->Period;
mbed_official	381:5460fc57b6e4	6395	hhrtim->Instance->sMasterRegs.MREP = pTimeBaseCfg->RepetitionCounter;
mbed_official	381:5460fc57b6e4	6396	}
mbed_official	381:5460fc57b6e4	6397
mbed_official	381:5460fc57b6e4	6398	/**
mbed_official	381:5460fc57b6e4	6399	* @brief Configures timing unit (timer A to timer E) time base
mbed_official	381:5460fc57b6e4	6400	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	6401	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	6402	* @param pTimeBaseCfg: pointer to the time base configuration structure
mbed_official	381:5460fc57b6e4	6403	* @retval None
mbed_official	381:5460fc57b6e4	6404	*/
mbed_official	381:5460fc57b6e4	6405	static void HRTIM_TimingUnitBase_Config(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	6406	uint32_t TimerIdx ,
mbed_official	381:5460fc57b6e4	6407	HRTIM_TimeBaseCfgTypeDef * pTimeBaseCfg)
mbed_official	381:5460fc57b6e4	6408	{
mbed_official	381:5460fc57b6e4	6409	uint32_t hrtim_timcr;
mbed_official	381:5460fc57b6e4	6410
mbed_official	381:5460fc57b6e4	6411	/* Configure master timing unit */
mbed_official	381:5460fc57b6e4	6412	hrtim_timcr = hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR;
mbed_official	381:5460fc57b6e4	6413
mbed_official	381:5460fc57b6e4	6414	/* Set the prescaler ratio */
mbed_official	381:5460fc57b6e4	6415	hrtim_timcr &= (uint32_t) ~(HRTIM_TIMCR_CK_PSC);
mbed_official	381:5460fc57b6e4	6416	hrtim_timcr \|= (uint32_t)pTimeBaseCfg->PrescalerRatio;
mbed_official	381:5460fc57b6e4	6417
mbed_official	381:5460fc57b6e4	6418	/* Set the operating mode */
mbed_official	381:5460fc57b6e4	6419	hrtim_timcr &= (uint32_t) ~(HRTIM_TIMCR_CONT \| HRTIM_TIMCR_RETRIG);
mbed_official	381:5460fc57b6e4	6420	hrtim_timcr \|= (uint32_t)pTimeBaseCfg->Mode;
mbed_official	381:5460fc57b6e4	6421
mbed_official	381:5460fc57b6e4	6422	/* Update the HRTIM registers */
mbed_official	381:5460fc57b6e4	6423	hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR = hrtim_timcr;
mbed_official	381:5460fc57b6e4	6424	hhrtim->Instance->sTimerxRegs[TimerIdx].PERxR = pTimeBaseCfg->Period;
mbed_official	381:5460fc57b6e4	6425	hhrtim->Instance->sTimerxRegs[TimerIdx].REPxR = pTimeBaseCfg->RepetitionCounter;
mbed_official	381:5460fc57b6e4	6426	}
mbed_official	381:5460fc57b6e4	6427
mbed_official	381:5460fc57b6e4	6428	/**
mbed_official	381:5460fc57b6e4	6429	* @brief Configures the master timer in waveform mode
mbed_official	381:5460fc57b6e4	6430	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	6431	* @param pTimerCfg: pointer to the timer configuration data structure
mbed_official	381:5460fc57b6e4	6432	* @retval None
mbed_official	381:5460fc57b6e4	6433	*/
mbed_official	381:5460fc57b6e4	6434	static void HRTIM_MasterWaveform_Config(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	6435	HRTIM_TimerCfgTypeDef * pTimerCfg)
mbed_official	381:5460fc57b6e4	6436	{
mbed_official	381:5460fc57b6e4	6437	uint32_t hrtim_mcr;
mbed_official	381:5460fc57b6e4	6438	uint32_t hrtim_bmcr;
mbed_official	381:5460fc57b6e4	6439
mbed_official	381:5460fc57b6e4	6440	/* Configure master timer */
mbed_official	381:5460fc57b6e4	6441	hrtim_mcr = hhrtim->Instance->sMasterRegs.MCR;
mbed_official	381:5460fc57b6e4	6442	hrtim_bmcr = hhrtim->Instance->sCommonRegs.BMCR;
mbed_official	381:5460fc57b6e4	6443
mbed_official	381:5460fc57b6e4	6444	/* Enable/Disable the half mode */
mbed_official	381:5460fc57b6e4	6445	hrtim_mcr &= ~(HRTIM_MCR_HALF);
mbed_official	381:5460fc57b6e4	6446	hrtim_mcr \|= pTimerCfg->HalfModeEnable;
mbed_official	381:5460fc57b6e4	6447
mbed_official	381:5460fc57b6e4	6448	/* Enable/Disable the timer start upon synchronization event reception */
mbed_official	381:5460fc57b6e4	6449	hrtim_mcr &= ~(HRTIM_MCR_SYNCSTRTM);
mbed_official	381:5460fc57b6e4	6450	hrtim_mcr \|= pTimerCfg->StartOnSync;
mbed_official	381:5460fc57b6e4	6451
mbed_official	381:5460fc57b6e4	6452	/* Enable/Disable the timer reset upon synchronization event reception */
mbed_official	381:5460fc57b6e4	6453	hrtim_mcr &= ~(HRTIM_MCR_SYNCRSTM);
mbed_official	381:5460fc57b6e4	6454	hrtim_mcr \|= pTimerCfg->ResetOnSync;
mbed_official	381:5460fc57b6e4	6455
mbed_official	381:5460fc57b6e4	6456	/* Enable/Disable the DAC synchronization event generation */
mbed_official	381:5460fc57b6e4	6457	hrtim_mcr &= ~(HRTIM_MCR_DACSYNC);
mbed_official	381:5460fc57b6e4	6458	hrtim_mcr \|= pTimerCfg->DACSynchro;
mbed_official	381:5460fc57b6e4	6459
mbed_official	381:5460fc57b6e4	6460	/* Enable/Disable preload meachanism for timer registers */
mbed_official	381:5460fc57b6e4	6461	hrtim_mcr &= ~(HRTIM_MCR_PREEN);
mbed_official	381:5460fc57b6e4	6462	hrtim_mcr \|= pTimerCfg->PreloadEnable;
mbed_official	381:5460fc57b6e4	6463
mbed_official	381:5460fc57b6e4	6464	/* Master timer registers update handling */
mbed_official	381:5460fc57b6e4	6465	hrtim_mcr &= ~(HRTIM_MCR_BRSTDMA);
mbed_official	381:5460fc57b6e4	6466	hrtim_mcr \|= (pTimerCfg->UpdateGating << 2);
mbed_official	381:5460fc57b6e4	6467
mbed_official	381:5460fc57b6e4	6468	/* Enable/Disable registers update on repetition */
mbed_official	381:5460fc57b6e4	6469	hrtim_mcr &= ~(HRTIM_MCR_MREPU);
mbed_official	381:5460fc57b6e4	6470	hrtim_mcr \|= pTimerCfg->RepetitionUpdate;
mbed_official	381:5460fc57b6e4	6471
mbed_official	381:5460fc57b6e4	6472	/* Set the timer burst mode */
mbed_official	381:5460fc57b6e4	6473	hrtim_bmcr &= ~(HRTIM_BMCR_MTBM);
mbed_official	381:5460fc57b6e4	6474	hrtim_bmcr \|= pTimerCfg->BurstMode;
mbed_official	381:5460fc57b6e4	6475
mbed_official	381:5460fc57b6e4	6476	/* Update the HRTIM registers */
mbed_official	381:5460fc57b6e4	6477	hhrtim->Instance->sMasterRegs.MCR = hrtim_mcr;
mbed_official	381:5460fc57b6e4	6478	hhrtim->Instance->sCommonRegs.BMCR = hrtim_bmcr;
mbed_official	381:5460fc57b6e4	6479	}
mbed_official	381:5460fc57b6e4	6480
mbed_official	381:5460fc57b6e4	6481	/**
mbed_official	381:5460fc57b6e4	6482	* @brief Configures timing unit (timer A to timer E) in waveform mode
mbed_official	381:5460fc57b6e4	6483	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	6484	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	6485	* @param pTimerCfg: pointer to the timer configuration data structure
mbed_official	381:5460fc57b6e4	6486	* @retval None
mbed_official	381:5460fc57b6e4	6487	*/
mbed_official	381:5460fc57b6e4	6488	static void HRTIM_TimingUnitWaveform_Config(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	6489	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	6490	HRTIM_TimerCfgTypeDef * pTimerCfg)
mbed_official	381:5460fc57b6e4	6491	{
mbed_official	381:5460fc57b6e4	6492	uint32_t hrtim_timcr;
mbed_official	381:5460fc57b6e4	6493	uint32_t hrtim_timfltr;
mbed_official	381:5460fc57b6e4	6494	uint32_t hrtim_timoutr;
mbed_official	381:5460fc57b6e4	6495	uint32_t hrtim_timrstr;
mbed_official	381:5460fc57b6e4	6496	uint32_t hrtim_bmcr;
mbed_official	381:5460fc57b6e4	6497
mbed_official	381:5460fc57b6e4	6498	/* UPDGAT bitfield must be reset before programming a new value */
mbed_official	381:5460fc57b6e4	6499	hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR &= ~(HRTIM_TIMCR_UPDGAT);
mbed_official	381:5460fc57b6e4	6500
mbed_official	381:5460fc57b6e4	6501	/* Configure timing unit (Timer A to Timer E) */
mbed_official	381:5460fc57b6e4	6502	hrtim_timcr = hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR;
mbed_official	381:5460fc57b6e4	6503	hrtim_timfltr = hhrtim->Instance->sTimerxRegs[TimerIdx].FLTxR;
mbed_official	381:5460fc57b6e4	6504	hrtim_timoutr = hhrtim->Instance->sTimerxRegs[TimerIdx].OUTxR;
mbed_official	381:5460fc57b6e4	6505	hrtim_timrstr = hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR;
mbed_official	381:5460fc57b6e4	6506	hrtim_bmcr = hhrtim->Instance->sCommonRegs.BMCR;
mbed_official	381:5460fc57b6e4	6507
mbed_official	381:5460fc57b6e4	6508	/* Enable/Disable the half mode */
mbed_official	381:5460fc57b6e4	6509	hrtim_timcr &= ~(HRTIM_TIMCR_HALF);
mbed_official	381:5460fc57b6e4	6510	hrtim_timcr \|= pTimerCfg->HalfModeEnable;
mbed_official	381:5460fc57b6e4	6511
mbed_official	381:5460fc57b6e4	6512	/* Enable/Disable the timer start upon synchronization event reception */
mbed_official	381:5460fc57b6e4	6513	hrtim_timcr &= ~(HRTIM_TIMCR_SYNCSTRT);
mbed_official	381:5460fc57b6e4	6514	hrtim_timcr \|= pTimerCfg->StartOnSync;
mbed_official	381:5460fc57b6e4	6515
mbed_official	381:5460fc57b6e4	6516	/* Enable/Disable the timer reset upon synchronization event reception */
mbed_official	381:5460fc57b6e4	6517	hrtim_timcr &= ~(HRTIM_TIMCR_SYNCRST);
mbed_official	381:5460fc57b6e4	6518	hrtim_timcr \|= pTimerCfg->ResetOnSync;
mbed_official	381:5460fc57b6e4	6519
mbed_official	381:5460fc57b6e4	6520	/* Enable/Disable the DAC synchronization event generation */
mbed_official	381:5460fc57b6e4	6521	hrtim_timcr &= ~(HRTIM_TIMCR_DACSYNC);
mbed_official	381:5460fc57b6e4	6522	hrtim_timcr \|= pTimerCfg->DACSynchro;
mbed_official	381:5460fc57b6e4	6523
mbed_official	381:5460fc57b6e4	6524	/* Enable/Disable preload meachanism for timer registers */
mbed_official	381:5460fc57b6e4	6525	hrtim_timcr &= ~(HRTIM_TIMCR_PREEN);
mbed_official	381:5460fc57b6e4	6526	hrtim_timcr \|= pTimerCfg->PreloadEnable;
mbed_official	381:5460fc57b6e4	6527
mbed_official	381:5460fc57b6e4	6528	/* Timing unit registers update handling */
mbed_official	381:5460fc57b6e4	6529	hrtim_timcr &= ~(HRTIM_TIMCR_UPDGAT);
mbed_official	381:5460fc57b6e4	6530	hrtim_timcr \|= pTimerCfg->UpdateGating;
mbed_official	381:5460fc57b6e4	6531
mbed_official	381:5460fc57b6e4	6532	/* Enable/Disable registers update on repetition */
mbed_official	381:5460fc57b6e4	6533	hrtim_timcr &= ~(HRTIM_TIMCR_TREPU);
mbed_official	381:5460fc57b6e4	6534	if (pTimerCfg->RepetitionUpdate == HRTIM_UPDATEONREPETITION_ENABLED)
mbed_official	381:5460fc57b6e4	6535	{
mbed_official	381:5460fc57b6e4	6536	hrtim_timcr \|= HRTIM_TIMCR_TREPU;
mbed_official	381:5460fc57b6e4	6537	}
mbed_official	381:5460fc57b6e4	6538
mbed_official	381:5460fc57b6e4	6539	/* Set the push-pull mode */
mbed_official	381:5460fc57b6e4	6540	hrtim_timcr &= ~(HRTIM_TIMCR_PSHPLL);
mbed_official	381:5460fc57b6e4	6541	hrtim_timcr \|= pTimerCfg->PushPull;
mbed_official	381:5460fc57b6e4	6542
mbed_official	381:5460fc57b6e4	6543	/* Enable/Disable registers update on timer counter reset */
mbed_official	381:5460fc57b6e4	6544	hrtim_timcr &= ~(HRTIM_TIMCR_TRSTU);
mbed_official	381:5460fc57b6e4	6545	hrtim_timcr \|= pTimerCfg->ResetUpdate;
mbed_official	381:5460fc57b6e4	6546
mbed_official	381:5460fc57b6e4	6547	/* Set the timer update trigger */
mbed_official	381:5460fc57b6e4	6548	hrtim_timcr &= ~(HRTIM_TIMCR_TIMUPDATETRIGGER);
mbed_official	381:5460fc57b6e4	6549	hrtim_timcr \|= pTimerCfg->UpdateTrigger;
mbed_official	381:5460fc57b6e4	6550
mbed_official	381:5460fc57b6e4	6551
mbed_official	381:5460fc57b6e4	6552	/* Enable/Disable the fault channel at timer level */
mbed_official	381:5460fc57b6e4	6553	hrtim_timfltr &= ~(HRTIM_FLTR_FLTxEN);
mbed_official	381:5460fc57b6e4	6554	hrtim_timfltr \|= (pTimerCfg->FaultEnable & HRTIM_FLTR_FLTxEN);
mbed_official	381:5460fc57b6e4	6555
mbed_official	381:5460fc57b6e4	6556	/* Lock/Unlock fault sources at timer level */
mbed_official	381:5460fc57b6e4	6557	hrtim_timfltr &= ~(HRTIM_FLTR_FLTLCK);
mbed_official	381:5460fc57b6e4	6558	hrtim_timfltr \|= pTimerCfg->FaultLock;
mbed_official	381:5460fc57b6e4	6559
mbed_official	381:5460fc57b6e4	6560	/* The deadtime cannot be used simultaneously with the push-pull mode */
mbed_official	381:5460fc57b6e4	6561	if (pTimerCfg->PushPull == HRTIM_TIMPUSHPULLMODE_DISABLED)
mbed_official	381:5460fc57b6e4	6562	{
mbed_official	381:5460fc57b6e4	6563	/* Enable/Disable dead time insertion at timer level */
mbed_official	381:5460fc57b6e4	6564	hrtim_timoutr &= ~(HRTIM_OUTR_DTEN);
mbed_official	381:5460fc57b6e4	6565	hrtim_timoutr \|= pTimerCfg->DeadTimeInsertion;
mbed_official	381:5460fc57b6e4	6566	}
mbed_official	381:5460fc57b6e4	6567
mbed_official	381:5460fc57b6e4	6568	/* Enable/Disable delayed protection at timer level
mbed_official	381:5460fc57b6e4	6569	Delayed Idle is available whatever the timer operating mode (regular, push-pull)
mbed_official	381:5460fc57b6e4	6570	Balanced Idle is only available in push-pull mode
mbed_official	381:5460fc57b6e4	6571	*/
mbed_official	381:5460fc57b6e4	6572	if ( ((pTimerCfg->DelayedProtectionMode != HRTIM_TIMDELAYEDPROTECTION_BALANCED_EEV68)
mbed_official	381:5460fc57b6e4	6573	&& (pTimerCfg->DelayedProtectionMode != HRTIM_TIMDELAYEDPROTECTION_BALANCED_EEV79))
mbed_official	381:5460fc57b6e4	6574	\|\| (pTimerCfg->PushPull == HRTIM_TIMPUSHPULLMODE_ENABLED))
mbed_official	381:5460fc57b6e4	6575	{
mbed_official	381:5460fc57b6e4	6576	hrtim_timoutr &= ~(HRTIM_OUTR_DLYPRT\| HRTIM_OUTR_DLYPRTEN);
mbed_official	381:5460fc57b6e4	6577	hrtim_timoutr \|= pTimerCfg->DelayedProtectionMode;
mbed_official	381:5460fc57b6e4	6578	}
mbed_official	381:5460fc57b6e4	6579
mbed_official	381:5460fc57b6e4	6580	/* Set the timer counter reset trigger */
mbed_official	381:5460fc57b6e4	6581	hrtim_timrstr = pTimerCfg->ResetTrigger;
mbed_official	381:5460fc57b6e4	6582
mbed_official	381:5460fc57b6e4	6583	/* Set the timer burst mode */
mbed_official	381:5460fc57b6e4	6584	switch (TimerIdx)
mbed_official	381:5460fc57b6e4	6585	{
mbed_official	381:5460fc57b6e4	6586	case HRTIM_TIMERINDEX_TIMER_A:
mbed_official	381:5460fc57b6e4	6587	{
mbed_official	381:5460fc57b6e4	6588	hrtim_bmcr &= ~(HRTIM_BMCR_TABM);
mbed_official	381:5460fc57b6e4	6589	hrtim_bmcr \|= ( pTimerCfg->BurstMode << 1);
mbed_official	381:5460fc57b6e4	6590	}
mbed_official	381:5460fc57b6e4	6591	break;
mbed_official	381:5460fc57b6e4	6592	case HRTIM_TIMERINDEX_TIMER_B:
mbed_official	381:5460fc57b6e4	6593	{
mbed_official	381:5460fc57b6e4	6594	hrtim_bmcr &= ~(HRTIM_BMCR_TBBM);
mbed_official	381:5460fc57b6e4	6595	hrtim_bmcr \|= ( pTimerCfg->BurstMode << 2);
mbed_official	381:5460fc57b6e4	6596	}
mbed_official	381:5460fc57b6e4	6597	break;
mbed_official	381:5460fc57b6e4	6598	case HRTIM_TIMERINDEX_TIMER_C:
mbed_official	381:5460fc57b6e4	6599	{
mbed_official	381:5460fc57b6e4	6600	hrtim_bmcr &= ~(HRTIM_BMCR_TCBM);
mbed_official	381:5460fc57b6e4	6601	hrtim_bmcr \|= ( pTimerCfg->BurstMode << 3);
mbed_official	381:5460fc57b6e4	6602	}
mbed_official	381:5460fc57b6e4	6603	break;
mbed_official	381:5460fc57b6e4	6604	case HRTIM_TIMERINDEX_TIMER_D:
mbed_official	381:5460fc57b6e4	6605	{
mbed_official	381:5460fc57b6e4	6606	hrtim_bmcr &= ~(HRTIM_BMCR_TDBM);
mbed_official	381:5460fc57b6e4	6607	hrtim_bmcr \|= ( pTimerCfg->BurstMode << 4);
mbed_official	381:5460fc57b6e4	6608	}
mbed_official	381:5460fc57b6e4	6609	break;
mbed_official	381:5460fc57b6e4	6610	case HRTIM_TIMERINDEX_TIMER_E:
mbed_official	381:5460fc57b6e4	6611	{
mbed_official	381:5460fc57b6e4	6612	hrtim_bmcr &= ~(HRTIM_BMCR_TEBM);
mbed_official	381:5460fc57b6e4	6613	hrtim_bmcr \|= ( pTimerCfg->BurstMode << 5);
mbed_official	381:5460fc57b6e4	6614	}
mbed_official	381:5460fc57b6e4	6615	break;
mbed_official	381:5460fc57b6e4	6616	}
mbed_official	381:5460fc57b6e4	6617
mbed_official	381:5460fc57b6e4	6618	/* Update the HRTIM registers */
mbed_official	381:5460fc57b6e4	6619	hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR = hrtim_timcr;
mbed_official	381:5460fc57b6e4	6620	hhrtim->Instance->sTimerxRegs[TimerIdx].FLTxR = hrtim_timfltr;
mbed_official	381:5460fc57b6e4	6621	hhrtim->Instance->sTimerxRegs[TimerIdx].OUTxR = hrtim_timoutr;
mbed_official	381:5460fc57b6e4	6622	hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = hrtim_timrstr;
mbed_official	381:5460fc57b6e4	6623	hhrtim->Instance->sCommonRegs.BMCR = hrtim_bmcr;
mbed_official	381:5460fc57b6e4	6624	}
mbed_official	381:5460fc57b6e4	6625
mbed_official	381:5460fc57b6e4	6626	/**
mbed_official	381:5460fc57b6e4	6627	* @brief Configures a compare unit
mbed_official	381:5460fc57b6e4	6628	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	6629	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	6630	* @param CompareUnit: Compare unit identifier
mbed_official	381:5460fc57b6e4	6631	* @param pCompareCfg: pointer to the compare unit configuration data structure
mbed_official	381:5460fc57b6e4	6632	* @retval None
mbed_official	381:5460fc57b6e4	6633	*/
mbed_official	381:5460fc57b6e4	6634	static void HRTIM_CompareUnitConfig(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	6635	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	6636	uint32_t CompareUnit,
mbed_official	381:5460fc57b6e4	6637	HRTIM_CompareCfgTypeDef * pCompareCfg)
mbed_official	381:5460fc57b6e4	6638	{
mbed_official	381:5460fc57b6e4	6639	if (TimerIdx == HRTIM_TIMERINDEX_MASTER)
mbed_official	381:5460fc57b6e4	6640	{
mbed_official	381:5460fc57b6e4	6641	/* Configure the compare unit of the master timer */
mbed_official	381:5460fc57b6e4	6642	switch (CompareUnit)
mbed_official	381:5460fc57b6e4	6643	{
mbed_official	381:5460fc57b6e4	6644	case HRTIM_COMPAREUNIT_1:
mbed_official	381:5460fc57b6e4	6645	{
mbed_official	381:5460fc57b6e4	6646	hhrtim->Instance->sMasterRegs.MCMP1R = pCompareCfg->CompareValue;
mbed_official	381:5460fc57b6e4	6647	}
mbed_official	381:5460fc57b6e4	6648	break;
mbed_official	381:5460fc57b6e4	6649	case HRTIM_COMPAREUNIT_2:
mbed_official	381:5460fc57b6e4	6650	{
mbed_official	381:5460fc57b6e4	6651	hhrtim->Instance->sMasterRegs.MCMP2R = pCompareCfg->CompareValue;
mbed_official	381:5460fc57b6e4	6652	}
mbed_official	381:5460fc57b6e4	6653	break;
mbed_official	381:5460fc57b6e4	6654	case HRTIM_COMPAREUNIT_3:
mbed_official	381:5460fc57b6e4	6655	{
mbed_official	381:5460fc57b6e4	6656	hhrtim->Instance->sMasterRegs.MCMP3R = pCompareCfg->CompareValue;
mbed_official	381:5460fc57b6e4	6657	}
mbed_official	381:5460fc57b6e4	6658	break;
mbed_official	381:5460fc57b6e4	6659	case HRTIM_COMPAREUNIT_4:
mbed_official	381:5460fc57b6e4	6660	{
mbed_official	381:5460fc57b6e4	6661	hhrtim->Instance->sMasterRegs.MCMP4R = pCompareCfg->CompareValue;
mbed_official	381:5460fc57b6e4	6662	}
mbed_official	381:5460fc57b6e4	6663	break;
mbed_official	381:5460fc57b6e4	6664	}
mbed_official	381:5460fc57b6e4	6665	}
mbed_official	381:5460fc57b6e4	6666	else
mbed_official	381:5460fc57b6e4	6667	{
mbed_official	381:5460fc57b6e4	6668	/* Configure the compare unit of the timing unit */
mbed_official	381:5460fc57b6e4	6669	switch (CompareUnit)
mbed_official	381:5460fc57b6e4	6670	{
mbed_official	381:5460fc57b6e4	6671	case HRTIM_COMPAREUNIT_1:
mbed_official	381:5460fc57b6e4	6672	{
mbed_official	381:5460fc57b6e4	6673	hhrtim->Instance->sTimerxRegs[TimerIdx].CMP1xR = pCompareCfg->CompareValue;
mbed_official	381:5460fc57b6e4	6674	}
mbed_official	381:5460fc57b6e4	6675	break;
mbed_official	381:5460fc57b6e4	6676	case HRTIM_COMPAREUNIT_2:
mbed_official	381:5460fc57b6e4	6677	{
mbed_official	381:5460fc57b6e4	6678	hhrtim->Instance->sTimerxRegs[TimerIdx].CMP2xR = pCompareCfg->CompareValue;
mbed_official	381:5460fc57b6e4	6679	}
mbed_official	381:5460fc57b6e4	6680	break;
mbed_official	381:5460fc57b6e4	6681	case HRTIM_COMPAREUNIT_3:
mbed_official	381:5460fc57b6e4	6682	{
mbed_official	381:5460fc57b6e4	6683	hhrtim->Instance->sTimerxRegs[TimerIdx].CMP3xR = pCompareCfg->CompareValue;
mbed_official	381:5460fc57b6e4	6684	}
mbed_official	381:5460fc57b6e4	6685	break;
mbed_official	381:5460fc57b6e4	6686	case HRTIM_COMPAREUNIT_4:
mbed_official	381:5460fc57b6e4	6687	{
mbed_official	381:5460fc57b6e4	6688	hhrtim->Instance->sTimerxRegs[TimerIdx].CMP4xR = pCompareCfg->CompareValue;
mbed_official	381:5460fc57b6e4	6689	}
mbed_official	381:5460fc57b6e4	6690	break;
mbed_official	381:5460fc57b6e4	6691	}
mbed_official	381:5460fc57b6e4	6692	}
mbed_official	381:5460fc57b6e4	6693	}
mbed_official	381:5460fc57b6e4	6694
mbed_official	381:5460fc57b6e4	6695	/**
mbed_official	381:5460fc57b6e4	6696	* @brief Configures a capture unit
mbed_official	381:5460fc57b6e4	6697	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	6698	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	6699	* @param CaptureUnit: Capture unit identifier
mbed_official	381:5460fc57b6e4	6700	* @param Event: Event reference
mbed_official	381:5460fc57b6e4	6701	* @retval None
mbed_official	381:5460fc57b6e4	6702	*/
mbed_official	381:5460fc57b6e4	6703	static void HRTIM_CaptureUnitConfig(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	6704	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	6705	uint32_t CaptureUnit,
mbed_official	381:5460fc57b6e4	6706	uint32_t Event)
mbed_official	381:5460fc57b6e4	6707	{
mbed_official	381:5460fc57b6e4	6708	uint32_t CaptureTrigger = 0xFFFFFFFF;
mbed_official	381:5460fc57b6e4	6709
mbed_official	381:5460fc57b6e4	6710	switch (Event)
mbed_official	381:5460fc57b6e4	6711	{
mbed_official	381:5460fc57b6e4	6712	case HRTIM_EVENT_1:
mbed_official	381:5460fc57b6e4	6713	{
mbed_official	381:5460fc57b6e4	6714	CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_1;
mbed_official	381:5460fc57b6e4	6715	}
mbed_official	381:5460fc57b6e4	6716	break;
mbed_official	381:5460fc57b6e4	6717	case HRTIM_EVENT_2:
mbed_official	381:5460fc57b6e4	6718	{
mbed_official	381:5460fc57b6e4	6719	CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_2;
mbed_official	381:5460fc57b6e4	6720	}
mbed_official	381:5460fc57b6e4	6721	break;
mbed_official	381:5460fc57b6e4	6722	case HRTIM_EVENT_3:
mbed_official	381:5460fc57b6e4	6723	{
mbed_official	381:5460fc57b6e4	6724	CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_3;
mbed_official	381:5460fc57b6e4	6725	}
mbed_official	381:5460fc57b6e4	6726	break;
mbed_official	381:5460fc57b6e4	6727	case HRTIM_EVENT_4:
mbed_official	381:5460fc57b6e4	6728	{
mbed_official	381:5460fc57b6e4	6729	CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_4;
mbed_official	381:5460fc57b6e4	6730	}
mbed_official	381:5460fc57b6e4	6731	break;
mbed_official	381:5460fc57b6e4	6732	case HRTIM_EVENT_5:
mbed_official	381:5460fc57b6e4	6733	{
mbed_official	381:5460fc57b6e4	6734	CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_5;
mbed_official	381:5460fc57b6e4	6735	}
mbed_official	381:5460fc57b6e4	6736	break;
mbed_official	381:5460fc57b6e4	6737	case HRTIM_EVENT_6:
mbed_official	381:5460fc57b6e4	6738	{
mbed_official	381:5460fc57b6e4	6739	CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_6;
mbed_official	381:5460fc57b6e4	6740	}
mbed_official	381:5460fc57b6e4	6741	break;
mbed_official	381:5460fc57b6e4	6742	case HRTIM_EVENT_7:
mbed_official	381:5460fc57b6e4	6743	{
mbed_official	381:5460fc57b6e4	6744	CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_7;
mbed_official	381:5460fc57b6e4	6745	}
mbed_official	381:5460fc57b6e4	6746	break;
mbed_official	381:5460fc57b6e4	6747	case HRTIM_EVENT_8:
mbed_official	381:5460fc57b6e4	6748	{
mbed_official	381:5460fc57b6e4	6749	CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_8;
mbed_official	381:5460fc57b6e4	6750	}
mbed_official	381:5460fc57b6e4	6751	break;
mbed_official	381:5460fc57b6e4	6752	case HRTIM_EVENT_9:
mbed_official	381:5460fc57b6e4	6753	{
mbed_official	381:5460fc57b6e4	6754	CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_9;
mbed_official	381:5460fc57b6e4	6755	}
mbed_official	381:5460fc57b6e4	6756	break;
mbed_official	381:5460fc57b6e4	6757	case HRTIM_EVENT_10:
mbed_official	381:5460fc57b6e4	6758	{
mbed_official	381:5460fc57b6e4	6759	CaptureTrigger = HRTIM_CAPTURETRIGGER_EEV_10;
mbed_official	381:5460fc57b6e4	6760	}
mbed_official	381:5460fc57b6e4	6761	break;
mbed_official	381:5460fc57b6e4	6762	}
mbed_official	381:5460fc57b6e4	6763
mbed_official	381:5460fc57b6e4	6764	switch (CaptureUnit)
mbed_official	381:5460fc57b6e4	6765	{
mbed_official	381:5460fc57b6e4	6766	case HRTIM_CAPTUREUNIT_1:
mbed_official	381:5460fc57b6e4	6767	{
mbed_official	381:5460fc57b6e4	6768	hhrtim->TimerParam[TimerIdx].CaptureTrigger1 = CaptureTrigger;
mbed_official	381:5460fc57b6e4	6769	}
mbed_official	381:5460fc57b6e4	6770	break;
mbed_official	381:5460fc57b6e4	6771	case HRTIM_CAPTUREUNIT_2:
mbed_official	381:5460fc57b6e4	6772	{
mbed_official	381:5460fc57b6e4	6773	hhrtim->TimerParam[TimerIdx].CaptureTrigger2 = CaptureTrigger;
mbed_official	381:5460fc57b6e4	6774	}
mbed_official	381:5460fc57b6e4	6775	break;
mbed_official	381:5460fc57b6e4	6776	}
mbed_official	381:5460fc57b6e4	6777	}
mbed_official	381:5460fc57b6e4	6778
mbed_official	381:5460fc57b6e4	6779	/**
mbed_official	381:5460fc57b6e4	6780	* @brief Configures the output of a timing unit
mbed_official	381:5460fc57b6e4	6781	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	6782	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	6783	* @param Output: timing unit output identifier
mbed_official	381:5460fc57b6e4	6784	* @param pOutputCfg: pointer to the output configuration data structure
mbed_official	381:5460fc57b6e4	6785	* @retval None
mbed_official	381:5460fc57b6e4	6786	*/
mbed_official	381:5460fc57b6e4	6787	static void HRTIM_OutputConfig(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	6788	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	6789	uint32_t Output,
mbed_official	381:5460fc57b6e4	6790	HRTIM_OutputCfgTypeDef * pOutputCfg)
mbed_official	381:5460fc57b6e4	6791	{
mbed_official	381:5460fc57b6e4	6792	uint32_t hrtim_outr;
mbed_official	381:5460fc57b6e4	6793	uint32_t hrtim_dtr;
mbed_official	381:5460fc57b6e4	6794
mbed_official	381:5460fc57b6e4	6795	uint32_t shift = 0xFFFFFFFF;
mbed_official	381:5460fc57b6e4	6796
mbed_official	381:5460fc57b6e4	6797	hrtim_outr = hhrtim->Instance->sTimerxRegs[TimerIdx].OUTxR;
mbed_official	381:5460fc57b6e4	6798	hrtim_dtr = hhrtim->Instance->sTimerxRegs[TimerIdx].DTxR;
mbed_official	381:5460fc57b6e4	6799
mbed_official	381:5460fc57b6e4	6800	switch (Output)
mbed_official	381:5460fc57b6e4	6801	{
mbed_official	381:5460fc57b6e4	6802	case HRTIM_OUTPUT_TA1:
mbed_official	381:5460fc57b6e4	6803	case HRTIM_OUTPUT_TB1:
mbed_official	381:5460fc57b6e4	6804	case HRTIM_OUTPUT_TC1:
mbed_official	381:5460fc57b6e4	6805	case HRTIM_OUTPUT_TD1:
mbed_official	381:5460fc57b6e4	6806	case HRTIM_OUTPUT_TE1:
mbed_official	381:5460fc57b6e4	6807	{
mbed_official	381:5460fc57b6e4	6808	/* Set the output set/reset crossbar */
mbed_official	381:5460fc57b6e4	6809	hhrtim->Instance->sTimerxRegs[TimerIdx].SETx1R = pOutputCfg->SetSource;
mbed_official	381:5460fc57b6e4	6810	hhrtim->Instance->sTimerxRegs[TimerIdx].RSTx1R = pOutputCfg->ResetSource;
mbed_official	381:5460fc57b6e4	6811
mbed_official	381:5460fc57b6e4	6812	shift = 0;
mbed_official	381:5460fc57b6e4	6813	}
mbed_official	381:5460fc57b6e4	6814	break;
mbed_official	381:5460fc57b6e4	6815	case HRTIM_OUTPUT_TA2:
mbed_official	381:5460fc57b6e4	6816	case HRTIM_OUTPUT_TB2:
mbed_official	381:5460fc57b6e4	6817	case HRTIM_OUTPUT_TC2:
mbed_official	381:5460fc57b6e4	6818	case HRTIM_OUTPUT_TD2:
mbed_official	381:5460fc57b6e4	6819	case HRTIM_OUTPUT_TE2:
mbed_official	381:5460fc57b6e4	6820	{
mbed_official	381:5460fc57b6e4	6821	/* Set the output set/reset crossbar */
mbed_official	381:5460fc57b6e4	6822	hhrtim->Instance->sTimerxRegs[TimerIdx].SETx2R = pOutputCfg->SetSource;
mbed_official	381:5460fc57b6e4	6823	hhrtim->Instance->sTimerxRegs[TimerIdx].RSTx2R = pOutputCfg->ResetSource;
mbed_official	381:5460fc57b6e4	6824
mbed_official	381:5460fc57b6e4	6825	shift = 16;
mbed_official	381:5460fc57b6e4	6826	}
mbed_official	381:5460fc57b6e4	6827	break;
mbed_official	381:5460fc57b6e4	6828	}
mbed_official	381:5460fc57b6e4	6829
mbed_official	381:5460fc57b6e4	6830	/* Clear output config */
mbed_official	381:5460fc57b6e4	6831	hrtim_outr &= ~((HRTIM_OUTR_POL1 \|
mbed_official	381:5460fc57b6e4	6832	HRTIM_OUTR_IDLM1 \|
mbed_official	381:5460fc57b6e4	6833	HRTIM_OUTR_IDLES1\|
mbed_official	381:5460fc57b6e4	6834	HRTIM_OUTR_FAULT1\|
mbed_official	381:5460fc57b6e4	6835	HRTIM_OUTR_CHP1 \|
mbed_official	381:5460fc57b6e4	6836	HRTIM_OUTR_DIDL1) << shift);
mbed_official	381:5460fc57b6e4	6837
mbed_official	381:5460fc57b6e4	6838	/* Set the polarity */
mbed_official	381:5460fc57b6e4	6839	hrtim_outr \|= (pOutputCfg->Polarity << shift);
mbed_official	381:5460fc57b6e4	6840
mbed_official	381:5460fc57b6e4	6841	/* Set the IDLE mode */
mbed_official	381:5460fc57b6e4	6842	hrtim_outr \|= (pOutputCfg->IdleMode << shift);
mbed_official	381:5460fc57b6e4	6843
mbed_official	381:5460fc57b6e4	6844	/* Set the IDLE state */
mbed_official	381:5460fc57b6e4	6845	hrtim_outr \|= (pOutputCfg->IdleLevel << shift);
mbed_official	381:5460fc57b6e4	6846
mbed_official	381:5460fc57b6e4	6847	/* Set the FAULT state */
mbed_official	381:5460fc57b6e4	6848	hrtim_outr \|= (pOutputCfg->FaultLevel << shift);
mbed_official	381:5460fc57b6e4	6849
mbed_official	381:5460fc57b6e4	6850	/* Set the chopper mode */
mbed_official	381:5460fc57b6e4	6851	hrtim_outr \|= (pOutputCfg->ChopperModeEnable << shift);
mbed_official	381:5460fc57b6e4	6852
mbed_official	381:5460fc57b6e4	6853	/* Set the burst mode entry mode : deadtime insertion when entering the idle
mbed_official	381:5460fc57b6e4	6854	state during a burst mode operation is allowed only under the following
mbed_official	381:5460fc57b6e4	6855	conditions:
mbed_official	381:5460fc57b6e4	6856	- the outputs is active during the burst mode (IDLES=1)
mbed_official	381:5460fc57b6e4	6857	- positive deadtimes (SDTR/SDTF set to 0)
mbed_official	381:5460fc57b6e4	6858	*/
mbed_official	381:5460fc57b6e4	6859	if ((pOutputCfg->IdleLevel == HRTIM_OUTPUTIDLELEVEL_ACTIVE) &&
mbed_official	381:5460fc57b6e4	6860	((hrtim_dtr & HRTIM_DTR_SDTR) == RESET) &&
mbed_official	381:5460fc57b6e4	6861	((hrtim_dtr & HRTIM_DTR_SDTF) == RESET))
mbed_official	381:5460fc57b6e4	6862	{
mbed_official	381:5460fc57b6e4	6863	hrtim_outr \|= (pOutputCfg->BurstModeEntryDelayed << shift);
mbed_official	381:5460fc57b6e4	6864	}
mbed_official	381:5460fc57b6e4	6865
mbed_official	381:5460fc57b6e4	6866	/* Update HRTIM register */
mbed_official	381:5460fc57b6e4	6867	hhrtim->Instance->sTimerxRegs[TimerIdx].OUTxR = hrtim_outr;
mbed_official	381:5460fc57b6e4	6868	}
mbed_official	381:5460fc57b6e4	6869
mbed_official	381:5460fc57b6e4	6870	/**
mbed_official	381:5460fc57b6e4	6871	* @brief Configures an external event channel
mbed_official	381:5460fc57b6e4	6872	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	6873	* @param Event: Event channel identifier
mbed_official	381:5460fc57b6e4	6874	* @param pEventCfg: pointer to the event channel configuration data structure
mbed_official	381:5460fc57b6e4	6875	* @retval None
mbed_official	381:5460fc57b6e4	6876	*/
mbed_official	381:5460fc57b6e4	6877	static void HRTIM_EventConfig(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	6878	uint32_t Event,
mbed_official	381:5460fc57b6e4	6879	HRTIM_EventCfgTypeDef *pEventCfg)
mbed_official	381:5460fc57b6e4	6880	{
mbed_official	381:5460fc57b6e4	6881	uint32_t hrtim_eecr1;
mbed_official	381:5460fc57b6e4	6882	uint32_t hrtim_eecr2;
mbed_official	381:5460fc57b6e4	6883	uint32_t hrtim_eecr3;
mbed_official	381:5460fc57b6e4	6884
mbed_official	381:5460fc57b6e4	6885	/* Configure external event channel */
mbed_official	381:5460fc57b6e4	6886	hrtim_eecr1 = hhrtim->Instance->sCommonRegs.EECR1;
mbed_official	381:5460fc57b6e4	6887	hrtim_eecr2 = hhrtim->Instance->sCommonRegs.EECR2;
mbed_official	381:5460fc57b6e4	6888	hrtim_eecr3 = hhrtim->Instance->sCommonRegs.EECR3;
mbed_official	381:5460fc57b6e4	6889
mbed_official	381:5460fc57b6e4	6890	switch (Event)
mbed_official	381:5460fc57b6e4	6891	{
mbed_official	381:5460fc57b6e4	6892	case HRTIM_EVENT_1:
mbed_official	381:5460fc57b6e4	6893	{
mbed_official	381:5460fc57b6e4	6894	hrtim_eecr1 &= ~(HRTIM_EECR1_EE1SRC \| HRTIM_EECR1_EE1POL \| HRTIM_EECR1_EE1SNS \| HRTIM_EECR1_EE1FAST);
mbed_official	381:5460fc57b6e4	6895	hrtim_eecr1 \|= pEventCfg->Source;
mbed_official	381:5460fc57b6e4	6896	hrtim_eecr1 \|= (pEventCfg->Polarity & HRTIM_EECR1_EE1POL);
mbed_official	381:5460fc57b6e4	6897	hrtim_eecr1 \|= pEventCfg->Sensitivity;
mbed_official	381:5460fc57b6e4	6898	/* Update the HRTIM registers (all bitfields but EE1FAST bit) */
mbed_official	381:5460fc57b6e4	6899	hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;
mbed_official	381:5460fc57b6e4	6900	/* Update the HRTIM registers (EE1FAST bit) */
mbed_official	381:5460fc57b6e4	6901	hrtim_eecr1 \|= pEventCfg->FastMode;
mbed_official	381:5460fc57b6e4	6902	hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;
mbed_official	381:5460fc57b6e4	6903	}
mbed_official	381:5460fc57b6e4	6904	break;
mbed_official	381:5460fc57b6e4	6905	case HRTIM_EVENT_2:
mbed_official	381:5460fc57b6e4	6906	{
mbed_official	381:5460fc57b6e4	6907	hrtim_eecr1 &= ~(HRTIM_EECR1_EE2SRC \| HRTIM_EECR1_EE2POL \| HRTIM_EECR1_EE2SNS \| HRTIM_EECR1_EE2FAST);
mbed_official	381:5460fc57b6e4	6908	hrtim_eecr1 \|= (pEventCfg->Source << 6);
mbed_official	381:5460fc57b6e4	6909	hrtim_eecr1 \|= ((pEventCfg->Polarity << 6) & (HRTIM_EECR1_EE2POL));
mbed_official	381:5460fc57b6e4	6910	hrtim_eecr1 \|= (pEventCfg->Sensitivity << 6);
mbed_official	381:5460fc57b6e4	6911	/* Update the HRTIM registers (all bitfields but EE2FAST bit) */
mbed_official	381:5460fc57b6e4	6912	hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;
mbed_official	381:5460fc57b6e4	6913	/* Update the HRTIM registers (EE2FAST bit) */
mbed_official	381:5460fc57b6e4	6914	hrtim_eecr1 \|= (pEventCfg->FastMode << 6);
mbed_official	381:5460fc57b6e4	6915	hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;
mbed_official	381:5460fc57b6e4	6916	}
mbed_official	381:5460fc57b6e4	6917	break;
mbed_official	381:5460fc57b6e4	6918	case HRTIM_EVENT_3:
mbed_official	381:5460fc57b6e4	6919	{
mbed_official	381:5460fc57b6e4	6920	hrtim_eecr1 &= ~(HRTIM_EECR1_EE3SRC \| HRTIM_EECR1_EE3POL \| HRTIM_EECR1_EE3SNS \| HRTIM_EECR1_EE3FAST);
mbed_official	381:5460fc57b6e4	6921	hrtim_eecr1 \|= (pEventCfg->Source << 12);
mbed_official	381:5460fc57b6e4	6922	hrtim_eecr1 \|= ((pEventCfg->Polarity << 12) & (HRTIM_EECR1_EE3POL));
mbed_official	381:5460fc57b6e4	6923	hrtim_eecr1 \|= (pEventCfg->Sensitivity << 12);
mbed_official	381:5460fc57b6e4	6924	/* Update the HRTIM registers (all bitfields but EE3FAST bit) */
mbed_official	381:5460fc57b6e4	6925	hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;
mbed_official	381:5460fc57b6e4	6926	/* Update the HRTIM registers (EE3FAST bit) */
mbed_official	381:5460fc57b6e4	6927	hrtim_eecr1 \|= (pEventCfg->FastMode << 12);
mbed_official	381:5460fc57b6e4	6928	hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;
mbed_official	381:5460fc57b6e4	6929	}
mbed_official	381:5460fc57b6e4	6930	break;
mbed_official	381:5460fc57b6e4	6931	case HRTIM_EVENT_4:
mbed_official	381:5460fc57b6e4	6932	{
mbed_official	381:5460fc57b6e4	6933	hrtim_eecr1 &= ~(HRTIM_EECR1_EE4SRC \| HRTIM_EECR1_EE4POL \| HRTIM_EECR1_EE4SNS \| HRTIM_EECR1_EE4FAST);
mbed_official	381:5460fc57b6e4	6934	hrtim_eecr1 \|= (pEventCfg->Source << 18);
mbed_official	381:5460fc57b6e4	6935	hrtim_eecr1 \|= ((pEventCfg->Polarity << 18) & (HRTIM_EECR1_EE4POL));
mbed_official	381:5460fc57b6e4	6936	hrtim_eecr1 \|= (pEventCfg->Sensitivity << 18);
mbed_official	381:5460fc57b6e4	6937	/* Update the HRTIM registers (all bitfields but EE4FAST bit) */
mbed_official	381:5460fc57b6e4	6938	hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;
mbed_official	381:5460fc57b6e4	6939	/* Update the HRTIM registers (EE4FAST bit) */
mbed_official	381:5460fc57b6e4	6940	hrtim_eecr1 \|= (pEventCfg->FastMode << 18);
mbed_official	381:5460fc57b6e4	6941	hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;
mbed_official	381:5460fc57b6e4	6942	}
mbed_official	381:5460fc57b6e4	6943	break;
mbed_official	381:5460fc57b6e4	6944	case HRTIM_EVENT_5:
mbed_official	381:5460fc57b6e4	6945	{
mbed_official	381:5460fc57b6e4	6946	hrtim_eecr1 &= ~(HRTIM_EECR1_EE5SRC \| HRTIM_EECR1_EE5POL \| HRTIM_EECR1_EE5SNS \| HRTIM_EECR1_EE5FAST);
mbed_official	381:5460fc57b6e4	6947	hrtim_eecr1 \|= (pEventCfg->Source << 24);
mbed_official	381:5460fc57b6e4	6948	hrtim_eecr1 \|= ((pEventCfg->Polarity << 24) & (HRTIM_EECR1_EE5POL));
mbed_official	381:5460fc57b6e4	6949	hrtim_eecr1 \|= (pEventCfg->Sensitivity << 24);
mbed_official	381:5460fc57b6e4	6950	/* Update the HRTIM registers (all bitfields but EE5FAST bit) */
mbed_official	381:5460fc57b6e4	6951	hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;
mbed_official	381:5460fc57b6e4	6952	/* Update the HRTIM registers (EE5FAST bit) */
mbed_official	381:5460fc57b6e4	6953	hrtim_eecr1 \|= (pEventCfg->FastMode << 24);
mbed_official	381:5460fc57b6e4	6954	hhrtim->Instance->sCommonRegs.EECR1 = hrtim_eecr1;
mbed_official	381:5460fc57b6e4	6955	}
mbed_official	381:5460fc57b6e4	6956	break;
mbed_official	381:5460fc57b6e4	6957	case HRTIM_EVENT_6:
mbed_official	381:5460fc57b6e4	6958	{
mbed_official	381:5460fc57b6e4	6959	hrtim_eecr2 &= ~(HRTIM_EECR2_EE6SRC \| HRTIM_EECR2_EE6POL \| HRTIM_EECR2_EE6SNS);
mbed_official	381:5460fc57b6e4	6960	hrtim_eecr2 \|= pEventCfg->Source;
mbed_official	381:5460fc57b6e4	6961	hrtim_eecr2 \|= (pEventCfg->Polarity & HRTIM_EECR2_EE6POL);
mbed_official	381:5460fc57b6e4	6962	hrtim_eecr2 \|= pEventCfg->Sensitivity;
mbed_official	381:5460fc57b6e4	6963	hrtim_eecr3 &= ~(HRTIM_EECR3_EE6F);
mbed_official	381:5460fc57b6e4	6964	hrtim_eecr3 \|= pEventCfg->Filter;
mbed_official	381:5460fc57b6e4	6965	/* Update the HRTIM registers */
mbed_official	381:5460fc57b6e4	6966	hhrtim->Instance->sCommonRegs.EECR2 = hrtim_eecr2;
mbed_official	381:5460fc57b6e4	6967	hhrtim->Instance->sCommonRegs.EECR3 = hrtim_eecr3;
mbed_official	381:5460fc57b6e4	6968	}
mbed_official	381:5460fc57b6e4	6969	break;
mbed_official	381:5460fc57b6e4	6970	case HRTIM_EVENT_7:
mbed_official	381:5460fc57b6e4	6971	{
mbed_official	381:5460fc57b6e4	6972	hrtim_eecr2 &= ~(HRTIM_EECR2_EE7SRC \| HRTIM_EECR2_EE7POL \| HRTIM_EECR2_EE7SNS);
mbed_official	381:5460fc57b6e4	6973	hrtim_eecr2 \|= (pEventCfg->Source << 6);
mbed_official	381:5460fc57b6e4	6974	hrtim_eecr2 \|= ((pEventCfg->Polarity << 6) & (HRTIM_EECR2_EE7POL));
mbed_official	381:5460fc57b6e4	6975	hrtim_eecr2 \|= (pEventCfg->Sensitivity << 6);
mbed_official	381:5460fc57b6e4	6976	hrtim_eecr3 &= ~(HRTIM_EECR3_EE7F);
mbed_official	381:5460fc57b6e4	6977	hrtim_eecr3 \|= (pEventCfg->Filter << 6);
mbed_official	381:5460fc57b6e4	6978	/* Update the HRTIM registers */
mbed_official	381:5460fc57b6e4	6979	hhrtim->Instance->sCommonRegs.EECR2 = hrtim_eecr2;
mbed_official	381:5460fc57b6e4	6980	hhrtim->Instance->sCommonRegs.EECR3 = hrtim_eecr3;
mbed_official	381:5460fc57b6e4	6981	}
mbed_official	381:5460fc57b6e4	6982	break;
mbed_official	381:5460fc57b6e4	6983	case HRTIM_EVENT_8:
mbed_official	381:5460fc57b6e4	6984	{
mbed_official	381:5460fc57b6e4	6985	hrtim_eecr2 &= ~(HRTIM_EECR2_EE8SRC \| HRTIM_EECR2_EE8POL \| HRTIM_EECR2_EE8SNS);
mbed_official	381:5460fc57b6e4	6986	hrtim_eecr2 \|= (pEventCfg->Source << 12);
mbed_official	381:5460fc57b6e4	6987	hrtim_eecr2 \|= ((pEventCfg->Polarity << 12) & (HRTIM_EECR2_EE8POL));
mbed_official	381:5460fc57b6e4	6988	hrtim_eecr2 \|= (pEventCfg->Sensitivity << 12);
mbed_official	381:5460fc57b6e4	6989	hrtim_eecr3 &= ~(HRTIM_EECR3_EE8F);
mbed_official	381:5460fc57b6e4	6990	hrtim_eecr3 \|= (pEventCfg->Filter << 12);
mbed_official	381:5460fc57b6e4	6991	/* Update the HRTIM registers */
mbed_official	381:5460fc57b6e4	6992	hhrtim->Instance->sCommonRegs.EECR2 = hrtim_eecr2;
mbed_official	381:5460fc57b6e4	6993	hhrtim->Instance->sCommonRegs.EECR3 = hrtim_eecr3;
mbed_official	381:5460fc57b6e4	6994	}
mbed_official	381:5460fc57b6e4	6995	break;
mbed_official	381:5460fc57b6e4	6996	case HRTIM_EVENT_9:
mbed_official	381:5460fc57b6e4	6997	{
mbed_official	381:5460fc57b6e4	6998	hrtim_eecr2 &= ~(HRTIM_EECR2_EE9SRC \| HRTIM_EECR2_EE9POL \| HRTIM_EECR2_EE9SNS);
mbed_official	381:5460fc57b6e4	6999	hrtim_eecr2 \|= (pEventCfg->Source << 18);
mbed_official	381:5460fc57b6e4	7000	hrtim_eecr2 \|= ((pEventCfg->Polarity << 18) & (HRTIM_EECR2_EE9POL));
mbed_official	381:5460fc57b6e4	7001	hrtim_eecr2 \|= (pEventCfg->Sensitivity << 18);
mbed_official	381:5460fc57b6e4	7002	hrtim_eecr3 &= ~(HRTIM_EECR3_EE9F);
mbed_official	381:5460fc57b6e4	7003	hrtim_eecr3 \|= (pEventCfg->Filter << 18);
mbed_official	381:5460fc57b6e4	7004	/* Update the HRTIM registers */
mbed_official	381:5460fc57b6e4	7005	hhrtim->Instance->sCommonRegs.EECR2 = hrtim_eecr2;
mbed_official	381:5460fc57b6e4	7006	hhrtim->Instance->sCommonRegs.EECR3 = hrtim_eecr3;
mbed_official	381:5460fc57b6e4	7007	}
mbed_official	381:5460fc57b6e4	7008	break;
mbed_official	381:5460fc57b6e4	7009	case HRTIM_EVENT_10:
mbed_official	381:5460fc57b6e4	7010	{
mbed_official	381:5460fc57b6e4	7011	hrtim_eecr2 &= ~(HRTIM_EECR2_EE10SRC \| HRTIM_EECR2_EE10POL \| HRTIM_EECR2_EE10SNS);
mbed_official	381:5460fc57b6e4	7012	hrtim_eecr2 \|= (pEventCfg->Source << 24);
mbed_official	381:5460fc57b6e4	7013	hrtim_eecr2 \|= ((pEventCfg->Polarity << 24) & (HRTIM_EECR2_EE10POL));
mbed_official	381:5460fc57b6e4	7014	hrtim_eecr2 \|= (pEventCfg->Sensitivity << 24);
mbed_official	381:5460fc57b6e4	7015	hrtim_eecr3 &= ~(HRTIM_EECR3_EE10F);
mbed_official	381:5460fc57b6e4	7016	hrtim_eecr3 \|= (pEventCfg->Filter << 24);
mbed_official	381:5460fc57b6e4	7017	/* Update the HRTIM registers */
mbed_official	381:5460fc57b6e4	7018	hhrtim->Instance->sCommonRegs.EECR2 = hrtim_eecr2;
mbed_official	381:5460fc57b6e4	7019	hhrtim->Instance->sCommonRegs.EECR3 = hrtim_eecr3;
mbed_official	381:5460fc57b6e4	7020	}
mbed_official	381:5460fc57b6e4	7021	break;
mbed_official	381:5460fc57b6e4	7022	default:
mbed_official	381:5460fc57b6e4	7023	break;
mbed_official	381:5460fc57b6e4	7024	}
mbed_official	381:5460fc57b6e4	7025	}
mbed_official	381:5460fc57b6e4	7026
mbed_official	381:5460fc57b6e4	7027	/**
mbed_official	381:5460fc57b6e4	7028	* @brief Configures the timer counter reset
mbed_official	381:5460fc57b6e4	7029	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	7030	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	7031	* @param Event: Event channel identifier
mbed_official	381:5460fc57b6e4	7032	* @retval None
mbed_official	381:5460fc57b6e4	7033	*/
mbed_official	381:5460fc57b6e4	7034	static void HRTIM_TIM_ResetConfig(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	7035	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	7036	uint32_t Event)
mbed_official	381:5460fc57b6e4	7037	{
mbed_official	381:5460fc57b6e4	7038	switch (Event)
mbed_official	381:5460fc57b6e4	7039	{
mbed_official	381:5460fc57b6e4	7040	case HRTIM_EVENT_1:
mbed_official	381:5460fc57b6e4	7041	{
mbed_official	381:5460fc57b6e4	7042	hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_1;
mbed_official	381:5460fc57b6e4	7043	}
mbed_official	381:5460fc57b6e4	7044	break;
mbed_official	381:5460fc57b6e4	7045	case HRTIM_EVENT_2:
mbed_official	381:5460fc57b6e4	7046	{
mbed_official	381:5460fc57b6e4	7047	hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_2;
mbed_official	381:5460fc57b6e4	7048	}
mbed_official	381:5460fc57b6e4	7049	break;
mbed_official	381:5460fc57b6e4	7050	case HRTIM_EVENT_3:
mbed_official	381:5460fc57b6e4	7051	{
mbed_official	381:5460fc57b6e4	7052	hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_3;
mbed_official	381:5460fc57b6e4	7053	}
mbed_official	381:5460fc57b6e4	7054	break;
mbed_official	381:5460fc57b6e4	7055	case HRTIM_EVENT_4:
mbed_official	381:5460fc57b6e4	7056	{
mbed_official	381:5460fc57b6e4	7057	hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_4;
mbed_official	381:5460fc57b6e4	7058	}
mbed_official	381:5460fc57b6e4	7059	break;
mbed_official	381:5460fc57b6e4	7060	case HRTIM_EVENT_5:
mbed_official	381:5460fc57b6e4	7061	{
mbed_official	381:5460fc57b6e4	7062	hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_5;
mbed_official	381:5460fc57b6e4	7063	}
mbed_official	381:5460fc57b6e4	7064	break;
mbed_official	381:5460fc57b6e4	7065	case HRTIM_EVENT_6:
mbed_official	381:5460fc57b6e4	7066	{
mbed_official	381:5460fc57b6e4	7067	hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_6;
mbed_official	381:5460fc57b6e4	7068	}
mbed_official	381:5460fc57b6e4	7069	break;
mbed_official	381:5460fc57b6e4	7070	case HRTIM_EVENT_7:
mbed_official	381:5460fc57b6e4	7071	{
mbed_official	381:5460fc57b6e4	7072	hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_7;
mbed_official	381:5460fc57b6e4	7073	}
mbed_official	381:5460fc57b6e4	7074	break;
mbed_official	381:5460fc57b6e4	7075	case HRTIM_EVENT_8:
mbed_official	381:5460fc57b6e4	7076	{
mbed_official	381:5460fc57b6e4	7077	hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_8;
mbed_official	381:5460fc57b6e4	7078	}
mbed_official	381:5460fc57b6e4	7079	break;
mbed_official	381:5460fc57b6e4	7080	case HRTIM_EVENT_9:
mbed_official	381:5460fc57b6e4	7081	{
mbed_official	381:5460fc57b6e4	7082	hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_9;
mbed_official	381:5460fc57b6e4	7083	}
mbed_official	381:5460fc57b6e4	7084	break;
mbed_official	381:5460fc57b6e4	7085	case HRTIM_EVENT_10:
mbed_official	381:5460fc57b6e4	7086	{
mbed_official	381:5460fc57b6e4	7087	hhrtim->Instance->sTimerxRegs[TimerIdx].RSTxR = HRTIM_TIMRESETTRIGGER_EEV_10;
mbed_official	381:5460fc57b6e4	7088	}
mbed_official	381:5460fc57b6e4	7089	break;
mbed_official	381:5460fc57b6e4	7090	}
mbed_official	381:5460fc57b6e4	7091	}
mbed_official	381:5460fc57b6e4	7092
mbed_official	381:5460fc57b6e4	7093	/**
mbed_official	381:5460fc57b6e4	7094	* @brief Returns the interrupt to enable or disable according to the
mbed_official	381:5460fc57b6e4	7095	* OC mode.
mbed_official	381:5460fc57b6e4	7096	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	7097	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	7098	* @param OCChannel: Timer output
mbed_official	381:5460fc57b6e4	7099	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	7100	* @arg HRTIM_OUTPUT_TA1: Timer A - Ouput 1
mbed_official	381:5460fc57b6e4	7101	* @arg HRTIM_OUTPUT_TA2: Timer A - Ouput 2
mbed_official	381:5460fc57b6e4	7102	* @arg HRTIM_OUTPUT_TB1: Timer B - Ouput 1
mbed_official	381:5460fc57b6e4	7103	* @arg HRTIM_OUTPUT_TB2: Timer B - Ouput 2
mbed_official	381:5460fc57b6e4	7104	* @arg HRTIM_OUTPUT_TC1: Timer C - Ouput 1
mbed_official	381:5460fc57b6e4	7105	* @arg HRTIM_OUTPUT_TC2: Timer C - Ouput 2
mbed_official	381:5460fc57b6e4	7106	* @arg HRTIM_OUTPUT_TD1: Timer D - Ouput 1
mbed_official	381:5460fc57b6e4	7107	* @arg HRTIM_OUTPUT_TD2: Timer D - Ouput 2
mbed_official	381:5460fc57b6e4	7108	* @arg HRTIM_OUTPUT_TE1: Timer E - Ouput 1
mbed_official	381:5460fc57b6e4	7109	* @arg HRTIM_OUTPUT_TE2: Timer E - Ouput 2
mbed_official	381:5460fc57b6e4	7110	* @retval Interrupt to enable or disable
mbed_official	381:5460fc57b6e4	7111	*/
mbed_official	381:5460fc57b6e4	7112	static uint32_t HRTIM_GetITFromOCMode(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	7113	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	7114	uint32_t OCChannel)
mbed_official	381:5460fc57b6e4	7115	{
mbed_official	381:5460fc57b6e4	7116	uint32_t hrtim_set;
mbed_official	381:5460fc57b6e4	7117	uint32_t hrtim_reset;
mbed_official	381:5460fc57b6e4	7118	uint32_t interrupt = 0;
mbed_official	381:5460fc57b6e4	7119
mbed_official	381:5460fc57b6e4	7120	switch (OCChannel)
mbed_official	381:5460fc57b6e4	7121	{
mbed_official	381:5460fc57b6e4	7122	case HRTIM_OUTPUT_TA1:
mbed_official	381:5460fc57b6e4	7123	case HRTIM_OUTPUT_TB1:
mbed_official	381:5460fc57b6e4	7124	case HRTIM_OUTPUT_TC1:
mbed_official	381:5460fc57b6e4	7125	case HRTIM_OUTPUT_TD1:
mbed_official	381:5460fc57b6e4	7126	case HRTIM_OUTPUT_TE1:
mbed_official	381:5460fc57b6e4	7127	{
mbed_official	381:5460fc57b6e4	7128	/* Retreives actual OC mode and set interrupt accordingly */
mbed_official	381:5460fc57b6e4	7129	hrtim_set = hhrtim->Instance->sTimerxRegs[TimerIdx].SETx1R;
mbed_official	381:5460fc57b6e4	7130	hrtim_reset = hhrtim->Instance->sTimerxRegs[TimerIdx].RSTx1R;
mbed_official	381:5460fc57b6e4	7131
mbed_official	381:5460fc57b6e4	7132	if (((hrtim_set & HRTIM_OUTPUTSET_TIMCMP1) == HRTIM_OUTPUTSET_TIMCMP1) &&
mbed_official	381:5460fc57b6e4	7133	((hrtim_reset & HRTIM_OUTPUTSET_TIMCMP1) == HRTIM_OUTPUTSET_TIMCMP1))
mbed_official	381:5460fc57b6e4	7134	{
mbed_official	381:5460fc57b6e4	7135	/* OC mode: HRTIM_BASICOCMODE_TOGGLE */
mbed_official	381:5460fc57b6e4	7136	interrupt = HRTIM_TIM_IT_CMP1;
mbed_official	381:5460fc57b6e4	7137	}
mbed_official	381:5460fc57b6e4	7138	else if (((hrtim_set & HRTIM_OUTPUTSET_TIMCMP1) == HRTIM_OUTPUTSET_TIMCMP1) &&
mbed_official	381:5460fc57b6e4	7139	(hrtim_reset == 0))
mbed_official	381:5460fc57b6e4	7140	{
mbed_official	381:5460fc57b6e4	7141	/* OC mode: HRTIM_BASICOCMODE_ACTIVE */
mbed_official	381:5460fc57b6e4	7142	interrupt = HRTIM_TIM_IT_SET1;
mbed_official	381:5460fc57b6e4	7143	}
mbed_official	381:5460fc57b6e4	7144	else if ((hrtim_set == 0) &&
mbed_official	381:5460fc57b6e4	7145	((hrtim_reset & HRTIM_OUTPUTSET_TIMCMP1) == HRTIM_OUTPUTSET_TIMCMP1))
mbed_official	381:5460fc57b6e4	7146	{
mbed_official	381:5460fc57b6e4	7147	/* OC mode: HRTIM_BASICOCMODE_INACTIVE */
mbed_official	381:5460fc57b6e4	7148	interrupt = HRTIM_TIM_IT_RST1;
mbed_official	381:5460fc57b6e4	7149	}
mbed_official	381:5460fc57b6e4	7150	}
mbed_official	381:5460fc57b6e4	7151	break;
mbed_official	381:5460fc57b6e4	7152	case HRTIM_OUTPUT_TA2:
mbed_official	381:5460fc57b6e4	7153	case HRTIM_OUTPUT_TB2:
mbed_official	381:5460fc57b6e4	7154	case HRTIM_OUTPUT_TC2:
mbed_official	381:5460fc57b6e4	7155	case HRTIM_OUTPUT_TD2:
mbed_official	381:5460fc57b6e4	7156	case HRTIM_OUTPUT_TE2:
mbed_official	381:5460fc57b6e4	7157	{
mbed_official	381:5460fc57b6e4	7158	/* Retreives actual OC mode and set interrupt accordingly */
mbed_official	381:5460fc57b6e4	7159	hrtim_set = hhrtim->Instance->sTimerxRegs[TimerIdx].SETx2R;
mbed_official	381:5460fc57b6e4	7160	hrtim_reset = hhrtim->Instance->sTimerxRegs[TimerIdx].RSTx2R;
mbed_official	381:5460fc57b6e4	7161
mbed_official	381:5460fc57b6e4	7162	if (((hrtim_set & HRTIM_OUTPUTSET_TIMCMP2) == HRTIM_OUTPUTSET_TIMCMP2) &&
mbed_official	381:5460fc57b6e4	7163	((hrtim_reset & HRTIM_OUTPUTSET_TIMCMP2) == HRTIM_OUTPUTSET_TIMCMP2))
mbed_official	381:5460fc57b6e4	7164	{
mbed_official	381:5460fc57b6e4	7165	/* OC mode: HRTIM_BASICOCMODE_TOGGLE */
mbed_official	381:5460fc57b6e4	7166	interrupt = HRTIM_TIM_IT_CMP2;
mbed_official	381:5460fc57b6e4	7167	}
mbed_official	381:5460fc57b6e4	7168	else if (((hrtim_set & HRTIM_OUTPUTSET_TIMCMP2) == HRTIM_OUTPUTSET_TIMCMP2) &&
mbed_official	381:5460fc57b6e4	7169	(hrtim_reset == 0))
mbed_official	381:5460fc57b6e4	7170	{
mbed_official	381:5460fc57b6e4	7171	/* OC mode: HRTIM_BASICOCMODE_ACTIVE */
mbed_official	381:5460fc57b6e4	7172	interrupt = HRTIM_TIM_IT_SET2;
mbed_official	381:5460fc57b6e4	7173	}
mbed_official	381:5460fc57b6e4	7174	else if ((hrtim_set == 0) &&
mbed_official	381:5460fc57b6e4	7175	((hrtim_reset & HRTIM_OUTPUTSET_TIMCMP2) == HRTIM_OUTPUTSET_TIMCMP2))
mbed_official	381:5460fc57b6e4	7176	{
mbed_official	381:5460fc57b6e4	7177	/* OC mode: HRTIM_BASICOCMODE_INACTIVE */
mbed_official	381:5460fc57b6e4	7178	interrupt = HRTIM_TIM_IT_RST2;
mbed_official	381:5460fc57b6e4	7179	}
mbed_official	381:5460fc57b6e4	7180	}
mbed_official	381:5460fc57b6e4	7181	break;
mbed_official	381:5460fc57b6e4	7182	}
mbed_official	381:5460fc57b6e4	7183
mbed_official	381:5460fc57b6e4	7184	return interrupt;
mbed_official	381:5460fc57b6e4	7185	}
mbed_official	381:5460fc57b6e4	7186
mbed_official	381:5460fc57b6e4	7187	/**
mbed_official	381:5460fc57b6e4	7188	* @brief Returns the DMA request to enable or disable according to the
mbed_official	381:5460fc57b6e4	7189	* OC mode.
mbed_official	381:5460fc57b6e4	7190	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	7191	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	7192	* @param OCChannel: Timer output
mbed_official	381:5460fc57b6e4	7193	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	7194	* @arg HRTIM_OUTPUT_TA1: Timer A - Ouput 1
mbed_official	381:5460fc57b6e4	7195	* @arg HRTIM_OUTPUT_TA2: Timer A - Ouput 2
mbed_official	381:5460fc57b6e4	7196	* @arg HRTIM_OUTPUT_TB1: Timer B - Ouput 1
mbed_official	381:5460fc57b6e4	7197	* @arg HRTIM_OUTPUT_TB2: Timer B - Ouput 2
mbed_official	381:5460fc57b6e4	7198	* @arg HRTIM_OUTPUT_TC1: Timer C - Ouput 1
mbed_official	381:5460fc57b6e4	7199	* @arg HRTIM_OUTPUT_TC2: Timer C - Ouput 2
mbed_official	381:5460fc57b6e4	7200	* @arg HRTIM_OUTPUT_TD1: Timer D - Ouput 1
mbed_official	381:5460fc57b6e4	7201	* @arg HRTIM_OUTPUT_TD2: Timer D - Ouput 2
mbed_official	381:5460fc57b6e4	7202	* @arg HRTIM_OUTPUT_TE1: Timer E - Ouput 1
mbed_official	381:5460fc57b6e4	7203	* @arg HRTIM_OUTPUT_TE2: Timer E - Ouput 2
mbed_official	381:5460fc57b6e4	7204	* @retval DMA request to enable or disable
mbed_official	381:5460fc57b6e4	7205	*/
mbed_official	381:5460fc57b6e4	7206	static uint32_t HRTIM_GetDMAFromOCMode(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	7207	uint32_t TimerIdx,
mbed_official	381:5460fc57b6e4	7208	uint32_t OCChannel)
mbed_official	381:5460fc57b6e4	7209	{
mbed_official	381:5460fc57b6e4	7210	uint32_t hrtim_set;
mbed_official	381:5460fc57b6e4	7211	uint32_t hrtim_reset;
mbed_official	381:5460fc57b6e4	7212	uint32_t dma_request = 0;
mbed_official	381:5460fc57b6e4	7213
mbed_official	381:5460fc57b6e4	7214	switch (OCChannel)
mbed_official	381:5460fc57b6e4	7215	{
mbed_official	381:5460fc57b6e4	7216	case HRTIM_OUTPUT_TA1:
mbed_official	381:5460fc57b6e4	7217	case HRTIM_OUTPUT_TB1:
mbed_official	381:5460fc57b6e4	7218	case HRTIM_OUTPUT_TC1:
mbed_official	381:5460fc57b6e4	7219	case HRTIM_OUTPUT_TD1:
mbed_official	381:5460fc57b6e4	7220	case HRTIM_OUTPUT_TE1:
mbed_official	381:5460fc57b6e4	7221	{
mbed_official	381:5460fc57b6e4	7222	/* Retreives actual OC mode and set dma_request accordingly */
mbed_official	381:5460fc57b6e4	7223	hrtim_set = hhrtim->Instance->sTimerxRegs[TimerIdx].SETx1R;
mbed_official	381:5460fc57b6e4	7224	hrtim_reset = hhrtim->Instance->sTimerxRegs[TimerIdx].RSTx1R;
mbed_official	381:5460fc57b6e4	7225
mbed_official	381:5460fc57b6e4	7226	if (((hrtim_set & HRTIM_OUTPUTSET_TIMCMP1) == HRTIM_OUTPUTSET_TIMCMP1) &&
mbed_official	381:5460fc57b6e4	7227	((hrtim_reset & HRTIM_OUTPUTSET_TIMCMP1) == HRTIM_OUTPUTSET_TIMCMP1))
mbed_official	381:5460fc57b6e4	7228	{
mbed_official	381:5460fc57b6e4	7229	/* OC mode: HRTIM_BASICOCMODE_TOGGLE */
mbed_official	381:5460fc57b6e4	7230	dma_request = HRTIM_TIM_DMA_CMP1;
mbed_official	381:5460fc57b6e4	7231	}
mbed_official	381:5460fc57b6e4	7232	else if (((hrtim_set & HRTIM_OUTPUTSET_TIMCMP1) == HRTIM_OUTPUTSET_TIMCMP1) &&
mbed_official	381:5460fc57b6e4	7233	(hrtim_reset == 0))
mbed_official	381:5460fc57b6e4	7234	{
mbed_official	381:5460fc57b6e4	7235	/* OC mode: HRTIM_BASICOCMODE_ACTIVE */
mbed_official	381:5460fc57b6e4	7236	dma_request = HRTIM_TIM_DMA_SET1;
mbed_official	381:5460fc57b6e4	7237	}
mbed_official	381:5460fc57b6e4	7238	else if ((hrtim_set == 0) &&
mbed_official	381:5460fc57b6e4	7239	((hrtim_reset & HRTIM_OUTPUTSET_TIMCMP1) == HRTIM_OUTPUTSET_TIMCMP1))
mbed_official	381:5460fc57b6e4	7240	{
mbed_official	381:5460fc57b6e4	7241	/* OC mode: HRTIM_BASICOCMODE_INACTIVE */
mbed_official	381:5460fc57b6e4	7242	dma_request = HRTIM_TIM_DMA_RST1;
mbed_official	381:5460fc57b6e4	7243	}
mbed_official	381:5460fc57b6e4	7244	}
mbed_official	381:5460fc57b6e4	7245	break;
mbed_official	381:5460fc57b6e4	7246	case HRTIM_OUTPUT_TA2:
mbed_official	381:5460fc57b6e4	7247	case HRTIM_OUTPUT_TB2:
mbed_official	381:5460fc57b6e4	7248	case HRTIM_OUTPUT_TC2:
mbed_official	381:5460fc57b6e4	7249	case HRTIM_OUTPUT_TD2:
mbed_official	381:5460fc57b6e4	7250	case HRTIM_OUTPUT_TE2:
mbed_official	381:5460fc57b6e4	7251	{
mbed_official	381:5460fc57b6e4	7252	/* Retreives actual OC mode and set dma_request accordingly */
mbed_official	381:5460fc57b6e4	7253	hrtim_set = hhrtim->Instance->sTimerxRegs[TimerIdx].SETx2R;
mbed_official	381:5460fc57b6e4	7254	hrtim_reset = hhrtim->Instance->sTimerxRegs[TimerIdx].RSTx2R;
mbed_official	381:5460fc57b6e4	7255
mbed_official	381:5460fc57b6e4	7256	if (((hrtim_set & HRTIM_OUTPUTSET_TIMCMP2) == HRTIM_OUTPUTSET_TIMCMP2) &&
mbed_official	381:5460fc57b6e4	7257	((hrtim_reset & HRTIM_OUTPUTSET_TIMCMP2) == HRTIM_OUTPUTSET_TIMCMP2))
mbed_official	381:5460fc57b6e4	7258	{
mbed_official	381:5460fc57b6e4	7259	/* OC mode: HRTIM_BASICOCMODE_TOGGLE */
mbed_official	381:5460fc57b6e4	7260	dma_request = HRTIM_TIM_DMA_CMP2;
mbed_official	381:5460fc57b6e4	7261	}
mbed_official	381:5460fc57b6e4	7262	else if (((hrtim_set & HRTIM_OUTPUTSET_TIMCMP2) == HRTIM_OUTPUTSET_TIMCMP2) &&
mbed_official	381:5460fc57b6e4	7263	(hrtim_reset == 0))
mbed_official	381:5460fc57b6e4	7264	{
mbed_official	381:5460fc57b6e4	7265	/* OC mode: HRTIM_BASICOCMODE_ACTIVE */
mbed_official	381:5460fc57b6e4	7266	dma_request = HRTIM_TIM_DMA_SET2;
mbed_official	381:5460fc57b6e4	7267	}
mbed_official	381:5460fc57b6e4	7268	else if ((hrtim_set == 0) &&
mbed_official	381:5460fc57b6e4	7269	((hrtim_reset & HRTIM_OUTPUTSET_TIMCMP2) == HRTIM_OUTPUTSET_TIMCMP2))
mbed_official	381:5460fc57b6e4	7270	{
mbed_official	381:5460fc57b6e4	7271	/* OC mode: HRTIM_BASICOCMODE_INACTIVE */
mbed_official	381:5460fc57b6e4	7272	dma_request = HRTIM_TIM_DMA_RST2;
mbed_official	381:5460fc57b6e4	7273	}
mbed_official	381:5460fc57b6e4	7274	}
mbed_official	381:5460fc57b6e4	7275	break;
mbed_official	381:5460fc57b6e4	7276	}
mbed_official	381:5460fc57b6e4	7277
mbed_official	381:5460fc57b6e4	7278	return dma_request;
mbed_official	381:5460fc57b6e4	7279	}
mbed_official	381:5460fc57b6e4	7280
mbed_official	381:5460fc57b6e4	7281	static DMA_HandleTypeDef * HRTIM_GetDMAHandleFromTimerIdx(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	7282	uint32_t TimerIdx)
mbed_official	381:5460fc57b6e4	7283	{
mbed_official	381:5460fc57b6e4	7284	DMA_HandleTypeDef * hdma = (DMA_HandleTypeDef *)HAL_NULL;
mbed_official	381:5460fc57b6e4	7285
mbed_official	381:5460fc57b6e4	7286	switch (TimerIdx)
mbed_official	381:5460fc57b6e4	7287	{
mbed_official	381:5460fc57b6e4	7288	case HRTIM_TIMERINDEX_MASTER:
mbed_official	381:5460fc57b6e4	7289	{
mbed_official	381:5460fc57b6e4	7290	hdma = hhrtim->hdmaMaster;
mbed_official	381:5460fc57b6e4	7291	}
mbed_official	381:5460fc57b6e4	7292	break;
mbed_official	381:5460fc57b6e4	7293	case HRTIM_TIMERINDEX_TIMER_A:
mbed_official	381:5460fc57b6e4	7294	{
mbed_official	381:5460fc57b6e4	7295	hdma = hhrtim->hdmaTimerA;
mbed_official	381:5460fc57b6e4	7296	}
mbed_official	381:5460fc57b6e4	7297	break;
mbed_official	381:5460fc57b6e4	7298	case HRTIM_TIMERINDEX_TIMER_B:
mbed_official	381:5460fc57b6e4	7299	{
mbed_official	381:5460fc57b6e4	7300	hdma = hhrtim->hdmaTimerB;
mbed_official	381:5460fc57b6e4	7301	}
mbed_official	381:5460fc57b6e4	7302	break;
mbed_official	381:5460fc57b6e4	7303	case HRTIM_TIMERINDEX_TIMER_C:
mbed_official	381:5460fc57b6e4	7304	{
mbed_official	381:5460fc57b6e4	7305	hdma = hhrtim->hdmaTimerC;
mbed_official	381:5460fc57b6e4	7306	}
mbed_official	381:5460fc57b6e4	7307	break;
mbed_official	381:5460fc57b6e4	7308	case HRTIM_TIMERINDEX_TIMER_D:
mbed_official	381:5460fc57b6e4	7309	{
mbed_official	381:5460fc57b6e4	7310	hdma = hhrtim->hdmaTimerD;
mbed_official	381:5460fc57b6e4	7311	}
mbed_official	381:5460fc57b6e4	7312	break;
mbed_official	381:5460fc57b6e4	7313	case HRTIM_TIMERINDEX_TIMER_E:
mbed_official	381:5460fc57b6e4	7314	{
mbed_official	381:5460fc57b6e4	7315	hdma = hhrtim->hdmaTimerE;
mbed_official	381:5460fc57b6e4	7316	}
mbed_official	381:5460fc57b6e4	7317	break;
mbed_official	381:5460fc57b6e4	7318	}
mbed_official	381:5460fc57b6e4	7319
mbed_official	381:5460fc57b6e4	7320	return hdma;
mbed_official	381:5460fc57b6e4	7321	}
mbed_official	381:5460fc57b6e4	7322
mbed_official	381:5460fc57b6e4	7323	static uint32_t GetTimerIdxFromDMAHandle(DMA_HandleTypeDef *hdma)
mbed_official	381:5460fc57b6e4	7324	{
mbed_official	381:5460fc57b6e4	7325	uint32_t timed_idx = 0xFFFFFFFF;
mbed_official	381:5460fc57b6e4	7326
mbed_official	381:5460fc57b6e4	7327	if (hdma->Instance == DMA1_Channel2)
mbed_official	381:5460fc57b6e4	7328	{
mbed_official	381:5460fc57b6e4	7329	timed_idx = HRTIM_TIMERINDEX_MASTER;
mbed_official	381:5460fc57b6e4	7330	}
mbed_official	381:5460fc57b6e4	7331	else if (hdma->Instance == DMA1_Channel3)
mbed_official	381:5460fc57b6e4	7332	{
mbed_official	381:5460fc57b6e4	7333	timed_idx = HRTIM_TIMERINDEX_TIMER_A;
mbed_official	381:5460fc57b6e4	7334	}
mbed_official	381:5460fc57b6e4	7335	else if (hdma->Instance == DMA1_Channel4)
mbed_official	381:5460fc57b6e4	7336	{
mbed_official	381:5460fc57b6e4	7337	timed_idx = HRTIM_TIMERINDEX_TIMER_B;
mbed_official	381:5460fc57b6e4	7338	}
mbed_official	381:5460fc57b6e4	7339	else if (hdma->Instance == DMA1_Channel5)
mbed_official	381:5460fc57b6e4	7340	{
mbed_official	381:5460fc57b6e4	7341	timed_idx = HRTIM_TIMERINDEX_TIMER_C;
mbed_official	381:5460fc57b6e4	7342	}
mbed_official	381:5460fc57b6e4	7343	else if (hdma->Instance == DMA1_Channel6)
mbed_official	381:5460fc57b6e4	7344	{
mbed_official	381:5460fc57b6e4	7345	timed_idx = HRTIM_TIMERINDEX_TIMER_D;
mbed_official	381:5460fc57b6e4	7346	}
mbed_official	381:5460fc57b6e4	7347	else if (hdma->Instance == DMA1_Channel7)
mbed_official	381:5460fc57b6e4	7348	{
mbed_official	381:5460fc57b6e4	7349	timed_idx = HRTIM_TIMERINDEX_TIMER_E;
mbed_official	381:5460fc57b6e4	7350	}
mbed_official	381:5460fc57b6e4	7351
mbed_official	381:5460fc57b6e4	7352	return timed_idx;
mbed_official	381:5460fc57b6e4	7353	}
mbed_official	381:5460fc57b6e4	7354
mbed_official	381:5460fc57b6e4	7355	/**
mbed_official	381:5460fc57b6e4	7356	* @brief Forces an immediate transfer from the preload to the active
mbed_official	381:5460fc57b6e4	7357	* registers.
mbed_official	381:5460fc57b6e4	7358	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	7359	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	7360	* @retval None
mbed_official	381:5460fc57b6e4	7361	*/
mbed_official	381:5460fc57b6e4	7362	static void HRTIM_ForceRegistersUpdate(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	7363	uint32_t TimerIdx)
mbed_official	381:5460fc57b6e4	7364	{
mbed_official	381:5460fc57b6e4	7365	switch (TimerIdx)
mbed_official	381:5460fc57b6e4	7366	{
mbed_official	381:5460fc57b6e4	7367	case HRTIM_TIMERINDEX_MASTER:
mbed_official	381:5460fc57b6e4	7368	{
mbed_official	381:5460fc57b6e4	7369	hhrtim->Instance->sCommonRegs.CR2 \|= HRTIM_CR2_MSWU;
mbed_official	381:5460fc57b6e4	7370	}
mbed_official	381:5460fc57b6e4	7371	break;
mbed_official	381:5460fc57b6e4	7372	case HRTIM_TIMERINDEX_TIMER_A:
mbed_official	381:5460fc57b6e4	7373	{
mbed_official	381:5460fc57b6e4	7374	hhrtim->Instance->sCommonRegs.CR2 \|= HRTIM_CR2_TASWU;
mbed_official	381:5460fc57b6e4	7375	}
mbed_official	381:5460fc57b6e4	7376	break;
mbed_official	381:5460fc57b6e4	7377	case HRTIM_TIMERINDEX_TIMER_B:
mbed_official	381:5460fc57b6e4	7378	{
mbed_official	381:5460fc57b6e4	7379	hhrtim->Instance->sCommonRegs.CR2 \|= HRTIM_CR2_TBSWU;
mbed_official	381:5460fc57b6e4	7380	}
mbed_official	381:5460fc57b6e4	7381	break;
mbed_official	381:5460fc57b6e4	7382	case HRTIM_TIMERINDEX_TIMER_C:
mbed_official	381:5460fc57b6e4	7383	{
mbed_official	381:5460fc57b6e4	7384	hhrtim->Instance->sCommonRegs.CR2 \|= HRTIM_CR2_TCSWU;
mbed_official	381:5460fc57b6e4	7385	}
mbed_official	381:5460fc57b6e4	7386	break;
mbed_official	381:5460fc57b6e4	7387	case HRTIM_TIMERINDEX_TIMER_D:
mbed_official	381:5460fc57b6e4	7388	{
mbed_official	381:5460fc57b6e4	7389	hhrtim->Instance->sCommonRegs.CR2 \|= HRTIM_CR2_TDSWU;
mbed_official	381:5460fc57b6e4	7390	}
mbed_official	381:5460fc57b6e4	7391	break;
mbed_official	381:5460fc57b6e4	7392	case HRTIM_TIMERINDEX_TIMER_E:
mbed_official	381:5460fc57b6e4	7393	{
mbed_official	381:5460fc57b6e4	7394	hhrtim->Instance->sCommonRegs.CR2 \|= HRTIM_CR2_TESWU;
mbed_official	381:5460fc57b6e4	7395	}
mbed_official	381:5460fc57b6e4	7396	break;
mbed_official	381:5460fc57b6e4	7397	}
mbed_official	381:5460fc57b6e4	7398	}
mbed_official	381:5460fc57b6e4	7399
mbed_official	381:5460fc57b6e4	7400
mbed_official	381:5460fc57b6e4	7401	/**
mbed_official	381:5460fc57b6e4	7402	* @brief HRTIM interrupts service routine
mbed_official	381:5460fc57b6e4	7403	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	7404	* @retval None
mbed_official	381:5460fc57b6e4	7405	*/
mbed_official	381:5460fc57b6e4	7406	static void HRTIM_HRTIM_ISR(HRTIM_HandleTypeDef * hhrtim)
mbed_official	381:5460fc57b6e4	7407	{
mbed_official	381:5460fc57b6e4	7408	/* Fault 1 event */
mbed_official	381:5460fc57b6e4	7409	if(__HAL_HRTIM_GET_FLAG(hhrtim, HRTIM_FLAG_FLT1) != RESET)
mbed_official	381:5460fc57b6e4	7410	{
mbed_official	381:5460fc57b6e4	7411	if(__HAL_HRTIM_GET_ITSTATUS(hhrtim, HRTIM_IT_FLT1) != RESET)
mbed_official	381:5460fc57b6e4	7412	{
mbed_official	381:5460fc57b6e4	7413	__HAL_HRTIM_CLEAR_IT(hhrtim, HRTIM_IT_FLT1);
mbed_official	381:5460fc57b6e4	7414
mbed_official	381:5460fc57b6e4	7415	/* Invoke Fault 1 event callback */
mbed_official	381:5460fc57b6e4	7416	HAL_HRTIM_Fault1Callback(hhrtim);
mbed_official	381:5460fc57b6e4	7417	}
mbed_official	381:5460fc57b6e4	7418	}
mbed_official	381:5460fc57b6e4	7419
mbed_official	381:5460fc57b6e4	7420	/* Fault 2 event */
mbed_official	381:5460fc57b6e4	7421	if(__HAL_HRTIM_GET_FLAG(hhrtim, HRTIM_FLAG_FLT2) != RESET)
mbed_official	381:5460fc57b6e4	7422	{
mbed_official	381:5460fc57b6e4	7423	if(__HAL_HRTIM_GET_ITSTATUS(hhrtim, HRTIM_IT_FLT2) != RESET)
mbed_official	381:5460fc57b6e4	7424	{
mbed_official	381:5460fc57b6e4	7425	__HAL_HRTIM_CLEAR_IT(hhrtim, HRTIM_IT_FLT2);
mbed_official	381:5460fc57b6e4	7426
mbed_official	381:5460fc57b6e4	7427	/* Invoke Fault 2 event callback */
mbed_official	381:5460fc57b6e4	7428	HAL_HRTIM_Fault2Callback(hhrtim);
mbed_official	381:5460fc57b6e4	7429	}
mbed_official	381:5460fc57b6e4	7430	}
mbed_official	381:5460fc57b6e4	7431
mbed_official	381:5460fc57b6e4	7432	/* Fault 3 event */
mbed_official	381:5460fc57b6e4	7433	if(__HAL_HRTIM_GET_FLAG(hhrtim, HRTIM_FLAG_FLT3) != RESET)
mbed_official	381:5460fc57b6e4	7434	{
mbed_official	381:5460fc57b6e4	7435	if(__HAL_HRTIM_GET_ITSTATUS(hhrtim, HRTIM_IT_FLT3) != RESET)
mbed_official	381:5460fc57b6e4	7436	{
mbed_official	381:5460fc57b6e4	7437	__HAL_HRTIM_CLEAR_IT(hhrtim, HRTIM_IT_FLT3);
mbed_official	381:5460fc57b6e4	7438
mbed_official	381:5460fc57b6e4	7439	/* Invoke Fault 3 event callback */
mbed_official	381:5460fc57b6e4	7440	HAL_HRTIM_Fault3Callback(hhrtim);
mbed_official	381:5460fc57b6e4	7441	}
mbed_official	381:5460fc57b6e4	7442	}
mbed_official	381:5460fc57b6e4	7443
mbed_official	381:5460fc57b6e4	7444	/* Fault 4 event */
mbed_official	381:5460fc57b6e4	7445	if(__HAL_HRTIM_GET_FLAG(hhrtim, HRTIM_FLAG_FLT4) != RESET)
mbed_official	381:5460fc57b6e4	7446	{
mbed_official	381:5460fc57b6e4	7447	if(__HAL_HRTIM_GET_ITSTATUS(hhrtim, HRTIM_IT_FLT4) != RESET)
mbed_official	381:5460fc57b6e4	7448	{
mbed_official	381:5460fc57b6e4	7449	__HAL_HRTIM_CLEAR_IT(hhrtim, HRTIM_IT_FLT4);
mbed_official	381:5460fc57b6e4	7450
mbed_official	381:5460fc57b6e4	7451	/* Invoke Fault 4 event callback */
mbed_official	381:5460fc57b6e4	7452	HAL_HRTIM_Fault4Callback(hhrtim);
mbed_official	381:5460fc57b6e4	7453	}
mbed_official	381:5460fc57b6e4	7454	}
mbed_official	381:5460fc57b6e4	7455
mbed_official	381:5460fc57b6e4	7456	/* Fault 5 event */
mbed_official	381:5460fc57b6e4	7457	if(__HAL_HRTIM_GET_FLAG(hhrtim, HRTIM_FLAG_FLT5) != RESET)
mbed_official	381:5460fc57b6e4	7458	{
mbed_official	381:5460fc57b6e4	7459	if(__HAL_HRTIM_GET_ITSTATUS(hhrtim, HRTIM_IT_FLT5) != RESET)
mbed_official	381:5460fc57b6e4	7460	{
mbed_official	381:5460fc57b6e4	7461	__HAL_HRTIM_CLEAR_IT(hhrtim, HRTIM_IT_FLT5);
mbed_official	381:5460fc57b6e4	7462
mbed_official	381:5460fc57b6e4	7463	/* Invoke Fault 5 event callback */
mbed_official	381:5460fc57b6e4	7464	HAL_HRTIM_Fault5Callback(hhrtim);
mbed_official	381:5460fc57b6e4	7465	}
mbed_official	381:5460fc57b6e4	7466	}
mbed_official	381:5460fc57b6e4	7467
mbed_official	381:5460fc57b6e4	7468	/* System fault event */
mbed_official	381:5460fc57b6e4	7469	if(__HAL_HRTIM_GET_FLAG(hhrtim, HRTIM_FLAG_SYSFLT) != RESET)
mbed_official	381:5460fc57b6e4	7470	{
mbed_official	381:5460fc57b6e4	7471	if(__HAL_HRTIM_GET_ITSTATUS(hhrtim, HRTIM_IT_SYSFLT) != RESET)
mbed_official	381:5460fc57b6e4	7472	{
mbed_official	381:5460fc57b6e4	7473	__HAL_HRTIM_CLEAR_IT(hhrtim, HRTIM_IT_SYSFLT);
mbed_official	381:5460fc57b6e4	7474
mbed_official	381:5460fc57b6e4	7475	/* Invoke System fault event callback */
mbed_official	381:5460fc57b6e4	7476	HAL_HRTIM_SystemFaultCallback(hhrtim);
mbed_official	381:5460fc57b6e4	7477	}
mbed_official	381:5460fc57b6e4	7478	}
mbed_official	381:5460fc57b6e4	7479	}
mbed_official	381:5460fc57b6e4	7480
mbed_official	381:5460fc57b6e4	7481	/**
mbed_official	381:5460fc57b6e4	7482	* @brief Master timer interrupts service routine
mbed_official	381:5460fc57b6e4	7483	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	7484	* @retval None
mbed_official	381:5460fc57b6e4	7485	*/
mbed_official	381:5460fc57b6e4	7486	static void HRTIM_Master_ISR(HRTIM_HandleTypeDef * hhrtim)
mbed_official	381:5460fc57b6e4	7487	{
mbed_official	381:5460fc57b6e4	7488	/* DLL calibration ready event */
mbed_official	381:5460fc57b6e4	7489	if(__HAL_HRTIM_GET_FLAG(hhrtim, HRTIM_FLAG_DLLRDY) != RESET)
mbed_official	381:5460fc57b6e4	7490	{
mbed_official	381:5460fc57b6e4	7491	if(__HAL_HRTIM_GET_ITSTATUS(hhrtim, HRTIM_IT_DLLRDY) != RESET)
mbed_official	381:5460fc57b6e4	7492	{
mbed_official	381:5460fc57b6e4	7493	__HAL_HRTIM_CLEAR_IT(hhrtim, HRTIM_IT_DLLRDY);
mbed_official	381:5460fc57b6e4	7494
mbed_official	381:5460fc57b6e4	7495	/* Set HRTIM State */
mbed_official	381:5460fc57b6e4	7496	hhrtim->State = HAL_HRTIM_STATE_READY;
mbed_official	381:5460fc57b6e4	7497
mbed_official	381:5460fc57b6e4	7498	/* Process unlocked */
mbed_official	381:5460fc57b6e4	7499	__HAL_UNLOCK(hhrtim);
mbed_official	381:5460fc57b6e4	7500
mbed_official	381:5460fc57b6e4	7501	/* Invoke System fault event callback */
mbed_official	381:5460fc57b6e4	7502	HAL_HRTIM_DLLCalbrationReadyCallback(hhrtim);
mbed_official	381:5460fc57b6e4	7503	}
mbed_official	381:5460fc57b6e4	7504	}
mbed_official	381:5460fc57b6e4	7505
mbed_official	381:5460fc57b6e4	7506	/* Burst mode period event */
mbed_official	381:5460fc57b6e4	7507	if(__HAL_HRTIM_GET_FLAG(hhrtim, HRTIM_FLAG_BMPER) != RESET)
mbed_official	381:5460fc57b6e4	7508	{
mbed_official	381:5460fc57b6e4	7509	if(__HAL_HRTIM_GET_ITSTATUS(hhrtim, HRTIM_IT_BMPER) != RESET)
mbed_official	381:5460fc57b6e4	7510	{
mbed_official	381:5460fc57b6e4	7511	__HAL_HRTIM_CLEAR_IT(hhrtim, HRTIM_IT_BMPER);
mbed_official	381:5460fc57b6e4	7512
mbed_official	381:5460fc57b6e4	7513	/* Invoke Burst mode period event callback */
mbed_official	381:5460fc57b6e4	7514	HAL_HRTIM_BurstModePeriodCallback(hhrtim);
mbed_official	381:5460fc57b6e4	7515	}
mbed_official	381:5460fc57b6e4	7516	}
mbed_official	381:5460fc57b6e4	7517
mbed_official	381:5460fc57b6e4	7518	/* Master timer compare 1 event */
mbed_official	381:5460fc57b6e4	7519	if(__HAL_HRTIM_MASTER_GET_FLAG(hhrtim, HRTIM_MASTER_FLAG_MCMP1) != RESET)
mbed_official	381:5460fc57b6e4	7520	{
mbed_official	381:5460fc57b6e4	7521	if(__HAL_HRTIM_MASTER_GET_ITSTATUS(hhrtim, HRTIM_MASTER_IT_MCMP1) != RESET)
mbed_official	381:5460fc57b6e4	7522	{
mbed_official	381:5460fc57b6e4	7523	__HAL_HRTIM_MASTER_CLEAR_IT(hhrtim, HRTIM_MASTER_IT_MCMP1);
mbed_official	381:5460fc57b6e4	7524
mbed_official	381:5460fc57b6e4	7525	/* Invoke compare 1 event callback */
mbed_official	381:5460fc57b6e4	7526	HAL_HRTIM_Compare1EventCallback(hhrtim, HRTIM_TIMERINDEX_MASTER);
mbed_official	381:5460fc57b6e4	7527	}
mbed_official	381:5460fc57b6e4	7528	}
mbed_official	381:5460fc57b6e4	7529
mbed_official	381:5460fc57b6e4	7530	/* Master timer compare 2 event */
mbed_official	381:5460fc57b6e4	7531	if(__HAL_HRTIM_MASTER_GET_FLAG(hhrtim, HRTIM_MASTER_FLAG_MCMP2) != RESET)
mbed_official	381:5460fc57b6e4	7532	{
mbed_official	381:5460fc57b6e4	7533	if(__HAL_HRTIM_MASTER_GET_ITSTATUS(hhrtim, HRTIM_MASTER_IT_MCMP2) != RESET)
mbed_official	381:5460fc57b6e4	7534	{
mbed_official	381:5460fc57b6e4	7535	__HAL_HRTIM_MASTER_CLEAR_IT(hhrtim, HRTIM_MASTER_IT_MCMP2);
mbed_official	381:5460fc57b6e4	7536
mbed_official	381:5460fc57b6e4	7537	/* Invoke compare 2 event callback */
mbed_official	381:5460fc57b6e4	7538	HAL_HRTIM_Compare2EventCallback(hhrtim, HRTIM_TIMERINDEX_MASTER);
mbed_official	381:5460fc57b6e4	7539	}
mbed_official	381:5460fc57b6e4	7540	}
mbed_official	381:5460fc57b6e4	7541
mbed_official	381:5460fc57b6e4	7542	/* Master timer compare 3 event */
mbed_official	381:5460fc57b6e4	7543	if(__HAL_HRTIM_MASTER_GET_FLAG(hhrtim, HRTIM_MASTER_FLAG_MCMP3) != RESET)
mbed_official	381:5460fc57b6e4	7544	{
mbed_official	381:5460fc57b6e4	7545	if(__HAL_HRTIM_MASTER_GET_ITSTATUS(hhrtim, HRTIM_MASTER_IT_MCMP3) != RESET)
mbed_official	381:5460fc57b6e4	7546	{
mbed_official	381:5460fc57b6e4	7547	__HAL_HRTIM_MASTER_CLEAR_IT(hhrtim, HRTIM_MASTER_IT_MCMP3);
mbed_official	381:5460fc57b6e4	7548
mbed_official	381:5460fc57b6e4	7549	/* Invoke compare 3 event callback */
mbed_official	381:5460fc57b6e4	7550	HAL_HRTIM_Compare3EventCallback(hhrtim, HRTIM_TIMERINDEX_MASTER);
mbed_official	381:5460fc57b6e4	7551	}
mbed_official	381:5460fc57b6e4	7552	}
mbed_official	381:5460fc57b6e4	7553
mbed_official	381:5460fc57b6e4	7554	/* Master timer compare 4 event */
mbed_official	381:5460fc57b6e4	7555	if(__HAL_HRTIM_MASTER_GET_FLAG(hhrtim, HRTIM_MASTER_FLAG_MCMP4) != RESET)
mbed_official	381:5460fc57b6e4	7556	{
mbed_official	381:5460fc57b6e4	7557	if(__HAL_HRTIM_MASTER_GET_ITSTATUS(hhrtim, HRTIM_MASTER_IT_MCMP4) != RESET)
mbed_official	381:5460fc57b6e4	7558	{
mbed_official	381:5460fc57b6e4	7559	__HAL_HRTIM_MASTER_CLEAR_IT(hhrtim, HRTIM_MASTER_IT_MCMP4);
mbed_official	381:5460fc57b6e4	7560
mbed_official	381:5460fc57b6e4	7561	/* Invoke compare 4 event callback */
mbed_official	381:5460fc57b6e4	7562	HAL_HRTIM_Compare4EventCallback(hhrtim, HRTIM_TIMERINDEX_MASTER);
mbed_official	381:5460fc57b6e4	7563	}
mbed_official	381:5460fc57b6e4	7564	}
mbed_official	381:5460fc57b6e4	7565
mbed_official	381:5460fc57b6e4	7566	/* Master timer repetition event */
mbed_official	381:5460fc57b6e4	7567	if(__HAL_HRTIM_MASTER_GET_FLAG(hhrtim, HRTIM_MASTER_FLAG_MREP) != RESET)
mbed_official	381:5460fc57b6e4	7568	{
mbed_official	381:5460fc57b6e4	7569	if(__HAL_HRTIM_MASTER_GET_ITSTATUS(hhrtim, HRTIM_MASTER_IT_MREP) != RESET)
mbed_official	381:5460fc57b6e4	7570	{
mbed_official	381:5460fc57b6e4	7571	__HAL_HRTIM_MASTER_CLEAR_IT(hhrtim, HRTIM_MASTER_IT_MREP);
mbed_official	381:5460fc57b6e4	7572
mbed_official	381:5460fc57b6e4	7573	/* Invoke repetition event callback */
mbed_official	381:5460fc57b6e4	7574	HAL_HRTIM_RepetitionEventCallback(hhrtim, HRTIM_TIMERINDEX_MASTER);
mbed_official	381:5460fc57b6e4	7575	}
mbed_official	381:5460fc57b6e4	7576	}
mbed_official	381:5460fc57b6e4	7577
mbed_official	381:5460fc57b6e4	7578	/* Synchronization input event */
mbed_official	381:5460fc57b6e4	7579	if(__HAL_HRTIM_MASTER_GET_FLAG(hhrtim, HRTIM_MASTER_FLAG_SYNC) != RESET)
mbed_official	381:5460fc57b6e4	7580	{
mbed_official	381:5460fc57b6e4	7581	if(__HAL_HRTIM_MASTER_GET_ITSTATUS(hhrtim, HRTIM_MASTER_IT_SYNC) != RESET)
mbed_official	381:5460fc57b6e4	7582	{
mbed_official	381:5460fc57b6e4	7583	__HAL_HRTIM_MASTER_CLEAR_IT(hhrtim, HRTIM_MASTER_IT_SYNC);
mbed_official	381:5460fc57b6e4	7584
mbed_official	381:5460fc57b6e4	7585	/* Invoke synchronization event callback */
mbed_official	381:5460fc57b6e4	7586	HAL_HRTIM_SynchronizationEventCallback(hhrtim);
mbed_official	381:5460fc57b6e4	7587	}
mbed_official	381:5460fc57b6e4	7588	}
mbed_official	381:5460fc57b6e4	7589
mbed_official	381:5460fc57b6e4	7590	/* Master timer registers update event */
mbed_official	381:5460fc57b6e4	7591	if(__HAL_HRTIM_MASTER_GET_FLAG(hhrtim, HRTIM_MASTER_FLAG_MUPD) != RESET)
mbed_official	381:5460fc57b6e4	7592	{
mbed_official	381:5460fc57b6e4	7593	if(__HAL_HRTIM_MASTER_GET_ITSTATUS(hhrtim, HRTIM_MASTER_IT_MUPD) != RESET)
mbed_official	381:5460fc57b6e4	7594	{
mbed_official	381:5460fc57b6e4	7595	__HAL_HRTIM_MASTER_CLEAR_IT(hhrtim, HRTIM_MASTER_IT_MUPD);
mbed_official	381:5460fc57b6e4	7596
mbed_official	381:5460fc57b6e4	7597	/* Invoke registers update event callback */
mbed_official	381:5460fc57b6e4	7598	HAL_HRTIM_RegistersUpdateCallback(hhrtim, HRTIM_TIMERINDEX_MASTER);
mbed_official	381:5460fc57b6e4	7599	}
mbed_official	381:5460fc57b6e4	7600	}
mbed_official	381:5460fc57b6e4	7601	}
mbed_official	381:5460fc57b6e4	7602
mbed_official	381:5460fc57b6e4	7603	/**
mbed_official	381:5460fc57b6e4	7604	* @brief Timer interrupts service routine
mbed_official	381:5460fc57b6e4	7605	* @param hhrtim: pointer to HAL HRTIM handle
mbed_official	381:5460fc57b6e4	7606	* @param TimerIdx: Timer index
mbed_official	381:5460fc57b6e4	7607	* This parameter can be one of the following values:
mbed_official	381:5460fc57b6e4	7608	* @arg HRTIM_TIMERINDEX_TIMER_A for timer A
mbed_official	381:5460fc57b6e4	7609	* @arg HRTIM_TIMERINDEX_TIMER_B for timer B
mbed_official	381:5460fc57b6e4	7610	* @arg HRTIM_TIMERINDEX_TIMER_C for timer C
mbed_official	381:5460fc57b6e4	7611	* @arg HRTIM_TIMERINDEX_TIMER_D for timer D
mbed_official	381:5460fc57b6e4	7612	* @arg HRTIM_TIMERINDEX_TIMER_E for timer E
mbed_official	381:5460fc57b6e4	7613	* @retval None
mbed_official	381:5460fc57b6e4	7614	*/
mbed_official	381:5460fc57b6e4	7615	static void HRTIM_Timer_ISR(HRTIM_HandleTypeDef * hhrtim,
mbed_official	381:5460fc57b6e4	7616	uint32_t TimerIdx)
mbed_official	381:5460fc57b6e4	7617	{
mbed_official	381:5460fc57b6e4	7618	/* Timer compare 1 event */
mbed_official	381:5460fc57b6e4	7619	if(__HAL_HRTIM_TIMER_GET_FLAG(hhrtim, TimerIdx, HRTIM_TIM_FLAG_CMP1) != RESET)
mbed_official	381:5460fc57b6e4	7620	{
mbed_official	381:5460fc57b6e4	7621	if(__HAL_HRTIM_TIMER_GET_ITSTATUS(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP1) != RESET)
mbed_official	381:5460fc57b6e4	7622	{
mbed_official	381:5460fc57b6e4	7623	__HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP1);
mbed_official	381:5460fc57b6e4	7624
mbed_official	381:5460fc57b6e4	7625	/* Invoke compare 1 event callback */
mbed_official	381:5460fc57b6e4	7626	HAL_HRTIM_Compare1EventCallback(hhrtim, TimerIdx);
mbed_official	381:5460fc57b6e4	7627	}
mbed_official	381:5460fc57b6e4	7628	}
mbed_official	381:5460fc57b6e4	7629
mbed_official	381:5460fc57b6e4	7630	/* Timer compare 2 event */
mbed_official	381:5460fc57b6e4	7631	if(__HAL_HRTIM_TIMER_GET_FLAG(hhrtim, TimerIdx, HRTIM_TIM_FLAG_CMP2) != RESET)
mbed_official	381:5460fc57b6e4	7632	{
mbed_official	381:5460fc57b6e4	7633	if(__HAL_HRTIM_TIMER_GET_ITSTATUS(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP2) != RESET)
mbed_official	381:5460fc57b6e4	7634	{
mbed_official	381:5460fc57b6e4	7635	__HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP2);
mbed_official	381:5460fc57b6e4	7636
mbed_official	381:5460fc57b6e4	7637	/* Invoke compare 2 event callback */
mbed_official	381:5460fc57b6e4	7638	HAL_HRTIM_Compare2EventCallback(hhrtim, TimerIdx);
mbed_official	381:5460fc57b6e4	7639	}
mbed_official	381:5460fc57b6e4	7640	}
mbed_official	381:5460fc57b6e4	7641
mbed_official	381:5460fc57b6e4	7642	/* Timer compare 3 event */
mbed_official	381:5460fc57b6e4	7643	if(__HAL_HRTIM_TIMER_GET_FLAG(hhrtim, TimerIdx, HRTIM_TIM_FLAG_CMP3) != RESET)
mbed_official	381:5460fc57b6e4	7644	{
mbed_official	381:5460fc57b6e4	7645	if(__HAL_HRTIM_TIMER_GET_ITSTATUS(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP3) != RESET)
mbed_official	381:5460fc57b6e4	7646	{
mbed_official	381:5460fc57b6e4	7647	__HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP3);
mbed_official	381:5460fc57b6e4	7648
mbed_official	381:5460fc57b6e4	7649	/* Invoke compare 3 event callback */
mbed_official	381:5460fc57b6e4	7650	HAL_HRTIM_Compare3EventCallback(hhrtim, TimerIdx);
mbed_official	381:5460fc57b6e4	7651	}
mbed_official	381:5460fc57b6e4	7652	}
mbed_official	381:5460fc57b6e4	7653
mbed_official	381:5460fc57b6e4	7654	/* Timer compare 4 event */
mbed_official	381:5460fc57b6e4	7655	if(__HAL_HRTIM_TIMER_GET_FLAG(hhrtim, TimerIdx, HRTIM_TIM_FLAG_CMP4) != RESET)
mbed_official	381:5460fc57b6e4	7656	{
mbed_official	381:5460fc57b6e4	7657	if(__HAL_HRTIM_TIMER_GET_ITSTATUS(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP4) != RESET)
mbed_official	381:5460fc57b6e4	7658	{
mbed_official	381:5460fc57b6e4	7659	__HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CMP4);
mbed_official	381:5460fc57b6e4	7660
mbed_official	381:5460fc57b6e4	7661	/* Invoke compare 4 event callback */
mbed_official	381:5460fc57b6e4	7662	HAL_HRTIM_Compare4EventCallback(hhrtim, TimerIdx);
mbed_official	381:5460fc57b6e4	7663	}
mbed_official	381:5460fc57b6e4	7664	}
mbed_official	381:5460fc57b6e4	7665
mbed_official	381:5460fc57b6e4	7666	/* Timer repetition event */
mbed_official	381:5460fc57b6e4	7667	if(__HAL_HRTIM_TIMER_GET_FLAG(hhrtim, TimerIdx, HRTIM_TIM_FLAG_REP) != RESET)
mbed_official	381:5460fc57b6e4	7668	{
mbed_official	381:5460fc57b6e4	7669	if(__HAL_HRTIM_TIMER_GET_ITSTATUS(hhrtim, TimerIdx, HRTIM_TIM_IT_REP) != RESET)
mbed_official	381:5460fc57b6e4	7670	{
mbed_official	381:5460fc57b6e4	7671	__HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_REP);
mbed_official	381:5460fc57b6e4	7672
mbed_official	381:5460fc57b6e4	7673	/* Invoke repetition event callback */
mbed_official	381:5460fc57b6e4	7674	HAL_HRTIM_RepetitionEventCallback(hhrtim, TimerIdx);
mbed_official	381:5460fc57b6e4	7675	}
mbed_official	381:5460fc57b6e4	7676	}
mbed_official	381:5460fc57b6e4	7677
mbed_official	381:5460fc57b6e4	7678	/* Timer registers update event */
mbed_official	381:5460fc57b6e4	7679	if(__HAL_HRTIM_TIMER_GET_FLAG(hhrtim, TimerIdx, HRTIM_TIM_FLAG_UPD) != RESET)
mbed_official	381:5460fc57b6e4	7680	{
mbed_official	381:5460fc57b6e4	7681	if(__HAL_HRTIM_TIMER_GET_ITSTATUS(hhrtim, TimerIdx, HRTIM_TIM_IT_UPD) != RESET)
mbed_official	381:5460fc57b6e4	7682	{
mbed_official	381:5460fc57b6e4	7683	__HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_UPD);
mbed_official	381:5460fc57b6e4	7684
mbed_official	381:5460fc57b6e4	7685	/* Invoke registers update event callback */
mbed_official	381:5460fc57b6e4	7686	HAL_HRTIM_RegistersUpdateCallback(hhrtim, TimerIdx);
mbed_official	381:5460fc57b6e4	7687	}
mbed_official	381:5460fc57b6e4	7688	}
mbed_official	381:5460fc57b6e4	7689
mbed_official	381:5460fc57b6e4	7690	/* Timer capture 1 event */
mbed_official	381:5460fc57b6e4	7691	if(__HAL_HRTIM_TIMER_GET_FLAG(hhrtim, TimerIdx, HRTIM_TIM_FLAG_CPT1) != RESET)
mbed_official	381:5460fc57b6e4	7692	{
mbed_official	381:5460fc57b6e4	7693	if(__HAL_HRTIM_TIMER_GET_ITSTATUS(hhrtim, TimerIdx, HRTIM_TIM_IT_CPT1) != RESET)
mbed_official	381:5460fc57b6e4	7694	{
mbed_official	381:5460fc57b6e4	7695	__HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CPT1);
mbed_official	381:5460fc57b6e4	7696
mbed_official	381:5460fc57b6e4	7697	/* Invoke capture 1 event callback */
mbed_official	381:5460fc57b6e4	7698	HAL_HRTIM_Capture1EventCallback(hhrtim, TimerIdx);
mbed_official	381:5460fc57b6e4	7699	}
mbed_official	381:5460fc57b6e4	7700	}
mbed_official	381:5460fc57b6e4	7701
mbed_official	381:5460fc57b6e4	7702	/* Timer capture 2 event */
mbed_official	381:5460fc57b6e4	7703	if(__HAL_HRTIM_TIMER_GET_FLAG(hhrtim, TimerIdx, HRTIM_TIM_FLAG_CPT2) != RESET)
mbed_official	381:5460fc57b6e4	7704	{
mbed_official	381:5460fc57b6e4	7705	if(__HAL_HRTIM_TIMER_GET_ITSTATUS(hhrtim, TimerIdx, HRTIM_TIM_IT_CPT2) != RESET)
mbed_official	381:5460fc57b6e4	7706	{
mbed_official	381:5460fc57b6e4	7707	__HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_CPT2);
mbed_official	381:5460fc57b6e4	7708
mbed_official	381:5460fc57b6e4	7709	/* Invoke capture 2 event callback */
mbed_official	381:5460fc57b6e4	7710	HAL_HRTIM_Capture2EventCallback(hhrtim, TimerIdx);
mbed_official	381:5460fc57b6e4	7711	}
mbed_official	381:5460fc57b6e4	7712	}
mbed_official	381:5460fc57b6e4	7713
mbed_official	381:5460fc57b6e4	7714	/* Timer ouput 1 set event */
mbed_official	381:5460fc57b6e4	7715	if(__HAL_HRTIM_TIMER_GET_FLAG(hhrtim, TimerIdx, HRTIM_TIM_FLAG_SET1) != RESET)
mbed_official	381:5460fc57b6e4	7716	{
mbed_official	381:5460fc57b6e4	7717	if(__HAL_HRTIM_TIMER_GET_ITSTATUS(hhrtim, TimerIdx, HRTIM_TIM_IT_SET1) != RESET)
mbed_official	381:5460fc57b6e4	7718	{
mbed_official	381:5460fc57b6e4	7719	__HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_SET1);
mbed_official	381:5460fc57b6e4	7720
mbed_official	381:5460fc57b6e4	7721	/* Invoke ouput 1 set event callback */
mbed_official	381:5460fc57b6e4	7722	HAL_HRTIM_Output1SetCallback(hhrtim, TimerIdx);
mbed_official	381:5460fc57b6e4	7723	}
mbed_official	381:5460fc57b6e4	7724	}
mbed_official	381:5460fc57b6e4	7725
mbed_official	381:5460fc57b6e4	7726	/* Timer ouput 1 reset event */
mbed_official	381:5460fc57b6e4	7727	if(__HAL_HRTIM_TIMER_GET_FLAG(hhrtim, TimerIdx, HRTIM_TIM_FLAG_RST1) != RESET)
mbed_official	381:5460fc57b6e4	7728	{
mbed_official	381:5460fc57b6e4	7729	if(__HAL_HRTIM_TIMER_GET_ITSTATUS(hhrtim, TimerIdx, HRTIM_TIM_IT_RST1) != RESET)
mbed_official	381:5460fc57b6e4	7730	{
mbed_official	381:5460fc57b6e4	7731	__HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_RST1);
mbed_official	381:5460fc57b6e4	7732
mbed_official	381:5460fc57b6e4	7733	/* Invoke ouput 1 reset event callback */
mbed_official	381:5460fc57b6e4	7734	HAL_HRTIM_Output1ResetCallback(hhrtim, TimerIdx);
mbed_official	381:5460fc57b6e4	7735	}
mbed_official	381:5460fc57b6e4	7736	}
mbed_official	381:5460fc57b6e4	7737
mbed_official	381:5460fc57b6e4	7738	/* Timer ouput 2 set event */
mbed_official	381:5460fc57b6e4	7739	if(__HAL_HRTIM_TIMER_GET_FLAG(hhrtim, TimerIdx, HRTIM_TIM_FLAG_SET2) != RESET)
mbed_official	381:5460fc57b6e4	7740	{
mbed_official	381:5460fc57b6e4	7741	if(__HAL_HRTIM_TIMER_GET_ITSTATUS(hhrtim, TimerIdx, HRTIM_TIM_IT_SET2) != RESET)
mbed_official	381:5460fc57b6e4	7742	{
mbed_official	381:5460fc57b6e4	7743	__HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_SET2);
mbed_official	381:5460fc57b6e4	7744
mbed_official	381:5460fc57b6e4	7745	/* Invoke ouput 2 set event callback */
mbed_official	381:5460fc57b6e4	7746	HAL_HRTIM_Output2SetCallback(hhrtim, TimerIdx);
mbed_official	381:5460fc57b6e4	7747	}
mbed_official	381:5460fc57b6e4	7748	}
mbed_official	381:5460fc57b6e4	7749
mbed_official	381:5460fc57b6e4	7750	/* Timer ouput 2 reset event */
mbed_official	381:5460fc57b6e4	7751	if(__HAL_HRTIM_TIMER_GET_FLAG(hhrtim, TimerIdx, HRTIM_TIM_FLAG_RST2) != RESET)
mbed_official	381:5460fc57b6e4	7752	{
mbed_official	381:5460fc57b6e4	7753	if(__HAL_HRTIM_TIMER_GET_ITSTATUS(hhrtim, TimerIdx, HRTIM_TIM_IT_RST2) != RESET)
mbed_official	381:5460fc57b6e4	7754	{
mbed_official	381:5460fc57b6e4	7755	__HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_RST2);
mbed_official	381:5460fc57b6e4	7756
mbed_official	381:5460fc57b6e4	7757	/* Invoke ouput 2 reset event callback */
mbed_official	381:5460fc57b6e4	7758	HAL_HRTIM_Output2ResetCallback(hhrtim, TimerIdx);
mbed_official	381:5460fc57b6e4	7759	}
mbed_official	381:5460fc57b6e4	7760	}
mbed_official	381:5460fc57b6e4	7761
mbed_official	381:5460fc57b6e4	7762	/* Timer reset event */
mbed_official	381:5460fc57b6e4	7763	if(__HAL_HRTIM_TIMER_GET_FLAG(hhrtim, TimerIdx, HRTIM_TIM_FLAG_RST) != RESET)
mbed_official	381:5460fc57b6e4	7764	{
mbed_official	381:5460fc57b6e4	7765	if(__HAL_HRTIM_TIMER_GET_ITSTATUS(hhrtim, TimerIdx, HRTIM_TIM_IT_RST) != RESET)
mbed_official	381:5460fc57b6e4	7766	{
mbed_official	381:5460fc57b6e4	7767	__HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_RST);
mbed_official	381:5460fc57b6e4	7768
mbed_official	381:5460fc57b6e4	7769	/* Invoke timer reset callback */
mbed_official	381:5460fc57b6e4	7770	HAL_HRTIM_CounterResetCallback(hhrtim, TimerIdx);
mbed_official	381:5460fc57b6e4	7771	}
mbed_official	381:5460fc57b6e4	7772	}
mbed_official	381:5460fc57b6e4	7773
mbed_official	381:5460fc57b6e4	7774	/* Delayed protection event */
mbed_official	381:5460fc57b6e4	7775	if(__HAL_HRTIM_TIMER_GET_FLAG(hhrtim, TimerIdx, HRTIM_TIM_FLAG_DLYPRT) != RESET)
mbed_official	381:5460fc57b6e4	7776	{
mbed_official	381:5460fc57b6e4	7777	if(__HAL_HRTIM_TIMER_GET_ITSTATUS(hhrtim, TimerIdx, HRTIM_TIM_IT_DLYPRT) != RESET)
mbed_official	381:5460fc57b6e4	7778	{
mbed_official	381:5460fc57b6e4	7779	__HAL_HRTIM_TIMER_CLEAR_IT(hhrtim, TimerIdx, HRTIM_TIM_IT_DLYPRT);
mbed_official	381:5460fc57b6e4	7780
mbed_official	381:5460fc57b6e4	7781	/* Invoke delayed protection callback */
mbed_official	381:5460fc57b6e4	7782	HAL_HRTIM_DelayedProtectionCallback(hhrtim, TimerIdx);
mbed_official	381:5460fc57b6e4	7783	}
mbed_official	381:5460fc57b6e4	7784	}
mbed_official	381:5460fc57b6e4	7785	}
mbed_official	381:5460fc57b6e4	7786
mbed_official	381:5460fc57b6e4	7787	/**
mbed_official	381:5460fc57b6e4	7788	* @brief DMA callback invoked upon master timer related DMA request completion
mbed_official	381:5460fc57b6e4	7789	* @param hdma: pointer to DMA handle.
mbed_official	381:5460fc57b6e4	7790	* @retval None
mbed_official	381:5460fc57b6e4	7791	*/
mbed_official	381:5460fc57b6e4	7792	static void HRTIM_DMAMasterCplt(DMA_HandleTypeDef *hdma)
mbed_official	381:5460fc57b6e4	7793	{
mbed_official	381:5460fc57b6e4	7794	HRTIM_HandleTypeDef * hrtim = (HRTIM_HandleTypeDef )((DMA_HandleTypeDef )hdma)->Parent;
mbed_official	381:5460fc57b6e4	7795
mbed_official	381:5460fc57b6e4	7796	if ((hrtim->Instance->sMasterRegs.MDIER & HRTIM_MASTER_DMA_MCMP1) != RESET)
mbed_official	381:5460fc57b6e4	7797	{
mbed_official	381:5460fc57b6e4	7798	HAL_HRTIM_Compare1EventCallback(hrtim, HRTIM_TIMERINDEX_MASTER);
mbed_official	381:5460fc57b6e4	7799	}
mbed_official	381:5460fc57b6e4	7800	else if ((hrtim->Instance->sMasterRegs.MDIER & HRTIM_MASTER_DMA_MCMP2) != RESET)
mbed_official	381:5460fc57b6e4	7801	{
mbed_official	381:5460fc57b6e4	7802	HAL_HRTIM_Compare2EventCallback(hrtim, HRTIM_TIMERINDEX_MASTER);
mbed_official	381:5460fc57b6e4	7803	}
mbed_official	381:5460fc57b6e4	7804	else if ((hrtim->Instance->sMasterRegs.MDIER & HRTIM_MASTER_DMA_MCMP3) != RESET)
mbed_official	381:5460fc57b6e4	7805	{
mbed_official	381:5460fc57b6e4	7806	HAL_HRTIM_Compare3EventCallback(hrtim, HRTIM_TIMERINDEX_MASTER);
mbed_official	381:5460fc57b6e4	7807	}
mbed_official	381:5460fc57b6e4	7808	else if ((hrtim->Instance->sMasterRegs.MDIER & HRTIM_MASTER_DMA_MCMP4) != RESET)
mbed_official	381:5460fc57b6e4	7809	{
mbed_official	381:5460fc57b6e4	7810	HAL_HRTIM_Compare4EventCallback(hrtim, HRTIM_TIMERINDEX_MASTER);
mbed_official	381:5460fc57b6e4	7811	}
mbed_official	381:5460fc57b6e4	7812	else if ((hrtim->Instance->sMasterRegs.MDIER & HRTIM_MASTER_DMA_MREP) != RESET)
mbed_official	381:5460fc57b6e4	7813	{
mbed_official	381:5460fc57b6e4	7814	HAL_HRTIM_RepetitionEventCallback(hrtim, HRTIM_TIMERINDEX_MASTER);
mbed_official	381:5460fc57b6e4	7815	}
mbed_official	381:5460fc57b6e4	7816	else if ((hrtim->Instance->sMasterRegs.MDIER & HRTIM_MASTER_DMA_SYNC) != RESET)
mbed_official	381:5460fc57b6e4	7817	{
mbed_official	381:5460fc57b6e4	7818	HAL_HRTIM_SynchronizationEventCallback(hrtim);
mbed_official	381:5460fc57b6e4	7819	}
mbed_official	381:5460fc57b6e4	7820	else if ((hrtim->Instance->sMasterRegs.MDIER & HRTIM_MASTER_DMA_MUPD) != RESET)
mbed_official	381:5460fc57b6e4	7821	{
mbed_official	381:5460fc57b6e4	7822	HAL_HRTIM_RegistersUpdateCallback(hrtim, HRTIM_TIMERINDEX_MASTER);
mbed_official	381:5460fc57b6e4	7823	}
mbed_official	381:5460fc57b6e4	7824	}
mbed_official	381:5460fc57b6e4	7825
mbed_official	381:5460fc57b6e4	7826	/**
mbed_official	381:5460fc57b6e4	7827	* @brief DMA callback invoked upon timer A..E related DMA request completion
mbed_official	381:5460fc57b6e4	7828	* @param hdma: pointer to DMA handle.
mbed_official	381:5460fc57b6e4	7829	* @retval None
mbed_official	381:5460fc57b6e4	7830	*/
mbed_official	381:5460fc57b6e4	7831	static void HRTIM_DMATimerxCplt(DMA_HandleTypeDef *hdma)
mbed_official	381:5460fc57b6e4	7832	{
mbed_official	381:5460fc57b6e4	7833	uint8_t timer_idx;
mbed_official	381:5460fc57b6e4	7834
mbed_official	381:5460fc57b6e4	7835	HRTIM_HandleTypeDef * hrtim = (HRTIM_HandleTypeDef )((DMA_HandleTypeDef )hdma)->Parent;
mbed_official	381:5460fc57b6e4	7836
mbed_official	381:5460fc57b6e4	7837	timer_idx = GetTimerIdxFromDMAHandle(hdma);
mbed_official	381:5460fc57b6e4	7838
mbed_official	381:5460fc57b6e4	7839	if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_CMP1) != RESET)
mbed_official	381:5460fc57b6e4	7840	{
mbed_official	381:5460fc57b6e4	7841	HAL_HRTIM_Compare1EventCallback(hrtim, timer_idx);
mbed_official	381:5460fc57b6e4	7842	}
mbed_official	381:5460fc57b6e4	7843	else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_CMP2) != RESET)
mbed_official	381:5460fc57b6e4	7844	{
mbed_official	381:5460fc57b6e4	7845	HAL_HRTIM_Compare2EventCallback(hrtim, timer_idx);
mbed_official	381:5460fc57b6e4	7846	}
mbed_official	381:5460fc57b6e4	7847	else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_CMP3) != RESET)
mbed_official	381:5460fc57b6e4	7848	{
mbed_official	381:5460fc57b6e4	7849	HAL_HRTIM_Compare3EventCallback(hrtim, timer_idx);
mbed_official	381:5460fc57b6e4	7850	}
mbed_official	381:5460fc57b6e4	7851	else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_CMP4) != RESET)
mbed_official	381:5460fc57b6e4	7852	{
mbed_official	381:5460fc57b6e4	7853	HAL_HRTIM_Compare4EventCallback(hrtim, timer_idx);
mbed_official	381:5460fc57b6e4	7854	}
mbed_official	381:5460fc57b6e4	7855	else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_REP) != RESET)
mbed_official	381:5460fc57b6e4	7856	{
mbed_official	381:5460fc57b6e4	7857	HAL_HRTIM_RepetitionEventCallback(hrtim, timer_idx);
mbed_official	381:5460fc57b6e4	7858	}
mbed_official	381:5460fc57b6e4	7859	else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_UPD) != RESET)
mbed_official	381:5460fc57b6e4	7860	{
mbed_official	381:5460fc57b6e4	7861	HAL_HRTIM_RegistersUpdateCallback(hrtim, timer_idx);
mbed_official	381:5460fc57b6e4	7862	}
mbed_official	381:5460fc57b6e4	7863	else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_CPT1) != RESET)
mbed_official	381:5460fc57b6e4	7864	{
mbed_official	381:5460fc57b6e4	7865	HAL_HRTIM_Capture1EventCallback(hrtim, timer_idx);
mbed_official	381:5460fc57b6e4	7866	}
mbed_official	381:5460fc57b6e4	7867	else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_CPT2) != RESET)
mbed_official	381:5460fc57b6e4	7868	{
mbed_official	381:5460fc57b6e4	7869	HAL_HRTIM_Capture2EventCallback(hrtim, timer_idx);
mbed_official	381:5460fc57b6e4	7870	}
mbed_official	381:5460fc57b6e4	7871	else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_SET1) != RESET)
mbed_official	381:5460fc57b6e4	7872	{
mbed_official	381:5460fc57b6e4	7873	HAL_HRTIM_Output1SetCallback(hrtim, timer_idx);
mbed_official	381:5460fc57b6e4	7874	}
mbed_official	381:5460fc57b6e4	7875	else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_RST1) != RESET)
mbed_official	381:5460fc57b6e4	7876	{
mbed_official	381:5460fc57b6e4	7877	HAL_HRTIM_Output1ResetCallback(hrtim, timer_idx);
mbed_official	381:5460fc57b6e4	7878	}
mbed_official	381:5460fc57b6e4	7879	else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_SET2) != RESET)
mbed_official	381:5460fc57b6e4	7880	{
mbed_official	381:5460fc57b6e4	7881	HAL_HRTIM_Output2SetCallback(hrtim, timer_idx);
mbed_official	381:5460fc57b6e4	7882	}
mbed_official	381:5460fc57b6e4	7883	else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_RST2) != RESET)
mbed_official	381:5460fc57b6e4	7884	{
mbed_official	381:5460fc57b6e4	7885	HAL_HRTIM_Output2ResetCallback(hrtim, timer_idx);
mbed_official	381:5460fc57b6e4	7886	}
mbed_official	381:5460fc57b6e4	7887	else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_RST) != RESET)
mbed_official	381:5460fc57b6e4	7888	{
mbed_official	381:5460fc57b6e4	7889	HAL_HRTIM_CounterResetCallback(hrtim, timer_idx);
mbed_official	381:5460fc57b6e4	7890	}
mbed_official	381:5460fc57b6e4	7891	else if ((hrtim->Instance->sTimerxRegs[timer_idx].TIMxDIER & HRTIM_TIM_DMA_DLYPRT) != RESET)
mbed_official	381:5460fc57b6e4	7892	{
mbed_official	381:5460fc57b6e4	7893	HAL_HRTIM_DelayedProtectionCallback(hrtim, timer_idx);
mbed_official	381:5460fc57b6e4	7894	}
mbed_official	381:5460fc57b6e4	7895	}
mbed_official	381:5460fc57b6e4	7896
mbed_official	381:5460fc57b6e4	7897	/**
mbed_official	381:5460fc57b6e4	7898	* @brief DMA error callback
mbed_official	381:5460fc57b6e4	7899	* @param hdma: pointer to DMA handle.
mbed_official	381:5460fc57b6e4	7900	* @retval None
mbed_official	381:5460fc57b6e4	7901	*/
mbed_official	381:5460fc57b6e4	7902	static void HRTIM_DMAError(DMA_HandleTypeDef *hdma)
mbed_official	381:5460fc57b6e4	7903	{
mbed_official	381:5460fc57b6e4	7904	HRTIM_HandleTypeDef * hrtim = (HRTIM_HandleTypeDef )((DMA_HandleTypeDef )hdma)->Parent;
mbed_official	381:5460fc57b6e4	7905
mbed_official	381:5460fc57b6e4	7906	HAL_HRTIM_ErrorCallback(hrtim);
mbed_official	381:5460fc57b6e4	7907	}
mbed_official	381:5460fc57b6e4	7908
mbed_official	381:5460fc57b6e4	7909	/**
mbed_official	381:5460fc57b6e4	7910	* @brief DMA callback invoked upon burst DMA transfer completion
mbed_official	381:5460fc57b6e4	7911	* @param hdma: pointer to DMA handle.
mbed_official	381:5460fc57b6e4	7912	* @retval None
mbed_official	381:5460fc57b6e4	7913	*/
mbed_official	381:5460fc57b6e4	7914	static void HRTIM_BurstDMACplt(DMA_HandleTypeDef *hdma)
mbed_official	381:5460fc57b6e4	7915	{
mbed_official	381:5460fc57b6e4	7916	HRTIM_HandleTypeDef * hrtim = (HRTIM_HandleTypeDef )((DMA_HandleTypeDef )hdma)->Parent;
mbed_official	381:5460fc57b6e4	7917
mbed_official	381:5460fc57b6e4	7918	HAL_HRTIM_BurstDMATransferCallback(hrtim, GetTimerIdxFromDMAHandle(hdma));
mbed_official	381:5460fc57b6e4	7919	}
mbed_official	381:5460fc57b6e4	7920
mbed_official	381:5460fc57b6e4	7921	/**
mbed_official	381:5460fc57b6e4	7922	* @}
mbed_official	381:5460fc57b6e4	7923	*/
mbed_official	381:5460fc57b6e4	7924
mbed_official	381:5460fc57b6e4	7925	/**
mbed_official	381:5460fc57b6e4	7926	* @}
mbed_official	381:5460fc57b6e4	7927	*/
mbed_official	381:5460fc57b6e4	7928	#endif /* STM32F334x8 */
mbed_official	381:5460fc57b6e4	7929
mbed_official	381:5460fc57b6e4	7930	#endif /* HAL_HRTIM_MODULE_ENABLED */
mbed_official	381:5460fc57b6e4	7931
mbed_official	381:5460fc57b6e4	7932	/**
mbed_official	381:5460fc57b6e4	7933	* @}
mbed_official	381:5460fc57b6e4	7934	*/
mbed_official	381:5460fc57b6e4	7935
mbed_official	381:5460fc57b6e4	7936	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/
mbed_official	381:5460fc57b6e4	7937
mbed_official	381:5460fc57b6e4	7938
mbed_official	381:5460fc57b6e4	7939

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Type:	Library
Created:	15 Nov 2014
Imports:	9
Forks:	0
Commits:	401
Dependents:	0
Dependencies:	0
Followers:	3

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Stuart Northfield

Tony Engeham

targets/cmsis/TARGET_STM/TARGET_DISCO_F334C8/stm32f3xx_hal_hrtim.c@381:5460fc57b6e4, 2014-11-03 (annotated)

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